1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2023 Napatech A/S 4 */ 5 6 #include "ntlog.h" 7 8 #include "nthw_drv.h" 9 #include "nthw_register.h" 10 11 #include "nthw_rmc.h" 12 13 nthw_rmc_t *nthw_rmc_new(void) 14 { 15 nthw_rmc_t *p = malloc(sizeof(nthw_rmc_t)); 16 17 if (p) 18 memset(p, 0, sizeof(nthw_rmc_t)); 19 20 return p; 21 } 22 23 int nthw_rmc_init(nthw_rmc_t *p, nthw_fpga_t *p_fpga, int n_instance) 24 { 25 const char *const p_adapter_id_str = p_fpga->p_fpga_info->mp_adapter_id_str; 26 nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_RMC, n_instance); 27 28 if (p == NULL) 29 return p_mod == NULL ? -1 : 0; 30 31 if (p_mod == NULL) { 32 NT_LOG(ERR, NTHW, "%s: RMC %d: no such instance", p_adapter_id_str, n_instance); 33 return -1; 34 } 35 36 p->mp_fpga = p_fpga; 37 p->mn_instance = n_instance; 38 p->mp_mod_rmc = p_mod; 39 40 /* Params */ 41 p->mn_ports = 42 nthw_fpga_get_product_param(p_fpga, NT_RX_PORTS, 43 nthw_fpga_get_product_param(p_fpga, NT_PORTS, 0)); 44 p->mn_nims = nthw_fpga_get_product_param(p_fpga, NT_NIMS, 0); 45 p->mb_administrative_block = false; 46 47 NT_LOG(DBG, NTHW, "%s: RMC %d", p_adapter_id_str, p->mn_instance); 48 49 p->mp_reg_ctrl = nthw_module_get_register(p->mp_mod_rmc, RMC_CTRL); 50 51 p->mp_fld_ctrl_block_stat_drop = 52 nthw_register_get_field(p->mp_reg_ctrl, RMC_CTRL_BLOCK_STATT); 53 p->mp_fld_ctrl_block_keep_alive = 54 nthw_register_get_field(p->mp_reg_ctrl, RMC_CTRL_BLOCK_KEEPA); 55 p->mp_fld_ctrl_block_mac_port = 56 nthw_register_get_field(p->mp_reg_ctrl, RMC_CTRL_BLOCK_MAC_PORT); 57 58 p->mp_reg_status = nthw_module_query_register(p->mp_mod_rmc, RMC_STATUS); 59 60 if (p->mp_reg_status) { 61 p->mp_fld_sf_ram_of = 62 nthw_register_get_field(p->mp_reg_status, RMC_STATUS_SF_RAM_OF); 63 p->mp_fld_descr_fifo_of = 64 nthw_register_get_field(p->mp_reg_status, RMC_STATUS_DESCR_FIFO_OF); 65 } 66 67 p->mp_reg_dbg = nthw_module_query_register(p->mp_mod_rmc, RMC_DBG); 68 69 if (p->mp_reg_dbg) 70 p->mp_fld_dbg_merge = nthw_register_get_field(p->mp_reg_dbg, RMC_DBG_MERGE); 71 72 p->mp_reg_mac_if = nthw_module_query_register(p->mp_mod_rmc, RMC_MAC_IF); 73 74 if (p->mp_reg_mac_if) 75 p->mp_fld_mac_if_err = nthw_register_get_field(p->mp_reg_mac_if, RMC_MAC_IF_ERR); 76 77 return 0; 78 } 79 80 uint32_t nthw_rmc_get_status_sf_ram_of(nthw_rmc_t *p) 81 { 82 return (p->mp_reg_status) ? nthw_field_get_updated(p->mp_fld_sf_ram_of) : 0xffffffff; 83 } 84 85 uint32_t nthw_rmc_get_status_descr_fifo_of(nthw_rmc_t *p) 86 { 87 return (p->mp_reg_status) ? nthw_field_get_updated(p->mp_fld_descr_fifo_of) : 0xffffffff; 88 } 89 90 uint32_t nthw_rmc_get_dbg_merge(nthw_rmc_t *p) 91 { 92 return (p->mp_reg_dbg) ? nthw_field_get_updated(p->mp_fld_dbg_merge) : 0xffffffff; 93 } 94 95 uint32_t nthw_rmc_get_mac_if_err(nthw_rmc_t *p) 96 { 97 return (p->mp_reg_mac_if) ? nthw_field_get_updated(p->mp_fld_mac_if_err) : 0xffffffff; 98 } 99 100 void nthw_rmc_block(nthw_rmc_t *p) 101 { 102 /* BLOCK_STATT(0)=1 BLOCK_KEEPA(1)=1 BLOCK_MAC_PORT(8:11)=~0 */ 103 if (!p->mb_administrative_block) { 104 nthw_field_set_flush(p->mp_fld_ctrl_block_stat_drop); 105 nthw_field_set_flush(p->mp_fld_ctrl_block_keep_alive); 106 nthw_field_set_flush(p->mp_fld_ctrl_block_mac_port); 107 } 108 } 109 110 void nthw_rmc_unblock(nthw_rmc_t *p, bool b_is_secondary) 111 { 112 uint32_t n_block_mask = ~0U << (b_is_secondary ? p->mn_nims : p->mn_ports); 113 114 /* BLOCK_STATT(0)=0 BLOCK_KEEPA(1)=0 BLOCK_MAC_PORT(8:11)=0 */ 115 if (!p->mb_administrative_block) { 116 nthw_field_clr_flush(p->mp_fld_ctrl_block_stat_drop); 117 nthw_field_clr_flush(p->mp_fld_ctrl_block_keep_alive); 118 nthw_field_set_val_flush32(p->mp_fld_ctrl_block_mac_port, n_block_mask); 119 } 120 } 121