xref: /dpdk/drivers/net/ntnic/include/stream_binary_flow_api.h (revision effa04693274e59d82b24907c5ee4d1f8eef3cd7)
1 /*
2  * SPDX-License-Identifier: BSD-3-Clause
3  * Copyright(c) 2023 Napatech A/S
4  */
5 
6 #ifndef _STREAM_BINARY_FLOW_API_H_
7 #define _STREAM_BINARY_FLOW_API_H_
8 
9 #include <rte_ether.h>
10 #include "rte_flow.h"
11 #include "rte_flow_driver.h"
12 
13 /* Max RSS hash key length in bytes */
14 #define MAX_RSS_KEY_LEN 40
15 
16 /* NT specific MASKs for RSS configuration */
17 /* NOTE: Masks are required for correct RSS configuration, do not modify them! */
18 #define NT_ETH_RSS_IPV4_MASK                                                                      \
19 	(RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 | RTE_ETH_RSS_NONFRAG_IPV4_OTHER |              \
20 	 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_NONFRAG_IPV4_TCP |                           \
21 	 RTE_ETH_RSS_NONFRAG_IPV4_UDP)
22 
23 #define NT_ETH_RSS_IPV6_MASK                                                                      \
24 	(RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 | RTE_ETH_RSS_IPV6_EX |                         \
25 	 RTE_ETH_RSS_IPV6_TCP_EX | RTE_ETH_RSS_IPV6_UDP_EX | RTE_ETH_RSS_NONFRAG_IPV6_OTHER |     \
26 	 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_NONFRAG_IPV6_TCP |                           \
27 	 RTE_ETH_RSS_NONFRAG_IPV6_UDP)
28 
29 #define NT_ETH_RSS_IP_MASK                                                                        \
30 	(NT_ETH_RSS_IPV4_MASK | NT_ETH_RSS_IPV6_MASK | RTE_ETH_RSS_L3_SRC_ONLY |                  \
31 	 RTE_ETH_RSS_L3_DST_ONLY)
32 
33 /* List of all RSS flags supported for RSS calculation offload */
34 #define NT_ETH_RSS_OFFLOAD_MASK                                                                   \
35 	(RTE_ETH_RSS_ETH | RTE_ETH_RSS_L2_PAYLOAD | RTE_ETH_RSS_IP | RTE_ETH_RSS_TCP |            \
36 	 RTE_ETH_RSS_UDP | RTE_ETH_RSS_SCTP | RTE_ETH_RSS_L2_SRC_ONLY | RTE_ETH_RSS_L2_DST_ONLY | \
37 	 RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY | RTE_ETH_RSS_L3_SRC_ONLY |            \
38 	 RTE_ETH_RSS_L3_DST_ONLY | RTE_ETH_RSS_VLAN | RTE_ETH_RSS_LEVEL_MASK |                    \
39 	 RTE_ETH_RSS_IPV4_CHKSUM | RTE_ETH_RSS_L4_CHKSUM | RTE_ETH_RSS_PORT | RTE_ETH_RSS_GTPU)
40 
41 /*
42  * Flow frontend for binary programming interface
43  */
44 
45 #define FLOW_MAX_QUEUES 128
46 
47 #define RAW_ENCAP_DECAP_ELEMS_MAX 16
48 
49 extern uint64_t rte_tsc_freq;
50 extern rte_spinlock_t hwlock;
51 
52 /*
53  * Flow eth dev profile determines how the FPGA module resources are
54  * managed and what features are available
55  */
56 enum flow_eth_dev_profile {
57 	FLOW_ETH_DEV_PROFILE_INLINE = 0,
58 };
59 
60 struct flow_queue_id_s {
61 	int id;
62 	int hw_id;
63 };
64 
65 /*
66  * RTE_FLOW_ACTION_TYPE_RAW_ENCAP
67  */
68 struct flow_action_raw_encap {
69 	uint8_t *data;
70 	uint8_t *preserve;
71 	size_t size;
72 	struct rte_flow_item items[RAW_ENCAP_DECAP_ELEMS_MAX];
73 	int item_count;
74 };
75 
76 /*
77  * RTE_FLOW_ACTION_TYPE_RAW_DECAP
78  */
79 struct flow_action_raw_decap {
80 	uint8_t *data;
81 	size_t size;
82 	struct rte_flow_item items[RAW_ENCAP_DECAP_ELEMS_MAX];
83 	int item_count;
84 };
85 
86 struct flow_eth_dev;             /* port device */
87 struct flow_handle;
88 
89 #endif  /* _STREAM_BINARY_FLOW_API_H_ */
90