1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2023 Napatech A/S 4 */ 5 6 #ifndef __NTOS_DRV_H__ 7 #define __NTOS_DRV_H__ 8 9 #include <unistd.h> 10 #include <stdlib.h> 11 #include <stdint.h> 12 #include <inttypes.h> 13 14 #include <rte_ether.h> 15 #include "rte_mtr.h" 16 17 #include "stream_binary_flow_api.h" 18 #include "nthw_drv.h" 19 20 #define NUM_MAC_ADDRS_PER_PORT (16U) 21 #define NUM_MULTICAST_ADDRS_PER_PORT (16U) 22 23 #define NUM_ADAPTER_MAX (8) 24 #define NUM_ADAPTER_PORTS_MAX (128) 25 26 27 /* Max RSS queues */ 28 #define MAX_QUEUES 125 29 30 /* Structs: */ 31 #define SG_HDR_SIZE 12 32 33 struct _pkt_hdr_rx { 34 uint32_t cap_len:14; 35 uint32_t fid:10; 36 uint32_t ofs1:8; 37 uint32_t ip_prot:8; 38 uint32_t port:13; 39 uint32_t descr:8; 40 uint32_t descr_12b:1; 41 uint32_t color_type:2; 42 uint32_t color:32; 43 }; 44 45 struct nthw_memory_descriptor { 46 void *phys_addr; 47 void *virt_addr; 48 uint32_t len; 49 }; 50 51 struct hwq_s { 52 int vf_num; 53 struct nthw_memory_descriptor virt_queues_ctrl; 54 struct nthw_memory_descriptor *pkt_buffers; 55 }; 56 57 struct __rte_cache_aligned ntnic_rx_queue { 58 struct flow_queue_id_s queue; /* queue info - user id and hw queue index */ 59 struct rte_mempool *mb_pool; /* mbuf memory pool */ 60 uint16_t buf_size; /* Size of data area in mbuf */ 61 unsigned long rx_pkts; /* Rx packet statistics */ 62 unsigned long rx_bytes; /* Rx bytes statistics */ 63 unsigned long err_pkts; /* Rx error packet statistics */ 64 int enabled; /* Enabling/disabling of this queue */ 65 66 struct hwq_s hwq; 67 struct nthw_virt_queue *vq; 68 int nb_hw_rx_descr; 69 nt_meta_port_type_t type; 70 uint32_t port; /* Rx port for this queue */ 71 enum fpga_info_profile profile; /* Inline / Capture */ 72 73 }; 74 75 struct __rte_cache_aligned ntnic_tx_queue { 76 struct flow_queue_id_s queue; /* queue info - user id and hw queue index */ 77 struct hwq_s hwq; 78 struct nthw_virt_queue *vq; 79 int nb_hw_tx_descr; 80 /* Used for bypass in NTDVIO0 header on Tx - pre calculated */ 81 int target_id; 82 nt_meta_port_type_t type; 83 /* only used for exception tx queue from OVS SW switching */ 84 int rss_target_id; 85 86 uint32_t port; /* Tx port for this queue */ 87 unsigned long tx_pkts; /* Tx packet statistics */ 88 unsigned long tx_bytes; /* Tx bytes statistics */ 89 unsigned long err_pkts; /* Tx error packet stat */ 90 int enabled; /* Enabling/disabling of this queue */ 91 enum fpga_info_profile profile; /* Inline / Capture */ 92 }; 93 94 struct nt_mtr_profile { 95 LIST_ENTRY(nt_mtr_profile) next; 96 uint32_t profile_id; 97 struct rte_mtr_meter_profile profile; 98 }; 99 100 struct nt_mtr { 101 LIST_ENTRY(nt_mtr) next; 102 uint32_t mtr_id; 103 int shared; 104 struct nt_mtr_profile *profile; 105 }; 106 107 struct pmd_internals { 108 const struct rte_pci_device *pci_dev; 109 struct flow_eth_dev *flw_dev; 110 char name[20]; 111 int n_intf_no; 112 int lpbk_mode; 113 unsigned int nb_rx_queues; 114 unsigned int nb_tx_queues; 115 /* Offset of the VF from the PF */ 116 uint8_t vf_offset; 117 uint32_t port; 118 uint32_t port_id; 119 nt_meta_port_type_t type; 120 struct flow_queue_id_s vpq[MAX_QUEUES]; 121 unsigned int vpq_nb_vq; 122 /* Array of Rx queues */ 123 struct ntnic_rx_queue rxq_scg[MAX_QUEUES]; 124 /* Array of Tx queues */ 125 struct ntnic_tx_queue txq_scg[MAX_QUEUES]; 126 struct drv_s *p_drv; 127 /* Ethernet (MAC) addresses. Element number zero denotes default address. */ 128 struct rte_ether_addr eth_addrs[NUM_MAC_ADDRS_PER_PORT]; 129 /* Multicast ethernet (MAC) addresses. */ 130 struct rte_ether_addr mc_addrs[NUM_MULTICAST_ADDRS_PER_PORT]; 131 uint64_t last_stat_rtc; 132 uint64_t rx_missed; 133 struct pmd_internals *next; 134 }; 135 136 #endif /* __NTOS_DRV_H__ */ 137