1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright(c) 2023 Napatech A/S 4 */ 5 6 #ifndef NTNIC_STAT_H_ 7 #define NTNIC_STAT_H_ 8 9 #include "common_adapter_defs.h" 10 #include "nthw_rmc.h" 11 #include "nthw_rpf.h" 12 #include "nthw_fpga_model.h" 13 14 #define NT_MAX_COLOR_FLOW_STATS 0x400 15 16 struct nthw_stat { 17 nthw_fpga_t *mp_fpga; 18 nthw_module_t *mp_mod_stat; 19 int mn_instance; 20 21 int mn_stat_layout_version; 22 23 bool mb_has_tx_stats; 24 25 int m_nb_phy_ports; 26 int m_nb_nim_ports; 27 28 int m_nb_rx_ports; 29 int m_nb_tx_ports; 30 31 int m_nb_rx_host_buffers; 32 int m_nb_tx_host_buffers; 33 34 int m_dbs_present; 35 36 int m_rx_port_replicate; 37 38 int m_nb_color_counters; 39 40 int m_nb_rx_hb_counters; 41 int m_nb_tx_hb_counters; 42 43 int m_nb_rx_port_counters; 44 int m_nb_tx_port_counters; 45 46 int m_nb_counters; 47 48 int m_nb_rpp_per_ps; 49 50 nthw_field_t *mp_fld_dma_ena; 51 nthw_field_t *mp_fld_cnt_clear; 52 53 nthw_field_t *mp_fld_tx_disable; 54 55 nthw_field_t *mp_fld_cnt_freeze; 56 57 nthw_field_t *mp_fld_stat_toggle_missed; 58 59 nthw_field_t *mp_fld_dma_lsb; 60 nthw_field_t *mp_fld_dma_msb; 61 62 nthw_field_t *mp_fld_load_bin; 63 nthw_field_t *mp_fld_load_bps_rx0; 64 nthw_field_t *mp_fld_load_bps_rx1; 65 nthw_field_t *mp_fld_load_bps_tx0; 66 nthw_field_t *mp_fld_load_bps_tx1; 67 nthw_field_t *mp_fld_load_pps_rx0; 68 nthw_field_t *mp_fld_load_pps_rx1; 69 nthw_field_t *mp_fld_load_pps_tx0; 70 nthw_field_t *mp_fld_load_pps_tx1; 71 72 uint64_t m_stat_dma_physical; 73 uint32_t *mp_stat_dma_virtual; 74 75 uint64_t *mp_timestamp; 76 }; 77 78 typedef struct nthw_stat nthw_stat_t; 79 typedef struct nthw_stat nthw_stat; 80 81 struct color_counters { 82 uint64_t color_packets; 83 uint64_t color_bytes; 84 uint8_t tcp_flags; 85 }; 86 87 struct host_buffer_counters { 88 uint64_t flush_packets; 89 uint64_t drop_packets; 90 uint64_t fwd_packets; 91 uint64_t dbs_drop_packets; 92 uint64_t flush_bytes; 93 uint64_t drop_bytes; 94 uint64_t fwd_bytes; 95 uint64_t dbs_drop_bytes; 96 }; 97 98 struct port_load_counters { 99 uint64_t rx_pps; 100 uint64_t rx_pps_max; 101 uint64_t tx_pps; 102 uint64_t tx_pps_max; 103 uint64_t rx_bps; 104 uint64_t rx_bps_max; 105 uint64_t tx_bps; 106 uint64_t tx_bps_max; 107 }; 108 109 struct port_counters_v2 { 110 /* Rx/Tx common port counters */ 111 uint64_t drop_events; 112 uint64_t pkts; 113 /* FPGA counters */ 114 uint64_t octets; 115 uint64_t broadcast_pkts; 116 uint64_t multicast_pkts; 117 uint64_t unicast_pkts; 118 uint64_t pkts_alignment; 119 uint64_t pkts_code_violation; 120 uint64_t pkts_crc; 121 uint64_t undersize_pkts; 122 uint64_t oversize_pkts; 123 uint64_t fragments; 124 uint64_t jabbers_not_truncated; 125 uint64_t jabbers_truncated; 126 uint64_t pkts_64_octets; 127 uint64_t pkts_65_to_127_octets; 128 uint64_t pkts_128_to_255_octets; 129 uint64_t pkts_256_to_511_octets; 130 uint64_t pkts_512_to_1023_octets; 131 uint64_t pkts_1024_to_1518_octets; 132 uint64_t pkts_1519_to_2047_octets; 133 uint64_t pkts_2048_to_4095_octets; 134 uint64_t pkts_4096_to_8191_octets; 135 uint64_t pkts_8192_to_max_octets; 136 uint64_t mac_drop_events; 137 uint64_t pkts_lr; 138 /* Rx only port counters */ 139 uint64_t duplicate; 140 uint64_t pkts_ip_chksum_error; 141 uint64_t pkts_udp_chksum_error; 142 uint64_t pkts_tcp_chksum_error; 143 uint64_t pkts_giant_undersize; 144 uint64_t pkts_baby_giant; 145 uint64_t pkts_not_isl_vlan_mpls; 146 uint64_t pkts_isl; 147 uint64_t pkts_vlan; 148 uint64_t pkts_isl_vlan; 149 uint64_t pkts_mpls; 150 uint64_t pkts_isl_mpls; 151 uint64_t pkts_vlan_mpls; 152 uint64_t pkts_isl_vlan_mpls; 153 uint64_t pkts_no_filter; 154 uint64_t pkts_dedup_drop; 155 uint64_t pkts_filter_drop; 156 uint64_t pkts_overflow; 157 uint64_t pkts_dbs_drop; 158 uint64_t octets_no_filter; 159 uint64_t octets_dedup_drop; 160 uint64_t octets_filter_drop; 161 uint64_t octets_overflow; 162 uint64_t octets_dbs_drop; 163 uint64_t ipft_first_hit; 164 uint64_t ipft_first_not_hit; 165 uint64_t ipft_mid_hit; 166 uint64_t ipft_mid_not_hit; 167 uint64_t ipft_last_hit; 168 uint64_t ipft_last_not_hit; 169 }; 170 171 struct flm_counters_v1 { 172 /* FLM 0.17 */ 173 uint64_t current; 174 uint64_t learn_done; 175 uint64_t learn_ignore; 176 uint64_t learn_fail; 177 uint64_t unlearn_done; 178 uint64_t unlearn_ignore; 179 uint64_t auto_unlearn_done; 180 uint64_t auto_unlearn_ignore; 181 uint64_t auto_unlearn_fail; 182 uint64_t timeout_unlearn_done; 183 uint64_t rel_done; 184 uint64_t rel_ignore; 185 /* FLM 0.20 */ 186 uint64_t prb_done; 187 uint64_t prb_ignore; 188 uint64_t sta_done; 189 uint64_t inf_done; 190 uint64_t inf_skip; 191 uint64_t pck_hit; 192 uint64_t pck_miss; 193 uint64_t pck_unh; 194 uint64_t pck_dis; 195 uint64_t csh_hit; 196 uint64_t csh_miss; 197 uint64_t csh_unh; 198 uint64_t cuc_start; 199 uint64_t cuc_move; 200 /* FLM 0.17 Load */ 201 uint64_t load_lps; 202 uint64_t load_aps; 203 uint64_t max_lps; 204 uint64_t max_aps; 205 }; 206 207 struct nt4ga_stat_s { 208 nthw_stat_t *mp_nthw_stat; 209 nthw_rmc_t *mp_nthw_rmc; 210 nthw_rpf_t *mp_nthw_rpf; 211 struct nt_dma_s *p_stat_dma; 212 uint32_t *p_stat_dma_virtual; 213 uint32_t n_stat_size; 214 215 uint64_t last_timestamp; 216 217 int mn_rx_host_buffers; 218 int mn_tx_host_buffers; 219 220 int mn_rx_ports; 221 int mn_tx_ports; 222 223 struct color_counters *mp_stat_structs_color; 224 /* For calculating increments between stats polls */ 225 struct color_counters a_stat_structs_color_base[NT_MAX_COLOR_FLOW_STATS]; 226 227 /* Port counters for inline */ 228 struct { 229 struct port_counters_v2 *mp_stat_structs_port_rx; 230 struct port_counters_v2 *mp_stat_structs_port_tx; 231 } cap; 232 233 struct host_buffer_counters *mp_stat_structs_hb; 234 struct port_load_counters *mp_port_load; 235 236 int flm_stat_ver; 237 struct flm_counters_v1 *mp_stat_structs_flm; 238 239 /* Rx/Tx totals: */ 240 uint64_t n_totals_reset_timestamp; /* timestamp for last totals reset */ 241 242 uint64_t a_port_rx_octets_total[NUM_ADAPTER_PORTS_MAX]; 243 /* Base is for calculating increments between statistics reads */ 244 uint64_t a_port_rx_octets_base[NUM_ADAPTER_PORTS_MAX]; 245 246 uint64_t a_port_rx_packets_total[NUM_ADAPTER_PORTS_MAX]; 247 uint64_t a_port_rx_packets_base[NUM_ADAPTER_PORTS_MAX]; 248 249 uint64_t a_port_rx_drops_total[NUM_ADAPTER_PORTS_MAX]; 250 uint64_t a_port_rx_drops_base[NUM_ADAPTER_PORTS_MAX]; 251 252 uint64_t a_port_tx_octets_total[NUM_ADAPTER_PORTS_MAX]; 253 uint64_t a_port_tx_octets_base[NUM_ADAPTER_PORTS_MAX]; 254 255 uint64_t a_port_tx_packets_base[NUM_ADAPTER_PORTS_MAX]; 256 uint64_t a_port_tx_packets_total[NUM_ADAPTER_PORTS_MAX]; 257 258 uint64_t a_port_tx_drops_total[NUM_ADAPTER_PORTS_MAX]; 259 }; 260 261 typedef struct nt4ga_stat_s nt4ga_stat_t; 262 263 nthw_stat_t *nthw_stat_new(void); 264 int nthw_stat_init(nthw_stat_t *p, nthw_fpga_t *p_fpga, int n_instance); 265 void nthw_stat_delete(nthw_stat_t *p); 266 267 int nthw_stat_set_dma_address(nthw_stat_t *p, uint64_t stat_dma_physical, 268 uint32_t *p_stat_dma_virtual); 269 int nthw_stat_trigger(nthw_stat_t *p); 270 271 int nthw_stat_get_load_bps_rx(nthw_stat_t *p, uint8_t port, uint32_t *val); 272 int nthw_stat_get_load_bps_tx(nthw_stat_t *p, uint8_t port, uint32_t *val); 273 int nthw_stat_get_load_pps_rx(nthw_stat_t *p, uint8_t port, uint32_t *val); 274 int nthw_stat_get_load_pps_tx(nthw_stat_t *p, uint8_t port, uint32_t *val); 275 276 #endif /* NTNIC_STAT_H_ */ 277