144e97550SJiawen Wu /* SPDX-License-Identifier: BSD-3-Clause 244e97550SJiawen Wu * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd. 344e97550SJiawen Wu * Copyright(c) 2010-2017 Intel Corporation 444e97550SJiawen Wu */ 544e97550SJiawen Wu 644e97550SJiawen Wu #ifndef _NGBE_PHY_H_ 744e97550SJiawen Wu #define _NGBE_PHY_H_ 844e97550SJiawen Wu 944e97550SJiawen Wu #include "ngbe_type.h" 1044e97550SJiawen Wu #include "ngbe_phy_rtl.h" 1144e97550SJiawen Wu #include "ngbe_phy_mvl.h" 1244e97550SJiawen Wu #include "ngbe_phy_yt.h" 1344e97550SJiawen Wu 1444e97550SJiawen Wu /****************************************************************************** 1544e97550SJiawen Wu * PHY MDIO Registers: 1644e97550SJiawen Wu ******************************************************************************/ 1744e97550SJiawen Wu #define NGBE_MAX_PHY_ADDR 32 1844e97550SJiawen Wu 1944e97550SJiawen Wu /* (dev_type = 1) */ 2044e97550SJiawen Wu #define NGBE_MD_DEV_PMA_PMD 0x1 2144e97550SJiawen Wu #define NGBE_MD_PHY_ID_HIGH 0x2 /* PHY ID High Reg*/ 2244e97550SJiawen Wu #define NGBE_MD_PHY_ID_LOW 0x3 /* PHY ID Low Reg*/ 2344e97550SJiawen Wu #define NGBE_PHY_REVISION_MASK 0xFFFFFFF0 2444e97550SJiawen Wu 253d0af706SJiawen Wu #define NGBE_MII_AUTONEG_REG 0x0 263d0af706SJiawen Wu 2744e97550SJiawen Wu /* IEEE 802.3 Clause 22 */ 2844e97550SJiawen Wu struct mdi_reg_22 { 2944e97550SJiawen Wu u16 page; 3044e97550SJiawen Wu u16 addr; 3144e97550SJiawen Wu u16 device_type; 3244e97550SJiawen Wu }; 3344e97550SJiawen Wu typedef struct mdi_reg_22 mdi_reg_22_t; 3444e97550SJiawen Wu 3544e97550SJiawen Wu /* IEEE 802.3ae Clause 45 */ 3644e97550SJiawen Wu struct mdi_reg { 3744e97550SJiawen Wu u16 device_type; 3844e97550SJiawen Wu u16 addr; 3944e97550SJiawen Wu }; 4044e97550SJiawen Wu typedef struct mdi_reg mdi_reg_t; 4144e97550SJiawen Wu 4244e97550SJiawen Wu #define NGBE_MD22_PHY_ID_HIGH 0x2 /* PHY ID High Reg*/ 4344e97550SJiawen Wu #define NGBE_MD22_PHY_ID_LOW 0x3 /* PHY ID Low Reg*/ 4444e97550SJiawen Wu 45f40e9f0eSJiawen Wu #define NGBE_TAF_SYM_PAUSE 0x1 46f40e9f0eSJiawen Wu #define NGBE_TAF_ASM_PAUSE 0x2 47f40e9f0eSJiawen Wu 4844e97550SJiawen Wu s32 ngbe_mdi_map_register(mdi_reg_t *reg, mdi_reg_22_t *reg22); 4944e97550SJiawen Wu 5044e97550SJiawen Wu bool ngbe_validate_phy_addr(struct ngbe_hw *hw, u32 phy_addr); 51*1c44384fSJiawen Wu s32 ngbe_get_phy_type_from_id(struct ngbe_hw *hw); 5244e97550SJiawen Wu s32 ngbe_get_phy_id(struct ngbe_hw *hw); 5344e97550SJiawen Wu s32 ngbe_identify_phy(struct ngbe_hw *hw); 5444e97550SJiawen Wu s32 ngbe_reset_phy(struct ngbe_hw *hw); 5544e97550SJiawen Wu s32 ngbe_read_phy_reg_mdi(struct ngbe_hw *hw, u32 reg_addr, u32 device_type, 5644e97550SJiawen Wu u16 *phy_data); 5744e97550SJiawen Wu s32 ngbe_write_phy_reg_mdi(struct ngbe_hw *hw, u32 reg_addr, u32 device_type, 5844e97550SJiawen Wu u16 phy_data); 5944e97550SJiawen Wu s32 ngbe_read_phy_reg(struct ngbe_hw *hw, u32 reg_addr, 6044e97550SJiawen Wu u32 device_type, u16 *phy_data); 6144e97550SJiawen Wu s32 ngbe_write_phy_reg(struct ngbe_hw *hw, u32 reg_addr, 6244e97550SJiawen Wu u32 device_type, u16 phy_data); 6344e97550SJiawen Wu s32 ngbe_check_reset_blocked(struct ngbe_hw *hw); 6444e97550SJiawen Wu 6544e97550SJiawen Wu #endif /* _NGBE_PHY_H_ */ 66