xref: /dpdk/drivers/net/ngbe/base/ngbe_phy.h (revision 1c44384fce766ca45fc1fb81eea539944dbb6c88)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
3  * Copyright(c) 2010-2017 Intel Corporation
4  */
5 
6 #ifndef _NGBE_PHY_H_
7 #define _NGBE_PHY_H_
8 
9 #include "ngbe_type.h"
10 #include "ngbe_phy_rtl.h"
11 #include "ngbe_phy_mvl.h"
12 #include "ngbe_phy_yt.h"
13 
14 /******************************************************************************
15  * PHY MDIO Registers:
16  ******************************************************************************/
17 #define NGBE_MAX_PHY_ADDR		32
18 
19 /* (dev_type = 1) */
20 #define NGBE_MD_DEV_PMA_PMD		0x1
21 #define NGBE_MD_PHY_ID_HIGH		0x2 /* PHY ID High Reg*/
22 #define NGBE_MD_PHY_ID_LOW		0x3 /* PHY ID Low Reg*/
23 #define   NGBE_PHY_REVISION_MASK	0xFFFFFFF0
24 
25 #define NGBE_MII_AUTONEG_REG			0x0
26 
27 /* IEEE 802.3 Clause 22 */
28 struct mdi_reg_22 {
29 	u16 page;
30 	u16 addr;
31 	u16 device_type;
32 };
33 typedef struct mdi_reg_22 mdi_reg_22_t;
34 
35 /* IEEE 802.3ae Clause 45 */
36 struct mdi_reg {
37 	u16 device_type;
38 	u16 addr;
39 };
40 typedef struct mdi_reg mdi_reg_t;
41 
42 #define NGBE_MD22_PHY_ID_HIGH		0x2 /* PHY ID High Reg*/
43 #define NGBE_MD22_PHY_ID_LOW		0x3 /* PHY ID Low Reg*/
44 
45 #define NGBE_TAF_SYM_PAUSE		0x1
46 #define NGBE_TAF_ASM_PAUSE		0x2
47 
48 s32 ngbe_mdi_map_register(mdi_reg_t *reg, mdi_reg_22_t *reg22);
49 
50 bool ngbe_validate_phy_addr(struct ngbe_hw *hw, u32 phy_addr);
51 s32 ngbe_get_phy_type_from_id(struct ngbe_hw *hw);
52 s32 ngbe_get_phy_id(struct ngbe_hw *hw);
53 s32 ngbe_identify_phy(struct ngbe_hw *hw);
54 s32 ngbe_reset_phy(struct ngbe_hw *hw);
55 s32 ngbe_read_phy_reg_mdi(struct ngbe_hw *hw, u32 reg_addr, u32 device_type,
56 			   u16 *phy_data);
57 s32 ngbe_write_phy_reg_mdi(struct ngbe_hw *hw, u32 reg_addr, u32 device_type,
58 			    u16 phy_data);
59 s32 ngbe_read_phy_reg(struct ngbe_hw *hw, u32 reg_addr,
60 			       u32 device_type, u16 *phy_data);
61 s32 ngbe_write_phy_reg(struct ngbe_hw *hw, u32 reg_addr,
62 				u32 device_type, u16 phy_data);
63 s32 ngbe_check_reset_blocked(struct ngbe_hw *hw);
64 
65 #endif /* _NGBE_PHY_H_ */
66