1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2017 6WIND S.A. 3 * Copyright 2017 Mellanox Technologies, Ltd 4 */ 5 6 #ifndef RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ 7 #define RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ 8 9 #include <stdint.h> 10 #include <string.h> 11 #include <stdlib.h> 12 13 #include <rte_altivec.h> 14 15 #include <rte_mbuf.h> 16 #include <rte_mempool.h> 17 #include <rte_prefetch.h> 18 19 #include <mlx5_prm.h> 20 21 #include "mlx5_defs.h" 22 #include "mlx5.h" 23 #include "mlx5_utils.h" 24 #include "mlx5_rxtx.h" 25 #include "mlx5_rxtx_vec.h" 26 #include "mlx5_autoconf.h" 27 28 #ifndef __INTEL_COMPILER 29 #pragma GCC diagnostic ignored "-Wcast-qual" 30 #pragma GCC diagnostic ignored "-Wstrict-aliasing" 31 #endif 32 33 /** 34 * Store free buffers to RX SW ring. 35 * 36 * @param elts 37 * Pointer to SW ring to be filled. 38 * @param pkts 39 * Pointer to array of packets to be stored. 40 * @param pkts_n 41 * Number of packets to be stored. 42 */ 43 static inline void 44 rxq_copy_mbuf_v(struct rte_mbuf **elts, struct rte_mbuf **pkts, uint16_t n) 45 { 46 unsigned int pos; 47 uint16_t p = n & -2; 48 49 for (pos = 0; pos < p; pos += 2) { 50 __vector unsigned char mbp; 51 52 mbp = (__vector unsigned char)vec_vsx_ld(0, 53 (signed int const *)&elts[pos]); 54 *(__vector unsigned char *)&pkts[pos] = mbp; 55 } 56 if (n & 1) 57 pkts[pos] = elts[pos]; 58 } 59 60 /** 61 * Decompress a compressed completion and fill in mbufs in RX SW ring with data 62 * extracted from the title completion descriptor. 63 * 64 * @param rxq 65 * Pointer to RX queue structure. 66 * @param cq 67 * Pointer to completion array having a compressed completion at first. 68 * @param elts 69 * Pointer to SW ring to be filled. The first mbuf has to be pre-built from 70 * the title completion descriptor to be copied to the rest of mbufs. 71 * 72 * @return 73 * Number of mini-CQEs successfully decompressed. 74 */ 75 static inline uint16_t 76 rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 77 struct rte_mbuf **elts) 78 { 79 volatile struct mlx5_mini_cqe8 *mcq = 80 (void *)&(cq + !rxq->cqe_comp_layout)->pkt_info; 81 /* Title packet is pre-built. */ 82 struct rte_mbuf *t_pkt = rxq->cqe_comp_layout ? &rxq->title_pkt : elts[0]; 83 const __vector unsigned char zero = (__vector unsigned char){0}; 84 /* Mask to shuffle from extracted mini CQE to mbuf. */ 85 const __vector unsigned char shuf_mask1 = (__vector unsigned char){ 86 -1, -1, -1, -1, /* skip packet_type */ 87 7, 6, -1, -1, /* bswap16, pkt_len */ 88 7, 6, /* bswap16, data_len */ 89 -1, -1, /* skip vlan_tci */ 90 3, 2, 1, 0}; /* bswap32, rss */ 91 const __vector unsigned char shuf_mask2 = (__vector unsigned char){ 92 -1, -1, -1, -1, /* skip packet_type */ 93 15, 14, -1, -1, /* bswap16, pkt_len */ 94 15, 14, /* data_len, bswap16 */ 95 -1, -1, /* skip vlan_tci */ 96 11, 10, 9, 8}; /* bswap32, rss */ 97 /* Restore the compressed count. Must be 16 bits. */ 98 uint16_t mcqe_n = (rxq->cqe_comp_layout) ? 99 (MLX5_CQE_NUM_MINIS(cq->op_own) + 1) : 100 t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN); 101 uint16_t pkts_n = mcqe_n; 102 const __vector unsigned char rearm = 103 (__vector unsigned char)vec_vsx_ld(0, 104 (signed int const *)&t_pkt->rearm_data); 105 const __vector unsigned char rxdf = 106 (__vector unsigned char)vec_vsx_ld(0, 107 (signed int const *)&t_pkt->rx_descriptor_fields1); 108 const __vector unsigned char crc_adj = 109 (__vector unsigned char)(__vector unsigned short){ 110 0, 0, rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 111 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0}; 112 const __vector unsigned short rxdf_sel_mask = 113 (__vector unsigned short){ 114 0xffff, 0xffff, 0, 0, 0, 0xffff, 0, 0}; 115 __vector unsigned char ol_flags = (__vector unsigned char){0}; 116 __vector unsigned char ol_flags_mask = (__vector unsigned char){0}; 117 unsigned int pos; 118 unsigned int i; 119 unsigned int inv = 0; 120 121 #ifdef MLX5_PMD_SOFT_COUNTERS 122 const __vector unsigned char ones = vec_splat_u8(-1); 123 uint32_t rcvd_byte = 0; 124 /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */ 125 const __vector unsigned char len_shuf_mask = (__vector unsigned char){ 126 3, 2, 11, 10, 127 7, 6, 15, 14, 128 -1, -1, -1, -1, 129 -1, -1, -1, -1}; 130 #endif 131 132 /* 133 * A. load mCQEs into a 128bit register. 134 * B. store rearm data to mbuf. 135 * C. combine data from mCQEs with rx_descriptor_fields1. 136 * D. store rx_descriptor_fields1. 137 * E. store flow tag (rte_flow mark). 138 */ 139 cycle: 140 if (rxq->cqe_comp_layout) 141 rte_prefetch0((void *)(cq + mcqe_n)); 142 for (pos = 0; pos < mcqe_n; ) { 143 __vector unsigned char mcqe1, mcqe2; 144 __vector unsigned char rxdf1, rxdf2; 145 #ifdef MLX5_PMD_SOFT_COUNTERS 146 const __vector unsigned short mcqe_sel_mask = 147 (__vector unsigned short){0, 0, 0xffff, 0xffff, 148 0, 0, 0xfff, 0xffff}; 149 const __vector unsigned char lower_half = { 150 0, 1, 4, 5, 8, 9, 12, 13, 16, 151 17, 20, 21, 24, 25, 28, 29}; 152 const __vector unsigned char upper_half = { 153 2, 3, 6, 7, 10, 11, 14, 15, 154 18, 19, 22, 23, 26, 27, 30, 31}; 155 __vector unsigned short left, right; 156 __vector unsigned char byte_cnt, invalid_mask; 157 __vector unsigned long lshift; 158 __attribute__((altivec(vector__))) 159 __attribute__((altivec(bool__))) 160 unsigned long long shmask; 161 const __vector unsigned long shmax = {64, 64}; 162 #endif 163 164 if (!rxq->cqe_comp_layout) 165 for (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i) 166 if (likely(pos + i < mcqe_n)) 167 rte_prefetch0((void *)(cq + pos + i)); 168 /* A.1 load mCQEs into a 128bit register. */ 169 mcqe1 = (__vector unsigned char)vec_vsx_ld(0, 170 (signed int const *)&mcq[pos % 8]); 171 mcqe2 = (__vector unsigned char)vec_vsx_ld(0, 172 (signed int const *)&mcq[pos % 8 + 2]); 173 174 /* B.1 store rearm data to mbuf. */ 175 *(__vector unsigned char *) 176 &elts[pos]->rearm_data = rearm; 177 *(__vector unsigned char *) 178 &elts[pos + 1]->rearm_data = rearm; 179 180 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */ 181 rxdf1 = vec_perm(mcqe1, zero, shuf_mask1); 182 rxdf2 = vec_perm(mcqe1, zero, shuf_mask2); 183 rxdf1 = (__vector unsigned char) 184 ((__vector unsigned short)rxdf1 - 185 (__vector unsigned short)crc_adj); 186 rxdf2 = (__vector unsigned char) 187 ((__vector unsigned short)rxdf2 - 188 (__vector unsigned short)crc_adj); 189 rxdf1 = (__vector unsigned char) 190 vec_sel((__vector unsigned short)rxdf1, 191 (__vector unsigned short)rxdf, rxdf_sel_mask); 192 rxdf2 = (__vector unsigned char) 193 vec_sel((__vector unsigned short)rxdf2, 194 (__vector unsigned short)rxdf, rxdf_sel_mask); 195 196 /* D.1 store rx_descriptor_fields1. */ 197 *(__vector unsigned char *) 198 &elts[pos]->rx_descriptor_fields1 = rxdf1; 199 *(__vector unsigned char *) 200 &elts[pos + 1]->rx_descriptor_fields1 = rxdf2; 201 202 /* B.1 store rearm data to mbuf. */ 203 *(__vector unsigned char *) 204 &elts[pos + 2]->rearm_data = rearm; 205 *(__vector unsigned char *) 206 &elts[pos + 3]->rearm_data = rearm; 207 208 /* C.1 combine data from mCQEs with rx_descriptor_fields1. */ 209 rxdf1 = vec_perm(mcqe2, zero, shuf_mask1); 210 rxdf2 = vec_perm(mcqe2, zero, shuf_mask2); 211 rxdf1 = (__vector unsigned char) 212 ((__vector unsigned short)rxdf1 - 213 (__vector unsigned short)crc_adj); 214 rxdf2 = (__vector unsigned char) 215 ((__vector unsigned short)rxdf2 - 216 (__vector unsigned short)crc_adj); 217 rxdf1 = (__vector unsigned char) 218 vec_sel((__vector unsigned short)rxdf1, 219 (__vector unsigned short)rxdf, rxdf_sel_mask); 220 rxdf2 = (__vector unsigned char) 221 vec_sel((__vector unsigned short)rxdf2, 222 (__vector unsigned short)rxdf, rxdf_sel_mask); 223 224 /* D.1 store rx_descriptor_fields1. */ 225 *(__vector unsigned char *) 226 &elts[pos + 2]->rx_descriptor_fields1 = rxdf1; 227 *(__vector unsigned char *) 228 &elts[pos + 3]->rx_descriptor_fields1 = rxdf2; 229 230 #ifdef MLX5_PMD_SOFT_COUNTERS 231 invalid_mask = (__vector unsigned char)(__vector unsigned long){ 232 (mcqe_n - pos) * sizeof(uint16_t) * 8, 0}; 233 234 lshift = 235 vec_splat((__vector unsigned long)invalid_mask, 0); 236 shmask = vec_cmpgt(shmax, lshift); 237 invalid_mask = (__vector unsigned char) 238 vec_sl((__vector unsigned long)ones, lshift); 239 invalid_mask = (__vector unsigned char) 240 vec_sel((__vector unsigned long)shmask, 241 (__vector unsigned long)invalid_mask, shmask); 242 243 byte_cnt = (__vector unsigned char) 244 vec_sel((__vector unsigned short) 245 vec_sro((__vector unsigned short)mcqe1, 246 (__vector unsigned char){32}), 247 (__vector unsigned short)mcqe2, mcqe_sel_mask); 248 byte_cnt = vec_perm(byte_cnt, zero, len_shuf_mask); 249 byte_cnt = (__vector unsigned char) 250 vec_andc((__vector unsigned long)byte_cnt, 251 (__vector unsigned long)invalid_mask); 252 left = vec_perm((__vector unsigned short)byte_cnt, 253 (__vector unsigned short)zero, lower_half); 254 right = vec_perm((__vector unsigned short)byte_cnt, 255 (__vector unsigned short)zero, upper_half); 256 byte_cnt = (__vector unsigned char)vec_add(left, right); 257 left = vec_perm((__vector unsigned short)byte_cnt, 258 (__vector unsigned short)zero, lower_half); 259 right = vec_perm((__vector unsigned short)byte_cnt, 260 (__vector unsigned short)zero, upper_half); 261 byte_cnt = (__vector unsigned char)vec_add(left, right); 262 rcvd_byte += ((__vector unsigned long)byte_cnt)[0]; 263 #endif 264 265 if (rxq->mark) { 266 if (rxq->mcqe_format != 267 MLX5_CQE_RESP_FORMAT_FTAG_STRIDX) { 268 const uint32_t flow_tag = t_pkt->hash.fdir.hi; 269 270 /* E.1 store flow tag (rte_flow mark). */ 271 elts[pos]->hash.fdir.hi = flow_tag; 272 elts[pos + 1]->hash.fdir.hi = flow_tag; 273 elts[pos + 2]->hash.fdir.hi = flow_tag; 274 elts[pos + 3]->hash.fdir.hi = flow_tag; 275 } else { 276 const __vector unsigned char flow_mark_adj = 277 (__vector unsigned char) 278 (__vector unsigned int){ 279 -1, -1, -1, -1}; 280 const __vector unsigned char flow_mark_shuf = 281 (__vector unsigned char){ 282 -1, -1, -1, -1, 283 -1, -1, -1, -1, 284 12, 8, 9, -1, 285 4, 0, 1, -1}; 286 const __vector unsigned char ft_mask = 287 (__vector unsigned char) 288 (__vector unsigned int){ 289 0xffffff00, 0xffffff00, 290 0xffffff00, 0xffffff00}; 291 const __vector unsigned char fdir_flags = 292 (__vector unsigned char) 293 (__vector unsigned int){ 294 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR, 295 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR}; 296 const __vector unsigned char fdir_all_flags = 297 (__vector unsigned char) 298 (__vector unsigned int){ 299 RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID, 300 RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID, 301 RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID, 302 RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID}; 303 __vector unsigned char fdir_id_flags = 304 (__vector unsigned char) 305 (__vector unsigned int){ 306 RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID, 307 RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID}; 308 /* Extract flow_tag field. */ 309 __vector unsigned char ftag0 = vec_perm(mcqe1, 310 zero, flow_mark_shuf); 311 __vector unsigned char ftag1 = vec_perm(mcqe2, 312 zero, flow_mark_shuf); 313 __vector unsigned char ftag = 314 (__vector unsigned char) 315 vec_mergel((__vector unsigned int)ftag0, 316 (__vector unsigned int)ftag1); 317 __vector unsigned char invalid_mask = 318 (__vector unsigned char) 319 vec_cmpeq((__vector unsigned int)ftag, 320 (__vector unsigned int)zero); 321 322 ol_flags_mask = (__vector unsigned char) 323 vec_or((__vector unsigned long) 324 ol_flags_mask, 325 (__vector unsigned long)fdir_all_flags); 326 327 /* Set RTE_MBUF_F_RX_FDIR if flow tag is non-zero. */ 328 invalid_mask = (__vector unsigned char) 329 vec_cmpeq((__vector unsigned int)ftag, 330 (__vector unsigned int)zero); 331 ol_flags = (__vector unsigned char) 332 vec_or((__vector unsigned long)ol_flags, 333 (__vector unsigned long) 334 vec_andc((__vector unsigned long) 335 fdir_flags, 336 (__vector unsigned long)invalid_mask)); 337 ol_flags_mask = (__vector unsigned char) 338 vec_or((__vector unsigned long) 339 ol_flags_mask, 340 (__vector unsigned long)fdir_flags); 341 342 /* Mask out invalid entries. */ 343 fdir_id_flags = (__vector unsigned char) 344 vec_andc((__vector unsigned long) 345 fdir_id_flags, 346 (__vector unsigned long)invalid_mask); 347 348 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */ 349 ol_flags = (__vector unsigned char) 350 vec_or((__vector unsigned long)ol_flags, 351 (__vector unsigned long) 352 vec_andc((__vector unsigned long) 353 fdir_id_flags, 354 (__vector unsigned long) 355 vec_cmpeq((__vector unsigned int)ftag, 356 (__vector unsigned int)ft_mask))); 357 358 ftag = (__vector unsigned char) 359 ((__vector unsigned int)ftag + 360 (__vector unsigned int)flow_mark_adj); 361 elts[pos]->hash.fdir.hi = 362 ((__vector unsigned int)ftag)[0]; 363 elts[pos + 1]->hash.fdir.hi = 364 ((__vector unsigned int)ftag)[1]; 365 elts[pos + 2]->hash.fdir.hi = 366 ((__vector unsigned int)ftag)[2]; 367 elts[pos + 3]->hash.fdir.hi = 368 ((__vector unsigned int)ftag)[3]; 369 } 370 } 371 if (unlikely(rxq->mcqe_format != MLX5_CQE_RESP_FORMAT_HASH)) { 372 if (rxq->mcqe_format == 373 MLX5_CQE_RESP_FORMAT_L34H_STRIDX) { 374 const uint8_t pkt_info = 375 (cq->pkt_info & 0x3) << 6; 376 const uint8_t pkt_hdr0 = 377 mcq[pos % 8].hdr_type; 378 const uint8_t pkt_hdr1 = 379 mcq[pos % 8 + 1].hdr_type; 380 const uint8_t pkt_hdr2 = 381 mcq[pos % 8 + 2].hdr_type; 382 const uint8_t pkt_hdr3 = 383 mcq[pos % 8 + 3].hdr_type; 384 const __vector unsigned char vlan_mask = 385 (__vector unsigned char) 386 (__vector unsigned int) { 387 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 388 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 389 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 390 (RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED)}; 391 const __vector unsigned char cv_mask = 392 (__vector unsigned char) 393 (__vector unsigned int) { 394 MLX5_CQE_VLAN_STRIPPED, 395 MLX5_CQE_VLAN_STRIPPED, 396 MLX5_CQE_VLAN_STRIPPED, 397 MLX5_CQE_VLAN_STRIPPED}; 398 __vector unsigned char pkt_cv = 399 (__vector unsigned char) 400 (__vector unsigned int) { 401 pkt_hdr0 & 0x1, pkt_hdr1 & 0x1, 402 pkt_hdr2 & 0x1, pkt_hdr3 & 0x1}; 403 404 ol_flags_mask = (__vector unsigned char) 405 vec_or((__vector unsigned long) 406 ol_flags_mask, 407 (__vector unsigned long)vlan_mask); 408 ol_flags = (__vector unsigned char) 409 vec_or((__vector unsigned long)ol_flags, 410 (__vector unsigned long) 411 vec_and((__vector unsigned long)vlan_mask, 412 (__vector unsigned long) 413 vec_cmpeq((__vector unsigned int)pkt_cv, 414 (__vector unsigned int)cv_mask))); 415 elts[pos]->packet_type = 416 mlx5_ptype_table[(pkt_hdr0 >> 2) | 417 pkt_info]; 418 elts[pos + 1]->packet_type = 419 mlx5_ptype_table[(pkt_hdr1 >> 2) | 420 pkt_info]; 421 elts[pos + 2]->packet_type = 422 mlx5_ptype_table[(pkt_hdr2 >> 2) | 423 pkt_info]; 424 elts[pos + 3]->packet_type = 425 mlx5_ptype_table[(pkt_hdr3 >> 2) | 426 pkt_info]; 427 if (rxq->tunnel) { 428 elts[pos]->packet_type |= 429 !!(((pkt_hdr0 >> 2) | 430 pkt_info) & (1 << 6)); 431 elts[pos + 1]->packet_type |= 432 !!(((pkt_hdr1 >> 2) | 433 pkt_info) & (1 << 6)); 434 elts[pos + 2]->packet_type |= 435 !!(((pkt_hdr2 >> 2) | 436 pkt_info) & (1 << 6)); 437 elts[pos + 3]->packet_type |= 438 !!(((pkt_hdr3 >> 2) | 439 pkt_info) & (1 << 6)); 440 } 441 } 442 const __vector unsigned char hash_mask = 443 (__vector unsigned char)(__vector unsigned int) { 444 RTE_MBUF_F_RX_RSS_HASH, 445 RTE_MBUF_F_RX_RSS_HASH, 446 RTE_MBUF_F_RX_RSS_HASH, 447 RTE_MBUF_F_RX_RSS_HASH}; 448 const __vector unsigned char rearm_flags = 449 (__vector unsigned char)(__vector unsigned int) { 450 (uint32_t)t_pkt->ol_flags, 451 (uint32_t)t_pkt->ol_flags, 452 (uint32_t)t_pkt->ol_flags, 453 (uint32_t)t_pkt->ol_flags}; 454 455 ol_flags_mask = (__vector unsigned char) 456 vec_or((__vector unsigned long)ol_flags_mask, 457 (__vector unsigned long)hash_mask); 458 ol_flags = (__vector unsigned char) 459 vec_or((__vector unsigned long)ol_flags, 460 (__vector unsigned long) 461 vec_andc((__vector unsigned long)rearm_flags, 462 (__vector unsigned long)ol_flags_mask)); 463 464 elts[pos]->ol_flags = 465 ((__vector unsigned int)ol_flags)[0]; 466 elts[pos + 1]->ol_flags = 467 ((__vector unsigned int)ol_flags)[1]; 468 elts[pos + 2]->ol_flags = 469 ((__vector unsigned int)ol_flags)[2]; 470 elts[pos + 3]->ol_flags = 471 ((__vector unsigned int)ol_flags)[3]; 472 elts[pos]->hash.rss = 0; 473 elts[pos + 1]->hash.rss = 0; 474 elts[pos + 2]->hash.rss = 0; 475 elts[pos + 3]->hash.rss = 0; 476 } 477 if (rxq->dynf_meta) { 478 int32_t offs = rxq->flow_meta_offset; 479 const uint32_t meta = 480 *RTE_MBUF_DYNFIELD(t_pkt, offs, uint32_t *); 481 482 /* Check if title packet has valid metadata. */ 483 if (meta) { 484 MLX5_ASSERT(t_pkt->ol_flags & 485 rxq->flow_meta_mask); 486 *RTE_MBUF_DYNFIELD(elts[pos], offs, 487 uint32_t *) = meta; 488 *RTE_MBUF_DYNFIELD(elts[pos + 1], offs, 489 uint32_t *) = meta; 490 *RTE_MBUF_DYNFIELD(elts[pos + 2], offs, 491 uint32_t *) = meta; 492 *RTE_MBUF_DYNFIELD(elts[pos + 3], offs, 493 uint32_t *) = meta; 494 } 495 } 496 497 pos += MLX5_VPMD_DESCS_PER_LOOP; 498 /* Move to next CQE and invalidate consumed CQEs. */ 499 if (!rxq->cqe_comp_layout) { 500 if (!(pos & 0x7) && pos < mcqe_n) { 501 if (pos + 8 < mcqe_n) 502 rte_prefetch0((void *)(cq + pos + 8)); 503 mcq = (void *)&(cq + pos)->pkt_info; 504 for (i = 0; i < 8; ++i) 505 cq[inv++].op_own = MLX5_CQE_INVALIDATE; 506 } 507 } 508 } 509 510 if (rxq->cqe_comp_layout) { 511 int ret; 512 /* Keep unzipping if the next CQE is the miniCQE array. */ 513 cq = &cq[mcqe_n]; 514 ret = check_cqe_iteration(cq, rxq->cqe_n, rxq->cq_ci + pkts_n); 515 if (ret == MLX5_CQE_STATUS_SW_OWN && 516 MLX5_CQE_FORMAT(cq->op_own) == MLX5_COMPRESSED) { 517 pos = 0; 518 elts = &elts[mcqe_n]; 519 mcq = (void *)cq; 520 mcqe_n = MLX5_CQE_NUM_MINIS(cq->op_own) + 1; 521 pkts_n += mcqe_n; 522 goto cycle; 523 } 524 } else { 525 /* Invalidate the rest of CQEs. */ 526 for (; inv < pkts_n; ++inv) 527 cq[inv].op_own = MLX5_CQE_INVALIDATE; 528 } 529 530 #ifdef MLX5_PMD_SOFT_COUNTERS 531 rxq->stats.ipackets += pkts_n; 532 rxq->stats.ibytes += rcvd_byte; 533 #endif 534 535 return pkts_n; 536 } 537 538 /** 539 * Calculate packet type and offload flag for mbuf and store it. 540 * 541 * @param rxq 542 * Pointer to RX queue structure. 543 * @param cqes[4] 544 * Array of four 16bytes completions extracted from the original completion 545 * descriptor. 546 * @param op_err 547 * Opcode vector having responder error status. Each field is 4B. 548 * @param pkts 549 * Pointer to array of packets to be filled. 550 */ 551 static inline void 552 rxq_cq_to_ptype_oflags_v(struct mlx5_rxq_data *rxq, 553 __vector unsigned char cqes[4], __vector unsigned char op_err, 554 struct rte_mbuf **pkts) 555 { 556 __vector unsigned char pinfo0, pinfo1; 557 __vector unsigned char pinfo, ptype; 558 __vector unsigned char ol_flags = (__vector unsigned char) 559 (__vector unsigned int){ 560 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 561 rxq->hw_timestamp * rxq->timestamp_rx_flag, 562 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 563 rxq->hw_timestamp * rxq->timestamp_rx_flag, 564 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 565 rxq->hw_timestamp * rxq->timestamp_rx_flag, 566 rxq->rss_hash * RTE_MBUF_F_RX_RSS_HASH | 567 rxq->hw_timestamp * rxq->timestamp_rx_flag}; 568 __vector unsigned char cv_flags; 569 const __vector unsigned char zero = (__vector unsigned char){0}; 570 const __vector unsigned char ptype_mask = 571 (__vector unsigned char)(__vector unsigned int){ 572 0x0000fd06, 0x0000fd06, 0x0000fd06, 0x0000fd06}; 573 const __vector unsigned char ptype_ol_mask = 574 (__vector unsigned char)(__vector unsigned int){ 575 0x00000106, 0x00000106, 0x00000106, 0x00000106}; 576 const __vector unsigned char pinfo_mask = 577 (__vector unsigned char)(__vector unsigned int){ 578 0x00000003, 0x00000003, 0x00000003, 0x00000003}; 579 const __vector unsigned char cv_flag_sel = (__vector unsigned char){ 580 0, (uint8_t)(RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED), 581 (uint8_t)(RTE_MBUF_F_RX_IP_CKSUM_GOOD >> 1), 0, 582 (uint8_t)(RTE_MBUF_F_RX_L4_CKSUM_GOOD >> 1), 0, 583 (uint8_t)((RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD) >> 1), 584 0, 0, 0, 0, 0, 0, 0, 0, 0}; 585 const __vector unsigned char cv_mask = 586 (__vector unsigned char)(__vector unsigned int){ 587 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 588 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 589 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 590 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 591 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 592 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 593 RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD | 594 RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED}; 595 const __vector unsigned char mbuf_init = 596 (__vector unsigned char)vec_vsx_ld 597 (0, (__vector unsigned char *)&rxq->mbuf_initializer); 598 const __vector unsigned short rearm_sel_mask = 599 (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0}; 600 __vector unsigned char rearm0, rearm1, rearm2, rearm3; 601 uint8_t pt_idx0, pt_idx1, pt_idx2, pt_idx3; 602 603 /* Extract pkt_info field. */ 604 pinfo0 = (__vector unsigned char) 605 vec_mergeh((__vector unsigned int)cqes[0], 606 (__vector unsigned int)cqes[1]); 607 pinfo1 = (__vector unsigned char) 608 vec_mergeh((__vector unsigned int)cqes[2], 609 (__vector unsigned int)cqes[3]); 610 pinfo = (__vector unsigned char) 611 vec_mergeh((__vector unsigned long)pinfo0, 612 (__vector unsigned long)pinfo1); 613 614 /* Extract hdr_type_etc field. */ 615 pinfo0 = (__vector unsigned char) 616 vec_mergel((__vector unsigned int)cqes[0], 617 (__vector unsigned int)cqes[1]); 618 pinfo1 = (__vector unsigned char) 619 vec_mergel((__vector unsigned int)cqes[2], 620 (__vector unsigned int)cqes[3]); 621 ptype = (__vector unsigned char) 622 vec_mergeh((__vector unsigned long)pinfo0, 623 (__vector unsigned long)pinfo1); 624 625 if (rxq->mark) { 626 const __vector unsigned char pinfo_ft_mask = 627 (__vector unsigned char)(__vector unsigned int){ 628 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00}; 629 const __vector unsigned char fdir_flags = 630 (__vector unsigned char)(__vector unsigned int){ 631 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR, 632 RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_FDIR}; 633 __vector unsigned char fdir_id_flags = 634 (__vector unsigned char)(__vector unsigned int){ 635 RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID, 636 RTE_MBUF_F_RX_FDIR_ID, RTE_MBUF_F_RX_FDIR_ID}; 637 __vector unsigned char flow_tag, invalid_mask; 638 639 flow_tag = (__vector unsigned char) 640 vec_and((__vector unsigned long)pinfo, 641 (__vector unsigned long)pinfo_ft_mask); 642 643 /* Check if flow tag is non-zero then set RTE_MBUF_F_RX_FDIR. */ 644 invalid_mask = (__vector unsigned char) 645 vec_cmpeq((__vector unsigned int)flow_tag, 646 (__vector unsigned int)zero); 647 ol_flags = (__vector unsigned char) 648 vec_or((__vector unsigned long)ol_flags, 649 (__vector unsigned long) 650 vec_andc((__vector unsigned long)fdir_flags, 651 (__vector unsigned long)invalid_mask)); 652 653 /* Mask out invalid entries. */ 654 fdir_id_flags = (__vector unsigned char) 655 vec_andc((__vector unsigned long)fdir_id_flags, 656 (__vector unsigned long)invalid_mask); 657 658 /* Check if flow tag MLX5_FLOW_MARK_DEFAULT. */ 659 ol_flags = (__vector unsigned char) 660 vec_or((__vector unsigned long)ol_flags, 661 (__vector unsigned long) 662 vec_andc((__vector unsigned long)fdir_id_flags, 663 (__vector unsigned long) 664 vec_cmpeq((__vector unsigned int)flow_tag, 665 (__vector unsigned int)pinfo_ft_mask))); 666 } 667 /* 668 * Merge the two fields to generate the following: 669 * bit[1] = l3_ok 670 * bit[2] = l4_ok 671 * bit[8] = cv 672 * bit[11:10] = l3_hdr_type 673 * bit[14:12] = l4_hdr_type 674 * bit[15] = ip_frag 675 * bit[16] = tunneled 676 * bit[17] = outer_l3_type 677 */ 678 ptype = (__vector unsigned char) 679 vec_and((__vector unsigned long)ptype, 680 (__vector unsigned long)ptype_mask); 681 pinfo = (__vector unsigned char) 682 vec_and((__vector unsigned long)pinfo, 683 (__vector unsigned long)pinfo_mask); 684 pinfo = (__vector unsigned char) 685 vec_sl((__vector unsigned int)pinfo, 686 (__vector unsigned int){16, 16, 16, 16}); 687 688 /* Make pinfo has merged fields for ol_flags calculation. */ 689 pinfo = (__vector unsigned char) 690 vec_or((__vector unsigned long)ptype, 691 (__vector unsigned long)pinfo); 692 ptype = (__vector unsigned char) 693 vec_sr((__vector unsigned int)pinfo, 694 (__vector unsigned int){10, 10, 10, 10}); 695 ptype = (__vector unsigned char) 696 vec_packs((__vector unsigned int)ptype, 697 (__vector unsigned int)zero); 698 699 /* Errored packets will have RTE_PTYPE_ALL_MASK. */ 700 op_err = (__vector unsigned char) 701 vec_sr((__vector unsigned short)op_err, 702 (__vector unsigned short){8, 8, 8, 8, 8, 8, 8, 8}); 703 ptype = (__vector unsigned char) 704 vec_or((__vector unsigned long)ptype, 705 (__vector unsigned long)op_err); 706 707 pt_idx0 = (uint8_t)((__vector unsigned char)ptype)[0]; 708 pt_idx1 = (uint8_t)((__vector unsigned char)ptype)[2]; 709 pt_idx2 = (uint8_t)((__vector unsigned char)ptype)[4]; 710 pt_idx3 = (uint8_t)((__vector unsigned char)ptype)[6]; 711 712 pkts[0]->packet_type = mlx5_ptype_table[pt_idx0] | 713 !!(pt_idx0 & (1 << 6)) * rxq->tunnel; 714 pkts[1]->packet_type = mlx5_ptype_table[pt_idx1] | 715 !!(pt_idx1 & (1 << 6)) * rxq->tunnel; 716 pkts[2]->packet_type = mlx5_ptype_table[pt_idx2] | 717 !!(pt_idx2 & (1 << 6)) * rxq->tunnel; 718 pkts[3]->packet_type = mlx5_ptype_table[pt_idx3] | 719 !!(pt_idx3 & (1 << 6)) * rxq->tunnel; 720 721 /* Fill flags for checksum and VLAN. */ 722 pinfo = (__vector unsigned char) 723 vec_and((__vector unsigned long)pinfo, 724 (__vector unsigned long)ptype_ol_mask); 725 pinfo = vec_perm(cv_flag_sel, zero, pinfo); 726 727 /* Locate checksum flags at byte[2:1] and merge with VLAN flags. */ 728 cv_flags = (__vector unsigned char) 729 vec_sl((__vector unsigned int)pinfo, 730 (__vector unsigned int){9, 9, 9, 9}); 731 cv_flags = (__vector unsigned char) 732 vec_or((__vector unsigned long)pinfo, 733 (__vector unsigned long)cv_flags); 734 735 /* Move back flags to start from byte[0]. */ 736 cv_flags = (__vector unsigned char) 737 vec_sr((__vector unsigned int)cv_flags, 738 (__vector unsigned int){8, 8, 8, 8}); 739 740 /* Mask out garbage bits. */ 741 cv_flags = (__vector unsigned char) 742 vec_and((__vector unsigned long)cv_flags, 743 (__vector unsigned long)cv_mask); 744 745 /* Merge to ol_flags. */ 746 ol_flags = (__vector unsigned char) 747 vec_or((__vector unsigned long)ol_flags, 748 (__vector unsigned long)cv_flags); 749 750 /* Merge mbuf_init and ol_flags. */ 751 rearm0 = (__vector unsigned char) 752 vec_sel((__vector unsigned short)mbuf_init, 753 (__vector unsigned short) 754 vec_slo((__vector unsigned short)ol_flags, 755 (__vector unsigned char){64}), rearm_sel_mask); 756 rearm1 = (__vector unsigned char) 757 vec_sel((__vector unsigned short)mbuf_init, 758 (__vector unsigned short) 759 vec_slo((__vector unsigned short)ol_flags, 760 (__vector unsigned char){32}), rearm_sel_mask); 761 rearm2 = (__vector unsigned char) 762 vec_sel((__vector unsigned short)mbuf_init, 763 (__vector unsigned short)ol_flags, rearm_sel_mask); 764 rearm3 = (__vector unsigned char) 765 vec_sel((__vector unsigned short)mbuf_init, 766 (__vector unsigned short) 767 vec_sro((__vector unsigned short)ol_flags, 768 (__vector unsigned char){32}), rearm_sel_mask); 769 770 /* Write 8B rearm_data and 8B ol_flags. */ 771 vec_vsx_st(rearm0, 0, 772 (__vector unsigned char *)&pkts[0]->rearm_data); 773 vec_vsx_st(rearm1, 0, 774 (__vector unsigned char *)&pkts[1]->rearm_data); 775 vec_vsx_st(rearm2, 0, 776 (__vector unsigned char *)&pkts[2]->rearm_data); 777 vec_vsx_st(rearm3, 0, 778 (__vector unsigned char *)&pkts[3]->rearm_data); 779 } 780 781 /** 782 * Process a non-compressed completion and fill in mbufs in RX SW ring 783 * with data extracted from the title completion descriptor. 784 * 785 * @param rxq 786 * Pointer to RX queue structure. 787 * @param cq 788 * Pointer to completion array having a non-compressed completion at first. 789 * @param elts 790 * Pointer to SW ring to be filled. The first mbuf has to be pre-built from 791 * the title completion descriptor to be copied to the rest of mbufs. 792 * @param[out] pkts 793 * Array to store received packets. 794 * @param pkts_n 795 * Maximum number of packets in array. 796 * @param[out] err 797 * Pointer to a flag. Set non-zero value if pkts array has at least one error 798 * packet to handle. 799 * @param[out] comp 800 * Pointer to a index. Set it to the first compressed completion if any. 801 * 802 * @return 803 * Number of CQEs successfully processed. 804 */ 805 static inline uint16_t 806 rxq_cq_process_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq, 807 struct rte_mbuf **elts, struct rte_mbuf **pkts, 808 uint16_t pkts_n, uint64_t *err, uint64_t *comp) 809 { 810 const uint16_t q_n = 1 << rxq->cqe_n; 811 const uint16_t q_mask = q_n - 1; 812 unsigned int pos, adj; 813 uint64_t n = 0; 814 uint64_t comp_idx = MLX5_VPMD_DESCS_PER_LOOP; 815 uint16_t nocmp_n = 0; 816 const uint8_t vic = rxq->cq_ci >> rxq->cqe_n; 817 unsigned int own = !(rxq->cq_ci & (q_mask + 1)); 818 const __vector unsigned char zero = (__vector unsigned char){0}; 819 const __vector unsigned char ones = vec_splat_u8(-1); 820 const __vector unsigned char vic_check = 821 (__vector unsigned char)(__vector unsigned long){ 822 0x00ff000000ff0000LL, 0x00ff000000ff0000LL}; 823 const __vector unsigned char owner_check = 824 (__vector unsigned char)(__vector unsigned long){ 825 0x0100000001000000LL, 0x0100000001000000LL}; 826 const __vector unsigned char opcode_check = 827 (__vector unsigned char)(__vector unsigned long){ 828 0xf0000000f0000000LL, 0xf0000000f0000000LL}; 829 const __vector unsigned char format_check = 830 (__vector unsigned char)(__vector unsigned long){ 831 0x0c0000000c000000LL, 0x0c0000000c000000LL}; 832 const __vector unsigned char resp_err_check = 833 (__vector unsigned char)(__vector unsigned long){ 834 0xe0000000e0000000LL, 0xe0000000e0000000LL}; 835 #ifdef MLX5_PMD_SOFT_COUNTERS 836 uint32_t rcvd_byte = 0; 837 /* Mask to shuffle byte_cnt to add up stats. Do bswap16 for all. */ 838 const __vector unsigned char len_shuf_mask = (__vector unsigned char){ 839 1, 0, 5, 4, 840 9, 8, 13, 12, 841 -1, -1, -1, -1, 842 -1, -1, -1, -1}; 843 #endif 844 /* Mask to shuffle from extracted CQE to mbuf. */ 845 const __vector unsigned char shuf_mask = (__vector unsigned char){ 846 5, 4, /* bswap16, pkt_len */ 847 -1, -1, /* zero out 2nd half of pkt_len */ 848 5, 4, /* bswap16, data_len */ 849 11, 10, /* bswap16, vlan+tci */ 850 15, 14, 13, 12, /* bswap32, rss */ 851 1, 2, 3, -1}; /* fdir.hi */ 852 /* Mask to blend from the last Qword to the first DQword. */ 853 /* Mask to blend from the last Qword to the first DQword. */ 854 const __vector unsigned char blend_mask = (__vector unsigned char){ 855 -1, 0, 0, 0, 856 0, 0, 0, 0, 857 -1, -1, -1, -1, 858 -1, -1, -1, -1}; 859 const __vector unsigned char crc_adj = 860 (__vector unsigned char)(__vector unsigned short){ 861 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 862 rxq->crc_present * RTE_ETHER_CRC_LEN, 0, 0, 0, 0, 0}; 863 const __vector unsigned char flow_mark_adj = 864 (__vector unsigned char)(__vector unsigned int){ 865 0, 0, 0, rxq->mark * (-1)}; 866 const __vector unsigned short cqe_sel_mask1 = 867 (__vector unsigned short){0, 0, 0, 0, 0xffff, 0xffff, 0, 0}; 868 const __vector unsigned short cqe_sel_mask2 = 869 (__vector unsigned short){0, 0, 0xffff, 0, 0, 0, 0, 0}; 870 const __vector unsigned char validity = (__vector unsigned char){ 871 0, 0, vic, 0, 872 0, 0, vic, 0, 873 0, 0, vic, 0, 874 0, 0, vic, 0}; 875 const __vector unsigned char ownership = (__vector unsigned char){ 876 0, 0, 0, own, 877 0, 0, 0, own, 878 0, 0, 0, own, 879 0, 0, 0, own}; 880 /* 881 * A. load first Qword (8bytes) in one loop. 882 * B. copy 4 mbuf pointers from elts ring to returning pkts. 883 * C. load remaining CQE data and extract necessary fields. 884 * Final 16bytes cqes[] extracted from original 64bytes CQE has the 885 * following structure: 886 * struct { 887 * uint8_t pkt_info; 888 * uint8_t flow_tag[3]; 889 * uint16_t byte_cnt; 890 * uint8_t validity_iteration_count; 891 * uint8_t op_own; 892 * uint16_t hdr_type_etc; 893 * uint16_t vlan_info; 894 * uint32_t rx_has_res; 895 * } c; 896 * D. fill in mbuf. 897 * E. get valid CQEs. 898 * F. find compressed CQE. 899 */ 900 for (pos = 0; 901 pos < pkts_n; 902 pos += MLX5_VPMD_DESCS_PER_LOOP) { 903 __vector unsigned char cqes[MLX5_VPMD_DESCS_PER_LOOP]; 904 __vector unsigned char cqe_tmp1, cqe_tmp2; 905 __vector unsigned char pkt_mb0, pkt_mb1, pkt_mb2, pkt_mb3; 906 __vector unsigned char op_own, op_own_tmp1, op_own_tmp2; 907 __vector unsigned char opcode, owner_mask, invalid_mask; 908 __vector unsigned char comp_mask, mini_mask; 909 __vector unsigned char mask; 910 #ifdef MLX5_PMD_SOFT_COUNTERS 911 const __vector unsigned char lower_half = { 912 0, 1, 4, 5, 8, 9, 12, 13, 913 16, 17, 20, 21, 24, 25, 28, 29}; 914 const __vector unsigned char upper_half = { 915 2, 3, 6, 7, 10, 11, 14, 15, 916 18, 19, 22, 23, 26, 27, 30, 31}; 917 const __vector unsigned long shmax = {64, 64}; 918 __vector unsigned char byte_cnt; 919 __vector unsigned short left, right; 920 __vector unsigned long lshift; 921 __vector __attribute__((altivec(bool__))) 922 unsigned long shmask; 923 #endif 924 __vector unsigned char mbp1, mbp2; 925 __vector unsigned char p = 926 (__vector unsigned char)(__vector unsigned short){ 927 0, 1, 2, 3, 0, 0, 0, 0}; 928 unsigned int p1, p2, p3; 929 930 /* Prefetch next 4 CQEs. */ 931 if (pkts_n - pos >= 2 * MLX5_VPMD_DESCS_PER_LOOP) { 932 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP]); 933 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 1]); 934 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 2]); 935 rte_prefetch0(&cq[pos + MLX5_VPMD_DESCS_PER_LOOP + 3]); 936 } 937 938 /* A.0 do not cross the end of CQ. */ 939 mask = (__vector unsigned char)(__vector unsigned long){ 940 (pkts_n - pos) * sizeof(uint16_t) * 8, 0}; 941 942 { 943 __vector unsigned long lshift; 944 __vector __attribute__((altivec(bool__))) 945 unsigned long shmask; 946 const __vector unsigned long shmax = {64, 64}; 947 948 lshift = vec_splat((__vector unsigned long)mask, 0); 949 shmask = vec_cmpgt(shmax, lshift); 950 mask = (__vector unsigned char) 951 vec_sl((__vector unsigned long)ones, lshift); 952 mask = (__vector unsigned char) 953 vec_sel((__vector unsigned long)shmask, 954 (__vector unsigned long)mask, shmask); 955 } 956 957 p = (__vector unsigned char) 958 vec_andc((__vector unsigned long)p, 959 (__vector unsigned long)mask); 960 961 /* A.1 load cqes. */ 962 p3 = (unsigned int)((__vector unsigned short)p)[3]; 963 cqes[3] = (__vector unsigned char)(__vector unsigned long){ 964 *(__rte_aligned(8) unsigned long *) 965 &cq[pos + p3].sop_drop_qpn, 0LL}; 966 rte_compiler_barrier(); 967 968 p2 = (unsigned int)((__vector unsigned short)p)[2]; 969 cqes[2] = (__vector unsigned char)(__vector unsigned long){ 970 *(__rte_aligned(8) unsigned long *) 971 &cq[pos + p2].sop_drop_qpn, 0LL}; 972 rte_compiler_barrier(); 973 974 /* B.1 load mbuf pointers. */ 975 mbp1 = (__vector unsigned char)vec_vsx_ld(0, 976 (signed int const *)&elts[pos]); 977 mbp2 = (__vector unsigned char)vec_vsx_ld(0, 978 (signed int const *)&elts[pos + 2]); 979 980 /* A.1 load a block having op_own. */ 981 p1 = (unsigned int)((__vector unsigned short)p)[1]; 982 cqes[1] = (__vector unsigned char)(__vector unsigned long){ 983 *(__rte_aligned(8) unsigned long *) 984 &cq[pos + p1].sop_drop_qpn, 0LL}; 985 rte_compiler_barrier(); 986 987 cqes[0] = (__vector unsigned char)(__vector unsigned long){ 988 *(__rte_aligned(8) unsigned long *) 989 &cq[pos].sop_drop_qpn, 0LL}; 990 rte_compiler_barrier(); 991 992 /* B.2 copy mbuf pointers. */ 993 *(__vector unsigned char *)&pkts[pos] = mbp1; 994 *(__vector unsigned char *)&pkts[pos + 2] = mbp2; 995 rte_io_rmb(); 996 997 /* C.1 load remaining CQE data and extract necessary fields. */ 998 cqe_tmp2 = *(__vector unsigned char *) 999 &cq[pos + p3].pkt_info; 1000 cqe_tmp1 = *(__vector unsigned char *) 1001 &cq[pos + p2].pkt_info; 1002 cqes[3] = vec_sel(cqes[3], cqe_tmp2, blend_mask); 1003 cqes[2] = vec_sel(cqes[2], cqe_tmp1, blend_mask); 1004 cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0, 1005 (signed int const *)&cq[pos + p3].csum); 1006 cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0, 1007 (signed int const *)&cq[pos + p2].csum); 1008 cqes[3] = (__vector unsigned char) 1009 vec_sel((__vector unsigned short)cqes[3], 1010 (__vector unsigned short)cqe_tmp2, cqe_sel_mask1); 1011 cqes[2] = (__vector unsigned char) 1012 vec_sel((__vector unsigned short)cqes[2], 1013 (__vector unsigned short)cqe_tmp1, cqe_sel_mask1); 1014 cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){ 1015 *(__rte_aligned(8) unsigned long *) 1016 &cq[pos + p3].rsvd4[2], 0LL}; 1017 cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){ 1018 *(__rte_aligned(8) unsigned long *) 1019 &cq[pos + p2].rsvd4[2], 0LL}; 1020 cqes[3] = (__vector unsigned char) 1021 vec_sel((__vector unsigned short)cqes[3], 1022 (__vector unsigned short)cqe_tmp2, 1023 (__vector unsigned short)cqe_sel_mask2); 1024 cqes[2] = (__vector unsigned char) 1025 vec_sel((__vector unsigned short)cqes[2], 1026 (__vector unsigned short)cqe_tmp1, 1027 (__vector unsigned short)cqe_sel_mask2); 1028 1029 /* C.2 generate final structure for mbuf with swapping bytes. */ 1030 pkt_mb3 = vec_perm(cqes[3], zero, shuf_mask); 1031 pkt_mb2 = vec_perm(cqes[2], zero, shuf_mask); 1032 1033 /* C.3 adjust CRC length. */ 1034 pkt_mb3 = (__vector unsigned char) 1035 ((__vector unsigned short)pkt_mb3 - 1036 (__vector unsigned short)crc_adj); 1037 pkt_mb2 = (__vector unsigned char) 1038 ((__vector unsigned short)pkt_mb2 - 1039 (__vector unsigned short)crc_adj); 1040 1041 /* C.4 adjust flow mark. */ 1042 pkt_mb3 = (__vector unsigned char) 1043 ((__vector unsigned int)pkt_mb3 + 1044 (__vector unsigned int)flow_mark_adj); 1045 pkt_mb2 = (__vector unsigned char) 1046 ((__vector unsigned int)pkt_mb2 + 1047 (__vector unsigned int)flow_mark_adj); 1048 1049 /* D.1 fill in mbuf - rx_descriptor_fields1. */ 1050 *(__vector unsigned char *) 1051 &pkts[pos + 3]->pkt_len = pkt_mb3; 1052 *(__vector unsigned char *) 1053 &pkts[pos + 2]->pkt_len = pkt_mb2; 1054 1055 /* E.1 extract op_own field. */ 1056 op_own_tmp2 = (__vector unsigned char) 1057 vec_mergeh((__vector unsigned int)cqes[2], 1058 (__vector unsigned int)cqes[3]); 1059 1060 /* C.1 load remaining CQE data and extract necessary fields. */ 1061 cqe_tmp2 = *(__vector unsigned char *) 1062 &cq[pos + p1].pkt_info; 1063 cqe_tmp1 = *(__vector unsigned char *) 1064 &cq[pos].pkt_info; 1065 cqes[1] = vec_sel(cqes[1], cqe_tmp2, blend_mask); 1066 cqes[0] = vec_sel(cqes[0], cqe_tmp2, blend_mask); 1067 cqe_tmp2 = (__vector unsigned char)vec_vsx_ld(0, 1068 (signed int const *)&cq[pos + p1].csum); 1069 cqe_tmp1 = (__vector unsigned char)vec_vsx_ld(0, 1070 (signed int const *)&cq[pos].csum); 1071 cqes[1] = (__vector unsigned char) 1072 vec_sel((__vector unsigned short)cqes[1], 1073 (__vector unsigned short)cqe_tmp2, cqe_sel_mask1); 1074 cqes[0] = (__vector unsigned char) 1075 vec_sel((__vector unsigned short)cqes[0], 1076 (__vector unsigned short)cqe_tmp1, cqe_sel_mask1); 1077 cqe_tmp2 = (__vector unsigned char)(__vector unsigned long){ 1078 *(__rte_aligned(8) unsigned long *) 1079 &cq[pos + p1].rsvd4[2], 0LL}; 1080 cqe_tmp1 = (__vector unsigned char)(__vector unsigned long){ 1081 *(__rte_aligned(8) unsigned long *) 1082 &cq[pos].rsvd4[2], 0LL}; 1083 cqes[1] = (__vector unsigned char) 1084 vec_sel((__vector unsigned short)cqes[1], 1085 (__vector unsigned short)cqe_tmp2, cqe_sel_mask2); 1086 cqes[0] = (__vector unsigned char) 1087 vec_sel((__vector unsigned short)cqes[0], 1088 (__vector unsigned short)cqe_tmp1, cqe_sel_mask2); 1089 1090 /* C.2 generate final structure for mbuf with swapping bytes. */ 1091 pkt_mb1 = vec_perm(cqes[1], zero, shuf_mask); 1092 pkt_mb0 = vec_perm(cqes[0], zero, shuf_mask); 1093 1094 /* C.3 adjust CRC length. */ 1095 pkt_mb1 = (__vector unsigned char) 1096 ((__vector unsigned short)pkt_mb1 - 1097 (__vector unsigned short)crc_adj); 1098 pkt_mb0 = (__vector unsigned char) 1099 ((__vector unsigned short)pkt_mb0 - 1100 (__vector unsigned short)crc_adj); 1101 1102 /* C.4 adjust flow mark. */ 1103 pkt_mb1 = (__vector unsigned char) 1104 ((__vector unsigned int)pkt_mb1 + 1105 (__vector unsigned int)flow_mark_adj); 1106 pkt_mb0 = (__vector unsigned char) 1107 ((__vector unsigned int)pkt_mb0 + 1108 (__vector unsigned int)flow_mark_adj); 1109 1110 /* E.1 extract op_own byte. */ 1111 op_own_tmp1 = (__vector unsigned char) 1112 vec_mergeh((__vector unsigned int)cqes[0], 1113 (__vector unsigned int)cqes[1]); 1114 op_own = (__vector unsigned char) 1115 vec_mergel((__vector unsigned long)op_own_tmp1, 1116 (__vector unsigned long)op_own_tmp2); 1117 1118 /* D.1 fill in mbuf - rx_descriptor_fields1. */ 1119 *(__vector unsigned char *) 1120 &pkts[pos + 1]->pkt_len = pkt_mb1; 1121 *(__vector unsigned char *) 1122 &pkts[pos]->pkt_len = pkt_mb0; 1123 1124 /* E.2 mask out CQEs belonging to HW. */ 1125 if (rxq->cqe_comp_layout) { 1126 owner_mask = (__vector unsigned char) 1127 vec_and((__vector unsigned long)op_own, 1128 (__vector unsigned long)vic_check); 1129 owner_mask = (__vector unsigned char) 1130 vec_cmpeq((__vector unsigned int)owner_mask, 1131 (__vector unsigned int)validity); 1132 owner_mask = (__vector unsigned char) 1133 vec_xor((__vector unsigned long)owner_mask, 1134 (__vector unsigned long)ones); 1135 } else { 1136 owner_mask = (__vector unsigned char) 1137 vec_and((__vector unsigned long)op_own, 1138 (__vector unsigned long)owner_check); 1139 owner_mask = (__vector unsigned char) 1140 vec_cmpeq((__vector unsigned int)owner_mask, 1141 (__vector unsigned int)ownership); 1142 } 1143 owner_mask = (__vector unsigned char) 1144 vec_packs((__vector unsigned int)owner_mask, 1145 (__vector unsigned int)zero); 1146 1147 /* E.3 get mask for invalidated CQEs. */ 1148 opcode = (__vector unsigned char) 1149 vec_and((__vector unsigned long)op_own, 1150 (__vector unsigned long)opcode_check); 1151 invalid_mask = (__vector unsigned char) 1152 vec_cmpeq((__vector unsigned int)opcode_check, 1153 (__vector unsigned int)opcode); 1154 invalid_mask = (__vector unsigned char) 1155 vec_packs((__vector unsigned int)invalid_mask, 1156 (__vector unsigned int)zero); 1157 1158 /* E.4 mask out beyond boundary. */ 1159 invalid_mask = (__vector unsigned char) 1160 vec_or((__vector unsigned long)invalid_mask, 1161 (__vector unsigned long)mask); 1162 1163 /* E.5 merge invalid_mask with invalid owner. */ 1164 invalid_mask = (__vector unsigned char) 1165 vec_or((__vector unsigned long)invalid_mask, 1166 (__vector unsigned long)owner_mask); 1167 1168 /* F.1 find compressed CQE format. */ 1169 comp_mask = (__vector unsigned char) 1170 vec_and((__vector unsigned long)op_own, 1171 (__vector unsigned long)format_check); 1172 comp_mask = (__vector unsigned char) 1173 vec_cmpeq((__vector unsigned int)comp_mask, 1174 (__vector unsigned int)format_check); 1175 comp_mask = (__vector unsigned char) 1176 vec_packs((__vector unsigned int)comp_mask, 1177 (__vector unsigned int)zero); 1178 1179 /* F.2 mask out invalid entries. */ 1180 comp_mask = (__vector unsigned char) 1181 vec_andc((__vector unsigned long)comp_mask, 1182 (__vector unsigned long)invalid_mask); 1183 comp_idx = ((__vector unsigned long)comp_mask)[0]; 1184 1185 /* F.3 get the first compressed CQE. */ 1186 comp_idx = comp_idx ? __builtin_ctzll(comp_idx) / 1187 (sizeof(uint16_t) * 8) : MLX5_VPMD_DESCS_PER_LOOP; 1188 1189 /* E.6 mask out entries after the compressed CQE. */ 1190 mask = (__vector unsigned char)(__vector unsigned long){ 1191 (comp_idx * sizeof(uint16_t) * 8), 0}; 1192 lshift = vec_splat((__vector unsigned long)mask, 0); 1193 shmask = vec_cmpgt(shmax, lshift); 1194 mask = (__vector unsigned char) 1195 vec_sl((__vector unsigned long)ones, lshift); 1196 mask = (__vector unsigned char) 1197 vec_sel((__vector unsigned long)shmask, 1198 (__vector unsigned long)mask, shmask); 1199 invalid_mask = (__vector unsigned char) 1200 vec_or((__vector unsigned long)invalid_mask, 1201 (__vector unsigned long)mask); 1202 1203 /* E.7 count non-compressed valid CQEs. */ 1204 n = ((__vector unsigned long)invalid_mask)[0]; 1205 n = n ? __builtin_ctzll(n) / (sizeof(uint16_t) * 8) : 1206 MLX5_VPMD_DESCS_PER_LOOP; 1207 nocmp_n += n; 1208 1209 /* D.2 get the final invalid mask. */ 1210 mask = (__vector unsigned char)(__vector unsigned long){ 1211 (n * sizeof(uint16_t) * 8), 0}; 1212 lshift = vec_splat((__vector unsigned long)mask, 0); 1213 shmask = vec_cmpgt(shmax, lshift); 1214 mask = (__vector unsigned char) 1215 vec_sl((__vector unsigned long)ones, lshift); 1216 mask = (__vector unsigned char) 1217 vec_sel((__vector unsigned long)shmask, 1218 (__vector unsigned long)mask, shmask); 1219 invalid_mask = (__vector unsigned char) 1220 vec_or((__vector unsigned long)invalid_mask, 1221 (__vector unsigned long)mask); 1222 1223 /* D.3 check error in opcode. */ 1224 adj = (!rxq->cqe_comp_layout && 1225 comp_idx != MLX5_VPMD_DESCS_PER_LOOP && comp_idx == n); 1226 mask = (__vector unsigned char)(__vector unsigned long){ 1227 (adj * sizeof(uint16_t) * 8), 0}; 1228 lshift = vec_splat((__vector unsigned long)mask, 0); 1229 shmask = vec_cmpgt(shmax, lshift); 1230 mini_mask = (__vector unsigned char) 1231 vec_sl((__vector unsigned long)invalid_mask, lshift); 1232 mini_mask = (__vector unsigned char) 1233 vec_sel((__vector unsigned long)shmask, 1234 (__vector unsigned long)mini_mask, shmask); 1235 opcode = (__vector unsigned char) 1236 vec_cmpeq((__vector unsigned int)resp_err_check, 1237 (__vector unsigned int)opcode); 1238 opcode = (__vector unsigned char) 1239 vec_packs((__vector unsigned int)opcode, 1240 (__vector unsigned int)zero); 1241 opcode = (__vector unsigned char) 1242 vec_andc((__vector unsigned long)opcode, 1243 (__vector unsigned long)mini_mask); 1244 1245 /* D.4 mark if any error is set */ 1246 *err |= ((__vector unsigned long)opcode)[0]; 1247 1248 /* D.5 fill in mbuf - rearm_data and packet_type. */ 1249 rxq_cq_to_ptype_oflags_v(rxq, cqes, opcode, &pkts[pos]); 1250 if (unlikely(rxq->shared)) { 1251 pkts[pos]->port = cq[pos].user_index_low; 1252 pkts[pos + p1]->port = cq[pos + p1].user_index_low; 1253 pkts[pos + p2]->port = cq[pos + p2].user_index_low; 1254 pkts[pos + p3]->port = cq[pos + p3].user_index_low; 1255 } 1256 if (rxq->hw_timestamp) { 1257 int offset = rxq->timestamp_offset; 1258 if (rxq->rt_timestamp) { 1259 struct mlx5_dev_ctx_shared *sh = rxq->sh; 1260 uint64_t ts; 1261 1262 ts = rte_be_to_cpu_64(cq[pos].timestamp); 1263 mlx5_timestamp_set(pkts[pos], offset, 1264 mlx5_txpp_convert_rx_ts(sh, ts)); 1265 ts = rte_be_to_cpu_64(cq[pos + p1].timestamp); 1266 mlx5_timestamp_set(pkts[pos + 1], offset, 1267 mlx5_txpp_convert_rx_ts(sh, ts)); 1268 ts = rte_be_to_cpu_64(cq[pos + p2].timestamp); 1269 mlx5_timestamp_set(pkts[pos + 2], offset, 1270 mlx5_txpp_convert_rx_ts(sh, ts)); 1271 ts = rte_be_to_cpu_64(cq[pos + p3].timestamp); 1272 mlx5_timestamp_set(pkts[pos + 3], offset, 1273 mlx5_txpp_convert_rx_ts(sh, ts)); 1274 } else { 1275 mlx5_timestamp_set(pkts[pos], offset, 1276 rte_be_to_cpu_64(cq[pos].timestamp)); 1277 mlx5_timestamp_set(pkts[pos + 1], offset, 1278 rte_be_to_cpu_64(cq[pos + p1].timestamp)); 1279 mlx5_timestamp_set(pkts[pos + 2], offset, 1280 rte_be_to_cpu_64(cq[pos + p2].timestamp)); 1281 mlx5_timestamp_set(pkts[pos + 3], offset, 1282 rte_be_to_cpu_64(cq[pos + p3].timestamp)); 1283 } 1284 } 1285 if (rxq->dynf_meta) { 1286 uint64_t flag = rxq->flow_meta_mask; 1287 int32_t offs = rxq->flow_meta_offset; 1288 uint32_t mask = rxq->flow_meta_port_mask; 1289 uint32_t metadata; 1290 1291 /* This code is subject for further optimization. */ 1292 metadata = rte_be_to_cpu_32 1293 (cq[pos].flow_table_metadata) & mask; 1294 *RTE_MBUF_DYNFIELD(pkts[pos], offs, uint32_t *) = 1295 metadata; 1296 pkts[pos]->ol_flags |= metadata ? flag : 0ULL; 1297 metadata = rte_be_to_cpu_32 1298 (cq[pos + 1].flow_table_metadata) & mask; 1299 *RTE_MBUF_DYNFIELD(pkts[pos + 1], offs, uint32_t *) = 1300 metadata; 1301 pkts[pos + 1]->ol_flags |= metadata ? flag : 0ULL; 1302 metadata = rte_be_to_cpu_32 1303 (cq[pos + 2].flow_table_metadata) & mask; 1304 *RTE_MBUF_DYNFIELD(pkts[pos + 2], offs, uint32_t *) = 1305 metadata; 1306 pkts[pos + 2]->ol_flags |= metadata ? flag : 0ULL; 1307 metadata = rte_be_to_cpu_32 1308 (cq[pos + 3].flow_table_metadata) & mask; 1309 *RTE_MBUF_DYNFIELD(pkts[pos + 3], offs, uint32_t *) = 1310 metadata; 1311 pkts[pos + 3]->ol_flags |= metadata ? flag : 0ULL; 1312 } 1313 #ifdef MLX5_PMD_SOFT_COUNTERS 1314 /* Add up received bytes count. */ 1315 byte_cnt = vec_perm(op_own, zero, len_shuf_mask); 1316 byte_cnt = (__vector unsigned char) 1317 vec_andc((__vector unsigned long)byte_cnt, 1318 (__vector unsigned long)invalid_mask); 1319 left = vec_perm((__vector unsigned short)byte_cnt, 1320 (__vector unsigned short)zero, lower_half); 1321 right = vec_perm((__vector unsigned short)byte_cnt, 1322 (__vector unsigned short)zero, upper_half); 1323 byte_cnt = (__vector unsigned char)vec_add(left, right); 1324 left = vec_perm((__vector unsigned short)byte_cnt, 1325 (__vector unsigned short)zero, lower_half); 1326 right = vec_perm((__vector unsigned short)byte_cnt, 1327 (__vector unsigned short)zero, upper_half); 1328 byte_cnt = (__vector unsigned char)vec_add(left, right); 1329 rcvd_byte += ((__vector unsigned long)byte_cnt)[0]; 1330 #endif 1331 1332 /* 1333 * Break the loop unless more valid CQE is expected, or if 1334 * there's a compressed CQE. 1335 */ 1336 if (n != MLX5_VPMD_DESCS_PER_LOOP) 1337 break; 1338 } 1339 #ifdef MLX5_PMD_SOFT_COUNTERS 1340 rxq->stats.ipackets += nocmp_n; 1341 rxq->stats.ibytes += rcvd_byte; 1342 #endif 1343 if (comp_idx == n) 1344 *comp = comp_idx; 1345 return nocmp_n; 1346 } 1347 1348 #endif /* RTE_PMD_MLX5_RXTX_VEC_ALTIVEC_H_ */ 1349