1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2017 6WIND S.A. 3 * Copyright 2017 Mellanox Technologies, Ltd 4 */ 5 6 #ifndef RTE_PMD_MLX5_RXTX_VEC_H_ 7 #define RTE_PMD_MLX5_RXTX_VEC_H_ 8 9 #include <rte_common.h> 10 #include <rte_mbuf.h> 11 12 #include <mlx5_prm.h> 13 14 #include "mlx5_autoconf.h" 15 #include "mlx5_mr.h" 16 17 /* HW checksum offload capabilities of vectorized Tx. */ 18 #define MLX5_VEC_TX_CKSUM_OFFLOAD_CAP \ 19 (DEV_TX_OFFLOAD_IPV4_CKSUM | \ 20 DEV_TX_OFFLOAD_UDP_CKSUM | \ 21 DEV_TX_OFFLOAD_TCP_CKSUM | \ 22 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) 23 24 /* 25 * Compile time sanity check for vectorized functions. 26 */ 27 28 #define S_ASSERT_RTE_MBUF(s) \ 29 static_assert(s, "A field of struct rte_mbuf is changed") 30 #define S_ASSERT_MLX5_CQE(s) \ 31 static_assert(s, "A field of struct mlx5_cqe is changed") 32 33 /* rxq_cq_decompress_v() */ 34 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, pkt_len) == 35 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); 36 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, data_len) == 37 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); 38 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, hash) == 39 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12); 40 41 /* rxq_cq_to_ptype_oflags_v() */ 42 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, ol_flags) == 43 offsetof(struct rte_mbuf, rearm_data) + 8); 44 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, rearm_data) == 45 RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16)); 46 47 /* rxq_burst_v() */ 48 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, pkt_len) == 49 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); 50 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, data_len) == 51 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); 52 #if (RTE_CACHE_LINE_SIZE == 128) 53 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, pkt_info) == 64); 54 #else 55 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, pkt_info) == 0); 56 #endif 57 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rx_hash_res) == 58 offsetof(struct mlx5_cqe, pkt_info) + 12); 59 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rsvd1) + 11 == 60 offsetof(struct mlx5_cqe, hdr_type_etc)); 61 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, vlan_info) == 62 offsetof(struct mlx5_cqe, hdr_type_etc) + 2); 63 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, lro_num_seg) + 12 == 64 offsetof(struct mlx5_cqe, byte_cnt)); 65 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, sop_drop_qpn) == 66 RTE_ALIGN(offsetof(struct mlx5_cqe, sop_drop_qpn), 8)); 67 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, op_own) == 68 offsetof(struct mlx5_cqe, sop_drop_qpn) + 7); 69 70 #endif /* RTE_PMD_MLX5_RXTX_VEC_H_ */ 71