1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2017 6WIND S.A. 3 * Copyright 2017 Mellanox Technologies, Ltd 4 */ 5 6 #ifndef RTE_PMD_MLX5_RXTX_VEC_H_ 7 #define RTE_PMD_MLX5_RXTX_VEC_H_ 8 9 #include <rte_common.h> 10 #include <rte_mbuf.h> 11 12 #include <mlx5_prm.h> 13 14 #include "mlx5_autoconf.h" 15 16 /* HW checksum offload capabilities of vectorized Tx. */ 17 #define MLX5_VEC_TX_CKSUM_OFFLOAD_CAP \ 18 (RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | \ 19 RTE_ETH_TX_OFFLOAD_UDP_CKSUM | \ 20 RTE_ETH_TX_OFFLOAD_TCP_CKSUM | \ 21 RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM) 22 23 /* 24 * Compile time sanity check for vectorized functions. 25 */ 26 27 #define S_ASSERT_RTE_MBUF(s) \ 28 static_assert(s, "A field of struct rte_mbuf is changed") 29 #define S_ASSERT_MLX5_CQE(s) \ 30 static_assert(s, "A field of struct mlx5_cqe is changed") 31 32 /* rxq_cq_decompress_v() */ 33 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, pkt_len) == 34 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); 35 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, data_len) == 36 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); 37 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, hash) == 38 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12); 39 40 /* rxq_cq_to_ptype_oflags_v() */ 41 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, ol_flags) == 42 offsetof(struct rte_mbuf, rearm_data) + 8); 43 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, rearm_data) == 44 RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16)); 45 46 /* rxq_burst_v() */ 47 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, pkt_len) == 48 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); 49 S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, data_len) == 50 offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); 51 #if (RTE_CACHE_LINE_SIZE == 128) 52 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, pkt_info) == 64); 53 #else 54 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, pkt_info) == 0); 55 #endif 56 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rx_hash_res) == 57 offsetof(struct mlx5_cqe, pkt_info) + 12); 58 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, rsvd1) + 11 == 59 offsetof(struct mlx5_cqe, hdr_type_etc)); 60 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, vlan_info) == 61 offsetof(struct mlx5_cqe, hdr_type_etc) + 2); 62 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, lro_num_seg) + 12 == 63 offsetof(struct mlx5_cqe, byte_cnt)); 64 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, sop_drop_qpn) == 65 RTE_ALIGN(offsetof(struct mlx5_cqe, sop_drop_qpn), 8)); 66 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, op_own) == 67 offsetof(struct mlx5_cqe, sop_drop_qpn) + 7); 68 69 #endif /* RTE_PMD_MLX5_RXTX_VEC_H_ */ 70