1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 #include <stdbool.h> 12 13 #include <rte_common.h> 14 #include <rte_ether.h> 15 #include <rte_ethdev_driver.h> 16 #include <rte_eal_paging.h> 17 #include <rte_flow.h> 18 #include <rte_cycles.h> 19 #include <rte_flow_driver.h> 20 #include <rte_malloc.h> 21 #include <rte_ip.h> 22 23 #include <mlx5_glue.h> 24 #include <mlx5_devx_cmds.h> 25 #include <mlx5_prm.h> 26 #include <mlx5_malloc.h> 27 28 #include "mlx5_defs.h" 29 #include "mlx5.h" 30 #include "mlx5_flow.h" 31 #include "mlx5_flow_os.h" 32 #include "mlx5_rxtx.h" 33 #include "mlx5_common_os.h" 34 #include "rte_pmd_mlx5.h" 35 36 static struct mlx5_flow_tunnel * 37 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 38 static void 39 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 40 static const struct mlx5_flow_tbl_data_entry * 41 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark); 42 static int 43 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 44 const struct rte_flow_tunnel *app_tunnel, 45 struct mlx5_flow_tunnel **tunnel); 46 47 48 /** Device flow drivers. */ 49 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 50 51 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 52 53 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 54 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 55 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 56 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 57 #endif 58 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 59 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 60 }; 61 62 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 63 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 64 (const int []){ \ 65 __VA_ARGS__, 0, \ 66 } 67 68 /** Node object of input graph for mlx5_flow_expand_rss(). */ 69 struct mlx5_flow_expand_node { 70 const int *const next; 71 /**< 72 * List of next node indexes. Index 0 is interpreted as a terminator. 73 */ 74 const enum rte_flow_item_type type; 75 /**< Pattern item type of current node. */ 76 uint64_t rss_types; 77 /**< 78 * RSS types bit-field associated with this node 79 * (see ETH_RSS_* definitions). 80 */ 81 }; 82 83 /** Object returned by mlx5_flow_expand_rss(). */ 84 struct mlx5_flow_expand_rss { 85 uint32_t entries; 86 /**< Number of entries @p patterns and @p priorities. */ 87 struct { 88 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 89 uint32_t priority; /**< Priority offset for each expansion. */ 90 } entry[]; 91 }; 92 93 static enum rte_flow_item_type 94 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 95 { 96 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 97 uint16_t ether_type = 0; 98 uint16_t ether_type_m; 99 uint8_t ip_next_proto = 0; 100 uint8_t ip_next_proto_m; 101 102 if (item == NULL || item->spec == NULL) 103 return ret; 104 switch (item->type) { 105 case RTE_FLOW_ITEM_TYPE_ETH: 106 if (item->mask) 107 ether_type_m = ((const struct rte_flow_item_eth *) 108 (item->mask))->type; 109 else 110 ether_type_m = rte_flow_item_eth_mask.type; 111 if (ether_type_m != RTE_BE16(0xFFFF)) 112 break; 113 ether_type = ((const struct rte_flow_item_eth *) 114 (item->spec))->type; 115 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 116 ret = RTE_FLOW_ITEM_TYPE_IPV4; 117 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 118 ret = RTE_FLOW_ITEM_TYPE_IPV6; 119 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 120 ret = RTE_FLOW_ITEM_TYPE_VLAN; 121 else 122 ret = RTE_FLOW_ITEM_TYPE_END; 123 break; 124 case RTE_FLOW_ITEM_TYPE_VLAN: 125 if (item->mask) 126 ether_type_m = ((const struct rte_flow_item_vlan *) 127 (item->mask))->inner_type; 128 else 129 ether_type_m = rte_flow_item_vlan_mask.inner_type; 130 if (ether_type_m != RTE_BE16(0xFFFF)) 131 break; 132 ether_type = ((const struct rte_flow_item_vlan *) 133 (item->spec))->inner_type; 134 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 135 ret = RTE_FLOW_ITEM_TYPE_IPV4; 136 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 137 ret = RTE_FLOW_ITEM_TYPE_IPV6; 138 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 139 ret = RTE_FLOW_ITEM_TYPE_VLAN; 140 else 141 ret = RTE_FLOW_ITEM_TYPE_END; 142 break; 143 case RTE_FLOW_ITEM_TYPE_IPV4: 144 if (item->mask) 145 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 146 (item->mask))->hdr.next_proto_id; 147 else 148 ip_next_proto_m = 149 rte_flow_item_ipv4_mask.hdr.next_proto_id; 150 if (ip_next_proto_m != 0xFF) 151 break; 152 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 153 (item->spec))->hdr.next_proto_id; 154 if (ip_next_proto == IPPROTO_UDP) 155 ret = RTE_FLOW_ITEM_TYPE_UDP; 156 else if (ip_next_proto == IPPROTO_TCP) 157 ret = RTE_FLOW_ITEM_TYPE_TCP; 158 else if (ip_next_proto == IPPROTO_IP) 159 ret = RTE_FLOW_ITEM_TYPE_IPV4; 160 else if (ip_next_proto == IPPROTO_IPV6) 161 ret = RTE_FLOW_ITEM_TYPE_IPV6; 162 else 163 ret = RTE_FLOW_ITEM_TYPE_END; 164 break; 165 case RTE_FLOW_ITEM_TYPE_IPV6: 166 if (item->mask) 167 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 168 (item->mask))->hdr.proto; 169 else 170 ip_next_proto_m = 171 rte_flow_item_ipv6_mask.hdr.proto; 172 if (ip_next_proto_m != 0xFF) 173 break; 174 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 175 (item->spec))->hdr.proto; 176 if (ip_next_proto == IPPROTO_UDP) 177 ret = RTE_FLOW_ITEM_TYPE_UDP; 178 else if (ip_next_proto == IPPROTO_TCP) 179 ret = RTE_FLOW_ITEM_TYPE_TCP; 180 else if (ip_next_proto == IPPROTO_IP) 181 ret = RTE_FLOW_ITEM_TYPE_IPV4; 182 else if (ip_next_proto == IPPROTO_IPV6) 183 ret = RTE_FLOW_ITEM_TYPE_IPV6; 184 else 185 ret = RTE_FLOW_ITEM_TYPE_END; 186 break; 187 default: 188 ret = RTE_FLOW_ITEM_TYPE_VOID; 189 break; 190 } 191 return ret; 192 } 193 194 /** 195 * Expand RSS flows into several possible flows according to the RSS hash 196 * fields requested and the driver capabilities. 197 * 198 * @param[out] buf 199 * Buffer to store the result expansion. 200 * @param[in] size 201 * Buffer size in bytes. If 0, @p buf can be NULL. 202 * @param[in] pattern 203 * User flow pattern. 204 * @param[in] types 205 * RSS types to expand (see ETH_RSS_* definitions). 206 * @param[in] graph 207 * Input graph to expand @p pattern according to @p types. 208 * @param[in] graph_root_index 209 * Index of root node in @p graph, typically 0. 210 * 211 * @return 212 * A positive value representing the size of @p buf in bytes regardless of 213 * @p size on success, a negative errno value otherwise and rte_errno is 214 * set, the following errors are defined: 215 * 216 * -E2BIG: graph-depth @p graph is too deep. 217 */ 218 static int 219 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 220 const struct rte_flow_item *pattern, uint64_t types, 221 const struct mlx5_flow_expand_node graph[], 222 int graph_root_index) 223 { 224 const int elt_n = 8; 225 const struct rte_flow_item *item; 226 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 227 const int *next_node; 228 const int *stack[elt_n]; 229 int stack_pos = 0; 230 struct rte_flow_item flow_items[elt_n]; 231 unsigned int i; 232 size_t lsize; 233 size_t user_pattern_size = 0; 234 void *addr = NULL; 235 const struct mlx5_flow_expand_node *next = NULL; 236 struct rte_flow_item missed_item; 237 int missed = 0; 238 int elt = 0; 239 const struct rte_flow_item *last_item = NULL; 240 241 memset(&missed_item, 0, sizeof(missed_item)); 242 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 243 elt_n * sizeof(buf->entry[0]); 244 if (lsize <= size) { 245 buf->entry[0].priority = 0; 246 buf->entry[0].pattern = (void *)&buf->entry[elt_n]; 247 buf->entries = 0; 248 addr = buf->entry[0].pattern; 249 } 250 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 251 if (item->type != RTE_FLOW_ITEM_TYPE_VOID) 252 last_item = item; 253 for (i = 0; node->next && node->next[i]; ++i) { 254 next = &graph[node->next[i]]; 255 if (next->type == item->type) 256 break; 257 } 258 if (next) 259 node = next; 260 user_pattern_size += sizeof(*item); 261 } 262 user_pattern_size += sizeof(*item); /* Handle END item. */ 263 lsize += user_pattern_size; 264 /* Copy the user pattern in the first entry of the buffer. */ 265 if (lsize <= size) { 266 rte_memcpy(addr, pattern, user_pattern_size); 267 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 268 buf->entries = 1; 269 } 270 /* Start expanding. */ 271 memset(flow_items, 0, sizeof(flow_items)); 272 user_pattern_size -= sizeof(*item); 273 /* 274 * Check if the last valid item has spec set, need complete pattern, 275 * and the pattern can be used for expansion. 276 */ 277 missed_item.type = mlx5_flow_expand_rss_item_complete(last_item); 278 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 279 /* Item type END indicates expansion is not required. */ 280 return lsize; 281 } 282 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 283 next = NULL; 284 missed = 1; 285 for (i = 0; node->next && node->next[i]; ++i) { 286 next = &graph[node->next[i]]; 287 if (next->type == missed_item.type) { 288 flow_items[0].type = missed_item.type; 289 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 290 break; 291 } 292 next = NULL; 293 } 294 } 295 if (next && missed) { 296 elt = 2; /* missed item + item end. */ 297 node = next; 298 lsize += elt * sizeof(*item) + user_pattern_size; 299 if ((node->rss_types & types) && lsize <= size) { 300 buf->entry[buf->entries].priority = 1; 301 buf->entry[buf->entries].pattern = addr; 302 buf->entries++; 303 rte_memcpy(addr, buf->entry[0].pattern, 304 user_pattern_size); 305 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 306 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 307 addr = (void *)(((uintptr_t)addr) + 308 elt * sizeof(*item)); 309 } 310 } 311 memset(flow_items, 0, sizeof(flow_items)); 312 next_node = node->next; 313 stack[stack_pos] = next_node; 314 node = next_node ? &graph[*next_node] : NULL; 315 while (node) { 316 flow_items[stack_pos].type = node->type; 317 if (node->rss_types & types) { 318 /* 319 * compute the number of items to copy from the 320 * expansion and copy it. 321 * When the stack_pos is 0, there are 1 element in it, 322 * plus the addition END item. 323 */ 324 elt = stack_pos + 2; 325 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 326 lsize += elt * sizeof(*item) + user_pattern_size; 327 if (lsize <= size) { 328 size_t n = elt * sizeof(*item); 329 330 buf->entry[buf->entries].priority = 331 stack_pos + 1 + missed; 332 buf->entry[buf->entries].pattern = addr; 333 buf->entries++; 334 rte_memcpy(addr, buf->entry[0].pattern, 335 user_pattern_size); 336 addr = (void *)(((uintptr_t)addr) + 337 user_pattern_size); 338 rte_memcpy(addr, &missed_item, 339 missed * sizeof(*item)); 340 addr = (void *)(((uintptr_t)addr) + 341 missed * sizeof(*item)); 342 rte_memcpy(addr, flow_items, n); 343 addr = (void *)(((uintptr_t)addr) + n); 344 } 345 } 346 /* Go deeper. */ 347 if (node->next) { 348 next_node = node->next; 349 if (stack_pos++ == elt_n) { 350 rte_errno = E2BIG; 351 return -rte_errno; 352 } 353 stack[stack_pos] = next_node; 354 } else if (*(next_node + 1)) { 355 /* Follow up with the next possibility. */ 356 ++next_node; 357 } else { 358 /* Move to the next path. */ 359 if (stack_pos) 360 next_node = stack[--stack_pos]; 361 next_node++; 362 stack[stack_pos] = next_node; 363 } 364 node = *next_node ? &graph[*next_node] : NULL; 365 }; 366 /* no expanded flows but we have missed item, create one rule for it */ 367 if (buf->entries == 1 && missed != 0) { 368 elt = 2; 369 lsize += elt * sizeof(*item) + user_pattern_size; 370 if (lsize <= size) { 371 buf->entry[buf->entries].priority = 1; 372 buf->entry[buf->entries].pattern = addr; 373 buf->entries++; 374 flow_items[0].type = missed_item.type; 375 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 376 rte_memcpy(addr, buf->entry[0].pattern, 377 user_pattern_size); 378 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 379 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 380 addr = (void *)(((uintptr_t)addr) + 381 elt * sizeof(*item)); 382 } 383 } 384 return lsize; 385 } 386 387 enum mlx5_expansion { 388 MLX5_EXPANSION_ROOT, 389 MLX5_EXPANSION_ROOT_OUTER, 390 MLX5_EXPANSION_ROOT_ETH_VLAN, 391 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 392 MLX5_EXPANSION_OUTER_ETH, 393 MLX5_EXPANSION_OUTER_ETH_VLAN, 394 MLX5_EXPANSION_OUTER_VLAN, 395 MLX5_EXPANSION_OUTER_IPV4, 396 MLX5_EXPANSION_OUTER_IPV4_UDP, 397 MLX5_EXPANSION_OUTER_IPV4_TCP, 398 MLX5_EXPANSION_OUTER_IPV6, 399 MLX5_EXPANSION_OUTER_IPV6_UDP, 400 MLX5_EXPANSION_OUTER_IPV6_TCP, 401 MLX5_EXPANSION_VXLAN, 402 MLX5_EXPANSION_VXLAN_GPE, 403 MLX5_EXPANSION_GRE, 404 MLX5_EXPANSION_MPLS, 405 MLX5_EXPANSION_ETH, 406 MLX5_EXPANSION_ETH_VLAN, 407 MLX5_EXPANSION_VLAN, 408 MLX5_EXPANSION_IPV4, 409 MLX5_EXPANSION_IPV4_UDP, 410 MLX5_EXPANSION_IPV4_TCP, 411 MLX5_EXPANSION_IPV6, 412 MLX5_EXPANSION_IPV6_UDP, 413 MLX5_EXPANSION_IPV6_TCP, 414 }; 415 416 /** Supported expansion of items. */ 417 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 418 [MLX5_EXPANSION_ROOT] = { 419 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 420 MLX5_EXPANSION_IPV4, 421 MLX5_EXPANSION_IPV6), 422 .type = RTE_FLOW_ITEM_TYPE_END, 423 }, 424 [MLX5_EXPANSION_ROOT_OUTER] = { 425 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 426 MLX5_EXPANSION_OUTER_IPV4, 427 MLX5_EXPANSION_OUTER_IPV6), 428 .type = RTE_FLOW_ITEM_TYPE_END, 429 }, 430 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 431 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 432 .type = RTE_FLOW_ITEM_TYPE_END, 433 }, 434 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 435 .next = MLX5_FLOW_EXPAND_RSS_NEXT 436 (MLX5_EXPANSION_OUTER_ETH_VLAN), 437 .type = RTE_FLOW_ITEM_TYPE_END, 438 }, 439 [MLX5_EXPANSION_OUTER_ETH] = { 440 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 441 MLX5_EXPANSION_OUTER_IPV6, 442 MLX5_EXPANSION_MPLS), 443 .type = RTE_FLOW_ITEM_TYPE_ETH, 444 .rss_types = 0, 445 }, 446 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 447 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 448 .type = RTE_FLOW_ITEM_TYPE_ETH, 449 .rss_types = 0, 450 }, 451 [MLX5_EXPANSION_OUTER_VLAN] = { 452 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 453 MLX5_EXPANSION_OUTER_IPV6), 454 .type = RTE_FLOW_ITEM_TYPE_VLAN, 455 }, 456 [MLX5_EXPANSION_OUTER_IPV4] = { 457 .next = MLX5_FLOW_EXPAND_RSS_NEXT 458 (MLX5_EXPANSION_OUTER_IPV4_UDP, 459 MLX5_EXPANSION_OUTER_IPV4_TCP, 460 MLX5_EXPANSION_GRE, 461 MLX5_EXPANSION_IPV4, 462 MLX5_EXPANSION_IPV6), 463 .type = RTE_FLOW_ITEM_TYPE_IPV4, 464 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 465 ETH_RSS_NONFRAG_IPV4_OTHER, 466 }, 467 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 468 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 469 MLX5_EXPANSION_VXLAN_GPE), 470 .type = RTE_FLOW_ITEM_TYPE_UDP, 471 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 472 }, 473 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 474 .type = RTE_FLOW_ITEM_TYPE_TCP, 475 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 476 }, 477 [MLX5_EXPANSION_OUTER_IPV6] = { 478 .next = MLX5_FLOW_EXPAND_RSS_NEXT 479 (MLX5_EXPANSION_OUTER_IPV6_UDP, 480 MLX5_EXPANSION_OUTER_IPV6_TCP, 481 MLX5_EXPANSION_IPV4, 482 MLX5_EXPANSION_IPV6), 483 .type = RTE_FLOW_ITEM_TYPE_IPV6, 484 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 485 ETH_RSS_NONFRAG_IPV6_OTHER, 486 }, 487 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 488 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 489 MLX5_EXPANSION_VXLAN_GPE), 490 .type = RTE_FLOW_ITEM_TYPE_UDP, 491 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 492 }, 493 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 494 .type = RTE_FLOW_ITEM_TYPE_TCP, 495 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 496 }, 497 [MLX5_EXPANSION_VXLAN] = { 498 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 499 MLX5_EXPANSION_IPV4, 500 MLX5_EXPANSION_IPV6), 501 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 502 }, 503 [MLX5_EXPANSION_VXLAN_GPE] = { 504 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 505 MLX5_EXPANSION_IPV4, 506 MLX5_EXPANSION_IPV6), 507 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 508 }, 509 [MLX5_EXPANSION_GRE] = { 510 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 511 .type = RTE_FLOW_ITEM_TYPE_GRE, 512 }, 513 [MLX5_EXPANSION_MPLS] = { 514 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 515 MLX5_EXPANSION_IPV6), 516 .type = RTE_FLOW_ITEM_TYPE_MPLS, 517 }, 518 [MLX5_EXPANSION_ETH] = { 519 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 520 MLX5_EXPANSION_IPV6), 521 .type = RTE_FLOW_ITEM_TYPE_ETH, 522 }, 523 [MLX5_EXPANSION_ETH_VLAN] = { 524 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 525 .type = RTE_FLOW_ITEM_TYPE_ETH, 526 }, 527 [MLX5_EXPANSION_VLAN] = { 528 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 529 MLX5_EXPANSION_IPV6), 530 .type = RTE_FLOW_ITEM_TYPE_VLAN, 531 }, 532 [MLX5_EXPANSION_IPV4] = { 533 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 534 MLX5_EXPANSION_IPV4_TCP), 535 .type = RTE_FLOW_ITEM_TYPE_IPV4, 536 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 537 ETH_RSS_NONFRAG_IPV4_OTHER, 538 }, 539 [MLX5_EXPANSION_IPV4_UDP] = { 540 .type = RTE_FLOW_ITEM_TYPE_UDP, 541 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 542 }, 543 [MLX5_EXPANSION_IPV4_TCP] = { 544 .type = RTE_FLOW_ITEM_TYPE_TCP, 545 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 546 }, 547 [MLX5_EXPANSION_IPV6] = { 548 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 549 MLX5_EXPANSION_IPV6_TCP), 550 .type = RTE_FLOW_ITEM_TYPE_IPV6, 551 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 552 ETH_RSS_NONFRAG_IPV6_OTHER, 553 }, 554 [MLX5_EXPANSION_IPV6_UDP] = { 555 .type = RTE_FLOW_ITEM_TYPE_UDP, 556 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 557 }, 558 [MLX5_EXPANSION_IPV6_TCP] = { 559 .type = RTE_FLOW_ITEM_TYPE_TCP, 560 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 561 }, 562 }; 563 564 static struct rte_flow_shared_action * 565 mlx5_shared_action_create(struct rte_eth_dev *dev, 566 const struct rte_flow_shared_action_conf *conf, 567 const struct rte_flow_action *action, 568 struct rte_flow_error *error); 569 static int mlx5_shared_action_destroy 570 (struct rte_eth_dev *dev, 571 struct rte_flow_shared_action *shared_action, 572 struct rte_flow_error *error); 573 static int mlx5_shared_action_update 574 (struct rte_eth_dev *dev, 575 struct rte_flow_shared_action *shared_action, 576 const struct rte_flow_action *action, 577 struct rte_flow_error *error); 578 static int mlx5_shared_action_query 579 (struct rte_eth_dev *dev, 580 const struct rte_flow_shared_action *action, 581 void *data, 582 struct rte_flow_error *error); 583 static inline bool 584 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 585 struct rte_flow_tunnel *tunnel, 586 const char *err_msg) 587 { 588 err_msg = NULL; 589 if (!is_tunnel_offload_active(dev)) { 590 err_msg = "tunnel offload was not activated"; 591 goto out; 592 } else if (!tunnel) { 593 err_msg = "no application tunnel"; 594 goto out; 595 } 596 597 switch (tunnel->type) { 598 default: 599 err_msg = "unsupported tunnel type"; 600 goto out; 601 case RTE_FLOW_ITEM_TYPE_VXLAN: 602 break; 603 } 604 605 out: 606 return !err_msg; 607 } 608 609 610 static int 611 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 612 struct rte_flow_tunnel *app_tunnel, 613 struct rte_flow_action **actions, 614 uint32_t *num_of_actions, 615 struct rte_flow_error *error) 616 { 617 int ret; 618 struct mlx5_flow_tunnel *tunnel; 619 const char *err_msg = NULL; 620 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 621 622 if (!verdict) 623 return rte_flow_error_set(error, EINVAL, 624 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 625 err_msg); 626 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 627 if (ret < 0) { 628 return rte_flow_error_set(error, ret, 629 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 630 "failed to initialize pmd tunnel"); 631 } 632 *actions = &tunnel->action; 633 *num_of_actions = 1; 634 return 0; 635 } 636 637 static int 638 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 639 struct rte_flow_tunnel *app_tunnel, 640 struct rte_flow_item **items, 641 uint32_t *num_of_items, 642 struct rte_flow_error *error) 643 { 644 int ret; 645 struct mlx5_flow_tunnel *tunnel; 646 const char *err_msg = NULL; 647 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 648 649 if (!verdict) 650 return rte_flow_error_set(error, EINVAL, 651 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 652 err_msg); 653 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 654 if (ret < 0) { 655 return rte_flow_error_set(error, ret, 656 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 657 "failed to initialize pmd tunnel"); 658 } 659 *items = &tunnel->item; 660 *num_of_items = 1; 661 return 0; 662 } 663 664 static int 665 mlx5_flow_item_release(struct rte_eth_dev *dev, 666 struct rte_flow_item *pmd_items, 667 uint32_t num_items, struct rte_flow_error *err) 668 { 669 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 670 struct mlx5_flow_tunnel *tun; 671 672 rte_spinlock_lock(&thub->sl); 673 LIST_FOREACH(tun, &thub->tunnels, chain) { 674 if (&tun->item == pmd_items) { 675 LIST_REMOVE(tun, chain); 676 break; 677 } 678 } 679 rte_spinlock_unlock(&thub->sl); 680 if (!tun || num_items != 1) 681 return rte_flow_error_set(err, EINVAL, 682 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 683 "invalid argument"); 684 if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED)) 685 mlx5_flow_tunnel_free(dev, tun); 686 return 0; 687 } 688 689 static int 690 mlx5_flow_action_release(struct rte_eth_dev *dev, 691 struct rte_flow_action *pmd_actions, 692 uint32_t num_actions, struct rte_flow_error *err) 693 { 694 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 695 struct mlx5_flow_tunnel *tun; 696 697 rte_spinlock_lock(&thub->sl); 698 LIST_FOREACH(tun, &thub->tunnels, chain) { 699 if (&tun->action == pmd_actions) { 700 LIST_REMOVE(tun, chain); 701 break; 702 } 703 } 704 rte_spinlock_unlock(&thub->sl); 705 if (!tun || num_actions != 1) 706 return rte_flow_error_set(err, EINVAL, 707 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 708 "invalid argument"); 709 if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED)) 710 mlx5_flow_tunnel_free(dev, tun); 711 712 return 0; 713 } 714 715 static int 716 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 717 struct rte_mbuf *m, 718 struct rte_flow_restore_info *info, 719 struct rte_flow_error *err) 720 { 721 uint64_t ol_flags = m->ol_flags; 722 const struct mlx5_flow_tbl_data_entry *tble; 723 const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID; 724 725 if ((ol_flags & mask) != mask) 726 goto err; 727 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 728 if (!tble) { 729 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 730 dev->data->port_id, m->hash.fdir.hi); 731 goto err; 732 } 733 MLX5_ASSERT(tble->tunnel); 734 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 735 info->group_id = tble->group_id; 736 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 737 RTE_FLOW_RESTORE_INFO_GROUP_ID | 738 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 739 740 return 0; 741 742 err: 743 return rte_flow_error_set(err, EINVAL, 744 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 745 "failed to get restore info"); 746 } 747 748 static const struct rte_flow_ops mlx5_flow_ops = { 749 .validate = mlx5_flow_validate, 750 .create = mlx5_flow_create, 751 .destroy = mlx5_flow_destroy, 752 .flush = mlx5_flow_flush, 753 .isolate = mlx5_flow_isolate, 754 .query = mlx5_flow_query, 755 .dev_dump = mlx5_flow_dev_dump, 756 .get_aged_flows = mlx5_flow_get_aged_flows, 757 .shared_action_create = mlx5_shared_action_create, 758 .shared_action_destroy = mlx5_shared_action_destroy, 759 .shared_action_update = mlx5_shared_action_update, 760 .shared_action_query = mlx5_shared_action_query, 761 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 762 .tunnel_match = mlx5_flow_tunnel_match, 763 .tunnel_action_decap_release = mlx5_flow_action_release, 764 .tunnel_item_release = mlx5_flow_item_release, 765 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 766 }; 767 768 /* Tunnel information. */ 769 struct mlx5_flow_tunnel_info { 770 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 771 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 772 }; 773 774 static struct mlx5_flow_tunnel_info tunnels_info[] = { 775 { 776 .tunnel = MLX5_FLOW_LAYER_VXLAN, 777 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 778 }, 779 { 780 .tunnel = MLX5_FLOW_LAYER_GENEVE, 781 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 782 }, 783 { 784 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 785 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 786 }, 787 { 788 .tunnel = MLX5_FLOW_LAYER_GRE, 789 .ptype = RTE_PTYPE_TUNNEL_GRE, 790 }, 791 { 792 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 793 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 794 }, 795 { 796 .tunnel = MLX5_FLOW_LAYER_MPLS, 797 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 798 }, 799 { 800 .tunnel = MLX5_FLOW_LAYER_NVGRE, 801 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 802 }, 803 { 804 .tunnel = MLX5_FLOW_LAYER_IPIP, 805 .ptype = RTE_PTYPE_TUNNEL_IP, 806 }, 807 { 808 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 809 .ptype = RTE_PTYPE_TUNNEL_IP, 810 }, 811 { 812 .tunnel = MLX5_FLOW_LAYER_GTP, 813 .ptype = RTE_PTYPE_TUNNEL_GTPU, 814 }, 815 }; 816 817 /* Key of thread specific flow workspace data. */ 818 static pthread_key_t key_workspace; 819 820 /* Thread specific flow workspace data once initialization data. */ 821 static pthread_once_t key_workspace_init; 822 823 824 /** 825 * Translate tag ID to register. 826 * 827 * @param[in] dev 828 * Pointer to the Ethernet device structure. 829 * @param[in] feature 830 * The feature that request the register. 831 * @param[in] id 832 * The request register ID. 833 * @param[out] error 834 * Error description in case of any. 835 * 836 * @return 837 * The request register on success, a negative errno 838 * value otherwise and rte_errno is set. 839 */ 840 int 841 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 842 enum mlx5_feature_name feature, 843 uint32_t id, 844 struct rte_flow_error *error) 845 { 846 struct mlx5_priv *priv = dev->data->dev_private; 847 struct mlx5_dev_config *config = &priv->config; 848 enum modify_reg start_reg; 849 bool skip_mtr_reg = false; 850 851 switch (feature) { 852 case MLX5_HAIRPIN_RX: 853 return REG_B; 854 case MLX5_HAIRPIN_TX: 855 return REG_A; 856 case MLX5_METADATA_RX: 857 switch (config->dv_xmeta_en) { 858 case MLX5_XMETA_MODE_LEGACY: 859 return REG_B; 860 case MLX5_XMETA_MODE_META16: 861 return REG_C_0; 862 case MLX5_XMETA_MODE_META32: 863 return REG_C_1; 864 } 865 break; 866 case MLX5_METADATA_TX: 867 return REG_A; 868 case MLX5_METADATA_FDB: 869 switch (config->dv_xmeta_en) { 870 case MLX5_XMETA_MODE_LEGACY: 871 return REG_NON; 872 case MLX5_XMETA_MODE_META16: 873 return REG_C_0; 874 case MLX5_XMETA_MODE_META32: 875 return REG_C_1; 876 } 877 break; 878 case MLX5_FLOW_MARK: 879 switch (config->dv_xmeta_en) { 880 case MLX5_XMETA_MODE_LEGACY: 881 return REG_NON; 882 case MLX5_XMETA_MODE_META16: 883 return REG_C_1; 884 case MLX5_XMETA_MODE_META32: 885 return REG_C_0; 886 } 887 break; 888 case MLX5_MTR_SFX: 889 /* 890 * If meter color and flow match share one register, flow match 891 * should use the meter color register for match. 892 */ 893 if (priv->mtr_reg_share) 894 return priv->mtr_color_reg; 895 else 896 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 897 REG_C_3; 898 case MLX5_MTR_COLOR: 899 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 900 return priv->mtr_color_reg; 901 case MLX5_COPY_MARK: 902 /* 903 * Metadata COPY_MARK register using is in meter suffix sub 904 * flow while with meter. It's safe to share the same register. 905 */ 906 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 907 case MLX5_APP_TAG: 908 /* 909 * If meter is enable, it will engage the register for color 910 * match and flow match. If meter color match is not using the 911 * REG_C_2, need to skip the REG_C_x be used by meter color 912 * match. 913 * If meter is disable, free to use all available registers. 914 */ 915 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 916 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 917 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 918 if (id > (REG_C_7 - start_reg)) 919 return rte_flow_error_set(error, EINVAL, 920 RTE_FLOW_ERROR_TYPE_ITEM, 921 NULL, "invalid tag id"); 922 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 923 return rte_flow_error_set(error, ENOTSUP, 924 RTE_FLOW_ERROR_TYPE_ITEM, 925 NULL, "unsupported tag id"); 926 /* 927 * This case means meter is using the REG_C_x great than 2. 928 * Take care not to conflict with meter color REG_C_x. 929 * If the available index REG_C_y >= REG_C_x, skip the 930 * color register. 931 */ 932 if (skip_mtr_reg && config->flow_mreg_c 933 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 934 if (id >= (REG_C_7 - start_reg)) 935 return rte_flow_error_set(error, EINVAL, 936 RTE_FLOW_ERROR_TYPE_ITEM, 937 NULL, "invalid tag id"); 938 if (config->flow_mreg_c 939 [id + 1 + start_reg - REG_C_0] != REG_NON) 940 return config->flow_mreg_c 941 [id + 1 + start_reg - REG_C_0]; 942 return rte_flow_error_set(error, ENOTSUP, 943 RTE_FLOW_ERROR_TYPE_ITEM, 944 NULL, "unsupported tag id"); 945 } 946 return config->flow_mreg_c[id + start_reg - REG_C_0]; 947 } 948 MLX5_ASSERT(false); 949 return rte_flow_error_set(error, EINVAL, 950 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 951 NULL, "invalid feature name"); 952 } 953 954 /** 955 * Check extensive flow metadata register support. 956 * 957 * @param dev 958 * Pointer to rte_eth_dev structure. 959 * 960 * @return 961 * True if device supports extensive flow metadata register, otherwise false. 962 */ 963 bool 964 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 965 { 966 struct mlx5_priv *priv = dev->data->dev_private; 967 struct mlx5_dev_config *config = &priv->config; 968 969 /* 970 * Having available reg_c can be regarded inclusively as supporting 971 * extensive flow metadata register, which could mean, 972 * - metadata register copy action by modify header. 973 * - 16 modify header actions is supported. 974 * - reg_c's are preserved across different domain (FDB and NIC) on 975 * packet loopback by flow lookup miss. 976 */ 977 return config->flow_mreg_c[2] != REG_NON; 978 } 979 980 /** 981 * Verify the @p item specifications (spec, last, mask) are compatible with the 982 * NIC capabilities. 983 * 984 * @param[in] item 985 * Item specification. 986 * @param[in] mask 987 * @p item->mask or flow default bit-masks. 988 * @param[in] nic_mask 989 * Bit-masks covering supported fields by the NIC to compare with user mask. 990 * @param[in] size 991 * Bit-masks size in bytes. 992 * @param[in] range_accepted 993 * True if range of values is accepted for specific fields, false otherwise. 994 * @param[out] error 995 * Pointer to error structure. 996 * 997 * @return 998 * 0 on success, a negative errno value otherwise and rte_errno is set. 999 */ 1000 int 1001 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 1002 const uint8_t *mask, 1003 const uint8_t *nic_mask, 1004 unsigned int size, 1005 bool range_accepted, 1006 struct rte_flow_error *error) 1007 { 1008 unsigned int i; 1009 1010 MLX5_ASSERT(nic_mask); 1011 for (i = 0; i < size; ++i) 1012 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 1013 return rte_flow_error_set(error, ENOTSUP, 1014 RTE_FLOW_ERROR_TYPE_ITEM, 1015 item, 1016 "mask enables non supported" 1017 " bits"); 1018 if (!item->spec && (item->mask || item->last)) 1019 return rte_flow_error_set(error, EINVAL, 1020 RTE_FLOW_ERROR_TYPE_ITEM, item, 1021 "mask/last without a spec is not" 1022 " supported"); 1023 if (item->spec && item->last && !range_accepted) { 1024 uint8_t spec[size]; 1025 uint8_t last[size]; 1026 unsigned int i; 1027 int ret; 1028 1029 for (i = 0; i < size; ++i) { 1030 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 1031 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 1032 } 1033 ret = memcmp(spec, last, size); 1034 if (ret != 0) 1035 return rte_flow_error_set(error, EINVAL, 1036 RTE_FLOW_ERROR_TYPE_ITEM, 1037 item, 1038 "range is not valid"); 1039 } 1040 return 0; 1041 } 1042 1043 /** 1044 * Adjust the hash fields according to the @p flow information. 1045 * 1046 * @param[in] dev_flow. 1047 * Pointer to the mlx5_flow. 1048 * @param[in] tunnel 1049 * 1 when the hash field is for a tunnel item. 1050 * @param[in] layer_types 1051 * ETH_RSS_* types. 1052 * @param[in] hash_fields 1053 * Item hash fields. 1054 * 1055 * @return 1056 * The hash fields that should be used. 1057 */ 1058 uint64_t 1059 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 1060 int tunnel __rte_unused, uint64_t layer_types, 1061 uint64_t hash_fields) 1062 { 1063 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1064 int rss_request_inner = rss_desc->level >= 2; 1065 1066 /* Check RSS hash level for tunnel. */ 1067 if (tunnel && rss_request_inner) 1068 hash_fields |= IBV_RX_HASH_INNER; 1069 else if (tunnel || rss_request_inner) 1070 return 0; 1071 #endif 1072 /* Check if requested layer matches RSS hash fields. */ 1073 if (!(rss_desc->types & layer_types)) 1074 return 0; 1075 return hash_fields; 1076 } 1077 1078 /** 1079 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 1080 * if several tunnel rules are used on this queue, the tunnel ptype will be 1081 * cleared. 1082 * 1083 * @param rxq_ctrl 1084 * Rx queue to update. 1085 */ 1086 static void 1087 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1088 { 1089 unsigned int i; 1090 uint32_t tunnel_ptype = 0; 1091 1092 /* Look up for the ptype to use. */ 1093 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1094 if (!rxq_ctrl->flow_tunnels_n[i]) 1095 continue; 1096 if (!tunnel_ptype) { 1097 tunnel_ptype = tunnels_info[i].ptype; 1098 } else { 1099 tunnel_ptype = 0; 1100 break; 1101 } 1102 } 1103 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1104 } 1105 1106 /** 1107 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1108 * flow. 1109 * 1110 * @param[in] dev 1111 * Pointer to the Ethernet device structure. 1112 * @param[in] dev_handle 1113 * Pointer to device flow handle structure. 1114 */ 1115 static void 1116 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1117 struct mlx5_flow_handle *dev_handle) 1118 { 1119 struct mlx5_priv *priv = dev->data->dev_private; 1120 const int mark = dev_handle->mark; 1121 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1122 struct mlx5_hrxq *hrxq; 1123 unsigned int i; 1124 1125 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE) 1126 return; 1127 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1128 dev_handle->rix_hrxq); 1129 if (!hrxq) 1130 return; 1131 for (i = 0; i != hrxq->ind_table->queues_n; ++i) { 1132 int idx = hrxq->ind_table->queues[i]; 1133 struct mlx5_rxq_ctrl *rxq_ctrl = 1134 container_of((*priv->rxqs)[idx], 1135 struct mlx5_rxq_ctrl, rxq); 1136 1137 /* 1138 * To support metadata register copy on Tx loopback, 1139 * this must be always enabled (metadata may arive 1140 * from other port - not from local flows only. 1141 */ 1142 if (priv->config.dv_flow_en && 1143 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1144 mlx5_flow_ext_mreg_supported(dev)) { 1145 rxq_ctrl->rxq.mark = 1; 1146 rxq_ctrl->flow_mark_n = 1; 1147 } else if (mark) { 1148 rxq_ctrl->rxq.mark = 1; 1149 rxq_ctrl->flow_mark_n++; 1150 } 1151 if (tunnel) { 1152 unsigned int j; 1153 1154 /* Increase the counter matching the flow. */ 1155 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1156 if ((tunnels_info[j].tunnel & 1157 dev_handle->layers) == 1158 tunnels_info[j].tunnel) { 1159 rxq_ctrl->flow_tunnels_n[j]++; 1160 break; 1161 } 1162 } 1163 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1164 } 1165 } 1166 } 1167 1168 /** 1169 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1170 * 1171 * @param[in] dev 1172 * Pointer to the Ethernet device structure. 1173 * @param[in] flow 1174 * Pointer to flow structure. 1175 */ 1176 static void 1177 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1178 { 1179 struct mlx5_priv *priv = dev->data->dev_private; 1180 uint32_t handle_idx; 1181 struct mlx5_flow_handle *dev_handle; 1182 1183 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1184 handle_idx, dev_handle, next) 1185 flow_drv_rxq_flags_set(dev, dev_handle); 1186 } 1187 1188 /** 1189 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1190 * device flow if no other flow uses it with the same kind of request. 1191 * 1192 * @param dev 1193 * Pointer to Ethernet device. 1194 * @param[in] dev_handle 1195 * Pointer to the device flow handle structure. 1196 */ 1197 static void 1198 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1199 struct mlx5_flow_handle *dev_handle) 1200 { 1201 struct mlx5_priv *priv = dev->data->dev_private; 1202 const int mark = dev_handle->mark; 1203 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1204 struct mlx5_hrxq *hrxq; 1205 unsigned int i; 1206 1207 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE) 1208 return; 1209 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1210 dev_handle->rix_hrxq); 1211 if (!hrxq) 1212 return; 1213 MLX5_ASSERT(dev->data->dev_started); 1214 for (i = 0; i != hrxq->ind_table->queues_n; ++i) { 1215 int idx = hrxq->ind_table->queues[i]; 1216 struct mlx5_rxq_ctrl *rxq_ctrl = 1217 container_of((*priv->rxqs)[idx], 1218 struct mlx5_rxq_ctrl, rxq); 1219 1220 if (priv->config.dv_flow_en && 1221 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1222 mlx5_flow_ext_mreg_supported(dev)) { 1223 rxq_ctrl->rxq.mark = 1; 1224 rxq_ctrl->flow_mark_n = 1; 1225 } else if (mark) { 1226 rxq_ctrl->flow_mark_n--; 1227 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1228 } 1229 if (tunnel) { 1230 unsigned int j; 1231 1232 /* Decrease the counter matching the flow. */ 1233 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1234 if ((tunnels_info[j].tunnel & 1235 dev_handle->layers) == 1236 tunnels_info[j].tunnel) { 1237 rxq_ctrl->flow_tunnels_n[j]--; 1238 break; 1239 } 1240 } 1241 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1242 } 1243 } 1244 } 1245 1246 /** 1247 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1248 * @p flow if no other flow uses it with the same kind of request. 1249 * 1250 * @param dev 1251 * Pointer to Ethernet device. 1252 * @param[in] flow 1253 * Pointer to the flow. 1254 */ 1255 static void 1256 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1257 { 1258 struct mlx5_priv *priv = dev->data->dev_private; 1259 uint32_t handle_idx; 1260 struct mlx5_flow_handle *dev_handle; 1261 1262 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1263 handle_idx, dev_handle, next) 1264 flow_drv_rxq_flags_trim(dev, dev_handle); 1265 } 1266 1267 /** 1268 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1269 * 1270 * @param dev 1271 * Pointer to Ethernet device. 1272 */ 1273 static void 1274 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1275 { 1276 struct mlx5_priv *priv = dev->data->dev_private; 1277 unsigned int i; 1278 1279 for (i = 0; i != priv->rxqs_n; ++i) { 1280 struct mlx5_rxq_ctrl *rxq_ctrl; 1281 unsigned int j; 1282 1283 if (!(*priv->rxqs)[i]) 1284 continue; 1285 rxq_ctrl = container_of((*priv->rxqs)[i], 1286 struct mlx5_rxq_ctrl, rxq); 1287 rxq_ctrl->flow_mark_n = 0; 1288 rxq_ctrl->rxq.mark = 0; 1289 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1290 rxq_ctrl->flow_tunnels_n[j] = 0; 1291 rxq_ctrl->rxq.tunnel = 0; 1292 } 1293 } 1294 1295 /** 1296 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1297 * 1298 * @param[in] dev 1299 * Pointer to the Ethernet device structure. 1300 */ 1301 void 1302 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1303 { 1304 struct mlx5_priv *priv = dev->data->dev_private; 1305 struct mlx5_rxq_data *data; 1306 unsigned int i; 1307 1308 for (i = 0; i != priv->rxqs_n; ++i) { 1309 if (!(*priv->rxqs)[i]) 1310 continue; 1311 data = (*priv->rxqs)[i]; 1312 if (!rte_flow_dynf_metadata_avail()) { 1313 data->dynf_meta = 0; 1314 data->flow_meta_mask = 0; 1315 data->flow_meta_offset = -1; 1316 } else { 1317 data->dynf_meta = 1; 1318 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1319 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1320 } 1321 } 1322 } 1323 1324 /* 1325 * return a pointer to the desired action in the list of actions. 1326 * 1327 * @param[in] actions 1328 * The list of actions to search the action in. 1329 * @param[in] action 1330 * The action to find. 1331 * 1332 * @return 1333 * Pointer to the action in the list, if found. NULL otherwise. 1334 */ 1335 const struct rte_flow_action * 1336 mlx5_flow_find_action(const struct rte_flow_action *actions, 1337 enum rte_flow_action_type action) 1338 { 1339 if (actions == NULL) 1340 return NULL; 1341 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1342 if (actions->type == action) 1343 return actions; 1344 return NULL; 1345 } 1346 1347 /* 1348 * Validate the flag action. 1349 * 1350 * @param[in] action_flags 1351 * Bit-fields that holds the actions detected until now. 1352 * @param[in] attr 1353 * Attributes of flow that includes this action. 1354 * @param[out] error 1355 * Pointer to error structure. 1356 * 1357 * @return 1358 * 0 on success, a negative errno value otherwise and rte_errno is set. 1359 */ 1360 int 1361 mlx5_flow_validate_action_flag(uint64_t action_flags, 1362 const struct rte_flow_attr *attr, 1363 struct rte_flow_error *error) 1364 { 1365 if (action_flags & MLX5_FLOW_ACTION_MARK) 1366 return rte_flow_error_set(error, EINVAL, 1367 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1368 "can't mark and flag in same flow"); 1369 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1370 return rte_flow_error_set(error, EINVAL, 1371 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1372 "can't have 2 flag" 1373 " actions in same flow"); 1374 if (attr->egress) 1375 return rte_flow_error_set(error, ENOTSUP, 1376 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1377 "flag action not supported for " 1378 "egress"); 1379 return 0; 1380 } 1381 1382 /* 1383 * Validate the mark action. 1384 * 1385 * @param[in] action 1386 * Pointer to the queue action. 1387 * @param[in] action_flags 1388 * Bit-fields that holds the actions detected until now. 1389 * @param[in] attr 1390 * Attributes of flow that includes this action. 1391 * @param[out] error 1392 * Pointer to error structure. 1393 * 1394 * @return 1395 * 0 on success, a negative errno value otherwise and rte_errno is set. 1396 */ 1397 int 1398 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1399 uint64_t action_flags, 1400 const struct rte_flow_attr *attr, 1401 struct rte_flow_error *error) 1402 { 1403 const struct rte_flow_action_mark *mark = action->conf; 1404 1405 if (!mark) 1406 return rte_flow_error_set(error, EINVAL, 1407 RTE_FLOW_ERROR_TYPE_ACTION, 1408 action, 1409 "configuration cannot be null"); 1410 if (mark->id >= MLX5_FLOW_MARK_MAX) 1411 return rte_flow_error_set(error, EINVAL, 1412 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1413 &mark->id, 1414 "mark id must in 0 <= id < " 1415 RTE_STR(MLX5_FLOW_MARK_MAX)); 1416 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1417 return rte_flow_error_set(error, EINVAL, 1418 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1419 "can't flag and mark in same flow"); 1420 if (action_flags & MLX5_FLOW_ACTION_MARK) 1421 return rte_flow_error_set(error, EINVAL, 1422 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1423 "can't have 2 mark actions in same" 1424 " flow"); 1425 if (attr->egress) 1426 return rte_flow_error_set(error, ENOTSUP, 1427 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1428 "mark action not supported for " 1429 "egress"); 1430 return 0; 1431 } 1432 1433 /* 1434 * Validate the drop action. 1435 * 1436 * @param[in] action_flags 1437 * Bit-fields that holds the actions detected until now. 1438 * @param[in] attr 1439 * Attributes of flow that includes this action. 1440 * @param[out] error 1441 * Pointer to error structure. 1442 * 1443 * @return 1444 * 0 on success, a negative errno value otherwise and rte_errno is set. 1445 */ 1446 int 1447 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1448 const struct rte_flow_attr *attr, 1449 struct rte_flow_error *error) 1450 { 1451 if (attr->egress) 1452 return rte_flow_error_set(error, ENOTSUP, 1453 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1454 "drop action not supported for " 1455 "egress"); 1456 return 0; 1457 } 1458 1459 /* 1460 * Validate the queue action. 1461 * 1462 * @param[in] action 1463 * Pointer to the queue action. 1464 * @param[in] action_flags 1465 * Bit-fields that holds the actions detected until now. 1466 * @param[in] dev 1467 * Pointer to the Ethernet device structure. 1468 * @param[in] attr 1469 * Attributes of flow that includes this action. 1470 * @param[out] error 1471 * Pointer to error structure. 1472 * 1473 * @return 1474 * 0 on success, a negative errno value otherwise and rte_errno is set. 1475 */ 1476 int 1477 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1478 uint64_t action_flags, 1479 struct rte_eth_dev *dev, 1480 const struct rte_flow_attr *attr, 1481 struct rte_flow_error *error) 1482 { 1483 struct mlx5_priv *priv = dev->data->dev_private; 1484 const struct rte_flow_action_queue *queue = action->conf; 1485 1486 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1487 return rte_flow_error_set(error, EINVAL, 1488 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1489 "can't have 2 fate actions in" 1490 " same flow"); 1491 if (!priv->rxqs_n) 1492 return rte_flow_error_set(error, EINVAL, 1493 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1494 NULL, "No Rx queues configured"); 1495 if (queue->index >= priv->rxqs_n) 1496 return rte_flow_error_set(error, EINVAL, 1497 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1498 &queue->index, 1499 "queue index out of range"); 1500 if (!(*priv->rxqs)[queue->index]) 1501 return rte_flow_error_set(error, EINVAL, 1502 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1503 &queue->index, 1504 "queue is not configured"); 1505 if (attr->egress) 1506 return rte_flow_error_set(error, ENOTSUP, 1507 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1508 "queue action not supported for " 1509 "egress"); 1510 return 0; 1511 } 1512 1513 /* 1514 * Validate the rss action. 1515 * 1516 * @param[in] dev 1517 * Pointer to the Ethernet device structure. 1518 * @param[in] action 1519 * Pointer to the queue action. 1520 * @param[out] error 1521 * Pointer to error structure. 1522 * 1523 * @return 1524 * 0 on success, a negative errno value otherwise and rte_errno is set. 1525 */ 1526 int 1527 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1528 const struct rte_flow_action *action, 1529 struct rte_flow_error *error) 1530 { 1531 struct mlx5_priv *priv = dev->data->dev_private; 1532 const struct rte_flow_action_rss *rss = action->conf; 1533 unsigned int i; 1534 1535 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1536 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1537 return rte_flow_error_set(error, ENOTSUP, 1538 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1539 &rss->func, 1540 "RSS hash function not supported"); 1541 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1542 if (rss->level > 2) 1543 #else 1544 if (rss->level > 1) 1545 #endif 1546 return rte_flow_error_set(error, ENOTSUP, 1547 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1548 &rss->level, 1549 "tunnel RSS is not supported"); 1550 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1551 if (rss->key_len == 0 && rss->key != NULL) 1552 return rte_flow_error_set(error, ENOTSUP, 1553 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1554 &rss->key_len, 1555 "RSS hash key length 0"); 1556 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1557 return rte_flow_error_set(error, ENOTSUP, 1558 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1559 &rss->key_len, 1560 "RSS hash key too small"); 1561 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1562 return rte_flow_error_set(error, ENOTSUP, 1563 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1564 &rss->key_len, 1565 "RSS hash key too large"); 1566 if (rss->queue_num > priv->config.ind_table_max_size) 1567 return rte_flow_error_set(error, ENOTSUP, 1568 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1569 &rss->queue_num, 1570 "number of queues too large"); 1571 if (rss->types & MLX5_RSS_HF_MASK) 1572 return rte_flow_error_set(error, ENOTSUP, 1573 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1574 &rss->types, 1575 "some RSS protocols are not" 1576 " supported"); 1577 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) && 1578 !(rss->types & ETH_RSS_IP)) 1579 return rte_flow_error_set(error, EINVAL, 1580 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1581 "L3 partial RSS requested but L3 RSS" 1582 " type not specified"); 1583 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) && 1584 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP))) 1585 return rte_flow_error_set(error, EINVAL, 1586 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1587 "L4 partial RSS requested but L4 RSS" 1588 " type not specified"); 1589 if (!priv->rxqs_n) 1590 return rte_flow_error_set(error, EINVAL, 1591 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1592 NULL, "No Rx queues configured"); 1593 if (!rss->queue_num) 1594 return rte_flow_error_set(error, EINVAL, 1595 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1596 NULL, "No queues configured"); 1597 for (i = 0; i != rss->queue_num; ++i) { 1598 if (rss->queue[i] >= priv->rxqs_n) 1599 return rte_flow_error_set 1600 (error, EINVAL, 1601 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1602 &rss->queue[i], "queue index out of range"); 1603 if (!(*priv->rxqs)[rss->queue[i]]) 1604 return rte_flow_error_set 1605 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1606 &rss->queue[i], "queue is not configured"); 1607 } 1608 return 0; 1609 } 1610 1611 /* 1612 * Validate the rss action. 1613 * 1614 * @param[in] action 1615 * Pointer to the queue action. 1616 * @param[in] action_flags 1617 * Bit-fields that holds the actions detected until now. 1618 * @param[in] dev 1619 * Pointer to the Ethernet device structure. 1620 * @param[in] attr 1621 * Attributes of flow that includes this action. 1622 * @param[in] item_flags 1623 * Items that were detected. 1624 * @param[out] error 1625 * Pointer to error structure. 1626 * 1627 * @return 1628 * 0 on success, a negative errno value otherwise and rte_errno is set. 1629 */ 1630 int 1631 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1632 uint64_t action_flags, 1633 struct rte_eth_dev *dev, 1634 const struct rte_flow_attr *attr, 1635 uint64_t item_flags, 1636 struct rte_flow_error *error) 1637 { 1638 const struct rte_flow_action_rss *rss = action->conf; 1639 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1640 int ret; 1641 1642 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1643 return rte_flow_error_set(error, EINVAL, 1644 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1645 "can't have 2 fate actions" 1646 " in same flow"); 1647 ret = mlx5_validate_action_rss(dev, action, error); 1648 if (ret) 1649 return ret; 1650 if (attr->egress) 1651 return rte_flow_error_set(error, ENOTSUP, 1652 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1653 "rss action not supported for " 1654 "egress"); 1655 if (rss->level > 1 && !tunnel) 1656 return rte_flow_error_set(error, EINVAL, 1657 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1658 "inner RSS is not supported for " 1659 "non-tunnel flows"); 1660 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1661 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1662 return rte_flow_error_set(error, EINVAL, 1663 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1664 "RSS on eCPRI is not supported now"); 1665 } 1666 return 0; 1667 } 1668 1669 /* 1670 * Validate the default miss action. 1671 * 1672 * @param[in] action_flags 1673 * Bit-fields that holds the actions detected until now. 1674 * @param[out] error 1675 * Pointer to error structure. 1676 * 1677 * @return 1678 * 0 on success, a negative errno value otherwise and rte_errno is set. 1679 */ 1680 int 1681 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1682 const struct rte_flow_attr *attr, 1683 struct rte_flow_error *error) 1684 { 1685 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1686 return rte_flow_error_set(error, EINVAL, 1687 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1688 "can't have 2 fate actions in" 1689 " same flow"); 1690 if (attr->egress) 1691 return rte_flow_error_set(error, ENOTSUP, 1692 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1693 "default miss action not supported " 1694 "for egress"); 1695 if (attr->group) 1696 return rte_flow_error_set(error, ENOTSUP, 1697 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1698 "only group 0 is supported"); 1699 if (attr->transfer) 1700 return rte_flow_error_set(error, ENOTSUP, 1701 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1702 NULL, "transfer is not supported"); 1703 return 0; 1704 } 1705 1706 /* 1707 * Validate the count action. 1708 * 1709 * @param[in] dev 1710 * Pointer to the Ethernet device structure. 1711 * @param[in] attr 1712 * Attributes of flow that includes this action. 1713 * @param[out] error 1714 * Pointer to error structure. 1715 * 1716 * @return 1717 * 0 on success, a negative errno value otherwise and rte_errno is set. 1718 */ 1719 int 1720 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1721 const struct rte_flow_attr *attr, 1722 struct rte_flow_error *error) 1723 { 1724 if (attr->egress) 1725 return rte_flow_error_set(error, ENOTSUP, 1726 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1727 "count action not supported for " 1728 "egress"); 1729 return 0; 1730 } 1731 1732 /** 1733 * Verify the @p attributes will be correctly understood by the NIC and store 1734 * them in the @p flow if everything is correct. 1735 * 1736 * @param[in] dev 1737 * Pointer to the Ethernet device structure. 1738 * @param[in] attributes 1739 * Pointer to flow attributes 1740 * @param[out] error 1741 * Pointer to error structure. 1742 * 1743 * @return 1744 * 0 on success, a negative errno value otherwise and rte_errno is set. 1745 */ 1746 int 1747 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1748 const struct rte_flow_attr *attributes, 1749 struct rte_flow_error *error) 1750 { 1751 struct mlx5_priv *priv = dev->data->dev_private; 1752 uint32_t priority_max = priv->config.flow_prio - 1; 1753 1754 if (attributes->group) 1755 return rte_flow_error_set(error, ENOTSUP, 1756 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1757 NULL, "groups is not supported"); 1758 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 1759 attributes->priority >= priority_max) 1760 return rte_flow_error_set(error, ENOTSUP, 1761 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1762 NULL, "priority out of range"); 1763 if (attributes->egress) 1764 return rte_flow_error_set(error, ENOTSUP, 1765 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1766 "egress is not supported"); 1767 if (attributes->transfer && !priv->config.dv_esw_en) 1768 return rte_flow_error_set(error, ENOTSUP, 1769 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1770 NULL, "transfer is not supported"); 1771 if (!attributes->ingress) 1772 return rte_flow_error_set(error, EINVAL, 1773 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1774 NULL, 1775 "ingress attribute is mandatory"); 1776 return 0; 1777 } 1778 1779 /** 1780 * Validate ICMP6 item. 1781 * 1782 * @param[in] item 1783 * Item specification. 1784 * @param[in] item_flags 1785 * Bit-fields that holds the items detected until now. 1786 * @param[in] ext_vlan_sup 1787 * Whether extended VLAN features are supported or not. 1788 * @param[out] error 1789 * Pointer to error structure. 1790 * 1791 * @return 1792 * 0 on success, a negative errno value otherwise and rte_errno is set. 1793 */ 1794 int 1795 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1796 uint64_t item_flags, 1797 uint8_t target_protocol, 1798 struct rte_flow_error *error) 1799 { 1800 const struct rte_flow_item_icmp6 *mask = item->mask; 1801 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1802 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1803 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1804 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1805 MLX5_FLOW_LAYER_OUTER_L4; 1806 int ret; 1807 1808 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1809 return rte_flow_error_set(error, EINVAL, 1810 RTE_FLOW_ERROR_TYPE_ITEM, item, 1811 "protocol filtering not compatible" 1812 " with ICMP6 layer"); 1813 if (!(item_flags & l3m)) 1814 return rte_flow_error_set(error, EINVAL, 1815 RTE_FLOW_ERROR_TYPE_ITEM, item, 1816 "IPv6 is mandatory to filter on" 1817 " ICMP6"); 1818 if (item_flags & l4m) 1819 return rte_flow_error_set(error, EINVAL, 1820 RTE_FLOW_ERROR_TYPE_ITEM, item, 1821 "multiple L4 layers not supported"); 1822 if (!mask) 1823 mask = &rte_flow_item_icmp6_mask; 1824 ret = mlx5_flow_item_acceptable 1825 (item, (const uint8_t *)mask, 1826 (const uint8_t *)&rte_flow_item_icmp6_mask, 1827 sizeof(struct rte_flow_item_icmp6), 1828 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1829 if (ret < 0) 1830 return ret; 1831 return 0; 1832 } 1833 1834 /** 1835 * Validate ICMP item. 1836 * 1837 * @param[in] item 1838 * Item specification. 1839 * @param[in] item_flags 1840 * Bit-fields that holds the items detected until now. 1841 * @param[out] error 1842 * Pointer to error structure. 1843 * 1844 * @return 1845 * 0 on success, a negative errno value otherwise and rte_errno is set. 1846 */ 1847 int 1848 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1849 uint64_t item_flags, 1850 uint8_t target_protocol, 1851 struct rte_flow_error *error) 1852 { 1853 const struct rte_flow_item_icmp *mask = item->mask; 1854 const struct rte_flow_item_icmp nic_mask = { 1855 .hdr.icmp_type = 0xff, 1856 .hdr.icmp_code = 0xff, 1857 .hdr.icmp_ident = RTE_BE16(0xffff), 1858 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 1859 }; 1860 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1861 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1862 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1863 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1864 MLX5_FLOW_LAYER_OUTER_L4; 1865 int ret; 1866 1867 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1868 return rte_flow_error_set(error, EINVAL, 1869 RTE_FLOW_ERROR_TYPE_ITEM, item, 1870 "protocol filtering not compatible" 1871 " with ICMP layer"); 1872 if (!(item_flags & l3m)) 1873 return rte_flow_error_set(error, EINVAL, 1874 RTE_FLOW_ERROR_TYPE_ITEM, item, 1875 "IPv4 is mandatory to filter" 1876 " on ICMP"); 1877 if (item_flags & l4m) 1878 return rte_flow_error_set(error, EINVAL, 1879 RTE_FLOW_ERROR_TYPE_ITEM, item, 1880 "multiple L4 layers not supported"); 1881 if (!mask) 1882 mask = &nic_mask; 1883 ret = mlx5_flow_item_acceptable 1884 (item, (const uint8_t *)mask, 1885 (const uint8_t *)&nic_mask, 1886 sizeof(struct rte_flow_item_icmp), 1887 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1888 if (ret < 0) 1889 return ret; 1890 return 0; 1891 } 1892 1893 /** 1894 * Validate Ethernet item. 1895 * 1896 * @param[in] item 1897 * Item specification. 1898 * @param[in] item_flags 1899 * Bit-fields that holds the items detected until now. 1900 * @param[out] error 1901 * Pointer to error structure. 1902 * 1903 * @return 1904 * 0 on success, a negative errno value otherwise and rte_errno is set. 1905 */ 1906 int 1907 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1908 uint64_t item_flags, bool ext_vlan_sup, 1909 struct rte_flow_error *error) 1910 { 1911 const struct rte_flow_item_eth *mask = item->mask; 1912 const struct rte_flow_item_eth nic_mask = { 1913 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1914 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1915 .type = RTE_BE16(0xffff), 1916 .has_vlan = ext_vlan_sup ? 1 : 0, 1917 }; 1918 int ret; 1919 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1920 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1921 MLX5_FLOW_LAYER_OUTER_L2; 1922 1923 if (item_flags & ethm) 1924 return rte_flow_error_set(error, ENOTSUP, 1925 RTE_FLOW_ERROR_TYPE_ITEM, item, 1926 "multiple L2 layers not supported"); 1927 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 1928 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 1929 return rte_flow_error_set(error, EINVAL, 1930 RTE_FLOW_ERROR_TYPE_ITEM, item, 1931 "L2 layer should not follow " 1932 "L3 layers"); 1933 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 1934 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 1935 return rte_flow_error_set(error, EINVAL, 1936 RTE_FLOW_ERROR_TYPE_ITEM, item, 1937 "L2 layer should not follow VLAN"); 1938 if (!mask) 1939 mask = &rte_flow_item_eth_mask; 1940 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1941 (const uint8_t *)&nic_mask, 1942 sizeof(struct rte_flow_item_eth), 1943 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1944 return ret; 1945 } 1946 1947 /** 1948 * Validate VLAN item. 1949 * 1950 * @param[in] item 1951 * Item specification. 1952 * @param[in] item_flags 1953 * Bit-fields that holds the items detected until now. 1954 * @param[in] dev 1955 * Ethernet device flow is being created on. 1956 * @param[out] error 1957 * Pointer to error structure. 1958 * 1959 * @return 1960 * 0 on success, a negative errno value otherwise and rte_errno is set. 1961 */ 1962 int 1963 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1964 uint64_t item_flags, 1965 struct rte_eth_dev *dev, 1966 struct rte_flow_error *error) 1967 { 1968 const struct rte_flow_item_vlan *spec = item->spec; 1969 const struct rte_flow_item_vlan *mask = item->mask; 1970 const struct rte_flow_item_vlan nic_mask = { 1971 .tci = RTE_BE16(UINT16_MAX), 1972 .inner_type = RTE_BE16(UINT16_MAX), 1973 }; 1974 uint16_t vlan_tag = 0; 1975 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1976 int ret; 1977 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1978 MLX5_FLOW_LAYER_INNER_L4) : 1979 (MLX5_FLOW_LAYER_OUTER_L3 | 1980 MLX5_FLOW_LAYER_OUTER_L4); 1981 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1982 MLX5_FLOW_LAYER_OUTER_VLAN; 1983 1984 if (item_flags & vlanm) 1985 return rte_flow_error_set(error, EINVAL, 1986 RTE_FLOW_ERROR_TYPE_ITEM, item, 1987 "multiple VLAN layers not supported"); 1988 else if ((item_flags & l34m) != 0) 1989 return rte_flow_error_set(error, EINVAL, 1990 RTE_FLOW_ERROR_TYPE_ITEM, item, 1991 "VLAN cannot follow L3/L4 layer"); 1992 if (!mask) 1993 mask = &rte_flow_item_vlan_mask; 1994 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1995 (const uint8_t *)&nic_mask, 1996 sizeof(struct rte_flow_item_vlan), 1997 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1998 if (ret) 1999 return ret; 2000 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 2001 struct mlx5_priv *priv = dev->data->dev_private; 2002 2003 if (priv->vmwa_context) { 2004 /* 2005 * Non-NULL context means we have a virtual machine 2006 * and SR-IOV enabled, we have to create VLAN interface 2007 * to make hypervisor to setup E-Switch vport 2008 * context correctly. We avoid creating the multiple 2009 * VLAN interfaces, so we cannot support VLAN tag mask. 2010 */ 2011 return rte_flow_error_set(error, EINVAL, 2012 RTE_FLOW_ERROR_TYPE_ITEM, 2013 item, 2014 "VLAN tag mask is not" 2015 " supported in virtual" 2016 " environment"); 2017 } 2018 } 2019 if (spec) { 2020 vlan_tag = spec->tci; 2021 vlan_tag &= mask->tci; 2022 } 2023 /* 2024 * From verbs perspective an empty VLAN is equivalent 2025 * to a packet without VLAN layer. 2026 */ 2027 if (!vlan_tag) 2028 return rte_flow_error_set(error, EINVAL, 2029 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 2030 item->spec, 2031 "VLAN cannot be empty"); 2032 return 0; 2033 } 2034 2035 /** 2036 * Validate IPV4 item. 2037 * 2038 * @param[in] item 2039 * Item specification. 2040 * @param[in] item_flags 2041 * Bit-fields that holds the items detected until now. 2042 * @param[in] last_item 2043 * Previous validated item in the pattern items. 2044 * @param[in] ether_type 2045 * Type in the ethernet layer header (including dot1q). 2046 * @param[in] acc_mask 2047 * Acceptable mask, if NULL default internal default mask 2048 * will be used to check whether item fields are supported. 2049 * @param[in] range_accepted 2050 * True if range of values is accepted for specific fields, false otherwise. 2051 * @param[out] error 2052 * Pointer to error structure. 2053 * 2054 * @return 2055 * 0 on success, a negative errno value otherwise and rte_errno is set. 2056 */ 2057 int 2058 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2059 uint64_t item_flags, 2060 uint64_t last_item, 2061 uint16_t ether_type, 2062 const struct rte_flow_item_ipv4 *acc_mask, 2063 bool range_accepted, 2064 struct rte_flow_error *error) 2065 { 2066 const struct rte_flow_item_ipv4 *mask = item->mask; 2067 const struct rte_flow_item_ipv4 *spec = item->spec; 2068 const struct rte_flow_item_ipv4 nic_mask = { 2069 .hdr = { 2070 .src_addr = RTE_BE32(0xffffffff), 2071 .dst_addr = RTE_BE32(0xffffffff), 2072 .type_of_service = 0xff, 2073 .next_proto_id = 0xff, 2074 }, 2075 }; 2076 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2077 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2078 MLX5_FLOW_LAYER_OUTER_L3; 2079 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2080 MLX5_FLOW_LAYER_OUTER_L4; 2081 int ret; 2082 uint8_t next_proto = 0xFF; 2083 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2084 MLX5_FLOW_LAYER_OUTER_VLAN | 2085 MLX5_FLOW_LAYER_INNER_VLAN); 2086 2087 if ((last_item & l2_vlan) && ether_type && 2088 ether_type != RTE_ETHER_TYPE_IPV4) 2089 return rte_flow_error_set(error, EINVAL, 2090 RTE_FLOW_ERROR_TYPE_ITEM, item, 2091 "IPv4 cannot follow L2/VLAN layer " 2092 "which ether type is not IPv4"); 2093 if (item_flags & MLX5_FLOW_LAYER_IPIP) { 2094 if (mask && spec) 2095 next_proto = mask->hdr.next_proto_id & 2096 spec->hdr.next_proto_id; 2097 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2098 return rte_flow_error_set(error, EINVAL, 2099 RTE_FLOW_ERROR_TYPE_ITEM, 2100 item, 2101 "multiple tunnel " 2102 "not supported"); 2103 } 2104 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2105 return rte_flow_error_set(error, EINVAL, 2106 RTE_FLOW_ERROR_TYPE_ITEM, item, 2107 "wrong tunnel type - IPv6 specified " 2108 "but IPv4 item provided"); 2109 if (item_flags & l3m) 2110 return rte_flow_error_set(error, ENOTSUP, 2111 RTE_FLOW_ERROR_TYPE_ITEM, item, 2112 "multiple L3 layers not supported"); 2113 else if (item_flags & l4m) 2114 return rte_flow_error_set(error, EINVAL, 2115 RTE_FLOW_ERROR_TYPE_ITEM, item, 2116 "L3 cannot follow an L4 layer."); 2117 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2118 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2119 return rte_flow_error_set(error, EINVAL, 2120 RTE_FLOW_ERROR_TYPE_ITEM, item, 2121 "L3 cannot follow an NVGRE layer."); 2122 if (!mask) 2123 mask = &rte_flow_item_ipv4_mask; 2124 else if (mask->hdr.next_proto_id != 0 && 2125 mask->hdr.next_proto_id != 0xff) 2126 return rte_flow_error_set(error, EINVAL, 2127 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2128 "partial mask is not supported" 2129 " for protocol"); 2130 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2131 acc_mask ? (const uint8_t *)acc_mask 2132 : (const uint8_t *)&nic_mask, 2133 sizeof(struct rte_flow_item_ipv4), 2134 range_accepted, error); 2135 if (ret < 0) 2136 return ret; 2137 return 0; 2138 } 2139 2140 /** 2141 * Validate IPV6 item. 2142 * 2143 * @param[in] item 2144 * Item specification. 2145 * @param[in] item_flags 2146 * Bit-fields that holds the items detected until now. 2147 * @param[in] last_item 2148 * Previous validated item in the pattern items. 2149 * @param[in] ether_type 2150 * Type in the ethernet layer header (including dot1q). 2151 * @param[in] acc_mask 2152 * Acceptable mask, if NULL default internal default mask 2153 * will be used to check whether item fields are supported. 2154 * @param[out] error 2155 * Pointer to error structure. 2156 * 2157 * @return 2158 * 0 on success, a negative errno value otherwise and rte_errno is set. 2159 */ 2160 int 2161 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2162 uint64_t item_flags, 2163 uint64_t last_item, 2164 uint16_t ether_type, 2165 const struct rte_flow_item_ipv6 *acc_mask, 2166 struct rte_flow_error *error) 2167 { 2168 const struct rte_flow_item_ipv6 *mask = item->mask; 2169 const struct rte_flow_item_ipv6 *spec = item->spec; 2170 const struct rte_flow_item_ipv6 nic_mask = { 2171 .hdr = { 2172 .src_addr = 2173 "\xff\xff\xff\xff\xff\xff\xff\xff" 2174 "\xff\xff\xff\xff\xff\xff\xff\xff", 2175 .dst_addr = 2176 "\xff\xff\xff\xff\xff\xff\xff\xff" 2177 "\xff\xff\xff\xff\xff\xff\xff\xff", 2178 .vtc_flow = RTE_BE32(0xffffffff), 2179 .proto = 0xff, 2180 }, 2181 }; 2182 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2183 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2184 MLX5_FLOW_LAYER_OUTER_L3; 2185 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2186 MLX5_FLOW_LAYER_OUTER_L4; 2187 int ret; 2188 uint8_t next_proto = 0xFF; 2189 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2190 MLX5_FLOW_LAYER_OUTER_VLAN | 2191 MLX5_FLOW_LAYER_INNER_VLAN); 2192 2193 if ((last_item & l2_vlan) && ether_type && 2194 ether_type != RTE_ETHER_TYPE_IPV6) 2195 return rte_flow_error_set(error, EINVAL, 2196 RTE_FLOW_ERROR_TYPE_ITEM, item, 2197 "IPv6 cannot follow L2/VLAN layer " 2198 "which ether type is not IPv6"); 2199 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2200 next_proto = spec->hdr.proto; 2201 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) { 2202 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2203 return rte_flow_error_set(error, EINVAL, 2204 RTE_FLOW_ERROR_TYPE_ITEM, 2205 item, 2206 "multiple tunnel " 2207 "not supported"); 2208 } 2209 if (next_proto == IPPROTO_HOPOPTS || 2210 next_proto == IPPROTO_ROUTING || 2211 next_proto == IPPROTO_FRAGMENT || 2212 next_proto == IPPROTO_ESP || 2213 next_proto == IPPROTO_AH || 2214 next_proto == IPPROTO_DSTOPTS) 2215 return rte_flow_error_set(error, EINVAL, 2216 RTE_FLOW_ERROR_TYPE_ITEM, item, 2217 "IPv6 proto (next header) should " 2218 "not be set as extension header"); 2219 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2220 return rte_flow_error_set(error, EINVAL, 2221 RTE_FLOW_ERROR_TYPE_ITEM, item, 2222 "wrong tunnel type - IPv4 specified " 2223 "but IPv6 item provided"); 2224 if (item_flags & l3m) 2225 return rte_flow_error_set(error, ENOTSUP, 2226 RTE_FLOW_ERROR_TYPE_ITEM, item, 2227 "multiple L3 layers not supported"); 2228 else if (item_flags & l4m) 2229 return rte_flow_error_set(error, EINVAL, 2230 RTE_FLOW_ERROR_TYPE_ITEM, item, 2231 "L3 cannot follow an L4 layer."); 2232 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2233 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2234 return rte_flow_error_set(error, EINVAL, 2235 RTE_FLOW_ERROR_TYPE_ITEM, item, 2236 "L3 cannot follow an NVGRE layer."); 2237 if (!mask) 2238 mask = &rte_flow_item_ipv6_mask; 2239 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2240 acc_mask ? (const uint8_t *)acc_mask 2241 : (const uint8_t *)&nic_mask, 2242 sizeof(struct rte_flow_item_ipv6), 2243 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2244 if (ret < 0) 2245 return ret; 2246 return 0; 2247 } 2248 2249 /** 2250 * Validate UDP item. 2251 * 2252 * @param[in] item 2253 * Item specification. 2254 * @param[in] item_flags 2255 * Bit-fields that holds the items detected until now. 2256 * @param[in] target_protocol 2257 * The next protocol in the previous item. 2258 * @param[in] flow_mask 2259 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2260 * @param[out] error 2261 * Pointer to error structure. 2262 * 2263 * @return 2264 * 0 on success, a negative errno value otherwise and rte_errno is set. 2265 */ 2266 int 2267 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2268 uint64_t item_flags, 2269 uint8_t target_protocol, 2270 struct rte_flow_error *error) 2271 { 2272 const struct rte_flow_item_udp *mask = item->mask; 2273 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2274 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2275 MLX5_FLOW_LAYER_OUTER_L3; 2276 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2277 MLX5_FLOW_LAYER_OUTER_L4; 2278 int ret; 2279 2280 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2281 return rte_flow_error_set(error, EINVAL, 2282 RTE_FLOW_ERROR_TYPE_ITEM, item, 2283 "protocol filtering not compatible" 2284 " with UDP layer"); 2285 if (!(item_flags & l3m)) 2286 return rte_flow_error_set(error, EINVAL, 2287 RTE_FLOW_ERROR_TYPE_ITEM, item, 2288 "L3 is mandatory to filter on L4"); 2289 if (item_flags & l4m) 2290 return rte_flow_error_set(error, EINVAL, 2291 RTE_FLOW_ERROR_TYPE_ITEM, item, 2292 "multiple L4 layers not supported"); 2293 if (!mask) 2294 mask = &rte_flow_item_udp_mask; 2295 ret = mlx5_flow_item_acceptable 2296 (item, (const uint8_t *)mask, 2297 (const uint8_t *)&rte_flow_item_udp_mask, 2298 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2299 error); 2300 if (ret < 0) 2301 return ret; 2302 return 0; 2303 } 2304 2305 /** 2306 * Validate TCP item. 2307 * 2308 * @param[in] item 2309 * Item specification. 2310 * @param[in] item_flags 2311 * Bit-fields that holds the items detected until now. 2312 * @param[in] target_protocol 2313 * The next protocol in the previous item. 2314 * @param[out] error 2315 * Pointer to error structure. 2316 * 2317 * @return 2318 * 0 on success, a negative errno value otherwise and rte_errno is set. 2319 */ 2320 int 2321 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2322 uint64_t item_flags, 2323 uint8_t target_protocol, 2324 const struct rte_flow_item_tcp *flow_mask, 2325 struct rte_flow_error *error) 2326 { 2327 const struct rte_flow_item_tcp *mask = item->mask; 2328 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2329 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2330 MLX5_FLOW_LAYER_OUTER_L3; 2331 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2332 MLX5_FLOW_LAYER_OUTER_L4; 2333 int ret; 2334 2335 MLX5_ASSERT(flow_mask); 2336 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2337 return rte_flow_error_set(error, EINVAL, 2338 RTE_FLOW_ERROR_TYPE_ITEM, item, 2339 "protocol filtering not compatible" 2340 " with TCP layer"); 2341 if (!(item_flags & l3m)) 2342 return rte_flow_error_set(error, EINVAL, 2343 RTE_FLOW_ERROR_TYPE_ITEM, item, 2344 "L3 is mandatory to filter on L4"); 2345 if (item_flags & l4m) 2346 return rte_flow_error_set(error, EINVAL, 2347 RTE_FLOW_ERROR_TYPE_ITEM, item, 2348 "multiple L4 layers not supported"); 2349 if (!mask) 2350 mask = &rte_flow_item_tcp_mask; 2351 ret = mlx5_flow_item_acceptable 2352 (item, (const uint8_t *)mask, 2353 (const uint8_t *)flow_mask, 2354 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2355 error); 2356 if (ret < 0) 2357 return ret; 2358 return 0; 2359 } 2360 2361 /** 2362 * Validate VXLAN item. 2363 * 2364 * @param[in] item 2365 * Item specification. 2366 * @param[in] item_flags 2367 * Bit-fields that holds the items detected until now. 2368 * @param[in] target_protocol 2369 * The next protocol in the previous item. 2370 * @param[out] error 2371 * Pointer to error structure. 2372 * 2373 * @return 2374 * 0 on success, a negative errno value otherwise and rte_errno is set. 2375 */ 2376 int 2377 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 2378 uint64_t item_flags, 2379 struct rte_flow_error *error) 2380 { 2381 const struct rte_flow_item_vxlan *spec = item->spec; 2382 const struct rte_flow_item_vxlan *mask = item->mask; 2383 int ret; 2384 union vni { 2385 uint32_t vlan_id; 2386 uint8_t vni[4]; 2387 } id = { .vlan_id = 0, }; 2388 2389 2390 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2391 return rte_flow_error_set(error, ENOTSUP, 2392 RTE_FLOW_ERROR_TYPE_ITEM, item, 2393 "multiple tunnel layers not" 2394 " supported"); 2395 /* 2396 * Verify only UDPv4 is present as defined in 2397 * https://tools.ietf.org/html/rfc7348 2398 */ 2399 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2400 return rte_flow_error_set(error, EINVAL, 2401 RTE_FLOW_ERROR_TYPE_ITEM, item, 2402 "no outer UDP layer found"); 2403 if (!mask) 2404 mask = &rte_flow_item_vxlan_mask; 2405 ret = mlx5_flow_item_acceptable 2406 (item, (const uint8_t *)mask, 2407 (const uint8_t *)&rte_flow_item_vxlan_mask, 2408 sizeof(struct rte_flow_item_vxlan), 2409 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2410 if (ret < 0) 2411 return ret; 2412 if (spec) { 2413 memcpy(&id.vni[1], spec->vni, 3); 2414 memcpy(&id.vni[1], mask->vni, 3); 2415 } 2416 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2417 return rte_flow_error_set(error, ENOTSUP, 2418 RTE_FLOW_ERROR_TYPE_ITEM, item, 2419 "VXLAN tunnel must be fully defined"); 2420 return 0; 2421 } 2422 2423 /** 2424 * Validate VXLAN_GPE item. 2425 * 2426 * @param[in] item 2427 * Item specification. 2428 * @param[in] item_flags 2429 * Bit-fields that holds the items detected until now. 2430 * @param[in] priv 2431 * Pointer to the private data structure. 2432 * @param[in] target_protocol 2433 * The next protocol in the previous item. 2434 * @param[out] error 2435 * Pointer to error structure. 2436 * 2437 * @return 2438 * 0 on success, a negative errno value otherwise and rte_errno is set. 2439 */ 2440 int 2441 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2442 uint64_t item_flags, 2443 struct rte_eth_dev *dev, 2444 struct rte_flow_error *error) 2445 { 2446 struct mlx5_priv *priv = dev->data->dev_private; 2447 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2448 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2449 int ret; 2450 union vni { 2451 uint32_t vlan_id; 2452 uint8_t vni[4]; 2453 } id = { .vlan_id = 0, }; 2454 2455 if (!priv->config.l3_vxlan_en) 2456 return rte_flow_error_set(error, ENOTSUP, 2457 RTE_FLOW_ERROR_TYPE_ITEM, item, 2458 "L3 VXLAN is not enabled by device" 2459 " parameter and/or not configured in" 2460 " firmware"); 2461 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2462 return rte_flow_error_set(error, ENOTSUP, 2463 RTE_FLOW_ERROR_TYPE_ITEM, item, 2464 "multiple tunnel layers not" 2465 " supported"); 2466 /* 2467 * Verify only UDPv4 is present as defined in 2468 * https://tools.ietf.org/html/rfc7348 2469 */ 2470 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2471 return rte_flow_error_set(error, EINVAL, 2472 RTE_FLOW_ERROR_TYPE_ITEM, item, 2473 "no outer UDP layer found"); 2474 if (!mask) 2475 mask = &rte_flow_item_vxlan_gpe_mask; 2476 ret = mlx5_flow_item_acceptable 2477 (item, (const uint8_t *)mask, 2478 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2479 sizeof(struct rte_flow_item_vxlan_gpe), 2480 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2481 if (ret < 0) 2482 return ret; 2483 if (spec) { 2484 if (spec->protocol) 2485 return rte_flow_error_set(error, ENOTSUP, 2486 RTE_FLOW_ERROR_TYPE_ITEM, 2487 item, 2488 "VxLAN-GPE protocol" 2489 " not supported"); 2490 memcpy(&id.vni[1], spec->vni, 3); 2491 memcpy(&id.vni[1], mask->vni, 3); 2492 } 2493 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2494 return rte_flow_error_set(error, ENOTSUP, 2495 RTE_FLOW_ERROR_TYPE_ITEM, item, 2496 "VXLAN-GPE tunnel must be fully" 2497 " defined"); 2498 return 0; 2499 } 2500 /** 2501 * Validate GRE Key item. 2502 * 2503 * @param[in] item 2504 * Item specification. 2505 * @param[in] item_flags 2506 * Bit flags to mark detected items. 2507 * @param[in] gre_item 2508 * Pointer to gre_item 2509 * @param[out] error 2510 * Pointer to error structure. 2511 * 2512 * @return 2513 * 0 on success, a negative errno value otherwise and rte_errno is set. 2514 */ 2515 int 2516 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2517 uint64_t item_flags, 2518 const struct rte_flow_item *gre_item, 2519 struct rte_flow_error *error) 2520 { 2521 const rte_be32_t *mask = item->mask; 2522 int ret = 0; 2523 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2524 const struct rte_flow_item_gre *gre_spec; 2525 const struct rte_flow_item_gre *gre_mask; 2526 2527 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2528 return rte_flow_error_set(error, ENOTSUP, 2529 RTE_FLOW_ERROR_TYPE_ITEM, item, 2530 "Multiple GRE key not support"); 2531 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2532 return rte_flow_error_set(error, ENOTSUP, 2533 RTE_FLOW_ERROR_TYPE_ITEM, item, 2534 "No preceding GRE header"); 2535 if (item_flags & MLX5_FLOW_LAYER_INNER) 2536 return rte_flow_error_set(error, ENOTSUP, 2537 RTE_FLOW_ERROR_TYPE_ITEM, item, 2538 "GRE key following a wrong item"); 2539 gre_mask = gre_item->mask; 2540 if (!gre_mask) 2541 gre_mask = &rte_flow_item_gre_mask; 2542 gre_spec = gre_item->spec; 2543 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2544 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2545 return rte_flow_error_set(error, EINVAL, 2546 RTE_FLOW_ERROR_TYPE_ITEM, item, 2547 "Key bit must be on"); 2548 2549 if (!mask) 2550 mask = &gre_key_default_mask; 2551 ret = mlx5_flow_item_acceptable 2552 (item, (const uint8_t *)mask, 2553 (const uint8_t *)&gre_key_default_mask, 2554 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2555 return ret; 2556 } 2557 2558 /** 2559 * Validate GRE item. 2560 * 2561 * @param[in] item 2562 * Item specification. 2563 * @param[in] item_flags 2564 * Bit flags to mark detected items. 2565 * @param[in] target_protocol 2566 * The next protocol in the previous item. 2567 * @param[out] error 2568 * Pointer to error structure. 2569 * 2570 * @return 2571 * 0 on success, a negative errno value otherwise and rte_errno is set. 2572 */ 2573 int 2574 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2575 uint64_t item_flags, 2576 uint8_t target_protocol, 2577 struct rte_flow_error *error) 2578 { 2579 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2580 const struct rte_flow_item_gre *mask = item->mask; 2581 int ret; 2582 const struct rte_flow_item_gre nic_mask = { 2583 .c_rsvd0_ver = RTE_BE16(0xB000), 2584 .protocol = RTE_BE16(UINT16_MAX), 2585 }; 2586 2587 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2588 return rte_flow_error_set(error, EINVAL, 2589 RTE_FLOW_ERROR_TYPE_ITEM, item, 2590 "protocol filtering not compatible" 2591 " with this GRE layer"); 2592 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2593 return rte_flow_error_set(error, ENOTSUP, 2594 RTE_FLOW_ERROR_TYPE_ITEM, item, 2595 "multiple tunnel layers not" 2596 " supported"); 2597 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2598 return rte_flow_error_set(error, ENOTSUP, 2599 RTE_FLOW_ERROR_TYPE_ITEM, item, 2600 "L3 Layer is missing"); 2601 if (!mask) 2602 mask = &rte_flow_item_gre_mask; 2603 ret = mlx5_flow_item_acceptable 2604 (item, (const uint8_t *)mask, 2605 (const uint8_t *)&nic_mask, 2606 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2607 error); 2608 if (ret < 0) 2609 return ret; 2610 #ifndef HAVE_MLX5DV_DR 2611 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2612 if (spec && (spec->protocol & mask->protocol)) 2613 return rte_flow_error_set(error, ENOTSUP, 2614 RTE_FLOW_ERROR_TYPE_ITEM, item, 2615 "without MPLS support the" 2616 " specification cannot be used for" 2617 " filtering"); 2618 #endif 2619 #endif 2620 return 0; 2621 } 2622 2623 /** 2624 * Validate Geneve item. 2625 * 2626 * @param[in] item 2627 * Item specification. 2628 * @param[in] itemFlags 2629 * Bit-fields that holds the items detected until now. 2630 * @param[in] enPriv 2631 * Pointer to the private data structure. 2632 * @param[out] error 2633 * Pointer to error structure. 2634 * 2635 * @return 2636 * 0 on success, a negative errno value otherwise and rte_errno is set. 2637 */ 2638 2639 int 2640 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2641 uint64_t item_flags, 2642 struct rte_eth_dev *dev, 2643 struct rte_flow_error *error) 2644 { 2645 struct mlx5_priv *priv = dev->data->dev_private; 2646 const struct rte_flow_item_geneve *spec = item->spec; 2647 const struct rte_flow_item_geneve *mask = item->mask; 2648 int ret; 2649 uint16_t gbhdr; 2650 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2651 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2652 const struct rte_flow_item_geneve nic_mask = { 2653 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2654 .vni = "\xff\xff\xff", 2655 .protocol = RTE_BE16(UINT16_MAX), 2656 }; 2657 2658 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2659 return rte_flow_error_set(error, ENOTSUP, 2660 RTE_FLOW_ERROR_TYPE_ITEM, item, 2661 "L3 Geneve is not enabled by device" 2662 " parameter and/or not configured in" 2663 " firmware"); 2664 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2665 return rte_flow_error_set(error, ENOTSUP, 2666 RTE_FLOW_ERROR_TYPE_ITEM, item, 2667 "multiple tunnel layers not" 2668 " supported"); 2669 /* 2670 * Verify only UDPv4 is present as defined in 2671 * https://tools.ietf.org/html/rfc7348 2672 */ 2673 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2674 return rte_flow_error_set(error, EINVAL, 2675 RTE_FLOW_ERROR_TYPE_ITEM, item, 2676 "no outer UDP layer found"); 2677 if (!mask) 2678 mask = &rte_flow_item_geneve_mask; 2679 ret = mlx5_flow_item_acceptable 2680 (item, (const uint8_t *)mask, 2681 (const uint8_t *)&nic_mask, 2682 sizeof(struct rte_flow_item_geneve), 2683 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2684 if (ret) 2685 return ret; 2686 if (spec) { 2687 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2688 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2689 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2690 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2691 return rte_flow_error_set(error, ENOTSUP, 2692 RTE_FLOW_ERROR_TYPE_ITEM, 2693 item, 2694 "Geneve protocol unsupported" 2695 " fields are being used"); 2696 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2697 return rte_flow_error_set 2698 (error, ENOTSUP, 2699 RTE_FLOW_ERROR_TYPE_ITEM, 2700 item, 2701 "Unsupported Geneve options length"); 2702 } 2703 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2704 return rte_flow_error_set 2705 (error, ENOTSUP, 2706 RTE_FLOW_ERROR_TYPE_ITEM, item, 2707 "Geneve tunnel must be fully defined"); 2708 return 0; 2709 } 2710 2711 /** 2712 * Validate MPLS item. 2713 * 2714 * @param[in] dev 2715 * Pointer to the rte_eth_dev structure. 2716 * @param[in] item 2717 * Item specification. 2718 * @param[in] item_flags 2719 * Bit-fields that holds the items detected until now. 2720 * @param[in] prev_layer 2721 * The protocol layer indicated in previous item. 2722 * @param[out] error 2723 * Pointer to error structure. 2724 * 2725 * @return 2726 * 0 on success, a negative errno value otherwise and rte_errno is set. 2727 */ 2728 int 2729 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 2730 const struct rte_flow_item *item __rte_unused, 2731 uint64_t item_flags __rte_unused, 2732 uint64_t prev_layer __rte_unused, 2733 struct rte_flow_error *error) 2734 { 2735 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 2736 const struct rte_flow_item_mpls *mask = item->mask; 2737 struct mlx5_priv *priv = dev->data->dev_private; 2738 int ret; 2739 2740 if (!priv->config.mpls_en) 2741 return rte_flow_error_set(error, ENOTSUP, 2742 RTE_FLOW_ERROR_TYPE_ITEM, item, 2743 "MPLS not supported or" 2744 " disabled in firmware" 2745 " configuration."); 2746 /* MPLS over IP, UDP, GRE is allowed */ 2747 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 | 2748 MLX5_FLOW_LAYER_OUTER_L4_UDP | 2749 MLX5_FLOW_LAYER_GRE))) 2750 return rte_flow_error_set(error, EINVAL, 2751 RTE_FLOW_ERROR_TYPE_ITEM, item, 2752 "protocol filtering not compatible" 2753 " with MPLS layer"); 2754 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 2755 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 2756 !(item_flags & MLX5_FLOW_LAYER_GRE)) 2757 return rte_flow_error_set(error, ENOTSUP, 2758 RTE_FLOW_ERROR_TYPE_ITEM, item, 2759 "multiple tunnel layers not" 2760 " supported"); 2761 if (!mask) 2762 mask = &rte_flow_item_mpls_mask; 2763 ret = mlx5_flow_item_acceptable 2764 (item, (const uint8_t *)mask, 2765 (const uint8_t *)&rte_flow_item_mpls_mask, 2766 sizeof(struct rte_flow_item_mpls), 2767 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2768 if (ret < 0) 2769 return ret; 2770 return 0; 2771 #else 2772 return rte_flow_error_set(error, ENOTSUP, 2773 RTE_FLOW_ERROR_TYPE_ITEM, item, 2774 "MPLS is not supported by Verbs, please" 2775 " update."); 2776 #endif 2777 } 2778 2779 /** 2780 * Validate NVGRE item. 2781 * 2782 * @param[in] item 2783 * Item specification. 2784 * @param[in] item_flags 2785 * Bit flags to mark detected items. 2786 * @param[in] target_protocol 2787 * The next protocol in the previous item. 2788 * @param[out] error 2789 * Pointer to error structure. 2790 * 2791 * @return 2792 * 0 on success, a negative errno value otherwise and rte_errno is set. 2793 */ 2794 int 2795 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 2796 uint64_t item_flags, 2797 uint8_t target_protocol, 2798 struct rte_flow_error *error) 2799 { 2800 const struct rte_flow_item_nvgre *mask = item->mask; 2801 int ret; 2802 2803 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2804 return rte_flow_error_set(error, EINVAL, 2805 RTE_FLOW_ERROR_TYPE_ITEM, item, 2806 "protocol filtering not compatible" 2807 " with this GRE layer"); 2808 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2809 return rte_flow_error_set(error, ENOTSUP, 2810 RTE_FLOW_ERROR_TYPE_ITEM, item, 2811 "multiple tunnel layers not" 2812 " supported"); 2813 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2814 return rte_flow_error_set(error, ENOTSUP, 2815 RTE_FLOW_ERROR_TYPE_ITEM, item, 2816 "L3 Layer is missing"); 2817 if (!mask) 2818 mask = &rte_flow_item_nvgre_mask; 2819 ret = mlx5_flow_item_acceptable 2820 (item, (const uint8_t *)mask, 2821 (const uint8_t *)&rte_flow_item_nvgre_mask, 2822 sizeof(struct rte_flow_item_nvgre), 2823 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2824 if (ret < 0) 2825 return ret; 2826 return 0; 2827 } 2828 2829 /** 2830 * Validate eCPRI item. 2831 * 2832 * @param[in] item 2833 * Item specification. 2834 * @param[in] item_flags 2835 * Bit-fields that holds the items detected until now. 2836 * @param[in] last_item 2837 * Previous validated item in the pattern items. 2838 * @param[in] ether_type 2839 * Type in the ethernet layer header (including dot1q). 2840 * @param[in] acc_mask 2841 * Acceptable mask, if NULL default internal default mask 2842 * will be used to check whether item fields are supported. 2843 * @param[out] error 2844 * Pointer to error structure. 2845 * 2846 * @return 2847 * 0 on success, a negative errno value otherwise and rte_errno is set. 2848 */ 2849 int 2850 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 2851 uint64_t item_flags, 2852 uint64_t last_item, 2853 uint16_t ether_type, 2854 const struct rte_flow_item_ecpri *acc_mask, 2855 struct rte_flow_error *error) 2856 { 2857 const struct rte_flow_item_ecpri *mask = item->mask; 2858 const struct rte_flow_item_ecpri nic_mask = { 2859 .hdr = { 2860 .common = { 2861 .u32 = 2862 RTE_BE32(((const struct rte_ecpri_common_hdr) { 2863 .type = 0xFF, 2864 }).u32), 2865 }, 2866 .dummy[0] = 0xFFFFFFFF, 2867 }, 2868 }; 2869 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 2870 MLX5_FLOW_LAYER_OUTER_VLAN); 2871 struct rte_flow_item_ecpri mask_lo; 2872 2873 if ((last_item & outer_l2_vlan) && ether_type && 2874 ether_type != RTE_ETHER_TYPE_ECPRI) 2875 return rte_flow_error_set(error, EINVAL, 2876 RTE_FLOW_ERROR_TYPE_ITEM, item, 2877 "eCPRI cannot follow L2/VLAN layer " 2878 "which ether type is not 0xAEFE."); 2879 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2880 return rte_flow_error_set(error, EINVAL, 2881 RTE_FLOW_ERROR_TYPE_ITEM, item, 2882 "eCPRI with tunnel is not supported " 2883 "right now."); 2884 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 2885 return rte_flow_error_set(error, ENOTSUP, 2886 RTE_FLOW_ERROR_TYPE_ITEM, item, 2887 "multiple L3 layers not supported"); 2888 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 2889 return rte_flow_error_set(error, EINVAL, 2890 RTE_FLOW_ERROR_TYPE_ITEM, item, 2891 "eCPRI cannot follow a TCP layer."); 2892 /* In specification, eCPRI could be over UDP layer. */ 2893 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 2894 return rte_flow_error_set(error, EINVAL, 2895 RTE_FLOW_ERROR_TYPE_ITEM, item, 2896 "eCPRI over UDP layer is not yet " 2897 "supported right now."); 2898 /* Mask for type field in common header could be zero. */ 2899 if (!mask) 2900 mask = &rte_flow_item_ecpri_mask; 2901 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 2902 /* Input mask is in big-endian format. */ 2903 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 2904 return rte_flow_error_set(error, EINVAL, 2905 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2906 "partial mask is not supported " 2907 "for protocol"); 2908 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 2909 return rte_flow_error_set(error, EINVAL, 2910 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2911 "message header mask must be after " 2912 "a type mask"); 2913 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2914 acc_mask ? (const uint8_t *)acc_mask 2915 : (const uint8_t *)&nic_mask, 2916 sizeof(struct rte_flow_item_ecpri), 2917 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2918 } 2919 2920 /** 2921 * Release resource related QUEUE/RSS action split. 2922 * 2923 * @param dev 2924 * Pointer to Ethernet device. 2925 * @param flow 2926 * Flow to release id's from. 2927 */ 2928 static void 2929 flow_mreg_split_qrss_release(struct rte_eth_dev *dev, 2930 struct rte_flow *flow) 2931 { 2932 struct mlx5_priv *priv = dev->data->dev_private; 2933 uint32_t handle_idx; 2934 struct mlx5_flow_handle *dev_handle; 2935 2936 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 2937 handle_idx, dev_handle, next) 2938 if (dev_handle->split_flow_id) 2939 mlx5_ipool_free(priv->sh->ipool 2940 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 2941 dev_handle->split_flow_id); 2942 } 2943 2944 static int 2945 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 2946 const struct rte_flow_attr *attr __rte_unused, 2947 const struct rte_flow_item items[] __rte_unused, 2948 const struct rte_flow_action actions[] __rte_unused, 2949 bool external __rte_unused, 2950 int hairpin __rte_unused, 2951 struct rte_flow_error *error) 2952 { 2953 return rte_flow_error_set(error, ENOTSUP, 2954 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2955 } 2956 2957 static struct mlx5_flow * 2958 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 2959 const struct rte_flow_attr *attr __rte_unused, 2960 const struct rte_flow_item items[] __rte_unused, 2961 const struct rte_flow_action actions[] __rte_unused, 2962 struct rte_flow_error *error) 2963 { 2964 rte_flow_error_set(error, ENOTSUP, 2965 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2966 return NULL; 2967 } 2968 2969 static int 2970 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 2971 struct mlx5_flow *dev_flow __rte_unused, 2972 const struct rte_flow_attr *attr __rte_unused, 2973 const struct rte_flow_item items[] __rte_unused, 2974 const struct rte_flow_action actions[] __rte_unused, 2975 struct rte_flow_error *error) 2976 { 2977 return rte_flow_error_set(error, ENOTSUP, 2978 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2979 } 2980 2981 static int 2982 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 2983 struct rte_flow *flow __rte_unused, 2984 struct rte_flow_error *error) 2985 { 2986 return rte_flow_error_set(error, ENOTSUP, 2987 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2988 } 2989 2990 static void 2991 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 2992 struct rte_flow *flow __rte_unused) 2993 { 2994 } 2995 2996 static void 2997 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 2998 struct rte_flow *flow __rte_unused) 2999 { 3000 } 3001 3002 static int 3003 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3004 struct rte_flow *flow __rte_unused, 3005 const struct rte_flow_action *actions __rte_unused, 3006 void *data __rte_unused, 3007 struct rte_flow_error *error) 3008 { 3009 return rte_flow_error_set(error, ENOTSUP, 3010 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3011 } 3012 3013 static int 3014 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused, 3015 uint32_t domains __rte_unused, 3016 uint32_t flags __rte_unused) 3017 { 3018 return 0; 3019 } 3020 3021 /* Void driver to protect from null pointer reference. */ 3022 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3023 .validate = flow_null_validate, 3024 .prepare = flow_null_prepare, 3025 .translate = flow_null_translate, 3026 .apply = flow_null_apply, 3027 .remove = flow_null_remove, 3028 .destroy = flow_null_destroy, 3029 .query = flow_null_query, 3030 .sync_domain = flow_null_sync_domain, 3031 }; 3032 3033 /** 3034 * Select flow driver type according to flow attributes and device 3035 * configuration. 3036 * 3037 * @param[in] dev 3038 * Pointer to the dev structure. 3039 * @param[in] attr 3040 * Pointer to the flow attributes. 3041 * 3042 * @return 3043 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3044 */ 3045 static enum mlx5_flow_drv_type 3046 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3047 { 3048 struct mlx5_priv *priv = dev->data->dev_private; 3049 /* The OS can determine first a specific flow type (DV, VERBS) */ 3050 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3051 3052 if (type != MLX5_FLOW_TYPE_MAX) 3053 return type; 3054 /* If no OS specific type - continue with DV/VERBS selection */ 3055 if (attr->transfer && priv->config.dv_esw_en) 3056 type = MLX5_FLOW_TYPE_DV; 3057 if (!attr->transfer) 3058 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3059 MLX5_FLOW_TYPE_VERBS; 3060 return type; 3061 } 3062 3063 #define flow_get_drv_ops(type) flow_drv_ops[type] 3064 3065 /** 3066 * Flow driver validation API. This abstracts calling driver specific functions. 3067 * The type of flow driver is determined according to flow attributes. 3068 * 3069 * @param[in] dev 3070 * Pointer to the dev structure. 3071 * @param[in] attr 3072 * Pointer to the flow attributes. 3073 * @param[in] items 3074 * Pointer to the list of items. 3075 * @param[in] actions 3076 * Pointer to the list of actions. 3077 * @param[in] external 3078 * This flow rule is created by request external to PMD. 3079 * @param[in] hairpin 3080 * Number of hairpin TX actions, 0 means classic flow. 3081 * @param[out] error 3082 * Pointer to the error structure. 3083 * 3084 * @return 3085 * 0 on success, a negative errno value otherwise and rte_errno is set. 3086 */ 3087 static inline int 3088 flow_drv_validate(struct rte_eth_dev *dev, 3089 const struct rte_flow_attr *attr, 3090 const struct rte_flow_item items[], 3091 const struct rte_flow_action actions[], 3092 bool external, int hairpin, struct rte_flow_error *error) 3093 { 3094 const struct mlx5_flow_driver_ops *fops; 3095 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3096 3097 fops = flow_get_drv_ops(type); 3098 return fops->validate(dev, attr, items, actions, external, 3099 hairpin, error); 3100 } 3101 3102 /** 3103 * Flow driver preparation API. This abstracts calling driver specific 3104 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3105 * calculates the size of memory required for device flow, allocates the memory, 3106 * initializes the device flow and returns the pointer. 3107 * 3108 * @note 3109 * This function initializes device flow structure such as dv or verbs in 3110 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3111 * rest. For example, adding returning device flow to flow->dev_flow list and 3112 * setting backward reference to the flow should be done out of this function. 3113 * layers field is not filled either. 3114 * 3115 * @param[in] dev 3116 * Pointer to the dev structure. 3117 * @param[in] attr 3118 * Pointer to the flow attributes. 3119 * @param[in] items 3120 * Pointer to the list of items. 3121 * @param[in] actions 3122 * Pointer to the list of actions. 3123 * @param[in] flow_idx 3124 * This memory pool index to the flow. 3125 * @param[out] error 3126 * Pointer to the error structure. 3127 * 3128 * @return 3129 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3130 */ 3131 static inline struct mlx5_flow * 3132 flow_drv_prepare(struct rte_eth_dev *dev, 3133 const struct rte_flow *flow, 3134 const struct rte_flow_attr *attr, 3135 const struct rte_flow_item items[], 3136 const struct rte_flow_action actions[], 3137 uint32_t flow_idx, 3138 struct rte_flow_error *error) 3139 { 3140 const struct mlx5_flow_driver_ops *fops; 3141 enum mlx5_flow_drv_type type = flow->drv_type; 3142 struct mlx5_flow *mlx5_flow = NULL; 3143 3144 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3145 fops = flow_get_drv_ops(type); 3146 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3147 if (mlx5_flow) 3148 mlx5_flow->flow_idx = flow_idx; 3149 return mlx5_flow; 3150 } 3151 3152 /** 3153 * Flow driver translation API. This abstracts calling driver specific 3154 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3155 * translates a generic flow into a driver flow. flow_drv_prepare() must 3156 * precede. 3157 * 3158 * @note 3159 * dev_flow->layers could be filled as a result of parsing during translation 3160 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3161 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3162 * flow->actions could be overwritten even though all the expanded dev_flows 3163 * have the same actions. 3164 * 3165 * @param[in] dev 3166 * Pointer to the rte dev structure. 3167 * @param[in, out] dev_flow 3168 * Pointer to the mlx5 flow. 3169 * @param[in] attr 3170 * Pointer to the flow attributes. 3171 * @param[in] items 3172 * Pointer to the list of items. 3173 * @param[in] actions 3174 * Pointer to the list of actions. 3175 * @param[out] error 3176 * Pointer to the error structure. 3177 * 3178 * @return 3179 * 0 on success, a negative errno value otherwise and rte_errno is set. 3180 */ 3181 static inline int 3182 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3183 const struct rte_flow_attr *attr, 3184 const struct rte_flow_item items[], 3185 const struct rte_flow_action actions[], 3186 struct rte_flow_error *error) 3187 { 3188 const struct mlx5_flow_driver_ops *fops; 3189 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3190 3191 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3192 fops = flow_get_drv_ops(type); 3193 return fops->translate(dev, dev_flow, attr, items, actions, error); 3194 } 3195 3196 /** 3197 * Flow driver apply API. This abstracts calling driver specific functions. 3198 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3199 * translated driver flows on to device. flow_drv_translate() must precede. 3200 * 3201 * @param[in] dev 3202 * Pointer to Ethernet device structure. 3203 * @param[in, out] flow 3204 * Pointer to flow structure. 3205 * @param[out] error 3206 * Pointer to error structure. 3207 * 3208 * @return 3209 * 0 on success, a negative errno value otherwise and rte_errno is set. 3210 */ 3211 static inline int 3212 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3213 struct rte_flow_error *error) 3214 { 3215 const struct mlx5_flow_driver_ops *fops; 3216 enum mlx5_flow_drv_type type = flow->drv_type; 3217 3218 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3219 fops = flow_get_drv_ops(type); 3220 return fops->apply(dev, flow, error); 3221 } 3222 3223 /** 3224 * Flow driver destroy API. This abstracts calling driver specific functions. 3225 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3226 * on device and releases resources of the flow. 3227 * 3228 * @param[in] dev 3229 * Pointer to Ethernet device. 3230 * @param[in, out] flow 3231 * Pointer to flow structure. 3232 */ 3233 static inline void 3234 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3235 { 3236 const struct mlx5_flow_driver_ops *fops; 3237 enum mlx5_flow_drv_type type = flow->drv_type; 3238 3239 flow_mreg_split_qrss_release(dev, flow); 3240 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3241 fops = flow_get_drv_ops(type); 3242 fops->destroy(dev, flow); 3243 } 3244 3245 /** 3246 * Get RSS action from the action list. 3247 * 3248 * @param[in] actions 3249 * Pointer to the list of actions. 3250 * 3251 * @return 3252 * Pointer to the RSS action if exist, else return NULL. 3253 */ 3254 static const struct rte_flow_action_rss* 3255 flow_get_rss_action(const struct rte_flow_action actions[]) 3256 { 3257 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3258 switch (actions->type) { 3259 case RTE_FLOW_ACTION_TYPE_RSS: 3260 return (const struct rte_flow_action_rss *) 3261 actions->conf; 3262 default: 3263 break; 3264 } 3265 } 3266 return NULL; 3267 } 3268 3269 /** 3270 * Get ASO age action by index. 3271 * 3272 * @param[in] dev 3273 * Pointer to the Ethernet device structure. 3274 * @param[in] age_idx 3275 * Index to the ASO age action. 3276 * 3277 * @return 3278 * The specified ASO age action. 3279 */ 3280 struct mlx5_aso_age_action* 3281 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx) 3282 { 3283 uint16_t pool_idx = age_idx & UINT16_MAX; 3284 uint16_t offset = (age_idx >> 16) & UINT16_MAX; 3285 struct mlx5_priv *priv = dev->data->dev_private; 3286 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng; 3287 struct mlx5_aso_age_pool *pool = mng->pools[pool_idx]; 3288 3289 return &pool->actions[offset - 1]; 3290 } 3291 3292 /* maps shared action to translated non shared in some actions array */ 3293 struct mlx5_translated_shared_action { 3294 struct rte_flow_shared_action *action; /**< Shared action */ 3295 int index; /**< Index in related array of rte_flow_action */ 3296 }; 3297 3298 /** 3299 * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related 3300 * non shared action if translation possible. 3301 * This functionality used to run same execution path for both shared & non 3302 * shared actions on flow create. All necessary preparations for shared 3303 * action handling should be preformed on *shared* actions list returned 3304 * from this call. 3305 * 3306 * @param[in] dev 3307 * Pointer to Ethernet device. 3308 * @param[in] actions 3309 * List of actions to translate. 3310 * @param[out] shared 3311 * List to store translated shared actions. 3312 * @param[in, out] shared_n 3313 * Size of *shared* array. On return should be updated with number of shared 3314 * actions retrieved from the *actions* list. 3315 * @param[out] translated_actions 3316 * List of actions where all shared actions were translated to non shared 3317 * if possible. NULL if no translation took place. 3318 * @param[out] error 3319 * Pointer to the error structure. 3320 * 3321 * @return 3322 * 0 on success, a negative errno value otherwise and rte_errno is set. 3323 */ 3324 static int 3325 flow_shared_actions_translate(struct rte_eth_dev *dev, 3326 const struct rte_flow_action actions[], 3327 struct mlx5_translated_shared_action *shared, 3328 int *shared_n, 3329 struct rte_flow_action **translated_actions, 3330 struct rte_flow_error *error) 3331 { 3332 struct mlx5_priv *priv = dev->data->dev_private; 3333 struct rte_flow_action *translated = NULL; 3334 size_t actions_size; 3335 int n; 3336 int copied_n = 0; 3337 struct mlx5_translated_shared_action *shared_end = NULL; 3338 3339 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3340 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED) 3341 continue; 3342 if (copied_n == *shared_n) { 3343 return rte_flow_error_set 3344 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3345 NULL, "too many shared actions"); 3346 } 3347 rte_memcpy(&shared[copied_n].action, &actions[n].conf, 3348 sizeof(actions[n].conf)); 3349 shared[copied_n].index = n; 3350 copied_n++; 3351 } 3352 n++; 3353 *shared_n = copied_n; 3354 if (!copied_n) 3355 return 0; 3356 actions_size = sizeof(struct rte_flow_action) * n; 3357 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3358 if (!translated) { 3359 rte_errno = ENOMEM; 3360 return -ENOMEM; 3361 } 3362 memcpy(translated, actions, actions_size); 3363 for (shared_end = shared + copied_n; shared < shared_end; shared++) { 3364 struct mlx5_shared_action_rss *shared_rss; 3365 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action; 3366 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET; 3367 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) 3368 - 1); 3369 3370 switch (type) { 3371 case MLX5_SHARED_ACTION_TYPE_RSS: 3372 shared_rss = mlx5_ipool_get 3373 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx); 3374 translated[shared->index].type = 3375 RTE_FLOW_ACTION_TYPE_RSS; 3376 translated[shared->index].conf = 3377 &shared_rss->origin; 3378 break; 3379 case MLX5_SHARED_ACTION_TYPE_AGE: 3380 if (priv->sh->flow_hit_aso_en) { 3381 translated[shared->index].type = 3382 (enum rte_flow_action_type) 3383 MLX5_RTE_FLOW_ACTION_TYPE_AGE; 3384 translated[shared->index].conf = 3385 (void *)(uintptr_t)idx; 3386 break; 3387 } 3388 /* Fall-through */ 3389 default: 3390 mlx5_free(translated); 3391 return rte_flow_error_set 3392 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3393 NULL, "invalid shared action type"); 3394 } 3395 } 3396 *translated_actions = translated; 3397 return 0; 3398 } 3399 3400 /** 3401 * Get Shared RSS action from the action list. 3402 * 3403 * @param[in] dev 3404 * Pointer to Ethernet device. 3405 * @param[in] shared 3406 * Pointer to the list of actions. 3407 * @param[in] shared_n 3408 * Actions list length. 3409 * 3410 * @return 3411 * The MLX5 RSS action ID if exists, otherwise return 0. 3412 */ 3413 static uint32_t 3414 flow_get_shared_rss_action(struct rte_eth_dev *dev, 3415 struct mlx5_translated_shared_action *shared, 3416 int shared_n) 3417 { 3418 struct mlx5_translated_shared_action *shared_end; 3419 struct mlx5_priv *priv = dev->data->dev_private; 3420 struct mlx5_shared_action_rss *shared_rss; 3421 3422 3423 for (shared_end = shared + shared_n; shared < shared_end; shared++) { 3424 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action; 3425 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET; 3426 uint32_t idx = act_idx & 3427 ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1); 3428 switch (type) { 3429 case MLX5_SHARED_ACTION_TYPE_RSS: 3430 shared_rss = mlx5_ipool_get 3431 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 3432 idx); 3433 __atomic_add_fetch(&shared_rss->refcnt, 1, 3434 __ATOMIC_RELAXED); 3435 return idx; 3436 default: 3437 break; 3438 } 3439 } 3440 return 0; 3441 } 3442 3443 static unsigned int 3444 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 3445 { 3446 const struct rte_flow_item *item; 3447 unsigned int has_vlan = 0; 3448 3449 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3450 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 3451 has_vlan = 1; 3452 break; 3453 } 3454 } 3455 if (has_vlan) 3456 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 3457 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 3458 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3459 MLX5_EXPANSION_ROOT_OUTER; 3460 } 3461 3462 /** 3463 * Get layer flags from the prefix flow. 3464 * 3465 * Some flows may be split to several subflows, the prefix subflow gets the 3466 * match items and the suffix sub flow gets the actions. 3467 * Some actions need the user defined match item flags to get the detail for 3468 * the action. 3469 * This function helps the suffix flow to get the item layer flags from prefix 3470 * subflow. 3471 * 3472 * @param[in] dev_flow 3473 * Pointer the created preifx subflow. 3474 * 3475 * @return 3476 * The layers get from prefix subflow. 3477 */ 3478 static inline uint64_t 3479 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3480 { 3481 uint64_t layers = 0; 3482 3483 /* 3484 * Layers bits could be localization, but usually the compiler will 3485 * help to do the optimization work for source code. 3486 * If no decap actions, use the layers directly. 3487 */ 3488 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3489 return dev_flow->handle->layers; 3490 /* Convert L3 layers with decap action. */ 3491 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3492 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3493 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3494 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3495 /* Convert L4 layers with decap action. */ 3496 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3497 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3498 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3499 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3500 return layers; 3501 } 3502 3503 /** 3504 * Get metadata split action information. 3505 * 3506 * @param[in] actions 3507 * Pointer to the list of actions. 3508 * @param[out] qrss 3509 * Pointer to the return pointer. 3510 * @param[out] qrss_type 3511 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3512 * if no QUEUE/RSS is found. 3513 * @param[out] encap_idx 3514 * Pointer to the index of the encap action if exists, otherwise the last 3515 * action index. 3516 * 3517 * @return 3518 * Total number of actions. 3519 */ 3520 static int 3521 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 3522 const struct rte_flow_action **qrss, 3523 int *encap_idx) 3524 { 3525 const struct rte_flow_action_raw_encap *raw_encap; 3526 int actions_n = 0; 3527 int raw_decap_idx = -1; 3528 3529 *encap_idx = -1; 3530 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3531 switch (actions->type) { 3532 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3533 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3534 *encap_idx = actions_n; 3535 break; 3536 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3537 raw_decap_idx = actions_n; 3538 break; 3539 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3540 raw_encap = actions->conf; 3541 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3542 *encap_idx = raw_decap_idx != -1 ? 3543 raw_decap_idx : actions_n; 3544 break; 3545 case RTE_FLOW_ACTION_TYPE_QUEUE: 3546 case RTE_FLOW_ACTION_TYPE_RSS: 3547 *qrss = actions; 3548 break; 3549 default: 3550 break; 3551 } 3552 actions_n++; 3553 } 3554 if (*encap_idx == -1) 3555 *encap_idx = actions_n; 3556 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3557 return actions_n + 1; 3558 } 3559 3560 /** 3561 * Check meter action from the action list. 3562 * 3563 * @param[in] actions 3564 * Pointer to the list of actions. 3565 * @param[out] mtr 3566 * Pointer to the meter exist flag. 3567 * 3568 * @return 3569 * Total number of actions. 3570 */ 3571 static int 3572 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr) 3573 { 3574 int actions_n = 0; 3575 3576 MLX5_ASSERT(mtr); 3577 *mtr = 0; 3578 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3579 switch (actions->type) { 3580 case RTE_FLOW_ACTION_TYPE_METER: 3581 *mtr = 1; 3582 break; 3583 default: 3584 break; 3585 } 3586 actions_n++; 3587 } 3588 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3589 return actions_n + 1; 3590 } 3591 3592 /** 3593 * Check if the flow should be split due to hairpin. 3594 * The reason for the split is that in current HW we can't 3595 * support encap and push-vlan on Rx, so if a flow contains 3596 * these actions we move it to Tx. 3597 * 3598 * @param dev 3599 * Pointer to Ethernet device. 3600 * @param[in] attr 3601 * Flow rule attributes. 3602 * @param[in] actions 3603 * Associated actions (list terminated by the END action). 3604 * 3605 * @return 3606 * > 0 the number of actions and the flow should be split, 3607 * 0 when no split required. 3608 */ 3609 static int 3610 flow_check_hairpin_split(struct rte_eth_dev *dev, 3611 const struct rte_flow_attr *attr, 3612 const struct rte_flow_action actions[]) 3613 { 3614 int queue_action = 0; 3615 int action_n = 0; 3616 int split = 0; 3617 const struct rte_flow_action_queue *queue; 3618 const struct rte_flow_action_rss *rss; 3619 const struct rte_flow_action_raw_encap *raw_encap; 3620 const struct rte_eth_hairpin_conf *conf; 3621 3622 if (!attr->ingress) 3623 return 0; 3624 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3625 switch (actions->type) { 3626 case RTE_FLOW_ACTION_TYPE_QUEUE: 3627 queue = actions->conf; 3628 if (queue == NULL) 3629 return 0; 3630 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); 3631 if (conf != NULL && !!conf->tx_explicit) 3632 return 0; 3633 queue_action = 1; 3634 action_n++; 3635 break; 3636 case RTE_FLOW_ACTION_TYPE_RSS: 3637 rss = actions->conf; 3638 if (rss == NULL || rss->queue_num == 0) 3639 return 0; 3640 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); 3641 if (conf != NULL && !!conf->tx_explicit) 3642 return 0; 3643 queue_action = 1; 3644 action_n++; 3645 break; 3646 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3647 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3648 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3649 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3650 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3651 split++; 3652 action_n++; 3653 break; 3654 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3655 raw_encap = actions->conf; 3656 if (raw_encap->size > 3657 (sizeof(struct rte_flow_item_eth) + 3658 sizeof(struct rte_flow_item_ipv4))) 3659 split++; 3660 action_n++; 3661 break; 3662 default: 3663 action_n++; 3664 break; 3665 } 3666 } 3667 if (split && queue_action) 3668 return action_n; 3669 return 0; 3670 } 3671 3672 /* Declare flow create/destroy prototype in advance. */ 3673 static uint32_t 3674 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 3675 const struct rte_flow_attr *attr, 3676 const struct rte_flow_item items[], 3677 const struct rte_flow_action actions[], 3678 bool external, struct rte_flow_error *error); 3679 3680 static void 3681 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 3682 uint32_t flow_idx); 3683 3684 struct mlx5_hlist_entry * 3685 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key, 3686 void *cb_ctx) 3687 { 3688 struct rte_eth_dev *dev = list->ctx; 3689 struct mlx5_priv *priv = dev->data->dev_private; 3690 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 3691 struct mlx5_flow_mreg_copy_resource *mcp_res; 3692 struct rte_flow_error *error = ctx->error; 3693 uint32_t idx = 0; 3694 int ret; 3695 uint32_t mark_id = key; 3696 struct rte_flow_attr attr = { 3697 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 3698 .ingress = 1, 3699 }; 3700 struct mlx5_rte_flow_item_tag tag_spec = { 3701 .data = mark_id, 3702 }; 3703 struct rte_flow_item items[] = { 3704 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 3705 }; 3706 struct rte_flow_action_mark ftag = { 3707 .id = mark_id, 3708 }; 3709 struct mlx5_flow_action_copy_mreg cp_mreg = { 3710 .dst = REG_B, 3711 .src = REG_NON, 3712 }; 3713 struct rte_flow_action_jump jump = { 3714 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 3715 }; 3716 struct rte_flow_action actions[] = { 3717 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 3718 }; 3719 3720 /* Fill the register fileds in the flow. */ 3721 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 3722 if (ret < 0) 3723 return NULL; 3724 tag_spec.id = ret; 3725 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 3726 if (ret < 0) 3727 return NULL; 3728 cp_mreg.src = ret; 3729 /* Provide the full width of FLAG specific value. */ 3730 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 3731 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 3732 /* Build a new flow. */ 3733 if (mark_id != MLX5_DEFAULT_COPY_ID) { 3734 items[0] = (struct rte_flow_item){ 3735 .type = (enum rte_flow_item_type) 3736 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 3737 .spec = &tag_spec, 3738 }; 3739 items[1] = (struct rte_flow_item){ 3740 .type = RTE_FLOW_ITEM_TYPE_END, 3741 }; 3742 actions[0] = (struct rte_flow_action){ 3743 .type = (enum rte_flow_action_type) 3744 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 3745 .conf = &ftag, 3746 }; 3747 actions[1] = (struct rte_flow_action){ 3748 .type = (enum rte_flow_action_type) 3749 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 3750 .conf = &cp_mreg, 3751 }; 3752 actions[2] = (struct rte_flow_action){ 3753 .type = RTE_FLOW_ACTION_TYPE_JUMP, 3754 .conf = &jump, 3755 }; 3756 actions[3] = (struct rte_flow_action){ 3757 .type = RTE_FLOW_ACTION_TYPE_END, 3758 }; 3759 } else { 3760 /* Default rule, wildcard match. */ 3761 attr.priority = MLX5_FLOW_PRIO_RSVD; 3762 items[0] = (struct rte_flow_item){ 3763 .type = RTE_FLOW_ITEM_TYPE_END, 3764 }; 3765 actions[0] = (struct rte_flow_action){ 3766 .type = (enum rte_flow_action_type) 3767 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 3768 .conf = &cp_mreg, 3769 }; 3770 actions[1] = (struct rte_flow_action){ 3771 .type = RTE_FLOW_ACTION_TYPE_JUMP, 3772 .conf = &jump, 3773 }; 3774 actions[2] = (struct rte_flow_action){ 3775 .type = RTE_FLOW_ACTION_TYPE_END, 3776 }; 3777 } 3778 /* Build a new entry. */ 3779 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 3780 if (!mcp_res) { 3781 rte_errno = ENOMEM; 3782 return NULL; 3783 } 3784 mcp_res->idx = idx; 3785 /* 3786 * The copy Flows are not included in any list. There 3787 * ones are referenced from other Flows and can not 3788 * be applied, removed, deleted in ardbitrary order 3789 * by list traversing. 3790 */ 3791 mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items, 3792 actions, false, error); 3793 if (!mcp_res->rix_flow) { 3794 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx); 3795 return NULL; 3796 } 3797 return &mcp_res->hlist_ent; 3798 } 3799 3800 /** 3801 * Add a flow of copying flow metadata registers in RX_CP_TBL. 3802 * 3803 * As mark_id is unique, if there's already a registered flow for the mark_id, 3804 * return by increasing the reference counter of the resource. Otherwise, create 3805 * the resource (mcp_res) and flow. 3806 * 3807 * Flow looks like, 3808 * - If ingress port is ANY and reg_c[1] is mark_id, 3809 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 3810 * 3811 * For default flow (zero mark_id), flow is like, 3812 * - If ingress port is ANY, 3813 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 3814 * 3815 * @param dev 3816 * Pointer to Ethernet device. 3817 * @param mark_id 3818 * ID of MARK action, zero means default flow for META. 3819 * @param[out] error 3820 * Perform verbose error reporting if not NULL. 3821 * 3822 * @return 3823 * Associated resource on success, NULL otherwise and rte_errno is set. 3824 */ 3825 static struct mlx5_flow_mreg_copy_resource * 3826 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 3827 struct rte_flow_error *error) 3828 { 3829 struct mlx5_priv *priv = dev->data->dev_private; 3830 struct mlx5_hlist_entry *entry; 3831 struct mlx5_flow_cb_ctx ctx = { 3832 .dev = dev, 3833 .error = error, 3834 }; 3835 3836 /* Check if already registered. */ 3837 MLX5_ASSERT(priv->mreg_cp_tbl); 3838 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx); 3839 if (!entry) 3840 return NULL; 3841 return container_of(entry, struct mlx5_flow_mreg_copy_resource, 3842 hlist_ent); 3843 } 3844 3845 void 3846 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry) 3847 { 3848 struct mlx5_flow_mreg_copy_resource *mcp_res = 3849 container_of(entry, typeof(*mcp_res), hlist_ent); 3850 struct rte_eth_dev *dev = list->ctx; 3851 struct mlx5_priv *priv = dev->data->dev_private; 3852 3853 MLX5_ASSERT(mcp_res->rix_flow); 3854 flow_list_destroy(dev, NULL, mcp_res->rix_flow); 3855 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 3856 } 3857 3858 /** 3859 * Release flow in RX_CP_TBL. 3860 * 3861 * @param dev 3862 * Pointer to Ethernet device. 3863 * @flow 3864 * Parent flow for wich copying is provided. 3865 */ 3866 static void 3867 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 3868 struct rte_flow *flow) 3869 { 3870 struct mlx5_flow_mreg_copy_resource *mcp_res; 3871 struct mlx5_priv *priv = dev->data->dev_private; 3872 3873 if (!flow->rix_mreg_copy) 3874 return; 3875 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 3876 flow->rix_mreg_copy); 3877 if (!mcp_res || !priv->mreg_cp_tbl) 3878 return; 3879 MLX5_ASSERT(mcp_res->rix_flow); 3880 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 3881 flow->rix_mreg_copy = 0; 3882 } 3883 3884 /** 3885 * Remove the default copy action from RX_CP_TBL. 3886 * 3887 * This functions is called in the mlx5_dev_start(). No thread safe 3888 * is guaranteed. 3889 * 3890 * @param dev 3891 * Pointer to Ethernet device. 3892 */ 3893 static void 3894 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 3895 { 3896 struct mlx5_hlist_entry *entry; 3897 struct mlx5_priv *priv = dev->data->dev_private; 3898 3899 /* Check if default flow is registered. */ 3900 if (!priv->mreg_cp_tbl) 3901 return; 3902 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, 3903 MLX5_DEFAULT_COPY_ID, NULL); 3904 if (!entry) 3905 return; 3906 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry); 3907 } 3908 3909 /** 3910 * Add the default copy action in in RX_CP_TBL. 3911 * 3912 * This functions is called in the mlx5_dev_start(). No thread safe 3913 * is guaranteed. 3914 * 3915 * @param dev 3916 * Pointer to Ethernet device. 3917 * @param[out] error 3918 * Perform verbose error reporting if not NULL. 3919 * 3920 * @return 3921 * 0 for success, negative value otherwise and rte_errno is set. 3922 */ 3923 static int 3924 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 3925 struct rte_flow_error *error) 3926 { 3927 struct mlx5_priv *priv = dev->data->dev_private; 3928 struct mlx5_flow_mreg_copy_resource *mcp_res; 3929 3930 /* Check whether extensive metadata feature is engaged. */ 3931 if (!priv->config.dv_flow_en || 3932 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 3933 !mlx5_flow_ext_mreg_supported(dev) || 3934 !priv->sh->dv_regc0_mask) 3935 return 0; 3936 /* 3937 * Add default mreg copy flow may be called multiple time, but 3938 * only be called once in stop. Avoid register it twice. 3939 */ 3940 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL)) 3941 return 0; 3942 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error); 3943 if (!mcp_res) 3944 return -rte_errno; 3945 return 0; 3946 } 3947 3948 /** 3949 * Add a flow of copying flow metadata registers in RX_CP_TBL. 3950 * 3951 * All the flow having Q/RSS action should be split by 3952 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 3953 * performs the following, 3954 * - CQE->flow_tag := reg_c[1] (MARK) 3955 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 3956 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 3957 * but there should be a flow per each MARK ID set by MARK action. 3958 * 3959 * For the aforementioned reason, if there's a MARK action in flow's action 3960 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 3961 * the MARK ID to CQE's flow_tag like, 3962 * - If reg_c[1] is mark_id, 3963 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 3964 * 3965 * For SET_META action which stores value in reg_c[0], as the destination is 3966 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 3967 * MARK ID means the default flow. The default flow looks like, 3968 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 3969 * 3970 * @param dev 3971 * Pointer to Ethernet device. 3972 * @param flow 3973 * Pointer to flow structure. 3974 * @param[in] actions 3975 * Pointer to the list of actions. 3976 * @param[out] error 3977 * Perform verbose error reporting if not NULL. 3978 * 3979 * @return 3980 * 0 on success, negative value otherwise and rte_errno is set. 3981 */ 3982 static int 3983 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 3984 struct rte_flow *flow, 3985 const struct rte_flow_action *actions, 3986 struct rte_flow_error *error) 3987 { 3988 struct mlx5_priv *priv = dev->data->dev_private; 3989 struct mlx5_dev_config *config = &priv->config; 3990 struct mlx5_flow_mreg_copy_resource *mcp_res; 3991 const struct rte_flow_action_mark *mark; 3992 3993 /* Check whether extensive metadata feature is engaged. */ 3994 if (!config->dv_flow_en || 3995 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 3996 !mlx5_flow_ext_mreg_supported(dev) || 3997 !priv->sh->dv_regc0_mask) 3998 return 0; 3999 /* Find MARK action. */ 4000 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4001 switch (actions->type) { 4002 case RTE_FLOW_ACTION_TYPE_FLAG: 4003 mcp_res = flow_mreg_add_copy_action 4004 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4005 if (!mcp_res) 4006 return -rte_errno; 4007 flow->rix_mreg_copy = mcp_res->idx; 4008 return 0; 4009 case RTE_FLOW_ACTION_TYPE_MARK: 4010 mark = (const struct rte_flow_action_mark *) 4011 actions->conf; 4012 mcp_res = 4013 flow_mreg_add_copy_action(dev, mark->id, error); 4014 if (!mcp_res) 4015 return -rte_errno; 4016 flow->rix_mreg_copy = mcp_res->idx; 4017 return 0; 4018 default: 4019 break; 4020 } 4021 } 4022 return 0; 4023 } 4024 4025 #define MLX5_MAX_SPLIT_ACTIONS 24 4026 #define MLX5_MAX_SPLIT_ITEMS 24 4027 4028 /** 4029 * Split the hairpin flow. 4030 * Since HW can't support encap and push-vlan on Rx, we move these 4031 * actions to Tx. 4032 * If the count action is after the encap then we also 4033 * move the count action. in this case the count will also measure 4034 * the outer bytes. 4035 * 4036 * @param dev 4037 * Pointer to Ethernet device. 4038 * @param[in] actions 4039 * Associated actions (list terminated by the END action). 4040 * @param[out] actions_rx 4041 * Rx flow actions. 4042 * @param[out] actions_tx 4043 * Tx flow actions.. 4044 * @param[out] pattern_tx 4045 * The pattern items for the Tx flow. 4046 * @param[out] flow_id 4047 * The flow ID connected to this flow. 4048 * 4049 * @return 4050 * 0 on success. 4051 */ 4052 static int 4053 flow_hairpin_split(struct rte_eth_dev *dev, 4054 const struct rte_flow_action actions[], 4055 struct rte_flow_action actions_rx[], 4056 struct rte_flow_action actions_tx[], 4057 struct rte_flow_item pattern_tx[], 4058 uint32_t flow_id) 4059 { 4060 const struct rte_flow_action_raw_encap *raw_encap; 4061 const struct rte_flow_action_raw_decap *raw_decap; 4062 struct mlx5_rte_flow_action_set_tag *set_tag; 4063 struct rte_flow_action *tag_action; 4064 struct mlx5_rte_flow_item_tag *tag_item; 4065 struct rte_flow_item *item; 4066 char *addr; 4067 int encap = 0; 4068 4069 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4070 switch (actions->type) { 4071 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4072 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4073 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4074 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4075 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4076 rte_memcpy(actions_tx, actions, 4077 sizeof(struct rte_flow_action)); 4078 actions_tx++; 4079 break; 4080 case RTE_FLOW_ACTION_TYPE_COUNT: 4081 if (encap) { 4082 rte_memcpy(actions_tx, actions, 4083 sizeof(struct rte_flow_action)); 4084 actions_tx++; 4085 } else { 4086 rte_memcpy(actions_rx, actions, 4087 sizeof(struct rte_flow_action)); 4088 actions_rx++; 4089 } 4090 break; 4091 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4092 raw_encap = actions->conf; 4093 if (raw_encap->size > 4094 (sizeof(struct rte_flow_item_eth) + 4095 sizeof(struct rte_flow_item_ipv4))) { 4096 memcpy(actions_tx, actions, 4097 sizeof(struct rte_flow_action)); 4098 actions_tx++; 4099 encap = 1; 4100 } else { 4101 rte_memcpy(actions_rx, actions, 4102 sizeof(struct rte_flow_action)); 4103 actions_rx++; 4104 } 4105 break; 4106 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4107 raw_decap = actions->conf; 4108 if (raw_decap->size < 4109 (sizeof(struct rte_flow_item_eth) + 4110 sizeof(struct rte_flow_item_ipv4))) { 4111 memcpy(actions_tx, actions, 4112 sizeof(struct rte_flow_action)); 4113 actions_tx++; 4114 } else { 4115 rte_memcpy(actions_rx, actions, 4116 sizeof(struct rte_flow_action)); 4117 actions_rx++; 4118 } 4119 break; 4120 default: 4121 rte_memcpy(actions_rx, actions, 4122 sizeof(struct rte_flow_action)); 4123 actions_rx++; 4124 break; 4125 } 4126 } 4127 /* Add set meta action and end action for the Rx flow. */ 4128 tag_action = actions_rx; 4129 tag_action->type = (enum rte_flow_action_type) 4130 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4131 actions_rx++; 4132 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4133 actions_rx++; 4134 set_tag = (void *)actions_rx; 4135 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL); 4136 MLX5_ASSERT(set_tag->id > REG_NON); 4137 set_tag->data = flow_id; 4138 tag_action->conf = set_tag; 4139 /* Create Tx item list. */ 4140 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4141 addr = (void *)&pattern_tx[2]; 4142 item = pattern_tx; 4143 item->type = (enum rte_flow_item_type) 4144 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4145 tag_item = (void *)addr; 4146 tag_item->data = flow_id; 4147 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4148 MLX5_ASSERT(set_tag->id > REG_NON); 4149 item->spec = tag_item; 4150 addr += sizeof(struct mlx5_rte_flow_item_tag); 4151 tag_item = (void *)addr; 4152 tag_item->data = UINT32_MAX; 4153 tag_item->id = UINT16_MAX; 4154 item->mask = tag_item; 4155 item->last = NULL; 4156 item++; 4157 item->type = RTE_FLOW_ITEM_TYPE_END; 4158 return 0; 4159 } 4160 4161 __extension__ 4162 union tunnel_offload_mark { 4163 uint32_t val; 4164 struct { 4165 uint32_t app_reserve:8; 4166 uint32_t table_id:15; 4167 uint32_t transfer:1; 4168 uint32_t _unused_:8; 4169 }; 4170 }; 4171 4172 struct tunnel_default_miss_ctx { 4173 uint16_t *queue; 4174 __extension__ 4175 union { 4176 struct rte_flow_action_rss action_rss; 4177 struct rte_flow_action_queue miss_queue; 4178 struct rte_flow_action_jump miss_jump; 4179 uint8_t raw[0]; 4180 }; 4181 }; 4182 4183 static int 4184 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 4185 struct rte_flow *flow, 4186 const struct rte_flow_attr *attr, 4187 const struct rte_flow_action *app_actions, 4188 uint32_t flow_idx, 4189 struct tunnel_default_miss_ctx *ctx, 4190 struct rte_flow_error *error) 4191 { 4192 struct mlx5_priv *priv = dev->data->dev_private; 4193 struct mlx5_flow *dev_flow; 4194 struct rte_flow_attr miss_attr = *attr; 4195 const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf; 4196 const struct rte_flow_item miss_items[2] = { 4197 { 4198 .type = RTE_FLOW_ITEM_TYPE_ETH, 4199 .spec = NULL, 4200 .last = NULL, 4201 .mask = NULL 4202 }, 4203 { 4204 .type = RTE_FLOW_ITEM_TYPE_END, 4205 .spec = NULL, 4206 .last = NULL, 4207 .mask = NULL 4208 } 4209 }; 4210 union tunnel_offload_mark mark_id; 4211 struct rte_flow_action_mark miss_mark; 4212 struct rte_flow_action miss_actions[3] = { 4213 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 4214 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 4215 }; 4216 const struct rte_flow_action_jump *jump_data; 4217 uint32_t i, flow_table = 0; /* prevent compilation warning */ 4218 struct flow_grp_info grp_info = { 4219 .external = 1, 4220 .transfer = attr->transfer, 4221 .fdb_def_rule = !!priv->fdb_def_rule, 4222 .std_tbl_fix = 0, 4223 }; 4224 int ret; 4225 4226 if (!attr->transfer) { 4227 uint32_t q_size; 4228 4229 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 4230 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 4231 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 4232 0, SOCKET_ID_ANY); 4233 if (!ctx->queue) 4234 return rte_flow_error_set 4235 (error, ENOMEM, 4236 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 4237 NULL, "invalid default miss RSS"); 4238 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 4239 ctx->action_rss.level = 0, 4240 ctx->action_rss.types = priv->rss_conf.rss_hf, 4241 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 4242 ctx->action_rss.queue_num = priv->reta_idx_n, 4243 ctx->action_rss.key = priv->rss_conf.rss_key, 4244 ctx->action_rss.queue = ctx->queue; 4245 if (!priv->reta_idx_n || !priv->rxqs_n) 4246 return rte_flow_error_set 4247 (error, EINVAL, 4248 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 4249 NULL, "invalid port configuration"); 4250 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 4251 ctx->action_rss.types = 0; 4252 for (i = 0; i != priv->reta_idx_n; ++i) 4253 ctx->queue[i] = (*priv->reta_idx)[i]; 4254 } else { 4255 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 4256 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 4257 } 4258 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 4259 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 4260 jump_data = app_actions->conf; 4261 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 4262 miss_attr.group = jump_data->group; 4263 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 4264 &flow_table, grp_info, error); 4265 if (ret) 4266 return rte_flow_error_set(error, EINVAL, 4267 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 4268 NULL, "invalid tunnel id"); 4269 mark_id.app_reserve = 0; 4270 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 4271 mark_id.transfer = !!attr->transfer; 4272 mark_id._unused_ = 0; 4273 miss_mark.id = mark_id.val; 4274 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 4275 miss_items, miss_actions, flow_idx, error); 4276 if (!dev_flow) 4277 return -rte_errno; 4278 dev_flow->flow = flow; 4279 dev_flow->external = true; 4280 dev_flow->tunnel = tunnel; 4281 /* Subflow object was created, we must include one in the list. */ 4282 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4283 dev_flow->handle, next); 4284 DRV_LOG(DEBUG, 4285 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 4286 dev->data->port_id, tunnel->app_tunnel.type, 4287 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 4288 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 4289 miss_actions, error); 4290 if (!ret) 4291 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 4292 error); 4293 4294 return ret; 4295 } 4296 4297 /** 4298 * The last stage of splitting chain, just creates the subflow 4299 * without any modification. 4300 * 4301 * @param[in] dev 4302 * Pointer to Ethernet device. 4303 * @param[in] flow 4304 * Parent flow structure pointer. 4305 * @param[in, out] sub_flow 4306 * Pointer to return the created subflow, may be NULL. 4307 * @param[in] attr 4308 * Flow rule attributes. 4309 * @param[in] items 4310 * Pattern specification (list terminated by the END pattern item). 4311 * @param[in] actions 4312 * Associated actions (list terminated by the END action). 4313 * @param[in] flow_split_info 4314 * Pointer to flow split info structure. 4315 * @param[out] error 4316 * Perform verbose error reporting if not NULL. 4317 * @return 4318 * 0 on success, negative value otherwise 4319 */ 4320 static int 4321 flow_create_split_inner(struct rte_eth_dev *dev, 4322 struct rte_flow *flow, 4323 struct mlx5_flow **sub_flow, 4324 const struct rte_flow_attr *attr, 4325 const struct rte_flow_item items[], 4326 const struct rte_flow_action actions[], 4327 struct mlx5_flow_split_info *flow_split_info, 4328 struct rte_flow_error *error) 4329 { 4330 struct mlx5_flow *dev_flow; 4331 4332 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4333 flow_split_info->flow_idx, error); 4334 if (!dev_flow) 4335 return -rte_errno; 4336 dev_flow->flow = flow; 4337 dev_flow->external = flow_split_info->external; 4338 dev_flow->skip_scale = flow_split_info->skip_scale; 4339 /* Subflow object was created, we must include one in the list. */ 4340 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4341 dev_flow->handle, next); 4342 /* 4343 * If dev_flow is as one of the suffix flow, some actions in suffix 4344 * flow may need some user defined item layer flags, and pass the 4345 * Metadate rxq mark flag to suffix flow as well. 4346 */ 4347 if (flow_split_info->prefix_layers) 4348 dev_flow->handle->layers = flow_split_info->prefix_layers; 4349 if (flow_split_info->prefix_mark) 4350 dev_flow->handle->mark = 1; 4351 if (sub_flow) 4352 *sub_flow = dev_flow; 4353 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4354 } 4355 4356 /** 4357 * Split the meter flow. 4358 * 4359 * As meter flow will split to three sub flow, other than meter 4360 * action, the other actions make sense to only meter accepts 4361 * the packet. If it need to be dropped, no other additional 4362 * actions should be take. 4363 * 4364 * One kind of special action which decapsulates the L3 tunnel 4365 * header will be in the prefix sub flow, as not to take the 4366 * L3 tunnel header into account. 4367 * 4368 * @param dev 4369 * Pointer to Ethernet device. 4370 * @param[in] items 4371 * Pattern specification (list terminated by the END pattern item). 4372 * @param[out] sfx_items 4373 * Suffix flow match items (list terminated by the END pattern item). 4374 * @param[in] actions 4375 * Associated actions (list terminated by the END action). 4376 * @param[out] actions_sfx 4377 * Suffix flow actions. 4378 * @param[out] actions_pre 4379 * Prefix flow actions. 4380 * @param[out] pattern_sfx 4381 * The pattern items for the suffix flow. 4382 * @param[out] tag_sfx 4383 * Pointer to suffix flow tag. 4384 * 4385 * @return 4386 * 0 on success. 4387 */ 4388 static int 4389 flow_meter_split_prep(struct rte_eth_dev *dev, 4390 const struct rte_flow_item items[], 4391 struct rte_flow_item sfx_items[], 4392 const struct rte_flow_action actions[], 4393 struct rte_flow_action actions_sfx[], 4394 struct rte_flow_action actions_pre[]) 4395 { 4396 struct mlx5_priv *priv = dev->data->dev_private; 4397 struct rte_flow_action *tag_action = NULL; 4398 struct rte_flow_item *tag_item; 4399 struct mlx5_rte_flow_action_set_tag *set_tag; 4400 struct rte_flow_error error; 4401 const struct rte_flow_action_raw_encap *raw_encap; 4402 const struct rte_flow_action_raw_decap *raw_decap; 4403 struct mlx5_rte_flow_item_tag *tag_spec; 4404 struct mlx5_rte_flow_item_tag *tag_mask; 4405 uint32_t tag_id = 0; 4406 bool copy_vlan = false; 4407 4408 /* Prepare the actions for prefix and suffix flow. */ 4409 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4410 struct rte_flow_action **action_cur = NULL; 4411 4412 switch (actions->type) { 4413 case RTE_FLOW_ACTION_TYPE_METER: 4414 /* Add the extra tag action first. */ 4415 tag_action = actions_pre; 4416 tag_action->type = (enum rte_flow_action_type) 4417 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4418 actions_pre++; 4419 action_cur = &actions_pre; 4420 break; 4421 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4422 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4423 action_cur = &actions_pre; 4424 break; 4425 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4426 raw_encap = actions->conf; 4427 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 4428 action_cur = &actions_pre; 4429 break; 4430 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4431 raw_decap = actions->conf; 4432 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4433 action_cur = &actions_pre; 4434 break; 4435 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4436 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4437 copy_vlan = true; 4438 break; 4439 default: 4440 break; 4441 } 4442 if (!action_cur) 4443 action_cur = &actions_sfx; 4444 memcpy(*action_cur, actions, sizeof(struct rte_flow_action)); 4445 (*action_cur)++; 4446 } 4447 /* Add end action to the actions. */ 4448 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 4449 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 4450 actions_pre++; 4451 /* Set the tag. */ 4452 set_tag = (void *)actions_pre; 4453 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error); 4454 mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 4455 &tag_id); 4456 if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) { 4457 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.", 4458 dev->data->port_id); 4459 mlx5_ipool_free(priv->sh->ipool 4460 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id); 4461 return 0; 4462 } else if (!tag_id) { 4463 return 0; 4464 } 4465 set_tag->data = tag_id << MLX5_MTR_COLOR_BITS; 4466 assert(tag_action); 4467 tag_action->conf = set_tag; 4468 /* Prepare the suffix subflow items. */ 4469 tag_item = sfx_items++; 4470 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 4471 int item_type = items->type; 4472 4473 switch (item_type) { 4474 case RTE_FLOW_ITEM_TYPE_PORT_ID: 4475 memcpy(sfx_items, items, sizeof(*sfx_items)); 4476 sfx_items++; 4477 break; 4478 case RTE_FLOW_ITEM_TYPE_VLAN: 4479 if (copy_vlan) { 4480 memcpy(sfx_items, items, sizeof(*sfx_items)); 4481 /* 4482 * Convert to internal match item, it is used 4483 * for vlan push and set vid. 4484 */ 4485 sfx_items->type = (enum rte_flow_item_type) 4486 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 4487 sfx_items++; 4488 } 4489 break; 4490 default: 4491 break; 4492 } 4493 } 4494 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 4495 sfx_items++; 4496 tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 4497 tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS; 4498 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error); 4499 tag_mask = tag_spec + 1; 4500 tag_mask->data = 0xffffff00; 4501 tag_item->type = (enum rte_flow_item_type) 4502 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4503 tag_item->spec = tag_spec; 4504 tag_item->last = NULL; 4505 tag_item->mask = tag_mask; 4506 return tag_id; 4507 } 4508 4509 /** 4510 * Split action list having QUEUE/RSS for metadata register copy. 4511 * 4512 * Once Q/RSS action is detected in user's action list, the flow action 4513 * should be split in order to copy metadata registers, which will happen in 4514 * RX_CP_TBL like, 4515 * - CQE->flow_tag := reg_c[1] (MARK) 4516 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4517 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 4518 * This is because the last action of each flow must be a terminal action 4519 * (QUEUE, RSS or DROP). 4520 * 4521 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 4522 * stored and kept in the mlx5_flow structure per each sub_flow. 4523 * 4524 * The Q/RSS action is replaced with, 4525 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 4526 * And the following JUMP action is added at the end, 4527 * - JUMP, to RX_CP_TBL. 4528 * 4529 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 4530 * flow_create_split_metadata() routine. The flow will look like, 4531 * - If flow ID matches (reg_c[2]), perform Q/RSS. 4532 * 4533 * @param dev 4534 * Pointer to Ethernet device. 4535 * @param[out] split_actions 4536 * Pointer to store split actions to jump to CP_TBL. 4537 * @param[in] actions 4538 * Pointer to the list of original flow actions. 4539 * @param[in] qrss 4540 * Pointer to the Q/RSS action. 4541 * @param[in] actions_n 4542 * Number of original actions. 4543 * @param[out] error 4544 * Perform verbose error reporting if not NULL. 4545 * 4546 * @return 4547 * non-zero unique flow_id on success, otherwise 0 and 4548 * error/rte_error are set. 4549 */ 4550 static uint32_t 4551 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 4552 struct rte_flow_action *split_actions, 4553 const struct rte_flow_action *actions, 4554 const struct rte_flow_action *qrss, 4555 int actions_n, struct rte_flow_error *error) 4556 { 4557 struct mlx5_priv *priv = dev->data->dev_private; 4558 struct mlx5_rte_flow_action_set_tag *set_tag; 4559 struct rte_flow_action_jump *jump; 4560 const int qrss_idx = qrss - actions; 4561 uint32_t flow_id = 0; 4562 int ret = 0; 4563 4564 /* 4565 * Given actions will be split 4566 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 4567 * - Add jump to mreg CP_TBL. 4568 * As a result, there will be one more action. 4569 */ 4570 ++actions_n; 4571 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 4572 set_tag = (void *)(split_actions + actions_n); 4573 /* 4574 * If tag action is not set to void(it means we are not the meter 4575 * suffix flow), add the tag action. Since meter suffix flow already 4576 * has the tag added. 4577 */ 4578 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 4579 /* 4580 * Allocate the new subflow ID. This one is unique within 4581 * device and not shared with representors. Otherwise, 4582 * we would have to resolve multi-thread access synch 4583 * issue. Each flow on the shared device is appended 4584 * with source vport identifier, so the resulting 4585 * flows will be unique in the shared (by master and 4586 * representors) domain even if they have coinciding 4587 * IDs. 4588 */ 4589 mlx5_ipool_malloc(priv->sh->ipool 4590 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); 4591 if (!flow_id) 4592 return rte_flow_error_set(error, ENOMEM, 4593 RTE_FLOW_ERROR_TYPE_ACTION, 4594 NULL, "can't allocate id " 4595 "for split Q/RSS subflow"); 4596 /* Internal SET_TAG action to set flow ID. */ 4597 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 4598 .data = flow_id, 4599 }; 4600 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 4601 if (ret < 0) 4602 return ret; 4603 set_tag->id = ret; 4604 /* Construct new actions array. */ 4605 /* Replace QUEUE/RSS action. */ 4606 split_actions[qrss_idx] = (struct rte_flow_action){ 4607 .type = (enum rte_flow_action_type) 4608 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 4609 .conf = set_tag, 4610 }; 4611 } 4612 /* JUMP action to jump to mreg copy table (CP_TBL). */ 4613 jump = (void *)(set_tag + 1); 4614 *jump = (struct rte_flow_action_jump){ 4615 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4616 }; 4617 split_actions[actions_n - 2] = (struct rte_flow_action){ 4618 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4619 .conf = jump, 4620 }; 4621 split_actions[actions_n - 1] = (struct rte_flow_action){ 4622 .type = RTE_FLOW_ACTION_TYPE_END, 4623 }; 4624 return flow_id; 4625 } 4626 4627 /** 4628 * Extend the given action list for Tx metadata copy. 4629 * 4630 * Copy the given action list to the ext_actions and add flow metadata register 4631 * copy action in order to copy reg_a set by WQE to reg_c[0]. 4632 * 4633 * @param[out] ext_actions 4634 * Pointer to the extended action list. 4635 * @param[in] actions 4636 * Pointer to the list of actions. 4637 * @param[in] actions_n 4638 * Number of actions in the list. 4639 * @param[out] error 4640 * Perform verbose error reporting if not NULL. 4641 * @param[in] encap_idx 4642 * The encap action inndex. 4643 * 4644 * @return 4645 * 0 on success, negative value otherwise 4646 */ 4647 static int 4648 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 4649 struct rte_flow_action *ext_actions, 4650 const struct rte_flow_action *actions, 4651 int actions_n, struct rte_flow_error *error, 4652 int encap_idx) 4653 { 4654 struct mlx5_flow_action_copy_mreg *cp_mreg = 4655 (struct mlx5_flow_action_copy_mreg *) 4656 (ext_actions + actions_n + 1); 4657 int ret; 4658 4659 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4660 if (ret < 0) 4661 return ret; 4662 cp_mreg->dst = ret; 4663 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 4664 if (ret < 0) 4665 return ret; 4666 cp_mreg->src = ret; 4667 if (encap_idx != 0) 4668 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 4669 if (encap_idx == actions_n - 1) { 4670 ext_actions[actions_n - 1] = (struct rte_flow_action){ 4671 .type = (enum rte_flow_action_type) 4672 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4673 .conf = cp_mreg, 4674 }; 4675 ext_actions[actions_n] = (struct rte_flow_action){ 4676 .type = RTE_FLOW_ACTION_TYPE_END, 4677 }; 4678 } else { 4679 ext_actions[encap_idx] = (struct rte_flow_action){ 4680 .type = (enum rte_flow_action_type) 4681 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4682 .conf = cp_mreg, 4683 }; 4684 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 4685 sizeof(*ext_actions) * (actions_n - encap_idx)); 4686 } 4687 return 0; 4688 } 4689 4690 /** 4691 * Check the match action from the action list. 4692 * 4693 * @param[in] actions 4694 * Pointer to the list of actions. 4695 * @param[in] attr 4696 * Flow rule attributes. 4697 * @param[in] action 4698 * The action to be check if exist. 4699 * @param[out] match_action_pos 4700 * Pointer to the position of the matched action if exists, otherwise is -1. 4701 * @param[out] qrss_action_pos 4702 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 4703 * 4704 * @return 4705 * > 0 the total number of actions. 4706 * 0 if not found match action in action list. 4707 */ 4708 static int 4709 flow_check_match_action(const struct rte_flow_action actions[], 4710 const struct rte_flow_attr *attr, 4711 enum rte_flow_action_type action, 4712 int *match_action_pos, int *qrss_action_pos) 4713 { 4714 const struct rte_flow_action_sample *sample; 4715 int actions_n = 0; 4716 int jump_flag = 0; 4717 uint32_t ratio = 0; 4718 int sub_type = 0; 4719 int flag = 0; 4720 4721 *match_action_pos = -1; 4722 *qrss_action_pos = -1; 4723 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4724 if (actions->type == action) { 4725 flag = 1; 4726 *match_action_pos = actions_n; 4727 } 4728 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE || 4729 actions->type == RTE_FLOW_ACTION_TYPE_RSS) 4730 *qrss_action_pos = actions_n; 4731 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP) 4732 jump_flag = 1; 4733 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) { 4734 sample = actions->conf; 4735 ratio = sample->ratio; 4736 sub_type = ((const struct rte_flow_action *) 4737 (sample->actions))->type; 4738 } 4739 actions_n++; 4740 } 4741 if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) { 4742 if (ratio == 1) { 4743 /* JUMP Action not support for Mirroring; 4744 * Mirroring support multi-destination; 4745 */ 4746 if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END) 4747 flag = 0; 4748 } 4749 } 4750 /* Count RTE_FLOW_ACTION_TYPE_END. */ 4751 return flag ? actions_n + 1 : 0; 4752 } 4753 4754 #define SAMPLE_SUFFIX_ITEM 2 4755 4756 /** 4757 * Split the sample flow. 4758 * 4759 * As sample flow will split to two sub flow, sample flow with 4760 * sample action, the other actions will move to new suffix flow. 4761 * 4762 * Also add unique tag id with tag action in the sample flow, 4763 * the same tag id will be as match in the suffix flow. 4764 * 4765 * @param dev 4766 * Pointer to Ethernet device. 4767 * @param[in] fdb_tx 4768 * FDB egress flow flag. 4769 * @param[out] sfx_items 4770 * Suffix flow match items (list terminated by the END pattern item). 4771 * @param[in] actions 4772 * Associated actions (list terminated by the END action). 4773 * @param[out] actions_sfx 4774 * Suffix flow actions. 4775 * @param[out] actions_pre 4776 * Prefix flow actions. 4777 * @param[in] actions_n 4778 * The total number of actions. 4779 * @param[in] sample_action_pos 4780 * The sample action position. 4781 * @param[in] qrss_action_pos 4782 * The Queue/RSS action position. 4783 * @param[out] error 4784 * Perform verbose error reporting if not NULL. 4785 * 4786 * @return 4787 * 0 on success, or unique flow_id, a negative errno value 4788 * otherwise and rte_errno is set. 4789 */ 4790 static int 4791 flow_sample_split_prep(struct rte_eth_dev *dev, 4792 uint32_t fdb_tx, 4793 struct rte_flow_item sfx_items[], 4794 const struct rte_flow_action actions[], 4795 struct rte_flow_action actions_sfx[], 4796 struct rte_flow_action actions_pre[], 4797 int actions_n, 4798 int sample_action_pos, 4799 int qrss_action_pos, 4800 struct rte_flow_error *error) 4801 { 4802 struct mlx5_priv *priv = dev->data->dev_private; 4803 struct mlx5_rte_flow_action_set_tag *set_tag; 4804 struct mlx5_rte_flow_item_tag *tag_spec; 4805 struct mlx5_rte_flow_item_tag *tag_mask; 4806 uint32_t tag_id = 0; 4807 int index; 4808 int ret; 4809 4810 if (sample_action_pos < 0) 4811 return rte_flow_error_set(error, EINVAL, 4812 RTE_FLOW_ERROR_TYPE_ACTION, 4813 NULL, "invalid position of sample " 4814 "action in list"); 4815 if (!fdb_tx) { 4816 /* Prepare the prefix tag action. */ 4817 set_tag = (void *)(actions_pre + actions_n + 1); 4818 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); 4819 if (ret < 0) 4820 return ret; 4821 set_tag->id = ret; 4822 mlx5_ipool_malloc(priv->sh->ipool 4823 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); 4824 set_tag->data = tag_id; 4825 /* Prepare the suffix subflow items. */ 4826 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 4827 tag_spec->data = tag_id; 4828 tag_spec->id = set_tag->id; 4829 tag_mask = tag_spec + 1; 4830 tag_mask->data = UINT32_MAX; 4831 sfx_items[0] = (struct rte_flow_item){ 4832 .type = (enum rte_flow_item_type) 4833 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 4834 .spec = tag_spec, 4835 .last = NULL, 4836 .mask = tag_mask, 4837 }; 4838 sfx_items[1] = (struct rte_flow_item){ 4839 .type = (enum rte_flow_item_type) 4840 RTE_FLOW_ITEM_TYPE_END, 4841 }; 4842 } 4843 /* Prepare the actions for prefix and suffix flow. */ 4844 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 4845 index = qrss_action_pos; 4846 /* Put the preceding the Queue/RSS action into prefix flow. */ 4847 if (index != 0) 4848 memcpy(actions_pre, actions, 4849 sizeof(struct rte_flow_action) * index); 4850 /* Put others preceding the sample action into prefix flow. */ 4851 if (sample_action_pos > index + 1) 4852 memcpy(actions_pre + index, actions + index + 1, 4853 sizeof(struct rte_flow_action) * 4854 (sample_action_pos - index - 1)); 4855 index = sample_action_pos - 1; 4856 /* Put Queue/RSS action into Suffix flow. */ 4857 memcpy(actions_sfx, actions + qrss_action_pos, 4858 sizeof(struct rte_flow_action)); 4859 actions_sfx++; 4860 } else { 4861 index = sample_action_pos; 4862 if (index != 0) 4863 memcpy(actions_pre, actions, 4864 sizeof(struct rte_flow_action) * index); 4865 } 4866 /* Add the extra tag action for NIC-RX and E-Switch ingress. */ 4867 if (!fdb_tx) { 4868 actions_pre[index++] = 4869 (struct rte_flow_action){ 4870 .type = (enum rte_flow_action_type) 4871 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 4872 .conf = set_tag, 4873 }; 4874 } 4875 memcpy(actions_pre + index, actions + sample_action_pos, 4876 sizeof(struct rte_flow_action)); 4877 index += 1; 4878 actions_pre[index] = (struct rte_flow_action){ 4879 .type = (enum rte_flow_action_type) 4880 RTE_FLOW_ACTION_TYPE_END, 4881 }; 4882 /* Put the actions after sample into Suffix flow. */ 4883 memcpy(actions_sfx, actions + sample_action_pos + 1, 4884 sizeof(struct rte_flow_action) * 4885 (actions_n - sample_action_pos - 1)); 4886 return tag_id; 4887 } 4888 4889 /** 4890 * The splitting for metadata feature. 4891 * 4892 * - Q/RSS action on NIC Rx should be split in order to pass by 4893 * the mreg copy table (RX_CP_TBL) and then it jumps to the 4894 * action table (RX_ACT_TBL) which has the split Q/RSS action. 4895 * 4896 * - All the actions on NIC Tx should have a mreg copy action to 4897 * copy reg_a from WQE to reg_c[0]. 4898 * 4899 * @param dev 4900 * Pointer to Ethernet device. 4901 * @param[in] flow 4902 * Parent flow structure pointer. 4903 * @param[in] attr 4904 * Flow rule attributes. 4905 * @param[in] items 4906 * Pattern specification (list terminated by the END pattern item). 4907 * @param[in] actions 4908 * Associated actions (list terminated by the END action). 4909 * @param[in] flow_split_info 4910 * Pointer to flow split info structure. 4911 * @param[out] error 4912 * Perform verbose error reporting if not NULL. 4913 * @return 4914 * 0 on success, negative value otherwise 4915 */ 4916 static int 4917 flow_create_split_metadata(struct rte_eth_dev *dev, 4918 struct rte_flow *flow, 4919 const struct rte_flow_attr *attr, 4920 const struct rte_flow_item items[], 4921 const struct rte_flow_action actions[], 4922 struct mlx5_flow_split_info *flow_split_info, 4923 struct rte_flow_error *error) 4924 { 4925 struct mlx5_priv *priv = dev->data->dev_private; 4926 struct mlx5_dev_config *config = &priv->config; 4927 const struct rte_flow_action *qrss = NULL; 4928 struct rte_flow_action *ext_actions = NULL; 4929 struct mlx5_flow *dev_flow = NULL; 4930 uint32_t qrss_id = 0; 4931 int mtr_sfx = 0; 4932 size_t act_size; 4933 int actions_n; 4934 int encap_idx; 4935 int ret; 4936 4937 /* Check whether extensive metadata feature is engaged. */ 4938 if (!config->dv_flow_en || 4939 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4940 !mlx5_flow_ext_mreg_supported(dev)) 4941 return flow_create_split_inner(dev, flow, NULL, attr, items, 4942 actions, flow_split_info, error); 4943 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 4944 &encap_idx); 4945 if (qrss) { 4946 /* Exclude hairpin flows from splitting. */ 4947 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 4948 const struct rte_flow_action_queue *queue; 4949 4950 queue = qrss->conf; 4951 if (mlx5_rxq_get_type(dev, queue->index) == 4952 MLX5_RXQ_TYPE_HAIRPIN) 4953 qrss = NULL; 4954 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 4955 const struct rte_flow_action_rss *rss; 4956 4957 rss = qrss->conf; 4958 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 4959 MLX5_RXQ_TYPE_HAIRPIN) 4960 qrss = NULL; 4961 } 4962 } 4963 if (qrss) { 4964 /* Check if it is in meter suffix table. */ 4965 mtr_sfx = attr->group == (attr->transfer ? 4966 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) : 4967 MLX5_FLOW_TABLE_LEVEL_SUFFIX); 4968 /* 4969 * Q/RSS action on NIC Rx should be split in order to pass by 4970 * the mreg copy table (RX_CP_TBL) and then it jumps to the 4971 * action table (RX_ACT_TBL) which has the split Q/RSS action. 4972 */ 4973 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 4974 sizeof(struct rte_flow_action_set_tag) + 4975 sizeof(struct rte_flow_action_jump); 4976 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 4977 SOCKET_ID_ANY); 4978 if (!ext_actions) 4979 return rte_flow_error_set(error, ENOMEM, 4980 RTE_FLOW_ERROR_TYPE_ACTION, 4981 NULL, "no memory to split " 4982 "metadata flow"); 4983 /* 4984 * If we are the suffix flow of meter, tag already exist. 4985 * Set the tag action to void. 4986 */ 4987 if (mtr_sfx) 4988 ext_actions[qrss - actions].type = 4989 RTE_FLOW_ACTION_TYPE_VOID; 4990 else 4991 ext_actions[qrss - actions].type = 4992 (enum rte_flow_action_type) 4993 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4994 /* 4995 * Create the new actions list with removed Q/RSS action 4996 * and appended set tag and jump to register copy table 4997 * (RX_CP_TBL). We should preallocate unique tag ID here 4998 * in advance, because it is needed for set tag action. 4999 */ 5000 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5001 qrss, actions_n, error); 5002 if (!mtr_sfx && !qrss_id) { 5003 ret = -rte_errno; 5004 goto exit; 5005 } 5006 } else if (attr->egress && !attr->transfer) { 5007 /* 5008 * All the actions on NIC Tx should have a metadata register 5009 * copy action to copy reg_a from WQE to reg_c[meta] 5010 */ 5011 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5012 sizeof(struct mlx5_flow_action_copy_mreg); 5013 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5014 SOCKET_ID_ANY); 5015 if (!ext_actions) 5016 return rte_flow_error_set(error, ENOMEM, 5017 RTE_FLOW_ERROR_TYPE_ACTION, 5018 NULL, "no memory to split " 5019 "metadata flow"); 5020 /* Create the action list appended with copy register. */ 5021 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5022 actions_n, error, encap_idx); 5023 if (ret < 0) 5024 goto exit; 5025 } 5026 /* Add the unmodified original or prefix subflow. */ 5027 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5028 items, ext_actions ? ext_actions : 5029 actions, flow_split_info, error); 5030 if (ret < 0) 5031 goto exit; 5032 MLX5_ASSERT(dev_flow); 5033 if (qrss) { 5034 const struct rte_flow_attr q_attr = { 5035 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5036 .ingress = 1, 5037 }; 5038 /* Internal PMD action to set register. */ 5039 struct mlx5_rte_flow_item_tag q_tag_spec = { 5040 .data = qrss_id, 5041 .id = REG_NON, 5042 }; 5043 struct rte_flow_item q_items[] = { 5044 { 5045 .type = (enum rte_flow_item_type) 5046 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5047 .spec = &q_tag_spec, 5048 .last = NULL, 5049 .mask = NULL, 5050 }, 5051 { 5052 .type = RTE_FLOW_ITEM_TYPE_END, 5053 }, 5054 }; 5055 struct rte_flow_action q_actions[] = { 5056 { 5057 .type = qrss->type, 5058 .conf = qrss->conf, 5059 }, 5060 { 5061 .type = RTE_FLOW_ACTION_TYPE_END, 5062 }, 5063 }; 5064 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5065 5066 /* 5067 * Configure the tag item only if there is no meter subflow. 5068 * Since tag is already marked in the meter suffix subflow 5069 * we can just use the meter suffix items as is. 5070 */ 5071 if (qrss_id) { 5072 /* Not meter subflow. */ 5073 MLX5_ASSERT(!mtr_sfx); 5074 /* 5075 * Put unique id in prefix flow due to it is destroyed 5076 * after suffix flow and id will be freed after there 5077 * is no actual flows with this id and identifier 5078 * reallocation becomes possible (for example, for 5079 * other flows in other threads). 5080 */ 5081 dev_flow->handle->split_flow_id = qrss_id; 5082 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5083 error); 5084 if (ret < 0) 5085 goto exit; 5086 q_tag_spec.id = ret; 5087 } 5088 dev_flow = NULL; 5089 /* Add suffix subflow to execute Q/RSS. */ 5090 flow_split_info->prefix_layers = layers; 5091 flow_split_info->prefix_mark = 0; 5092 ret = flow_create_split_inner(dev, flow, &dev_flow, 5093 &q_attr, mtr_sfx ? items : 5094 q_items, q_actions, 5095 flow_split_info, error); 5096 if (ret < 0) 5097 goto exit; 5098 /* qrss ID should be freed if failed. */ 5099 qrss_id = 0; 5100 MLX5_ASSERT(dev_flow); 5101 } 5102 5103 exit: 5104 /* 5105 * We do not destroy the partially created sub_flows in case of error. 5106 * These ones are included into parent flow list and will be destroyed 5107 * by flow_drv_destroy. 5108 */ 5109 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 5110 qrss_id); 5111 mlx5_free(ext_actions); 5112 return ret; 5113 } 5114 5115 /** 5116 * The splitting for meter feature. 5117 * 5118 * - The meter flow will be split to two flows as prefix and 5119 * suffix flow. The packets make sense only it pass the prefix 5120 * meter action. 5121 * 5122 * - Reg_C_5 is used for the packet to match betweend prefix and 5123 * suffix flow. 5124 * 5125 * @param dev 5126 * Pointer to Ethernet device. 5127 * @param[in] flow 5128 * Parent flow structure pointer. 5129 * @param[in] attr 5130 * Flow rule attributes. 5131 * @param[in] items 5132 * Pattern specification (list terminated by the END pattern item). 5133 * @param[in] actions 5134 * Associated actions (list terminated by the END action). 5135 * @param[in] flow_split_info 5136 * Pointer to flow split info structure. 5137 * @param[out] error 5138 * Perform verbose error reporting if not NULL. 5139 * @return 5140 * 0 on success, negative value otherwise 5141 */ 5142 static int 5143 flow_create_split_meter(struct rte_eth_dev *dev, 5144 struct rte_flow *flow, 5145 const struct rte_flow_attr *attr, 5146 const struct rte_flow_item items[], 5147 const struct rte_flow_action actions[], 5148 struct mlx5_flow_split_info *flow_split_info, 5149 struct rte_flow_error *error) 5150 { 5151 struct mlx5_priv *priv = dev->data->dev_private; 5152 struct rte_flow_action *sfx_actions = NULL; 5153 struct rte_flow_action *pre_actions = NULL; 5154 struct rte_flow_item *sfx_items = NULL; 5155 struct mlx5_flow *dev_flow = NULL; 5156 struct rte_flow_attr sfx_attr = *attr; 5157 uint32_t mtr = 0; 5158 uint32_t mtr_tag_id = 0; 5159 size_t act_size; 5160 size_t item_size; 5161 int actions_n = 0; 5162 int ret; 5163 5164 if (priv->mtr_en) 5165 actions_n = flow_check_meter_action(actions, &mtr); 5166 if (mtr) { 5167 /* The five prefix actions: meter, decap, encap, tag, end. */ 5168 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) + 5169 sizeof(struct mlx5_rte_flow_action_set_tag); 5170 /* tag, vlan, port id, end. */ 5171 #define METER_SUFFIX_ITEM 4 5172 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 5173 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5174 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 5175 0, SOCKET_ID_ANY); 5176 if (!sfx_actions) 5177 return rte_flow_error_set(error, ENOMEM, 5178 RTE_FLOW_ERROR_TYPE_ACTION, 5179 NULL, "no memory to split " 5180 "meter flow"); 5181 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 5182 act_size); 5183 pre_actions = sfx_actions + actions_n; 5184 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items, 5185 actions, sfx_actions, 5186 pre_actions); 5187 if (!mtr_tag_id) { 5188 ret = -rte_errno; 5189 goto exit; 5190 } 5191 /* Add the prefix subflow. */ 5192 flow_split_info->prefix_mark = 0; 5193 ret = flow_create_split_inner(dev, flow, &dev_flow, 5194 attr, items, pre_actions, 5195 flow_split_info, error); 5196 if (ret) { 5197 ret = -rte_errno; 5198 goto exit; 5199 } 5200 dev_flow->handle->split_flow_id = mtr_tag_id; 5201 /* Setting the sfx group atrr. */ 5202 sfx_attr.group = sfx_attr.transfer ? 5203 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) : 5204 MLX5_FLOW_TABLE_LEVEL_SUFFIX; 5205 flow_split_info->prefix_layers = 5206 flow_get_prefix_layer_flags(dev_flow); 5207 flow_split_info->prefix_mark = dev_flow->handle->mark; 5208 } 5209 /* Add the prefix subflow. */ 5210 ret = flow_create_split_metadata(dev, flow, 5211 &sfx_attr, sfx_items ? 5212 sfx_items : items, 5213 sfx_actions ? sfx_actions : actions, 5214 flow_split_info, error); 5215 exit: 5216 if (sfx_actions) 5217 mlx5_free(sfx_actions); 5218 return ret; 5219 } 5220 5221 /** 5222 * The splitting for sample feature. 5223 * 5224 * Once Sample action is detected in the action list, the flow actions should 5225 * be split into prefix sub flow and suffix sub flow. 5226 * 5227 * The original items remain in the prefix sub flow, all actions preceding the 5228 * sample action and the sample action itself will be copied to the prefix 5229 * sub flow, the actions following the sample action will be copied to the 5230 * suffix sub flow, Queue action always be located in the suffix sub flow. 5231 * 5232 * In order to make the packet from prefix sub flow matches with suffix sub 5233 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 5234 * flow uses tag item with the unique flow id. 5235 * 5236 * @param dev 5237 * Pointer to Ethernet device. 5238 * @param[in] flow 5239 * Parent flow structure pointer. 5240 * @param[in] attr 5241 * Flow rule attributes. 5242 * @param[in] items 5243 * Pattern specification (list terminated by the END pattern item). 5244 * @param[in] actions 5245 * Associated actions (list terminated by the END action). 5246 * @param[in] flow_split_info 5247 * Pointer to flow split info structure. 5248 * @param[out] error 5249 * Perform verbose error reporting if not NULL. 5250 * @return 5251 * 0 on success, negative value otherwise 5252 */ 5253 static int 5254 flow_create_split_sample(struct rte_eth_dev *dev, 5255 struct rte_flow *flow, 5256 const struct rte_flow_attr *attr, 5257 const struct rte_flow_item items[], 5258 const struct rte_flow_action actions[], 5259 struct mlx5_flow_split_info *flow_split_info, 5260 struct rte_flow_error *error) 5261 { 5262 struct mlx5_priv *priv = dev->data->dev_private; 5263 struct rte_flow_action *sfx_actions = NULL; 5264 struct rte_flow_action *pre_actions = NULL; 5265 struct rte_flow_item *sfx_items = NULL; 5266 struct mlx5_flow *dev_flow = NULL; 5267 struct rte_flow_attr sfx_attr = *attr; 5268 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5269 struct mlx5_flow_dv_sample_resource *sample_res; 5270 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 5271 struct mlx5_flow_tbl_resource *sfx_tbl; 5272 union mlx5_flow_tbl_key sfx_table_key; 5273 #endif 5274 size_t act_size; 5275 size_t item_size; 5276 uint32_t fdb_tx = 0; 5277 int32_t tag_id = 0; 5278 int actions_n = 0; 5279 int sample_action_pos; 5280 int qrss_action_pos; 5281 int ret = 0; 5282 5283 if (priv->sampler_en) 5284 actions_n = flow_check_match_action(actions, attr, 5285 RTE_FLOW_ACTION_TYPE_SAMPLE, 5286 &sample_action_pos, &qrss_action_pos); 5287 if (actions_n) { 5288 /* The prefix actions must includes sample, tag, end. */ 5289 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 5290 + sizeof(struct mlx5_rte_flow_action_set_tag); 5291 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 5292 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5293 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 5294 item_size), 0, SOCKET_ID_ANY); 5295 if (!sfx_actions) 5296 return rte_flow_error_set(error, ENOMEM, 5297 RTE_FLOW_ERROR_TYPE_ACTION, 5298 NULL, "no memory to split " 5299 "sample flow"); 5300 /* The representor_id is -1 for uplink. */ 5301 fdb_tx = (attr->transfer && priv->representor_id != -1); 5302 if (!fdb_tx) 5303 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 5304 + act_size); 5305 pre_actions = sfx_actions + actions_n; 5306 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items, 5307 actions, sfx_actions, 5308 pre_actions, actions_n, 5309 sample_action_pos, 5310 qrss_action_pos, error); 5311 if (tag_id < 0 || (!fdb_tx && !tag_id)) { 5312 ret = -rte_errno; 5313 goto exit; 5314 } 5315 /* Add the prefix subflow. */ 5316 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5317 items, pre_actions, 5318 flow_split_info, error); 5319 if (ret) { 5320 ret = -rte_errno; 5321 goto exit; 5322 } 5323 dev_flow->handle->split_flow_id = tag_id; 5324 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5325 /* Set the sfx group attr. */ 5326 sample_res = (struct mlx5_flow_dv_sample_resource *) 5327 dev_flow->dv.sample_res; 5328 sfx_tbl = (struct mlx5_flow_tbl_resource *) 5329 sample_res->normal_path_tbl; 5330 sfx_tbl_data = container_of(sfx_tbl, 5331 struct mlx5_flow_tbl_data_entry, tbl); 5332 sfx_table_key.v64 = sfx_tbl_data->entry.key; 5333 sfx_attr.group = sfx_attr.transfer ? 5334 (sfx_table_key.table_id - 1) : 5335 sfx_table_key.table_id; 5336 flow_split_info->prefix_layers = 5337 flow_get_prefix_layer_flags(dev_flow); 5338 flow_split_info->prefix_mark = dev_flow->handle->mark; 5339 /* Suffix group level already be scaled with factor, set 5340 * skip_scale to 1 to avoid scale again in translation. 5341 */ 5342 flow_split_info->skip_scale = 1; 5343 #endif 5344 } 5345 /* Add the suffix subflow. */ 5346 ret = flow_create_split_meter(dev, flow, &sfx_attr, 5347 sfx_items ? sfx_items : items, 5348 sfx_actions ? sfx_actions : actions, 5349 flow_split_info, error); 5350 exit: 5351 if (sfx_actions) 5352 mlx5_free(sfx_actions); 5353 return ret; 5354 } 5355 5356 /** 5357 * Split the flow to subflow set. The splitters might be linked 5358 * in the chain, like this: 5359 * flow_create_split_outer() calls: 5360 * flow_create_split_meter() calls: 5361 * flow_create_split_metadata(meter_subflow_0) calls: 5362 * flow_create_split_inner(metadata_subflow_0) 5363 * flow_create_split_inner(metadata_subflow_1) 5364 * flow_create_split_inner(metadata_subflow_2) 5365 * flow_create_split_metadata(meter_subflow_1) calls: 5366 * flow_create_split_inner(metadata_subflow_0) 5367 * flow_create_split_inner(metadata_subflow_1) 5368 * flow_create_split_inner(metadata_subflow_2) 5369 * 5370 * This provide flexible way to add new levels of flow splitting. 5371 * The all of successfully created subflows are included to the 5372 * parent flow dev_flow list. 5373 * 5374 * @param dev 5375 * Pointer to Ethernet device. 5376 * @param[in] flow 5377 * Parent flow structure pointer. 5378 * @param[in] attr 5379 * Flow rule attributes. 5380 * @param[in] items 5381 * Pattern specification (list terminated by the END pattern item). 5382 * @param[in] actions 5383 * Associated actions (list terminated by the END action). 5384 * @param[in] flow_split_info 5385 * Pointer to flow split info structure. 5386 * @param[out] error 5387 * Perform verbose error reporting if not NULL. 5388 * @return 5389 * 0 on success, negative value otherwise 5390 */ 5391 static int 5392 flow_create_split_outer(struct rte_eth_dev *dev, 5393 struct rte_flow *flow, 5394 const struct rte_flow_attr *attr, 5395 const struct rte_flow_item items[], 5396 const struct rte_flow_action actions[], 5397 struct mlx5_flow_split_info *flow_split_info, 5398 struct rte_flow_error *error) 5399 { 5400 int ret; 5401 5402 ret = flow_create_split_sample(dev, flow, attr, items, 5403 actions, flow_split_info, error); 5404 MLX5_ASSERT(ret <= 0); 5405 return ret; 5406 } 5407 5408 static struct mlx5_flow_tunnel * 5409 flow_tunnel_from_rule(struct rte_eth_dev *dev, 5410 const struct rte_flow_attr *attr, 5411 const struct rte_flow_item items[], 5412 const struct rte_flow_action actions[]) 5413 { 5414 struct mlx5_flow_tunnel *tunnel; 5415 5416 #pragma GCC diagnostic push 5417 #pragma GCC diagnostic ignored "-Wcast-qual" 5418 if (is_flow_tunnel_match_rule(dev, attr, items, actions)) 5419 tunnel = (struct mlx5_flow_tunnel *)items[0].spec; 5420 else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) 5421 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf; 5422 else 5423 tunnel = NULL; 5424 #pragma GCC diagnostic pop 5425 5426 return tunnel; 5427 } 5428 5429 /** 5430 * Adjust flow RSS workspace if needed. 5431 * 5432 * @param wks 5433 * Pointer to thread flow work space. 5434 * @param rss_desc 5435 * Pointer to RSS descriptor. 5436 * @param[in] nrssq_num 5437 * New RSS queue number. 5438 * 5439 * @return 5440 * 0 on success, -1 otherwise and rte_errno is set. 5441 */ 5442 static int 5443 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks, 5444 struct mlx5_flow_rss_desc *rss_desc, 5445 uint32_t nrssq_num) 5446 { 5447 bool fidx = !!wks->flow_idx; 5448 5449 if (likely(nrssq_num <= wks->rssq_num[fidx])) 5450 return 0; 5451 rss_desc->queue = realloc(rss_desc->queue, 5452 sizeof(rss_desc->queue[0]) * RTE_ALIGN(nrssq_num, 2)); 5453 if (!rss_desc->queue) { 5454 rte_errno = ENOMEM; 5455 return -1; 5456 } 5457 wks->rssq_num[fidx] = RTE_ALIGN(nrssq_num, 2); 5458 return 0; 5459 } 5460 5461 /** 5462 * Create a flow and add it to @p list. 5463 * 5464 * @param dev 5465 * Pointer to Ethernet device. 5466 * @param list 5467 * Pointer to a TAILQ flow list. If this parameter NULL, 5468 * no list insertion occurred, flow is just created, 5469 * this is caller's responsibility to track the 5470 * created flow. 5471 * @param[in] attr 5472 * Flow rule attributes. 5473 * @param[in] items 5474 * Pattern specification (list terminated by the END pattern item). 5475 * @param[in] actions 5476 * Associated actions (list terminated by the END action). 5477 * @param[in] external 5478 * This flow rule is created by request external to PMD. 5479 * @param[out] error 5480 * Perform verbose error reporting if not NULL. 5481 * 5482 * @return 5483 * A flow index on success, 0 otherwise and rte_errno is set. 5484 */ 5485 static uint32_t 5486 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 5487 const struct rte_flow_attr *attr, 5488 const struct rte_flow_item items[], 5489 const struct rte_flow_action original_actions[], 5490 bool external, struct rte_flow_error *error) 5491 { 5492 struct mlx5_priv *priv = dev->data->dev_private; 5493 struct rte_flow *flow = NULL; 5494 struct mlx5_flow *dev_flow; 5495 const struct rte_flow_action_rss *rss; 5496 struct mlx5_translated_shared_action 5497 shared_actions[MLX5_MAX_SHARED_ACTIONS]; 5498 int shared_actions_n = MLX5_MAX_SHARED_ACTIONS; 5499 union { 5500 struct mlx5_flow_expand_rss buf; 5501 uint8_t buffer[2048]; 5502 } expand_buffer; 5503 union { 5504 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 5505 uint8_t buffer[2048]; 5506 } actions_rx; 5507 union { 5508 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 5509 uint8_t buffer[2048]; 5510 } actions_hairpin_tx; 5511 union { 5512 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 5513 uint8_t buffer[2048]; 5514 } items_tx; 5515 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 5516 struct mlx5_flow_rss_desc *rss_desc; 5517 const struct rte_flow_action *p_actions_rx; 5518 uint32_t i; 5519 uint32_t idx = 0; 5520 int hairpin_flow; 5521 struct rte_flow_attr attr_tx = { .priority = 0 }; 5522 const struct rte_flow_action *actions; 5523 struct rte_flow_action *translated_actions = NULL; 5524 struct mlx5_flow_tunnel *tunnel; 5525 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 5526 struct mlx5_flow_split_info flow_split_info = { 5527 .external = !!external, 5528 .skip_scale = 0, 5529 .flow_idx = 0, 5530 .prefix_mark = 0, 5531 .prefix_layers = 0 5532 }; 5533 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); 5534 bool fidx = !!wks->flow_idx; 5535 int ret; 5536 5537 MLX5_ASSERT(wks); 5538 rss_desc = &wks->rss_desc[fidx]; 5539 ret = flow_shared_actions_translate(dev, original_actions, 5540 shared_actions, 5541 &shared_actions_n, 5542 &translated_actions, error); 5543 if (ret < 0) { 5544 MLX5_ASSERT(translated_actions == NULL); 5545 return 0; 5546 } 5547 actions = translated_actions ? translated_actions : original_actions; 5548 p_actions_rx = actions; 5549 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 5550 ret = flow_drv_validate(dev, attr, items, p_actions_rx, 5551 external, hairpin_flow, error); 5552 if (ret < 0) 5553 goto error_before_hairpin_split; 5554 flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx); 5555 if (!flow) { 5556 rte_errno = ENOMEM; 5557 goto error_before_hairpin_split; 5558 } 5559 if (hairpin_flow > 0) { 5560 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 5561 rte_errno = EINVAL; 5562 goto error_before_hairpin_split; 5563 } 5564 flow_hairpin_split(dev, actions, actions_rx.actions, 5565 actions_hairpin_tx.actions, items_tx.items, 5566 idx); 5567 p_actions_rx = actions_rx.actions; 5568 } 5569 flow_split_info.flow_idx = idx; 5570 flow->drv_type = flow_get_drv_type(dev, attr); 5571 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 5572 flow->drv_type < MLX5_FLOW_TYPE_MAX); 5573 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue)); 5574 rss = flow_get_rss_action(p_actions_rx); 5575 if (rss) { 5576 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num)) 5577 return 0; 5578 /* 5579 * The following information is required by 5580 * mlx5_flow_hashfields_adjust() in advance. 5581 */ 5582 rss_desc->level = rss->level; 5583 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */ 5584 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types; 5585 } 5586 flow->dev_handles = 0; 5587 if (rss && rss->types) { 5588 unsigned int graph_root; 5589 5590 graph_root = find_graph_root(items, rss->level); 5591 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 5592 items, rss->types, 5593 mlx5_support_expansion, graph_root); 5594 MLX5_ASSERT(ret > 0 && 5595 (unsigned int)ret < sizeof(expand_buffer.buffer)); 5596 } else { 5597 buf->entries = 1; 5598 buf->entry[0].pattern = (void *)(uintptr_t)items; 5599 } 5600 rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions, 5601 shared_actions_n); 5602 /* 5603 * Record the start index when there is a nested call. All sub-flows 5604 * need to be translated before another calling. 5605 * No need to use ping-pong buffer to save memory here. 5606 */ 5607 if (fidx) { 5608 MLX5_ASSERT(!wks->flow_nested_idx); 5609 wks->flow_nested_idx = fidx; 5610 } 5611 for (i = 0; i < buf->entries; ++i) { 5612 /* Initialize flow split data. */ 5613 flow_split_info.prefix_layers = 0; 5614 flow_split_info.prefix_mark = 0; 5615 flow_split_info.skip_scale = 0; 5616 /* 5617 * The splitter may create multiple dev_flows, 5618 * depending on configuration. In the simplest 5619 * case it just creates unmodified original flow. 5620 */ 5621 ret = flow_create_split_outer(dev, flow, attr, 5622 buf->entry[i].pattern, 5623 p_actions_rx, &flow_split_info, 5624 error); 5625 if (ret < 0) 5626 goto error; 5627 if (is_flow_tunnel_steer_rule(dev, attr, 5628 buf->entry[i].pattern, 5629 p_actions_rx)) { 5630 ret = flow_tunnel_add_default_miss(dev, flow, attr, 5631 p_actions_rx, 5632 idx, 5633 &default_miss_ctx, 5634 error); 5635 if (ret < 0) { 5636 mlx5_free(default_miss_ctx.queue); 5637 goto error; 5638 } 5639 } 5640 } 5641 /* Create the tx flow. */ 5642 if (hairpin_flow) { 5643 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 5644 attr_tx.ingress = 0; 5645 attr_tx.egress = 1; 5646 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 5647 actions_hairpin_tx.actions, 5648 idx, error); 5649 if (!dev_flow) 5650 goto error; 5651 dev_flow->flow = flow; 5652 dev_flow->external = 0; 5653 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 5654 dev_flow->handle, next); 5655 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 5656 items_tx.items, 5657 actions_hairpin_tx.actions, error); 5658 if (ret < 0) 5659 goto error; 5660 } 5661 /* 5662 * Update the metadata register copy table. If extensive 5663 * metadata feature is enabled and registers are supported 5664 * we might create the extra rte_flow for each unique 5665 * MARK/FLAG action ID. 5666 * 5667 * The table is updated for ingress Flows only, because 5668 * the egress Flows belong to the different device and 5669 * copy table should be updated in peer NIC Rx domain. 5670 */ 5671 if (attr->ingress && 5672 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 5673 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 5674 if (ret) 5675 goto error; 5676 } 5677 /* 5678 * If the flow is external (from application) OR device is started, then 5679 * the flow will be applied immediately. 5680 */ 5681 if (external || dev->data->dev_started) { 5682 ret = flow_drv_apply(dev, flow, error); 5683 if (ret < 0) 5684 goto error; 5685 } 5686 if (list) { 5687 rte_spinlock_lock(&priv->flow_list_lock); 5688 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx, 5689 flow, next); 5690 rte_spinlock_unlock(&priv->flow_list_lock); 5691 } 5692 flow_rxq_flags_set(dev, flow); 5693 rte_free(translated_actions); 5694 /* Nested flow creation index recovery. */ 5695 wks->flow_idx = wks->flow_nested_idx; 5696 if (wks->flow_nested_idx) 5697 wks->flow_nested_idx = 0; 5698 tunnel = flow_tunnel_from_rule(dev, attr, items, actions); 5699 if (tunnel) { 5700 flow->tunnel = 1; 5701 flow->tunnel_id = tunnel->tunnel_id; 5702 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 5703 mlx5_free(default_miss_ctx.queue); 5704 } 5705 return idx; 5706 error: 5707 MLX5_ASSERT(flow); 5708 ret = rte_errno; /* Save rte_errno before cleanup. */ 5709 flow_mreg_del_copy_action(dev, flow); 5710 flow_drv_destroy(dev, flow); 5711 if (rss_desc->shared_rss) 5712 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *) 5713 mlx5_ipool_get 5714 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 5715 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED); 5716 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx); 5717 rte_errno = ret; /* Restore rte_errno. */ 5718 ret = rte_errno; 5719 rte_errno = ret; 5720 wks->flow_idx = wks->flow_nested_idx; 5721 if (wks->flow_nested_idx) 5722 wks->flow_nested_idx = 0; 5723 error_before_hairpin_split: 5724 rte_free(translated_actions); 5725 return 0; 5726 } 5727 5728 /** 5729 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 5730 * incoming packets to table 1. 5731 * 5732 * Other flow rules, requested for group n, will be created in 5733 * e-switch table n+1. 5734 * Jump action to e-switch group n will be created to group n+1. 5735 * 5736 * Used when working in switchdev mode, to utilise advantages of table 1 5737 * and above. 5738 * 5739 * @param dev 5740 * Pointer to Ethernet device. 5741 * 5742 * @return 5743 * Pointer to flow on success, NULL otherwise and rte_errno is set. 5744 */ 5745 struct rte_flow * 5746 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 5747 { 5748 const struct rte_flow_attr attr = { 5749 .group = 0, 5750 .priority = 0, 5751 .ingress = 1, 5752 .egress = 0, 5753 .transfer = 1, 5754 }; 5755 const struct rte_flow_item pattern = { 5756 .type = RTE_FLOW_ITEM_TYPE_END, 5757 }; 5758 struct rte_flow_action_jump jump = { 5759 .group = 1, 5760 }; 5761 const struct rte_flow_action actions[] = { 5762 { 5763 .type = RTE_FLOW_ACTION_TYPE_JUMP, 5764 .conf = &jump, 5765 }, 5766 { 5767 .type = RTE_FLOW_ACTION_TYPE_END, 5768 }, 5769 }; 5770 struct mlx5_priv *priv = dev->data->dev_private; 5771 struct rte_flow_error error; 5772 5773 return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows, 5774 &attr, &pattern, 5775 actions, false, &error); 5776 } 5777 5778 /** 5779 * Validate a flow supported by the NIC. 5780 * 5781 * @see rte_flow_validate() 5782 * @see rte_flow_ops 5783 */ 5784 int 5785 mlx5_flow_validate(struct rte_eth_dev *dev, 5786 const struct rte_flow_attr *attr, 5787 const struct rte_flow_item items[], 5788 const struct rte_flow_action original_actions[], 5789 struct rte_flow_error *error) 5790 { 5791 int hairpin_flow; 5792 struct mlx5_translated_shared_action 5793 shared_actions[MLX5_MAX_SHARED_ACTIONS]; 5794 int shared_actions_n = MLX5_MAX_SHARED_ACTIONS; 5795 const struct rte_flow_action *actions; 5796 struct rte_flow_action *translated_actions = NULL; 5797 int ret = flow_shared_actions_translate(dev, original_actions, 5798 shared_actions, 5799 &shared_actions_n, 5800 &translated_actions, error); 5801 5802 if (ret) 5803 return ret; 5804 actions = translated_actions ? translated_actions : original_actions; 5805 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 5806 ret = flow_drv_validate(dev, attr, items, actions, 5807 true, hairpin_flow, error); 5808 rte_free(translated_actions); 5809 return ret; 5810 } 5811 5812 /** 5813 * Create a flow. 5814 * 5815 * @see rte_flow_create() 5816 * @see rte_flow_ops 5817 */ 5818 struct rte_flow * 5819 mlx5_flow_create(struct rte_eth_dev *dev, 5820 const struct rte_flow_attr *attr, 5821 const struct rte_flow_item items[], 5822 const struct rte_flow_action actions[], 5823 struct rte_flow_error *error) 5824 { 5825 struct mlx5_priv *priv = dev->data->dev_private; 5826 5827 /* 5828 * If the device is not started yet, it is not allowed to created a 5829 * flow from application. PMD default flows and traffic control flows 5830 * are not affected. 5831 */ 5832 if (unlikely(!dev->data->dev_started)) { 5833 DRV_LOG(DEBUG, "port %u is not started when " 5834 "inserting a flow", dev->data->port_id); 5835 rte_flow_error_set(error, ENODEV, 5836 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5837 NULL, 5838 "port not started"); 5839 return NULL; 5840 } 5841 5842 return (void *)(uintptr_t)flow_list_create(dev, &priv->flows, 5843 attr, items, actions, true, error); 5844 } 5845 5846 /** 5847 * Destroy a flow in a list. 5848 * 5849 * @param dev 5850 * Pointer to Ethernet device. 5851 * @param list 5852 * Pointer to the Indexed flow list. If this parameter NULL, 5853 * there is no flow removal from the list. Be noted that as 5854 * flow is add to the indexed list, memory of the indexed 5855 * list points to maybe changed as flow destroyed. 5856 * @param[in] flow_idx 5857 * Index of flow to destroy. 5858 */ 5859 static void 5860 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 5861 uint32_t flow_idx) 5862 { 5863 struct mlx5_priv *priv = dev->data->dev_private; 5864 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 5865 [MLX5_IPOOL_RTE_FLOW], flow_idx); 5866 5867 if (!flow) 5868 return; 5869 /* 5870 * Update RX queue flags only if port is started, otherwise it is 5871 * already clean. 5872 */ 5873 if (dev->data->dev_started) 5874 flow_rxq_flags_trim(dev, flow); 5875 flow_drv_destroy(dev, flow); 5876 if (list) { 5877 rte_spinlock_lock(&priv->flow_list_lock); 5878 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, 5879 flow_idx, flow, next); 5880 rte_spinlock_unlock(&priv->flow_list_lock); 5881 } 5882 if (flow->tunnel) { 5883 struct mlx5_flow_tunnel *tunnel; 5884 5885 rte_spinlock_lock(&mlx5_tunnel_hub(dev)->sl); 5886 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 5887 RTE_VERIFY(tunnel); 5888 LIST_REMOVE(tunnel, chain); 5889 rte_spinlock_unlock(&mlx5_tunnel_hub(dev)->sl); 5890 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 5891 mlx5_flow_tunnel_free(dev, tunnel); 5892 } 5893 flow_mreg_del_copy_action(dev, flow); 5894 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx); 5895 } 5896 5897 /** 5898 * Destroy all flows. 5899 * 5900 * @param dev 5901 * Pointer to Ethernet device. 5902 * @param list 5903 * Pointer to the Indexed flow list. 5904 * @param active 5905 * If flushing is called avtively. 5906 */ 5907 void 5908 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active) 5909 { 5910 uint32_t num_flushed = 0; 5911 5912 while (*list) { 5913 flow_list_destroy(dev, list, *list); 5914 num_flushed++; 5915 } 5916 if (active) { 5917 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 5918 dev->data->port_id, num_flushed); 5919 } 5920 } 5921 5922 /** 5923 * Stop all default actions for flows. 5924 * 5925 * @param dev 5926 * Pointer to Ethernet device. 5927 */ 5928 void 5929 mlx5_flow_stop_default(struct rte_eth_dev *dev) 5930 { 5931 flow_mreg_del_default_copy_action(dev); 5932 flow_rxq_flags_clear(dev); 5933 } 5934 5935 /** 5936 * Start all default actions for flows. 5937 * 5938 * @param dev 5939 * Pointer to Ethernet device. 5940 * @return 5941 * 0 on success, a negative errno value otherwise and rte_errno is set. 5942 */ 5943 int 5944 mlx5_flow_start_default(struct rte_eth_dev *dev) 5945 { 5946 struct rte_flow_error error; 5947 5948 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 5949 return flow_mreg_add_default_copy_action(dev, &error); 5950 } 5951 5952 /** 5953 * Release key of thread specific flow workspace data. 5954 */ 5955 static void 5956 flow_release_workspace(void *data) 5957 { 5958 struct mlx5_flow_workspace *wks = data; 5959 5960 if (!wks) 5961 return; 5962 free(wks->rss_desc[0].queue); 5963 free(wks->rss_desc[1].queue); 5964 free(wks); 5965 } 5966 5967 /** 5968 * Initialize key of thread specific flow workspace data. 5969 */ 5970 static void 5971 flow_alloc_workspace(void) 5972 { 5973 if (pthread_key_create(&key_workspace, flow_release_workspace)) 5974 DRV_LOG(ERR, "Can't create flow workspace data thread key."); 5975 } 5976 5977 /** 5978 * Get thread specific flow workspace. 5979 * 5980 * @return pointer to thread specific flowworkspace data, NULL on error. 5981 */ 5982 struct mlx5_flow_workspace* 5983 mlx5_flow_get_thread_workspace(void) 5984 { 5985 struct mlx5_flow_workspace *data; 5986 5987 if (pthread_once(&key_workspace_init, flow_alloc_workspace)) { 5988 DRV_LOG(ERR, "Failed to init flow workspace data thread key."); 5989 return NULL; 5990 } 5991 data = pthread_getspecific(key_workspace); 5992 if (!data) { 5993 data = calloc(1, sizeof(*data)); 5994 if (!data) { 5995 DRV_LOG(ERR, "Failed to allocate flow workspace " 5996 "memory."); 5997 return NULL; 5998 } 5999 data->rss_desc[0].queue = calloc(1, 6000 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6001 if (!data->rss_desc[0].queue) 6002 goto err; 6003 data->rss_desc[1].queue = calloc(1, 6004 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6005 if (!data->rss_desc[1].queue) 6006 goto err; 6007 data->rssq_num[0] = MLX5_RSSQ_DEFAULT_NUM; 6008 data->rssq_num[1] = MLX5_RSSQ_DEFAULT_NUM; 6009 if (pthread_setspecific(key_workspace, data)) { 6010 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6011 goto err; 6012 } 6013 } 6014 return data; 6015 err: 6016 if (data->rss_desc[0].queue) 6017 free(data->rss_desc[0].queue); 6018 if (data->rss_desc[1].queue) 6019 free(data->rss_desc[1].queue); 6020 free(data); 6021 return NULL; 6022 } 6023 6024 /** 6025 * Verify the flow list is empty 6026 * 6027 * @param dev 6028 * Pointer to Ethernet device. 6029 * 6030 * @return the number of flows not released. 6031 */ 6032 int 6033 mlx5_flow_verify(struct rte_eth_dev *dev) 6034 { 6035 struct mlx5_priv *priv = dev->data->dev_private; 6036 struct rte_flow *flow; 6037 uint32_t idx; 6038 int ret = 0; 6039 6040 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx, 6041 flow, next) { 6042 DRV_LOG(DEBUG, "port %u flow %p still referenced", 6043 dev->data->port_id, (void *)flow); 6044 ++ret; 6045 } 6046 return ret; 6047 } 6048 6049 /** 6050 * Enable default hairpin egress flow. 6051 * 6052 * @param dev 6053 * Pointer to Ethernet device. 6054 * @param queue 6055 * The queue index. 6056 * 6057 * @return 6058 * 0 on success, a negative errno value otherwise and rte_errno is set. 6059 */ 6060 int 6061 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 6062 uint32_t queue) 6063 { 6064 struct mlx5_priv *priv = dev->data->dev_private; 6065 const struct rte_flow_attr attr = { 6066 .egress = 1, 6067 .priority = 0, 6068 }; 6069 struct mlx5_rte_flow_item_tx_queue queue_spec = { 6070 .queue = queue, 6071 }; 6072 struct mlx5_rte_flow_item_tx_queue queue_mask = { 6073 .queue = UINT32_MAX, 6074 }; 6075 struct rte_flow_item items[] = { 6076 { 6077 .type = (enum rte_flow_item_type) 6078 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6079 .spec = &queue_spec, 6080 .last = NULL, 6081 .mask = &queue_mask, 6082 }, 6083 { 6084 .type = RTE_FLOW_ITEM_TYPE_END, 6085 }, 6086 }; 6087 struct rte_flow_action_jump jump = { 6088 .group = MLX5_HAIRPIN_TX_TABLE, 6089 }; 6090 struct rte_flow_action actions[2]; 6091 uint32_t flow_idx; 6092 struct rte_flow_error error; 6093 6094 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 6095 actions[0].conf = &jump; 6096 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 6097 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6098 &attr, items, actions, false, &error); 6099 if (!flow_idx) { 6100 DRV_LOG(DEBUG, 6101 "Failed to create ctrl flow: rte_errno(%d)," 6102 " type(%d), message(%s)", 6103 rte_errno, error.type, 6104 error.message ? error.message : " (no stated reason)"); 6105 return -rte_errno; 6106 } 6107 return 0; 6108 } 6109 6110 /** 6111 * Enable a control flow configured from the control plane. 6112 * 6113 * @param dev 6114 * Pointer to Ethernet device. 6115 * @param eth_spec 6116 * An Ethernet flow spec to apply. 6117 * @param eth_mask 6118 * An Ethernet flow mask to apply. 6119 * @param vlan_spec 6120 * A VLAN flow spec to apply. 6121 * @param vlan_mask 6122 * A VLAN flow mask to apply. 6123 * 6124 * @return 6125 * 0 on success, a negative errno value otherwise and rte_errno is set. 6126 */ 6127 int 6128 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 6129 struct rte_flow_item_eth *eth_spec, 6130 struct rte_flow_item_eth *eth_mask, 6131 struct rte_flow_item_vlan *vlan_spec, 6132 struct rte_flow_item_vlan *vlan_mask) 6133 { 6134 struct mlx5_priv *priv = dev->data->dev_private; 6135 const struct rte_flow_attr attr = { 6136 .ingress = 1, 6137 .priority = MLX5_FLOW_PRIO_RSVD, 6138 }; 6139 struct rte_flow_item items[] = { 6140 { 6141 .type = RTE_FLOW_ITEM_TYPE_ETH, 6142 .spec = eth_spec, 6143 .last = NULL, 6144 .mask = eth_mask, 6145 }, 6146 { 6147 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 6148 RTE_FLOW_ITEM_TYPE_END, 6149 .spec = vlan_spec, 6150 .last = NULL, 6151 .mask = vlan_mask, 6152 }, 6153 { 6154 .type = RTE_FLOW_ITEM_TYPE_END, 6155 }, 6156 }; 6157 uint16_t queue[priv->reta_idx_n]; 6158 struct rte_flow_action_rss action_rss = { 6159 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 6160 .level = 0, 6161 .types = priv->rss_conf.rss_hf, 6162 .key_len = priv->rss_conf.rss_key_len, 6163 .queue_num = priv->reta_idx_n, 6164 .key = priv->rss_conf.rss_key, 6165 .queue = queue, 6166 }; 6167 struct rte_flow_action actions[] = { 6168 { 6169 .type = RTE_FLOW_ACTION_TYPE_RSS, 6170 .conf = &action_rss, 6171 }, 6172 { 6173 .type = RTE_FLOW_ACTION_TYPE_END, 6174 }, 6175 }; 6176 uint32_t flow_idx; 6177 struct rte_flow_error error; 6178 unsigned int i; 6179 6180 if (!priv->reta_idx_n || !priv->rxqs_n) { 6181 return 0; 6182 } 6183 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 6184 action_rss.types = 0; 6185 for (i = 0; i != priv->reta_idx_n; ++i) 6186 queue[i] = (*priv->reta_idx)[i]; 6187 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6188 &attr, items, actions, false, &error); 6189 if (!flow_idx) 6190 return -rte_errno; 6191 return 0; 6192 } 6193 6194 /** 6195 * Enable a flow control configured from the control plane. 6196 * 6197 * @param dev 6198 * Pointer to Ethernet device. 6199 * @param eth_spec 6200 * An Ethernet flow spec to apply. 6201 * @param eth_mask 6202 * An Ethernet flow mask to apply. 6203 * 6204 * @return 6205 * 0 on success, a negative errno value otherwise and rte_errno is set. 6206 */ 6207 int 6208 mlx5_ctrl_flow(struct rte_eth_dev *dev, 6209 struct rte_flow_item_eth *eth_spec, 6210 struct rte_flow_item_eth *eth_mask) 6211 { 6212 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 6213 } 6214 6215 /** 6216 * Create default miss flow rule matching lacp traffic 6217 * 6218 * @param dev 6219 * Pointer to Ethernet device. 6220 * @param eth_spec 6221 * An Ethernet flow spec to apply. 6222 * 6223 * @return 6224 * 0 on success, a negative errno value otherwise and rte_errno is set. 6225 */ 6226 int 6227 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 6228 { 6229 struct mlx5_priv *priv = dev->data->dev_private; 6230 /* 6231 * The LACP matching is done by only using ether type since using 6232 * a multicast dst mac causes kernel to give low priority to this flow. 6233 */ 6234 static const struct rte_flow_item_eth lacp_spec = { 6235 .type = RTE_BE16(0x8809), 6236 }; 6237 static const struct rte_flow_item_eth lacp_mask = { 6238 .type = 0xffff, 6239 }; 6240 const struct rte_flow_attr attr = { 6241 .ingress = 1, 6242 }; 6243 struct rte_flow_item items[] = { 6244 { 6245 .type = RTE_FLOW_ITEM_TYPE_ETH, 6246 .spec = &lacp_spec, 6247 .mask = &lacp_mask, 6248 }, 6249 { 6250 .type = RTE_FLOW_ITEM_TYPE_END, 6251 }, 6252 }; 6253 struct rte_flow_action actions[] = { 6254 { 6255 .type = (enum rte_flow_action_type) 6256 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 6257 }, 6258 { 6259 .type = RTE_FLOW_ACTION_TYPE_END, 6260 }, 6261 }; 6262 struct rte_flow_error error; 6263 uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6264 &attr, items, actions, false, &error); 6265 6266 if (!flow_idx) 6267 return -rte_errno; 6268 return 0; 6269 } 6270 6271 /** 6272 * Destroy a flow. 6273 * 6274 * @see rte_flow_destroy() 6275 * @see rte_flow_ops 6276 */ 6277 int 6278 mlx5_flow_destroy(struct rte_eth_dev *dev, 6279 struct rte_flow *flow, 6280 struct rte_flow_error *error __rte_unused) 6281 { 6282 struct mlx5_priv *priv = dev->data->dev_private; 6283 6284 flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow); 6285 return 0; 6286 } 6287 6288 /** 6289 * Destroy all flows. 6290 * 6291 * @see rte_flow_flush() 6292 * @see rte_flow_ops 6293 */ 6294 int 6295 mlx5_flow_flush(struct rte_eth_dev *dev, 6296 struct rte_flow_error *error __rte_unused) 6297 { 6298 struct mlx5_priv *priv = dev->data->dev_private; 6299 6300 mlx5_flow_list_flush(dev, &priv->flows, false); 6301 return 0; 6302 } 6303 6304 /** 6305 * Isolated mode. 6306 * 6307 * @see rte_flow_isolate() 6308 * @see rte_flow_ops 6309 */ 6310 int 6311 mlx5_flow_isolate(struct rte_eth_dev *dev, 6312 int enable, 6313 struct rte_flow_error *error) 6314 { 6315 struct mlx5_priv *priv = dev->data->dev_private; 6316 6317 if (dev->data->dev_started) { 6318 rte_flow_error_set(error, EBUSY, 6319 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6320 NULL, 6321 "port must be stopped first"); 6322 return -rte_errno; 6323 } 6324 priv->isolated = !!enable; 6325 if (enable) 6326 dev->dev_ops = &mlx5_os_dev_ops_isolate; 6327 else 6328 dev->dev_ops = &mlx5_os_dev_ops; 6329 6330 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 6331 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 6332 6333 return 0; 6334 } 6335 6336 /** 6337 * Query a flow. 6338 * 6339 * @see rte_flow_query() 6340 * @see rte_flow_ops 6341 */ 6342 static int 6343 flow_drv_query(struct rte_eth_dev *dev, 6344 uint32_t flow_idx, 6345 const struct rte_flow_action *actions, 6346 void *data, 6347 struct rte_flow_error *error) 6348 { 6349 struct mlx5_priv *priv = dev->data->dev_private; 6350 const struct mlx5_flow_driver_ops *fops; 6351 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 6352 [MLX5_IPOOL_RTE_FLOW], 6353 flow_idx); 6354 enum mlx5_flow_drv_type ftype; 6355 6356 if (!flow) { 6357 return rte_flow_error_set(error, ENOENT, 6358 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6359 NULL, 6360 "invalid flow handle"); 6361 } 6362 ftype = flow->drv_type; 6363 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 6364 fops = flow_get_drv_ops(ftype); 6365 6366 return fops->query(dev, flow, actions, data, error); 6367 } 6368 6369 /** 6370 * Query a flow. 6371 * 6372 * @see rte_flow_query() 6373 * @see rte_flow_ops 6374 */ 6375 int 6376 mlx5_flow_query(struct rte_eth_dev *dev, 6377 struct rte_flow *flow, 6378 const struct rte_flow_action *actions, 6379 void *data, 6380 struct rte_flow_error *error) 6381 { 6382 int ret; 6383 6384 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 6385 error); 6386 if (ret < 0) 6387 return ret; 6388 return 0; 6389 } 6390 6391 /** 6392 * Manage filter operations. 6393 * 6394 * @param dev 6395 * Pointer to Ethernet device structure. 6396 * @param filter_type 6397 * Filter type. 6398 * @param filter_op 6399 * Operation to perform. 6400 * @param arg 6401 * Pointer to operation-specific structure. 6402 * 6403 * @return 6404 * 0 on success, a negative errno value otherwise and rte_errno is set. 6405 */ 6406 int 6407 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 6408 enum rte_filter_type filter_type, 6409 enum rte_filter_op filter_op, 6410 void *arg) 6411 { 6412 switch (filter_type) { 6413 case RTE_ETH_FILTER_GENERIC: 6414 if (filter_op != RTE_ETH_FILTER_GET) { 6415 rte_errno = EINVAL; 6416 return -rte_errno; 6417 } 6418 *(const void **)arg = &mlx5_flow_ops; 6419 return 0; 6420 default: 6421 DRV_LOG(ERR, "port %u filter type (%d) not supported", 6422 dev->data->port_id, filter_type); 6423 rte_errno = ENOTSUP; 6424 return -rte_errno; 6425 } 6426 return 0; 6427 } 6428 6429 /** 6430 * Create the needed meter and suffix tables. 6431 * 6432 * @param[in] dev 6433 * Pointer to Ethernet device. 6434 * @param[in] fm 6435 * Pointer to the flow meter. 6436 * 6437 * @return 6438 * Pointer to table set on success, NULL otherwise. 6439 */ 6440 struct mlx5_meter_domains_infos * 6441 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 6442 const struct mlx5_flow_meter *fm) 6443 { 6444 const struct mlx5_flow_driver_ops *fops; 6445 6446 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6447 return fops->create_mtr_tbls(dev, fm); 6448 } 6449 6450 /** 6451 * Destroy the meter table set. 6452 * 6453 * @param[in] dev 6454 * Pointer to Ethernet device. 6455 * @param[in] tbl 6456 * Pointer to the meter table set. 6457 * 6458 * @return 6459 * 0 on success. 6460 */ 6461 int 6462 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 6463 struct mlx5_meter_domains_infos *tbls) 6464 { 6465 const struct mlx5_flow_driver_ops *fops; 6466 6467 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6468 return fops->destroy_mtr_tbls(dev, tbls); 6469 } 6470 6471 /** 6472 * Create policer rules. 6473 * 6474 * @param[in] dev 6475 * Pointer to Ethernet device. 6476 * @param[in] fm 6477 * Pointer to flow meter structure. 6478 * @param[in] attr 6479 * Pointer to flow attributes. 6480 * 6481 * @return 6482 * 0 on success, -1 otherwise. 6483 */ 6484 int 6485 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev, 6486 struct mlx5_flow_meter *fm, 6487 const struct rte_flow_attr *attr) 6488 { 6489 const struct mlx5_flow_driver_ops *fops; 6490 6491 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6492 return fops->create_policer_rules(dev, fm, attr); 6493 } 6494 6495 /** 6496 * Destroy policer rules. 6497 * 6498 * @param[in] fm 6499 * Pointer to flow meter structure. 6500 * @param[in] attr 6501 * Pointer to flow attributes. 6502 * 6503 * @return 6504 * 0 on success, -1 otherwise. 6505 */ 6506 int 6507 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev, 6508 struct mlx5_flow_meter *fm, 6509 const struct rte_flow_attr *attr) 6510 { 6511 const struct mlx5_flow_driver_ops *fops; 6512 6513 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6514 return fops->destroy_policer_rules(dev, fm, attr); 6515 } 6516 6517 /** 6518 * Allocate a counter. 6519 * 6520 * @param[in] dev 6521 * Pointer to Ethernet device structure. 6522 * 6523 * @return 6524 * Index to allocated counter on success, 0 otherwise. 6525 */ 6526 uint32_t 6527 mlx5_counter_alloc(struct rte_eth_dev *dev) 6528 { 6529 const struct mlx5_flow_driver_ops *fops; 6530 struct rte_flow_attr attr = { .transfer = 0 }; 6531 6532 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 6533 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6534 return fops->counter_alloc(dev); 6535 } 6536 DRV_LOG(ERR, 6537 "port %u counter allocate is not supported.", 6538 dev->data->port_id); 6539 return 0; 6540 } 6541 6542 /** 6543 * Free a counter. 6544 * 6545 * @param[in] dev 6546 * Pointer to Ethernet device structure. 6547 * @param[in] cnt 6548 * Index to counter to be free. 6549 */ 6550 void 6551 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 6552 { 6553 const struct mlx5_flow_driver_ops *fops; 6554 struct rte_flow_attr attr = { .transfer = 0 }; 6555 6556 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 6557 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6558 fops->counter_free(dev, cnt); 6559 return; 6560 } 6561 DRV_LOG(ERR, 6562 "port %u counter free is not supported.", 6563 dev->data->port_id); 6564 } 6565 6566 /** 6567 * Query counter statistics. 6568 * 6569 * @param[in] dev 6570 * Pointer to Ethernet device structure. 6571 * @param[in] cnt 6572 * Index to counter to query. 6573 * @param[in] clear 6574 * Set to clear counter statistics. 6575 * @param[out] pkts 6576 * The counter hits packets number to save. 6577 * @param[out] bytes 6578 * The counter hits bytes number to save. 6579 * 6580 * @return 6581 * 0 on success, a negative errno value otherwise. 6582 */ 6583 int 6584 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 6585 bool clear, uint64_t *pkts, uint64_t *bytes) 6586 { 6587 const struct mlx5_flow_driver_ops *fops; 6588 struct rte_flow_attr attr = { .transfer = 0 }; 6589 6590 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 6591 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6592 return fops->counter_query(dev, cnt, clear, pkts, bytes); 6593 } 6594 DRV_LOG(ERR, 6595 "port %u counter query is not supported.", 6596 dev->data->port_id); 6597 return -ENOTSUP; 6598 } 6599 6600 /** 6601 * Allocate a new memory for the counter values wrapped by all the needed 6602 * management. 6603 * 6604 * @param[in] sh 6605 * Pointer to mlx5_dev_ctx_shared object. 6606 * 6607 * @return 6608 * 0 on success, a negative errno value otherwise. 6609 */ 6610 static int 6611 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 6612 { 6613 struct mlx5_devx_mkey_attr mkey_attr; 6614 struct mlx5_counter_stats_mem_mng *mem_mng; 6615 volatile struct flow_counter_stats *raw_data; 6616 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 6617 int size = (sizeof(struct flow_counter_stats) * 6618 MLX5_COUNTERS_PER_POOL + 6619 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 6620 sizeof(struct mlx5_counter_stats_mem_mng); 6621 size_t pgsize = rte_mem_page_size(); 6622 uint8_t *mem; 6623 int i; 6624 6625 if (pgsize == (size_t)-1) { 6626 DRV_LOG(ERR, "Failed to get mem page size"); 6627 rte_errno = ENOMEM; 6628 return -ENOMEM; 6629 } 6630 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 6631 if (!mem) { 6632 rte_errno = ENOMEM; 6633 return -ENOMEM; 6634 } 6635 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 6636 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 6637 mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size, 6638 IBV_ACCESS_LOCAL_WRITE); 6639 if (!mem_mng->umem) { 6640 rte_errno = errno; 6641 mlx5_free(mem); 6642 return -rte_errno; 6643 } 6644 mkey_attr.addr = (uintptr_t)mem; 6645 mkey_attr.size = size; 6646 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem); 6647 mkey_attr.pd = sh->pdn; 6648 mkey_attr.log_entity_size = 0; 6649 mkey_attr.pg_access = 0; 6650 mkey_attr.klm_array = NULL; 6651 mkey_attr.klm_num = 0; 6652 mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write; 6653 mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read; 6654 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr); 6655 if (!mem_mng->dm) { 6656 mlx5_glue->devx_umem_dereg(mem_mng->umem); 6657 rte_errno = errno; 6658 mlx5_free(mem); 6659 return -rte_errno; 6660 } 6661 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 6662 raw_data = (volatile struct flow_counter_stats *)mem; 6663 for (i = 0; i < raws_n; ++i) { 6664 mem_mng->raws[i].mem_mng = mem_mng; 6665 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 6666 } 6667 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 6668 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 6669 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 6670 next); 6671 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 6672 sh->cmng.mem_mng = mem_mng; 6673 return 0; 6674 } 6675 6676 /** 6677 * Set the statistic memory to the new counter pool. 6678 * 6679 * @param[in] sh 6680 * Pointer to mlx5_dev_ctx_shared object. 6681 * @param[in] pool 6682 * Pointer to the pool to set the statistic memory. 6683 * 6684 * @return 6685 * 0 on success, a negative errno value otherwise. 6686 */ 6687 static int 6688 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 6689 struct mlx5_flow_counter_pool *pool) 6690 { 6691 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 6692 /* Resize statistic memory once used out. */ 6693 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 6694 mlx5_flow_create_counter_stat_mem_mng(sh)) { 6695 DRV_LOG(ERR, "Cannot resize counter stat mem."); 6696 return -1; 6697 } 6698 rte_spinlock_lock(&pool->sl); 6699 pool->raw = cmng->mem_mng->raws + pool->index % 6700 MLX5_CNT_CONTAINER_RESIZE; 6701 rte_spinlock_unlock(&pool->sl); 6702 pool->raw_hw = NULL; 6703 return 0; 6704 } 6705 6706 #define MLX5_POOL_QUERY_FREQ_US 1000000 6707 6708 /** 6709 * Set the periodic procedure for triggering asynchronous batch queries for all 6710 * the counter pools. 6711 * 6712 * @param[in] sh 6713 * Pointer to mlx5_dev_ctx_shared object. 6714 */ 6715 void 6716 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 6717 { 6718 uint32_t pools_n, us; 6719 6720 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 6721 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 6722 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 6723 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 6724 sh->cmng.query_thread_on = 0; 6725 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 6726 } else { 6727 sh->cmng.query_thread_on = 1; 6728 } 6729 } 6730 6731 /** 6732 * The periodic procedure for triggering asynchronous batch queries for all the 6733 * counter pools. This function is probably called by the host thread. 6734 * 6735 * @param[in] arg 6736 * The parameter for the alarm process. 6737 */ 6738 void 6739 mlx5_flow_query_alarm(void *arg) 6740 { 6741 struct mlx5_dev_ctx_shared *sh = arg; 6742 int ret; 6743 uint16_t pool_index = sh->cmng.pool_index; 6744 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 6745 struct mlx5_flow_counter_pool *pool; 6746 uint16_t n_valid; 6747 6748 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 6749 goto set_alarm; 6750 rte_spinlock_lock(&cmng->pool_update_sl); 6751 pool = cmng->pools[pool_index]; 6752 n_valid = cmng->n_valid; 6753 rte_spinlock_unlock(&cmng->pool_update_sl); 6754 /* Set the statistic memory to the new created pool. */ 6755 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 6756 goto set_alarm; 6757 if (pool->raw_hw) 6758 /* There is a pool query in progress. */ 6759 goto set_alarm; 6760 pool->raw_hw = 6761 LIST_FIRST(&sh->cmng.free_stat_raws); 6762 if (!pool->raw_hw) 6763 /* No free counter statistics raw memory. */ 6764 goto set_alarm; 6765 /* 6766 * Identify the counters released between query trigger and query 6767 * handle more efficiently. The counter released in this gap period 6768 * should wait for a new round of query as the new arrived packets 6769 * will not be taken into account. 6770 */ 6771 pool->query_gen++; 6772 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 6773 MLX5_COUNTERS_PER_POOL, 6774 NULL, NULL, 6775 pool->raw_hw->mem_mng->dm->id, 6776 (void *)(uintptr_t) 6777 pool->raw_hw->data, 6778 sh->devx_comp, 6779 (uint64_t)(uintptr_t)pool); 6780 if (ret) { 6781 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 6782 " %d", pool->min_dcs->id); 6783 pool->raw_hw = NULL; 6784 goto set_alarm; 6785 } 6786 LIST_REMOVE(pool->raw_hw, next); 6787 sh->cmng.pending_queries++; 6788 pool_index++; 6789 if (pool_index >= n_valid) 6790 pool_index = 0; 6791 set_alarm: 6792 sh->cmng.pool_index = pool_index; 6793 mlx5_set_query_alarm(sh); 6794 } 6795 6796 /** 6797 * Check and callback event for new aged flow in the counter pool 6798 * 6799 * @param[in] sh 6800 * Pointer to mlx5_dev_ctx_shared object. 6801 * @param[in] pool 6802 * Pointer to Current counter pool. 6803 */ 6804 static void 6805 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 6806 struct mlx5_flow_counter_pool *pool) 6807 { 6808 struct mlx5_priv *priv; 6809 struct mlx5_flow_counter *cnt; 6810 struct mlx5_age_info *age_info; 6811 struct mlx5_age_param *age_param; 6812 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 6813 struct mlx5_counter_stats_raw *prev = pool->raw; 6814 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 6815 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 6816 uint16_t expected = AGE_CANDIDATE; 6817 uint32_t i; 6818 6819 pool->time_of_last_age_check = curr_time; 6820 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 6821 cnt = MLX5_POOL_GET_CNT(pool, i); 6822 age_param = MLX5_CNT_TO_AGE(cnt); 6823 if (__atomic_load_n(&age_param->state, 6824 __ATOMIC_RELAXED) != AGE_CANDIDATE) 6825 continue; 6826 if (cur->data[i].hits != prev->data[i].hits) { 6827 __atomic_store_n(&age_param->sec_since_last_hit, 0, 6828 __ATOMIC_RELAXED); 6829 continue; 6830 } 6831 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 6832 time_delta, 6833 __ATOMIC_RELAXED) <= age_param->timeout) 6834 continue; 6835 /** 6836 * Hold the lock first, or if between the 6837 * state AGE_TMOUT and tailq operation the 6838 * release happened, the release procedure 6839 * may delete a non-existent tailq node. 6840 */ 6841 priv = rte_eth_devices[age_param->port_id].data->dev_private; 6842 age_info = GET_PORT_AGE_INFO(priv); 6843 rte_spinlock_lock(&age_info->aged_sl); 6844 if (__atomic_compare_exchange_n(&age_param->state, &expected, 6845 AGE_TMOUT, false, 6846 __ATOMIC_RELAXED, 6847 __ATOMIC_RELAXED)) { 6848 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 6849 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 6850 } 6851 rte_spinlock_unlock(&age_info->aged_sl); 6852 } 6853 mlx5_age_event_prepare(sh); 6854 } 6855 6856 /** 6857 * Handler for the HW respond about ready values from an asynchronous batch 6858 * query. This function is probably called by the host thread. 6859 * 6860 * @param[in] sh 6861 * The pointer to the shared device context. 6862 * @param[in] async_id 6863 * The Devx async ID. 6864 * @param[in] status 6865 * The status of the completion. 6866 */ 6867 void 6868 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 6869 uint64_t async_id, int status) 6870 { 6871 struct mlx5_flow_counter_pool *pool = 6872 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 6873 struct mlx5_counter_stats_raw *raw_to_free; 6874 uint8_t query_gen = pool->query_gen ^ 1; 6875 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 6876 enum mlx5_counter_type cnt_type = 6877 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 6878 MLX5_COUNTER_TYPE_ORIGIN; 6879 6880 if (unlikely(status)) { 6881 raw_to_free = pool->raw_hw; 6882 } else { 6883 raw_to_free = pool->raw; 6884 if (pool->is_aged) 6885 mlx5_flow_aging_check(sh, pool); 6886 rte_spinlock_lock(&pool->sl); 6887 pool->raw = pool->raw_hw; 6888 rte_spinlock_unlock(&pool->sl); 6889 /* Be sure the new raw counters data is updated in memory. */ 6890 rte_io_wmb(); 6891 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 6892 rte_spinlock_lock(&cmng->csl[cnt_type]); 6893 TAILQ_CONCAT(&cmng->counters[cnt_type], 6894 &pool->counters[query_gen], next); 6895 rte_spinlock_unlock(&cmng->csl[cnt_type]); 6896 } 6897 } 6898 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 6899 pool->raw_hw = NULL; 6900 sh->cmng.pending_queries--; 6901 } 6902 6903 static const struct mlx5_flow_tbl_data_entry * 6904 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 6905 { 6906 struct mlx5_priv *priv = dev->data->dev_private; 6907 struct mlx5_dev_ctx_shared *sh = priv->sh; 6908 struct mlx5_hlist_entry *he; 6909 union tunnel_offload_mark mbits = { .val = mark }; 6910 union mlx5_flow_tbl_key table_key = { 6911 { 6912 .table_id = tunnel_id_to_flow_tbl(mbits.table_id), 6913 .dummy = 0, 6914 .domain = !!mbits.transfer, 6915 .direction = 0, 6916 } 6917 }; 6918 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL); 6919 return he ? 6920 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 6921 } 6922 6923 static void 6924 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list, 6925 struct mlx5_hlist_entry *entry) 6926 { 6927 struct mlx5_dev_ctx_shared *sh = list->ctx; 6928 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 6929 6930 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 6931 tunnel_flow_tbl_to_id(tte->flow_table)); 6932 mlx5_free(tte); 6933 } 6934 6935 static struct mlx5_hlist_entry * 6936 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, 6937 uint64_t key __rte_unused, 6938 void *ctx __rte_unused) 6939 { 6940 struct mlx5_dev_ctx_shared *sh = list->ctx; 6941 struct tunnel_tbl_entry *tte; 6942 6943 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 6944 sizeof(*tte), 0, 6945 SOCKET_ID_ANY); 6946 if (!tte) 6947 goto err; 6948 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 6949 &tte->flow_table); 6950 if (tte->flow_table >= MLX5_MAX_TABLES) { 6951 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.", 6952 tte->flow_table); 6953 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 6954 tte->flow_table); 6955 goto err; 6956 } else if (!tte->flow_table) { 6957 goto err; 6958 } 6959 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 6960 return &tte->hash; 6961 err: 6962 if (tte) 6963 mlx5_free(tte); 6964 return NULL; 6965 } 6966 6967 static uint32_t 6968 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 6969 const struct mlx5_flow_tunnel *tunnel, 6970 uint32_t group, uint32_t *table, 6971 struct rte_flow_error *error) 6972 { 6973 struct mlx5_hlist_entry *he; 6974 struct tunnel_tbl_entry *tte; 6975 union tunnel_tbl_key key = { 6976 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 6977 .group = group 6978 }; 6979 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 6980 struct mlx5_hlist *group_hash; 6981 6982 group_hash = tunnel ? tunnel->groups : thub->groups; 6983 he = mlx5_hlist_register(group_hash, key.val, NULL); 6984 if (!he) 6985 return rte_flow_error_set(error, EINVAL, 6986 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 6987 NULL, 6988 "tunnel group index not supported"); 6989 tte = container_of(he, typeof(*tte), hash); 6990 *table = tte->flow_table; 6991 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 6992 dev->data->port_id, key.tunnel_id, group, *table); 6993 return 0; 6994 } 6995 6996 static int 6997 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 6998 struct flow_grp_info grp_info, struct rte_flow_error *error) 6999 { 7000 if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) { 7001 if (group == UINT32_MAX) 7002 return rte_flow_error_set 7003 (error, EINVAL, 7004 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 7005 NULL, 7006 "group index not supported"); 7007 *table = group + 1; 7008 } else { 7009 *table = group; 7010 } 7011 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 7012 return 0; 7013 } 7014 7015 /** 7016 * Translate the rte_flow group index to HW table value. 7017 * 7018 * If tunnel offload is disabled, all group ids converted to flow table 7019 * id using the standard method. 7020 * If tunnel offload is enabled, group id can be converted using the 7021 * standard or tunnel conversion method. Group conversion method 7022 * selection depends on flags in `grp_info` parameter: 7023 * - Internal (grp_info.external == 0) groups conversion uses the 7024 * standard method. 7025 * - Group ids in JUMP action converted with the tunnel conversion. 7026 * - Group id in rule attribute conversion depends on a rule type and 7027 * group id value: 7028 * ** non zero group attributes converted with the tunnel method 7029 * ** zero group attribute in non-tunnel rule is converted using the 7030 * standard method - there's only one root table 7031 * ** zero group attribute in steer tunnel rule is converted with the 7032 * standard method - single root table 7033 * ** zero group attribute in match tunnel rule is a special OvS 7034 * case: that value is used for portability reasons. That group 7035 * id is converted with the tunnel conversion method. 7036 * 7037 * @param[in] dev 7038 * Port device 7039 * @param[in] tunnel 7040 * PMD tunnel offload object 7041 * @param[in] group 7042 * rte_flow group index value. 7043 * @param[out] table 7044 * HW table value. 7045 * @param[in] grp_info 7046 * flags used for conversion 7047 * @param[out] error 7048 * Pointer to error structure. 7049 * 7050 * @return 7051 * 0 on success, a negative errno value otherwise and rte_errno is set. 7052 */ 7053 int 7054 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 7055 const struct mlx5_flow_tunnel *tunnel, 7056 uint32_t group, uint32_t *table, 7057 struct flow_grp_info grp_info, 7058 struct rte_flow_error *error) 7059 { 7060 int ret; 7061 bool standard_translation; 7062 7063 if (!grp_info.skip_scale && grp_info.external && 7064 group < MLX5_MAX_TABLES_EXTERNAL) 7065 group *= MLX5_FLOW_TABLE_FACTOR; 7066 if (is_tunnel_offload_active(dev)) { 7067 standard_translation = !grp_info.external || 7068 grp_info.std_tbl_fix; 7069 } else { 7070 standard_translation = true; 7071 } 7072 DRV_LOG(DEBUG, 7073 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s", 7074 dev->data->port_id, group, grp_info.transfer, 7075 grp_info.external, grp_info.fdb_def_rule, 7076 standard_translation ? "STANDARD" : "TUNNEL"); 7077 if (standard_translation) 7078 ret = flow_group_to_table(dev->data->port_id, group, table, 7079 grp_info, error); 7080 else 7081 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 7082 table, error); 7083 7084 return ret; 7085 } 7086 7087 /** 7088 * Discover availability of metadata reg_c's. 7089 * 7090 * Iteratively use test flows to check availability. 7091 * 7092 * @param[in] dev 7093 * Pointer to the Ethernet device structure. 7094 * 7095 * @return 7096 * 0 on success, a negative errno value otherwise and rte_errno is set. 7097 */ 7098 int 7099 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 7100 { 7101 struct mlx5_priv *priv = dev->data->dev_private; 7102 struct mlx5_dev_config *config = &priv->config; 7103 enum modify_reg idx; 7104 int n = 0; 7105 7106 /* reg_c[0] and reg_c[1] are reserved. */ 7107 config->flow_mreg_c[n++] = REG_C_0; 7108 config->flow_mreg_c[n++] = REG_C_1; 7109 /* Discover availability of other reg_c's. */ 7110 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 7111 struct rte_flow_attr attr = { 7112 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 7113 .priority = MLX5_FLOW_PRIO_RSVD, 7114 .ingress = 1, 7115 }; 7116 struct rte_flow_item items[] = { 7117 [0] = { 7118 .type = RTE_FLOW_ITEM_TYPE_END, 7119 }, 7120 }; 7121 struct rte_flow_action actions[] = { 7122 [0] = { 7123 .type = (enum rte_flow_action_type) 7124 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 7125 .conf = &(struct mlx5_flow_action_copy_mreg){ 7126 .src = REG_C_1, 7127 .dst = idx, 7128 }, 7129 }, 7130 [1] = { 7131 .type = RTE_FLOW_ACTION_TYPE_JUMP, 7132 .conf = &(struct rte_flow_action_jump){ 7133 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 7134 }, 7135 }, 7136 [2] = { 7137 .type = RTE_FLOW_ACTION_TYPE_END, 7138 }, 7139 }; 7140 uint32_t flow_idx; 7141 struct rte_flow *flow; 7142 struct rte_flow_error error; 7143 7144 if (!config->dv_flow_en) 7145 break; 7146 /* Create internal flow, validation skips copy action. */ 7147 flow_idx = flow_list_create(dev, NULL, &attr, items, 7148 actions, false, &error); 7149 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 7150 flow_idx); 7151 if (!flow) 7152 continue; 7153 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL)) 7154 config->flow_mreg_c[n++] = idx; 7155 flow_list_destroy(dev, NULL, flow_idx); 7156 } 7157 for (; n < MLX5_MREG_C_NUM; ++n) 7158 config->flow_mreg_c[n] = REG_NON; 7159 return 0; 7160 } 7161 7162 /** 7163 * Dump flow raw hw data to file 7164 * 7165 * @param[in] dev 7166 * The pointer to Ethernet device. 7167 * @param[in] file 7168 * A pointer to a file for output. 7169 * @param[out] error 7170 * Perform verbose error reporting if not NULL. PMDs initialize this 7171 * structure in case of error only. 7172 * @return 7173 * 0 on success, a nagative value otherwise. 7174 */ 7175 int 7176 mlx5_flow_dev_dump(struct rte_eth_dev *dev, 7177 FILE *file, 7178 struct rte_flow_error *error __rte_unused) 7179 { 7180 struct mlx5_priv *priv = dev->data->dev_private; 7181 struct mlx5_dev_ctx_shared *sh = priv->sh; 7182 7183 if (!priv->config.dv_flow_en) { 7184 if (fputs("device dv flow disabled\n", file) <= 0) 7185 return -errno; 7186 return -ENOTSUP; 7187 } 7188 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain, 7189 sh->tx_domain, file); 7190 } 7191 7192 /** 7193 * Get aged-out flows. 7194 * 7195 * @param[in] dev 7196 * Pointer to the Ethernet device structure. 7197 * @param[in] context 7198 * The address of an array of pointers to the aged-out flows contexts. 7199 * @param[in] nb_countexts 7200 * The length of context array pointers. 7201 * @param[out] error 7202 * Perform verbose error reporting if not NULL. Initialized in case of 7203 * error only. 7204 * 7205 * @return 7206 * how many contexts get in success, otherwise negative errno value. 7207 * if nb_contexts is 0, return the amount of all aged contexts. 7208 * if nb_contexts is not 0 , return the amount of aged flows reported 7209 * in the context array. 7210 */ 7211 int 7212 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 7213 uint32_t nb_contexts, struct rte_flow_error *error) 7214 { 7215 const struct mlx5_flow_driver_ops *fops; 7216 struct rte_flow_attr attr = { .transfer = 0 }; 7217 7218 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7219 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7220 return fops->get_aged_flows(dev, contexts, nb_contexts, 7221 error); 7222 } 7223 DRV_LOG(ERR, 7224 "port %u get aged flows is not supported.", 7225 dev->data->port_id); 7226 return -ENOTSUP; 7227 } 7228 7229 /* Wrapper for driver action_validate op callback */ 7230 static int 7231 flow_drv_action_validate(struct rte_eth_dev *dev, 7232 const struct rte_flow_shared_action_conf *conf, 7233 const struct rte_flow_action *action, 7234 const struct mlx5_flow_driver_ops *fops, 7235 struct rte_flow_error *error) 7236 { 7237 static const char err_msg[] = "shared action validation unsupported"; 7238 7239 if (!fops->action_validate) { 7240 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7241 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7242 NULL, err_msg); 7243 return -rte_errno; 7244 } 7245 return fops->action_validate(dev, conf, action, error); 7246 } 7247 7248 /** 7249 * Destroys the shared action by handle. 7250 * 7251 * @param dev 7252 * Pointer to Ethernet device structure. 7253 * @param[in] action 7254 * Handle for the shared action to be destroyed. 7255 * @param[out] error 7256 * Perform verbose error reporting if not NULL. PMDs initialize this 7257 * structure in case of error only. 7258 * 7259 * @return 7260 * 0 on success, a negative errno value otherwise and rte_errno is set. 7261 * 7262 * @note: wrapper for driver action_create op callback. 7263 */ 7264 static int 7265 mlx5_shared_action_destroy(struct rte_eth_dev *dev, 7266 struct rte_flow_shared_action *action, 7267 struct rte_flow_error *error) 7268 { 7269 static const char err_msg[] = "shared action destruction unsupported"; 7270 struct rte_flow_attr attr = { .transfer = 0 }; 7271 const struct mlx5_flow_driver_ops *fops = 7272 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7273 7274 if (!fops->action_destroy) { 7275 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7276 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7277 NULL, err_msg); 7278 return -rte_errno; 7279 } 7280 return fops->action_destroy(dev, action, error); 7281 } 7282 7283 /* Wrapper for driver action_destroy op callback */ 7284 static int 7285 flow_drv_action_update(struct rte_eth_dev *dev, 7286 struct rte_flow_shared_action *action, 7287 const void *action_conf, 7288 const struct mlx5_flow_driver_ops *fops, 7289 struct rte_flow_error *error) 7290 { 7291 static const char err_msg[] = "shared action update unsupported"; 7292 7293 if (!fops->action_update) { 7294 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7295 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7296 NULL, err_msg); 7297 return -rte_errno; 7298 } 7299 return fops->action_update(dev, action, action_conf, error); 7300 } 7301 7302 /* Wrapper for driver action_destroy op callback */ 7303 static int 7304 flow_drv_action_query(struct rte_eth_dev *dev, 7305 const struct rte_flow_shared_action *action, 7306 void *data, 7307 const struct mlx5_flow_driver_ops *fops, 7308 struct rte_flow_error *error) 7309 { 7310 static const char err_msg[] = "shared action query unsupported"; 7311 7312 if (!fops->action_query) { 7313 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7314 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7315 NULL, err_msg); 7316 return -rte_errno; 7317 } 7318 return fops->action_query(dev, action, data, error); 7319 } 7320 7321 /** 7322 * Create shared action for reuse in multiple flow rules. 7323 * 7324 * @param dev 7325 * Pointer to Ethernet device structure. 7326 * @param[in] action 7327 * Action configuration for shared action creation. 7328 * @param[out] error 7329 * Perform verbose error reporting if not NULL. PMDs initialize this 7330 * structure in case of error only. 7331 * @return 7332 * A valid handle in case of success, NULL otherwise and rte_errno is set. 7333 */ 7334 static struct rte_flow_shared_action * 7335 mlx5_shared_action_create(struct rte_eth_dev *dev, 7336 const struct rte_flow_shared_action_conf *conf, 7337 const struct rte_flow_action *action, 7338 struct rte_flow_error *error) 7339 { 7340 static const char err_msg[] = "shared action creation unsupported"; 7341 struct rte_flow_attr attr = { .transfer = 0 }; 7342 const struct mlx5_flow_driver_ops *fops = 7343 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7344 7345 if (flow_drv_action_validate(dev, conf, action, fops, error)) 7346 return NULL; 7347 if (!fops->action_create) { 7348 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7349 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7350 NULL, err_msg); 7351 return NULL; 7352 } 7353 return fops->action_create(dev, conf, action, error); 7354 } 7355 7356 /** 7357 * Updates inplace the shared action configuration pointed by *action* handle 7358 * with the configuration provided as *action* argument. 7359 * The update of the shared action configuration effects all flow rules reusing 7360 * the action via handle. 7361 * 7362 * @param dev 7363 * Pointer to Ethernet device structure. 7364 * @param[in] shared_action 7365 * Handle for the shared action to be updated. 7366 * @param[in] action 7367 * Action specification used to modify the action pointed by handle. 7368 * *action* should be of same type with the action pointed by the *action* 7369 * handle argument, otherwise considered as invalid. 7370 * @param[out] error 7371 * Perform verbose error reporting if not NULL. PMDs initialize this 7372 * structure in case of error only. 7373 * 7374 * @return 7375 * 0 on success, a negative errno value otherwise and rte_errno is set. 7376 */ 7377 static int 7378 mlx5_shared_action_update(struct rte_eth_dev *dev, 7379 struct rte_flow_shared_action *shared_action, 7380 const struct rte_flow_action *action, 7381 struct rte_flow_error *error) 7382 { 7383 struct rte_flow_attr attr = { .transfer = 0 }; 7384 const struct mlx5_flow_driver_ops *fops = 7385 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7386 int ret; 7387 7388 ret = flow_drv_action_validate(dev, NULL, action, fops, error); 7389 if (ret) 7390 return ret; 7391 return flow_drv_action_update(dev, shared_action, action->conf, fops, 7392 error); 7393 } 7394 7395 /** 7396 * Query the shared action by handle. 7397 * 7398 * This function allows retrieving action-specific data such as counters. 7399 * Data is gathered by special action which may be present/referenced in 7400 * more than one flow rule definition. 7401 * 7402 * \see RTE_FLOW_ACTION_TYPE_COUNT 7403 * 7404 * @param dev 7405 * Pointer to Ethernet device structure. 7406 * @param[in] action 7407 * Handle for the shared action to query. 7408 * @param[in, out] data 7409 * Pointer to storage for the associated query data type. 7410 * @param[out] error 7411 * Perform verbose error reporting if not NULL. PMDs initialize this 7412 * structure in case of error only. 7413 * 7414 * @return 7415 * 0 on success, a negative errno value otherwise and rte_errno is set. 7416 */ 7417 static int 7418 mlx5_shared_action_query(struct rte_eth_dev *dev, 7419 const struct rte_flow_shared_action *action, 7420 void *data, 7421 struct rte_flow_error *error) 7422 { 7423 struct rte_flow_attr attr = { .transfer = 0 }; 7424 const struct mlx5_flow_driver_ops *fops = 7425 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7426 7427 return flow_drv_action_query(dev, action, data, fops, error); 7428 } 7429 7430 /** 7431 * Destroy all shared actions. 7432 * 7433 * @param dev 7434 * Pointer to Ethernet device. 7435 * 7436 * @return 7437 * 0 on success, a negative errno value otherwise and rte_errno is set. 7438 */ 7439 int 7440 mlx5_shared_action_flush(struct rte_eth_dev *dev) 7441 { 7442 struct rte_flow_error error; 7443 struct mlx5_priv *priv = dev->data->dev_private; 7444 struct mlx5_shared_action_rss *action; 7445 int ret = 0; 7446 uint32_t idx; 7447 7448 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 7449 priv->rss_shared_actions, idx, action, next) { 7450 ret |= mlx5_shared_action_destroy(dev, 7451 (struct rte_flow_shared_action *)(uintptr_t)idx, &error); 7452 } 7453 return ret; 7454 } 7455 7456 static void 7457 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 7458 struct mlx5_flow_tunnel *tunnel) 7459 { 7460 struct mlx5_priv *priv = dev->data->dev_private; 7461 7462 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 7463 dev->data->port_id, tunnel->tunnel_id); 7464 RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED)); 7465 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID], 7466 tunnel->tunnel_id); 7467 mlx5_hlist_destroy(tunnel->groups); 7468 mlx5_free(tunnel); 7469 } 7470 7471 static struct mlx5_flow_tunnel * 7472 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 7473 { 7474 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 7475 struct mlx5_flow_tunnel *tun; 7476 7477 LIST_FOREACH(tun, &thub->tunnels, chain) { 7478 if (tun->tunnel_id == id) 7479 break; 7480 } 7481 7482 return tun; 7483 } 7484 7485 static struct mlx5_flow_tunnel * 7486 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 7487 const struct rte_flow_tunnel *app_tunnel) 7488 { 7489 struct mlx5_priv *priv = dev->data->dev_private; 7490 struct mlx5_flow_tunnel *tunnel; 7491 uint32_t id; 7492 7493 mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 7494 &id); 7495 if (id >= MLX5_MAX_TUNNELS) { 7496 mlx5_ipool_free(priv->sh->ipool 7497 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id); 7498 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id); 7499 return NULL; 7500 } else if (!id) { 7501 return NULL; 7502 } 7503 /** 7504 * mlx5 flow tunnel is an auxlilary data structure 7505 * It's not part of IO. No need to allocate it from 7506 * huge pages pools dedicated for IO 7507 */ 7508 tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel), 7509 0, SOCKET_ID_ANY); 7510 if (!tunnel) { 7511 mlx5_ipool_free(priv->sh->ipool 7512 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id); 7513 return NULL; 7514 } 7515 tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0, 7516 mlx5_flow_tunnel_grp2tbl_create_cb, 7517 NULL, 7518 mlx5_flow_tunnel_grp2tbl_remove_cb); 7519 if (!tunnel->groups) { 7520 mlx5_ipool_free(priv->sh->ipool 7521 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id); 7522 mlx5_free(tunnel); 7523 return NULL; 7524 } 7525 tunnel->groups->ctx = priv->sh; 7526 /* initiate new PMD tunnel */ 7527 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 7528 tunnel->tunnel_id = id; 7529 tunnel->action.type = (typeof(tunnel->action.type)) 7530 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 7531 tunnel->action.conf = tunnel; 7532 tunnel->item.type = (typeof(tunnel->item.type)) 7533 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 7534 tunnel->item.spec = tunnel; 7535 tunnel->item.last = NULL; 7536 tunnel->item.mask = NULL; 7537 7538 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 7539 dev->data->port_id, tunnel->tunnel_id); 7540 7541 return tunnel; 7542 } 7543 7544 static int 7545 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 7546 const struct rte_flow_tunnel *app_tunnel, 7547 struct mlx5_flow_tunnel **tunnel) 7548 { 7549 int ret; 7550 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 7551 struct mlx5_flow_tunnel *tun; 7552 7553 rte_spinlock_lock(&thub->sl); 7554 LIST_FOREACH(tun, &thub->tunnels, chain) { 7555 if (!memcmp(app_tunnel, &tun->app_tunnel, 7556 sizeof(*app_tunnel))) { 7557 *tunnel = tun; 7558 ret = 0; 7559 break; 7560 } 7561 } 7562 if (!tun) { 7563 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel); 7564 if (tun) { 7565 LIST_INSERT_HEAD(&thub->tunnels, tun, chain); 7566 *tunnel = tun; 7567 } else { 7568 ret = -ENOMEM; 7569 } 7570 } 7571 rte_spinlock_unlock(&thub->sl); 7572 if (tun) 7573 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED); 7574 7575 return ret; 7576 } 7577 7578 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 7579 { 7580 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 7581 7582 if (!thub) 7583 return; 7584 if (!LIST_EMPTY(&thub->tunnels)) 7585 DRV_LOG(WARNING, "port %u tunnels present\n", port_id); 7586 mlx5_hlist_destroy(thub->groups); 7587 mlx5_free(thub); 7588 } 7589 7590 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 7591 { 7592 int err; 7593 struct mlx5_flow_tunnel_hub *thub; 7594 7595 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 7596 0, SOCKET_ID_ANY); 7597 if (!thub) 7598 return -ENOMEM; 7599 LIST_INIT(&thub->tunnels); 7600 rte_spinlock_init(&thub->sl); 7601 thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0, 7602 0, mlx5_flow_tunnel_grp2tbl_create_cb, 7603 NULL, 7604 mlx5_flow_tunnel_grp2tbl_remove_cb); 7605 if (!thub->groups) { 7606 err = -rte_errno; 7607 goto err; 7608 } 7609 thub->groups->ctx = sh; 7610 sh->tunnel_hub = thub; 7611 7612 return 0; 7613 7614 err: 7615 if (thub->groups) 7616 mlx5_hlist_destroy(thub->groups); 7617 if (thub) 7618 mlx5_free(thub); 7619 return err; 7620 } 7621 7622 #ifndef HAVE_MLX5DV_DR 7623 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) 7624 #else 7625 #define MLX5_DOMAIN_SYNC_FLOW \ 7626 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) 7627 #endif 7628 7629 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) 7630 { 7631 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 7632 const struct mlx5_flow_driver_ops *fops; 7633 int ret; 7634 struct rte_flow_attr attr = { .transfer = 0 }; 7635 7636 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7637 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); 7638 if (ret > 0) 7639 ret = -ret; 7640 return ret; 7641 } 7642