1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 12 /* Verbs header. */ 13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 14 #ifdef PEDANTIC 15 #pragma GCC diagnostic ignored "-Wpedantic" 16 #endif 17 #include <infiniband/verbs.h> 18 #ifdef PEDANTIC 19 #pragma GCC diagnostic error "-Wpedantic" 20 #endif 21 22 #include <rte_common.h> 23 #include <rte_ether.h> 24 #include <rte_ethdev_driver.h> 25 #include <rte_flow.h> 26 #include <rte_flow_driver.h> 27 #include <rte_malloc.h> 28 #include <rte_ip.h> 29 30 #include "mlx5.h" 31 #include "mlx5_defs.h" 32 #include "mlx5_flow.h" 33 #include "mlx5_glue.h" 34 #include "mlx5_prm.h" 35 #include "mlx5_rxtx.h" 36 37 /* Dev ops structure defined in mlx5.c */ 38 extern const struct eth_dev_ops mlx5_dev_ops; 39 extern const struct eth_dev_ops mlx5_dev_ops_isolate; 40 41 /** Device flow drivers. */ 42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops; 44 #endif 45 extern const struct mlx5_flow_driver_ops mlx5_flow_tcf_drv_ops; 46 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 47 48 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 49 50 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 51 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 52 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 53 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 54 #endif 55 [MLX5_FLOW_TYPE_TCF] = &mlx5_flow_tcf_drv_ops, 56 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 57 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 58 }; 59 60 enum mlx5_expansion { 61 MLX5_EXPANSION_ROOT, 62 MLX5_EXPANSION_ROOT_OUTER, 63 MLX5_EXPANSION_ROOT_ETH_VLAN, 64 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 65 MLX5_EXPANSION_OUTER_ETH, 66 MLX5_EXPANSION_OUTER_ETH_VLAN, 67 MLX5_EXPANSION_OUTER_VLAN, 68 MLX5_EXPANSION_OUTER_IPV4, 69 MLX5_EXPANSION_OUTER_IPV4_UDP, 70 MLX5_EXPANSION_OUTER_IPV4_TCP, 71 MLX5_EXPANSION_OUTER_IPV6, 72 MLX5_EXPANSION_OUTER_IPV6_UDP, 73 MLX5_EXPANSION_OUTER_IPV6_TCP, 74 MLX5_EXPANSION_VXLAN, 75 MLX5_EXPANSION_VXLAN_GPE, 76 MLX5_EXPANSION_GRE, 77 MLX5_EXPANSION_MPLS, 78 MLX5_EXPANSION_ETH, 79 MLX5_EXPANSION_ETH_VLAN, 80 MLX5_EXPANSION_VLAN, 81 MLX5_EXPANSION_IPV4, 82 MLX5_EXPANSION_IPV4_UDP, 83 MLX5_EXPANSION_IPV4_TCP, 84 MLX5_EXPANSION_IPV6, 85 MLX5_EXPANSION_IPV6_UDP, 86 MLX5_EXPANSION_IPV6_TCP, 87 }; 88 89 /** Supported expansion of items. */ 90 static const struct rte_flow_expand_node mlx5_support_expansion[] = { 91 [MLX5_EXPANSION_ROOT] = { 92 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 93 MLX5_EXPANSION_IPV4, 94 MLX5_EXPANSION_IPV6), 95 .type = RTE_FLOW_ITEM_TYPE_END, 96 }, 97 [MLX5_EXPANSION_ROOT_OUTER] = { 98 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 99 MLX5_EXPANSION_OUTER_IPV4, 100 MLX5_EXPANSION_OUTER_IPV6), 101 .type = RTE_FLOW_ITEM_TYPE_END, 102 }, 103 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 104 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 105 .type = RTE_FLOW_ITEM_TYPE_END, 106 }, 107 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 108 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN), 109 .type = RTE_FLOW_ITEM_TYPE_END, 110 }, 111 [MLX5_EXPANSION_OUTER_ETH] = { 112 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 113 MLX5_EXPANSION_OUTER_IPV6, 114 MLX5_EXPANSION_MPLS), 115 .type = RTE_FLOW_ITEM_TYPE_ETH, 116 .rss_types = 0, 117 }, 118 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 119 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 120 .type = RTE_FLOW_ITEM_TYPE_ETH, 121 .rss_types = 0, 122 }, 123 [MLX5_EXPANSION_OUTER_VLAN] = { 124 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 125 MLX5_EXPANSION_OUTER_IPV6), 126 .type = RTE_FLOW_ITEM_TYPE_VLAN, 127 }, 128 [MLX5_EXPANSION_OUTER_IPV4] = { 129 .next = RTE_FLOW_EXPAND_RSS_NEXT 130 (MLX5_EXPANSION_OUTER_IPV4_UDP, 131 MLX5_EXPANSION_OUTER_IPV4_TCP, 132 MLX5_EXPANSION_GRE), 133 .type = RTE_FLOW_ITEM_TYPE_IPV4, 134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 135 ETH_RSS_NONFRAG_IPV4_OTHER, 136 }, 137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 139 MLX5_EXPANSION_VXLAN_GPE), 140 .type = RTE_FLOW_ITEM_TYPE_UDP, 141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 142 }, 143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 144 .type = RTE_FLOW_ITEM_TYPE_TCP, 145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 146 }, 147 [MLX5_EXPANSION_OUTER_IPV6] = { 148 .next = RTE_FLOW_EXPAND_RSS_NEXT 149 (MLX5_EXPANSION_OUTER_IPV6_UDP, 150 MLX5_EXPANSION_OUTER_IPV6_TCP), 151 .type = RTE_FLOW_ITEM_TYPE_IPV6, 152 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 153 ETH_RSS_NONFRAG_IPV6_OTHER, 154 }, 155 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 156 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 157 MLX5_EXPANSION_VXLAN_GPE), 158 .type = RTE_FLOW_ITEM_TYPE_UDP, 159 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 160 }, 161 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 162 .type = RTE_FLOW_ITEM_TYPE_TCP, 163 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 164 }, 165 [MLX5_EXPANSION_VXLAN] = { 166 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 167 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 168 }, 169 [MLX5_EXPANSION_VXLAN_GPE] = { 170 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 171 MLX5_EXPANSION_IPV4, 172 MLX5_EXPANSION_IPV6), 173 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 174 }, 175 [MLX5_EXPANSION_GRE] = { 176 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 177 .type = RTE_FLOW_ITEM_TYPE_GRE, 178 }, 179 [MLX5_EXPANSION_MPLS] = { 180 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 181 MLX5_EXPANSION_IPV6), 182 .type = RTE_FLOW_ITEM_TYPE_MPLS, 183 }, 184 [MLX5_EXPANSION_ETH] = { 185 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 186 MLX5_EXPANSION_IPV6), 187 .type = RTE_FLOW_ITEM_TYPE_ETH, 188 }, 189 [MLX5_EXPANSION_ETH_VLAN] = { 190 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 191 .type = RTE_FLOW_ITEM_TYPE_ETH, 192 }, 193 [MLX5_EXPANSION_VLAN] = { 194 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 195 MLX5_EXPANSION_IPV6), 196 .type = RTE_FLOW_ITEM_TYPE_VLAN, 197 }, 198 [MLX5_EXPANSION_IPV4] = { 199 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 200 MLX5_EXPANSION_IPV4_TCP), 201 .type = RTE_FLOW_ITEM_TYPE_IPV4, 202 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 203 ETH_RSS_NONFRAG_IPV4_OTHER, 204 }, 205 [MLX5_EXPANSION_IPV4_UDP] = { 206 .type = RTE_FLOW_ITEM_TYPE_UDP, 207 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 208 }, 209 [MLX5_EXPANSION_IPV4_TCP] = { 210 .type = RTE_FLOW_ITEM_TYPE_TCP, 211 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 212 }, 213 [MLX5_EXPANSION_IPV6] = { 214 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 215 MLX5_EXPANSION_IPV6_TCP), 216 .type = RTE_FLOW_ITEM_TYPE_IPV6, 217 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 218 ETH_RSS_NONFRAG_IPV6_OTHER, 219 }, 220 [MLX5_EXPANSION_IPV6_UDP] = { 221 .type = RTE_FLOW_ITEM_TYPE_UDP, 222 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 223 }, 224 [MLX5_EXPANSION_IPV6_TCP] = { 225 .type = RTE_FLOW_ITEM_TYPE_TCP, 226 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 227 }, 228 }; 229 230 static const struct rte_flow_ops mlx5_flow_ops = { 231 .validate = mlx5_flow_validate, 232 .create = mlx5_flow_create, 233 .destroy = mlx5_flow_destroy, 234 .flush = mlx5_flow_flush, 235 .isolate = mlx5_flow_isolate, 236 .query = mlx5_flow_query, 237 }; 238 239 /* Convert FDIR request to Generic flow. */ 240 struct mlx5_fdir { 241 struct rte_flow_attr attr; 242 struct rte_flow_item items[4]; 243 struct rte_flow_item_eth l2; 244 struct rte_flow_item_eth l2_mask; 245 union { 246 struct rte_flow_item_ipv4 ipv4; 247 struct rte_flow_item_ipv6 ipv6; 248 } l3; 249 union { 250 struct rte_flow_item_ipv4 ipv4; 251 struct rte_flow_item_ipv6 ipv6; 252 } l3_mask; 253 union { 254 struct rte_flow_item_udp udp; 255 struct rte_flow_item_tcp tcp; 256 } l4; 257 union { 258 struct rte_flow_item_udp udp; 259 struct rte_flow_item_tcp tcp; 260 } l4_mask; 261 struct rte_flow_action actions[2]; 262 struct rte_flow_action_queue queue; 263 }; 264 265 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 266 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 267 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 268 }; 269 270 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 271 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 272 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 273 { 9, 10, 11 }, { 12, 13, 14 }, 274 }; 275 276 /* Tunnel information. */ 277 struct mlx5_flow_tunnel_info { 278 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 279 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 280 }; 281 282 static struct mlx5_flow_tunnel_info tunnels_info[] = { 283 { 284 .tunnel = MLX5_FLOW_LAYER_VXLAN, 285 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 286 }, 287 { 288 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 289 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 290 }, 291 { 292 .tunnel = MLX5_FLOW_LAYER_GRE, 293 .ptype = RTE_PTYPE_TUNNEL_GRE, 294 }, 295 { 296 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 297 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 298 }, 299 { 300 .tunnel = MLX5_FLOW_LAYER_MPLS, 301 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 302 }, 303 }; 304 305 /** 306 * Discover the maximum number of priority available. 307 * 308 * @param[in] dev 309 * Pointer to the Ethernet device structure. 310 * 311 * @return 312 * number of supported flow priority on success, a negative errno 313 * value otherwise and rte_errno is set. 314 */ 315 int 316 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 317 { 318 struct mlx5_priv *priv = dev->data->dev_private; 319 struct { 320 struct ibv_flow_attr attr; 321 struct ibv_flow_spec_eth eth; 322 struct ibv_flow_spec_action_drop drop; 323 } flow_attr = { 324 .attr = { 325 .num_of_specs = 2, 326 .port = (uint8_t)priv->ibv_port, 327 }, 328 .eth = { 329 .type = IBV_FLOW_SPEC_ETH, 330 .size = sizeof(struct ibv_flow_spec_eth), 331 }, 332 .drop = { 333 .size = sizeof(struct ibv_flow_spec_action_drop), 334 .type = IBV_FLOW_SPEC_ACTION_DROP, 335 }, 336 }; 337 struct ibv_flow *flow; 338 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev); 339 uint16_t vprio[] = { 8, 16 }; 340 int i; 341 int priority = 0; 342 343 if (!drop) { 344 rte_errno = ENOTSUP; 345 return -rte_errno; 346 } 347 for (i = 0; i != RTE_DIM(vprio); i++) { 348 flow_attr.attr.priority = vprio[i] - 1; 349 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr); 350 if (!flow) 351 break; 352 claim_zero(mlx5_glue->destroy_flow(flow)); 353 priority = vprio[i]; 354 } 355 mlx5_hrxq_drop_release(dev); 356 switch (priority) { 357 case 8: 358 priority = RTE_DIM(priority_map_3); 359 break; 360 case 16: 361 priority = RTE_DIM(priority_map_5); 362 break; 363 default: 364 rte_errno = ENOTSUP; 365 DRV_LOG(ERR, 366 "port %u verbs maximum priority: %d expected 8/16", 367 dev->data->port_id, priority); 368 return -rte_errno; 369 } 370 DRV_LOG(INFO, "port %u flow maximum priority: %d", 371 dev->data->port_id, priority); 372 return priority; 373 } 374 375 /** 376 * Adjust flow priority based on the highest layer and the request priority. 377 * 378 * @param[in] dev 379 * Pointer to the Ethernet device structure. 380 * @param[in] priority 381 * The rule base priority. 382 * @param[in] subpriority 383 * The priority based on the items. 384 * 385 * @return 386 * The new priority. 387 */ 388 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 389 uint32_t subpriority) 390 { 391 uint32_t res = 0; 392 struct mlx5_priv *priv = dev->data->dev_private; 393 394 switch (priv->config.flow_prio) { 395 case RTE_DIM(priority_map_3): 396 res = priority_map_3[priority][subpriority]; 397 break; 398 case RTE_DIM(priority_map_5): 399 res = priority_map_5[priority][subpriority]; 400 break; 401 } 402 return res; 403 } 404 405 /** 406 * Verify the @p item specifications (spec, last, mask) are compatible with the 407 * NIC capabilities. 408 * 409 * @param[in] item 410 * Item specification. 411 * @param[in] mask 412 * @p item->mask or flow default bit-masks. 413 * @param[in] nic_mask 414 * Bit-masks covering supported fields by the NIC to compare with user mask. 415 * @param[in] size 416 * Bit-masks size in bytes. 417 * @param[out] error 418 * Pointer to error structure. 419 * 420 * @return 421 * 0 on success, a negative errno value otherwise and rte_errno is set. 422 */ 423 int 424 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 425 const uint8_t *mask, 426 const uint8_t *nic_mask, 427 unsigned int size, 428 struct rte_flow_error *error) 429 { 430 unsigned int i; 431 432 assert(nic_mask); 433 for (i = 0; i < size; ++i) 434 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 435 return rte_flow_error_set(error, ENOTSUP, 436 RTE_FLOW_ERROR_TYPE_ITEM, 437 item, 438 "mask enables non supported" 439 " bits"); 440 if (!item->spec && (item->mask || item->last)) 441 return rte_flow_error_set(error, EINVAL, 442 RTE_FLOW_ERROR_TYPE_ITEM, item, 443 "mask/last without a spec is not" 444 " supported"); 445 if (item->spec && item->last) { 446 uint8_t spec[size]; 447 uint8_t last[size]; 448 unsigned int i; 449 int ret; 450 451 for (i = 0; i < size; ++i) { 452 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 453 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 454 } 455 ret = memcmp(spec, last, size); 456 if (ret != 0) 457 return rte_flow_error_set(error, EINVAL, 458 RTE_FLOW_ERROR_TYPE_ITEM, 459 item, 460 "range is not valid"); 461 } 462 return 0; 463 } 464 465 /** 466 * Adjust the hash fields according to the @p flow information. 467 * 468 * @param[in] dev_flow. 469 * Pointer to the mlx5_flow. 470 * @param[in] tunnel 471 * 1 when the hash field is for a tunnel item. 472 * @param[in] layer_types 473 * ETH_RSS_* types. 474 * @param[in] hash_fields 475 * Item hash fields. 476 * 477 * @return 478 * The hash fileds that should be used. 479 */ 480 uint64_t 481 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, 482 int tunnel __rte_unused, uint64_t layer_types, 483 uint64_t hash_fields) 484 { 485 struct rte_flow *flow = dev_flow->flow; 486 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 487 int rss_request_inner = flow->rss.level >= 2; 488 489 /* Check RSS hash level for tunnel. */ 490 if (tunnel && rss_request_inner) 491 hash_fields |= IBV_RX_HASH_INNER; 492 else if (tunnel || rss_request_inner) 493 return 0; 494 #endif 495 /* Check if requested layer matches RSS hash fields. */ 496 if (!(flow->rss.types & layer_types)) 497 return 0; 498 return hash_fields; 499 } 500 501 /** 502 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 503 * if several tunnel rules are used on this queue, the tunnel ptype will be 504 * cleared. 505 * 506 * @param rxq_ctrl 507 * Rx queue to update. 508 */ 509 static void 510 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 511 { 512 unsigned int i; 513 uint32_t tunnel_ptype = 0; 514 515 /* Look up for the ptype to use. */ 516 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 517 if (!rxq_ctrl->flow_tunnels_n[i]) 518 continue; 519 if (!tunnel_ptype) { 520 tunnel_ptype = tunnels_info[i].ptype; 521 } else { 522 tunnel_ptype = 0; 523 break; 524 } 525 } 526 rxq_ctrl->rxq.tunnel = tunnel_ptype; 527 } 528 529 /** 530 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 531 * flow. 532 * 533 * @param[in] dev 534 * Pointer to the Ethernet device structure. 535 * @param[in] dev_flow 536 * Pointer to device flow structure. 537 */ 538 static void 539 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 540 { 541 struct mlx5_priv *priv = dev->data->dev_private; 542 struct rte_flow *flow = dev_flow->flow; 543 const int mark = !!(flow->actions & 544 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 545 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 546 unsigned int i; 547 548 for (i = 0; i != flow->rss.queue_num; ++i) { 549 int idx = (*flow->queue)[i]; 550 struct mlx5_rxq_ctrl *rxq_ctrl = 551 container_of((*priv->rxqs)[idx], 552 struct mlx5_rxq_ctrl, rxq); 553 554 if (mark) { 555 rxq_ctrl->rxq.mark = 1; 556 rxq_ctrl->flow_mark_n++; 557 } 558 if (tunnel) { 559 unsigned int j; 560 561 /* Increase the counter matching the flow. */ 562 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 563 if ((tunnels_info[j].tunnel & 564 dev_flow->layers) == 565 tunnels_info[j].tunnel) { 566 rxq_ctrl->flow_tunnels_n[j]++; 567 break; 568 } 569 } 570 flow_rxq_tunnel_ptype_update(rxq_ctrl); 571 } 572 } 573 } 574 575 /** 576 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 577 * 578 * @param[in] dev 579 * Pointer to the Ethernet device structure. 580 * @param[in] flow 581 * Pointer to flow structure. 582 */ 583 static void 584 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 585 { 586 struct mlx5_flow *dev_flow; 587 588 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 589 flow_drv_rxq_flags_set(dev, dev_flow); 590 } 591 592 /** 593 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 594 * device flow if no other flow uses it with the same kind of request. 595 * 596 * @param dev 597 * Pointer to Ethernet device. 598 * @param[in] dev_flow 599 * Pointer to the device flow. 600 */ 601 static void 602 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 603 { 604 struct mlx5_priv *priv = dev->data->dev_private; 605 struct rte_flow *flow = dev_flow->flow; 606 const int mark = !!(flow->actions & 607 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 608 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 609 unsigned int i; 610 611 assert(dev->data->dev_started); 612 for (i = 0; i != flow->rss.queue_num; ++i) { 613 int idx = (*flow->queue)[i]; 614 struct mlx5_rxq_ctrl *rxq_ctrl = 615 container_of((*priv->rxqs)[idx], 616 struct mlx5_rxq_ctrl, rxq); 617 618 if (mark) { 619 rxq_ctrl->flow_mark_n--; 620 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 621 } 622 if (tunnel) { 623 unsigned int j; 624 625 /* Decrease the counter matching the flow. */ 626 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 627 if ((tunnels_info[j].tunnel & 628 dev_flow->layers) == 629 tunnels_info[j].tunnel) { 630 rxq_ctrl->flow_tunnels_n[j]--; 631 break; 632 } 633 } 634 flow_rxq_tunnel_ptype_update(rxq_ctrl); 635 } 636 } 637 } 638 639 /** 640 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 641 * @p flow if no other flow uses it with the same kind of request. 642 * 643 * @param dev 644 * Pointer to Ethernet device. 645 * @param[in] flow 646 * Pointer to the flow. 647 */ 648 static void 649 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 650 { 651 struct mlx5_flow *dev_flow; 652 653 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 654 flow_drv_rxq_flags_trim(dev, dev_flow); 655 } 656 657 /** 658 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 659 * 660 * @param dev 661 * Pointer to Ethernet device. 662 */ 663 static void 664 flow_rxq_flags_clear(struct rte_eth_dev *dev) 665 { 666 struct mlx5_priv *priv = dev->data->dev_private; 667 unsigned int i; 668 669 for (i = 0; i != priv->rxqs_n; ++i) { 670 struct mlx5_rxq_ctrl *rxq_ctrl; 671 unsigned int j; 672 673 if (!(*priv->rxqs)[i]) 674 continue; 675 rxq_ctrl = container_of((*priv->rxqs)[i], 676 struct mlx5_rxq_ctrl, rxq); 677 rxq_ctrl->flow_mark_n = 0; 678 rxq_ctrl->rxq.mark = 0; 679 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 680 rxq_ctrl->flow_tunnels_n[j] = 0; 681 rxq_ctrl->rxq.tunnel = 0; 682 } 683 } 684 685 /* 686 * Validate the flag action. 687 * 688 * @param[in] action_flags 689 * Bit-fields that holds the actions detected until now. 690 * @param[in] attr 691 * Attributes of flow that includes this action. 692 * @param[out] error 693 * Pointer to error structure. 694 * 695 * @return 696 * 0 on success, a negative errno value otherwise and rte_errno is set. 697 */ 698 int 699 mlx5_flow_validate_action_flag(uint64_t action_flags, 700 const struct rte_flow_attr *attr, 701 struct rte_flow_error *error) 702 { 703 704 if (action_flags & MLX5_FLOW_ACTION_DROP) 705 return rte_flow_error_set(error, EINVAL, 706 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 707 "can't drop and flag in same flow"); 708 if (action_flags & MLX5_FLOW_ACTION_MARK) 709 return rte_flow_error_set(error, EINVAL, 710 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 711 "can't mark and flag in same flow"); 712 if (action_flags & MLX5_FLOW_ACTION_FLAG) 713 return rte_flow_error_set(error, EINVAL, 714 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 715 "can't have 2 flag" 716 " actions in same flow"); 717 if (attr->egress) 718 return rte_flow_error_set(error, ENOTSUP, 719 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 720 "flag action not supported for " 721 "egress"); 722 return 0; 723 } 724 725 /* 726 * Validate the mark action. 727 * 728 * @param[in] action 729 * Pointer to the queue action. 730 * @param[in] action_flags 731 * Bit-fields that holds the actions detected until now. 732 * @param[in] attr 733 * Attributes of flow that includes this action. 734 * @param[out] error 735 * Pointer to error structure. 736 * 737 * @return 738 * 0 on success, a negative errno value otherwise and rte_errno is set. 739 */ 740 int 741 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 742 uint64_t action_flags, 743 const struct rte_flow_attr *attr, 744 struct rte_flow_error *error) 745 { 746 const struct rte_flow_action_mark *mark = action->conf; 747 748 if (!mark) 749 return rte_flow_error_set(error, EINVAL, 750 RTE_FLOW_ERROR_TYPE_ACTION, 751 action, 752 "configuration cannot be null"); 753 if (mark->id >= MLX5_FLOW_MARK_MAX) 754 return rte_flow_error_set(error, EINVAL, 755 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 756 &mark->id, 757 "mark id must in 0 <= id < " 758 RTE_STR(MLX5_FLOW_MARK_MAX)); 759 if (action_flags & MLX5_FLOW_ACTION_DROP) 760 return rte_flow_error_set(error, EINVAL, 761 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 762 "can't drop and mark in same flow"); 763 if (action_flags & MLX5_FLOW_ACTION_FLAG) 764 return rte_flow_error_set(error, EINVAL, 765 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 766 "can't flag and mark in same flow"); 767 if (action_flags & MLX5_FLOW_ACTION_MARK) 768 return rte_flow_error_set(error, EINVAL, 769 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 770 "can't have 2 mark actions in same" 771 " flow"); 772 if (attr->egress) 773 return rte_flow_error_set(error, ENOTSUP, 774 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 775 "mark action not supported for " 776 "egress"); 777 return 0; 778 } 779 780 /* 781 * Validate the drop action. 782 * 783 * @param[in] action_flags 784 * Bit-fields that holds the actions detected until now. 785 * @param[in] attr 786 * Attributes of flow that includes this action. 787 * @param[out] error 788 * Pointer to error structure. 789 * 790 * @return 791 * 0 on success, a negative errno value otherwise and rte_errno is set. 792 */ 793 int 794 mlx5_flow_validate_action_drop(uint64_t action_flags, 795 const struct rte_flow_attr *attr, 796 struct rte_flow_error *error) 797 { 798 if (action_flags & MLX5_FLOW_ACTION_FLAG) 799 return rte_flow_error_set(error, EINVAL, 800 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 801 "can't drop and flag in same flow"); 802 if (action_flags & MLX5_FLOW_ACTION_MARK) 803 return rte_flow_error_set(error, EINVAL, 804 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 805 "can't drop and mark in same flow"); 806 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 807 return rte_flow_error_set(error, EINVAL, 808 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 809 "can't have 2 fate actions in" 810 " same flow"); 811 if (attr->egress) 812 return rte_flow_error_set(error, ENOTSUP, 813 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 814 "drop action not supported for " 815 "egress"); 816 return 0; 817 } 818 819 /* 820 * Validate the queue action. 821 * 822 * @param[in] action 823 * Pointer to the queue action. 824 * @param[in] action_flags 825 * Bit-fields that holds the actions detected until now. 826 * @param[in] dev 827 * Pointer to the Ethernet device structure. 828 * @param[in] attr 829 * Attributes of flow that includes this action. 830 * @param[out] error 831 * Pointer to error structure. 832 * 833 * @return 834 * 0 on success, a negative errno value otherwise and rte_errno is set. 835 */ 836 int 837 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 838 uint64_t action_flags, 839 struct rte_eth_dev *dev, 840 const struct rte_flow_attr *attr, 841 struct rte_flow_error *error) 842 { 843 struct mlx5_priv *priv = dev->data->dev_private; 844 const struct rte_flow_action_queue *queue = action->conf; 845 846 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 847 return rte_flow_error_set(error, EINVAL, 848 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 849 "can't have 2 fate actions in" 850 " same flow"); 851 if (!priv->rxqs_n) 852 return rte_flow_error_set(error, EINVAL, 853 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 854 NULL, "No Rx queues configured"); 855 if (queue->index >= priv->rxqs_n) 856 return rte_flow_error_set(error, EINVAL, 857 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 858 &queue->index, 859 "queue index out of range"); 860 if (!(*priv->rxqs)[queue->index]) 861 return rte_flow_error_set(error, EINVAL, 862 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 863 &queue->index, 864 "queue is not configured"); 865 if (attr->egress) 866 return rte_flow_error_set(error, ENOTSUP, 867 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 868 "queue action not supported for " 869 "egress"); 870 return 0; 871 } 872 873 /* 874 * Validate the rss action. 875 * 876 * @param[in] action 877 * Pointer to the queue action. 878 * @param[in] action_flags 879 * Bit-fields that holds the actions detected until now. 880 * @param[in] dev 881 * Pointer to the Ethernet device structure. 882 * @param[in] attr 883 * Attributes of flow that includes this action. 884 * @param[in] item_flags 885 * Items that were detected. 886 * @param[out] error 887 * Pointer to error structure. 888 * 889 * @return 890 * 0 on success, a negative errno value otherwise and rte_errno is set. 891 */ 892 int 893 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 894 uint64_t action_flags, 895 struct rte_eth_dev *dev, 896 const struct rte_flow_attr *attr, 897 uint64_t item_flags, 898 struct rte_flow_error *error) 899 { 900 struct mlx5_priv *priv = dev->data->dev_private; 901 const struct rte_flow_action_rss *rss = action->conf; 902 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 903 unsigned int i; 904 905 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 906 return rte_flow_error_set(error, EINVAL, 907 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 908 "can't have 2 fate actions" 909 " in same flow"); 910 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 911 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 912 return rte_flow_error_set(error, ENOTSUP, 913 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 914 &rss->func, 915 "RSS hash function not supported"); 916 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 917 if (rss->level > 2) 918 #else 919 if (rss->level > 1) 920 #endif 921 return rte_flow_error_set(error, ENOTSUP, 922 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 923 &rss->level, 924 "tunnel RSS is not supported"); 925 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 926 if (rss->key_len == 0 && rss->key != NULL) 927 return rte_flow_error_set(error, ENOTSUP, 928 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 929 &rss->key_len, 930 "RSS hash key length 0"); 931 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 932 return rte_flow_error_set(error, ENOTSUP, 933 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 934 &rss->key_len, 935 "RSS hash key too small"); 936 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 937 return rte_flow_error_set(error, ENOTSUP, 938 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 939 &rss->key_len, 940 "RSS hash key too large"); 941 if (rss->queue_num > priv->config.ind_table_max_size) 942 return rte_flow_error_set(error, ENOTSUP, 943 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 944 &rss->queue_num, 945 "number of queues too large"); 946 if (rss->types & MLX5_RSS_HF_MASK) 947 return rte_flow_error_set(error, ENOTSUP, 948 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 949 &rss->types, 950 "some RSS protocols are not" 951 " supported"); 952 if (!priv->rxqs_n) 953 return rte_flow_error_set(error, EINVAL, 954 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 955 NULL, "No Rx queues configured"); 956 if (!rss->queue_num) 957 return rte_flow_error_set(error, EINVAL, 958 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 959 NULL, "No queues configured"); 960 for (i = 0; i != rss->queue_num; ++i) { 961 if (!(*priv->rxqs)[rss->queue[i]]) 962 return rte_flow_error_set 963 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 964 &rss->queue[i], "queue is not configured"); 965 } 966 if (attr->egress) 967 return rte_flow_error_set(error, ENOTSUP, 968 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 969 "rss action not supported for " 970 "egress"); 971 if (rss->level > 1 && !tunnel) 972 return rte_flow_error_set(error, EINVAL, 973 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 974 "inner RSS is not supported for " 975 "non-tunnel flows"); 976 return 0; 977 } 978 979 /* 980 * Validate the count action. 981 * 982 * @param[in] dev 983 * Pointer to the Ethernet device structure. 984 * @param[in] attr 985 * Attributes of flow that includes this action. 986 * @param[out] error 987 * Pointer to error structure. 988 * 989 * @return 990 * 0 on success, a negative errno value otherwise and rte_errno is set. 991 */ 992 int 993 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 994 const struct rte_flow_attr *attr, 995 struct rte_flow_error *error) 996 { 997 if (attr->egress) 998 return rte_flow_error_set(error, ENOTSUP, 999 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1000 "count action not supported for " 1001 "egress"); 1002 return 0; 1003 } 1004 1005 /** 1006 * Verify the @p attributes will be correctly understood by the NIC and store 1007 * them in the @p flow if everything is correct. 1008 * 1009 * @param[in] dev 1010 * Pointer to the Ethernet device structure. 1011 * @param[in] attributes 1012 * Pointer to flow attributes 1013 * @param[out] error 1014 * Pointer to error structure. 1015 * 1016 * @return 1017 * 0 on success, a negative errno value otherwise and rte_errno is set. 1018 */ 1019 int 1020 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1021 const struct rte_flow_attr *attributes, 1022 struct rte_flow_error *error) 1023 { 1024 struct mlx5_priv *priv = dev->data->dev_private; 1025 uint32_t priority_max = priv->config.flow_prio - 1; 1026 1027 if (attributes->group) 1028 return rte_flow_error_set(error, ENOTSUP, 1029 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1030 NULL, "groups is not supported"); 1031 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 1032 attributes->priority >= priority_max) 1033 return rte_flow_error_set(error, ENOTSUP, 1034 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1035 NULL, "priority out of range"); 1036 if (attributes->egress) 1037 return rte_flow_error_set(error, ENOTSUP, 1038 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1039 "egress is not supported"); 1040 if (attributes->transfer) 1041 return rte_flow_error_set(error, ENOTSUP, 1042 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1043 NULL, "transfer is not supported"); 1044 if (!attributes->ingress) 1045 return rte_flow_error_set(error, EINVAL, 1046 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1047 NULL, 1048 "ingress attribute is mandatory"); 1049 return 0; 1050 } 1051 1052 /** 1053 * Validate Ethernet item. 1054 * 1055 * @param[in] item 1056 * Item specification. 1057 * @param[in] item_flags 1058 * Bit-fields that holds the items detected until now. 1059 * @param[out] error 1060 * Pointer to error structure. 1061 * 1062 * @return 1063 * 0 on success, a negative errno value otherwise and rte_errno is set. 1064 */ 1065 int 1066 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1067 uint64_t item_flags, 1068 struct rte_flow_error *error) 1069 { 1070 const struct rte_flow_item_eth *mask = item->mask; 1071 const struct rte_flow_item_eth nic_mask = { 1072 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1073 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1074 .type = RTE_BE16(0xffff), 1075 }; 1076 int ret; 1077 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1078 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1079 MLX5_FLOW_LAYER_OUTER_L2; 1080 1081 if (item_flags & ethm) 1082 return rte_flow_error_set(error, ENOTSUP, 1083 RTE_FLOW_ERROR_TYPE_ITEM, item, 1084 "multiple L2 layers not supported"); 1085 if (!mask) 1086 mask = &rte_flow_item_eth_mask; 1087 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1088 (const uint8_t *)&nic_mask, 1089 sizeof(struct rte_flow_item_eth), 1090 error); 1091 return ret; 1092 } 1093 1094 /** 1095 * Validate VLAN item. 1096 * 1097 * @param[in] item 1098 * Item specification. 1099 * @param[in] item_flags 1100 * Bit-fields that holds the items detected until now. 1101 * @param[out] error 1102 * Pointer to error structure. 1103 * 1104 * @return 1105 * 0 on success, a negative errno value otherwise and rte_errno is set. 1106 */ 1107 int 1108 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1109 uint64_t item_flags, 1110 struct rte_flow_error *error) 1111 { 1112 const struct rte_flow_item_vlan *spec = item->spec; 1113 const struct rte_flow_item_vlan *mask = item->mask; 1114 const struct rte_flow_item_vlan nic_mask = { 1115 .tci = RTE_BE16(0x0fff), 1116 .inner_type = RTE_BE16(0xffff), 1117 }; 1118 uint16_t vlan_tag = 0; 1119 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1120 int ret; 1121 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1122 MLX5_FLOW_LAYER_INNER_L4) : 1123 (MLX5_FLOW_LAYER_OUTER_L3 | 1124 MLX5_FLOW_LAYER_OUTER_L4); 1125 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1126 MLX5_FLOW_LAYER_OUTER_VLAN; 1127 1128 if (item_flags & vlanm) 1129 return rte_flow_error_set(error, EINVAL, 1130 RTE_FLOW_ERROR_TYPE_ITEM, item, 1131 "multiple VLAN layers not supported"); 1132 else if ((item_flags & l34m) != 0) 1133 return rte_flow_error_set(error, EINVAL, 1134 RTE_FLOW_ERROR_TYPE_ITEM, item, 1135 "L2 layer cannot follow L3/L4 layer"); 1136 if (!mask) 1137 mask = &rte_flow_item_vlan_mask; 1138 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1139 (const uint8_t *)&nic_mask, 1140 sizeof(struct rte_flow_item_vlan), 1141 error); 1142 if (ret) 1143 return ret; 1144 if (spec) { 1145 vlan_tag = spec->tci; 1146 vlan_tag &= mask->tci; 1147 } 1148 /* 1149 * From verbs perspective an empty VLAN is equivalent 1150 * to a packet without VLAN layer. 1151 */ 1152 if (!vlan_tag) 1153 return rte_flow_error_set(error, EINVAL, 1154 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1155 item->spec, 1156 "VLAN cannot be empty"); 1157 return 0; 1158 } 1159 1160 /** 1161 * Validate IPV4 item. 1162 * 1163 * @param[in] item 1164 * Item specification. 1165 * @param[in] item_flags 1166 * Bit-fields that holds the items detected until now. 1167 * @param[in] acc_mask 1168 * Acceptable mask, if NULL default internal default mask 1169 * will be used to check whether item fields are supported. 1170 * @param[out] error 1171 * Pointer to error structure. 1172 * 1173 * @return 1174 * 0 on success, a negative errno value otherwise and rte_errno is set. 1175 */ 1176 int 1177 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 1178 uint64_t item_flags, 1179 const struct rte_flow_item_ipv4 *acc_mask, 1180 struct rte_flow_error *error) 1181 { 1182 const struct rte_flow_item_ipv4 *mask = item->mask; 1183 const struct rte_flow_item_ipv4 nic_mask = { 1184 .hdr = { 1185 .src_addr = RTE_BE32(0xffffffff), 1186 .dst_addr = RTE_BE32(0xffffffff), 1187 .type_of_service = 0xff, 1188 .next_proto_id = 0xff, 1189 }, 1190 }; 1191 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1192 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1193 MLX5_FLOW_LAYER_OUTER_L3; 1194 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1195 MLX5_FLOW_LAYER_OUTER_L4; 1196 int ret; 1197 1198 if (item_flags & l3m) 1199 return rte_flow_error_set(error, ENOTSUP, 1200 RTE_FLOW_ERROR_TYPE_ITEM, item, 1201 "multiple L3 layers not supported"); 1202 else if (item_flags & l4m) 1203 return rte_flow_error_set(error, EINVAL, 1204 RTE_FLOW_ERROR_TYPE_ITEM, item, 1205 "L3 cannot follow an L4 layer."); 1206 if (!mask) 1207 mask = &rte_flow_item_ipv4_mask; 1208 else if (mask->hdr.next_proto_id != 0 && 1209 mask->hdr.next_proto_id != 0xff) 1210 return rte_flow_error_set(error, EINVAL, 1211 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 1212 "partial mask is not supported" 1213 " for protocol"); 1214 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1215 acc_mask ? (const uint8_t *)acc_mask 1216 : (const uint8_t *)&nic_mask, 1217 sizeof(struct rte_flow_item_ipv4), 1218 error); 1219 if (ret < 0) 1220 return ret; 1221 return 0; 1222 } 1223 1224 /** 1225 * Validate IPV6 item. 1226 * 1227 * @param[in] item 1228 * Item specification. 1229 * @param[in] item_flags 1230 * Bit-fields that holds the items detected until now. 1231 * @param[in] acc_mask 1232 * Acceptable mask, if NULL default internal default mask 1233 * will be used to check whether item fields are supported. 1234 * @param[out] error 1235 * Pointer to error structure. 1236 * 1237 * @return 1238 * 0 on success, a negative errno value otherwise and rte_errno is set. 1239 */ 1240 int 1241 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 1242 uint64_t item_flags, 1243 const struct rte_flow_item_ipv6 *acc_mask, 1244 struct rte_flow_error *error) 1245 { 1246 const struct rte_flow_item_ipv6 *mask = item->mask; 1247 const struct rte_flow_item_ipv6 nic_mask = { 1248 .hdr = { 1249 .src_addr = 1250 "\xff\xff\xff\xff\xff\xff\xff\xff" 1251 "\xff\xff\xff\xff\xff\xff\xff\xff", 1252 .dst_addr = 1253 "\xff\xff\xff\xff\xff\xff\xff\xff" 1254 "\xff\xff\xff\xff\xff\xff\xff\xff", 1255 .vtc_flow = RTE_BE32(0xffffffff), 1256 .proto = 0xff, 1257 .hop_limits = 0xff, 1258 }, 1259 }; 1260 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1261 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1262 MLX5_FLOW_LAYER_OUTER_L3; 1263 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1264 MLX5_FLOW_LAYER_OUTER_L4; 1265 int ret; 1266 1267 if (item_flags & l3m) 1268 return rte_flow_error_set(error, ENOTSUP, 1269 RTE_FLOW_ERROR_TYPE_ITEM, item, 1270 "multiple L3 layers not supported"); 1271 else if (item_flags & l4m) 1272 return rte_flow_error_set(error, EINVAL, 1273 RTE_FLOW_ERROR_TYPE_ITEM, item, 1274 "L3 cannot follow an L4 layer."); 1275 if (!mask) 1276 mask = &rte_flow_item_ipv6_mask; 1277 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1278 acc_mask ? (const uint8_t *)acc_mask 1279 : (const uint8_t *)&nic_mask, 1280 sizeof(struct rte_flow_item_ipv6), 1281 error); 1282 if (ret < 0) 1283 return ret; 1284 return 0; 1285 } 1286 1287 /** 1288 * Validate UDP item. 1289 * 1290 * @param[in] item 1291 * Item specification. 1292 * @param[in] item_flags 1293 * Bit-fields that holds the items detected until now. 1294 * @param[in] target_protocol 1295 * The next protocol in the previous item. 1296 * @param[in] flow_mask 1297 * mlx5 flow-specific (TCF, DV, verbs, etc.) supported header fields mask. 1298 * @param[out] error 1299 * Pointer to error structure. 1300 * 1301 * @return 1302 * 0 on success, a negative errno value otherwise and rte_errno is set. 1303 */ 1304 int 1305 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 1306 uint64_t item_flags, 1307 uint8_t target_protocol, 1308 struct rte_flow_error *error) 1309 { 1310 const struct rte_flow_item_udp *mask = item->mask; 1311 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1312 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1313 MLX5_FLOW_LAYER_OUTER_L3; 1314 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1315 MLX5_FLOW_LAYER_OUTER_L4; 1316 int ret; 1317 1318 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 1319 return rte_flow_error_set(error, EINVAL, 1320 RTE_FLOW_ERROR_TYPE_ITEM, item, 1321 "protocol filtering not compatible" 1322 " with UDP layer"); 1323 if (!(item_flags & l3m)) 1324 return rte_flow_error_set(error, EINVAL, 1325 RTE_FLOW_ERROR_TYPE_ITEM, item, 1326 "L3 is mandatory to filter on L4"); 1327 if (item_flags & l4m) 1328 return rte_flow_error_set(error, EINVAL, 1329 RTE_FLOW_ERROR_TYPE_ITEM, item, 1330 "multiple L4 layers not supported"); 1331 if (!mask) 1332 mask = &rte_flow_item_udp_mask; 1333 ret = mlx5_flow_item_acceptable 1334 (item, (const uint8_t *)mask, 1335 (const uint8_t *)&rte_flow_item_udp_mask, 1336 sizeof(struct rte_flow_item_udp), error); 1337 if (ret < 0) 1338 return ret; 1339 return 0; 1340 } 1341 1342 /** 1343 * Validate TCP item. 1344 * 1345 * @param[in] item 1346 * Item specification. 1347 * @param[in] item_flags 1348 * Bit-fields that holds the items detected until now. 1349 * @param[in] target_protocol 1350 * The next protocol in the previous item. 1351 * @param[out] error 1352 * Pointer to error structure. 1353 * 1354 * @return 1355 * 0 on success, a negative errno value otherwise and rte_errno is set. 1356 */ 1357 int 1358 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 1359 uint64_t item_flags, 1360 uint8_t target_protocol, 1361 const struct rte_flow_item_tcp *flow_mask, 1362 struct rte_flow_error *error) 1363 { 1364 const struct rte_flow_item_tcp *mask = item->mask; 1365 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1366 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1367 MLX5_FLOW_LAYER_OUTER_L3; 1368 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1369 MLX5_FLOW_LAYER_OUTER_L4; 1370 int ret; 1371 1372 assert(flow_mask); 1373 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 1374 return rte_flow_error_set(error, EINVAL, 1375 RTE_FLOW_ERROR_TYPE_ITEM, item, 1376 "protocol filtering not compatible" 1377 " with TCP layer"); 1378 if (!(item_flags & l3m)) 1379 return rte_flow_error_set(error, EINVAL, 1380 RTE_FLOW_ERROR_TYPE_ITEM, item, 1381 "L3 is mandatory to filter on L4"); 1382 if (item_flags & l4m) 1383 return rte_flow_error_set(error, EINVAL, 1384 RTE_FLOW_ERROR_TYPE_ITEM, item, 1385 "multiple L4 layers not supported"); 1386 if (!mask) 1387 mask = &rte_flow_item_tcp_mask; 1388 ret = mlx5_flow_item_acceptable 1389 (item, (const uint8_t *)mask, 1390 (const uint8_t *)flow_mask, 1391 sizeof(struct rte_flow_item_tcp), error); 1392 if (ret < 0) 1393 return ret; 1394 return 0; 1395 } 1396 1397 /** 1398 * Validate VXLAN item. 1399 * 1400 * @param[in] item 1401 * Item specification. 1402 * @param[in] item_flags 1403 * Bit-fields that holds the items detected until now. 1404 * @param[in] target_protocol 1405 * The next protocol in the previous item. 1406 * @param[out] error 1407 * Pointer to error structure. 1408 * 1409 * @return 1410 * 0 on success, a negative errno value otherwise and rte_errno is set. 1411 */ 1412 int 1413 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 1414 uint64_t item_flags, 1415 struct rte_flow_error *error) 1416 { 1417 const struct rte_flow_item_vxlan *spec = item->spec; 1418 const struct rte_flow_item_vxlan *mask = item->mask; 1419 int ret; 1420 union vni { 1421 uint32_t vlan_id; 1422 uint8_t vni[4]; 1423 } id = { .vlan_id = 0, }; 1424 uint32_t vlan_id = 0; 1425 1426 1427 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1428 return rte_flow_error_set(error, ENOTSUP, 1429 RTE_FLOW_ERROR_TYPE_ITEM, item, 1430 "multiple tunnel layers not" 1431 " supported"); 1432 /* 1433 * Verify only UDPv4 is present as defined in 1434 * https://tools.ietf.org/html/rfc7348 1435 */ 1436 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1437 return rte_flow_error_set(error, EINVAL, 1438 RTE_FLOW_ERROR_TYPE_ITEM, item, 1439 "no outer UDP layer found"); 1440 if (!mask) 1441 mask = &rte_flow_item_vxlan_mask; 1442 ret = mlx5_flow_item_acceptable 1443 (item, (const uint8_t *)mask, 1444 (const uint8_t *)&rte_flow_item_vxlan_mask, 1445 sizeof(struct rte_flow_item_vxlan), 1446 error); 1447 if (ret < 0) 1448 return ret; 1449 if (spec) { 1450 memcpy(&id.vni[1], spec->vni, 3); 1451 vlan_id = id.vlan_id; 1452 memcpy(&id.vni[1], mask->vni, 3); 1453 vlan_id &= id.vlan_id; 1454 } 1455 /* 1456 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if 1457 * only this layer is defined in the Verbs specification it is 1458 * interpreted as wildcard and all packets will match this 1459 * rule, if it follows a full stack layer (ex: eth / ipv4 / 1460 * udp), all packets matching the layers before will also 1461 * match this rule. To avoid such situation, VNI 0 is 1462 * currently refused. 1463 */ 1464 if (!vlan_id) 1465 return rte_flow_error_set(error, ENOTSUP, 1466 RTE_FLOW_ERROR_TYPE_ITEM, item, 1467 "VXLAN vni cannot be 0"); 1468 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1469 return rte_flow_error_set(error, ENOTSUP, 1470 RTE_FLOW_ERROR_TYPE_ITEM, item, 1471 "VXLAN tunnel must be fully defined"); 1472 return 0; 1473 } 1474 1475 /** 1476 * Validate VXLAN_GPE item. 1477 * 1478 * @param[in] item 1479 * Item specification. 1480 * @param[in] item_flags 1481 * Bit-fields that holds the items detected until now. 1482 * @param[in] priv 1483 * Pointer to the private data structure. 1484 * @param[in] target_protocol 1485 * The next protocol in the previous item. 1486 * @param[out] error 1487 * Pointer to error structure. 1488 * 1489 * @return 1490 * 0 on success, a negative errno value otherwise and rte_errno is set. 1491 */ 1492 int 1493 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 1494 uint64_t item_flags, 1495 struct rte_eth_dev *dev, 1496 struct rte_flow_error *error) 1497 { 1498 struct mlx5_priv *priv = dev->data->dev_private; 1499 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 1500 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 1501 int ret; 1502 union vni { 1503 uint32_t vlan_id; 1504 uint8_t vni[4]; 1505 } id = { .vlan_id = 0, }; 1506 uint32_t vlan_id = 0; 1507 1508 if (!priv->config.l3_vxlan_en) 1509 return rte_flow_error_set(error, ENOTSUP, 1510 RTE_FLOW_ERROR_TYPE_ITEM, item, 1511 "L3 VXLAN is not enabled by device" 1512 " parameter and/or not configured in" 1513 " firmware"); 1514 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1515 return rte_flow_error_set(error, ENOTSUP, 1516 RTE_FLOW_ERROR_TYPE_ITEM, item, 1517 "multiple tunnel layers not" 1518 " supported"); 1519 /* 1520 * Verify only UDPv4 is present as defined in 1521 * https://tools.ietf.org/html/rfc7348 1522 */ 1523 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1524 return rte_flow_error_set(error, EINVAL, 1525 RTE_FLOW_ERROR_TYPE_ITEM, item, 1526 "no outer UDP layer found"); 1527 if (!mask) 1528 mask = &rte_flow_item_vxlan_gpe_mask; 1529 ret = mlx5_flow_item_acceptable 1530 (item, (const uint8_t *)mask, 1531 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 1532 sizeof(struct rte_flow_item_vxlan_gpe), 1533 error); 1534 if (ret < 0) 1535 return ret; 1536 if (spec) { 1537 if (spec->protocol) 1538 return rte_flow_error_set(error, ENOTSUP, 1539 RTE_FLOW_ERROR_TYPE_ITEM, 1540 item, 1541 "VxLAN-GPE protocol" 1542 " not supported"); 1543 memcpy(&id.vni[1], spec->vni, 3); 1544 vlan_id = id.vlan_id; 1545 memcpy(&id.vni[1], mask->vni, 3); 1546 vlan_id &= id.vlan_id; 1547 } 1548 /* 1549 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this 1550 * layer is defined in the Verbs specification it is interpreted as 1551 * wildcard and all packets will match this rule, if it follows a full 1552 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers 1553 * before will also match this rule. To avoid such situation, VNI 0 1554 * is currently refused. 1555 */ 1556 if (!vlan_id) 1557 return rte_flow_error_set(error, ENOTSUP, 1558 RTE_FLOW_ERROR_TYPE_ITEM, item, 1559 "VXLAN-GPE vni cannot be 0"); 1560 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1561 return rte_flow_error_set(error, ENOTSUP, 1562 RTE_FLOW_ERROR_TYPE_ITEM, item, 1563 "VXLAN-GPE tunnel must be fully" 1564 " defined"); 1565 return 0; 1566 } 1567 1568 /** 1569 * Validate GRE item. 1570 * 1571 * @param[in] item 1572 * Item specification. 1573 * @param[in] item_flags 1574 * Bit flags to mark detected items. 1575 * @param[in] target_protocol 1576 * The next protocol in the previous item. 1577 * @param[out] error 1578 * Pointer to error structure. 1579 * 1580 * @return 1581 * 0 on success, a negative errno value otherwise and rte_errno is set. 1582 */ 1583 int 1584 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 1585 uint64_t item_flags, 1586 uint8_t target_protocol, 1587 struct rte_flow_error *error) 1588 { 1589 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 1590 const struct rte_flow_item_gre *mask = item->mask; 1591 int ret; 1592 1593 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 1594 return rte_flow_error_set(error, EINVAL, 1595 RTE_FLOW_ERROR_TYPE_ITEM, item, 1596 "protocol filtering not compatible" 1597 " with this GRE layer"); 1598 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1599 return rte_flow_error_set(error, ENOTSUP, 1600 RTE_FLOW_ERROR_TYPE_ITEM, item, 1601 "multiple tunnel layers not" 1602 " supported"); 1603 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 1604 return rte_flow_error_set(error, ENOTSUP, 1605 RTE_FLOW_ERROR_TYPE_ITEM, item, 1606 "L3 Layer is missing"); 1607 if (!mask) 1608 mask = &rte_flow_item_gre_mask; 1609 ret = mlx5_flow_item_acceptable 1610 (item, (const uint8_t *)mask, 1611 (const uint8_t *)&rte_flow_item_gre_mask, 1612 sizeof(struct rte_flow_item_gre), error); 1613 if (ret < 0) 1614 return ret; 1615 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 1616 if (spec && (spec->protocol & mask->protocol)) 1617 return rte_flow_error_set(error, ENOTSUP, 1618 RTE_FLOW_ERROR_TYPE_ITEM, item, 1619 "without MPLS support the" 1620 " specification cannot be used for" 1621 " filtering"); 1622 #endif 1623 return 0; 1624 } 1625 1626 /** 1627 * Validate MPLS item. 1628 * 1629 * @param[in] dev 1630 * Pointer to the rte_eth_dev structure. 1631 * @param[in] item 1632 * Item specification. 1633 * @param[in] item_flags 1634 * Bit-fields that holds the items detected until now. 1635 * @param[in] prev_layer 1636 * The protocol layer indicated in previous item. 1637 * @param[out] error 1638 * Pointer to error structure. 1639 * 1640 * @return 1641 * 0 on success, a negative errno value otherwise and rte_errno is set. 1642 */ 1643 int 1644 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 1645 const struct rte_flow_item *item __rte_unused, 1646 uint64_t item_flags __rte_unused, 1647 uint64_t prev_layer __rte_unused, 1648 struct rte_flow_error *error) 1649 { 1650 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 1651 const struct rte_flow_item_mpls *mask = item->mask; 1652 struct mlx5_priv *priv = dev->data->dev_private; 1653 int ret; 1654 1655 if (!priv->config.mpls_en) 1656 return rte_flow_error_set(error, ENOTSUP, 1657 RTE_FLOW_ERROR_TYPE_ITEM, item, 1658 "MPLS not supported or" 1659 " disabled in firmware" 1660 " configuration."); 1661 /* MPLS over IP, UDP, GRE is allowed */ 1662 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 | 1663 MLX5_FLOW_LAYER_OUTER_L4_UDP | 1664 MLX5_FLOW_LAYER_GRE))) 1665 return rte_flow_error_set(error, EINVAL, 1666 RTE_FLOW_ERROR_TYPE_ITEM, item, 1667 "protocol filtering not compatible" 1668 " with MPLS layer"); 1669 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 1670 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 1671 !(item_flags & MLX5_FLOW_LAYER_GRE)) 1672 return rte_flow_error_set(error, ENOTSUP, 1673 RTE_FLOW_ERROR_TYPE_ITEM, item, 1674 "multiple tunnel layers not" 1675 " supported"); 1676 if (!mask) 1677 mask = &rte_flow_item_mpls_mask; 1678 ret = mlx5_flow_item_acceptable 1679 (item, (const uint8_t *)mask, 1680 (const uint8_t *)&rte_flow_item_mpls_mask, 1681 sizeof(struct rte_flow_item_mpls), error); 1682 if (ret < 0) 1683 return ret; 1684 return 0; 1685 #endif 1686 return rte_flow_error_set(error, ENOTSUP, 1687 RTE_FLOW_ERROR_TYPE_ITEM, item, 1688 "MPLS is not supported by Verbs, please" 1689 " update."); 1690 } 1691 1692 static int 1693 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 1694 const struct rte_flow_attr *attr __rte_unused, 1695 const struct rte_flow_item items[] __rte_unused, 1696 const struct rte_flow_action actions[] __rte_unused, 1697 struct rte_flow_error *error __rte_unused) 1698 { 1699 rte_errno = ENOTSUP; 1700 return -rte_errno; 1701 } 1702 1703 static struct mlx5_flow * 1704 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused, 1705 const struct rte_flow_item items[] __rte_unused, 1706 const struct rte_flow_action actions[] __rte_unused, 1707 struct rte_flow_error *error __rte_unused) 1708 { 1709 rte_errno = ENOTSUP; 1710 return NULL; 1711 } 1712 1713 static int 1714 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 1715 struct mlx5_flow *dev_flow __rte_unused, 1716 const struct rte_flow_attr *attr __rte_unused, 1717 const struct rte_flow_item items[] __rte_unused, 1718 const struct rte_flow_action actions[] __rte_unused, 1719 struct rte_flow_error *error __rte_unused) 1720 { 1721 rte_errno = ENOTSUP; 1722 return -rte_errno; 1723 } 1724 1725 static int 1726 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 1727 struct rte_flow *flow __rte_unused, 1728 struct rte_flow_error *error __rte_unused) 1729 { 1730 rte_errno = ENOTSUP; 1731 return -rte_errno; 1732 } 1733 1734 static void 1735 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 1736 struct rte_flow *flow __rte_unused) 1737 { 1738 } 1739 1740 static void 1741 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 1742 struct rte_flow *flow __rte_unused) 1743 { 1744 } 1745 1746 static int 1747 flow_null_query(struct rte_eth_dev *dev __rte_unused, 1748 struct rte_flow *flow __rte_unused, 1749 const struct rte_flow_action *actions __rte_unused, 1750 void *data __rte_unused, 1751 struct rte_flow_error *error __rte_unused) 1752 { 1753 rte_errno = ENOTSUP; 1754 return -rte_errno; 1755 } 1756 1757 /* Void driver to protect from null pointer reference. */ 1758 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 1759 .validate = flow_null_validate, 1760 .prepare = flow_null_prepare, 1761 .translate = flow_null_translate, 1762 .apply = flow_null_apply, 1763 .remove = flow_null_remove, 1764 .destroy = flow_null_destroy, 1765 .query = flow_null_query, 1766 }; 1767 1768 /** 1769 * Select flow driver type according to flow attributes and device 1770 * configuration. 1771 * 1772 * @param[in] dev 1773 * Pointer to the dev structure. 1774 * @param[in] attr 1775 * Pointer to the flow attributes. 1776 * 1777 * @return 1778 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 1779 */ 1780 static enum mlx5_flow_drv_type 1781 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 1782 { 1783 struct mlx5_priv *priv = dev->data->dev_private; 1784 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX; 1785 1786 if (attr->transfer) 1787 type = MLX5_FLOW_TYPE_TCF; 1788 else 1789 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 1790 MLX5_FLOW_TYPE_VERBS; 1791 return type; 1792 } 1793 1794 #define flow_get_drv_ops(type) flow_drv_ops[type] 1795 1796 /** 1797 * Flow driver validation API. This abstracts calling driver specific functions. 1798 * The type of flow driver is determined according to flow attributes. 1799 * 1800 * @param[in] dev 1801 * Pointer to the dev structure. 1802 * @param[in] attr 1803 * Pointer to the flow attributes. 1804 * @param[in] items 1805 * Pointer to the list of items. 1806 * @param[in] actions 1807 * Pointer to the list of actions. 1808 * @param[out] error 1809 * Pointer to the error structure. 1810 * 1811 * @return 1812 * 0 on success, a negative errno value otherwise and rte_errno is set. 1813 */ 1814 static inline int 1815 flow_drv_validate(struct rte_eth_dev *dev, 1816 const struct rte_flow_attr *attr, 1817 const struct rte_flow_item items[], 1818 const struct rte_flow_action actions[], 1819 struct rte_flow_error *error) 1820 { 1821 const struct mlx5_flow_driver_ops *fops; 1822 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 1823 1824 fops = flow_get_drv_ops(type); 1825 return fops->validate(dev, attr, items, actions, error); 1826 } 1827 1828 /** 1829 * Flow driver preparation API. This abstracts calling driver specific 1830 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1831 * calculates the size of memory required for device flow, allocates the memory, 1832 * initializes the device flow and returns the pointer. 1833 * 1834 * @note 1835 * This function initializes device flow structure such as dv, tcf or verbs in 1836 * struct mlx5_flow. However, it is caller's responsibility to initialize the 1837 * rest. For example, adding returning device flow to flow->dev_flow list and 1838 * setting backward reference to the flow should be done out of this function. 1839 * layers field is not filled either. 1840 * 1841 * @param[in] attr 1842 * Pointer to the flow attributes. 1843 * @param[in] items 1844 * Pointer to the list of items. 1845 * @param[in] actions 1846 * Pointer to the list of actions. 1847 * @param[out] error 1848 * Pointer to the error structure. 1849 * 1850 * @return 1851 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 1852 */ 1853 static inline struct mlx5_flow * 1854 flow_drv_prepare(const struct rte_flow *flow, 1855 const struct rte_flow_attr *attr, 1856 const struct rte_flow_item items[], 1857 const struct rte_flow_action actions[], 1858 struct rte_flow_error *error) 1859 { 1860 const struct mlx5_flow_driver_ops *fops; 1861 enum mlx5_flow_drv_type type = flow->drv_type; 1862 1863 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1864 fops = flow_get_drv_ops(type); 1865 return fops->prepare(attr, items, actions, error); 1866 } 1867 1868 /** 1869 * Flow driver translation API. This abstracts calling driver specific 1870 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1871 * translates a generic flow into a driver flow. flow_drv_prepare() must 1872 * precede. 1873 * 1874 * @note 1875 * dev_flow->layers could be filled as a result of parsing during translation 1876 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 1877 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 1878 * flow->actions could be overwritten even though all the expanded dev_flows 1879 * have the same actions. 1880 * 1881 * @param[in] dev 1882 * Pointer to the rte dev structure. 1883 * @param[in, out] dev_flow 1884 * Pointer to the mlx5 flow. 1885 * @param[in] attr 1886 * Pointer to the flow attributes. 1887 * @param[in] items 1888 * Pointer to the list of items. 1889 * @param[in] actions 1890 * Pointer to the list of actions. 1891 * @param[out] error 1892 * Pointer to the error structure. 1893 * 1894 * @return 1895 * 0 on success, a negative errno value otherwise and rte_errno is set. 1896 */ 1897 static inline int 1898 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 1899 const struct rte_flow_attr *attr, 1900 const struct rte_flow_item items[], 1901 const struct rte_flow_action actions[], 1902 struct rte_flow_error *error) 1903 { 1904 const struct mlx5_flow_driver_ops *fops; 1905 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 1906 1907 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1908 fops = flow_get_drv_ops(type); 1909 return fops->translate(dev, dev_flow, attr, items, actions, error); 1910 } 1911 1912 /** 1913 * Flow driver apply API. This abstracts calling driver specific functions. 1914 * Parent flow (rte_flow) should have driver type (drv_type). It applies 1915 * translated driver flows on to device. flow_drv_translate() must precede. 1916 * 1917 * @param[in] dev 1918 * Pointer to Ethernet device structure. 1919 * @param[in, out] flow 1920 * Pointer to flow structure. 1921 * @param[out] error 1922 * Pointer to error structure. 1923 * 1924 * @return 1925 * 0 on success, a negative errno value otherwise and rte_errno is set. 1926 */ 1927 static inline int 1928 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 1929 struct rte_flow_error *error) 1930 { 1931 const struct mlx5_flow_driver_ops *fops; 1932 enum mlx5_flow_drv_type type = flow->drv_type; 1933 1934 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1935 fops = flow_get_drv_ops(type); 1936 return fops->apply(dev, flow, error); 1937 } 1938 1939 /** 1940 * Flow driver remove API. This abstracts calling driver specific functions. 1941 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1942 * on device. All the resources of the flow should be freed by calling 1943 * flow_drv_destroy(). 1944 * 1945 * @param[in] dev 1946 * Pointer to Ethernet device. 1947 * @param[in, out] flow 1948 * Pointer to flow structure. 1949 */ 1950 static inline void 1951 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow) 1952 { 1953 const struct mlx5_flow_driver_ops *fops; 1954 enum mlx5_flow_drv_type type = flow->drv_type; 1955 1956 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1957 fops = flow_get_drv_ops(type); 1958 fops->remove(dev, flow); 1959 } 1960 1961 /** 1962 * Flow driver destroy API. This abstracts calling driver specific functions. 1963 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1964 * on device and releases resources of the flow. 1965 * 1966 * @param[in] dev 1967 * Pointer to Ethernet device. 1968 * @param[in, out] flow 1969 * Pointer to flow structure. 1970 */ 1971 static inline void 1972 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 1973 { 1974 const struct mlx5_flow_driver_ops *fops; 1975 enum mlx5_flow_drv_type type = flow->drv_type; 1976 1977 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1978 fops = flow_get_drv_ops(type); 1979 fops->destroy(dev, flow); 1980 } 1981 1982 /** 1983 * Validate a flow supported by the NIC. 1984 * 1985 * @see rte_flow_validate() 1986 * @see rte_flow_ops 1987 */ 1988 int 1989 mlx5_flow_validate(struct rte_eth_dev *dev, 1990 const struct rte_flow_attr *attr, 1991 const struct rte_flow_item items[], 1992 const struct rte_flow_action actions[], 1993 struct rte_flow_error *error) 1994 { 1995 int ret; 1996 1997 ret = flow_drv_validate(dev, attr, items, actions, error); 1998 if (ret < 0) 1999 return ret; 2000 return 0; 2001 } 2002 2003 /** 2004 * Get RSS action from the action list. 2005 * 2006 * @param[in] actions 2007 * Pointer to the list of actions. 2008 * 2009 * @return 2010 * Pointer to the RSS action if exist, else return NULL. 2011 */ 2012 static const struct rte_flow_action_rss* 2013 flow_get_rss_action(const struct rte_flow_action actions[]) 2014 { 2015 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2016 switch (actions->type) { 2017 case RTE_FLOW_ACTION_TYPE_RSS: 2018 return (const struct rte_flow_action_rss *) 2019 actions->conf; 2020 default: 2021 break; 2022 } 2023 } 2024 return NULL; 2025 } 2026 2027 static unsigned int 2028 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 2029 { 2030 const struct rte_flow_item *item; 2031 unsigned int has_vlan = 0; 2032 2033 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 2034 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 2035 has_vlan = 1; 2036 break; 2037 } 2038 } 2039 if (has_vlan) 2040 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 2041 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 2042 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 2043 MLX5_EXPANSION_ROOT_OUTER; 2044 } 2045 2046 /** 2047 * Create a flow and add it to @p list. 2048 * 2049 * @param dev 2050 * Pointer to Ethernet device. 2051 * @param list 2052 * Pointer to a TAILQ flow list. 2053 * @param[in] attr 2054 * Flow rule attributes. 2055 * @param[in] items 2056 * Pattern specification (list terminated by the END pattern item). 2057 * @param[in] actions 2058 * Associated actions (list terminated by the END action). 2059 * @param[out] error 2060 * Perform verbose error reporting if not NULL. 2061 * 2062 * @return 2063 * A flow on success, NULL otherwise and rte_errno is set. 2064 */ 2065 static struct rte_flow * 2066 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list, 2067 const struct rte_flow_attr *attr, 2068 const struct rte_flow_item items[], 2069 const struct rte_flow_action actions[], 2070 struct rte_flow_error *error) 2071 { 2072 struct rte_flow *flow = NULL; 2073 struct mlx5_flow *dev_flow; 2074 const struct rte_flow_action_rss *rss; 2075 union { 2076 struct rte_flow_expand_rss buf; 2077 uint8_t buffer[2048]; 2078 } expand_buffer; 2079 struct rte_flow_expand_rss *buf = &expand_buffer.buf; 2080 int ret; 2081 uint32_t i; 2082 uint32_t flow_size; 2083 2084 ret = flow_drv_validate(dev, attr, items, actions, error); 2085 if (ret < 0) 2086 return NULL; 2087 flow_size = sizeof(struct rte_flow); 2088 rss = flow_get_rss_action(actions); 2089 if (rss) 2090 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t), 2091 sizeof(void *)); 2092 else 2093 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *)); 2094 flow = rte_calloc(__func__, 1, flow_size, 0); 2095 flow->drv_type = flow_get_drv_type(dev, attr); 2096 flow->ingress = attr->ingress; 2097 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && 2098 flow->drv_type < MLX5_FLOW_TYPE_MAX); 2099 flow->queue = (void *)(flow + 1); 2100 LIST_INIT(&flow->dev_flows); 2101 if (rss && rss->types) { 2102 unsigned int graph_root; 2103 2104 graph_root = find_graph_root(items, rss->level); 2105 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 2106 items, rss->types, 2107 mlx5_support_expansion, 2108 graph_root); 2109 assert(ret > 0 && 2110 (unsigned int)ret < sizeof(expand_buffer.buffer)); 2111 } else { 2112 buf->entries = 1; 2113 buf->entry[0].pattern = (void *)(uintptr_t)items; 2114 } 2115 for (i = 0; i < buf->entries; ++i) { 2116 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern, 2117 actions, error); 2118 if (!dev_flow) 2119 goto error; 2120 dev_flow->flow = flow; 2121 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next); 2122 ret = flow_drv_translate(dev, dev_flow, attr, 2123 buf->entry[i].pattern, 2124 actions, error); 2125 if (ret < 0) 2126 goto error; 2127 } 2128 if (dev->data->dev_started) { 2129 ret = flow_drv_apply(dev, flow, error); 2130 if (ret < 0) 2131 goto error; 2132 } 2133 TAILQ_INSERT_TAIL(list, flow, next); 2134 flow_rxq_flags_set(dev, flow); 2135 return flow; 2136 error: 2137 ret = rte_errno; /* Save rte_errno before cleanup. */ 2138 assert(flow); 2139 flow_drv_destroy(dev, flow); 2140 rte_free(flow); 2141 rte_errno = ret; /* Restore rte_errno. */ 2142 return NULL; 2143 } 2144 2145 /** 2146 * Create a flow. 2147 * 2148 * @see rte_flow_create() 2149 * @see rte_flow_ops 2150 */ 2151 struct rte_flow * 2152 mlx5_flow_create(struct rte_eth_dev *dev, 2153 const struct rte_flow_attr *attr, 2154 const struct rte_flow_item items[], 2155 const struct rte_flow_action actions[], 2156 struct rte_flow_error *error) 2157 { 2158 struct mlx5_priv *priv = (struct mlx5_priv *)dev->data->dev_private; 2159 2160 return flow_list_create(dev, &priv->flows, 2161 attr, items, actions, error); 2162 } 2163 2164 /** 2165 * Destroy a flow in a list. 2166 * 2167 * @param dev 2168 * Pointer to Ethernet device. 2169 * @param list 2170 * Pointer to a TAILQ flow list. 2171 * @param[in] flow 2172 * Flow to destroy. 2173 */ 2174 static void 2175 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list, 2176 struct rte_flow *flow) 2177 { 2178 /* 2179 * Update RX queue flags only if port is started, otherwise it is 2180 * already clean. 2181 */ 2182 if (dev->data->dev_started) 2183 flow_rxq_flags_trim(dev, flow); 2184 flow_drv_destroy(dev, flow); 2185 TAILQ_REMOVE(list, flow, next); 2186 rte_free(flow->fdir); 2187 rte_free(flow); 2188 } 2189 2190 /** 2191 * Destroy all flows. 2192 * 2193 * @param dev 2194 * Pointer to Ethernet device. 2195 * @param list 2196 * Pointer to a TAILQ flow list. 2197 */ 2198 void 2199 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list) 2200 { 2201 while (!TAILQ_EMPTY(list)) { 2202 struct rte_flow *flow; 2203 2204 flow = TAILQ_FIRST(list); 2205 flow_list_destroy(dev, list, flow); 2206 } 2207 } 2208 2209 /** 2210 * Remove all flows. 2211 * 2212 * @param dev 2213 * Pointer to Ethernet device. 2214 * @param list 2215 * Pointer to a TAILQ flow list. 2216 */ 2217 void 2218 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list) 2219 { 2220 struct rte_flow *flow; 2221 2222 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) 2223 flow_drv_remove(dev, flow); 2224 flow_rxq_flags_clear(dev); 2225 } 2226 2227 /** 2228 * Add all flows. 2229 * 2230 * @param dev 2231 * Pointer to Ethernet device. 2232 * @param list 2233 * Pointer to a TAILQ flow list. 2234 * 2235 * @return 2236 * 0 on success, a negative errno value otherwise and rte_errno is set. 2237 */ 2238 int 2239 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list) 2240 { 2241 struct rte_flow *flow; 2242 struct rte_flow_error error; 2243 int ret = 0; 2244 2245 TAILQ_FOREACH(flow, list, next) { 2246 ret = flow_drv_apply(dev, flow, &error); 2247 if (ret < 0) 2248 goto error; 2249 flow_rxq_flags_set(dev, flow); 2250 } 2251 return 0; 2252 error: 2253 ret = rte_errno; /* Save rte_errno before cleanup. */ 2254 mlx5_flow_stop(dev, list); 2255 rte_errno = ret; /* Restore rte_errno. */ 2256 return -rte_errno; 2257 } 2258 2259 /** 2260 * Verify the flow list is empty 2261 * 2262 * @param dev 2263 * Pointer to Ethernet device. 2264 * 2265 * @return the number of flows not released. 2266 */ 2267 int 2268 mlx5_flow_verify(struct rte_eth_dev *dev) 2269 { 2270 struct mlx5_priv *priv = dev->data->dev_private; 2271 struct rte_flow *flow; 2272 int ret = 0; 2273 2274 TAILQ_FOREACH(flow, &priv->flows, next) { 2275 DRV_LOG(DEBUG, "port %u flow %p still referenced", 2276 dev->data->port_id, (void *)flow); 2277 ++ret; 2278 } 2279 return ret; 2280 } 2281 2282 /** 2283 * Enable a control flow configured from the control plane. 2284 * 2285 * @param dev 2286 * Pointer to Ethernet device. 2287 * @param eth_spec 2288 * An Ethernet flow spec to apply. 2289 * @param eth_mask 2290 * An Ethernet flow mask to apply. 2291 * @param vlan_spec 2292 * A VLAN flow spec to apply. 2293 * @param vlan_mask 2294 * A VLAN flow mask to apply. 2295 * 2296 * @return 2297 * 0 on success, a negative errno value otherwise and rte_errno is set. 2298 */ 2299 int 2300 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 2301 struct rte_flow_item_eth *eth_spec, 2302 struct rte_flow_item_eth *eth_mask, 2303 struct rte_flow_item_vlan *vlan_spec, 2304 struct rte_flow_item_vlan *vlan_mask) 2305 { 2306 struct mlx5_priv *priv = dev->data->dev_private; 2307 const struct rte_flow_attr attr = { 2308 .ingress = 1, 2309 .priority = MLX5_FLOW_PRIO_RSVD, 2310 }; 2311 struct rte_flow_item items[] = { 2312 { 2313 .type = RTE_FLOW_ITEM_TYPE_ETH, 2314 .spec = eth_spec, 2315 .last = NULL, 2316 .mask = eth_mask, 2317 }, 2318 { 2319 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 2320 RTE_FLOW_ITEM_TYPE_END, 2321 .spec = vlan_spec, 2322 .last = NULL, 2323 .mask = vlan_mask, 2324 }, 2325 { 2326 .type = RTE_FLOW_ITEM_TYPE_END, 2327 }, 2328 }; 2329 uint16_t queue[priv->reta_idx_n]; 2330 struct rte_flow_action_rss action_rss = { 2331 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 2332 .level = 0, 2333 .types = priv->rss_conf.rss_hf, 2334 .key_len = priv->rss_conf.rss_key_len, 2335 .queue_num = priv->reta_idx_n, 2336 .key = priv->rss_conf.rss_key, 2337 .queue = queue, 2338 }; 2339 struct rte_flow_action actions[] = { 2340 { 2341 .type = RTE_FLOW_ACTION_TYPE_RSS, 2342 .conf = &action_rss, 2343 }, 2344 { 2345 .type = RTE_FLOW_ACTION_TYPE_END, 2346 }, 2347 }; 2348 struct rte_flow *flow; 2349 struct rte_flow_error error; 2350 unsigned int i; 2351 2352 if (!priv->reta_idx_n || !priv->rxqs_n) { 2353 return 0; 2354 } 2355 for (i = 0; i != priv->reta_idx_n; ++i) 2356 queue[i] = (*priv->reta_idx)[i]; 2357 flow = flow_list_create(dev, &priv->ctrl_flows, 2358 &attr, items, actions, &error); 2359 if (!flow) 2360 return -rte_errno; 2361 return 0; 2362 } 2363 2364 /** 2365 * Enable a flow control configured from the control plane. 2366 * 2367 * @param dev 2368 * Pointer to Ethernet device. 2369 * @param eth_spec 2370 * An Ethernet flow spec to apply. 2371 * @param eth_mask 2372 * An Ethernet flow mask to apply. 2373 * 2374 * @return 2375 * 0 on success, a negative errno value otherwise and rte_errno is set. 2376 */ 2377 int 2378 mlx5_ctrl_flow(struct rte_eth_dev *dev, 2379 struct rte_flow_item_eth *eth_spec, 2380 struct rte_flow_item_eth *eth_mask) 2381 { 2382 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 2383 } 2384 2385 /** 2386 * Destroy a flow. 2387 * 2388 * @see rte_flow_destroy() 2389 * @see rte_flow_ops 2390 */ 2391 int 2392 mlx5_flow_destroy(struct rte_eth_dev *dev, 2393 struct rte_flow *flow, 2394 struct rte_flow_error *error __rte_unused) 2395 { 2396 struct mlx5_priv *priv = dev->data->dev_private; 2397 2398 flow_list_destroy(dev, &priv->flows, flow); 2399 return 0; 2400 } 2401 2402 /** 2403 * Destroy all flows. 2404 * 2405 * @see rte_flow_flush() 2406 * @see rte_flow_ops 2407 */ 2408 int 2409 mlx5_flow_flush(struct rte_eth_dev *dev, 2410 struct rte_flow_error *error __rte_unused) 2411 { 2412 struct mlx5_priv *priv = dev->data->dev_private; 2413 2414 mlx5_flow_list_flush(dev, &priv->flows); 2415 return 0; 2416 } 2417 2418 /** 2419 * Isolated mode. 2420 * 2421 * @see rte_flow_isolate() 2422 * @see rte_flow_ops 2423 */ 2424 int 2425 mlx5_flow_isolate(struct rte_eth_dev *dev, 2426 int enable, 2427 struct rte_flow_error *error) 2428 { 2429 struct mlx5_priv *priv = dev->data->dev_private; 2430 2431 if (dev->data->dev_started) { 2432 rte_flow_error_set(error, EBUSY, 2433 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2434 NULL, 2435 "port must be stopped first"); 2436 return -rte_errno; 2437 } 2438 priv->isolated = !!enable; 2439 if (enable) 2440 dev->dev_ops = &mlx5_dev_ops_isolate; 2441 else 2442 dev->dev_ops = &mlx5_dev_ops; 2443 return 0; 2444 } 2445 2446 /** 2447 * Query a flow. 2448 * 2449 * @see rte_flow_query() 2450 * @see rte_flow_ops 2451 */ 2452 static int 2453 flow_drv_query(struct rte_eth_dev *dev, 2454 struct rte_flow *flow, 2455 const struct rte_flow_action *actions, 2456 void *data, 2457 struct rte_flow_error *error) 2458 { 2459 const struct mlx5_flow_driver_ops *fops; 2460 enum mlx5_flow_drv_type ftype = flow->drv_type; 2461 2462 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 2463 fops = flow_get_drv_ops(ftype); 2464 2465 return fops->query(dev, flow, actions, data, error); 2466 } 2467 2468 /** 2469 * Query a flow. 2470 * 2471 * @see rte_flow_query() 2472 * @see rte_flow_ops 2473 */ 2474 int 2475 mlx5_flow_query(struct rte_eth_dev *dev, 2476 struct rte_flow *flow, 2477 const struct rte_flow_action *actions, 2478 void *data, 2479 struct rte_flow_error *error) 2480 { 2481 int ret; 2482 2483 ret = flow_drv_query(dev, flow, actions, data, error); 2484 if (ret < 0) 2485 return ret; 2486 return 0; 2487 } 2488 2489 /** 2490 * Convert a flow director filter to a generic flow. 2491 * 2492 * @param dev 2493 * Pointer to Ethernet device. 2494 * @param fdir_filter 2495 * Flow director filter to add. 2496 * @param attributes 2497 * Generic flow parameters structure. 2498 * 2499 * @return 2500 * 0 on success, a negative errno value otherwise and rte_errno is set. 2501 */ 2502 static int 2503 flow_fdir_filter_convert(struct rte_eth_dev *dev, 2504 const struct rte_eth_fdir_filter *fdir_filter, 2505 struct mlx5_fdir *attributes) 2506 { 2507 struct mlx5_priv *priv = dev->data->dev_private; 2508 const struct rte_eth_fdir_input *input = &fdir_filter->input; 2509 const struct rte_eth_fdir_masks *mask = 2510 &dev->data->dev_conf.fdir_conf.mask; 2511 2512 /* Validate queue number. */ 2513 if (fdir_filter->action.rx_queue >= priv->rxqs_n) { 2514 DRV_LOG(ERR, "port %u invalid queue number %d", 2515 dev->data->port_id, fdir_filter->action.rx_queue); 2516 rte_errno = EINVAL; 2517 return -rte_errno; 2518 } 2519 attributes->attr.ingress = 1; 2520 attributes->items[0] = (struct rte_flow_item) { 2521 .type = RTE_FLOW_ITEM_TYPE_ETH, 2522 .spec = &attributes->l2, 2523 .mask = &attributes->l2_mask, 2524 }; 2525 switch (fdir_filter->action.behavior) { 2526 case RTE_ETH_FDIR_ACCEPT: 2527 attributes->actions[0] = (struct rte_flow_action){ 2528 .type = RTE_FLOW_ACTION_TYPE_QUEUE, 2529 .conf = &attributes->queue, 2530 }; 2531 break; 2532 case RTE_ETH_FDIR_REJECT: 2533 attributes->actions[0] = (struct rte_flow_action){ 2534 .type = RTE_FLOW_ACTION_TYPE_DROP, 2535 }; 2536 break; 2537 default: 2538 DRV_LOG(ERR, "port %u invalid behavior %d", 2539 dev->data->port_id, 2540 fdir_filter->action.behavior); 2541 rte_errno = ENOTSUP; 2542 return -rte_errno; 2543 } 2544 attributes->queue.index = fdir_filter->action.rx_queue; 2545 /* Handle L3. */ 2546 switch (fdir_filter->input.flow_type) { 2547 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2548 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2549 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2550 attributes->l3.ipv4.hdr = (struct ipv4_hdr){ 2551 .src_addr = input->flow.ip4_flow.src_ip, 2552 .dst_addr = input->flow.ip4_flow.dst_ip, 2553 .time_to_live = input->flow.ip4_flow.ttl, 2554 .type_of_service = input->flow.ip4_flow.tos, 2555 }; 2556 attributes->l3_mask.ipv4.hdr = (struct ipv4_hdr){ 2557 .src_addr = mask->ipv4_mask.src_ip, 2558 .dst_addr = mask->ipv4_mask.dst_ip, 2559 .time_to_live = mask->ipv4_mask.ttl, 2560 .type_of_service = mask->ipv4_mask.tos, 2561 .next_proto_id = mask->ipv4_mask.proto, 2562 }; 2563 attributes->items[1] = (struct rte_flow_item){ 2564 .type = RTE_FLOW_ITEM_TYPE_IPV4, 2565 .spec = &attributes->l3, 2566 .mask = &attributes->l3_mask, 2567 }; 2568 break; 2569 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2570 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2571 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2572 attributes->l3.ipv6.hdr = (struct ipv6_hdr){ 2573 .hop_limits = input->flow.ipv6_flow.hop_limits, 2574 .proto = input->flow.ipv6_flow.proto, 2575 }; 2576 2577 memcpy(attributes->l3.ipv6.hdr.src_addr, 2578 input->flow.ipv6_flow.src_ip, 2579 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2580 memcpy(attributes->l3.ipv6.hdr.dst_addr, 2581 input->flow.ipv6_flow.dst_ip, 2582 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2583 memcpy(attributes->l3_mask.ipv6.hdr.src_addr, 2584 mask->ipv6_mask.src_ip, 2585 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2586 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr, 2587 mask->ipv6_mask.dst_ip, 2588 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2589 attributes->items[1] = (struct rte_flow_item){ 2590 .type = RTE_FLOW_ITEM_TYPE_IPV6, 2591 .spec = &attributes->l3, 2592 .mask = &attributes->l3_mask, 2593 }; 2594 break; 2595 default: 2596 DRV_LOG(ERR, "port %u invalid flow type%d", 2597 dev->data->port_id, fdir_filter->input.flow_type); 2598 rte_errno = ENOTSUP; 2599 return -rte_errno; 2600 } 2601 /* Handle L4. */ 2602 switch (fdir_filter->input.flow_type) { 2603 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2604 attributes->l4.udp.hdr = (struct udp_hdr){ 2605 .src_port = input->flow.udp4_flow.src_port, 2606 .dst_port = input->flow.udp4_flow.dst_port, 2607 }; 2608 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2609 .src_port = mask->src_port_mask, 2610 .dst_port = mask->dst_port_mask, 2611 }; 2612 attributes->items[2] = (struct rte_flow_item){ 2613 .type = RTE_FLOW_ITEM_TYPE_UDP, 2614 .spec = &attributes->l4, 2615 .mask = &attributes->l4_mask, 2616 }; 2617 break; 2618 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2619 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2620 .src_port = input->flow.tcp4_flow.src_port, 2621 .dst_port = input->flow.tcp4_flow.dst_port, 2622 }; 2623 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2624 .src_port = mask->src_port_mask, 2625 .dst_port = mask->dst_port_mask, 2626 }; 2627 attributes->items[2] = (struct rte_flow_item){ 2628 .type = RTE_FLOW_ITEM_TYPE_TCP, 2629 .spec = &attributes->l4, 2630 .mask = &attributes->l4_mask, 2631 }; 2632 break; 2633 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2634 attributes->l4.udp.hdr = (struct udp_hdr){ 2635 .src_port = input->flow.udp6_flow.src_port, 2636 .dst_port = input->flow.udp6_flow.dst_port, 2637 }; 2638 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2639 .src_port = mask->src_port_mask, 2640 .dst_port = mask->dst_port_mask, 2641 }; 2642 attributes->items[2] = (struct rte_flow_item){ 2643 .type = RTE_FLOW_ITEM_TYPE_UDP, 2644 .spec = &attributes->l4, 2645 .mask = &attributes->l4_mask, 2646 }; 2647 break; 2648 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2649 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2650 .src_port = input->flow.tcp6_flow.src_port, 2651 .dst_port = input->flow.tcp6_flow.dst_port, 2652 }; 2653 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2654 .src_port = mask->src_port_mask, 2655 .dst_port = mask->dst_port_mask, 2656 }; 2657 attributes->items[2] = (struct rte_flow_item){ 2658 .type = RTE_FLOW_ITEM_TYPE_TCP, 2659 .spec = &attributes->l4, 2660 .mask = &attributes->l4_mask, 2661 }; 2662 break; 2663 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2664 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2665 break; 2666 default: 2667 DRV_LOG(ERR, "port %u invalid flow type%d", 2668 dev->data->port_id, fdir_filter->input.flow_type); 2669 rte_errno = ENOTSUP; 2670 return -rte_errno; 2671 } 2672 return 0; 2673 } 2674 2675 #define FLOW_FDIR_CMP(f1, f2, fld) \ 2676 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld)) 2677 2678 /** 2679 * Compare two FDIR flows. If items and actions are identical, the two flows are 2680 * regarded as same. 2681 * 2682 * @param dev 2683 * Pointer to Ethernet device. 2684 * @param f1 2685 * FDIR flow to compare. 2686 * @param f2 2687 * FDIR flow to compare. 2688 * 2689 * @return 2690 * Zero on match, 1 otherwise. 2691 */ 2692 static int 2693 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2) 2694 { 2695 if (FLOW_FDIR_CMP(f1, f2, attr) || 2696 FLOW_FDIR_CMP(f1, f2, l2) || 2697 FLOW_FDIR_CMP(f1, f2, l2_mask) || 2698 FLOW_FDIR_CMP(f1, f2, l3) || 2699 FLOW_FDIR_CMP(f1, f2, l3_mask) || 2700 FLOW_FDIR_CMP(f1, f2, l4) || 2701 FLOW_FDIR_CMP(f1, f2, l4_mask) || 2702 FLOW_FDIR_CMP(f1, f2, actions[0].type)) 2703 return 1; 2704 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE && 2705 FLOW_FDIR_CMP(f1, f2, queue)) 2706 return 1; 2707 return 0; 2708 } 2709 2710 /** 2711 * Search device flow list to find out a matched FDIR flow. 2712 * 2713 * @param dev 2714 * Pointer to Ethernet device. 2715 * @param fdir_flow 2716 * FDIR flow to lookup. 2717 * 2718 * @return 2719 * Pointer of flow if found, NULL otherwise. 2720 */ 2721 static struct rte_flow * 2722 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow) 2723 { 2724 struct mlx5_priv *priv = dev->data->dev_private; 2725 struct rte_flow *flow = NULL; 2726 2727 assert(fdir_flow); 2728 TAILQ_FOREACH(flow, &priv->flows, next) { 2729 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) { 2730 DRV_LOG(DEBUG, "port %u found FDIR flow %p", 2731 dev->data->port_id, (void *)flow); 2732 break; 2733 } 2734 } 2735 return flow; 2736 } 2737 2738 /** 2739 * Add new flow director filter and store it in list. 2740 * 2741 * @param dev 2742 * Pointer to Ethernet device. 2743 * @param fdir_filter 2744 * Flow director filter to add. 2745 * 2746 * @return 2747 * 0 on success, a negative errno value otherwise and rte_errno is set. 2748 */ 2749 static int 2750 flow_fdir_filter_add(struct rte_eth_dev *dev, 2751 const struct rte_eth_fdir_filter *fdir_filter) 2752 { 2753 struct mlx5_priv *priv = dev->data->dev_private; 2754 struct mlx5_fdir *fdir_flow; 2755 struct rte_flow *flow; 2756 int ret; 2757 2758 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0); 2759 if (!fdir_flow) { 2760 rte_errno = ENOMEM; 2761 return -rte_errno; 2762 } 2763 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow); 2764 if (ret) 2765 goto error; 2766 flow = flow_fdir_filter_lookup(dev, fdir_flow); 2767 if (flow) { 2768 rte_errno = EEXIST; 2769 goto error; 2770 } 2771 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr, 2772 fdir_flow->items, fdir_flow->actions, NULL); 2773 if (!flow) 2774 goto error; 2775 assert(!flow->fdir); 2776 flow->fdir = fdir_flow; 2777 DRV_LOG(DEBUG, "port %u created FDIR flow %p", 2778 dev->data->port_id, (void *)flow); 2779 return 0; 2780 error: 2781 rte_free(fdir_flow); 2782 return -rte_errno; 2783 } 2784 2785 /** 2786 * Delete specific filter. 2787 * 2788 * @param dev 2789 * Pointer to Ethernet device. 2790 * @param fdir_filter 2791 * Filter to be deleted. 2792 * 2793 * @return 2794 * 0 on success, a negative errno value otherwise and rte_errno is set. 2795 */ 2796 static int 2797 flow_fdir_filter_delete(struct rte_eth_dev *dev, 2798 const struct rte_eth_fdir_filter *fdir_filter) 2799 { 2800 struct mlx5_priv *priv = dev->data->dev_private; 2801 struct rte_flow *flow; 2802 struct mlx5_fdir fdir_flow = { 2803 .attr.group = 0, 2804 }; 2805 int ret; 2806 2807 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow); 2808 if (ret) 2809 return -rte_errno; 2810 flow = flow_fdir_filter_lookup(dev, &fdir_flow); 2811 if (!flow) { 2812 rte_errno = ENOENT; 2813 return -rte_errno; 2814 } 2815 flow_list_destroy(dev, &priv->flows, flow); 2816 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p", 2817 dev->data->port_id, (void *)flow); 2818 return 0; 2819 } 2820 2821 /** 2822 * Update queue for specific filter. 2823 * 2824 * @param dev 2825 * Pointer to Ethernet device. 2826 * @param fdir_filter 2827 * Filter to be updated. 2828 * 2829 * @return 2830 * 0 on success, a negative errno value otherwise and rte_errno is set. 2831 */ 2832 static int 2833 flow_fdir_filter_update(struct rte_eth_dev *dev, 2834 const struct rte_eth_fdir_filter *fdir_filter) 2835 { 2836 int ret; 2837 2838 ret = flow_fdir_filter_delete(dev, fdir_filter); 2839 if (ret) 2840 return ret; 2841 return flow_fdir_filter_add(dev, fdir_filter); 2842 } 2843 2844 /** 2845 * Flush all filters. 2846 * 2847 * @param dev 2848 * Pointer to Ethernet device. 2849 */ 2850 static void 2851 flow_fdir_filter_flush(struct rte_eth_dev *dev) 2852 { 2853 struct mlx5_priv *priv = dev->data->dev_private; 2854 2855 mlx5_flow_list_flush(dev, &priv->flows); 2856 } 2857 2858 /** 2859 * Get flow director information. 2860 * 2861 * @param dev 2862 * Pointer to Ethernet device. 2863 * @param[out] fdir_info 2864 * Resulting flow director information. 2865 */ 2866 static void 2867 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info) 2868 { 2869 struct rte_eth_fdir_masks *mask = 2870 &dev->data->dev_conf.fdir_conf.mask; 2871 2872 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode; 2873 fdir_info->guarant_spc = 0; 2874 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask)); 2875 fdir_info->max_flexpayload = 0; 2876 fdir_info->flow_types_mask[0] = 0; 2877 fdir_info->flex_payload_unit = 0; 2878 fdir_info->max_flex_payload_segment_num = 0; 2879 fdir_info->flex_payload_limit = 0; 2880 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf)); 2881 } 2882 2883 /** 2884 * Deal with flow director operations. 2885 * 2886 * @param dev 2887 * Pointer to Ethernet device. 2888 * @param filter_op 2889 * Operation to perform. 2890 * @param arg 2891 * Pointer to operation-specific structure. 2892 * 2893 * @return 2894 * 0 on success, a negative errno value otherwise and rte_errno is set. 2895 */ 2896 static int 2897 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op, 2898 void *arg) 2899 { 2900 enum rte_fdir_mode fdir_mode = 2901 dev->data->dev_conf.fdir_conf.mode; 2902 2903 if (filter_op == RTE_ETH_FILTER_NOP) 2904 return 0; 2905 if (fdir_mode != RTE_FDIR_MODE_PERFECT && 2906 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) { 2907 DRV_LOG(ERR, "port %u flow director mode %d not supported", 2908 dev->data->port_id, fdir_mode); 2909 rte_errno = EINVAL; 2910 return -rte_errno; 2911 } 2912 switch (filter_op) { 2913 case RTE_ETH_FILTER_ADD: 2914 return flow_fdir_filter_add(dev, arg); 2915 case RTE_ETH_FILTER_UPDATE: 2916 return flow_fdir_filter_update(dev, arg); 2917 case RTE_ETH_FILTER_DELETE: 2918 return flow_fdir_filter_delete(dev, arg); 2919 case RTE_ETH_FILTER_FLUSH: 2920 flow_fdir_filter_flush(dev); 2921 break; 2922 case RTE_ETH_FILTER_INFO: 2923 flow_fdir_info_get(dev, arg); 2924 break; 2925 default: 2926 DRV_LOG(DEBUG, "port %u unknown operation %u", 2927 dev->data->port_id, filter_op); 2928 rte_errno = EINVAL; 2929 return -rte_errno; 2930 } 2931 return 0; 2932 } 2933 2934 /** 2935 * Manage filter operations. 2936 * 2937 * @param dev 2938 * Pointer to Ethernet device structure. 2939 * @param filter_type 2940 * Filter type. 2941 * @param filter_op 2942 * Operation to perform. 2943 * @param arg 2944 * Pointer to operation-specific structure. 2945 * 2946 * @return 2947 * 0 on success, a negative errno value otherwise and rte_errno is set. 2948 */ 2949 int 2950 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 2951 enum rte_filter_type filter_type, 2952 enum rte_filter_op filter_op, 2953 void *arg) 2954 { 2955 switch (filter_type) { 2956 case RTE_ETH_FILTER_GENERIC: 2957 if (filter_op != RTE_ETH_FILTER_GET) { 2958 rte_errno = EINVAL; 2959 return -rte_errno; 2960 } 2961 *(const void **)arg = &mlx5_flow_ops; 2962 return 0; 2963 case RTE_ETH_FILTER_FDIR: 2964 return flow_fdir_ctrl_func(dev, filter_op, arg); 2965 default: 2966 DRV_LOG(ERR, "port %u filter type (%d) not supported", 2967 dev->data->port_id, filter_type); 2968 rte_errno = ENOTSUP; 2969 return -rte_errno; 2970 } 2971 return 0; 2972 } 2973