1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 12 /* Verbs header. */ 13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 14 #ifdef PEDANTIC 15 #pragma GCC diagnostic ignored "-Wpedantic" 16 #endif 17 #include <infiniband/verbs.h> 18 #ifdef PEDANTIC 19 #pragma GCC diagnostic error "-Wpedantic" 20 #endif 21 22 #include <rte_common.h> 23 #include <rte_ether.h> 24 #include <rte_ethdev_driver.h> 25 #include <rte_flow.h> 26 #include <rte_flow_driver.h> 27 #include <rte_malloc.h> 28 #include <rte_ip.h> 29 30 #include "mlx5.h" 31 #include "mlx5_defs.h" 32 #include "mlx5_flow.h" 33 #include "mlx5_glue.h" 34 #include "mlx5_prm.h" 35 #include "mlx5_rxtx.h" 36 37 /* Dev ops structure defined in mlx5.c */ 38 extern const struct eth_dev_ops mlx5_dev_ops; 39 extern const struct eth_dev_ops mlx5_dev_ops_isolate; 40 41 /** Device flow drivers. */ 42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops; 44 #endif 45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 46 47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 48 49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 50 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 52 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 53 #endif 54 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 55 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 56 }; 57 58 enum mlx5_expansion { 59 MLX5_EXPANSION_ROOT, 60 MLX5_EXPANSION_ROOT_OUTER, 61 MLX5_EXPANSION_ROOT_ETH_VLAN, 62 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 63 MLX5_EXPANSION_OUTER_ETH, 64 MLX5_EXPANSION_OUTER_ETH_VLAN, 65 MLX5_EXPANSION_OUTER_VLAN, 66 MLX5_EXPANSION_OUTER_IPV4, 67 MLX5_EXPANSION_OUTER_IPV4_UDP, 68 MLX5_EXPANSION_OUTER_IPV4_TCP, 69 MLX5_EXPANSION_OUTER_IPV6, 70 MLX5_EXPANSION_OUTER_IPV6_UDP, 71 MLX5_EXPANSION_OUTER_IPV6_TCP, 72 MLX5_EXPANSION_VXLAN, 73 MLX5_EXPANSION_VXLAN_GPE, 74 MLX5_EXPANSION_GRE, 75 MLX5_EXPANSION_MPLS, 76 MLX5_EXPANSION_ETH, 77 MLX5_EXPANSION_ETH_VLAN, 78 MLX5_EXPANSION_VLAN, 79 MLX5_EXPANSION_IPV4, 80 MLX5_EXPANSION_IPV4_UDP, 81 MLX5_EXPANSION_IPV4_TCP, 82 MLX5_EXPANSION_IPV6, 83 MLX5_EXPANSION_IPV6_UDP, 84 MLX5_EXPANSION_IPV6_TCP, 85 }; 86 87 /** Supported expansion of items. */ 88 static const struct rte_flow_expand_node mlx5_support_expansion[] = { 89 [MLX5_EXPANSION_ROOT] = { 90 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 91 MLX5_EXPANSION_IPV4, 92 MLX5_EXPANSION_IPV6), 93 .type = RTE_FLOW_ITEM_TYPE_END, 94 }, 95 [MLX5_EXPANSION_ROOT_OUTER] = { 96 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 97 MLX5_EXPANSION_OUTER_IPV4, 98 MLX5_EXPANSION_OUTER_IPV6), 99 .type = RTE_FLOW_ITEM_TYPE_END, 100 }, 101 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 102 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 103 .type = RTE_FLOW_ITEM_TYPE_END, 104 }, 105 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN), 107 .type = RTE_FLOW_ITEM_TYPE_END, 108 }, 109 [MLX5_EXPANSION_OUTER_ETH] = { 110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 111 MLX5_EXPANSION_OUTER_IPV6, 112 MLX5_EXPANSION_MPLS), 113 .type = RTE_FLOW_ITEM_TYPE_ETH, 114 .rss_types = 0, 115 }, 116 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 117 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 118 .type = RTE_FLOW_ITEM_TYPE_ETH, 119 .rss_types = 0, 120 }, 121 [MLX5_EXPANSION_OUTER_VLAN] = { 122 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 123 MLX5_EXPANSION_OUTER_IPV6), 124 .type = RTE_FLOW_ITEM_TYPE_VLAN, 125 }, 126 [MLX5_EXPANSION_OUTER_IPV4] = { 127 .next = RTE_FLOW_EXPAND_RSS_NEXT 128 (MLX5_EXPANSION_OUTER_IPV4_UDP, 129 MLX5_EXPANSION_OUTER_IPV4_TCP, 130 MLX5_EXPANSION_GRE), 131 .type = RTE_FLOW_ITEM_TYPE_IPV4, 132 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 133 ETH_RSS_NONFRAG_IPV4_OTHER, 134 }, 135 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 136 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 137 MLX5_EXPANSION_VXLAN_GPE), 138 .type = RTE_FLOW_ITEM_TYPE_UDP, 139 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 140 }, 141 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 142 .type = RTE_FLOW_ITEM_TYPE_TCP, 143 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 144 }, 145 [MLX5_EXPANSION_OUTER_IPV6] = { 146 .next = RTE_FLOW_EXPAND_RSS_NEXT 147 (MLX5_EXPANSION_OUTER_IPV6_UDP, 148 MLX5_EXPANSION_OUTER_IPV6_TCP), 149 .type = RTE_FLOW_ITEM_TYPE_IPV6, 150 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 151 ETH_RSS_NONFRAG_IPV6_OTHER, 152 }, 153 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 154 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 155 MLX5_EXPANSION_VXLAN_GPE), 156 .type = RTE_FLOW_ITEM_TYPE_UDP, 157 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 158 }, 159 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 160 .type = RTE_FLOW_ITEM_TYPE_TCP, 161 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 162 }, 163 [MLX5_EXPANSION_VXLAN] = { 164 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 165 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 166 }, 167 [MLX5_EXPANSION_VXLAN_GPE] = { 168 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 169 MLX5_EXPANSION_IPV4, 170 MLX5_EXPANSION_IPV6), 171 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 172 }, 173 [MLX5_EXPANSION_GRE] = { 174 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 175 .type = RTE_FLOW_ITEM_TYPE_GRE, 176 }, 177 [MLX5_EXPANSION_MPLS] = { 178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 179 MLX5_EXPANSION_IPV6), 180 .type = RTE_FLOW_ITEM_TYPE_MPLS, 181 }, 182 [MLX5_EXPANSION_ETH] = { 183 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 184 MLX5_EXPANSION_IPV6), 185 .type = RTE_FLOW_ITEM_TYPE_ETH, 186 }, 187 [MLX5_EXPANSION_ETH_VLAN] = { 188 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 189 .type = RTE_FLOW_ITEM_TYPE_ETH, 190 }, 191 [MLX5_EXPANSION_VLAN] = { 192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 193 MLX5_EXPANSION_IPV6), 194 .type = RTE_FLOW_ITEM_TYPE_VLAN, 195 }, 196 [MLX5_EXPANSION_IPV4] = { 197 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 198 MLX5_EXPANSION_IPV4_TCP), 199 .type = RTE_FLOW_ITEM_TYPE_IPV4, 200 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 201 ETH_RSS_NONFRAG_IPV4_OTHER, 202 }, 203 [MLX5_EXPANSION_IPV4_UDP] = { 204 .type = RTE_FLOW_ITEM_TYPE_UDP, 205 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 206 }, 207 [MLX5_EXPANSION_IPV4_TCP] = { 208 .type = RTE_FLOW_ITEM_TYPE_TCP, 209 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 210 }, 211 [MLX5_EXPANSION_IPV6] = { 212 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 213 MLX5_EXPANSION_IPV6_TCP), 214 .type = RTE_FLOW_ITEM_TYPE_IPV6, 215 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 216 ETH_RSS_NONFRAG_IPV6_OTHER, 217 }, 218 [MLX5_EXPANSION_IPV6_UDP] = { 219 .type = RTE_FLOW_ITEM_TYPE_UDP, 220 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 221 }, 222 [MLX5_EXPANSION_IPV6_TCP] = { 223 .type = RTE_FLOW_ITEM_TYPE_TCP, 224 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 225 }, 226 }; 227 228 static const struct rte_flow_ops mlx5_flow_ops = { 229 .validate = mlx5_flow_validate, 230 .create = mlx5_flow_create, 231 .destroy = mlx5_flow_destroy, 232 .flush = mlx5_flow_flush, 233 .isolate = mlx5_flow_isolate, 234 .query = mlx5_flow_query, 235 }; 236 237 /* Convert FDIR request to Generic flow. */ 238 struct mlx5_fdir { 239 struct rte_flow_attr attr; 240 struct rte_flow_item items[4]; 241 struct rte_flow_item_eth l2; 242 struct rte_flow_item_eth l2_mask; 243 union { 244 struct rte_flow_item_ipv4 ipv4; 245 struct rte_flow_item_ipv6 ipv6; 246 } l3; 247 union { 248 struct rte_flow_item_ipv4 ipv4; 249 struct rte_flow_item_ipv6 ipv6; 250 } l3_mask; 251 union { 252 struct rte_flow_item_udp udp; 253 struct rte_flow_item_tcp tcp; 254 } l4; 255 union { 256 struct rte_flow_item_udp udp; 257 struct rte_flow_item_tcp tcp; 258 } l4_mask; 259 struct rte_flow_action actions[2]; 260 struct rte_flow_action_queue queue; 261 }; 262 263 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 264 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 265 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 266 }; 267 268 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 269 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 270 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 271 { 9, 10, 11 }, { 12, 13, 14 }, 272 }; 273 274 /* Tunnel information. */ 275 struct mlx5_flow_tunnel_info { 276 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 277 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 278 }; 279 280 static struct mlx5_flow_tunnel_info tunnels_info[] = { 281 { 282 .tunnel = MLX5_FLOW_LAYER_VXLAN, 283 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 284 }, 285 { 286 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 287 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 288 }, 289 { 290 .tunnel = MLX5_FLOW_LAYER_GRE, 291 .ptype = RTE_PTYPE_TUNNEL_GRE, 292 }, 293 { 294 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 295 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 296 }, 297 { 298 .tunnel = MLX5_FLOW_LAYER_MPLS, 299 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 300 }, 301 }; 302 303 /** 304 * Discover the maximum number of priority available. 305 * 306 * @param[in] dev 307 * Pointer to the Ethernet device structure. 308 * 309 * @return 310 * number of supported flow priority on success, a negative errno 311 * value otherwise and rte_errno is set. 312 */ 313 int 314 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 315 { 316 struct mlx5_priv *priv = dev->data->dev_private; 317 struct { 318 struct ibv_flow_attr attr; 319 struct ibv_flow_spec_eth eth; 320 struct ibv_flow_spec_action_drop drop; 321 } flow_attr = { 322 .attr = { 323 .num_of_specs = 2, 324 .port = (uint8_t)priv->ibv_port, 325 }, 326 .eth = { 327 .type = IBV_FLOW_SPEC_ETH, 328 .size = sizeof(struct ibv_flow_spec_eth), 329 }, 330 .drop = { 331 .size = sizeof(struct ibv_flow_spec_action_drop), 332 .type = IBV_FLOW_SPEC_ACTION_DROP, 333 }, 334 }; 335 struct ibv_flow *flow; 336 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev); 337 uint16_t vprio[] = { 8, 16 }; 338 int i; 339 int priority = 0; 340 341 if (!drop) { 342 rte_errno = ENOTSUP; 343 return -rte_errno; 344 } 345 for (i = 0; i != RTE_DIM(vprio); i++) { 346 flow_attr.attr.priority = vprio[i] - 1; 347 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr); 348 if (!flow) 349 break; 350 claim_zero(mlx5_glue->destroy_flow(flow)); 351 priority = vprio[i]; 352 } 353 mlx5_hrxq_drop_release(dev); 354 switch (priority) { 355 case 8: 356 priority = RTE_DIM(priority_map_3); 357 break; 358 case 16: 359 priority = RTE_DIM(priority_map_5); 360 break; 361 default: 362 rte_errno = ENOTSUP; 363 DRV_LOG(ERR, 364 "port %u verbs maximum priority: %d expected 8/16", 365 dev->data->port_id, priority); 366 return -rte_errno; 367 } 368 DRV_LOG(INFO, "port %u flow maximum priority: %d", 369 dev->data->port_id, priority); 370 return priority; 371 } 372 373 /** 374 * Adjust flow priority based on the highest layer and the request priority. 375 * 376 * @param[in] dev 377 * Pointer to the Ethernet device structure. 378 * @param[in] priority 379 * The rule base priority. 380 * @param[in] subpriority 381 * The priority based on the items. 382 * 383 * @return 384 * The new priority. 385 */ 386 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 387 uint32_t subpriority) 388 { 389 uint32_t res = 0; 390 struct mlx5_priv *priv = dev->data->dev_private; 391 392 switch (priv->config.flow_prio) { 393 case RTE_DIM(priority_map_3): 394 res = priority_map_3[priority][subpriority]; 395 break; 396 case RTE_DIM(priority_map_5): 397 res = priority_map_5[priority][subpriority]; 398 break; 399 } 400 return res; 401 } 402 403 /** 404 * Verify the @p item specifications (spec, last, mask) are compatible with the 405 * NIC capabilities. 406 * 407 * @param[in] item 408 * Item specification. 409 * @param[in] mask 410 * @p item->mask or flow default bit-masks. 411 * @param[in] nic_mask 412 * Bit-masks covering supported fields by the NIC to compare with user mask. 413 * @param[in] size 414 * Bit-masks size in bytes. 415 * @param[out] error 416 * Pointer to error structure. 417 * 418 * @return 419 * 0 on success, a negative errno value otherwise and rte_errno is set. 420 */ 421 int 422 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 423 const uint8_t *mask, 424 const uint8_t *nic_mask, 425 unsigned int size, 426 struct rte_flow_error *error) 427 { 428 unsigned int i; 429 430 assert(nic_mask); 431 for (i = 0; i < size; ++i) 432 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 433 return rte_flow_error_set(error, ENOTSUP, 434 RTE_FLOW_ERROR_TYPE_ITEM, 435 item, 436 "mask enables non supported" 437 " bits"); 438 if (!item->spec && (item->mask || item->last)) 439 return rte_flow_error_set(error, EINVAL, 440 RTE_FLOW_ERROR_TYPE_ITEM, item, 441 "mask/last without a spec is not" 442 " supported"); 443 if (item->spec && item->last) { 444 uint8_t spec[size]; 445 uint8_t last[size]; 446 unsigned int i; 447 int ret; 448 449 for (i = 0; i < size; ++i) { 450 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 451 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 452 } 453 ret = memcmp(spec, last, size); 454 if (ret != 0) 455 return rte_flow_error_set(error, EINVAL, 456 RTE_FLOW_ERROR_TYPE_ITEM, 457 item, 458 "range is not valid"); 459 } 460 return 0; 461 } 462 463 /** 464 * Adjust the hash fields according to the @p flow information. 465 * 466 * @param[in] dev_flow. 467 * Pointer to the mlx5_flow. 468 * @param[in] tunnel 469 * 1 when the hash field is for a tunnel item. 470 * @param[in] layer_types 471 * ETH_RSS_* types. 472 * @param[in] hash_fields 473 * Item hash fields. 474 * 475 * @return 476 * The hash fileds that should be used. 477 */ 478 uint64_t 479 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, 480 int tunnel __rte_unused, uint64_t layer_types, 481 uint64_t hash_fields) 482 { 483 struct rte_flow *flow = dev_flow->flow; 484 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 485 int rss_request_inner = flow->rss.level >= 2; 486 487 /* Check RSS hash level for tunnel. */ 488 if (tunnel && rss_request_inner) 489 hash_fields |= IBV_RX_HASH_INNER; 490 else if (tunnel || rss_request_inner) 491 return 0; 492 #endif 493 /* Check if requested layer matches RSS hash fields. */ 494 if (!(flow->rss.types & layer_types)) 495 return 0; 496 return hash_fields; 497 } 498 499 /** 500 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 501 * if several tunnel rules are used on this queue, the tunnel ptype will be 502 * cleared. 503 * 504 * @param rxq_ctrl 505 * Rx queue to update. 506 */ 507 static void 508 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 509 { 510 unsigned int i; 511 uint32_t tunnel_ptype = 0; 512 513 /* Look up for the ptype to use. */ 514 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 515 if (!rxq_ctrl->flow_tunnels_n[i]) 516 continue; 517 if (!tunnel_ptype) { 518 tunnel_ptype = tunnels_info[i].ptype; 519 } else { 520 tunnel_ptype = 0; 521 break; 522 } 523 } 524 rxq_ctrl->rxq.tunnel = tunnel_ptype; 525 } 526 527 /** 528 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 529 * flow. 530 * 531 * @param[in] dev 532 * Pointer to the Ethernet device structure. 533 * @param[in] dev_flow 534 * Pointer to device flow structure. 535 */ 536 static void 537 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 538 { 539 struct mlx5_priv *priv = dev->data->dev_private; 540 struct rte_flow *flow = dev_flow->flow; 541 const int mark = !!(flow->actions & 542 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 543 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 544 unsigned int i; 545 546 for (i = 0; i != flow->rss.queue_num; ++i) { 547 int idx = (*flow->queue)[i]; 548 struct mlx5_rxq_ctrl *rxq_ctrl = 549 container_of((*priv->rxqs)[idx], 550 struct mlx5_rxq_ctrl, rxq); 551 552 if (mark) { 553 rxq_ctrl->rxq.mark = 1; 554 rxq_ctrl->flow_mark_n++; 555 } 556 if (tunnel) { 557 unsigned int j; 558 559 /* Increase the counter matching the flow. */ 560 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 561 if ((tunnels_info[j].tunnel & 562 dev_flow->layers) == 563 tunnels_info[j].tunnel) { 564 rxq_ctrl->flow_tunnels_n[j]++; 565 break; 566 } 567 } 568 flow_rxq_tunnel_ptype_update(rxq_ctrl); 569 } 570 } 571 } 572 573 /** 574 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 575 * 576 * @param[in] dev 577 * Pointer to the Ethernet device structure. 578 * @param[in] flow 579 * Pointer to flow structure. 580 */ 581 static void 582 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 583 { 584 struct mlx5_flow *dev_flow; 585 586 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 587 flow_drv_rxq_flags_set(dev, dev_flow); 588 } 589 590 /** 591 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 592 * device flow if no other flow uses it with the same kind of request. 593 * 594 * @param dev 595 * Pointer to Ethernet device. 596 * @param[in] dev_flow 597 * Pointer to the device flow. 598 */ 599 static void 600 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 601 { 602 struct mlx5_priv *priv = dev->data->dev_private; 603 struct rte_flow *flow = dev_flow->flow; 604 const int mark = !!(flow->actions & 605 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 606 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 607 unsigned int i; 608 609 assert(dev->data->dev_started); 610 for (i = 0; i != flow->rss.queue_num; ++i) { 611 int idx = (*flow->queue)[i]; 612 struct mlx5_rxq_ctrl *rxq_ctrl = 613 container_of((*priv->rxqs)[idx], 614 struct mlx5_rxq_ctrl, rxq); 615 616 if (mark) { 617 rxq_ctrl->flow_mark_n--; 618 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 619 } 620 if (tunnel) { 621 unsigned int j; 622 623 /* Decrease the counter matching the flow. */ 624 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 625 if ((tunnels_info[j].tunnel & 626 dev_flow->layers) == 627 tunnels_info[j].tunnel) { 628 rxq_ctrl->flow_tunnels_n[j]--; 629 break; 630 } 631 } 632 flow_rxq_tunnel_ptype_update(rxq_ctrl); 633 } 634 } 635 } 636 637 /** 638 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 639 * @p flow if no other flow uses it with the same kind of request. 640 * 641 * @param dev 642 * Pointer to Ethernet device. 643 * @param[in] flow 644 * Pointer to the flow. 645 */ 646 static void 647 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 648 { 649 struct mlx5_flow *dev_flow; 650 651 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 652 flow_drv_rxq_flags_trim(dev, dev_flow); 653 } 654 655 /** 656 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 657 * 658 * @param dev 659 * Pointer to Ethernet device. 660 */ 661 static void 662 flow_rxq_flags_clear(struct rte_eth_dev *dev) 663 { 664 struct mlx5_priv *priv = dev->data->dev_private; 665 unsigned int i; 666 667 for (i = 0; i != priv->rxqs_n; ++i) { 668 struct mlx5_rxq_ctrl *rxq_ctrl; 669 unsigned int j; 670 671 if (!(*priv->rxqs)[i]) 672 continue; 673 rxq_ctrl = container_of((*priv->rxqs)[i], 674 struct mlx5_rxq_ctrl, rxq); 675 rxq_ctrl->flow_mark_n = 0; 676 rxq_ctrl->rxq.mark = 0; 677 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 678 rxq_ctrl->flow_tunnels_n[j] = 0; 679 rxq_ctrl->rxq.tunnel = 0; 680 } 681 } 682 683 /* 684 * Validate the flag action. 685 * 686 * @param[in] action_flags 687 * Bit-fields that holds the actions detected until now. 688 * @param[in] attr 689 * Attributes of flow that includes this action. 690 * @param[out] error 691 * Pointer to error structure. 692 * 693 * @return 694 * 0 on success, a negative errno value otherwise and rte_errno is set. 695 */ 696 int 697 mlx5_flow_validate_action_flag(uint64_t action_flags, 698 const struct rte_flow_attr *attr, 699 struct rte_flow_error *error) 700 { 701 702 if (action_flags & MLX5_FLOW_ACTION_DROP) 703 return rte_flow_error_set(error, EINVAL, 704 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 705 "can't drop and flag in same flow"); 706 if (action_flags & MLX5_FLOW_ACTION_MARK) 707 return rte_flow_error_set(error, EINVAL, 708 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 709 "can't mark and flag in same flow"); 710 if (action_flags & MLX5_FLOW_ACTION_FLAG) 711 return rte_flow_error_set(error, EINVAL, 712 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 713 "can't have 2 flag" 714 " actions in same flow"); 715 if (attr->egress) 716 return rte_flow_error_set(error, ENOTSUP, 717 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 718 "flag action not supported for " 719 "egress"); 720 return 0; 721 } 722 723 /* 724 * Validate the mark action. 725 * 726 * @param[in] action 727 * Pointer to the queue action. 728 * @param[in] action_flags 729 * Bit-fields that holds the actions detected until now. 730 * @param[in] attr 731 * Attributes of flow that includes this action. 732 * @param[out] error 733 * Pointer to error structure. 734 * 735 * @return 736 * 0 on success, a negative errno value otherwise and rte_errno is set. 737 */ 738 int 739 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 740 uint64_t action_flags, 741 const struct rte_flow_attr *attr, 742 struct rte_flow_error *error) 743 { 744 const struct rte_flow_action_mark *mark = action->conf; 745 746 if (!mark) 747 return rte_flow_error_set(error, EINVAL, 748 RTE_FLOW_ERROR_TYPE_ACTION, 749 action, 750 "configuration cannot be null"); 751 if (mark->id >= MLX5_FLOW_MARK_MAX) 752 return rte_flow_error_set(error, EINVAL, 753 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 754 &mark->id, 755 "mark id must in 0 <= id < " 756 RTE_STR(MLX5_FLOW_MARK_MAX)); 757 if (action_flags & MLX5_FLOW_ACTION_DROP) 758 return rte_flow_error_set(error, EINVAL, 759 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 760 "can't drop and mark in same flow"); 761 if (action_flags & MLX5_FLOW_ACTION_FLAG) 762 return rte_flow_error_set(error, EINVAL, 763 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 764 "can't flag and mark in same flow"); 765 if (action_flags & MLX5_FLOW_ACTION_MARK) 766 return rte_flow_error_set(error, EINVAL, 767 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 768 "can't have 2 mark actions in same" 769 " flow"); 770 if (attr->egress) 771 return rte_flow_error_set(error, ENOTSUP, 772 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 773 "mark action not supported for " 774 "egress"); 775 return 0; 776 } 777 778 /* 779 * Validate the drop action. 780 * 781 * @param[in] action_flags 782 * Bit-fields that holds the actions detected until now. 783 * @param[in] attr 784 * Attributes of flow that includes this action. 785 * @param[out] error 786 * Pointer to error structure. 787 * 788 * @return 789 * 0 on success, a negative errno value otherwise and rte_errno is set. 790 */ 791 int 792 mlx5_flow_validate_action_drop(uint64_t action_flags, 793 const struct rte_flow_attr *attr, 794 struct rte_flow_error *error) 795 { 796 if (action_flags & MLX5_FLOW_ACTION_FLAG) 797 return rte_flow_error_set(error, EINVAL, 798 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 799 "can't drop and flag in same flow"); 800 if (action_flags & MLX5_FLOW_ACTION_MARK) 801 return rte_flow_error_set(error, EINVAL, 802 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 803 "can't drop and mark in same flow"); 804 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 805 return rte_flow_error_set(error, EINVAL, 806 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 807 "can't have 2 fate actions in" 808 " same flow"); 809 if (attr->egress) 810 return rte_flow_error_set(error, ENOTSUP, 811 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 812 "drop action not supported for " 813 "egress"); 814 return 0; 815 } 816 817 /* 818 * Validate the queue action. 819 * 820 * @param[in] action 821 * Pointer to the queue action. 822 * @param[in] action_flags 823 * Bit-fields that holds the actions detected until now. 824 * @param[in] dev 825 * Pointer to the Ethernet device structure. 826 * @param[in] attr 827 * Attributes of flow that includes this action. 828 * @param[out] error 829 * Pointer to error structure. 830 * 831 * @return 832 * 0 on success, a negative errno value otherwise and rte_errno is set. 833 */ 834 int 835 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 836 uint64_t action_flags, 837 struct rte_eth_dev *dev, 838 const struct rte_flow_attr *attr, 839 struct rte_flow_error *error) 840 { 841 struct mlx5_priv *priv = dev->data->dev_private; 842 const struct rte_flow_action_queue *queue = action->conf; 843 844 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 845 return rte_flow_error_set(error, EINVAL, 846 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 847 "can't have 2 fate actions in" 848 " same flow"); 849 if (!priv->rxqs_n) 850 return rte_flow_error_set(error, EINVAL, 851 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 852 NULL, "No Rx queues configured"); 853 if (queue->index >= priv->rxqs_n) 854 return rte_flow_error_set(error, EINVAL, 855 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 856 &queue->index, 857 "queue index out of range"); 858 if (!(*priv->rxqs)[queue->index]) 859 return rte_flow_error_set(error, EINVAL, 860 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 861 &queue->index, 862 "queue is not configured"); 863 if (attr->egress) 864 return rte_flow_error_set(error, ENOTSUP, 865 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 866 "queue action not supported for " 867 "egress"); 868 return 0; 869 } 870 871 /* 872 * Validate the rss action. 873 * 874 * @param[in] action 875 * Pointer to the queue action. 876 * @param[in] action_flags 877 * Bit-fields that holds the actions detected until now. 878 * @param[in] dev 879 * Pointer to the Ethernet device structure. 880 * @param[in] attr 881 * Attributes of flow that includes this action. 882 * @param[in] item_flags 883 * Items that were detected. 884 * @param[out] error 885 * Pointer to error structure. 886 * 887 * @return 888 * 0 on success, a negative errno value otherwise and rte_errno is set. 889 */ 890 int 891 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 892 uint64_t action_flags, 893 struct rte_eth_dev *dev, 894 const struct rte_flow_attr *attr, 895 uint64_t item_flags, 896 struct rte_flow_error *error) 897 { 898 struct mlx5_priv *priv = dev->data->dev_private; 899 const struct rte_flow_action_rss *rss = action->conf; 900 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 901 unsigned int i; 902 903 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 904 return rte_flow_error_set(error, EINVAL, 905 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 906 "can't have 2 fate actions" 907 " in same flow"); 908 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 909 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 910 return rte_flow_error_set(error, ENOTSUP, 911 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 912 &rss->func, 913 "RSS hash function not supported"); 914 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 915 if (rss->level > 2) 916 #else 917 if (rss->level > 1) 918 #endif 919 return rte_flow_error_set(error, ENOTSUP, 920 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 921 &rss->level, 922 "tunnel RSS is not supported"); 923 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 924 if (rss->key_len == 0 && rss->key != NULL) 925 return rte_flow_error_set(error, ENOTSUP, 926 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 927 &rss->key_len, 928 "RSS hash key length 0"); 929 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 930 return rte_flow_error_set(error, ENOTSUP, 931 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 932 &rss->key_len, 933 "RSS hash key too small"); 934 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 935 return rte_flow_error_set(error, ENOTSUP, 936 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 937 &rss->key_len, 938 "RSS hash key too large"); 939 if (rss->queue_num > priv->config.ind_table_max_size) 940 return rte_flow_error_set(error, ENOTSUP, 941 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 942 &rss->queue_num, 943 "number of queues too large"); 944 if (rss->types & MLX5_RSS_HF_MASK) 945 return rte_flow_error_set(error, ENOTSUP, 946 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 947 &rss->types, 948 "some RSS protocols are not" 949 " supported"); 950 if (!priv->rxqs_n) 951 return rte_flow_error_set(error, EINVAL, 952 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 953 NULL, "No Rx queues configured"); 954 if (!rss->queue_num) 955 return rte_flow_error_set(error, EINVAL, 956 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 957 NULL, "No queues configured"); 958 for (i = 0; i != rss->queue_num; ++i) { 959 if (!(*priv->rxqs)[rss->queue[i]]) 960 return rte_flow_error_set 961 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 962 &rss->queue[i], "queue is not configured"); 963 } 964 if (attr->egress) 965 return rte_flow_error_set(error, ENOTSUP, 966 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 967 "rss action not supported for " 968 "egress"); 969 if (rss->level > 1 && !tunnel) 970 return rte_flow_error_set(error, EINVAL, 971 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 972 "inner RSS is not supported for " 973 "non-tunnel flows"); 974 return 0; 975 } 976 977 /* 978 * Validate the count action. 979 * 980 * @param[in] dev 981 * Pointer to the Ethernet device structure. 982 * @param[in] attr 983 * Attributes of flow that includes this action. 984 * @param[out] error 985 * Pointer to error structure. 986 * 987 * @return 988 * 0 on success, a negative errno value otherwise and rte_errno is set. 989 */ 990 int 991 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 992 const struct rte_flow_attr *attr, 993 struct rte_flow_error *error) 994 { 995 if (attr->egress) 996 return rte_flow_error_set(error, ENOTSUP, 997 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 998 "count action not supported for " 999 "egress"); 1000 return 0; 1001 } 1002 1003 /** 1004 * Verify the @p attributes will be correctly understood by the NIC and store 1005 * them in the @p flow if everything is correct. 1006 * 1007 * @param[in] dev 1008 * Pointer to the Ethernet device structure. 1009 * @param[in] attributes 1010 * Pointer to flow attributes 1011 * @param[out] error 1012 * Pointer to error structure. 1013 * 1014 * @return 1015 * 0 on success, a negative errno value otherwise and rte_errno is set. 1016 */ 1017 int 1018 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1019 const struct rte_flow_attr *attributes, 1020 struct rte_flow_error *error) 1021 { 1022 struct mlx5_priv *priv = dev->data->dev_private; 1023 uint32_t priority_max = priv->config.flow_prio - 1; 1024 1025 if (attributes->group) 1026 return rte_flow_error_set(error, ENOTSUP, 1027 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1028 NULL, "groups is not supported"); 1029 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 1030 attributes->priority >= priority_max) 1031 return rte_flow_error_set(error, ENOTSUP, 1032 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1033 NULL, "priority out of range"); 1034 if (attributes->egress) 1035 return rte_flow_error_set(error, ENOTSUP, 1036 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1037 "egress is not supported"); 1038 if (attributes->transfer && !priv->config.dv_esw_en) 1039 return rte_flow_error_set(error, ENOTSUP, 1040 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1041 NULL, "transfer is not supported"); 1042 if (!attributes->ingress) 1043 return rte_flow_error_set(error, EINVAL, 1044 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1045 NULL, 1046 "ingress attribute is mandatory"); 1047 return 0; 1048 } 1049 1050 /** 1051 * Validate ICMP6 item. 1052 * 1053 * @param[in] item 1054 * Item specification. 1055 * @param[in] item_flags 1056 * Bit-fields that holds the items detected until now. 1057 * @param[out] error 1058 * Pointer to error structure. 1059 * 1060 * @return 1061 * 0 on success, a negative errno value otherwise and rte_errno is set. 1062 */ 1063 int 1064 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1065 uint64_t item_flags, 1066 uint8_t target_protocol, 1067 struct rte_flow_error *error) 1068 { 1069 const struct rte_flow_item_icmp6 *mask = item->mask; 1070 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1071 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1072 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1073 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1074 MLX5_FLOW_LAYER_OUTER_L4; 1075 int ret; 1076 1077 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1078 return rte_flow_error_set(error, EINVAL, 1079 RTE_FLOW_ERROR_TYPE_ITEM, item, 1080 "protocol filtering not compatible" 1081 " with ICMP6 layer"); 1082 if (!(item_flags & l3m)) 1083 return rte_flow_error_set(error, EINVAL, 1084 RTE_FLOW_ERROR_TYPE_ITEM, item, 1085 "IPv6 is mandatory to filter on" 1086 " ICMP6"); 1087 if (item_flags & l4m) 1088 return rte_flow_error_set(error, EINVAL, 1089 RTE_FLOW_ERROR_TYPE_ITEM, item, 1090 "multiple L4 layers not supported"); 1091 if (!mask) 1092 mask = &rte_flow_item_icmp6_mask; 1093 ret = mlx5_flow_item_acceptable 1094 (item, (const uint8_t *)mask, 1095 (const uint8_t *)&rte_flow_item_icmp6_mask, 1096 sizeof(struct rte_flow_item_icmp6), error); 1097 if (ret < 0) 1098 return ret; 1099 return 0; 1100 } 1101 1102 /** 1103 * Validate ICMP item. 1104 * 1105 * @param[in] item 1106 * Item specification. 1107 * @param[in] item_flags 1108 * Bit-fields that holds the items detected until now. 1109 * @param[out] error 1110 * Pointer to error structure. 1111 * 1112 * @return 1113 * 0 on success, a negative errno value otherwise and rte_errno is set. 1114 */ 1115 int 1116 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1117 uint64_t item_flags, 1118 uint8_t target_protocol, 1119 struct rte_flow_error *error) 1120 { 1121 const struct rte_flow_item_icmp *mask = item->mask; 1122 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1123 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1124 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1125 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1126 MLX5_FLOW_LAYER_OUTER_L4; 1127 int ret; 1128 1129 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1130 return rte_flow_error_set(error, EINVAL, 1131 RTE_FLOW_ERROR_TYPE_ITEM, item, 1132 "protocol filtering not compatible" 1133 " with ICMP layer"); 1134 if (!(item_flags & l3m)) 1135 return rte_flow_error_set(error, EINVAL, 1136 RTE_FLOW_ERROR_TYPE_ITEM, item, 1137 "IPv4 is mandatory to filter" 1138 " on ICMP"); 1139 if (item_flags & l4m) 1140 return rte_flow_error_set(error, EINVAL, 1141 RTE_FLOW_ERROR_TYPE_ITEM, item, 1142 "multiple L4 layers not supported"); 1143 if (!mask) 1144 mask = &rte_flow_item_icmp_mask; 1145 ret = mlx5_flow_item_acceptable 1146 (item, (const uint8_t *)mask, 1147 (const uint8_t *)&rte_flow_item_icmp_mask, 1148 sizeof(struct rte_flow_item_icmp), error); 1149 if (ret < 0) 1150 return ret; 1151 return 0; 1152 } 1153 1154 /** 1155 * Validate Ethernet item. 1156 * 1157 * @param[in] item 1158 * Item specification. 1159 * @param[in] item_flags 1160 * Bit-fields that holds the items detected until now. 1161 * @param[out] error 1162 * Pointer to error structure. 1163 * 1164 * @return 1165 * 0 on success, a negative errno value otherwise and rte_errno is set. 1166 */ 1167 int 1168 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1169 uint64_t item_flags, 1170 struct rte_flow_error *error) 1171 { 1172 const struct rte_flow_item_eth *mask = item->mask; 1173 const struct rte_flow_item_eth nic_mask = { 1174 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1175 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1176 .type = RTE_BE16(0xffff), 1177 }; 1178 int ret; 1179 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1180 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1181 MLX5_FLOW_LAYER_OUTER_L2; 1182 1183 if (item_flags & ethm) 1184 return rte_flow_error_set(error, ENOTSUP, 1185 RTE_FLOW_ERROR_TYPE_ITEM, item, 1186 "multiple L2 layers not supported"); 1187 if (!mask) 1188 mask = &rte_flow_item_eth_mask; 1189 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1190 (const uint8_t *)&nic_mask, 1191 sizeof(struct rte_flow_item_eth), 1192 error); 1193 return ret; 1194 } 1195 1196 /** 1197 * Validate VLAN item. 1198 * 1199 * @param[in] item 1200 * Item specification. 1201 * @param[in] item_flags 1202 * Bit-fields that holds the items detected until now. 1203 * @param[out] error 1204 * Pointer to error structure. 1205 * 1206 * @return 1207 * 0 on success, a negative errno value otherwise and rte_errno is set. 1208 */ 1209 int 1210 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1211 uint64_t item_flags, 1212 struct rte_flow_error *error) 1213 { 1214 const struct rte_flow_item_vlan *spec = item->spec; 1215 const struct rte_flow_item_vlan *mask = item->mask; 1216 const struct rte_flow_item_vlan nic_mask = { 1217 .tci = RTE_BE16(0x0fff), 1218 .inner_type = RTE_BE16(0xffff), 1219 }; 1220 uint16_t vlan_tag = 0; 1221 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1222 int ret; 1223 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1224 MLX5_FLOW_LAYER_INNER_L4) : 1225 (MLX5_FLOW_LAYER_OUTER_L3 | 1226 MLX5_FLOW_LAYER_OUTER_L4); 1227 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1228 MLX5_FLOW_LAYER_OUTER_VLAN; 1229 1230 if (item_flags & vlanm) 1231 return rte_flow_error_set(error, EINVAL, 1232 RTE_FLOW_ERROR_TYPE_ITEM, item, 1233 "multiple VLAN layers not supported"); 1234 else if ((item_flags & l34m) != 0) 1235 return rte_flow_error_set(error, EINVAL, 1236 RTE_FLOW_ERROR_TYPE_ITEM, item, 1237 "L2 layer cannot follow L3/L4 layer"); 1238 if (!mask) 1239 mask = &rte_flow_item_vlan_mask; 1240 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1241 (const uint8_t *)&nic_mask, 1242 sizeof(struct rte_flow_item_vlan), 1243 error); 1244 if (ret) 1245 return ret; 1246 if (spec) { 1247 vlan_tag = spec->tci; 1248 vlan_tag &= mask->tci; 1249 } 1250 /* 1251 * From verbs perspective an empty VLAN is equivalent 1252 * to a packet without VLAN layer. 1253 */ 1254 if (!vlan_tag) 1255 return rte_flow_error_set(error, EINVAL, 1256 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1257 item->spec, 1258 "VLAN cannot be empty"); 1259 return 0; 1260 } 1261 1262 /** 1263 * Validate IPV4 item. 1264 * 1265 * @param[in] item 1266 * Item specification. 1267 * @param[in] item_flags 1268 * Bit-fields that holds the items detected until now. 1269 * @param[in] acc_mask 1270 * Acceptable mask, if NULL default internal default mask 1271 * will be used to check whether item fields are supported. 1272 * @param[out] error 1273 * Pointer to error structure. 1274 * 1275 * @return 1276 * 0 on success, a negative errno value otherwise and rte_errno is set. 1277 */ 1278 int 1279 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 1280 uint64_t item_flags, 1281 const struct rte_flow_item_ipv4 *acc_mask, 1282 struct rte_flow_error *error) 1283 { 1284 const struct rte_flow_item_ipv4 *mask = item->mask; 1285 const struct rte_flow_item_ipv4 nic_mask = { 1286 .hdr = { 1287 .src_addr = RTE_BE32(0xffffffff), 1288 .dst_addr = RTE_BE32(0xffffffff), 1289 .type_of_service = 0xff, 1290 .next_proto_id = 0xff, 1291 }, 1292 }; 1293 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1294 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1295 MLX5_FLOW_LAYER_OUTER_L3; 1296 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1297 MLX5_FLOW_LAYER_OUTER_L4; 1298 int ret; 1299 1300 if (item_flags & l3m) 1301 return rte_flow_error_set(error, ENOTSUP, 1302 RTE_FLOW_ERROR_TYPE_ITEM, item, 1303 "multiple L3 layers not supported"); 1304 else if (item_flags & l4m) 1305 return rte_flow_error_set(error, EINVAL, 1306 RTE_FLOW_ERROR_TYPE_ITEM, item, 1307 "L3 cannot follow an L4 layer."); 1308 if (!mask) 1309 mask = &rte_flow_item_ipv4_mask; 1310 else if (mask->hdr.next_proto_id != 0 && 1311 mask->hdr.next_proto_id != 0xff) 1312 return rte_flow_error_set(error, EINVAL, 1313 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 1314 "partial mask is not supported" 1315 " for protocol"); 1316 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1317 acc_mask ? (const uint8_t *)acc_mask 1318 : (const uint8_t *)&nic_mask, 1319 sizeof(struct rte_flow_item_ipv4), 1320 error); 1321 if (ret < 0) 1322 return ret; 1323 return 0; 1324 } 1325 1326 /** 1327 * Validate IPV6 item. 1328 * 1329 * @param[in] item 1330 * Item specification. 1331 * @param[in] item_flags 1332 * Bit-fields that holds the items detected until now. 1333 * @param[in] acc_mask 1334 * Acceptable mask, if NULL default internal default mask 1335 * will be used to check whether item fields are supported. 1336 * @param[out] error 1337 * Pointer to error structure. 1338 * 1339 * @return 1340 * 0 on success, a negative errno value otherwise and rte_errno is set. 1341 */ 1342 int 1343 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 1344 uint64_t item_flags, 1345 const struct rte_flow_item_ipv6 *acc_mask, 1346 struct rte_flow_error *error) 1347 { 1348 const struct rte_flow_item_ipv6 *mask = item->mask; 1349 const struct rte_flow_item_ipv6 nic_mask = { 1350 .hdr = { 1351 .src_addr = 1352 "\xff\xff\xff\xff\xff\xff\xff\xff" 1353 "\xff\xff\xff\xff\xff\xff\xff\xff", 1354 .dst_addr = 1355 "\xff\xff\xff\xff\xff\xff\xff\xff" 1356 "\xff\xff\xff\xff\xff\xff\xff\xff", 1357 .vtc_flow = RTE_BE32(0xffffffff), 1358 .proto = 0xff, 1359 .hop_limits = 0xff, 1360 }, 1361 }; 1362 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1363 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1364 MLX5_FLOW_LAYER_OUTER_L3; 1365 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1366 MLX5_FLOW_LAYER_OUTER_L4; 1367 int ret; 1368 1369 if (item_flags & l3m) 1370 return rte_flow_error_set(error, ENOTSUP, 1371 RTE_FLOW_ERROR_TYPE_ITEM, item, 1372 "multiple L3 layers not supported"); 1373 else if (item_flags & l4m) 1374 return rte_flow_error_set(error, EINVAL, 1375 RTE_FLOW_ERROR_TYPE_ITEM, item, 1376 "L3 cannot follow an L4 layer."); 1377 if (!mask) 1378 mask = &rte_flow_item_ipv6_mask; 1379 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1380 acc_mask ? (const uint8_t *)acc_mask 1381 : (const uint8_t *)&nic_mask, 1382 sizeof(struct rte_flow_item_ipv6), 1383 error); 1384 if (ret < 0) 1385 return ret; 1386 return 0; 1387 } 1388 1389 /** 1390 * Validate UDP item. 1391 * 1392 * @param[in] item 1393 * Item specification. 1394 * @param[in] item_flags 1395 * Bit-fields that holds the items detected until now. 1396 * @param[in] target_protocol 1397 * The next protocol in the previous item. 1398 * @param[in] flow_mask 1399 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 1400 * @param[out] error 1401 * Pointer to error structure. 1402 * 1403 * @return 1404 * 0 on success, a negative errno value otherwise and rte_errno is set. 1405 */ 1406 int 1407 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 1408 uint64_t item_flags, 1409 uint8_t target_protocol, 1410 struct rte_flow_error *error) 1411 { 1412 const struct rte_flow_item_udp *mask = item->mask; 1413 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1414 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1415 MLX5_FLOW_LAYER_OUTER_L3; 1416 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1417 MLX5_FLOW_LAYER_OUTER_L4; 1418 int ret; 1419 1420 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 1421 return rte_flow_error_set(error, EINVAL, 1422 RTE_FLOW_ERROR_TYPE_ITEM, item, 1423 "protocol filtering not compatible" 1424 " with UDP layer"); 1425 if (!(item_flags & l3m)) 1426 return rte_flow_error_set(error, EINVAL, 1427 RTE_FLOW_ERROR_TYPE_ITEM, item, 1428 "L3 is mandatory to filter on L4"); 1429 if (item_flags & l4m) 1430 return rte_flow_error_set(error, EINVAL, 1431 RTE_FLOW_ERROR_TYPE_ITEM, item, 1432 "multiple L4 layers not supported"); 1433 if (!mask) 1434 mask = &rte_flow_item_udp_mask; 1435 ret = mlx5_flow_item_acceptable 1436 (item, (const uint8_t *)mask, 1437 (const uint8_t *)&rte_flow_item_udp_mask, 1438 sizeof(struct rte_flow_item_udp), error); 1439 if (ret < 0) 1440 return ret; 1441 return 0; 1442 } 1443 1444 /** 1445 * Validate TCP item. 1446 * 1447 * @param[in] item 1448 * Item specification. 1449 * @param[in] item_flags 1450 * Bit-fields that holds the items detected until now. 1451 * @param[in] target_protocol 1452 * The next protocol in the previous item. 1453 * @param[out] error 1454 * Pointer to error structure. 1455 * 1456 * @return 1457 * 0 on success, a negative errno value otherwise and rte_errno is set. 1458 */ 1459 int 1460 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 1461 uint64_t item_flags, 1462 uint8_t target_protocol, 1463 const struct rte_flow_item_tcp *flow_mask, 1464 struct rte_flow_error *error) 1465 { 1466 const struct rte_flow_item_tcp *mask = item->mask; 1467 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1468 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1469 MLX5_FLOW_LAYER_OUTER_L3; 1470 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1471 MLX5_FLOW_LAYER_OUTER_L4; 1472 int ret; 1473 1474 assert(flow_mask); 1475 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 1476 return rte_flow_error_set(error, EINVAL, 1477 RTE_FLOW_ERROR_TYPE_ITEM, item, 1478 "protocol filtering not compatible" 1479 " with TCP layer"); 1480 if (!(item_flags & l3m)) 1481 return rte_flow_error_set(error, EINVAL, 1482 RTE_FLOW_ERROR_TYPE_ITEM, item, 1483 "L3 is mandatory to filter on L4"); 1484 if (item_flags & l4m) 1485 return rte_flow_error_set(error, EINVAL, 1486 RTE_FLOW_ERROR_TYPE_ITEM, item, 1487 "multiple L4 layers not supported"); 1488 if (!mask) 1489 mask = &rte_flow_item_tcp_mask; 1490 ret = mlx5_flow_item_acceptable 1491 (item, (const uint8_t *)mask, 1492 (const uint8_t *)flow_mask, 1493 sizeof(struct rte_flow_item_tcp), error); 1494 if (ret < 0) 1495 return ret; 1496 return 0; 1497 } 1498 1499 /** 1500 * Validate VXLAN item. 1501 * 1502 * @param[in] item 1503 * Item specification. 1504 * @param[in] item_flags 1505 * Bit-fields that holds the items detected until now. 1506 * @param[in] target_protocol 1507 * The next protocol in the previous item. 1508 * @param[out] error 1509 * Pointer to error structure. 1510 * 1511 * @return 1512 * 0 on success, a negative errno value otherwise and rte_errno is set. 1513 */ 1514 int 1515 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 1516 uint64_t item_flags, 1517 struct rte_flow_error *error) 1518 { 1519 const struct rte_flow_item_vxlan *spec = item->spec; 1520 const struct rte_flow_item_vxlan *mask = item->mask; 1521 int ret; 1522 union vni { 1523 uint32_t vlan_id; 1524 uint8_t vni[4]; 1525 } id = { .vlan_id = 0, }; 1526 uint32_t vlan_id = 0; 1527 1528 1529 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1530 return rte_flow_error_set(error, ENOTSUP, 1531 RTE_FLOW_ERROR_TYPE_ITEM, item, 1532 "multiple tunnel layers not" 1533 " supported"); 1534 /* 1535 * Verify only UDPv4 is present as defined in 1536 * https://tools.ietf.org/html/rfc7348 1537 */ 1538 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1539 return rte_flow_error_set(error, EINVAL, 1540 RTE_FLOW_ERROR_TYPE_ITEM, item, 1541 "no outer UDP layer found"); 1542 if (!mask) 1543 mask = &rte_flow_item_vxlan_mask; 1544 ret = mlx5_flow_item_acceptable 1545 (item, (const uint8_t *)mask, 1546 (const uint8_t *)&rte_flow_item_vxlan_mask, 1547 sizeof(struct rte_flow_item_vxlan), 1548 error); 1549 if (ret < 0) 1550 return ret; 1551 if (spec) { 1552 memcpy(&id.vni[1], spec->vni, 3); 1553 vlan_id = id.vlan_id; 1554 memcpy(&id.vni[1], mask->vni, 3); 1555 vlan_id &= id.vlan_id; 1556 } 1557 /* 1558 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if 1559 * only this layer is defined in the Verbs specification it is 1560 * interpreted as wildcard and all packets will match this 1561 * rule, if it follows a full stack layer (ex: eth / ipv4 / 1562 * udp), all packets matching the layers before will also 1563 * match this rule. To avoid such situation, VNI 0 is 1564 * currently refused. 1565 */ 1566 if (!vlan_id) 1567 return rte_flow_error_set(error, ENOTSUP, 1568 RTE_FLOW_ERROR_TYPE_ITEM, item, 1569 "VXLAN vni cannot be 0"); 1570 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1571 return rte_flow_error_set(error, ENOTSUP, 1572 RTE_FLOW_ERROR_TYPE_ITEM, item, 1573 "VXLAN tunnel must be fully defined"); 1574 return 0; 1575 } 1576 1577 /** 1578 * Validate VXLAN_GPE item. 1579 * 1580 * @param[in] item 1581 * Item specification. 1582 * @param[in] item_flags 1583 * Bit-fields that holds the items detected until now. 1584 * @param[in] priv 1585 * Pointer to the private data structure. 1586 * @param[in] target_protocol 1587 * The next protocol in the previous item. 1588 * @param[out] error 1589 * Pointer to error structure. 1590 * 1591 * @return 1592 * 0 on success, a negative errno value otherwise and rte_errno is set. 1593 */ 1594 int 1595 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 1596 uint64_t item_flags, 1597 struct rte_eth_dev *dev, 1598 struct rte_flow_error *error) 1599 { 1600 struct mlx5_priv *priv = dev->data->dev_private; 1601 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 1602 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 1603 int ret; 1604 union vni { 1605 uint32_t vlan_id; 1606 uint8_t vni[4]; 1607 } id = { .vlan_id = 0, }; 1608 uint32_t vlan_id = 0; 1609 1610 if (!priv->config.l3_vxlan_en) 1611 return rte_flow_error_set(error, ENOTSUP, 1612 RTE_FLOW_ERROR_TYPE_ITEM, item, 1613 "L3 VXLAN is not enabled by device" 1614 " parameter and/or not configured in" 1615 " firmware"); 1616 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1617 return rte_flow_error_set(error, ENOTSUP, 1618 RTE_FLOW_ERROR_TYPE_ITEM, item, 1619 "multiple tunnel layers not" 1620 " supported"); 1621 /* 1622 * Verify only UDPv4 is present as defined in 1623 * https://tools.ietf.org/html/rfc7348 1624 */ 1625 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1626 return rte_flow_error_set(error, EINVAL, 1627 RTE_FLOW_ERROR_TYPE_ITEM, item, 1628 "no outer UDP layer found"); 1629 if (!mask) 1630 mask = &rte_flow_item_vxlan_gpe_mask; 1631 ret = mlx5_flow_item_acceptable 1632 (item, (const uint8_t *)mask, 1633 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 1634 sizeof(struct rte_flow_item_vxlan_gpe), 1635 error); 1636 if (ret < 0) 1637 return ret; 1638 if (spec) { 1639 if (spec->protocol) 1640 return rte_flow_error_set(error, ENOTSUP, 1641 RTE_FLOW_ERROR_TYPE_ITEM, 1642 item, 1643 "VxLAN-GPE protocol" 1644 " not supported"); 1645 memcpy(&id.vni[1], spec->vni, 3); 1646 vlan_id = id.vlan_id; 1647 memcpy(&id.vni[1], mask->vni, 3); 1648 vlan_id &= id.vlan_id; 1649 } 1650 /* 1651 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this 1652 * layer is defined in the Verbs specification it is interpreted as 1653 * wildcard and all packets will match this rule, if it follows a full 1654 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers 1655 * before will also match this rule. To avoid such situation, VNI 0 1656 * is currently refused. 1657 */ 1658 if (!vlan_id) 1659 return rte_flow_error_set(error, ENOTSUP, 1660 RTE_FLOW_ERROR_TYPE_ITEM, item, 1661 "VXLAN-GPE vni cannot be 0"); 1662 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1663 return rte_flow_error_set(error, ENOTSUP, 1664 RTE_FLOW_ERROR_TYPE_ITEM, item, 1665 "VXLAN-GPE tunnel must be fully" 1666 " defined"); 1667 return 0; 1668 } 1669 /** 1670 * Validate GRE Key item. 1671 * 1672 * @param[in] item 1673 * Item specification. 1674 * @param[in] item_flags 1675 * Bit flags to mark detected items. 1676 * @param[in] gre_item 1677 * Pointer to gre_item 1678 * @param[out] error 1679 * Pointer to error structure. 1680 * 1681 * @return 1682 * 0 on success, a negative errno value otherwise and rte_errno is set. 1683 */ 1684 int 1685 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 1686 uint64_t item_flags, 1687 const struct rte_flow_item *gre_item, 1688 struct rte_flow_error *error) 1689 { 1690 const rte_be32_t *mask = item->mask; 1691 int ret = 0; 1692 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 1693 const struct rte_flow_item_gre *gre_spec = gre_item->spec; 1694 const struct rte_flow_item_gre *gre_mask = gre_item->mask; 1695 1696 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 1697 return rte_flow_error_set(error, ENOTSUP, 1698 RTE_FLOW_ERROR_TYPE_ITEM, item, 1699 "Multiple GRE key not support"); 1700 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 1701 return rte_flow_error_set(error, ENOTSUP, 1702 RTE_FLOW_ERROR_TYPE_ITEM, item, 1703 "No preceding GRE header"); 1704 if (item_flags & MLX5_FLOW_LAYER_INNER) 1705 return rte_flow_error_set(error, ENOTSUP, 1706 RTE_FLOW_ERROR_TYPE_ITEM, item, 1707 "GRE key following a wrong item"); 1708 if (!gre_mask) 1709 gre_mask = &rte_flow_item_gre_mask; 1710 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 1711 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 1712 return rte_flow_error_set(error, EINVAL, 1713 RTE_FLOW_ERROR_TYPE_ITEM, item, 1714 "Key bit must be on"); 1715 1716 if (!mask) 1717 mask = &gre_key_default_mask; 1718 ret = mlx5_flow_item_acceptable 1719 (item, (const uint8_t *)mask, 1720 (const uint8_t *)&gre_key_default_mask, 1721 sizeof(rte_be32_t), error); 1722 return ret; 1723 } 1724 1725 /** 1726 * Validate GRE item. 1727 * 1728 * @param[in] item 1729 * Item specification. 1730 * @param[in] item_flags 1731 * Bit flags to mark detected items. 1732 * @param[in] target_protocol 1733 * The next protocol in the previous item. 1734 * @param[out] error 1735 * Pointer to error structure. 1736 * 1737 * @return 1738 * 0 on success, a negative errno value otherwise and rte_errno is set. 1739 */ 1740 int 1741 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 1742 uint64_t item_flags, 1743 uint8_t target_protocol, 1744 struct rte_flow_error *error) 1745 { 1746 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 1747 const struct rte_flow_item_gre *mask = item->mask; 1748 int ret; 1749 const struct rte_flow_item_gre nic_mask = { 1750 .c_rsvd0_ver = RTE_BE16(0xB000), 1751 .protocol = RTE_BE16(UINT16_MAX), 1752 }; 1753 1754 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 1755 return rte_flow_error_set(error, EINVAL, 1756 RTE_FLOW_ERROR_TYPE_ITEM, item, 1757 "protocol filtering not compatible" 1758 " with this GRE layer"); 1759 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1760 return rte_flow_error_set(error, ENOTSUP, 1761 RTE_FLOW_ERROR_TYPE_ITEM, item, 1762 "multiple tunnel layers not" 1763 " supported"); 1764 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 1765 return rte_flow_error_set(error, ENOTSUP, 1766 RTE_FLOW_ERROR_TYPE_ITEM, item, 1767 "L3 Layer is missing"); 1768 if (!mask) 1769 mask = &rte_flow_item_gre_mask; 1770 ret = mlx5_flow_item_acceptable 1771 (item, (const uint8_t *)mask, 1772 (const uint8_t *)&nic_mask, 1773 sizeof(struct rte_flow_item_gre), error); 1774 if (ret < 0) 1775 return ret; 1776 #ifndef HAVE_MLX5DV_DR 1777 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 1778 if (spec && (spec->protocol & mask->protocol)) 1779 return rte_flow_error_set(error, ENOTSUP, 1780 RTE_FLOW_ERROR_TYPE_ITEM, item, 1781 "without MPLS support the" 1782 " specification cannot be used for" 1783 " filtering"); 1784 #endif 1785 #endif 1786 return 0; 1787 } 1788 1789 /** 1790 * Validate MPLS item. 1791 * 1792 * @param[in] dev 1793 * Pointer to the rte_eth_dev structure. 1794 * @param[in] item 1795 * Item specification. 1796 * @param[in] item_flags 1797 * Bit-fields that holds the items detected until now. 1798 * @param[in] prev_layer 1799 * The protocol layer indicated in previous item. 1800 * @param[out] error 1801 * Pointer to error structure. 1802 * 1803 * @return 1804 * 0 on success, a negative errno value otherwise and rte_errno is set. 1805 */ 1806 int 1807 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 1808 const struct rte_flow_item *item __rte_unused, 1809 uint64_t item_flags __rte_unused, 1810 uint64_t prev_layer __rte_unused, 1811 struct rte_flow_error *error) 1812 { 1813 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 1814 const struct rte_flow_item_mpls *mask = item->mask; 1815 struct mlx5_priv *priv = dev->data->dev_private; 1816 int ret; 1817 1818 if (!priv->config.mpls_en) 1819 return rte_flow_error_set(error, ENOTSUP, 1820 RTE_FLOW_ERROR_TYPE_ITEM, item, 1821 "MPLS not supported or" 1822 " disabled in firmware" 1823 " configuration."); 1824 /* MPLS over IP, UDP, GRE is allowed */ 1825 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 | 1826 MLX5_FLOW_LAYER_OUTER_L4_UDP | 1827 MLX5_FLOW_LAYER_GRE))) 1828 return rte_flow_error_set(error, EINVAL, 1829 RTE_FLOW_ERROR_TYPE_ITEM, item, 1830 "protocol filtering not compatible" 1831 " with MPLS layer"); 1832 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 1833 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 1834 !(item_flags & MLX5_FLOW_LAYER_GRE)) 1835 return rte_flow_error_set(error, ENOTSUP, 1836 RTE_FLOW_ERROR_TYPE_ITEM, item, 1837 "multiple tunnel layers not" 1838 " supported"); 1839 if (!mask) 1840 mask = &rte_flow_item_mpls_mask; 1841 ret = mlx5_flow_item_acceptable 1842 (item, (const uint8_t *)mask, 1843 (const uint8_t *)&rte_flow_item_mpls_mask, 1844 sizeof(struct rte_flow_item_mpls), error); 1845 if (ret < 0) 1846 return ret; 1847 return 0; 1848 #endif 1849 return rte_flow_error_set(error, ENOTSUP, 1850 RTE_FLOW_ERROR_TYPE_ITEM, item, 1851 "MPLS is not supported by Verbs, please" 1852 " update."); 1853 } 1854 1855 static int 1856 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 1857 const struct rte_flow_attr *attr __rte_unused, 1858 const struct rte_flow_item items[] __rte_unused, 1859 const struct rte_flow_action actions[] __rte_unused, 1860 struct rte_flow_error *error) 1861 { 1862 return rte_flow_error_set(error, ENOTSUP, 1863 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 1864 } 1865 1866 static struct mlx5_flow * 1867 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused, 1868 const struct rte_flow_item items[] __rte_unused, 1869 const struct rte_flow_action actions[] __rte_unused, 1870 struct rte_flow_error *error) 1871 { 1872 rte_flow_error_set(error, ENOTSUP, 1873 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 1874 return NULL; 1875 } 1876 1877 static int 1878 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 1879 struct mlx5_flow *dev_flow __rte_unused, 1880 const struct rte_flow_attr *attr __rte_unused, 1881 const struct rte_flow_item items[] __rte_unused, 1882 const struct rte_flow_action actions[] __rte_unused, 1883 struct rte_flow_error *error) 1884 { 1885 return rte_flow_error_set(error, ENOTSUP, 1886 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 1887 } 1888 1889 static int 1890 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 1891 struct rte_flow *flow __rte_unused, 1892 struct rte_flow_error *error) 1893 { 1894 return rte_flow_error_set(error, ENOTSUP, 1895 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 1896 } 1897 1898 static void 1899 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 1900 struct rte_flow *flow __rte_unused) 1901 { 1902 } 1903 1904 static void 1905 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 1906 struct rte_flow *flow __rte_unused) 1907 { 1908 } 1909 1910 static int 1911 flow_null_query(struct rte_eth_dev *dev __rte_unused, 1912 struct rte_flow *flow __rte_unused, 1913 const struct rte_flow_action *actions __rte_unused, 1914 void *data __rte_unused, 1915 struct rte_flow_error *error) 1916 { 1917 return rte_flow_error_set(error, ENOTSUP, 1918 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 1919 } 1920 1921 /* Void driver to protect from null pointer reference. */ 1922 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 1923 .validate = flow_null_validate, 1924 .prepare = flow_null_prepare, 1925 .translate = flow_null_translate, 1926 .apply = flow_null_apply, 1927 .remove = flow_null_remove, 1928 .destroy = flow_null_destroy, 1929 .query = flow_null_query, 1930 }; 1931 1932 /** 1933 * Select flow driver type according to flow attributes and device 1934 * configuration. 1935 * 1936 * @param[in] dev 1937 * Pointer to the dev structure. 1938 * @param[in] attr 1939 * Pointer to the flow attributes. 1940 * 1941 * @return 1942 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 1943 */ 1944 static enum mlx5_flow_drv_type 1945 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 1946 { 1947 struct mlx5_priv *priv = dev->data->dev_private; 1948 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX; 1949 1950 if (attr->transfer && priv->config.dv_esw_en) 1951 type = MLX5_FLOW_TYPE_DV; 1952 if (!attr->transfer) 1953 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 1954 MLX5_FLOW_TYPE_VERBS; 1955 return type; 1956 } 1957 1958 #define flow_get_drv_ops(type) flow_drv_ops[type] 1959 1960 /** 1961 * Flow driver validation API. This abstracts calling driver specific functions. 1962 * The type of flow driver is determined according to flow attributes. 1963 * 1964 * @param[in] dev 1965 * Pointer to the dev structure. 1966 * @param[in] attr 1967 * Pointer to the flow attributes. 1968 * @param[in] items 1969 * Pointer to the list of items. 1970 * @param[in] actions 1971 * Pointer to the list of actions. 1972 * @param[out] error 1973 * Pointer to the error structure. 1974 * 1975 * @return 1976 * 0 on success, a negative errno value otherwise and rte_errno is set. 1977 */ 1978 static inline int 1979 flow_drv_validate(struct rte_eth_dev *dev, 1980 const struct rte_flow_attr *attr, 1981 const struct rte_flow_item items[], 1982 const struct rte_flow_action actions[], 1983 struct rte_flow_error *error) 1984 { 1985 const struct mlx5_flow_driver_ops *fops; 1986 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 1987 1988 fops = flow_get_drv_ops(type); 1989 return fops->validate(dev, attr, items, actions, error); 1990 } 1991 1992 /** 1993 * Flow driver preparation API. This abstracts calling driver specific 1994 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1995 * calculates the size of memory required for device flow, allocates the memory, 1996 * initializes the device flow and returns the pointer. 1997 * 1998 * @note 1999 * This function initializes device flow structure such as dv or verbs in 2000 * struct mlx5_flow. However, it is caller's responsibility to initialize the 2001 * rest. For example, adding returning device flow to flow->dev_flow list and 2002 * setting backward reference to the flow should be done out of this function. 2003 * layers field is not filled either. 2004 * 2005 * @param[in] attr 2006 * Pointer to the flow attributes. 2007 * @param[in] items 2008 * Pointer to the list of items. 2009 * @param[in] actions 2010 * Pointer to the list of actions. 2011 * @param[out] error 2012 * Pointer to the error structure. 2013 * 2014 * @return 2015 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 2016 */ 2017 static inline struct mlx5_flow * 2018 flow_drv_prepare(const struct rte_flow *flow, 2019 const struct rte_flow_attr *attr, 2020 const struct rte_flow_item items[], 2021 const struct rte_flow_action actions[], 2022 struct rte_flow_error *error) 2023 { 2024 const struct mlx5_flow_driver_ops *fops; 2025 enum mlx5_flow_drv_type type = flow->drv_type; 2026 2027 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2028 fops = flow_get_drv_ops(type); 2029 return fops->prepare(attr, items, actions, error); 2030 } 2031 2032 /** 2033 * Flow driver translation API. This abstracts calling driver specific 2034 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 2035 * translates a generic flow into a driver flow. flow_drv_prepare() must 2036 * precede. 2037 * 2038 * @note 2039 * dev_flow->layers could be filled as a result of parsing during translation 2040 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 2041 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 2042 * flow->actions could be overwritten even though all the expanded dev_flows 2043 * have the same actions. 2044 * 2045 * @param[in] dev 2046 * Pointer to the rte dev structure. 2047 * @param[in, out] dev_flow 2048 * Pointer to the mlx5 flow. 2049 * @param[in] attr 2050 * Pointer to the flow attributes. 2051 * @param[in] items 2052 * Pointer to the list of items. 2053 * @param[in] actions 2054 * Pointer to the list of actions. 2055 * @param[out] error 2056 * Pointer to the error structure. 2057 * 2058 * @return 2059 * 0 on success, a negative errno value otherwise and rte_errno is set. 2060 */ 2061 static inline int 2062 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 2063 const struct rte_flow_attr *attr, 2064 const struct rte_flow_item items[], 2065 const struct rte_flow_action actions[], 2066 struct rte_flow_error *error) 2067 { 2068 const struct mlx5_flow_driver_ops *fops; 2069 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 2070 2071 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2072 fops = flow_get_drv_ops(type); 2073 return fops->translate(dev, dev_flow, attr, items, actions, error); 2074 } 2075 2076 /** 2077 * Flow driver apply API. This abstracts calling driver specific functions. 2078 * Parent flow (rte_flow) should have driver type (drv_type). It applies 2079 * translated driver flows on to device. flow_drv_translate() must precede. 2080 * 2081 * @param[in] dev 2082 * Pointer to Ethernet device structure. 2083 * @param[in, out] flow 2084 * Pointer to flow structure. 2085 * @param[out] error 2086 * Pointer to error structure. 2087 * 2088 * @return 2089 * 0 on success, a negative errno value otherwise and rte_errno is set. 2090 */ 2091 static inline int 2092 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 2093 struct rte_flow_error *error) 2094 { 2095 const struct mlx5_flow_driver_ops *fops; 2096 enum mlx5_flow_drv_type type = flow->drv_type; 2097 2098 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2099 fops = flow_get_drv_ops(type); 2100 return fops->apply(dev, flow, error); 2101 } 2102 2103 /** 2104 * Flow driver remove API. This abstracts calling driver specific functions. 2105 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 2106 * on device. All the resources of the flow should be freed by calling 2107 * flow_drv_destroy(). 2108 * 2109 * @param[in] dev 2110 * Pointer to Ethernet device. 2111 * @param[in, out] flow 2112 * Pointer to flow structure. 2113 */ 2114 static inline void 2115 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow) 2116 { 2117 const struct mlx5_flow_driver_ops *fops; 2118 enum mlx5_flow_drv_type type = flow->drv_type; 2119 2120 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2121 fops = flow_get_drv_ops(type); 2122 fops->remove(dev, flow); 2123 } 2124 2125 /** 2126 * Flow driver destroy API. This abstracts calling driver specific functions. 2127 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 2128 * on device and releases resources of the flow. 2129 * 2130 * @param[in] dev 2131 * Pointer to Ethernet device. 2132 * @param[in, out] flow 2133 * Pointer to flow structure. 2134 */ 2135 static inline void 2136 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 2137 { 2138 const struct mlx5_flow_driver_ops *fops; 2139 enum mlx5_flow_drv_type type = flow->drv_type; 2140 2141 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2142 fops = flow_get_drv_ops(type); 2143 fops->destroy(dev, flow); 2144 } 2145 2146 /** 2147 * Validate a flow supported by the NIC. 2148 * 2149 * @see rte_flow_validate() 2150 * @see rte_flow_ops 2151 */ 2152 int 2153 mlx5_flow_validate(struct rte_eth_dev *dev, 2154 const struct rte_flow_attr *attr, 2155 const struct rte_flow_item items[], 2156 const struct rte_flow_action actions[], 2157 struct rte_flow_error *error) 2158 { 2159 int ret; 2160 2161 ret = flow_drv_validate(dev, attr, items, actions, error); 2162 if (ret < 0) 2163 return ret; 2164 return 0; 2165 } 2166 2167 /** 2168 * Get RSS action from the action list. 2169 * 2170 * @param[in] actions 2171 * Pointer to the list of actions. 2172 * 2173 * @return 2174 * Pointer to the RSS action if exist, else return NULL. 2175 */ 2176 static const struct rte_flow_action_rss* 2177 flow_get_rss_action(const struct rte_flow_action actions[]) 2178 { 2179 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2180 switch (actions->type) { 2181 case RTE_FLOW_ACTION_TYPE_RSS: 2182 return (const struct rte_flow_action_rss *) 2183 actions->conf; 2184 default: 2185 break; 2186 } 2187 } 2188 return NULL; 2189 } 2190 2191 static unsigned int 2192 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 2193 { 2194 const struct rte_flow_item *item; 2195 unsigned int has_vlan = 0; 2196 2197 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 2198 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 2199 has_vlan = 1; 2200 break; 2201 } 2202 } 2203 if (has_vlan) 2204 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 2205 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 2206 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 2207 MLX5_EXPANSION_ROOT_OUTER; 2208 } 2209 2210 /** 2211 * Create a flow and add it to @p list. 2212 * 2213 * @param dev 2214 * Pointer to Ethernet device. 2215 * @param list 2216 * Pointer to a TAILQ flow list. 2217 * @param[in] attr 2218 * Flow rule attributes. 2219 * @param[in] items 2220 * Pattern specification (list terminated by the END pattern item). 2221 * @param[in] actions 2222 * Associated actions (list terminated by the END action). 2223 * @param[out] error 2224 * Perform verbose error reporting if not NULL. 2225 * 2226 * @return 2227 * A flow on success, NULL otherwise and rte_errno is set. 2228 */ 2229 static struct rte_flow * 2230 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list, 2231 const struct rte_flow_attr *attr, 2232 const struct rte_flow_item items[], 2233 const struct rte_flow_action actions[], 2234 struct rte_flow_error *error) 2235 { 2236 struct rte_flow *flow = NULL; 2237 struct mlx5_flow *dev_flow; 2238 const struct rte_flow_action_rss *rss; 2239 union { 2240 struct rte_flow_expand_rss buf; 2241 uint8_t buffer[2048]; 2242 } expand_buffer; 2243 struct rte_flow_expand_rss *buf = &expand_buffer.buf; 2244 int ret; 2245 uint32_t i; 2246 uint32_t flow_size; 2247 2248 ret = flow_drv_validate(dev, attr, items, actions, error); 2249 if (ret < 0) 2250 return NULL; 2251 flow_size = sizeof(struct rte_flow); 2252 rss = flow_get_rss_action(actions); 2253 if (rss) 2254 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t), 2255 sizeof(void *)); 2256 else 2257 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *)); 2258 flow = rte_calloc(__func__, 1, flow_size, 0); 2259 if (!flow) { 2260 rte_errno = ENOMEM; 2261 return NULL; 2262 } 2263 flow->drv_type = flow_get_drv_type(dev, attr); 2264 flow->ingress = attr->ingress; 2265 flow->transfer = attr->transfer; 2266 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && 2267 flow->drv_type < MLX5_FLOW_TYPE_MAX); 2268 flow->queue = (void *)(flow + 1); 2269 LIST_INIT(&flow->dev_flows); 2270 if (rss && rss->types) { 2271 unsigned int graph_root; 2272 2273 graph_root = find_graph_root(items, rss->level); 2274 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 2275 items, rss->types, 2276 mlx5_support_expansion, 2277 graph_root); 2278 assert(ret > 0 && 2279 (unsigned int)ret < sizeof(expand_buffer.buffer)); 2280 } else { 2281 buf->entries = 1; 2282 buf->entry[0].pattern = (void *)(uintptr_t)items; 2283 } 2284 for (i = 0; i < buf->entries; ++i) { 2285 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern, 2286 actions, error); 2287 if (!dev_flow) 2288 goto error; 2289 dev_flow->flow = flow; 2290 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next); 2291 ret = flow_drv_translate(dev, dev_flow, attr, 2292 buf->entry[i].pattern, 2293 actions, error); 2294 if (ret < 0) 2295 goto error; 2296 } 2297 if (dev->data->dev_started) { 2298 ret = flow_drv_apply(dev, flow, error); 2299 if (ret < 0) 2300 goto error; 2301 } 2302 TAILQ_INSERT_TAIL(list, flow, next); 2303 flow_rxq_flags_set(dev, flow); 2304 return flow; 2305 error: 2306 ret = rte_errno; /* Save rte_errno before cleanup. */ 2307 assert(flow); 2308 flow_drv_destroy(dev, flow); 2309 rte_free(flow); 2310 rte_errno = ret; /* Restore rte_errno. */ 2311 return NULL; 2312 } 2313 2314 /** 2315 * Create a flow. 2316 * 2317 * @see rte_flow_create() 2318 * @see rte_flow_ops 2319 */ 2320 struct rte_flow * 2321 mlx5_flow_create(struct rte_eth_dev *dev, 2322 const struct rte_flow_attr *attr, 2323 const struct rte_flow_item items[], 2324 const struct rte_flow_action actions[], 2325 struct rte_flow_error *error) 2326 { 2327 struct mlx5_priv *priv = dev->data->dev_private; 2328 2329 return flow_list_create(dev, &priv->flows, 2330 attr, items, actions, error); 2331 } 2332 2333 /** 2334 * Destroy a flow in a list. 2335 * 2336 * @param dev 2337 * Pointer to Ethernet device. 2338 * @param list 2339 * Pointer to a TAILQ flow list. 2340 * @param[in] flow 2341 * Flow to destroy. 2342 */ 2343 static void 2344 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list, 2345 struct rte_flow *flow) 2346 { 2347 /* 2348 * Update RX queue flags only if port is started, otherwise it is 2349 * already clean. 2350 */ 2351 if (dev->data->dev_started) 2352 flow_rxq_flags_trim(dev, flow); 2353 flow_drv_destroy(dev, flow); 2354 TAILQ_REMOVE(list, flow, next); 2355 rte_free(flow->fdir); 2356 rte_free(flow); 2357 } 2358 2359 /** 2360 * Destroy all flows. 2361 * 2362 * @param dev 2363 * Pointer to Ethernet device. 2364 * @param list 2365 * Pointer to a TAILQ flow list. 2366 */ 2367 void 2368 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list) 2369 { 2370 while (!TAILQ_EMPTY(list)) { 2371 struct rte_flow *flow; 2372 2373 flow = TAILQ_FIRST(list); 2374 flow_list_destroy(dev, list, flow); 2375 } 2376 } 2377 2378 /** 2379 * Remove all flows. 2380 * 2381 * @param dev 2382 * Pointer to Ethernet device. 2383 * @param list 2384 * Pointer to a TAILQ flow list. 2385 */ 2386 void 2387 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list) 2388 { 2389 struct rte_flow *flow; 2390 2391 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) 2392 flow_drv_remove(dev, flow); 2393 flow_rxq_flags_clear(dev); 2394 } 2395 2396 /** 2397 * Add all flows. 2398 * 2399 * @param dev 2400 * Pointer to Ethernet device. 2401 * @param list 2402 * Pointer to a TAILQ flow list. 2403 * 2404 * @return 2405 * 0 on success, a negative errno value otherwise and rte_errno is set. 2406 */ 2407 int 2408 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list) 2409 { 2410 struct rte_flow *flow; 2411 struct rte_flow_error error; 2412 int ret = 0; 2413 2414 TAILQ_FOREACH(flow, list, next) { 2415 ret = flow_drv_apply(dev, flow, &error); 2416 if (ret < 0) 2417 goto error; 2418 flow_rxq_flags_set(dev, flow); 2419 } 2420 return 0; 2421 error: 2422 ret = rte_errno; /* Save rte_errno before cleanup. */ 2423 mlx5_flow_stop(dev, list); 2424 rte_errno = ret; /* Restore rte_errno. */ 2425 return -rte_errno; 2426 } 2427 2428 /** 2429 * Verify the flow list is empty 2430 * 2431 * @param dev 2432 * Pointer to Ethernet device. 2433 * 2434 * @return the number of flows not released. 2435 */ 2436 int 2437 mlx5_flow_verify(struct rte_eth_dev *dev) 2438 { 2439 struct mlx5_priv *priv = dev->data->dev_private; 2440 struct rte_flow *flow; 2441 int ret = 0; 2442 2443 TAILQ_FOREACH(flow, &priv->flows, next) { 2444 DRV_LOG(DEBUG, "port %u flow %p still referenced", 2445 dev->data->port_id, (void *)flow); 2446 ++ret; 2447 } 2448 return ret; 2449 } 2450 2451 /** 2452 * Enable a control flow configured from the control plane. 2453 * 2454 * @param dev 2455 * Pointer to Ethernet device. 2456 * @param eth_spec 2457 * An Ethernet flow spec to apply. 2458 * @param eth_mask 2459 * An Ethernet flow mask to apply. 2460 * @param vlan_spec 2461 * A VLAN flow spec to apply. 2462 * @param vlan_mask 2463 * A VLAN flow mask to apply. 2464 * 2465 * @return 2466 * 0 on success, a negative errno value otherwise and rte_errno is set. 2467 */ 2468 int 2469 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 2470 struct rte_flow_item_eth *eth_spec, 2471 struct rte_flow_item_eth *eth_mask, 2472 struct rte_flow_item_vlan *vlan_spec, 2473 struct rte_flow_item_vlan *vlan_mask) 2474 { 2475 struct mlx5_priv *priv = dev->data->dev_private; 2476 const struct rte_flow_attr attr = { 2477 .ingress = 1, 2478 .priority = MLX5_FLOW_PRIO_RSVD, 2479 }; 2480 struct rte_flow_item items[] = { 2481 { 2482 .type = RTE_FLOW_ITEM_TYPE_ETH, 2483 .spec = eth_spec, 2484 .last = NULL, 2485 .mask = eth_mask, 2486 }, 2487 { 2488 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 2489 RTE_FLOW_ITEM_TYPE_END, 2490 .spec = vlan_spec, 2491 .last = NULL, 2492 .mask = vlan_mask, 2493 }, 2494 { 2495 .type = RTE_FLOW_ITEM_TYPE_END, 2496 }, 2497 }; 2498 uint16_t queue[priv->reta_idx_n]; 2499 struct rte_flow_action_rss action_rss = { 2500 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 2501 .level = 0, 2502 .types = priv->rss_conf.rss_hf, 2503 .key_len = priv->rss_conf.rss_key_len, 2504 .queue_num = priv->reta_idx_n, 2505 .key = priv->rss_conf.rss_key, 2506 .queue = queue, 2507 }; 2508 struct rte_flow_action actions[] = { 2509 { 2510 .type = RTE_FLOW_ACTION_TYPE_RSS, 2511 .conf = &action_rss, 2512 }, 2513 { 2514 .type = RTE_FLOW_ACTION_TYPE_END, 2515 }, 2516 }; 2517 struct rte_flow *flow; 2518 struct rte_flow_error error; 2519 unsigned int i; 2520 2521 if (!priv->reta_idx_n || !priv->rxqs_n) { 2522 return 0; 2523 } 2524 for (i = 0; i != priv->reta_idx_n; ++i) 2525 queue[i] = (*priv->reta_idx)[i]; 2526 flow = flow_list_create(dev, &priv->ctrl_flows, 2527 &attr, items, actions, &error); 2528 if (!flow) 2529 return -rte_errno; 2530 return 0; 2531 } 2532 2533 /** 2534 * Enable a flow control configured from the control plane. 2535 * 2536 * @param dev 2537 * Pointer to Ethernet device. 2538 * @param eth_spec 2539 * An Ethernet flow spec to apply. 2540 * @param eth_mask 2541 * An Ethernet flow mask to apply. 2542 * 2543 * @return 2544 * 0 on success, a negative errno value otherwise and rte_errno is set. 2545 */ 2546 int 2547 mlx5_ctrl_flow(struct rte_eth_dev *dev, 2548 struct rte_flow_item_eth *eth_spec, 2549 struct rte_flow_item_eth *eth_mask) 2550 { 2551 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 2552 } 2553 2554 /** 2555 * Destroy a flow. 2556 * 2557 * @see rte_flow_destroy() 2558 * @see rte_flow_ops 2559 */ 2560 int 2561 mlx5_flow_destroy(struct rte_eth_dev *dev, 2562 struct rte_flow *flow, 2563 struct rte_flow_error *error __rte_unused) 2564 { 2565 struct mlx5_priv *priv = dev->data->dev_private; 2566 2567 flow_list_destroy(dev, &priv->flows, flow); 2568 return 0; 2569 } 2570 2571 /** 2572 * Destroy all flows. 2573 * 2574 * @see rte_flow_flush() 2575 * @see rte_flow_ops 2576 */ 2577 int 2578 mlx5_flow_flush(struct rte_eth_dev *dev, 2579 struct rte_flow_error *error __rte_unused) 2580 { 2581 struct mlx5_priv *priv = dev->data->dev_private; 2582 2583 mlx5_flow_list_flush(dev, &priv->flows); 2584 return 0; 2585 } 2586 2587 /** 2588 * Isolated mode. 2589 * 2590 * @see rte_flow_isolate() 2591 * @see rte_flow_ops 2592 */ 2593 int 2594 mlx5_flow_isolate(struct rte_eth_dev *dev, 2595 int enable, 2596 struct rte_flow_error *error) 2597 { 2598 struct mlx5_priv *priv = dev->data->dev_private; 2599 2600 if (dev->data->dev_started) { 2601 rte_flow_error_set(error, EBUSY, 2602 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2603 NULL, 2604 "port must be stopped first"); 2605 return -rte_errno; 2606 } 2607 priv->isolated = !!enable; 2608 if (enable) 2609 dev->dev_ops = &mlx5_dev_ops_isolate; 2610 else 2611 dev->dev_ops = &mlx5_dev_ops; 2612 return 0; 2613 } 2614 2615 /** 2616 * Query a flow. 2617 * 2618 * @see rte_flow_query() 2619 * @see rte_flow_ops 2620 */ 2621 static int 2622 flow_drv_query(struct rte_eth_dev *dev, 2623 struct rte_flow *flow, 2624 const struct rte_flow_action *actions, 2625 void *data, 2626 struct rte_flow_error *error) 2627 { 2628 const struct mlx5_flow_driver_ops *fops; 2629 enum mlx5_flow_drv_type ftype = flow->drv_type; 2630 2631 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 2632 fops = flow_get_drv_ops(ftype); 2633 2634 return fops->query(dev, flow, actions, data, error); 2635 } 2636 2637 /** 2638 * Query a flow. 2639 * 2640 * @see rte_flow_query() 2641 * @see rte_flow_ops 2642 */ 2643 int 2644 mlx5_flow_query(struct rte_eth_dev *dev, 2645 struct rte_flow *flow, 2646 const struct rte_flow_action *actions, 2647 void *data, 2648 struct rte_flow_error *error) 2649 { 2650 int ret; 2651 2652 ret = flow_drv_query(dev, flow, actions, data, error); 2653 if (ret < 0) 2654 return ret; 2655 return 0; 2656 } 2657 2658 /** 2659 * Convert a flow director filter to a generic flow. 2660 * 2661 * @param dev 2662 * Pointer to Ethernet device. 2663 * @param fdir_filter 2664 * Flow director filter to add. 2665 * @param attributes 2666 * Generic flow parameters structure. 2667 * 2668 * @return 2669 * 0 on success, a negative errno value otherwise and rte_errno is set. 2670 */ 2671 static int 2672 flow_fdir_filter_convert(struct rte_eth_dev *dev, 2673 const struct rte_eth_fdir_filter *fdir_filter, 2674 struct mlx5_fdir *attributes) 2675 { 2676 struct mlx5_priv *priv = dev->data->dev_private; 2677 const struct rte_eth_fdir_input *input = &fdir_filter->input; 2678 const struct rte_eth_fdir_masks *mask = 2679 &dev->data->dev_conf.fdir_conf.mask; 2680 2681 /* Validate queue number. */ 2682 if (fdir_filter->action.rx_queue >= priv->rxqs_n) { 2683 DRV_LOG(ERR, "port %u invalid queue number %d", 2684 dev->data->port_id, fdir_filter->action.rx_queue); 2685 rte_errno = EINVAL; 2686 return -rte_errno; 2687 } 2688 attributes->attr.ingress = 1; 2689 attributes->items[0] = (struct rte_flow_item) { 2690 .type = RTE_FLOW_ITEM_TYPE_ETH, 2691 .spec = &attributes->l2, 2692 .mask = &attributes->l2_mask, 2693 }; 2694 switch (fdir_filter->action.behavior) { 2695 case RTE_ETH_FDIR_ACCEPT: 2696 attributes->actions[0] = (struct rte_flow_action){ 2697 .type = RTE_FLOW_ACTION_TYPE_QUEUE, 2698 .conf = &attributes->queue, 2699 }; 2700 break; 2701 case RTE_ETH_FDIR_REJECT: 2702 attributes->actions[0] = (struct rte_flow_action){ 2703 .type = RTE_FLOW_ACTION_TYPE_DROP, 2704 }; 2705 break; 2706 default: 2707 DRV_LOG(ERR, "port %u invalid behavior %d", 2708 dev->data->port_id, 2709 fdir_filter->action.behavior); 2710 rte_errno = ENOTSUP; 2711 return -rte_errno; 2712 } 2713 attributes->queue.index = fdir_filter->action.rx_queue; 2714 /* Handle L3. */ 2715 switch (fdir_filter->input.flow_type) { 2716 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2717 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2718 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2719 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){ 2720 .src_addr = input->flow.ip4_flow.src_ip, 2721 .dst_addr = input->flow.ip4_flow.dst_ip, 2722 .time_to_live = input->flow.ip4_flow.ttl, 2723 .type_of_service = input->flow.ip4_flow.tos, 2724 }; 2725 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){ 2726 .src_addr = mask->ipv4_mask.src_ip, 2727 .dst_addr = mask->ipv4_mask.dst_ip, 2728 .time_to_live = mask->ipv4_mask.ttl, 2729 .type_of_service = mask->ipv4_mask.tos, 2730 .next_proto_id = mask->ipv4_mask.proto, 2731 }; 2732 attributes->items[1] = (struct rte_flow_item){ 2733 .type = RTE_FLOW_ITEM_TYPE_IPV4, 2734 .spec = &attributes->l3, 2735 .mask = &attributes->l3_mask, 2736 }; 2737 break; 2738 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2739 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2740 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2741 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){ 2742 .hop_limits = input->flow.ipv6_flow.hop_limits, 2743 .proto = input->flow.ipv6_flow.proto, 2744 }; 2745 2746 memcpy(attributes->l3.ipv6.hdr.src_addr, 2747 input->flow.ipv6_flow.src_ip, 2748 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2749 memcpy(attributes->l3.ipv6.hdr.dst_addr, 2750 input->flow.ipv6_flow.dst_ip, 2751 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2752 memcpy(attributes->l3_mask.ipv6.hdr.src_addr, 2753 mask->ipv6_mask.src_ip, 2754 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2755 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr, 2756 mask->ipv6_mask.dst_ip, 2757 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2758 attributes->items[1] = (struct rte_flow_item){ 2759 .type = RTE_FLOW_ITEM_TYPE_IPV6, 2760 .spec = &attributes->l3, 2761 .mask = &attributes->l3_mask, 2762 }; 2763 break; 2764 default: 2765 DRV_LOG(ERR, "port %u invalid flow type%d", 2766 dev->data->port_id, fdir_filter->input.flow_type); 2767 rte_errno = ENOTSUP; 2768 return -rte_errno; 2769 } 2770 /* Handle L4. */ 2771 switch (fdir_filter->input.flow_type) { 2772 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2773 attributes->l4.udp.hdr = (struct rte_udp_hdr){ 2774 .src_port = input->flow.udp4_flow.src_port, 2775 .dst_port = input->flow.udp4_flow.dst_port, 2776 }; 2777 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){ 2778 .src_port = mask->src_port_mask, 2779 .dst_port = mask->dst_port_mask, 2780 }; 2781 attributes->items[2] = (struct rte_flow_item){ 2782 .type = RTE_FLOW_ITEM_TYPE_UDP, 2783 .spec = &attributes->l4, 2784 .mask = &attributes->l4_mask, 2785 }; 2786 break; 2787 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2788 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){ 2789 .src_port = input->flow.tcp4_flow.src_port, 2790 .dst_port = input->flow.tcp4_flow.dst_port, 2791 }; 2792 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){ 2793 .src_port = mask->src_port_mask, 2794 .dst_port = mask->dst_port_mask, 2795 }; 2796 attributes->items[2] = (struct rte_flow_item){ 2797 .type = RTE_FLOW_ITEM_TYPE_TCP, 2798 .spec = &attributes->l4, 2799 .mask = &attributes->l4_mask, 2800 }; 2801 break; 2802 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2803 attributes->l4.udp.hdr = (struct rte_udp_hdr){ 2804 .src_port = input->flow.udp6_flow.src_port, 2805 .dst_port = input->flow.udp6_flow.dst_port, 2806 }; 2807 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){ 2808 .src_port = mask->src_port_mask, 2809 .dst_port = mask->dst_port_mask, 2810 }; 2811 attributes->items[2] = (struct rte_flow_item){ 2812 .type = RTE_FLOW_ITEM_TYPE_UDP, 2813 .spec = &attributes->l4, 2814 .mask = &attributes->l4_mask, 2815 }; 2816 break; 2817 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2818 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){ 2819 .src_port = input->flow.tcp6_flow.src_port, 2820 .dst_port = input->flow.tcp6_flow.dst_port, 2821 }; 2822 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){ 2823 .src_port = mask->src_port_mask, 2824 .dst_port = mask->dst_port_mask, 2825 }; 2826 attributes->items[2] = (struct rte_flow_item){ 2827 .type = RTE_FLOW_ITEM_TYPE_TCP, 2828 .spec = &attributes->l4, 2829 .mask = &attributes->l4_mask, 2830 }; 2831 break; 2832 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2833 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2834 break; 2835 default: 2836 DRV_LOG(ERR, "port %u invalid flow type%d", 2837 dev->data->port_id, fdir_filter->input.flow_type); 2838 rte_errno = ENOTSUP; 2839 return -rte_errno; 2840 } 2841 return 0; 2842 } 2843 2844 #define FLOW_FDIR_CMP(f1, f2, fld) \ 2845 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld)) 2846 2847 /** 2848 * Compare two FDIR flows. If items and actions are identical, the two flows are 2849 * regarded as same. 2850 * 2851 * @param dev 2852 * Pointer to Ethernet device. 2853 * @param f1 2854 * FDIR flow to compare. 2855 * @param f2 2856 * FDIR flow to compare. 2857 * 2858 * @return 2859 * Zero on match, 1 otherwise. 2860 */ 2861 static int 2862 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2) 2863 { 2864 if (FLOW_FDIR_CMP(f1, f2, attr) || 2865 FLOW_FDIR_CMP(f1, f2, l2) || 2866 FLOW_FDIR_CMP(f1, f2, l2_mask) || 2867 FLOW_FDIR_CMP(f1, f2, l3) || 2868 FLOW_FDIR_CMP(f1, f2, l3_mask) || 2869 FLOW_FDIR_CMP(f1, f2, l4) || 2870 FLOW_FDIR_CMP(f1, f2, l4_mask) || 2871 FLOW_FDIR_CMP(f1, f2, actions[0].type)) 2872 return 1; 2873 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE && 2874 FLOW_FDIR_CMP(f1, f2, queue)) 2875 return 1; 2876 return 0; 2877 } 2878 2879 /** 2880 * Search device flow list to find out a matched FDIR flow. 2881 * 2882 * @param dev 2883 * Pointer to Ethernet device. 2884 * @param fdir_flow 2885 * FDIR flow to lookup. 2886 * 2887 * @return 2888 * Pointer of flow if found, NULL otherwise. 2889 */ 2890 static struct rte_flow * 2891 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow) 2892 { 2893 struct mlx5_priv *priv = dev->data->dev_private; 2894 struct rte_flow *flow = NULL; 2895 2896 assert(fdir_flow); 2897 TAILQ_FOREACH(flow, &priv->flows, next) { 2898 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) { 2899 DRV_LOG(DEBUG, "port %u found FDIR flow %p", 2900 dev->data->port_id, (void *)flow); 2901 break; 2902 } 2903 } 2904 return flow; 2905 } 2906 2907 /** 2908 * Add new flow director filter and store it in list. 2909 * 2910 * @param dev 2911 * Pointer to Ethernet device. 2912 * @param fdir_filter 2913 * Flow director filter to add. 2914 * 2915 * @return 2916 * 0 on success, a negative errno value otherwise and rte_errno is set. 2917 */ 2918 static int 2919 flow_fdir_filter_add(struct rte_eth_dev *dev, 2920 const struct rte_eth_fdir_filter *fdir_filter) 2921 { 2922 struct mlx5_priv *priv = dev->data->dev_private; 2923 struct mlx5_fdir *fdir_flow; 2924 struct rte_flow *flow; 2925 int ret; 2926 2927 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0); 2928 if (!fdir_flow) { 2929 rte_errno = ENOMEM; 2930 return -rte_errno; 2931 } 2932 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow); 2933 if (ret) 2934 goto error; 2935 flow = flow_fdir_filter_lookup(dev, fdir_flow); 2936 if (flow) { 2937 rte_errno = EEXIST; 2938 goto error; 2939 } 2940 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr, 2941 fdir_flow->items, fdir_flow->actions, NULL); 2942 if (!flow) 2943 goto error; 2944 assert(!flow->fdir); 2945 flow->fdir = fdir_flow; 2946 DRV_LOG(DEBUG, "port %u created FDIR flow %p", 2947 dev->data->port_id, (void *)flow); 2948 return 0; 2949 error: 2950 rte_free(fdir_flow); 2951 return -rte_errno; 2952 } 2953 2954 /** 2955 * Delete specific filter. 2956 * 2957 * @param dev 2958 * Pointer to Ethernet device. 2959 * @param fdir_filter 2960 * Filter to be deleted. 2961 * 2962 * @return 2963 * 0 on success, a negative errno value otherwise and rte_errno is set. 2964 */ 2965 static int 2966 flow_fdir_filter_delete(struct rte_eth_dev *dev, 2967 const struct rte_eth_fdir_filter *fdir_filter) 2968 { 2969 struct mlx5_priv *priv = dev->data->dev_private; 2970 struct rte_flow *flow; 2971 struct mlx5_fdir fdir_flow = { 2972 .attr.group = 0, 2973 }; 2974 int ret; 2975 2976 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow); 2977 if (ret) 2978 return -rte_errno; 2979 flow = flow_fdir_filter_lookup(dev, &fdir_flow); 2980 if (!flow) { 2981 rte_errno = ENOENT; 2982 return -rte_errno; 2983 } 2984 flow_list_destroy(dev, &priv->flows, flow); 2985 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p", 2986 dev->data->port_id, (void *)flow); 2987 return 0; 2988 } 2989 2990 /** 2991 * Update queue for specific filter. 2992 * 2993 * @param dev 2994 * Pointer to Ethernet device. 2995 * @param fdir_filter 2996 * Filter to be updated. 2997 * 2998 * @return 2999 * 0 on success, a negative errno value otherwise and rte_errno is set. 3000 */ 3001 static int 3002 flow_fdir_filter_update(struct rte_eth_dev *dev, 3003 const struct rte_eth_fdir_filter *fdir_filter) 3004 { 3005 int ret; 3006 3007 ret = flow_fdir_filter_delete(dev, fdir_filter); 3008 if (ret) 3009 return ret; 3010 return flow_fdir_filter_add(dev, fdir_filter); 3011 } 3012 3013 /** 3014 * Flush all filters. 3015 * 3016 * @param dev 3017 * Pointer to Ethernet device. 3018 */ 3019 static void 3020 flow_fdir_filter_flush(struct rte_eth_dev *dev) 3021 { 3022 struct mlx5_priv *priv = dev->data->dev_private; 3023 3024 mlx5_flow_list_flush(dev, &priv->flows); 3025 } 3026 3027 /** 3028 * Get flow director information. 3029 * 3030 * @param dev 3031 * Pointer to Ethernet device. 3032 * @param[out] fdir_info 3033 * Resulting flow director information. 3034 */ 3035 static void 3036 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info) 3037 { 3038 struct rte_eth_fdir_masks *mask = 3039 &dev->data->dev_conf.fdir_conf.mask; 3040 3041 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode; 3042 fdir_info->guarant_spc = 0; 3043 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask)); 3044 fdir_info->max_flexpayload = 0; 3045 fdir_info->flow_types_mask[0] = 0; 3046 fdir_info->flex_payload_unit = 0; 3047 fdir_info->max_flex_payload_segment_num = 0; 3048 fdir_info->flex_payload_limit = 0; 3049 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf)); 3050 } 3051 3052 /** 3053 * Deal with flow director operations. 3054 * 3055 * @param dev 3056 * Pointer to Ethernet device. 3057 * @param filter_op 3058 * Operation to perform. 3059 * @param arg 3060 * Pointer to operation-specific structure. 3061 * 3062 * @return 3063 * 0 on success, a negative errno value otherwise and rte_errno is set. 3064 */ 3065 static int 3066 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op, 3067 void *arg) 3068 { 3069 enum rte_fdir_mode fdir_mode = 3070 dev->data->dev_conf.fdir_conf.mode; 3071 3072 if (filter_op == RTE_ETH_FILTER_NOP) 3073 return 0; 3074 if (fdir_mode != RTE_FDIR_MODE_PERFECT && 3075 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) { 3076 DRV_LOG(ERR, "port %u flow director mode %d not supported", 3077 dev->data->port_id, fdir_mode); 3078 rte_errno = EINVAL; 3079 return -rte_errno; 3080 } 3081 switch (filter_op) { 3082 case RTE_ETH_FILTER_ADD: 3083 return flow_fdir_filter_add(dev, arg); 3084 case RTE_ETH_FILTER_UPDATE: 3085 return flow_fdir_filter_update(dev, arg); 3086 case RTE_ETH_FILTER_DELETE: 3087 return flow_fdir_filter_delete(dev, arg); 3088 case RTE_ETH_FILTER_FLUSH: 3089 flow_fdir_filter_flush(dev); 3090 break; 3091 case RTE_ETH_FILTER_INFO: 3092 flow_fdir_info_get(dev, arg); 3093 break; 3094 default: 3095 DRV_LOG(DEBUG, "port %u unknown operation %u", 3096 dev->data->port_id, filter_op); 3097 rte_errno = EINVAL; 3098 return -rte_errno; 3099 } 3100 return 0; 3101 } 3102 3103 /** 3104 * Manage filter operations. 3105 * 3106 * @param dev 3107 * Pointer to Ethernet device structure. 3108 * @param filter_type 3109 * Filter type. 3110 * @param filter_op 3111 * Operation to perform. 3112 * @param arg 3113 * Pointer to operation-specific structure. 3114 * 3115 * @return 3116 * 0 on success, a negative errno value otherwise and rte_errno is set. 3117 */ 3118 int 3119 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 3120 enum rte_filter_type filter_type, 3121 enum rte_filter_op filter_op, 3122 void *arg) 3123 { 3124 switch (filter_type) { 3125 case RTE_ETH_FILTER_GENERIC: 3126 if (filter_op != RTE_ETH_FILTER_GET) { 3127 rte_errno = EINVAL; 3128 return -rte_errno; 3129 } 3130 *(const void **)arg = &mlx5_flow_ops; 3131 return 0; 3132 case RTE_ETH_FILTER_FDIR: 3133 return flow_fdir_ctrl_func(dev, filter_op, arg); 3134 default: 3135 DRV_LOG(ERR, "port %u filter type (%d) not supported", 3136 dev->data->port_id, filter_type); 3137 rte_errno = ENOTSUP; 3138 return -rte_errno; 3139 } 3140 return 0; 3141 } 3142