1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <stdalign.h> 7 #include <stdint.h> 8 #include <string.h> 9 #include <stdbool.h> 10 #include <sys/queue.h> 11 12 #include <rte_common.h> 13 #include <rte_ether.h> 14 #include <ethdev_driver.h> 15 #include <rte_eal_paging.h> 16 #include <rte_flow.h> 17 #include <rte_cycles.h> 18 #include <rte_flow_driver.h> 19 #include <rte_malloc.h> 20 #include <rte_ip.h> 21 22 #include <mlx5_glue.h> 23 #include <mlx5_devx_cmds.h> 24 #include <mlx5_prm.h> 25 #include <mlx5_malloc.h> 26 27 #include "mlx5_defs.h" 28 #include "mlx5.h" 29 #include "mlx5_flow.h" 30 #include "mlx5_flow_os.h" 31 #include "mlx5_rx.h" 32 #include "mlx5_tx.h" 33 #include "mlx5_common_os.h" 34 #include "rte_pmd_mlx5.h" 35 36 struct tunnel_default_miss_ctx { 37 uint16_t *queue; 38 __extension__ 39 union { 40 struct rte_flow_action_rss action_rss; 41 struct rte_flow_action_queue miss_queue; 42 struct rte_flow_action_jump miss_jump; 43 uint8_t raw[0]; 44 }; 45 }; 46 47 static int 48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 49 struct rte_flow *flow, 50 const struct rte_flow_attr *attr, 51 const struct rte_flow_action *app_actions, 52 uint32_t flow_idx, 53 struct tunnel_default_miss_ctx *ctx, 54 struct rte_flow_error *error); 55 static struct mlx5_flow_tunnel * 56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 57 static void 58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 59 static uint32_t 60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 61 const struct mlx5_flow_tunnel *tunnel, 62 uint32_t group, uint32_t *table, 63 struct rte_flow_error *error); 64 65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void); 66 static void mlx5_flow_pop_thread_workspace(void); 67 68 69 /** Device flow drivers. */ 70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 71 72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 73 74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 75 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) 77 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 78 #endif 79 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 80 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 81 }; 82 83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 85 (const int []){ \ 86 __VA_ARGS__, 0, \ 87 } 88 89 /** Node object of input graph for mlx5_flow_expand_rss(). */ 90 struct mlx5_flow_expand_node { 91 const int *const next; 92 /**< 93 * List of next node indexes. Index 0 is interpreted as a terminator. 94 */ 95 const enum rte_flow_item_type type; 96 /**< Pattern item type of current node. */ 97 uint64_t rss_types; 98 /**< 99 * RSS types bit-field associated with this node 100 * (see ETH_RSS_* definitions). 101 */ 102 }; 103 104 /** Object returned by mlx5_flow_expand_rss(). */ 105 struct mlx5_flow_expand_rss { 106 uint32_t entries; 107 /**< Number of entries @p patterns and @p priorities. */ 108 struct { 109 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 110 uint32_t priority; /**< Priority offset for each expansion. */ 111 } entry[]; 112 }; 113 114 static enum rte_flow_item_type 115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 116 { 117 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 118 uint16_t ether_type = 0; 119 uint16_t ether_type_m; 120 uint8_t ip_next_proto = 0; 121 uint8_t ip_next_proto_m; 122 123 if (item == NULL || item->spec == NULL) 124 return ret; 125 switch (item->type) { 126 case RTE_FLOW_ITEM_TYPE_ETH: 127 if (item->mask) 128 ether_type_m = ((const struct rte_flow_item_eth *) 129 (item->mask))->type; 130 else 131 ether_type_m = rte_flow_item_eth_mask.type; 132 if (ether_type_m != RTE_BE16(0xFFFF)) 133 break; 134 ether_type = ((const struct rte_flow_item_eth *) 135 (item->spec))->type; 136 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 137 ret = RTE_FLOW_ITEM_TYPE_IPV4; 138 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 139 ret = RTE_FLOW_ITEM_TYPE_IPV6; 140 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 141 ret = RTE_FLOW_ITEM_TYPE_VLAN; 142 else 143 ret = RTE_FLOW_ITEM_TYPE_END; 144 break; 145 case RTE_FLOW_ITEM_TYPE_VLAN: 146 if (item->mask) 147 ether_type_m = ((const struct rte_flow_item_vlan *) 148 (item->mask))->inner_type; 149 else 150 ether_type_m = rte_flow_item_vlan_mask.inner_type; 151 if (ether_type_m != RTE_BE16(0xFFFF)) 152 break; 153 ether_type = ((const struct rte_flow_item_vlan *) 154 (item->spec))->inner_type; 155 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 156 ret = RTE_FLOW_ITEM_TYPE_IPV4; 157 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 158 ret = RTE_FLOW_ITEM_TYPE_IPV6; 159 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 160 ret = RTE_FLOW_ITEM_TYPE_VLAN; 161 else 162 ret = RTE_FLOW_ITEM_TYPE_END; 163 break; 164 case RTE_FLOW_ITEM_TYPE_IPV4: 165 if (item->mask) 166 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 167 (item->mask))->hdr.next_proto_id; 168 else 169 ip_next_proto_m = 170 rte_flow_item_ipv4_mask.hdr.next_proto_id; 171 if (ip_next_proto_m != 0xFF) 172 break; 173 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 174 (item->spec))->hdr.next_proto_id; 175 if (ip_next_proto == IPPROTO_UDP) 176 ret = RTE_FLOW_ITEM_TYPE_UDP; 177 else if (ip_next_proto == IPPROTO_TCP) 178 ret = RTE_FLOW_ITEM_TYPE_TCP; 179 else if (ip_next_proto == IPPROTO_IP) 180 ret = RTE_FLOW_ITEM_TYPE_IPV4; 181 else if (ip_next_proto == IPPROTO_IPV6) 182 ret = RTE_FLOW_ITEM_TYPE_IPV6; 183 else 184 ret = RTE_FLOW_ITEM_TYPE_END; 185 break; 186 case RTE_FLOW_ITEM_TYPE_IPV6: 187 if (item->mask) 188 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 189 (item->mask))->hdr.proto; 190 else 191 ip_next_proto_m = 192 rte_flow_item_ipv6_mask.hdr.proto; 193 if (ip_next_proto_m != 0xFF) 194 break; 195 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 196 (item->spec))->hdr.proto; 197 if (ip_next_proto == IPPROTO_UDP) 198 ret = RTE_FLOW_ITEM_TYPE_UDP; 199 else if (ip_next_proto == IPPROTO_TCP) 200 ret = RTE_FLOW_ITEM_TYPE_TCP; 201 else if (ip_next_proto == IPPROTO_IP) 202 ret = RTE_FLOW_ITEM_TYPE_IPV4; 203 else if (ip_next_proto == IPPROTO_IPV6) 204 ret = RTE_FLOW_ITEM_TYPE_IPV6; 205 else 206 ret = RTE_FLOW_ITEM_TYPE_END; 207 break; 208 default: 209 ret = RTE_FLOW_ITEM_TYPE_VOID; 210 break; 211 } 212 return ret; 213 } 214 215 #define MLX5_RSS_EXP_ELT_N 8 216 217 /** 218 * Expand RSS flows into several possible flows according to the RSS hash 219 * fields requested and the driver capabilities. 220 * 221 * @param[out] buf 222 * Buffer to store the result expansion. 223 * @param[in] size 224 * Buffer size in bytes. If 0, @p buf can be NULL. 225 * @param[in] pattern 226 * User flow pattern. 227 * @param[in] types 228 * RSS types to expand (see ETH_RSS_* definitions). 229 * @param[in] graph 230 * Input graph to expand @p pattern according to @p types. 231 * @param[in] graph_root_index 232 * Index of root node in @p graph, typically 0. 233 * 234 * @return 235 * A positive value representing the size of @p buf in bytes regardless of 236 * @p size on success, a negative errno value otherwise and rte_errno is 237 * set, the following errors are defined: 238 * 239 * -E2BIG: graph-depth @p graph is too deep. 240 */ 241 static int 242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 243 const struct rte_flow_item *pattern, uint64_t types, 244 const struct mlx5_flow_expand_node graph[], 245 int graph_root_index) 246 { 247 const struct rte_flow_item *item; 248 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 249 const int *next_node; 250 const int *stack[MLX5_RSS_EXP_ELT_N]; 251 int stack_pos = 0; 252 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N]; 253 unsigned int i; 254 size_t lsize; 255 size_t user_pattern_size = 0; 256 void *addr = NULL; 257 const struct mlx5_flow_expand_node *next = NULL; 258 struct rte_flow_item missed_item; 259 int missed = 0; 260 int elt = 0; 261 const struct rte_flow_item *last_item = NULL; 262 263 memset(&missed_item, 0, sizeof(missed_item)); 264 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 265 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]); 266 if (lsize <= size) { 267 buf->entry[0].priority = 0; 268 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N]; 269 buf->entries = 0; 270 addr = buf->entry[0].pattern; 271 } 272 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 273 if (item->type != RTE_FLOW_ITEM_TYPE_VOID) 274 last_item = item; 275 for (i = 0; node->next && node->next[i]; ++i) { 276 next = &graph[node->next[i]]; 277 if (next->type == item->type) 278 break; 279 } 280 if (next) 281 node = next; 282 user_pattern_size += sizeof(*item); 283 } 284 user_pattern_size += sizeof(*item); /* Handle END item. */ 285 lsize += user_pattern_size; 286 /* Copy the user pattern in the first entry of the buffer. */ 287 if (lsize <= size) { 288 rte_memcpy(addr, pattern, user_pattern_size); 289 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 290 buf->entries = 1; 291 } 292 /* Start expanding. */ 293 memset(flow_items, 0, sizeof(flow_items)); 294 user_pattern_size -= sizeof(*item); 295 /* 296 * Check if the last valid item has spec set, need complete pattern, 297 * and the pattern can be used for expansion. 298 */ 299 missed_item.type = mlx5_flow_expand_rss_item_complete(last_item); 300 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 301 /* Item type END indicates expansion is not required. */ 302 return lsize; 303 } 304 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 305 next = NULL; 306 missed = 1; 307 for (i = 0; node->next && node->next[i]; ++i) { 308 next = &graph[node->next[i]]; 309 if (next->type == missed_item.type) { 310 flow_items[0].type = missed_item.type; 311 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 312 break; 313 } 314 next = NULL; 315 } 316 } 317 if (next && missed) { 318 elt = 2; /* missed item + item end. */ 319 node = next; 320 lsize += elt * sizeof(*item) + user_pattern_size; 321 if ((node->rss_types & types) && lsize <= size) { 322 buf->entry[buf->entries].priority = 1; 323 buf->entry[buf->entries].pattern = addr; 324 buf->entries++; 325 rte_memcpy(addr, buf->entry[0].pattern, 326 user_pattern_size); 327 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 328 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 329 addr = (void *)(((uintptr_t)addr) + 330 elt * sizeof(*item)); 331 } 332 } 333 memset(flow_items, 0, sizeof(flow_items)); 334 next_node = node->next; 335 stack[stack_pos] = next_node; 336 node = next_node ? &graph[*next_node] : NULL; 337 while (node) { 338 flow_items[stack_pos].type = node->type; 339 if (node->rss_types & types) { 340 /* 341 * compute the number of items to copy from the 342 * expansion and copy it. 343 * When the stack_pos is 0, there are 1 element in it, 344 * plus the addition END item. 345 */ 346 elt = stack_pos + 2; 347 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 348 lsize += elt * sizeof(*item) + user_pattern_size; 349 if (lsize <= size) { 350 size_t n = elt * sizeof(*item); 351 352 buf->entry[buf->entries].priority = 353 stack_pos + 1 + missed; 354 buf->entry[buf->entries].pattern = addr; 355 buf->entries++; 356 rte_memcpy(addr, buf->entry[0].pattern, 357 user_pattern_size); 358 addr = (void *)(((uintptr_t)addr) + 359 user_pattern_size); 360 rte_memcpy(addr, &missed_item, 361 missed * sizeof(*item)); 362 addr = (void *)(((uintptr_t)addr) + 363 missed * sizeof(*item)); 364 rte_memcpy(addr, flow_items, n); 365 addr = (void *)(((uintptr_t)addr) + n); 366 } 367 } 368 /* Go deeper. */ 369 if (node->next) { 370 next_node = node->next; 371 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) { 372 rte_errno = E2BIG; 373 return -rte_errno; 374 } 375 stack[stack_pos] = next_node; 376 } else if (*(next_node + 1)) { 377 /* Follow up with the next possibility. */ 378 ++next_node; 379 } else { 380 /* Move to the next path. */ 381 if (stack_pos) 382 next_node = stack[--stack_pos]; 383 next_node++; 384 stack[stack_pos] = next_node; 385 } 386 node = *next_node ? &graph[*next_node] : NULL; 387 }; 388 return lsize; 389 } 390 391 enum mlx5_expansion { 392 MLX5_EXPANSION_ROOT, 393 MLX5_EXPANSION_ROOT_OUTER, 394 MLX5_EXPANSION_ROOT_ETH_VLAN, 395 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 396 MLX5_EXPANSION_OUTER_ETH, 397 MLX5_EXPANSION_OUTER_ETH_VLAN, 398 MLX5_EXPANSION_OUTER_VLAN, 399 MLX5_EXPANSION_OUTER_IPV4, 400 MLX5_EXPANSION_OUTER_IPV4_UDP, 401 MLX5_EXPANSION_OUTER_IPV4_TCP, 402 MLX5_EXPANSION_OUTER_IPV6, 403 MLX5_EXPANSION_OUTER_IPV6_UDP, 404 MLX5_EXPANSION_OUTER_IPV6_TCP, 405 MLX5_EXPANSION_VXLAN, 406 MLX5_EXPANSION_VXLAN_GPE, 407 MLX5_EXPANSION_GRE, 408 MLX5_EXPANSION_MPLS, 409 MLX5_EXPANSION_ETH, 410 MLX5_EXPANSION_ETH_VLAN, 411 MLX5_EXPANSION_VLAN, 412 MLX5_EXPANSION_IPV4, 413 MLX5_EXPANSION_IPV4_UDP, 414 MLX5_EXPANSION_IPV4_TCP, 415 MLX5_EXPANSION_IPV6, 416 MLX5_EXPANSION_IPV6_UDP, 417 MLX5_EXPANSION_IPV6_TCP, 418 }; 419 420 /** Supported expansion of items. */ 421 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 422 [MLX5_EXPANSION_ROOT] = { 423 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 424 MLX5_EXPANSION_IPV4, 425 MLX5_EXPANSION_IPV6), 426 .type = RTE_FLOW_ITEM_TYPE_END, 427 }, 428 [MLX5_EXPANSION_ROOT_OUTER] = { 429 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 430 MLX5_EXPANSION_OUTER_IPV4, 431 MLX5_EXPANSION_OUTER_IPV6), 432 .type = RTE_FLOW_ITEM_TYPE_END, 433 }, 434 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 435 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 436 .type = RTE_FLOW_ITEM_TYPE_END, 437 }, 438 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 439 .next = MLX5_FLOW_EXPAND_RSS_NEXT 440 (MLX5_EXPANSION_OUTER_ETH_VLAN), 441 .type = RTE_FLOW_ITEM_TYPE_END, 442 }, 443 [MLX5_EXPANSION_OUTER_ETH] = { 444 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 445 MLX5_EXPANSION_OUTER_IPV6, 446 MLX5_EXPANSION_MPLS), 447 .type = RTE_FLOW_ITEM_TYPE_ETH, 448 .rss_types = 0, 449 }, 450 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 451 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 452 .type = RTE_FLOW_ITEM_TYPE_ETH, 453 .rss_types = 0, 454 }, 455 [MLX5_EXPANSION_OUTER_VLAN] = { 456 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 457 MLX5_EXPANSION_OUTER_IPV6), 458 .type = RTE_FLOW_ITEM_TYPE_VLAN, 459 }, 460 [MLX5_EXPANSION_OUTER_IPV4] = { 461 .next = MLX5_FLOW_EXPAND_RSS_NEXT 462 (MLX5_EXPANSION_OUTER_IPV4_UDP, 463 MLX5_EXPANSION_OUTER_IPV4_TCP, 464 MLX5_EXPANSION_GRE, 465 MLX5_EXPANSION_IPV4, 466 MLX5_EXPANSION_IPV6), 467 .type = RTE_FLOW_ITEM_TYPE_IPV4, 468 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 469 ETH_RSS_NONFRAG_IPV4_OTHER, 470 }, 471 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 472 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 473 MLX5_EXPANSION_VXLAN_GPE), 474 .type = RTE_FLOW_ITEM_TYPE_UDP, 475 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 476 }, 477 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 478 .type = RTE_FLOW_ITEM_TYPE_TCP, 479 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 480 }, 481 [MLX5_EXPANSION_OUTER_IPV6] = { 482 .next = MLX5_FLOW_EXPAND_RSS_NEXT 483 (MLX5_EXPANSION_OUTER_IPV6_UDP, 484 MLX5_EXPANSION_OUTER_IPV6_TCP, 485 MLX5_EXPANSION_IPV4, 486 MLX5_EXPANSION_IPV6, 487 MLX5_EXPANSION_GRE), 488 .type = RTE_FLOW_ITEM_TYPE_IPV6, 489 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 490 ETH_RSS_NONFRAG_IPV6_OTHER, 491 }, 492 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 493 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 494 MLX5_EXPANSION_VXLAN_GPE), 495 .type = RTE_FLOW_ITEM_TYPE_UDP, 496 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 497 }, 498 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 499 .type = RTE_FLOW_ITEM_TYPE_TCP, 500 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 501 }, 502 [MLX5_EXPANSION_VXLAN] = { 503 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 504 MLX5_EXPANSION_IPV4, 505 MLX5_EXPANSION_IPV6), 506 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 507 }, 508 [MLX5_EXPANSION_VXLAN_GPE] = { 509 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 510 MLX5_EXPANSION_IPV4, 511 MLX5_EXPANSION_IPV6), 512 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 513 }, 514 [MLX5_EXPANSION_GRE] = { 515 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 516 MLX5_EXPANSION_IPV6), 517 .type = RTE_FLOW_ITEM_TYPE_GRE, 518 }, 519 [MLX5_EXPANSION_MPLS] = { 520 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 521 MLX5_EXPANSION_IPV6), 522 .type = RTE_FLOW_ITEM_TYPE_MPLS, 523 }, 524 [MLX5_EXPANSION_ETH] = { 525 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 526 MLX5_EXPANSION_IPV6), 527 .type = RTE_FLOW_ITEM_TYPE_ETH, 528 }, 529 [MLX5_EXPANSION_ETH_VLAN] = { 530 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 531 .type = RTE_FLOW_ITEM_TYPE_ETH, 532 }, 533 [MLX5_EXPANSION_VLAN] = { 534 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 535 MLX5_EXPANSION_IPV6), 536 .type = RTE_FLOW_ITEM_TYPE_VLAN, 537 }, 538 [MLX5_EXPANSION_IPV4] = { 539 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 540 MLX5_EXPANSION_IPV4_TCP), 541 .type = RTE_FLOW_ITEM_TYPE_IPV4, 542 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 543 ETH_RSS_NONFRAG_IPV4_OTHER, 544 }, 545 [MLX5_EXPANSION_IPV4_UDP] = { 546 .type = RTE_FLOW_ITEM_TYPE_UDP, 547 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 548 }, 549 [MLX5_EXPANSION_IPV4_TCP] = { 550 .type = RTE_FLOW_ITEM_TYPE_TCP, 551 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 552 }, 553 [MLX5_EXPANSION_IPV6] = { 554 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 555 MLX5_EXPANSION_IPV6_TCP), 556 .type = RTE_FLOW_ITEM_TYPE_IPV6, 557 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 558 ETH_RSS_NONFRAG_IPV6_OTHER, 559 }, 560 [MLX5_EXPANSION_IPV6_UDP] = { 561 .type = RTE_FLOW_ITEM_TYPE_UDP, 562 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 563 }, 564 [MLX5_EXPANSION_IPV6_TCP] = { 565 .type = RTE_FLOW_ITEM_TYPE_TCP, 566 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 567 }, 568 }; 569 570 static struct rte_flow_action_handle * 571 mlx5_action_handle_create(struct rte_eth_dev *dev, 572 const struct rte_flow_indir_action_conf *conf, 573 const struct rte_flow_action *action, 574 struct rte_flow_error *error); 575 static int mlx5_action_handle_destroy 576 (struct rte_eth_dev *dev, 577 struct rte_flow_action_handle *handle, 578 struct rte_flow_error *error); 579 static int mlx5_action_handle_update 580 (struct rte_eth_dev *dev, 581 struct rte_flow_action_handle *handle, 582 const void *update, 583 struct rte_flow_error *error); 584 static int mlx5_action_handle_query 585 (struct rte_eth_dev *dev, 586 const struct rte_flow_action_handle *handle, 587 void *data, 588 struct rte_flow_error *error); 589 static int 590 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 591 struct rte_flow_tunnel *app_tunnel, 592 struct rte_flow_action **actions, 593 uint32_t *num_of_actions, 594 struct rte_flow_error *error); 595 static int 596 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 597 struct rte_flow_tunnel *app_tunnel, 598 struct rte_flow_item **items, 599 uint32_t *num_of_items, 600 struct rte_flow_error *error); 601 static int 602 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 603 struct rte_flow_item *pmd_items, 604 uint32_t num_items, struct rte_flow_error *err); 605 static int 606 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 607 struct rte_flow_action *pmd_actions, 608 uint32_t num_actions, 609 struct rte_flow_error *err); 610 static int 611 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 612 struct rte_mbuf *m, 613 struct rte_flow_restore_info *info, 614 struct rte_flow_error *err); 615 616 static const struct rte_flow_ops mlx5_flow_ops = { 617 .validate = mlx5_flow_validate, 618 .create = mlx5_flow_create, 619 .destroy = mlx5_flow_destroy, 620 .flush = mlx5_flow_flush, 621 .isolate = mlx5_flow_isolate, 622 .query = mlx5_flow_query, 623 .dev_dump = mlx5_flow_dev_dump, 624 .get_aged_flows = mlx5_flow_get_aged_flows, 625 .action_handle_create = mlx5_action_handle_create, 626 .action_handle_destroy = mlx5_action_handle_destroy, 627 .action_handle_update = mlx5_action_handle_update, 628 .action_handle_query = mlx5_action_handle_query, 629 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 630 .tunnel_match = mlx5_flow_tunnel_match, 631 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release, 632 .tunnel_item_release = mlx5_flow_tunnel_item_release, 633 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 634 }; 635 636 /* Tunnel information. */ 637 struct mlx5_flow_tunnel_info { 638 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 639 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 640 }; 641 642 static struct mlx5_flow_tunnel_info tunnels_info[] = { 643 { 644 .tunnel = MLX5_FLOW_LAYER_VXLAN, 645 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 646 }, 647 { 648 .tunnel = MLX5_FLOW_LAYER_GENEVE, 649 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 650 }, 651 { 652 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 653 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 654 }, 655 { 656 .tunnel = MLX5_FLOW_LAYER_GRE, 657 .ptype = RTE_PTYPE_TUNNEL_GRE, 658 }, 659 { 660 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 661 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 662 }, 663 { 664 .tunnel = MLX5_FLOW_LAYER_MPLS, 665 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 666 }, 667 { 668 .tunnel = MLX5_FLOW_LAYER_NVGRE, 669 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 670 }, 671 { 672 .tunnel = MLX5_FLOW_LAYER_IPIP, 673 .ptype = RTE_PTYPE_TUNNEL_IP, 674 }, 675 { 676 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 677 .ptype = RTE_PTYPE_TUNNEL_IP, 678 }, 679 { 680 .tunnel = MLX5_FLOW_LAYER_GTP, 681 .ptype = RTE_PTYPE_TUNNEL_GTPU, 682 }, 683 }; 684 685 686 687 /** 688 * Translate tag ID to register. 689 * 690 * @param[in] dev 691 * Pointer to the Ethernet device structure. 692 * @param[in] feature 693 * The feature that request the register. 694 * @param[in] id 695 * The request register ID. 696 * @param[out] error 697 * Error description in case of any. 698 * 699 * @return 700 * The request register on success, a negative errno 701 * value otherwise and rte_errno is set. 702 */ 703 int 704 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 705 enum mlx5_feature_name feature, 706 uint32_t id, 707 struct rte_flow_error *error) 708 { 709 struct mlx5_priv *priv = dev->data->dev_private; 710 struct mlx5_dev_config *config = &priv->config; 711 enum modify_reg start_reg; 712 bool skip_mtr_reg = false; 713 714 switch (feature) { 715 case MLX5_HAIRPIN_RX: 716 return REG_B; 717 case MLX5_HAIRPIN_TX: 718 return REG_A; 719 case MLX5_METADATA_RX: 720 switch (config->dv_xmeta_en) { 721 case MLX5_XMETA_MODE_LEGACY: 722 return REG_B; 723 case MLX5_XMETA_MODE_META16: 724 return REG_C_0; 725 case MLX5_XMETA_MODE_META32: 726 return REG_C_1; 727 } 728 break; 729 case MLX5_METADATA_TX: 730 return REG_A; 731 case MLX5_METADATA_FDB: 732 switch (config->dv_xmeta_en) { 733 case MLX5_XMETA_MODE_LEGACY: 734 return REG_NON; 735 case MLX5_XMETA_MODE_META16: 736 return REG_C_0; 737 case MLX5_XMETA_MODE_META32: 738 return REG_C_1; 739 } 740 break; 741 case MLX5_FLOW_MARK: 742 switch (config->dv_xmeta_en) { 743 case MLX5_XMETA_MODE_LEGACY: 744 return REG_NON; 745 case MLX5_XMETA_MODE_META16: 746 return REG_C_1; 747 case MLX5_XMETA_MODE_META32: 748 return REG_C_0; 749 } 750 break; 751 case MLX5_MTR_ID: 752 /* 753 * If meter color and meter id share one register, flow match 754 * should use the meter color register for match. 755 */ 756 if (priv->mtr_reg_share) 757 return priv->mtr_color_reg; 758 else 759 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 760 REG_C_3; 761 case MLX5_MTR_COLOR: 762 case MLX5_ASO_FLOW_HIT: /* Both features use the same REG_C. */ 763 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 764 return priv->mtr_color_reg; 765 case MLX5_COPY_MARK: 766 /* 767 * Metadata COPY_MARK register using is in meter suffix sub 768 * flow while with meter. It's safe to share the same register. 769 */ 770 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 771 case MLX5_APP_TAG: 772 /* 773 * If meter is enable, it will engage the register for color 774 * match and flow match. If meter color match is not using the 775 * REG_C_2, need to skip the REG_C_x be used by meter color 776 * match. 777 * If meter is disable, free to use all available registers. 778 */ 779 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 780 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 781 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 782 if (id > (uint32_t)(REG_C_7 - start_reg)) 783 return rte_flow_error_set(error, EINVAL, 784 RTE_FLOW_ERROR_TYPE_ITEM, 785 NULL, "invalid tag id"); 786 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 787 return rte_flow_error_set(error, ENOTSUP, 788 RTE_FLOW_ERROR_TYPE_ITEM, 789 NULL, "unsupported tag id"); 790 /* 791 * This case means meter is using the REG_C_x great than 2. 792 * Take care not to conflict with meter color REG_C_x. 793 * If the available index REG_C_y >= REG_C_x, skip the 794 * color register. 795 */ 796 if (skip_mtr_reg && config->flow_mreg_c 797 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 798 if (id >= (uint32_t)(REG_C_7 - start_reg)) 799 return rte_flow_error_set(error, EINVAL, 800 RTE_FLOW_ERROR_TYPE_ITEM, 801 NULL, "invalid tag id"); 802 if (config->flow_mreg_c 803 [id + 1 + start_reg - REG_C_0] != REG_NON) 804 return config->flow_mreg_c 805 [id + 1 + start_reg - REG_C_0]; 806 return rte_flow_error_set(error, ENOTSUP, 807 RTE_FLOW_ERROR_TYPE_ITEM, 808 NULL, "unsupported tag id"); 809 } 810 return config->flow_mreg_c[id + start_reg - REG_C_0]; 811 } 812 MLX5_ASSERT(false); 813 return rte_flow_error_set(error, EINVAL, 814 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 815 NULL, "invalid feature name"); 816 } 817 818 /** 819 * Check extensive flow metadata register support. 820 * 821 * @param dev 822 * Pointer to rte_eth_dev structure. 823 * 824 * @return 825 * True if device supports extensive flow metadata register, otherwise false. 826 */ 827 bool 828 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 829 { 830 struct mlx5_priv *priv = dev->data->dev_private; 831 struct mlx5_dev_config *config = &priv->config; 832 833 /* 834 * Having available reg_c can be regarded inclusively as supporting 835 * extensive flow metadata register, which could mean, 836 * - metadata register copy action by modify header. 837 * - 16 modify header actions is supported. 838 * - reg_c's are preserved across different domain (FDB and NIC) on 839 * packet loopback by flow lookup miss. 840 */ 841 return config->flow_mreg_c[2] != REG_NON; 842 } 843 844 /** 845 * Get the lowest priority. 846 * 847 * @param[in] dev 848 * Pointer to the Ethernet device structure. 849 * @param[in] attributes 850 * Pointer to device flow rule attributes. 851 * 852 * @return 853 * The value of lowest priority of flow. 854 */ 855 uint32_t 856 mlx5_get_lowest_priority(struct rte_eth_dev *dev, 857 const struct rte_flow_attr *attr) 858 { 859 struct mlx5_priv *priv = dev->data->dev_private; 860 861 if (!attr->group && !attr->transfer) 862 return priv->config.flow_prio - 2; 863 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1; 864 } 865 866 /** 867 * Calculate matcher priority of the flow. 868 * 869 * @param[in] dev 870 * Pointer to the Ethernet device structure. 871 * @param[in] attr 872 * Pointer to device flow rule attributes. 873 * @param[in] subpriority 874 * The priority based on the items. 875 * @return 876 * The matcher priority of the flow. 877 */ 878 uint16_t 879 mlx5_get_matcher_priority(struct rte_eth_dev *dev, 880 const struct rte_flow_attr *attr, 881 uint32_t subpriority) 882 { 883 uint16_t priority = (uint16_t)attr->priority; 884 struct mlx5_priv *priv = dev->data->dev_private; 885 886 if (!attr->group && !attr->transfer) { 887 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 888 priority = priv->config.flow_prio - 1; 889 return mlx5_os_flow_adjust_priority(dev, priority, subpriority); 890 } 891 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 892 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO; 893 return priority * 3 + subpriority; 894 } 895 896 /** 897 * Verify the @p item specifications (spec, last, mask) are compatible with the 898 * NIC capabilities. 899 * 900 * @param[in] item 901 * Item specification. 902 * @param[in] mask 903 * @p item->mask or flow default bit-masks. 904 * @param[in] nic_mask 905 * Bit-masks covering supported fields by the NIC to compare with user mask. 906 * @param[in] size 907 * Bit-masks size in bytes. 908 * @param[in] range_accepted 909 * True if range of values is accepted for specific fields, false otherwise. 910 * @param[out] error 911 * Pointer to error structure. 912 * 913 * @return 914 * 0 on success, a negative errno value otherwise and rte_errno is set. 915 */ 916 int 917 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 918 const uint8_t *mask, 919 const uint8_t *nic_mask, 920 unsigned int size, 921 bool range_accepted, 922 struct rte_flow_error *error) 923 { 924 unsigned int i; 925 926 MLX5_ASSERT(nic_mask); 927 for (i = 0; i < size; ++i) 928 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 929 return rte_flow_error_set(error, ENOTSUP, 930 RTE_FLOW_ERROR_TYPE_ITEM, 931 item, 932 "mask enables non supported" 933 " bits"); 934 if (!item->spec && (item->mask || item->last)) 935 return rte_flow_error_set(error, EINVAL, 936 RTE_FLOW_ERROR_TYPE_ITEM, item, 937 "mask/last without a spec is not" 938 " supported"); 939 if (item->spec && item->last && !range_accepted) { 940 uint8_t spec[size]; 941 uint8_t last[size]; 942 unsigned int i; 943 int ret; 944 945 for (i = 0; i < size; ++i) { 946 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 947 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 948 } 949 ret = memcmp(spec, last, size); 950 if (ret != 0) 951 return rte_flow_error_set(error, EINVAL, 952 RTE_FLOW_ERROR_TYPE_ITEM, 953 item, 954 "range is not valid"); 955 } 956 return 0; 957 } 958 959 /** 960 * Adjust the hash fields according to the @p flow information. 961 * 962 * @param[in] dev_flow. 963 * Pointer to the mlx5_flow. 964 * @param[in] tunnel 965 * 1 when the hash field is for a tunnel item. 966 * @param[in] layer_types 967 * ETH_RSS_* types. 968 * @param[in] hash_fields 969 * Item hash fields. 970 * 971 * @return 972 * The hash fields that should be used. 973 */ 974 uint64_t 975 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 976 int tunnel __rte_unused, uint64_t layer_types, 977 uint64_t hash_fields) 978 { 979 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 980 int rss_request_inner = rss_desc->level >= 2; 981 982 /* Check RSS hash level for tunnel. */ 983 if (tunnel && rss_request_inner) 984 hash_fields |= IBV_RX_HASH_INNER; 985 else if (tunnel || rss_request_inner) 986 return 0; 987 #endif 988 /* Check if requested layer matches RSS hash fields. */ 989 if (!(rss_desc->types & layer_types)) 990 return 0; 991 return hash_fields; 992 } 993 994 /** 995 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 996 * if several tunnel rules are used on this queue, the tunnel ptype will be 997 * cleared. 998 * 999 * @param rxq_ctrl 1000 * Rx queue to update. 1001 */ 1002 static void 1003 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1004 { 1005 unsigned int i; 1006 uint32_t tunnel_ptype = 0; 1007 1008 /* Look up for the ptype to use. */ 1009 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1010 if (!rxq_ctrl->flow_tunnels_n[i]) 1011 continue; 1012 if (!tunnel_ptype) { 1013 tunnel_ptype = tunnels_info[i].ptype; 1014 } else { 1015 tunnel_ptype = 0; 1016 break; 1017 } 1018 } 1019 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1020 } 1021 1022 /** 1023 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1024 * flow. 1025 * 1026 * @param[in] dev 1027 * Pointer to the Ethernet device structure. 1028 * @param[in] dev_handle 1029 * Pointer to device flow handle structure. 1030 */ 1031 void 1032 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1033 struct mlx5_flow_handle *dev_handle) 1034 { 1035 struct mlx5_priv *priv = dev->data->dev_private; 1036 const int mark = dev_handle->mark; 1037 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1038 struct mlx5_ind_table_obj *ind_tbl = NULL; 1039 unsigned int i; 1040 1041 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1042 struct mlx5_hrxq *hrxq; 1043 1044 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1045 dev_handle->rix_hrxq); 1046 if (hrxq) 1047 ind_tbl = hrxq->ind_table; 1048 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1049 struct mlx5_shared_action_rss *shared_rss; 1050 1051 shared_rss = mlx5_ipool_get 1052 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1053 dev_handle->rix_srss); 1054 if (shared_rss) 1055 ind_tbl = shared_rss->ind_tbl; 1056 } 1057 if (!ind_tbl) 1058 return; 1059 for (i = 0; i != ind_tbl->queues_n; ++i) { 1060 int idx = ind_tbl->queues[i]; 1061 struct mlx5_rxq_ctrl *rxq_ctrl = 1062 container_of((*priv->rxqs)[idx], 1063 struct mlx5_rxq_ctrl, rxq); 1064 1065 /* 1066 * To support metadata register copy on Tx loopback, 1067 * this must be always enabled (metadata may arive 1068 * from other port - not from local flows only. 1069 */ 1070 if (priv->config.dv_flow_en && 1071 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1072 mlx5_flow_ext_mreg_supported(dev)) { 1073 rxq_ctrl->rxq.mark = 1; 1074 rxq_ctrl->flow_mark_n = 1; 1075 } else if (mark) { 1076 rxq_ctrl->rxq.mark = 1; 1077 rxq_ctrl->flow_mark_n++; 1078 } 1079 if (tunnel) { 1080 unsigned int j; 1081 1082 /* Increase the counter matching the flow. */ 1083 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1084 if ((tunnels_info[j].tunnel & 1085 dev_handle->layers) == 1086 tunnels_info[j].tunnel) { 1087 rxq_ctrl->flow_tunnels_n[j]++; 1088 break; 1089 } 1090 } 1091 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1092 } 1093 } 1094 } 1095 1096 /** 1097 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1098 * 1099 * @param[in] dev 1100 * Pointer to the Ethernet device structure. 1101 * @param[in] flow 1102 * Pointer to flow structure. 1103 */ 1104 static void 1105 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1106 { 1107 struct mlx5_priv *priv = dev->data->dev_private; 1108 uint32_t handle_idx; 1109 struct mlx5_flow_handle *dev_handle; 1110 1111 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1112 handle_idx, dev_handle, next) 1113 flow_drv_rxq_flags_set(dev, dev_handle); 1114 } 1115 1116 /** 1117 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1118 * device flow if no other flow uses it with the same kind of request. 1119 * 1120 * @param dev 1121 * Pointer to Ethernet device. 1122 * @param[in] dev_handle 1123 * Pointer to the device flow handle structure. 1124 */ 1125 static void 1126 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1127 struct mlx5_flow_handle *dev_handle) 1128 { 1129 struct mlx5_priv *priv = dev->data->dev_private; 1130 const int mark = dev_handle->mark; 1131 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1132 struct mlx5_ind_table_obj *ind_tbl = NULL; 1133 unsigned int i; 1134 1135 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1136 struct mlx5_hrxq *hrxq; 1137 1138 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1139 dev_handle->rix_hrxq); 1140 if (hrxq) 1141 ind_tbl = hrxq->ind_table; 1142 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1143 struct mlx5_shared_action_rss *shared_rss; 1144 1145 shared_rss = mlx5_ipool_get 1146 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1147 dev_handle->rix_srss); 1148 if (shared_rss) 1149 ind_tbl = shared_rss->ind_tbl; 1150 } 1151 if (!ind_tbl) 1152 return; 1153 MLX5_ASSERT(dev->data->dev_started); 1154 for (i = 0; i != ind_tbl->queues_n; ++i) { 1155 int idx = ind_tbl->queues[i]; 1156 struct mlx5_rxq_ctrl *rxq_ctrl = 1157 container_of((*priv->rxqs)[idx], 1158 struct mlx5_rxq_ctrl, rxq); 1159 1160 if (priv->config.dv_flow_en && 1161 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1162 mlx5_flow_ext_mreg_supported(dev)) { 1163 rxq_ctrl->rxq.mark = 1; 1164 rxq_ctrl->flow_mark_n = 1; 1165 } else if (mark) { 1166 rxq_ctrl->flow_mark_n--; 1167 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1168 } 1169 if (tunnel) { 1170 unsigned int j; 1171 1172 /* Decrease the counter matching the flow. */ 1173 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1174 if ((tunnels_info[j].tunnel & 1175 dev_handle->layers) == 1176 tunnels_info[j].tunnel) { 1177 rxq_ctrl->flow_tunnels_n[j]--; 1178 break; 1179 } 1180 } 1181 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1182 } 1183 } 1184 } 1185 1186 /** 1187 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1188 * @p flow if no other flow uses it with the same kind of request. 1189 * 1190 * @param dev 1191 * Pointer to Ethernet device. 1192 * @param[in] flow 1193 * Pointer to the flow. 1194 */ 1195 static void 1196 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1197 { 1198 struct mlx5_priv *priv = dev->data->dev_private; 1199 uint32_t handle_idx; 1200 struct mlx5_flow_handle *dev_handle; 1201 1202 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1203 handle_idx, dev_handle, next) 1204 flow_drv_rxq_flags_trim(dev, dev_handle); 1205 } 1206 1207 /** 1208 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1209 * 1210 * @param dev 1211 * Pointer to Ethernet device. 1212 */ 1213 static void 1214 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1215 { 1216 struct mlx5_priv *priv = dev->data->dev_private; 1217 unsigned int i; 1218 1219 for (i = 0; i != priv->rxqs_n; ++i) { 1220 struct mlx5_rxq_ctrl *rxq_ctrl; 1221 unsigned int j; 1222 1223 if (!(*priv->rxqs)[i]) 1224 continue; 1225 rxq_ctrl = container_of((*priv->rxqs)[i], 1226 struct mlx5_rxq_ctrl, rxq); 1227 rxq_ctrl->flow_mark_n = 0; 1228 rxq_ctrl->rxq.mark = 0; 1229 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1230 rxq_ctrl->flow_tunnels_n[j] = 0; 1231 rxq_ctrl->rxq.tunnel = 0; 1232 } 1233 } 1234 1235 /** 1236 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1237 * 1238 * @param[in] dev 1239 * Pointer to the Ethernet device structure. 1240 */ 1241 void 1242 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1243 { 1244 struct mlx5_priv *priv = dev->data->dev_private; 1245 struct mlx5_rxq_data *data; 1246 unsigned int i; 1247 1248 for (i = 0; i != priv->rxqs_n; ++i) { 1249 if (!(*priv->rxqs)[i]) 1250 continue; 1251 data = (*priv->rxqs)[i]; 1252 if (!rte_flow_dynf_metadata_avail()) { 1253 data->dynf_meta = 0; 1254 data->flow_meta_mask = 0; 1255 data->flow_meta_offset = -1; 1256 data->flow_meta_port_mask = 0; 1257 } else { 1258 data->dynf_meta = 1; 1259 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1260 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1261 data->flow_meta_port_mask = (uint32_t)~0; 1262 if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16) 1263 data->flow_meta_port_mask >>= 16; 1264 } 1265 } 1266 } 1267 1268 /* 1269 * return a pointer to the desired action in the list of actions. 1270 * 1271 * @param[in] actions 1272 * The list of actions to search the action in. 1273 * @param[in] action 1274 * The action to find. 1275 * 1276 * @return 1277 * Pointer to the action in the list, if found. NULL otherwise. 1278 */ 1279 const struct rte_flow_action * 1280 mlx5_flow_find_action(const struct rte_flow_action *actions, 1281 enum rte_flow_action_type action) 1282 { 1283 if (actions == NULL) 1284 return NULL; 1285 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1286 if (actions->type == action) 1287 return actions; 1288 return NULL; 1289 } 1290 1291 /* 1292 * Validate the flag action. 1293 * 1294 * @param[in] action_flags 1295 * Bit-fields that holds the actions detected until now. 1296 * @param[in] attr 1297 * Attributes of flow that includes this action. 1298 * @param[out] error 1299 * Pointer to error structure. 1300 * 1301 * @return 1302 * 0 on success, a negative errno value otherwise and rte_errno is set. 1303 */ 1304 int 1305 mlx5_flow_validate_action_flag(uint64_t action_flags, 1306 const struct rte_flow_attr *attr, 1307 struct rte_flow_error *error) 1308 { 1309 if (action_flags & MLX5_FLOW_ACTION_MARK) 1310 return rte_flow_error_set(error, EINVAL, 1311 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1312 "can't mark and flag in same flow"); 1313 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1314 return rte_flow_error_set(error, EINVAL, 1315 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1316 "can't have 2 flag" 1317 " actions in same flow"); 1318 if (attr->egress) 1319 return rte_flow_error_set(error, ENOTSUP, 1320 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1321 "flag action not supported for " 1322 "egress"); 1323 return 0; 1324 } 1325 1326 /* 1327 * Validate the mark action. 1328 * 1329 * @param[in] action 1330 * Pointer to the queue action. 1331 * @param[in] action_flags 1332 * Bit-fields that holds the actions detected until now. 1333 * @param[in] attr 1334 * Attributes of flow that includes this action. 1335 * @param[out] error 1336 * Pointer to error structure. 1337 * 1338 * @return 1339 * 0 on success, a negative errno value otherwise and rte_errno is set. 1340 */ 1341 int 1342 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1343 uint64_t action_flags, 1344 const struct rte_flow_attr *attr, 1345 struct rte_flow_error *error) 1346 { 1347 const struct rte_flow_action_mark *mark = action->conf; 1348 1349 if (!mark) 1350 return rte_flow_error_set(error, EINVAL, 1351 RTE_FLOW_ERROR_TYPE_ACTION, 1352 action, 1353 "configuration cannot be null"); 1354 if (mark->id >= MLX5_FLOW_MARK_MAX) 1355 return rte_flow_error_set(error, EINVAL, 1356 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1357 &mark->id, 1358 "mark id must in 0 <= id < " 1359 RTE_STR(MLX5_FLOW_MARK_MAX)); 1360 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1361 return rte_flow_error_set(error, EINVAL, 1362 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1363 "can't flag and mark in same flow"); 1364 if (action_flags & MLX5_FLOW_ACTION_MARK) 1365 return rte_flow_error_set(error, EINVAL, 1366 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1367 "can't have 2 mark actions in same" 1368 " flow"); 1369 if (attr->egress) 1370 return rte_flow_error_set(error, ENOTSUP, 1371 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1372 "mark action not supported for " 1373 "egress"); 1374 return 0; 1375 } 1376 1377 /* 1378 * Validate the drop action. 1379 * 1380 * @param[in] action_flags 1381 * Bit-fields that holds the actions detected until now. 1382 * @param[in] attr 1383 * Attributes of flow that includes this action. 1384 * @param[out] error 1385 * Pointer to error structure. 1386 * 1387 * @return 1388 * 0 on success, a negative errno value otherwise and rte_errno is set. 1389 */ 1390 int 1391 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1392 const struct rte_flow_attr *attr, 1393 struct rte_flow_error *error) 1394 { 1395 if (attr->egress) 1396 return rte_flow_error_set(error, ENOTSUP, 1397 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1398 "drop action not supported for " 1399 "egress"); 1400 return 0; 1401 } 1402 1403 /* 1404 * Validate the queue action. 1405 * 1406 * @param[in] action 1407 * Pointer to the queue action. 1408 * @param[in] action_flags 1409 * Bit-fields that holds the actions detected until now. 1410 * @param[in] dev 1411 * Pointer to the Ethernet device structure. 1412 * @param[in] attr 1413 * Attributes of flow that includes this action. 1414 * @param[out] error 1415 * Pointer to error structure. 1416 * 1417 * @return 1418 * 0 on success, a negative errno value otherwise and rte_errno is set. 1419 */ 1420 int 1421 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1422 uint64_t action_flags, 1423 struct rte_eth_dev *dev, 1424 const struct rte_flow_attr *attr, 1425 struct rte_flow_error *error) 1426 { 1427 struct mlx5_priv *priv = dev->data->dev_private; 1428 const struct rte_flow_action_queue *queue = action->conf; 1429 1430 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1431 return rte_flow_error_set(error, EINVAL, 1432 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1433 "can't have 2 fate actions in" 1434 " same flow"); 1435 if (!priv->rxqs_n) 1436 return rte_flow_error_set(error, EINVAL, 1437 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1438 NULL, "No Rx queues configured"); 1439 if (queue->index >= priv->rxqs_n) 1440 return rte_flow_error_set(error, EINVAL, 1441 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1442 &queue->index, 1443 "queue index out of range"); 1444 if (!(*priv->rxqs)[queue->index]) 1445 return rte_flow_error_set(error, EINVAL, 1446 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1447 &queue->index, 1448 "queue is not configured"); 1449 if (attr->egress) 1450 return rte_flow_error_set(error, ENOTSUP, 1451 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1452 "queue action not supported for " 1453 "egress"); 1454 return 0; 1455 } 1456 1457 /* 1458 * Validate the rss action. 1459 * 1460 * @param[in] dev 1461 * Pointer to the Ethernet device structure. 1462 * @param[in] action 1463 * Pointer to the queue action. 1464 * @param[out] error 1465 * Pointer to error structure. 1466 * 1467 * @return 1468 * 0 on success, a negative errno value otherwise and rte_errno is set. 1469 */ 1470 int 1471 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1472 const struct rte_flow_action *action, 1473 struct rte_flow_error *error) 1474 { 1475 struct mlx5_priv *priv = dev->data->dev_private; 1476 const struct rte_flow_action_rss *rss = action->conf; 1477 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; 1478 unsigned int i; 1479 1480 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1481 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1482 return rte_flow_error_set(error, ENOTSUP, 1483 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1484 &rss->func, 1485 "RSS hash function not supported"); 1486 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1487 if (rss->level > 2) 1488 #else 1489 if (rss->level > 1) 1490 #endif 1491 return rte_flow_error_set(error, ENOTSUP, 1492 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1493 &rss->level, 1494 "tunnel RSS is not supported"); 1495 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1496 if (rss->key_len == 0 && rss->key != NULL) 1497 return rte_flow_error_set(error, ENOTSUP, 1498 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1499 &rss->key_len, 1500 "RSS hash key length 0"); 1501 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1502 return rte_flow_error_set(error, ENOTSUP, 1503 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1504 &rss->key_len, 1505 "RSS hash key too small"); 1506 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1507 return rte_flow_error_set(error, ENOTSUP, 1508 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1509 &rss->key_len, 1510 "RSS hash key too large"); 1511 if (rss->queue_num > priv->config.ind_table_max_size) 1512 return rte_flow_error_set(error, ENOTSUP, 1513 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1514 &rss->queue_num, 1515 "number of queues too large"); 1516 if (rss->types & MLX5_RSS_HF_MASK) 1517 return rte_flow_error_set(error, ENOTSUP, 1518 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1519 &rss->types, 1520 "some RSS protocols are not" 1521 " supported"); 1522 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) && 1523 !(rss->types & ETH_RSS_IP)) 1524 return rte_flow_error_set(error, EINVAL, 1525 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1526 "L3 partial RSS requested but L3 RSS" 1527 " type not specified"); 1528 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) && 1529 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP))) 1530 return rte_flow_error_set(error, EINVAL, 1531 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1532 "L4 partial RSS requested but L4 RSS" 1533 " type not specified"); 1534 if (!priv->rxqs_n) 1535 return rte_flow_error_set(error, EINVAL, 1536 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1537 NULL, "No Rx queues configured"); 1538 if (!rss->queue_num) 1539 return rte_flow_error_set(error, EINVAL, 1540 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1541 NULL, "No queues configured"); 1542 for (i = 0; i != rss->queue_num; ++i) { 1543 struct mlx5_rxq_ctrl *rxq_ctrl; 1544 1545 if (rss->queue[i] >= priv->rxqs_n) 1546 return rte_flow_error_set 1547 (error, EINVAL, 1548 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1549 &rss->queue[i], "queue index out of range"); 1550 if (!(*priv->rxqs)[rss->queue[i]]) 1551 return rte_flow_error_set 1552 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1553 &rss->queue[i], "queue is not configured"); 1554 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]], 1555 struct mlx5_rxq_ctrl, rxq); 1556 if (i == 0) 1557 rxq_type = rxq_ctrl->type; 1558 if (rxq_type != rxq_ctrl->type) 1559 return rte_flow_error_set 1560 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1561 &rss->queue[i], 1562 "combining hairpin and regular RSS queues is not supported"); 1563 } 1564 return 0; 1565 } 1566 1567 /* 1568 * Validate the rss action. 1569 * 1570 * @param[in] action 1571 * Pointer to the queue action. 1572 * @param[in] action_flags 1573 * Bit-fields that holds the actions detected until now. 1574 * @param[in] dev 1575 * Pointer to the Ethernet device structure. 1576 * @param[in] attr 1577 * Attributes of flow that includes this action. 1578 * @param[in] item_flags 1579 * Items that were detected. 1580 * @param[out] error 1581 * Pointer to error structure. 1582 * 1583 * @return 1584 * 0 on success, a negative errno value otherwise and rte_errno is set. 1585 */ 1586 int 1587 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1588 uint64_t action_flags, 1589 struct rte_eth_dev *dev, 1590 const struct rte_flow_attr *attr, 1591 uint64_t item_flags, 1592 struct rte_flow_error *error) 1593 { 1594 const struct rte_flow_action_rss *rss = action->conf; 1595 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1596 int ret; 1597 1598 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1599 return rte_flow_error_set(error, EINVAL, 1600 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1601 "can't have 2 fate actions" 1602 " in same flow"); 1603 ret = mlx5_validate_action_rss(dev, action, error); 1604 if (ret) 1605 return ret; 1606 if (attr->egress) 1607 return rte_flow_error_set(error, ENOTSUP, 1608 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1609 "rss action not supported for " 1610 "egress"); 1611 if (rss->level > 1 && !tunnel) 1612 return rte_flow_error_set(error, EINVAL, 1613 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1614 "inner RSS is not supported for " 1615 "non-tunnel flows"); 1616 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1617 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1618 return rte_flow_error_set(error, EINVAL, 1619 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1620 "RSS on eCPRI is not supported now"); 1621 } 1622 return 0; 1623 } 1624 1625 /* 1626 * Validate the default miss action. 1627 * 1628 * @param[in] action_flags 1629 * Bit-fields that holds the actions detected until now. 1630 * @param[out] error 1631 * Pointer to error structure. 1632 * 1633 * @return 1634 * 0 on success, a negative errno value otherwise and rte_errno is set. 1635 */ 1636 int 1637 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1638 const struct rte_flow_attr *attr, 1639 struct rte_flow_error *error) 1640 { 1641 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1642 return rte_flow_error_set(error, EINVAL, 1643 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1644 "can't have 2 fate actions in" 1645 " same flow"); 1646 if (attr->egress) 1647 return rte_flow_error_set(error, ENOTSUP, 1648 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1649 "default miss action not supported " 1650 "for egress"); 1651 if (attr->group) 1652 return rte_flow_error_set(error, ENOTSUP, 1653 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1654 "only group 0 is supported"); 1655 if (attr->transfer) 1656 return rte_flow_error_set(error, ENOTSUP, 1657 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1658 NULL, "transfer is not supported"); 1659 return 0; 1660 } 1661 1662 /* 1663 * Validate the count action. 1664 * 1665 * @param[in] dev 1666 * Pointer to the Ethernet device structure. 1667 * @param[in] attr 1668 * Attributes of flow that includes this action. 1669 * @param[out] error 1670 * Pointer to error structure. 1671 * 1672 * @return 1673 * 0 on success, a negative errno value otherwise and rte_errno is set. 1674 */ 1675 int 1676 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1677 const struct rte_flow_attr *attr, 1678 struct rte_flow_error *error) 1679 { 1680 if (attr->egress) 1681 return rte_flow_error_set(error, ENOTSUP, 1682 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1683 "count action not supported for " 1684 "egress"); 1685 return 0; 1686 } 1687 1688 /** 1689 * Verify the @p attributes will be correctly understood by the NIC and store 1690 * them in the @p flow if everything is correct. 1691 * 1692 * @param[in] dev 1693 * Pointer to the Ethernet device structure. 1694 * @param[in] attributes 1695 * Pointer to flow attributes 1696 * @param[out] error 1697 * Pointer to error structure. 1698 * 1699 * @return 1700 * 0 on success, a negative errno value otherwise and rte_errno is set. 1701 */ 1702 int 1703 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1704 const struct rte_flow_attr *attributes, 1705 struct rte_flow_error *error) 1706 { 1707 struct mlx5_priv *priv = dev->data->dev_private; 1708 uint32_t priority_max = priv->config.flow_prio - 1; 1709 1710 if (attributes->group) 1711 return rte_flow_error_set(error, ENOTSUP, 1712 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1713 NULL, "groups is not supported"); 1714 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR && 1715 attributes->priority >= priority_max) 1716 return rte_flow_error_set(error, ENOTSUP, 1717 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1718 NULL, "priority out of range"); 1719 if (attributes->egress) 1720 return rte_flow_error_set(error, ENOTSUP, 1721 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1722 "egress is not supported"); 1723 if (attributes->transfer && !priv->config.dv_esw_en) 1724 return rte_flow_error_set(error, ENOTSUP, 1725 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1726 NULL, "transfer is not supported"); 1727 if (!attributes->ingress) 1728 return rte_flow_error_set(error, EINVAL, 1729 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1730 NULL, 1731 "ingress attribute is mandatory"); 1732 return 0; 1733 } 1734 1735 /** 1736 * Validate ICMP6 item. 1737 * 1738 * @param[in] item 1739 * Item specification. 1740 * @param[in] item_flags 1741 * Bit-fields that holds the items detected until now. 1742 * @param[in] ext_vlan_sup 1743 * Whether extended VLAN features are supported or not. 1744 * @param[out] error 1745 * Pointer to error structure. 1746 * 1747 * @return 1748 * 0 on success, a negative errno value otherwise and rte_errno is set. 1749 */ 1750 int 1751 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1752 uint64_t item_flags, 1753 uint8_t target_protocol, 1754 struct rte_flow_error *error) 1755 { 1756 const struct rte_flow_item_icmp6 *mask = item->mask; 1757 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1758 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1759 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1760 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1761 MLX5_FLOW_LAYER_OUTER_L4; 1762 int ret; 1763 1764 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1765 return rte_flow_error_set(error, EINVAL, 1766 RTE_FLOW_ERROR_TYPE_ITEM, item, 1767 "protocol filtering not compatible" 1768 " with ICMP6 layer"); 1769 if (!(item_flags & l3m)) 1770 return rte_flow_error_set(error, EINVAL, 1771 RTE_FLOW_ERROR_TYPE_ITEM, item, 1772 "IPv6 is mandatory to filter on" 1773 " ICMP6"); 1774 if (item_flags & l4m) 1775 return rte_flow_error_set(error, EINVAL, 1776 RTE_FLOW_ERROR_TYPE_ITEM, item, 1777 "multiple L4 layers not supported"); 1778 if (!mask) 1779 mask = &rte_flow_item_icmp6_mask; 1780 ret = mlx5_flow_item_acceptable 1781 (item, (const uint8_t *)mask, 1782 (const uint8_t *)&rte_flow_item_icmp6_mask, 1783 sizeof(struct rte_flow_item_icmp6), 1784 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1785 if (ret < 0) 1786 return ret; 1787 return 0; 1788 } 1789 1790 /** 1791 * Validate ICMP item. 1792 * 1793 * @param[in] item 1794 * Item specification. 1795 * @param[in] item_flags 1796 * Bit-fields that holds the items detected until now. 1797 * @param[out] error 1798 * Pointer to error structure. 1799 * 1800 * @return 1801 * 0 on success, a negative errno value otherwise and rte_errno is set. 1802 */ 1803 int 1804 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1805 uint64_t item_flags, 1806 uint8_t target_protocol, 1807 struct rte_flow_error *error) 1808 { 1809 const struct rte_flow_item_icmp *mask = item->mask; 1810 const struct rte_flow_item_icmp nic_mask = { 1811 .hdr.icmp_type = 0xff, 1812 .hdr.icmp_code = 0xff, 1813 .hdr.icmp_ident = RTE_BE16(0xffff), 1814 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 1815 }; 1816 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1817 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1818 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1819 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1820 MLX5_FLOW_LAYER_OUTER_L4; 1821 int ret; 1822 1823 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1824 return rte_flow_error_set(error, EINVAL, 1825 RTE_FLOW_ERROR_TYPE_ITEM, item, 1826 "protocol filtering not compatible" 1827 " with ICMP layer"); 1828 if (!(item_flags & l3m)) 1829 return rte_flow_error_set(error, EINVAL, 1830 RTE_FLOW_ERROR_TYPE_ITEM, item, 1831 "IPv4 is mandatory to filter" 1832 " on ICMP"); 1833 if (item_flags & l4m) 1834 return rte_flow_error_set(error, EINVAL, 1835 RTE_FLOW_ERROR_TYPE_ITEM, item, 1836 "multiple L4 layers not supported"); 1837 if (!mask) 1838 mask = &nic_mask; 1839 ret = mlx5_flow_item_acceptable 1840 (item, (const uint8_t *)mask, 1841 (const uint8_t *)&nic_mask, 1842 sizeof(struct rte_flow_item_icmp), 1843 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1844 if (ret < 0) 1845 return ret; 1846 return 0; 1847 } 1848 1849 /** 1850 * Validate Ethernet item. 1851 * 1852 * @param[in] item 1853 * Item specification. 1854 * @param[in] item_flags 1855 * Bit-fields that holds the items detected until now. 1856 * @param[out] error 1857 * Pointer to error structure. 1858 * 1859 * @return 1860 * 0 on success, a negative errno value otherwise and rte_errno is set. 1861 */ 1862 int 1863 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1864 uint64_t item_flags, bool ext_vlan_sup, 1865 struct rte_flow_error *error) 1866 { 1867 const struct rte_flow_item_eth *mask = item->mask; 1868 const struct rte_flow_item_eth nic_mask = { 1869 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1870 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1871 .type = RTE_BE16(0xffff), 1872 .has_vlan = ext_vlan_sup ? 1 : 0, 1873 }; 1874 int ret; 1875 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1876 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1877 MLX5_FLOW_LAYER_OUTER_L2; 1878 1879 if (item_flags & ethm) 1880 return rte_flow_error_set(error, ENOTSUP, 1881 RTE_FLOW_ERROR_TYPE_ITEM, item, 1882 "multiple L2 layers not supported"); 1883 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 1884 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 1885 return rte_flow_error_set(error, EINVAL, 1886 RTE_FLOW_ERROR_TYPE_ITEM, item, 1887 "L2 layer should not follow " 1888 "L3 layers"); 1889 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 1890 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 1891 return rte_flow_error_set(error, EINVAL, 1892 RTE_FLOW_ERROR_TYPE_ITEM, item, 1893 "L2 layer should not follow VLAN"); 1894 if (!mask) 1895 mask = &rte_flow_item_eth_mask; 1896 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1897 (const uint8_t *)&nic_mask, 1898 sizeof(struct rte_flow_item_eth), 1899 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1900 return ret; 1901 } 1902 1903 /** 1904 * Validate VLAN item. 1905 * 1906 * @param[in] item 1907 * Item specification. 1908 * @param[in] item_flags 1909 * Bit-fields that holds the items detected until now. 1910 * @param[in] dev 1911 * Ethernet device flow is being created on. 1912 * @param[out] error 1913 * Pointer to error structure. 1914 * 1915 * @return 1916 * 0 on success, a negative errno value otherwise and rte_errno is set. 1917 */ 1918 int 1919 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1920 uint64_t item_flags, 1921 struct rte_eth_dev *dev, 1922 struct rte_flow_error *error) 1923 { 1924 const struct rte_flow_item_vlan *spec = item->spec; 1925 const struct rte_flow_item_vlan *mask = item->mask; 1926 const struct rte_flow_item_vlan nic_mask = { 1927 .tci = RTE_BE16(UINT16_MAX), 1928 .inner_type = RTE_BE16(UINT16_MAX), 1929 }; 1930 uint16_t vlan_tag = 0; 1931 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1932 int ret; 1933 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1934 MLX5_FLOW_LAYER_INNER_L4) : 1935 (MLX5_FLOW_LAYER_OUTER_L3 | 1936 MLX5_FLOW_LAYER_OUTER_L4); 1937 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1938 MLX5_FLOW_LAYER_OUTER_VLAN; 1939 1940 if (item_flags & vlanm) 1941 return rte_flow_error_set(error, EINVAL, 1942 RTE_FLOW_ERROR_TYPE_ITEM, item, 1943 "multiple VLAN layers not supported"); 1944 else if ((item_flags & l34m) != 0) 1945 return rte_flow_error_set(error, EINVAL, 1946 RTE_FLOW_ERROR_TYPE_ITEM, item, 1947 "VLAN cannot follow L3/L4 layer"); 1948 if (!mask) 1949 mask = &rte_flow_item_vlan_mask; 1950 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1951 (const uint8_t *)&nic_mask, 1952 sizeof(struct rte_flow_item_vlan), 1953 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1954 if (ret) 1955 return ret; 1956 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 1957 struct mlx5_priv *priv = dev->data->dev_private; 1958 1959 if (priv->vmwa_context) { 1960 /* 1961 * Non-NULL context means we have a virtual machine 1962 * and SR-IOV enabled, we have to create VLAN interface 1963 * to make hypervisor to setup E-Switch vport 1964 * context correctly. We avoid creating the multiple 1965 * VLAN interfaces, so we cannot support VLAN tag mask. 1966 */ 1967 return rte_flow_error_set(error, EINVAL, 1968 RTE_FLOW_ERROR_TYPE_ITEM, 1969 item, 1970 "VLAN tag mask is not" 1971 " supported in virtual" 1972 " environment"); 1973 } 1974 } 1975 if (spec) { 1976 vlan_tag = spec->tci; 1977 vlan_tag &= mask->tci; 1978 } 1979 /* 1980 * From verbs perspective an empty VLAN is equivalent 1981 * to a packet without VLAN layer. 1982 */ 1983 if (!vlan_tag) 1984 return rte_flow_error_set(error, EINVAL, 1985 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1986 item->spec, 1987 "VLAN cannot be empty"); 1988 return 0; 1989 } 1990 1991 /** 1992 * Validate IPV4 item. 1993 * 1994 * @param[in] item 1995 * Item specification. 1996 * @param[in] item_flags 1997 * Bit-fields that holds the items detected until now. 1998 * @param[in] last_item 1999 * Previous validated item in the pattern items. 2000 * @param[in] ether_type 2001 * Type in the ethernet layer header (including dot1q). 2002 * @param[in] acc_mask 2003 * Acceptable mask, if NULL default internal default mask 2004 * will be used to check whether item fields are supported. 2005 * @param[in] range_accepted 2006 * True if range of values is accepted for specific fields, false otherwise. 2007 * @param[out] error 2008 * Pointer to error structure. 2009 * 2010 * @return 2011 * 0 on success, a negative errno value otherwise and rte_errno is set. 2012 */ 2013 int 2014 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2015 uint64_t item_flags, 2016 uint64_t last_item, 2017 uint16_t ether_type, 2018 const struct rte_flow_item_ipv4 *acc_mask, 2019 bool range_accepted, 2020 struct rte_flow_error *error) 2021 { 2022 const struct rte_flow_item_ipv4 *mask = item->mask; 2023 const struct rte_flow_item_ipv4 *spec = item->spec; 2024 const struct rte_flow_item_ipv4 nic_mask = { 2025 .hdr = { 2026 .src_addr = RTE_BE32(0xffffffff), 2027 .dst_addr = RTE_BE32(0xffffffff), 2028 .type_of_service = 0xff, 2029 .next_proto_id = 0xff, 2030 }, 2031 }; 2032 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2033 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2034 MLX5_FLOW_LAYER_OUTER_L3; 2035 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2036 MLX5_FLOW_LAYER_OUTER_L4; 2037 int ret; 2038 uint8_t next_proto = 0xFF; 2039 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2040 MLX5_FLOW_LAYER_OUTER_VLAN | 2041 MLX5_FLOW_LAYER_INNER_VLAN); 2042 2043 if ((last_item & l2_vlan) && ether_type && 2044 ether_type != RTE_ETHER_TYPE_IPV4) 2045 return rte_flow_error_set(error, EINVAL, 2046 RTE_FLOW_ERROR_TYPE_ITEM, item, 2047 "IPv4 cannot follow L2/VLAN layer " 2048 "which ether type is not IPv4"); 2049 if (item_flags & MLX5_FLOW_LAYER_IPIP) { 2050 if (mask && spec) 2051 next_proto = mask->hdr.next_proto_id & 2052 spec->hdr.next_proto_id; 2053 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2054 return rte_flow_error_set(error, EINVAL, 2055 RTE_FLOW_ERROR_TYPE_ITEM, 2056 item, 2057 "multiple tunnel " 2058 "not supported"); 2059 } 2060 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2061 return rte_flow_error_set(error, EINVAL, 2062 RTE_FLOW_ERROR_TYPE_ITEM, item, 2063 "wrong tunnel type - IPv6 specified " 2064 "but IPv4 item provided"); 2065 if (item_flags & l3m) 2066 return rte_flow_error_set(error, ENOTSUP, 2067 RTE_FLOW_ERROR_TYPE_ITEM, item, 2068 "multiple L3 layers not supported"); 2069 else if (item_flags & l4m) 2070 return rte_flow_error_set(error, EINVAL, 2071 RTE_FLOW_ERROR_TYPE_ITEM, item, 2072 "L3 cannot follow an L4 layer."); 2073 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2074 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2075 return rte_flow_error_set(error, EINVAL, 2076 RTE_FLOW_ERROR_TYPE_ITEM, item, 2077 "L3 cannot follow an NVGRE layer."); 2078 if (!mask) 2079 mask = &rte_flow_item_ipv4_mask; 2080 else if (mask->hdr.next_proto_id != 0 && 2081 mask->hdr.next_proto_id != 0xff) 2082 return rte_flow_error_set(error, EINVAL, 2083 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2084 "partial mask is not supported" 2085 " for protocol"); 2086 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2087 acc_mask ? (const uint8_t *)acc_mask 2088 : (const uint8_t *)&nic_mask, 2089 sizeof(struct rte_flow_item_ipv4), 2090 range_accepted, error); 2091 if (ret < 0) 2092 return ret; 2093 return 0; 2094 } 2095 2096 /** 2097 * Validate IPV6 item. 2098 * 2099 * @param[in] item 2100 * Item specification. 2101 * @param[in] item_flags 2102 * Bit-fields that holds the items detected until now. 2103 * @param[in] last_item 2104 * Previous validated item in the pattern items. 2105 * @param[in] ether_type 2106 * Type in the ethernet layer header (including dot1q). 2107 * @param[in] acc_mask 2108 * Acceptable mask, if NULL default internal default mask 2109 * will be used to check whether item fields are supported. 2110 * @param[out] error 2111 * Pointer to error structure. 2112 * 2113 * @return 2114 * 0 on success, a negative errno value otherwise and rte_errno is set. 2115 */ 2116 int 2117 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2118 uint64_t item_flags, 2119 uint64_t last_item, 2120 uint16_t ether_type, 2121 const struct rte_flow_item_ipv6 *acc_mask, 2122 struct rte_flow_error *error) 2123 { 2124 const struct rte_flow_item_ipv6 *mask = item->mask; 2125 const struct rte_flow_item_ipv6 *spec = item->spec; 2126 const struct rte_flow_item_ipv6 nic_mask = { 2127 .hdr = { 2128 .src_addr = 2129 "\xff\xff\xff\xff\xff\xff\xff\xff" 2130 "\xff\xff\xff\xff\xff\xff\xff\xff", 2131 .dst_addr = 2132 "\xff\xff\xff\xff\xff\xff\xff\xff" 2133 "\xff\xff\xff\xff\xff\xff\xff\xff", 2134 .vtc_flow = RTE_BE32(0xffffffff), 2135 .proto = 0xff, 2136 }, 2137 }; 2138 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2139 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2140 MLX5_FLOW_LAYER_OUTER_L3; 2141 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2142 MLX5_FLOW_LAYER_OUTER_L4; 2143 int ret; 2144 uint8_t next_proto = 0xFF; 2145 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2146 MLX5_FLOW_LAYER_OUTER_VLAN | 2147 MLX5_FLOW_LAYER_INNER_VLAN); 2148 2149 if ((last_item & l2_vlan) && ether_type && 2150 ether_type != RTE_ETHER_TYPE_IPV6) 2151 return rte_flow_error_set(error, EINVAL, 2152 RTE_FLOW_ERROR_TYPE_ITEM, item, 2153 "IPv6 cannot follow L2/VLAN layer " 2154 "which ether type is not IPv6"); 2155 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2156 next_proto = spec->hdr.proto; 2157 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) { 2158 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2159 return rte_flow_error_set(error, EINVAL, 2160 RTE_FLOW_ERROR_TYPE_ITEM, 2161 item, 2162 "multiple tunnel " 2163 "not supported"); 2164 } 2165 if (next_proto == IPPROTO_HOPOPTS || 2166 next_proto == IPPROTO_ROUTING || 2167 next_proto == IPPROTO_FRAGMENT || 2168 next_proto == IPPROTO_ESP || 2169 next_proto == IPPROTO_AH || 2170 next_proto == IPPROTO_DSTOPTS) 2171 return rte_flow_error_set(error, EINVAL, 2172 RTE_FLOW_ERROR_TYPE_ITEM, item, 2173 "IPv6 proto (next header) should " 2174 "not be set as extension header"); 2175 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2176 return rte_flow_error_set(error, EINVAL, 2177 RTE_FLOW_ERROR_TYPE_ITEM, item, 2178 "wrong tunnel type - IPv4 specified " 2179 "but IPv6 item provided"); 2180 if (item_flags & l3m) 2181 return rte_flow_error_set(error, ENOTSUP, 2182 RTE_FLOW_ERROR_TYPE_ITEM, item, 2183 "multiple L3 layers not supported"); 2184 else if (item_flags & l4m) 2185 return rte_flow_error_set(error, EINVAL, 2186 RTE_FLOW_ERROR_TYPE_ITEM, item, 2187 "L3 cannot follow an L4 layer."); 2188 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2189 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2190 return rte_flow_error_set(error, EINVAL, 2191 RTE_FLOW_ERROR_TYPE_ITEM, item, 2192 "L3 cannot follow an NVGRE layer."); 2193 if (!mask) 2194 mask = &rte_flow_item_ipv6_mask; 2195 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2196 acc_mask ? (const uint8_t *)acc_mask 2197 : (const uint8_t *)&nic_mask, 2198 sizeof(struct rte_flow_item_ipv6), 2199 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2200 if (ret < 0) 2201 return ret; 2202 return 0; 2203 } 2204 2205 /** 2206 * Validate UDP item. 2207 * 2208 * @param[in] item 2209 * Item specification. 2210 * @param[in] item_flags 2211 * Bit-fields that holds the items detected until now. 2212 * @param[in] target_protocol 2213 * The next protocol in the previous item. 2214 * @param[in] flow_mask 2215 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2216 * @param[out] error 2217 * Pointer to error structure. 2218 * 2219 * @return 2220 * 0 on success, a negative errno value otherwise and rte_errno is set. 2221 */ 2222 int 2223 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2224 uint64_t item_flags, 2225 uint8_t target_protocol, 2226 struct rte_flow_error *error) 2227 { 2228 const struct rte_flow_item_udp *mask = item->mask; 2229 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2230 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2231 MLX5_FLOW_LAYER_OUTER_L3; 2232 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2233 MLX5_FLOW_LAYER_OUTER_L4; 2234 int ret; 2235 2236 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2237 return rte_flow_error_set(error, EINVAL, 2238 RTE_FLOW_ERROR_TYPE_ITEM, item, 2239 "protocol filtering not compatible" 2240 " with UDP layer"); 2241 if (!(item_flags & l3m)) 2242 return rte_flow_error_set(error, EINVAL, 2243 RTE_FLOW_ERROR_TYPE_ITEM, item, 2244 "L3 is mandatory to filter on L4"); 2245 if (item_flags & l4m) 2246 return rte_flow_error_set(error, EINVAL, 2247 RTE_FLOW_ERROR_TYPE_ITEM, item, 2248 "multiple L4 layers not supported"); 2249 if (!mask) 2250 mask = &rte_flow_item_udp_mask; 2251 ret = mlx5_flow_item_acceptable 2252 (item, (const uint8_t *)mask, 2253 (const uint8_t *)&rte_flow_item_udp_mask, 2254 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2255 error); 2256 if (ret < 0) 2257 return ret; 2258 return 0; 2259 } 2260 2261 /** 2262 * Validate TCP item. 2263 * 2264 * @param[in] item 2265 * Item specification. 2266 * @param[in] item_flags 2267 * Bit-fields that holds the items detected until now. 2268 * @param[in] target_protocol 2269 * The next protocol in the previous item. 2270 * @param[out] error 2271 * Pointer to error structure. 2272 * 2273 * @return 2274 * 0 on success, a negative errno value otherwise and rte_errno is set. 2275 */ 2276 int 2277 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2278 uint64_t item_flags, 2279 uint8_t target_protocol, 2280 const struct rte_flow_item_tcp *flow_mask, 2281 struct rte_flow_error *error) 2282 { 2283 const struct rte_flow_item_tcp *mask = item->mask; 2284 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2285 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2286 MLX5_FLOW_LAYER_OUTER_L3; 2287 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2288 MLX5_FLOW_LAYER_OUTER_L4; 2289 int ret; 2290 2291 MLX5_ASSERT(flow_mask); 2292 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2293 return rte_flow_error_set(error, EINVAL, 2294 RTE_FLOW_ERROR_TYPE_ITEM, item, 2295 "protocol filtering not compatible" 2296 " with TCP layer"); 2297 if (!(item_flags & l3m)) 2298 return rte_flow_error_set(error, EINVAL, 2299 RTE_FLOW_ERROR_TYPE_ITEM, item, 2300 "L3 is mandatory to filter on L4"); 2301 if (item_flags & l4m) 2302 return rte_flow_error_set(error, EINVAL, 2303 RTE_FLOW_ERROR_TYPE_ITEM, item, 2304 "multiple L4 layers not supported"); 2305 if (!mask) 2306 mask = &rte_flow_item_tcp_mask; 2307 ret = mlx5_flow_item_acceptable 2308 (item, (const uint8_t *)mask, 2309 (const uint8_t *)flow_mask, 2310 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2311 error); 2312 if (ret < 0) 2313 return ret; 2314 return 0; 2315 } 2316 2317 /** 2318 * Validate VXLAN item. 2319 * 2320 * @param[in] item 2321 * Item specification. 2322 * @param[in] item_flags 2323 * Bit-fields that holds the items detected until now. 2324 * @param[in] target_protocol 2325 * The next protocol in the previous item. 2326 * @param[out] error 2327 * Pointer to error structure. 2328 * 2329 * @return 2330 * 0 on success, a negative errno value otherwise and rte_errno is set. 2331 */ 2332 int 2333 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 2334 uint64_t item_flags, 2335 struct rte_flow_error *error) 2336 { 2337 const struct rte_flow_item_vxlan *spec = item->spec; 2338 const struct rte_flow_item_vxlan *mask = item->mask; 2339 int ret; 2340 union vni { 2341 uint32_t vlan_id; 2342 uint8_t vni[4]; 2343 } id = { .vlan_id = 0, }; 2344 2345 2346 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2347 return rte_flow_error_set(error, ENOTSUP, 2348 RTE_FLOW_ERROR_TYPE_ITEM, item, 2349 "multiple tunnel layers not" 2350 " supported"); 2351 /* 2352 * Verify only UDPv4 is present as defined in 2353 * https://tools.ietf.org/html/rfc7348 2354 */ 2355 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2356 return rte_flow_error_set(error, EINVAL, 2357 RTE_FLOW_ERROR_TYPE_ITEM, item, 2358 "no outer UDP layer found"); 2359 if (!mask) 2360 mask = &rte_flow_item_vxlan_mask; 2361 ret = mlx5_flow_item_acceptable 2362 (item, (const uint8_t *)mask, 2363 (const uint8_t *)&rte_flow_item_vxlan_mask, 2364 sizeof(struct rte_flow_item_vxlan), 2365 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2366 if (ret < 0) 2367 return ret; 2368 if (spec) { 2369 memcpy(&id.vni[1], spec->vni, 3); 2370 memcpy(&id.vni[1], mask->vni, 3); 2371 } 2372 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2373 return rte_flow_error_set(error, ENOTSUP, 2374 RTE_FLOW_ERROR_TYPE_ITEM, item, 2375 "VXLAN tunnel must be fully defined"); 2376 return 0; 2377 } 2378 2379 /** 2380 * Validate VXLAN_GPE item. 2381 * 2382 * @param[in] item 2383 * Item specification. 2384 * @param[in] item_flags 2385 * Bit-fields that holds the items detected until now. 2386 * @param[in] priv 2387 * Pointer to the private data structure. 2388 * @param[in] target_protocol 2389 * The next protocol in the previous item. 2390 * @param[out] error 2391 * Pointer to error structure. 2392 * 2393 * @return 2394 * 0 on success, a negative errno value otherwise and rte_errno is set. 2395 */ 2396 int 2397 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2398 uint64_t item_flags, 2399 struct rte_eth_dev *dev, 2400 struct rte_flow_error *error) 2401 { 2402 struct mlx5_priv *priv = dev->data->dev_private; 2403 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2404 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2405 int ret; 2406 union vni { 2407 uint32_t vlan_id; 2408 uint8_t vni[4]; 2409 } id = { .vlan_id = 0, }; 2410 2411 if (!priv->config.l3_vxlan_en) 2412 return rte_flow_error_set(error, ENOTSUP, 2413 RTE_FLOW_ERROR_TYPE_ITEM, item, 2414 "L3 VXLAN is not enabled by device" 2415 " parameter and/or not configured in" 2416 " firmware"); 2417 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2418 return rte_flow_error_set(error, ENOTSUP, 2419 RTE_FLOW_ERROR_TYPE_ITEM, item, 2420 "multiple tunnel layers not" 2421 " supported"); 2422 /* 2423 * Verify only UDPv4 is present as defined in 2424 * https://tools.ietf.org/html/rfc7348 2425 */ 2426 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2427 return rte_flow_error_set(error, EINVAL, 2428 RTE_FLOW_ERROR_TYPE_ITEM, item, 2429 "no outer UDP layer found"); 2430 if (!mask) 2431 mask = &rte_flow_item_vxlan_gpe_mask; 2432 ret = mlx5_flow_item_acceptable 2433 (item, (const uint8_t *)mask, 2434 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2435 sizeof(struct rte_flow_item_vxlan_gpe), 2436 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2437 if (ret < 0) 2438 return ret; 2439 if (spec) { 2440 if (spec->protocol) 2441 return rte_flow_error_set(error, ENOTSUP, 2442 RTE_FLOW_ERROR_TYPE_ITEM, 2443 item, 2444 "VxLAN-GPE protocol" 2445 " not supported"); 2446 memcpy(&id.vni[1], spec->vni, 3); 2447 memcpy(&id.vni[1], mask->vni, 3); 2448 } 2449 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2450 return rte_flow_error_set(error, ENOTSUP, 2451 RTE_FLOW_ERROR_TYPE_ITEM, item, 2452 "VXLAN-GPE tunnel must be fully" 2453 " defined"); 2454 return 0; 2455 } 2456 /** 2457 * Validate GRE Key item. 2458 * 2459 * @param[in] item 2460 * Item specification. 2461 * @param[in] item_flags 2462 * Bit flags to mark detected items. 2463 * @param[in] gre_item 2464 * Pointer to gre_item 2465 * @param[out] error 2466 * Pointer to error structure. 2467 * 2468 * @return 2469 * 0 on success, a negative errno value otherwise and rte_errno is set. 2470 */ 2471 int 2472 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2473 uint64_t item_flags, 2474 const struct rte_flow_item *gre_item, 2475 struct rte_flow_error *error) 2476 { 2477 const rte_be32_t *mask = item->mask; 2478 int ret = 0; 2479 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2480 const struct rte_flow_item_gre *gre_spec; 2481 const struct rte_flow_item_gre *gre_mask; 2482 2483 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2484 return rte_flow_error_set(error, ENOTSUP, 2485 RTE_FLOW_ERROR_TYPE_ITEM, item, 2486 "Multiple GRE key not support"); 2487 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2488 return rte_flow_error_set(error, ENOTSUP, 2489 RTE_FLOW_ERROR_TYPE_ITEM, item, 2490 "No preceding GRE header"); 2491 if (item_flags & MLX5_FLOW_LAYER_INNER) 2492 return rte_flow_error_set(error, ENOTSUP, 2493 RTE_FLOW_ERROR_TYPE_ITEM, item, 2494 "GRE key following a wrong item"); 2495 gre_mask = gre_item->mask; 2496 if (!gre_mask) 2497 gre_mask = &rte_flow_item_gre_mask; 2498 gre_spec = gre_item->spec; 2499 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2500 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2501 return rte_flow_error_set(error, EINVAL, 2502 RTE_FLOW_ERROR_TYPE_ITEM, item, 2503 "Key bit must be on"); 2504 2505 if (!mask) 2506 mask = &gre_key_default_mask; 2507 ret = mlx5_flow_item_acceptable 2508 (item, (const uint8_t *)mask, 2509 (const uint8_t *)&gre_key_default_mask, 2510 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2511 return ret; 2512 } 2513 2514 /** 2515 * Validate GRE item. 2516 * 2517 * @param[in] item 2518 * Item specification. 2519 * @param[in] item_flags 2520 * Bit flags to mark detected items. 2521 * @param[in] target_protocol 2522 * The next protocol in the previous item. 2523 * @param[out] error 2524 * Pointer to error structure. 2525 * 2526 * @return 2527 * 0 on success, a negative errno value otherwise and rte_errno is set. 2528 */ 2529 int 2530 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2531 uint64_t item_flags, 2532 uint8_t target_protocol, 2533 struct rte_flow_error *error) 2534 { 2535 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2536 const struct rte_flow_item_gre *mask = item->mask; 2537 int ret; 2538 const struct rte_flow_item_gre nic_mask = { 2539 .c_rsvd0_ver = RTE_BE16(0xB000), 2540 .protocol = RTE_BE16(UINT16_MAX), 2541 }; 2542 2543 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2544 return rte_flow_error_set(error, EINVAL, 2545 RTE_FLOW_ERROR_TYPE_ITEM, item, 2546 "protocol filtering not compatible" 2547 " with this GRE layer"); 2548 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2549 return rte_flow_error_set(error, ENOTSUP, 2550 RTE_FLOW_ERROR_TYPE_ITEM, item, 2551 "multiple tunnel layers not" 2552 " supported"); 2553 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2554 return rte_flow_error_set(error, ENOTSUP, 2555 RTE_FLOW_ERROR_TYPE_ITEM, item, 2556 "L3 Layer is missing"); 2557 if (!mask) 2558 mask = &rte_flow_item_gre_mask; 2559 ret = mlx5_flow_item_acceptable 2560 (item, (const uint8_t *)mask, 2561 (const uint8_t *)&nic_mask, 2562 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2563 error); 2564 if (ret < 0) 2565 return ret; 2566 #ifndef HAVE_MLX5DV_DR 2567 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2568 if (spec && (spec->protocol & mask->protocol)) 2569 return rte_flow_error_set(error, ENOTSUP, 2570 RTE_FLOW_ERROR_TYPE_ITEM, item, 2571 "without MPLS support the" 2572 " specification cannot be used for" 2573 " filtering"); 2574 #endif 2575 #endif 2576 return 0; 2577 } 2578 2579 /** 2580 * Validate Geneve item. 2581 * 2582 * @param[in] item 2583 * Item specification. 2584 * @param[in] itemFlags 2585 * Bit-fields that holds the items detected until now. 2586 * @param[in] enPriv 2587 * Pointer to the private data structure. 2588 * @param[out] error 2589 * Pointer to error structure. 2590 * 2591 * @return 2592 * 0 on success, a negative errno value otherwise and rte_errno is set. 2593 */ 2594 2595 int 2596 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2597 uint64_t item_flags, 2598 struct rte_eth_dev *dev, 2599 struct rte_flow_error *error) 2600 { 2601 struct mlx5_priv *priv = dev->data->dev_private; 2602 const struct rte_flow_item_geneve *spec = item->spec; 2603 const struct rte_flow_item_geneve *mask = item->mask; 2604 int ret; 2605 uint16_t gbhdr; 2606 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2607 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2608 const struct rte_flow_item_geneve nic_mask = { 2609 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2610 .vni = "\xff\xff\xff", 2611 .protocol = RTE_BE16(UINT16_MAX), 2612 }; 2613 2614 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2615 return rte_flow_error_set(error, ENOTSUP, 2616 RTE_FLOW_ERROR_TYPE_ITEM, item, 2617 "L3 Geneve is not enabled by device" 2618 " parameter and/or not configured in" 2619 " firmware"); 2620 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2621 return rte_flow_error_set(error, ENOTSUP, 2622 RTE_FLOW_ERROR_TYPE_ITEM, item, 2623 "multiple tunnel layers not" 2624 " supported"); 2625 /* 2626 * Verify only UDPv4 is present as defined in 2627 * https://tools.ietf.org/html/rfc7348 2628 */ 2629 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2630 return rte_flow_error_set(error, EINVAL, 2631 RTE_FLOW_ERROR_TYPE_ITEM, item, 2632 "no outer UDP layer found"); 2633 if (!mask) 2634 mask = &rte_flow_item_geneve_mask; 2635 ret = mlx5_flow_item_acceptable 2636 (item, (const uint8_t *)mask, 2637 (const uint8_t *)&nic_mask, 2638 sizeof(struct rte_flow_item_geneve), 2639 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2640 if (ret) 2641 return ret; 2642 if (spec) { 2643 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2644 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2645 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2646 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2647 return rte_flow_error_set(error, ENOTSUP, 2648 RTE_FLOW_ERROR_TYPE_ITEM, 2649 item, 2650 "Geneve protocol unsupported" 2651 " fields are being used"); 2652 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2653 return rte_flow_error_set 2654 (error, ENOTSUP, 2655 RTE_FLOW_ERROR_TYPE_ITEM, 2656 item, 2657 "Unsupported Geneve options length"); 2658 } 2659 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2660 return rte_flow_error_set 2661 (error, ENOTSUP, 2662 RTE_FLOW_ERROR_TYPE_ITEM, item, 2663 "Geneve tunnel must be fully defined"); 2664 return 0; 2665 } 2666 2667 /** 2668 * Validate Geneve TLV option item. 2669 * 2670 * @param[in] item 2671 * Item specification. 2672 * @param[in] last_item 2673 * Previous validated item in the pattern items. 2674 * @param[in] geneve_item 2675 * Previous GENEVE item specification. 2676 * @param[in] dev 2677 * Pointer to the rte_eth_dev structure. 2678 * @param[out] error 2679 * Pointer to error structure. 2680 * 2681 * @return 2682 * 0 on success, a negative errno value otherwise and rte_errno is set. 2683 */ 2684 int 2685 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item, 2686 uint64_t last_item, 2687 const struct rte_flow_item *geneve_item, 2688 struct rte_eth_dev *dev, 2689 struct rte_flow_error *error) 2690 { 2691 struct mlx5_priv *priv = dev->data->dev_private; 2692 struct mlx5_dev_ctx_shared *sh = priv->sh; 2693 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource; 2694 struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr; 2695 uint8_t data_max_supported = 2696 hca_attr->max_geneve_tlv_option_data_len * 4; 2697 struct mlx5_dev_config *config = &priv->config; 2698 const struct rte_flow_item_geneve *geneve_spec; 2699 const struct rte_flow_item_geneve *geneve_mask; 2700 const struct rte_flow_item_geneve_opt *spec = item->spec; 2701 const struct rte_flow_item_geneve_opt *mask = item->mask; 2702 unsigned int i; 2703 unsigned int data_len; 2704 uint8_t tlv_option_len; 2705 uint16_t optlen_m, optlen_v; 2706 const struct rte_flow_item_geneve_opt full_mask = { 2707 .option_class = RTE_BE16(0xffff), 2708 .option_type = 0xff, 2709 .option_len = 0x1f, 2710 }; 2711 2712 if (!mask) 2713 mask = &rte_flow_item_geneve_opt_mask; 2714 if (!spec) 2715 return rte_flow_error_set 2716 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2717 "Geneve TLV opt class/type/length must be specified"); 2718 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK) 2719 return rte_flow_error_set 2720 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2721 "Geneve TLV opt length exceeeds the limit (31)"); 2722 /* Check if class type and length masks are full. */ 2723 if (full_mask.option_class != mask->option_class || 2724 full_mask.option_type != mask->option_type || 2725 full_mask.option_len != (mask->option_len & full_mask.option_len)) 2726 return rte_flow_error_set 2727 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2728 "Geneve TLV opt class/type/length masks must be full"); 2729 /* Check if length is supported */ 2730 if ((uint32_t)spec->option_len > 2731 config->hca_attr.max_geneve_tlv_option_data_len) 2732 return rte_flow_error_set 2733 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2734 "Geneve TLV opt length not supported"); 2735 if (config->hca_attr.max_geneve_tlv_options > 1) 2736 DRV_LOG(DEBUG, 2737 "max_geneve_tlv_options supports more than 1 option"); 2738 /* Check GENEVE item preceding. */ 2739 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE)) 2740 return rte_flow_error_set 2741 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2742 "Geneve opt item must be preceded with Geneve item"); 2743 geneve_spec = geneve_item->spec; 2744 geneve_mask = geneve_item->mask ? geneve_item->mask : 2745 &rte_flow_item_geneve_mask; 2746 /* Check if GENEVE TLV option size doesn't exceed option length */ 2747 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 || 2748 geneve_spec->ver_opt_len_o_c_rsvd0)) { 2749 tlv_option_len = spec->option_len & mask->option_len; 2750 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0); 2751 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v); 2752 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0); 2753 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m); 2754 if ((optlen_v & optlen_m) <= tlv_option_len) 2755 return rte_flow_error_set 2756 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2757 "GENEVE TLV option length exceeds optlen"); 2758 } 2759 /* Check if length is 0 or data is 0. */ 2760 if (spec->data == NULL || spec->option_len == 0) 2761 return rte_flow_error_set 2762 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2763 "Geneve TLV opt with zero data/length not supported"); 2764 /* Check not all data & mask are 0. */ 2765 data_len = spec->option_len * 4; 2766 if (mask->data == NULL) { 2767 for (i = 0; i < data_len; i++) 2768 if (spec->data[i]) 2769 break; 2770 if (i == data_len) 2771 return rte_flow_error_set(error, ENOTSUP, 2772 RTE_FLOW_ERROR_TYPE_ITEM, item, 2773 "Can't match on Geneve option data 0"); 2774 } else { 2775 for (i = 0; i < data_len; i++) 2776 if (spec->data[i] & mask->data[i]) 2777 break; 2778 if (i == data_len) 2779 return rte_flow_error_set(error, ENOTSUP, 2780 RTE_FLOW_ERROR_TYPE_ITEM, item, 2781 "Can't match on Geneve option data and mask 0"); 2782 /* Check data mask supported. */ 2783 for (i = data_max_supported; i < data_len ; i++) 2784 if (mask->data[i]) 2785 return rte_flow_error_set(error, ENOTSUP, 2786 RTE_FLOW_ERROR_TYPE_ITEM, item, 2787 "Data mask is of unsupported size"); 2788 } 2789 /* Check GENEVE option is supported in NIC. */ 2790 if (!config->hca_attr.geneve_tlv_opt) 2791 return rte_flow_error_set 2792 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2793 "Geneve TLV opt not supported"); 2794 /* Check if we already have geneve option with different type/class. */ 2795 rte_spinlock_lock(&sh->geneve_tlv_opt_sl); 2796 geneve_opt_resource = sh->geneve_tlv_option_resource; 2797 if (geneve_opt_resource != NULL) 2798 if (geneve_opt_resource->option_class != spec->option_class || 2799 geneve_opt_resource->option_type != spec->option_type || 2800 geneve_opt_resource->length != spec->option_len) { 2801 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2802 return rte_flow_error_set(error, ENOTSUP, 2803 RTE_FLOW_ERROR_TYPE_ITEM, item, 2804 "Only one Geneve TLV option supported"); 2805 } 2806 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2807 return 0; 2808 } 2809 2810 /** 2811 * Validate MPLS item. 2812 * 2813 * @param[in] dev 2814 * Pointer to the rte_eth_dev structure. 2815 * @param[in] item 2816 * Item specification. 2817 * @param[in] item_flags 2818 * Bit-fields that holds the items detected until now. 2819 * @param[in] prev_layer 2820 * The protocol layer indicated in previous item. 2821 * @param[out] error 2822 * Pointer to error structure. 2823 * 2824 * @return 2825 * 0 on success, a negative errno value otherwise and rte_errno is set. 2826 */ 2827 int 2828 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 2829 const struct rte_flow_item *item __rte_unused, 2830 uint64_t item_flags __rte_unused, 2831 uint64_t prev_layer __rte_unused, 2832 struct rte_flow_error *error) 2833 { 2834 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 2835 const struct rte_flow_item_mpls *mask = item->mask; 2836 struct mlx5_priv *priv = dev->data->dev_private; 2837 int ret; 2838 2839 if (!priv->config.mpls_en) 2840 return rte_flow_error_set(error, ENOTSUP, 2841 RTE_FLOW_ERROR_TYPE_ITEM, item, 2842 "MPLS not supported or" 2843 " disabled in firmware" 2844 " configuration."); 2845 /* MPLS over IP, UDP, GRE is allowed */ 2846 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 | 2847 MLX5_FLOW_LAYER_OUTER_L4_UDP | 2848 MLX5_FLOW_LAYER_GRE | 2849 MLX5_FLOW_LAYER_GRE_KEY))) 2850 return rte_flow_error_set(error, EINVAL, 2851 RTE_FLOW_ERROR_TYPE_ITEM, item, 2852 "protocol filtering not compatible" 2853 " with MPLS layer"); 2854 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 2855 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 2856 !(item_flags & MLX5_FLOW_LAYER_GRE)) 2857 return rte_flow_error_set(error, ENOTSUP, 2858 RTE_FLOW_ERROR_TYPE_ITEM, item, 2859 "multiple tunnel layers not" 2860 " supported"); 2861 if (!mask) 2862 mask = &rte_flow_item_mpls_mask; 2863 ret = mlx5_flow_item_acceptable 2864 (item, (const uint8_t *)mask, 2865 (const uint8_t *)&rte_flow_item_mpls_mask, 2866 sizeof(struct rte_flow_item_mpls), 2867 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2868 if (ret < 0) 2869 return ret; 2870 return 0; 2871 #else 2872 return rte_flow_error_set(error, ENOTSUP, 2873 RTE_FLOW_ERROR_TYPE_ITEM, item, 2874 "MPLS is not supported by Verbs, please" 2875 " update."); 2876 #endif 2877 } 2878 2879 /** 2880 * Validate NVGRE item. 2881 * 2882 * @param[in] item 2883 * Item specification. 2884 * @param[in] item_flags 2885 * Bit flags to mark detected items. 2886 * @param[in] target_protocol 2887 * The next protocol in the previous item. 2888 * @param[out] error 2889 * Pointer to error structure. 2890 * 2891 * @return 2892 * 0 on success, a negative errno value otherwise and rte_errno is set. 2893 */ 2894 int 2895 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 2896 uint64_t item_flags, 2897 uint8_t target_protocol, 2898 struct rte_flow_error *error) 2899 { 2900 const struct rte_flow_item_nvgre *mask = item->mask; 2901 int ret; 2902 2903 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2904 return rte_flow_error_set(error, EINVAL, 2905 RTE_FLOW_ERROR_TYPE_ITEM, item, 2906 "protocol filtering not compatible" 2907 " with this GRE layer"); 2908 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2909 return rte_flow_error_set(error, ENOTSUP, 2910 RTE_FLOW_ERROR_TYPE_ITEM, item, 2911 "multiple tunnel layers not" 2912 " supported"); 2913 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2914 return rte_flow_error_set(error, ENOTSUP, 2915 RTE_FLOW_ERROR_TYPE_ITEM, item, 2916 "L3 Layer is missing"); 2917 if (!mask) 2918 mask = &rte_flow_item_nvgre_mask; 2919 ret = mlx5_flow_item_acceptable 2920 (item, (const uint8_t *)mask, 2921 (const uint8_t *)&rte_flow_item_nvgre_mask, 2922 sizeof(struct rte_flow_item_nvgre), 2923 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2924 if (ret < 0) 2925 return ret; 2926 return 0; 2927 } 2928 2929 /** 2930 * Validate eCPRI item. 2931 * 2932 * @param[in] item 2933 * Item specification. 2934 * @param[in] item_flags 2935 * Bit-fields that holds the items detected until now. 2936 * @param[in] last_item 2937 * Previous validated item in the pattern items. 2938 * @param[in] ether_type 2939 * Type in the ethernet layer header (including dot1q). 2940 * @param[in] acc_mask 2941 * Acceptable mask, if NULL default internal default mask 2942 * will be used to check whether item fields are supported. 2943 * @param[out] error 2944 * Pointer to error structure. 2945 * 2946 * @return 2947 * 0 on success, a negative errno value otherwise and rte_errno is set. 2948 */ 2949 int 2950 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 2951 uint64_t item_flags, 2952 uint64_t last_item, 2953 uint16_t ether_type, 2954 const struct rte_flow_item_ecpri *acc_mask, 2955 struct rte_flow_error *error) 2956 { 2957 const struct rte_flow_item_ecpri *mask = item->mask; 2958 const struct rte_flow_item_ecpri nic_mask = { 2959 .hdr = { 2960 .common = { 2961 .u32 = 2962 RTE_BE32(((const struct rte_ecpri_common_hdr) { 2963 .type = 0xFF, 2964 }).u32), 2965 }, 2966 .dummy[0] = 0xFFFFFFFF, 2967 }, 2968 }; 2969 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 2970 MLX5_FLOW_LAYER_OUTER_VLAN); 2971 struct rte_flow_item_ecpri mask_lo; 2972 2973 if (!(last_item & outer_l2_vlan) && 2974 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP) 2975 return rte_flow_error_set(error, EINVAL, 2976 RTE_FLOW_ERROR_TYPE_ITEM, item, 2977 "eCPRI can only follow L2/VLAN layer or UDP layer"); 2978 if ((last_item & outer_l2_vlan) && ether_type && 2979 ether_type != RTE_ETHER_TYPE_ECPRI) 2980 return rte_flow_error_set(error, EINVAL, 2981 RTE_FLOW_ERROR_TYPE_ITEM, item, 2982 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE"); 2983 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2984 return rte_flow_error_set(error, EINVAL, 2985 RTE_FLOW_ERROR_TYPE_ITEM, item, 2986 "eCPRI with tunnel is not supported right now"); 2987 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 2988 return rte_flow_error_set(error, ENOTSUP, 2989 RTE_FLOW_ERROR_TYPE_ITEM, item, 2990 "multiple L3 layers not supported"); 2991 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 2992 return rte_flow_error_set(error, EINVAL, 2993 RTE_FLOW_ERROR_TYPE_ITEM, item, 2994 "eCPRI cannot coexist with a TCP layer"); 2995 /* In specification, eCPRI could be over UDP layer. */ 2996 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 2997 return rte_flow_error_set(error, EINVAL, 2998 RTE_FLOW_ERROR_TYPE_ITEM, item, 2999 "eCPRI over UDP layer is not yet supported right now"); 3000 /* Mask for type field in common header could be zero. */ 3001 if (!mask) 3002 mask = &rte_flow_item_ecpri_mask; 3003 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 3004 /* Input mask is in big-endian format. */ 3005 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 3006 return rte_flow_error_set(error, EINVAL, 3007 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3008 "partial mask is not supported for protocol"); 3009 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 3010 return rte_flow_error_set(error, EINVAL, 3011 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3012 "message header mask must be after a type mask"); 3013 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 3014 acc_mask ? (const uint8_t *)acc_mask 3015 : (const uint8_t *)&nic_mask, 3016 sizeof(struct rte_flow_item_ecpri), 3017 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3018 } 3019 3020 /** 3021 * Release resource related QUEUE/RSS action split. 3022 * 3023 * @param dev 3024 * Pointer to Ethernet device. 3025 * @param flow 3026 * Flow to release id's from. 3027 */ 3028 static void 3029 flow_mreg_split_qrss_release(struct rte_eth_dev *dev, 3030 struct rte_flow *flow) 3031 { 3032 struct mlx5_priv *priv = dev->data->dev_private; 3033 uint32_t handle_idx; 3034 struct mlx5_flow_handle *dev_handle; 3035 3036 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 3037 handle_idx, dev_handle, next) 3038 if (dev_handle->split_flow_id && 3039 !dev_handle->is_meter_flow_id) 3040 mlx5_ipool_free(priv->sh->ipool 3041 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 3042 dev_handle->split_flow_id); 3043 } 3044 3045 static int 3046 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 3047 const struct rte_flow_attr *attr __rte_unused, 3048 const struct rte_flow_item items[] __rte_unused, 3049 const struct rte_flow_action actions[] __rte_unused, 3050 bool external __rte_unused, 3051 int hairpin __rte_unused, 3052 struct rte_flow_error *error) 3053 { 3054 return rte_flow_error_set(error, ENOTSUP, 3055 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3056 } 3057 3058 static struct mlx5_flow * 3059 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 3060 const struct rte_flow_attr *attr __rte_unused, 3061 const struct rte_flow_item items[] __rte_unused, 3062 const struct rte_flow_action actions[] __rte_unused, 3063 struct rte_flow_error *error) 3064 { 3065 rte_flow_error_set(error, ENOTSUP, 3066 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3067 return NULL; 3068 } 3069 3070 static int 3071 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 3072 struct mlx5_flow *dev_flow __rte_unused, 3073 const struct rte_flow_attr *attr __rte_unused, 3074 const struct rte_flow_item items[] __rte_unused, 3075 const struct rte_flow_action actions[] __rte_unused, 3076 struct rte_flow_error *error) 3077 { 3078 return rte_flow_error_set(error, ENOTSUP, 3079 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3080 } 3081 3082 static int 3083 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 3084 struct rte_flow *flow __rte_unused, 3085 struct rte_flow_error *error) 3086 { 3087 return rte_flow_error_set(error, ENOTSUP, 3088 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3089 } 3090 3091 static void 3092 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 3093 struct rte_flow *flow __rte_unused) 3094 { 3095 } 3096 3097 static void 3098 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 3099 struct rte_flow *flow __rte_unused) 3100 { 3101 } 3102 3103 static int 3104 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3105 struct rte_flow *flow __rte_unused, 3106 const struct rte_flow_action *actions __rte_unused, 3107 void *data __rte_unused, 3108 struct rte_flow_error *error) 3109 { 3110 return rte_flow_error_set(error, ENOTSUP, 3111 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3112 } 3113 3114 static int 3115 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused, 3116 uint32_t domains __rte_unused, 3117 uint32_t flags __rte_unused) 3118 { 3119 return 0; 3120 } 3121 3122 /* Void driver to protect from null pointer reference. */ 3123 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3124 .validate = flow_null_validate, 3125 .prepare = flow_null_prepare, 3126 .translate = flow_null_translate, 3127 .apply = flow_null_apply, 3128 .remove = flow_null_remove, 3129 .destroy = flow_null_destroy, 3130 .query = flow_null_query, 3131 .sync_domain = flow_null_sync_domain, 3132 }; 3133 3134 /** 3135 * Select flow driver type according to flow attributes and device 3136 * configuration. 3137 * 3138 * @param[in] dev 3139 * Pointer to the dev structure. 3140 * @param[in] attr 3141 * Pointer to the flow attributes. 3142 * 3143 * @return 3144 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3145 */ 3146 static enum mlx5_flow_drv_type 3147 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3148 { 3149 struct mlx5_priv *priv = dev->data->dev_private; 3150 /* The OS can determine first a specific flow type (DV, VERBS) */ 3151 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3152 3153 if (type != MLX5_FLOW_TYPE_MAX) 3154 return type; 3155 /* If no OS specific type - continue with DV/VERBS selection */ 3156 if (attr->transfer && priv->config.dv_esw_en) 3157 type = MLX5_FLOW_TYPE_DV; 3158 if (!attr->transfer) 3159 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3160 MLX5_FLOW_TYPE_VERBS; 3161 return type; 3162 } 3163 3164 #define flow_get_drv_ops(type) flow_drv_ops[type] 3165 3166 /** 3167 * Flow driver validation API. This abstracts calling driver specific functions. 3168 * The type of flow driver is determined according to flow attributes. 3169 * 3170 * @param[in] dev 3171 * Pointer to the dev structure. 3172 * @param[in] attr 3173 * Pointer to the flow attributes. 3174 * @param[in] items 3175 * Pointer to the list of items. 3176 * @param[in] actions 3177 * Pointer to the list of actions. 3178 * @param[in] external 3179 * This flow rule is created by request external to PMD. 3180 * @param[in] hairpin 3181 * Number of hairpin TX actions, 0 means classic flow. 3182 * @param[out] error 3183 * Pointer to the error structure. 3184 * 3185 * @return 3186 * 0 on success, a negative errno value otherwise and rte_errno is set. 3187 */ 3188 static inline int 3189 flow_drv_validate(struct rte_eth_dev *dev, 3190 const struct rte_flow_attr *attr, 3191 const struct rte_flow_item items[], 3192 const struct rte_flow_action actions[], 3193 bool external, int hairpin, struct rte_flow_error *error) 3194 { 3195 const struct mlx5_flow_driver_ops *fops; 3196 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3197 3198 fops = flow_get_drv_ops(type); 3199 return fops->validate(dev, attr, items, actions, external, 3200 hairpin, error); 3201 } 3202 3203 /** 3204 * Flow driver preparation API. This abstracts calling driver specific 3205 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3206 * calculates the size of memory required for device flow, allocates the memory, 3207 * initializes the device flow and returns the pointer. 3208 * 3209 * @note 3210 * This function initializes device flow structure such as dv or verbs in 3211 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3212 * rest. For example, adding returning device flow to flow->dev_flow list and 3213 * setting backward reference to the flow should be done out of this function. 3214 * layers field is not filled either. 3215 * 3216 * @param[in] dev 3217 * Pointer to the dev structure. 3218 * @param[in] attr 3219 * Pointer to the flow attributes. 3220 * @param[in] items 3221 * Pointer to the list of items. 3222 * @param[in] actions 3223 * Pointer to the list of actions. 3224 * @param[in] flow_idx 3225 * This memory pool index to the flow. 3226 * @param[out] error 3227 * Pointer to the error structure. 3228 * 3229 * @return 3230 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3231 */ 3232 static inline struct mlx5_flow * 3233 flow_drv_prepare(struct rte_eth_dev *dev, 3234 const struct rte_flow *flow, 3235 const struct rte_flow_attr *attr, 3236 const struct rte_flow_item items[], 3237 const struct rte_flow_action actions[], 3238 uint32_t flow_idx, 3239 struct rte_flow_error *error) 3240 { 3241 const struct mlx5_flow_driver_ops *fops; 3242 enum mlx5_flow_drv_type type = flow->drv_type; 3243 struct mlx5_flow *mlx5_flow = NULL; 3244 3245 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3246 fops = flow_get_drv_ops(type); 3247 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3248 if (mlx5_flow) 3249 mlx5_flow->flow_idx = flow_idx; 3250 return mlx5_flow; 3251 } 3252 3253 /** 3254 * Flow driver translation API. This abstracts calling driver specific 3255 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3256 * translates a generic flow into a driver flow. flow_drv_prepare() must 3257 * precede. 3258 * 3259 * @note 3260 * dev_flow->layers could be filled as a result of parsing during translation 3261 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3262 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3263 * flow->actions could be overwritten even though all the expanded dev_flows 3264 * have the same actions. 3265 * 3266 * @param[in] dev 3267 * Pointer to the rte dev structure. 3268 * @param[in, out] dev_flow 3269 * Pointer to the mlx5 flow. 3270 * @param[in] attr 3271 * Pointer to the flow attributes. 3272 * @param[in] items 3273 * Pointer to the list of items. 3274 * @param[in] actions 3275 * Pointer to the list of actions. 3276 * @param[out] error 3277 * Pointer to the error structure. 3278 * 3279 * @return 3280 * 0 on success, a negative errno value otherwise and rte_errno is set. 3281 */ 3282 static inline int 3283 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3284 const struct rte_flow_attr *attr, 3285 const struct rte_flow_item items[], 3286 const struct rte_flow_action actions[], 3287 struct rte_flow_error *error) 3288 { 3289 const struct mlx5_flow_driver_ops *fops; 3290 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3291 3292 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3293 fops = flow_get_drv_ops(type); 3294 return fops->translate(dev, dev_flow, attr, items, actions, error); 3295 } 3296 3297 /** 3298 * Flow driver apply API. This abstracts calling driver specific functions. 3299 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3300 * translated driver flows on to device. flow_drv_translate() must precede. 3301 * 3302 * @param[in] dev 3303 * Pointer to Ethernet device structure. 3304 * @param[in, out] flow 3305 * Pointer to flow structure. 3306 * @param[out] error 3307 * Pointer to error structure. 3308 * 3309 * @return 3310 * 0 on success, a negative errno value otherwise and rte_errno is set. 3311 */ 3312 static inline int 3313 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3314 struct rte_flow_error *error) 3315 { 3316 const struct mlx5_flow_driver_ops *fops; 3317 enum mlx5_flow_drv_type type = flow->drv_type; 3318 3319 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3320 fops = flow_get_drv_ops(type); 3321 return fops->apply(dev, flow, error); 3322 } 3323 3324 /** 3325 * Flow driver destroy API. This abstracts calling driver specific functions. 3326 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3327 * on device and releases resources of the flow. 3328 * 3329 * @param[in] dev 3330 * Pointer to Ethernet device. 3331 * @param[in, out] flow 3332 * Pointer to flow structure. 3333 */ 3334 static inline void 3335 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3336 { 3337 const struct mlx5_flow_driver_ops *fops; 3338 enum mlx5_flow_drv_type type = flow->drv_type; 3339 3340 flow_mreg_split_qrss_release(dev, flow); 3341 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3342 fops = flow_get_drv_ops(type); 3343 fops->destroy(dev, flow); 3344 } 3345 3346 /** 3347 * Flow driver find RSS policy tbl API. This abstracts calling driver 3348 * specific functions. Parent flow (rte_flow) should have driver 3349 * type (drv_type). It will find the RSS policy table that has the rss_desc. 3350 * 3351 * @param[in] dev 3352 * Pointer to Ethernet device. 3353 * @param[in, out] flow 3354 * Pointer to flow structure. 3355 * @param[in] policy 3356 * Pointer to meter policy table. 3357 * @param[in] rss_desc 3358 * Pointer to rss_desc 3359 */ 3360 static struct mlx5_flow_meter_sub_policy * 3361 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev, 3362 struct rte_flow *flow, 3363 struct mlx5_flow_meter_policy *policy, 3364 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS]) 3365 { 3366 const struct mlx5_flow_driver_ops *fops; 3367 enum mlx5_flow_drv_type type = flow->drv_type; 3368 3369 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3370 fops = flow_get_drv_ops(type); 3371 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc); 3372 } 3373 3374 /** 3375 * Get RSS action from the action list. 3376 * 3377 * @param[in] dev 3378 * Pointer to Ethernet device. 3379 * @param[in] actions 3380 * Pointer to the list of actions. 3381 * @param[in] flow 3382 * Parent flow structure pointer. 3383 * 3384 * @return 3385 * Pointer to the RSS action if exist, else return NULL. 3386 */ 3387 static const struct rte_flow_action_rss* 3388 flow_get_rss_action(struct rte_eth_dev *dev, 3389 const struct rte_flow_action actions[]) 3390 { 3391 struct mlx5_priv *priv = dev->data->dev_private; 3392 const struct rte_flow_action_rss *rss = NULL; 3393 3394 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3395 switch (actions->type) { 3396 case RTE_FLOW_ACTION_TYPE_RSS: 3397 rss = actions->conf; 3398 break; 3399 case RTE_FLOW_ACTION_TYPE_SAMPLE: 3400 { 3401 const struct rte_flow_action_sample *sample = 3402 actions->conf; 3403 const struct rte_flow_action *act = sample->actions; 3404 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) 3405 if (act->type == RTE_FLOW_ACTION_TYPE_RSS) 3406 rss = act->conf; 3407 break; 3408 } 3409 case RTE_FLOW_ACTION_TYPE_METER: 3410 { 3411 uint32_t mtr_idx; 3412 struct mlx5_flow_meter_info *fm; 3413 struct mlx5_flow_meter_policy *policy; 3414 const struct rte_flow_action_meter *mtr = actions->conf; 3415 3416 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx); 3417 if (fm) { 3418 policy = mlx5_flow_meter_policy_find(dev, 3419 fm->policy_id, NULL); 3420 if (policy && policy->is_rss) 3421 rss = 3422 policy->act_cnt[RTE_COLOR_GREEN].rss->conf; 3423 } 3424 break; 3425 } 3426 default: 3427 break; 3428 } 3429 } 3430 return rss; 3431 } 3432 3433 /** 3434 * Get ASO age action by index. 3435 * 3436 * @param[in] dev 3437 * Pointer to the Ethernet device structure. 3438 * @param[in] age_idx 3439 * Index to the ASO age action. 3440 * 3441 * @return 3442 * The specified ASO age action. 3443 */ 3444 struct mlx5_aso_age_action* 3445 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx) 3446 { 3447 uint16_t pool_idx = age_idx & UINT16_MAX; 3448 uint16_t offset = (age_idx >> 16) & UINT16_MAX; 3449 struct mlx5_priv *priv = dev->data->dev_private; 3450 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng; 3451 struct mlx5_aso_age_pool *pool = mng->pools[pool_idx]; 3452 3453 return &pool->actions[offset - 1]; 3454 } 3455 3456 /* maps indirect action to translated direct in some actions array */ 3457 struct mlx5_translated_action_handle { 3458 struct rte_flow_action_handle *action; /**< Indirect action handle. */ 3459 int index; /**< Index in related array of rte_flow_action. */ 3460 }; 3461 3462 /** 3463 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related 3464 * direct action if translation possible. 3465 * This functionality used to run same execution path for both direct and 3466 * indirect actions on flow create. All necessary preparations for indirect 3467 * action handling should be performed on *handle* actions list returned 3468 * from this call. 3469 * 3470 * @param[in] dev 3471 * Pointer to Ethernet device. 3472 * @param[in] actions 3473 * List of actions to translate. 3474 * @param[out] handle 3475 * List to store translated indirect action object handles. 3476 * @param[in, out] indir_n 3477 * Size of *handle* array. On return should be updated with number of 3478 * indirect actions retrieved from the *actions* list. 3479 * @param[out] translated_actions 3480 * List of actions where all indirect actions were translated to direct 3481 * if possible. NULL if no translation took place. 3482 * @param[out] error 3483 * Pointer to the error structure. 3484 * 3485 * @return 3486 * 0 on success, a negative errno value otherwise and rte_errno is set. 3487 */ 3488 static int 3489 flow_action_handles_translate(struct rte_eth_dev *dev, 3490 const struct rte_flow_action actions[], 3491 struct mlx5_translated_action_handle *handle, 3492 int *indir_n, 3493 struct rte_flow_action **translated_actions, 3494 struct rte_flow_error *error) 3495 { 3496 struct mlx5_priv *priv = dev->data->dev_private; 3497 struct rte_flow_action *translated = NULL; 3498 size_t actions_size; 3499 int n; 3500 int copied_n = 0; 3501 struct mlx5_translated_action_handle *handle_end = NULL; 3502 3503 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3504 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT) 3505 continue; 3506 if (copied_n == *indir_n) { 3507 return rte_flow_error_set 3508 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3509 NULL, "too many shared actions"); 3510 } 3511 rte_memcpy(&handle[copied_n].action, &actions[n].conf, 3512 sizeof(actions[n].conf)); 3513 handle[copied_n].index = n; 3514 copied_n++; 3515 } 3516 n++; 3517 *indir_n = copied_n; 3518 if (!copied_n) 3519 return 0; 3520 actions_size = sizeof(struct rte_flow_action) * n; 3521 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3522 if (!translated) { 3523 rte_errno = ENOMEM; 3524 return -ENOMEM; 3525 } 3526 memcpy(translated, actions, actions_size); 3527 for (handle_end = handle + copied_n; handle < handle_end; handle++) { 3528 struct mlx5_shared_action_rss *shared_rss; 3529 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3530 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3531 uint32_t idx = act_idx & 3532 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3533 3534 switch (type) { 3535 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3536 shared_rss = mlx5_ipool_get 3537 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx); 3538 translated[handle->index].type = 3539 RTE_FLOW_ACTION_TYPE_RSS; 3540 translated[handle->index].conf = 3541 &shared_rss->origin; 3542 break; 3543 case MLX5_INDIRECT_ACTION_TYPE_COUNT: 3544 translated[handle->index].type = 3545 (enum rte_flow_action_type) 3546 MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 3547 translated[handle->index].conf = (void *)(uintptr_t)idx; 3548 break; 3549 case MLX5_INDIRECT_ACTION_TYPE_AGE: 3550 if (priv->sh->flow_hit_aso_en) { 3551 translated[handle->index].type = 3552 (enum rte_flow_action_type) 3553 MLX5_RTE_FLOW_ACTION_TYPE_AGE; 3554 translated[handle->index].conf = 3555 (void *)(uintptr_t)idx; 3556 break; 3557 } 3558 /* Fall-through */ 3559 default: 3560 mlx5_free(translated); 3561 return rte_flow_error_set 3562 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3563 NULL, "invalid indirect action type"); 3564 } 3565 } 3566 *translated_actions = translated; 3567 return 0; 3568 } 3569 3570 /** 3571 * Get Shared RSS action from the action list. 3572 * 3573 * @param[in] dev 3574 * Pointer to Ethernet device. 3575 * @param[in] shared 3576 * Pointer to the list of actions. 3577 * @param[in] shared_n 3578 * Actions list length. 3579 * 3580 * @return 3581 * The MLX5 RSS action ID if exists, otherwise return 0. 3582 */ 3583 static uint32_t 3584 flow_get_shared_rss_action(struct rte_eth_dev *dev, 3585 struct mlx5_translated_action_handle *handle, 3586 int shared_n) 3587 { 3588 struct mlx5_translated_action_handle *handle_end; 3589 struct mlx5_priv *priv = dev->data->dev_private; 3590 struct mlx5_shared_action_rss *shared_rss; 3591 3592 3593 for (handle_end = handle + shared_n; handle < handle_end; handle++) { 3594 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3595 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3596 uint32_t idx = act_idx & 3597 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3598 switch (type) { 3599 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3600 shared_rss = mlx5_ipool_get 3601 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 3602 idx); 3603 __atomic_add_fetch(&shared_rss->refcnt, 1, 3604 __ATOMIC_RELAXED); 3605 return idx; 3606 default: 3607 break; 3608 } 3609 } 3610 return 0; 3611 } 3612 3613 static unsigned int 3614 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 3615 { 3616 const struct rte_flow_item *item; 3617 unsigned int has_vlan = 0; 3618 3619 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3620 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 3621 has_vlan = 1; 3622 break; 3623 } 3624 } 3625 if (has_vlan) 3626 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 3627 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 3628 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3629 MLX5_EXPANSION_ROOT_OUTER; 3630 } 3631 3632 /** 3633 * Get layer flags from the prefix flow. 3634 * 3635 * Some flows may be split to several subflows, the prefix subflow gets the 3636 * match items and the suffix sub flow gets the actions. 3637 * Some actions need the user defined match item flags to get the detail for 3638 * the action. 3639 * This function helps the suffix flow to get the item layer flags from prefix 3640 * subflow. 3641 * 3642 * @param[in] dev_flow 3643 * Pointer the created preifx subflow. 3644 * 3645 * @return 3646 * The layers get from prefix subflow. 3647 */ 3648 static inline uint64_t 3649 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3650 { 3651 uint64_t layers = 0; 3652 3653 /* 3654 * Layers bits could be localization, but usually the compiler will 3655 * help to do the optimization work for source code. 3656 * If no decap actions, use the layers directly. 3657 */ 3658 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3659 return dev_flow->handle->layers; 3660 /* Convert L3 layers with decap action. */ 3661 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3662 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3663 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3664 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3665 /* Convert L4 layers with decap action. */ 3666 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3667 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3668 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3669 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3670 return layers; 3671 } 3672 3673 /** 3674 * Get metadata split action information. 3675 * 3676 * @param[in] actions 3677 * Pointer to the list of actions. 3678 * @param[out] qrss 3679 * Pointer to the return pointer. 3680 * @param[out] qrss_type 3681 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3682 * if no QUEUE/RSS is found. 3683 * @param[out] encap_idx 3684 * Pointer to the index of the encap action if exists, otherwise the last 3685 * action index. 3686 * 3687 * @return 3688 * Total number of actions. 3689 */ 3690 static int 3691 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 3692 const struct rte_flow_action **qrss, 3693 int *encap_idx) 3694 { 3695 const struct rte_flow_action_raw_encap *raw_encap; 3696 int actions_n = 0; 3697 int raw_decap_idx = -1; 3698 3699 *encap_idx = -1; 3700 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3701 switch (actions->type) { 3702 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3703 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3704 *encap_idx = actions_n; 3705 break; 3706 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3707 raw_decap_idx = actions_n; 3708 break; 3709 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3710 raw_encap = actions->conf; 3711 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3712 *encap_idx = raw_decap_idx != -1 ? 3713 raw_decap_idx : actions_n; 3714 break; 3715 case RTE_FLOW_ACTION_TYPE_QUEUE: 3716 case RTE_FLOW_ACTION_TYPE_RSS: 3717 *qrss = actions; 3718 break; 3719 default: 3720 break; 3721 } 3722 actions_n++; 3723 } 3724 if (*encap_idx == -1) 3725 *encap_idx = actions_n; 3726 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3727 return actions_n + 1; 3728 } 3729 3730 /** 3731 * Check if the action will change packet. 3732 * 3733 * @param dev 3734 * Pointer to Ethernet device. 3735 * @param[in] type 3736 * action type. 3737 * 3738 * @return 3739 * true if action will change packet, false otherwise. 3740 */ 3741 static bool flow_check_modify_action_type(struct rte_eth_dev *dev, 3742 enum rte_flow_action_type type) 3743 { 3744 struct mlx5_priv *priv = dev->data->dev_private; 3745 3746 switch (type) { 3747 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 3748 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 3749 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 3750 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 3751 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 3752 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 3753 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 3754 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 3755 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 3756 case RTE_FLOW_ACTION_TYPE_SET_TTL: 3757 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 3758 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 3759 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 3760 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 3761 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 3762 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 3763 case RTE_FLOW_ACTION_TYPE_SET_META: 3764 case RTE_FLOW_ACTION_TYPE_SET_TAG: 3765 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 3766 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3767 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3768 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3769 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3770 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 3771 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3772 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 3773 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3774 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3775 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 3776 return true; 3777 case RTE_FLOW_ACTION_TYPE_FLAG: 3778 case RTE_FLOW_ACTION_TYPE_MARK: 3779 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) 3780 return true; 3781 else 3782 return false; 3783 default: 3784 return false; 3785 } 3786 } 3787 3788 /** 3789 * Check meter action from the action list. 3790 * 3791 * @param dev 3792 * Pointer to Ethernet device. 3793 * @param[in] actions 3794 * Pointer to the list of actions. 3795 * @param[out] has_mtr 3796 * Pointer to the meter exist flag. 3797 * @param[out] has_modify 3798 * Pointer to the flag showing there's packet change action. 3799 * @param[out] meter_id 3800 * Pointer to the meter id. 3801 * 3802 * @return 3803 * Total number of actions. 3804 */ 3805 static int 3806 flow_check_meter_action(struct rte_eth_dev *dev, 3807 const struct rte_flow_action actions[], 3808 bool *has_mtr, bool *has_modify, uint32_t *meter_id) 3809 { 3810 const struct rte_flow_action_meter *mtr = NULL; 3811 int actions_n = 0; 3812 3813 MLX5_ASSERT(has_mtr); 3814 *has_mtr = false; 3815 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3816 switch (actions->type) { 3817 case RTE_FLOW_ACTION_TYPE_METER: 3818 mtr = actions->conf; 3819 *meter_id = mtr->mtr_id; 3820 *has_mtr = true; 3821 break; 3822 default: 3823 break; 3824 } 3825 if (!*has_mtr) 3826 *has_modify |= flow_check_modify_action_type(dev, 3827 actions->type); 3828 actions_n++; 3829 } 3830 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3831 return actions_n + 1; 3832 } 3833 3834 /** 3835 * Check if the flow should be split due to hairpin. 3836 * The reason for the split is that in current HW we can't 3837 * support encap and push-vlan on Rx, so if a flow contains 3838 * these actions we move it to Tx. 3839 * 3840 * @param dev 3841 * Pointer to Ethernet device. 3842 * @param[in] attr 3843 * Flow rule attributes. 3844 * @param[in] actions 3845 * Associated actions (list terminated by the END action). 3846 * 3847 * @return 3848 * > 0 the number of actions and the flow should be split, 3849 * 0 when no split required. 3850 */ 3851 static int 3852 flow_check_hairpin_split(struct rte_eth_dev *dev, 3853 const struct rte_flow_attr *attr, 3854 const struct rte_flow_action actions[]) 3855 { 3856 int queue_action = 0; 3857 int action_n = 0; 3858 int split = 0; 3859 const struct rte_flow_action_queue *queue; 3860 const struct rte_flow_action_rss *rss; 3861 const struct rte_flow_action_raw_encap *raw_encap; 3862 const struct rte_eth_hairpin_conf *conf; 3863 3864 if (!attr->ingress) 3865 return 0; 3866 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3867 switch (actions->type) { 3868 case RTE_FLOW_ACTION_TYPE_QUEUE: 3869 queue = actions->conf; 3870 if (queue == NULL) 3871 return 0; 3872 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); 3873 if (conf == NULL || conf->tx_explicit != 0) 3874 return 0; 3875 queue_action = 1; 3876 action_n++; 3877 break; 3878 case RTE_FLOW_ACTION_TYPE_RSS: 3879 rss = actions->conf; 3880 if (rss == NULL || rss->queue_num == 0) 3881 return 0; 3882 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); 3883 if (conf == NULL || conf->tx_explicit != 0) 3884 return 0; 3885 queue_action = 1; 3886 action_n++; 3887 break; 3888 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3889 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3890 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3891 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3892 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3893 split++; 3894 action_n++; 3895 break; 3896 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3897 raw_encap = actions->conf; 3898 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3899 split++; 3900 action_n++; 3901 break; 3902 default: 3903 action_n++; 3904 break; 3905 } 3906 } 3907 if (split && queue_action) 3908 return action_n; 3909 return 0; 3910 } 3911 3912 /* Declare flow create/destroy prototype in advance. */ 3913 static uint32_t 3914 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 3915 const struct rte_flow_attr *attr, 3916 const struct rte_flow_item items[], 3917 const struct rte_flow_action actions[], 3918 bool external, struct rte_flow_error *error); 3919 3920 static void 3921 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 3922 uint32_t flow_idx); 3923 3924 int 3925 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused, 3926 struct mlx5_hlist_entry *entry, 3927 uint64_t key, void *cb_ctx __rte_unused) 3928 { 3929 struct mlx5_flow_mreg_copy_resource *mcp_res = 3930 container_of(entry, typeof(*mcp_res), hlist_ent); 3931 3932 return mcp_res->mark_id != key; 3933 } 3934 3935 struct mlx5_hlist_entry * 3936 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key, 3937 void *cb_ctx) 3938 { 3939 struct rte_eth_dev *dev = list->ctx; 3940 struct mlx5_priv *priv = dev->data->dev_private; 3941 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 3942 struct mlx5_flow_mreg_copy_resource *mcp_res; 3943 struct rte_flow_error *error = ctx->error; 3944 uint32_t idx = 0; 3945 int ret; 3946 uint32_t mark_id = key; 3947 struct rte_flow_attr attr = { 3948 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 3949 .ingress = 1, 3950 }; 3951 struct mlx5_rte_flow_item_tag tag_spec = { 3952 .data = mark_id, 3953 }; 3954 struct rte_flow_item items[] = { 3955 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 3956 }; 3957 struct rte_flow_action_mark ftag = { 3958 .id = mark_id, 3959 }; 3960 struct mlx5_flow_action_copy_mreg cp_mreg = { 3961 .dst = REG_B, 3962 .src = REG_NON, 3963 }; 3964 struct rte_flow_action_jump jump = { 3965 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 3966 }; 3967 struct rte_flow_action actions[] = { 3968 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 3969 }; 3970 3971 /* Fill the register fileds in the flow. */ 3972 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 3973 if (ret < 0) 3974 return NULL; 3975 tag_spec.id = ret; 3976 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 3977 if (ret < 0) 3978 return NULL; 3979 cp_mreg.src = ret; 3980 /* Provide the full width of FLAG specific value. */ 3981 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 3982 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 3983 /* Build a new flow. */ 3984 if (mark_id != MLX5_DEFAULT_COPY_ID) { 3985 items[0] = (struct rte_flow_item){ 3986 .type = (enum rte_flow_item_type) 3987 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 3988 .spec = &tag_spec, 3989 }; 3990 items[1] = (struct rte_flow_item){ 3991 .type = RTE_FLOW_ITEM_TYPE_END, 3992 }; 3993 actions[0] = (struct rte_flow_action){ 3994 .type = (enum rte_flow_action_type) 3995 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 3996 .conf = &ftag, 3997 }; 3998 actions[1] = (struct rte_flow_action){ 3999 .type = (enum rte_flow_action_type) 4000 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4001 .conf = &cp_mreg, 4002 }; 4003 actions[2] = (struct rte_flow_action){ 4004 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4005 .conf = &jump, 4006 }; 4007 actions[3] = (struct rte_flow_action){ 4008 .type = RTE_FLOW_ACTION_TYPE_END, 4009 }; 4010 } else { 4011 /* Default rule, wildcard match. */ 4012 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR; 4013 items[0] = (struct rte_flow_item){ 4014 .type = RTE_FLOW_ITEM_TYPE_END, 4015 }; 4016 actions[0] = (struct rte_flow_action){ 4017 .type = (enum rte_flow_action_type) 4018 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4019 .conf = &cp_mreg, 4020 }; 4021 actions[1] = (struct rte_flow_action){ 4022 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4023 .conf = &jump, 4024 }; 4025 actions[2] = (struct rte_flow_action){ 4026 .type = RTE_FLOW_ACTION_TYPE_END, 4027 }; 4028 } 4029 /* Build a new entry. */ 4030 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4031 if (!mcp_res) { 4032 rte_errno = ENOMEM; 4033 return NULL; 4034 } 4035 mcp_res->idx = idx; 4036 mcp_res->mark_id = mark_id; 4037 /* 4038 * The copy Flows are not included in any list. There 4039 * ones are referenced from other Flows and can not 4040 * be applied, removed, deleted in ardbitrary order 4041 * by list traversing. 4042 */ 4043 mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items, 4044 actions, false, error); 4045 if (!mcp_res->rix_flow) { 4046 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx); 4047 return NULL; 4048 } 4049 return &mcp_res->hlist_ent; 4050 } 4051 4052 /** 4053 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4054 * 4055 * As mark_id is unique, if there's already a registered flow for the mark_id, 4056 * return by increasing the reference counter of the resource. Otherwise, create 4057 * the resource (mcp_res) and flow. 4058 * 4059 * Flow looks like, 4060 * - If ingress port is ANY and reg_c[1] is mark_id, 4061 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4062 * 4063 * For default flow (zero mark_id), flow is like, 4064 * - If ingress port is ANY, 4065 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 4066 * 4067 * @param dev 4068 * Pointer to Ethernet device. 4069 * @param mark_id 4070 * ID of MARK action, zero means default flow for META. 4071 * @param[out] error 4072 * Perform verbose error reporting if not NULL. 4073 * 4074 * @return 4075 * Associated resource on success, NULL otherwise and rte_errno is set. 4076 */ 4077 static struct mlx5_flow_mreg_copy_resource * 4078 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 4079 struct rte_flow_error *error) 4080 { 4081 struct mlx5_priv *priv = dev->data->dev_private; 4082 struct mlx5_hlist_entry *entry; 4083 struct mlx5_flow_cb_ctx ctx = { 4084 .dev = dev, 4085 .error = error, 4086 }; 4087 4088 /* Check if already registered. */ 4089 MLX5_ASSERT(priv->mreg_cp_tbl); 4090 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx); 4091 if (!entry) 4092 return NULL; 4093 return container_of(entry, struct mlx5_flow_mreg_copy_resource, 4094 hlist_ent); 4095 } 4096 4097 void 4098 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry) 4099 { 4100 struct mlx5_flow_mreg_copy_resource *mcp_res = 4101 container_of(entry, typeof(*mcp_res), hlist_ent); 4102 struct rte_eth_dev *dev = list->ctx; 4103 struct mlx5_priv *priv = dev->data->dev_private; 4104 4105 MLX5_ASSERT(mcp_res->rix_flow); 4106 flow_list_destroy(dev, NULL, mcp_res->rix_flow); 4107 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4108 } 4109 4110 /** 4111 * Release flow in RX_CP_TBL. 4112 * 4113 * @param dev 4114 * Pointer to Ethernet device. 4115 * @flow 4116 * Parent flow for wich copying is provided. 4117 */ 4118 static void 4119 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 4120 struct rte_flow *flow) 4121 { 4122 struct mlx5_flow_mreg_copy_resource *mcp_res; 4123 struct mlx5_priv *priv = dev->data->dev_private; 4124 4125 if (!flow->rix_mreg_copy) 4126 return; 4127 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 4128 flow->rix_mreg_copy); 4129 if (!mcp_res || !priv->mreg_cp_tbl) 4130 return; 4131 MLX5_ASSERT(mcp_res->rix_flow); 4132 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 4133 flow->rix_mreg_copy = 0; 4134 } 4135 4136 /** 4137 * Remove the default copy action from RX_CP_TBL. 4138 * 4139 * This functions is called in the mlx5_dev_start(). No thread safe 4140 * is guaranteed. 4141 * 4142 * @param dev 4143 * Pointer to Ethernet device. 4144 */ 4145 static void 4146 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 4147 { 4148 struct mlx5_hlist_entry *entry; 4149 struct mlx5_priv *priv = dev->data->dev_private; 4150 4151 /* Check if default flow is registered. */ 4152 if (!priv->mreg_cp_tbl) 4153 return; 4154 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, 4155 MLX5_DEFAULT_COPY_ID, NULL); 4156 if (!entry) 4157 return; 4158 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry); 4159 } 4160 4161 /** 4162 * Add the default copy action in in RX_CP_TBL. 4163 * 4164 * This functions is called in the mlx5_dev_start(). No thread safe 4165 * is guaranteed. 4166 * 4167 * @param dev 4168 * Pointer to Ethernet device. 4169 * @param[out] error 4170 * Perform verbose error reporting if not NULL. 4171 * 4172 * @return 4173 * 0 for success, negative value otherwise and rte_errno is set. 4174 */ 4175 static int 4176 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 4177 struct rte_flow_error *error) 4178 { 4179 struct mlx5_priv *priv = dev->data->dev_private; 4180 struct mlx5_flow_mreg_copy_resource *mcp_res; 4181 4182 /* Check whether extensive metadata feature is engaged. */ 4183 if (!priv->config.dv_flow_en || 4184 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4185 !mlx5_flow_ext_mreg_supported(dev) || 4186 !priv->sh->dv_regc0_mask) 4187 return 0; 4188 /* 4189 * Add default mreg copy flow may be called multiple time, but 4190 * only be called once in stop. Avoid register it twice. 4191 */ 4192 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL)) 4193 return 0; 4194 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error); 4195 if (!mcp_res) 4196 return -rte_errno; 4197 return 0; 4198 } 4199 4200 /** 4201 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4202 * 4203 * All the flow having Q/RSS action should be split by 4204 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 4205 * performs the following, 4206 * - CQE->flow_tag := reg_c[1] (MARK) 4207 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4208 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 4209 * but there should be a flow per each MARK ID set by MARK action. 4210 * 4211 * For the aforementioned reason, if there's a MARK action in flow's action 4212 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 4213 * the MARK ID to CQE's flow_tag like, 4214 * - If reg_c[1] is mark_id, 4215 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4216 * 4217 * For SET_META action which stores value in reg_c[0], as the destination is 4218 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 4219 * MARK ID means the default flow. The default flow looks like, 4220 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4221 * 4222 * @param dev 4223 * Pointer to Ethernet device. 4224 * @param flow 4225 * Pointer to flow structure. 4226 * @param[in] actions 4227 * Pointer to the list of actions. 4228 * @param[out] error 4229 * Perform verbose error reporting if not NULL. 4230 * 4231 * @return 4232 * 0 on success, negative value otherwise and rte_errno is set. 4233 */ 4234 static int 4235 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 4236 struct rte_flow *flow, 4237 const struct rte_flow_action *actions, 4238 struct rte_flow_error *error) 4239 { 4240 struct mlx5_priv *priv = dev->data->dev_private; 4241 struct mlx5_dev_config *config = &priv->config; 4242 struct mlx5_flow_mreg_copy_resource *mcp_res; 4243 const struct rte_flow_action_mark *mark; 4244 4245 /* Check whether extensive metadata feature is engaged. */ 4246 if (!config->dv_flow_en || 4247 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4248 !mlx5_flow_ext_mreg_supported(dev) || 4249 !priv->sh->dv_regc0_mask) 4250 return 0; 4251 /* Find MARK action. */ 4252 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4253 switch (actions->type) { 4254 case RTE_FLOW_ACTION_TYPE_FLAG: 4255 mcp_res = flow_mreg_add_copy_action 4256 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4257 if (!mcp_res) 4258 return -rte_errno; 4259 flow->rix_mreg_copy = mcp_res->idx; 4260 return 0; 4261 case RTE_FLOW_ACTION_TYPE_MARK: 4262 mark = (const struct rte_flow_action_mark *) 4263 actions->conf; 4264 mcp_res = 4265 flow_mreg_add_copy_action(dev, mark->id, error); 4266 if (!mcp_res) 4267 return -rte_errno; 4268 flow->rix_mreg_copy = mcp_res->idx; 4269 return 0; 4270 default: 4271 break; 4272 } 4273 } 4274 return 0; 4275 } 4276 4277 #define MLX5_MAX_SPLIT_ACTIONS 24 4278 #define MLX5_MAX_SPLIT_ITEMS 24 4279 4280 /** 4281 * Split the hairpin flow. 4282 * Since HW can't support encap and push-vlan on Rx, we move these 4283 * actions to Tx. 4284 * If the count action is after the encap then we also 4285 * move the count action. in this case the count will also measure 4286 * the outer bytes. 4287 * 4288 * @param dev 4289 * Pointer to Ethernet device. 4290 * @param[in] actions 4291 * Associated actions (list terminated by the END action). 4292 * @param[out] actions_rx 4293 * Rx flow actions. 4294 * @param[out] actions_tx 4295 * Tx flow actions.. 4296 * @param[out] pattern_tx 4297 * The pattern items for the Tx flow. 4298 * @param[out] flow_id 4299 * The flow ID connected to this flow. 4300 * 4301 * @return 4302 * 0 on success. 4303 */ 4304 static int 4305 flow_hairpin_split(struct rte_eth_dev *dev, 4306 const struct rte_flow_action actions[], 4307 struct rte_flow_action actions_rx[], 4308 struct rte_flow_action actions_tx[], 4309 struct rte_flow_item pattern_tx[], 4310 uint32_t flow_id) 4311 { 4312 const struct rte_flow_action_raw_encap *raw_encap; 4313 const struct rte_flow_action_raw_decap *raw_decap; 4314 struct mlx5_rte_flow_action_set_tag *set_tag; 4315 struct rte_flow_action *tag_action; 4316 struct mlx5_rte_flow_item_tag *tag_item; 4317 struct rte_flow_item *item; 4318 char *addr; 4319 int encap = 0; 4320 4321 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4322 switch (actions->type) { 4323 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4324 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4325 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4326 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4327 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4328 rte_memcpy(actions_tx, actions, 4329 sizeof(struct rte_flow_action)); 4330 actions_tx++; 4331 break; 4332 case RTE_FLOW_ACTION_TYPE_COUNT: 4333 if (encap) { 4334 rte_memcpy(actions_tx, actions, 4335 sizeof(struct rte_flow_action)); 4336 actions_tx++; 4337 } else { 4338 rte_memcpy(actions_rx, actions, 4339 sizeof(struct rte_flow_action)); 4340 actions_rx++; 4341 } 4342 break; 4343 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4344 raw_encap = actions->conf; 4345 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) { 4346 memcpy(actions_tx, actions, 4347 sizeof(struct rte_flow_action)); 4348 actions_tx++; 4349 encap = 1; 4350 } else { 4351 rte_memcpy(actions_rx, actions, 4352 sizeof(struct rte_flow_action)); 4353 actions_rx++; 4354 } 4355 break; 4356 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4357 raw_decap = actions->conf; 4358 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) { 4359 memcpy(actions_tx, actions, 4360 sizeof(struct rte_flow_action)); 4361 actions_tx++; 4362 } else { 4363 rte_memcpy(actions_rx, actions, 4364 sizeof(struct rte_flow_action)); 4365 actions_rx++; 4366 } 4367 break; 4368 default: 4369 rte_memcpy(actions_rx, actions, 4370 sizeof(struct rte_flow_action)); 4371 actions_rx++; 4372 break; 4373 } 4374 } 4375 /* Add set meta action and end action for the Rx flow. */ 4376 tag_action = actions_rx; 4377 tag_action->type = (enum rte_flow_action_type) 4378 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4379 actions_rx++; 4380 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4381 actions_rx++; 4382 set_tag = (void *)actions_rx; 4383 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4384 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), 4385 .data = flow_id, 4386 }; 4387 MLX5_ASSERT(set_tag->id > REG_NON); 4388 tag_action->conf = set_tag; 4389 /* Create Tx item list. */ 4390 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4391 addr = (void *)&pattern_tx[2]; 4392 item = pattern_tx; 4393 item->type = (enum rte_flow_item_type) 4394 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4395 tag_item = (void *)addr; 4396 tag_item->data = flow_id; 4397 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4398 MLX5_ASSERT(set_tag->id > REG_NON); 4399 item->spec = tag_item; 4400 addr += sizeof(struct mlx5_rte_flow_item_tag); 4401 tag_item = (void *)addr; 4402 tag_item->data = UINT32_MAX; 4403 tag_item->id = UINT16_MAX; 4404 item->mask = tag_item; 4405 item->last = NULL; 4406 item++; 4407 item->type = RTE_FLOW_ITEM_TYPE_END; 4408 return 0; 4409 } 4410 4411 /** 4412 * The last stage of splitting chain, just creates the subflow 4413 * without any modification. 4414 * 4415 * @param[in] dev 4416 * Pointer to Ethernet device. 4417 * @param[in] flow 4418 * Parent flow structure pointer. 4419 * @param[in, out] sub_flow 4420 * Pointer to return the created subflow, may be NULL. 4421 * @param[in] attr 4422 * Flow rule attributes. 4423 * @param[in] items 4424 * Pattern specification (list terminated by the END pattern item). 4425 * @param[in] actions 4426 * Associated actions (list terminated by the END action). 4427 * @param[in] flow_split_info 4428 * Pointer to flow split info structure. 4429 * @param[out] error 4430 * Perform verbose error reporting if not NULL. 4431 * @return 4432 * 0 on success, negative value otherwise 4433 */ 4434 static int 4435 flow_create_split_inner(struct rte_eth_dev *dev, 4436 struct rte_flow *flow, 4437 struct mlx5_flow **sub_flow, 4438 const struct rte_flow_attr *attr, 4439 const struct rte_flow_item items[], 4440 const struct rte_flow_action actions[], 4441 struct mlx5_flow_split_info *flow_split_info, 4442 struct rte_flow_error *error) 4443 { 4444 struct mlx5_flow *dev_flow; 4445 4446 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4447 flow_split_info->flow_idx, error); 4448 if (!dev_flow) 4449 return -rte_errno; 4450 dev_flow->flow = flow; 4451 dev_flow->external = flow_split_info->external; 4452 dev_flow->skip_scale = flow_split_info->skip_scale; 4453 /* Subflow object was created, we must include one in the list. */ 4454 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4455 dev_flow->handle, next); 4456 /* 4457 * If dev_flow is as one of the suffix flow, some actions in suffix 4458 * flow may need some user defined item layer flags, and pass the 4459 * Metadate rxq mark flag to suffix flow as well. 4460 */ 4461 if (flow_split_info->prefix_layers) 4462 dev_flow->handle->layers = flow_split_info->prefix_layers; 4463 if (flow_split_info->prefix_mark) 4464 dev_flow->handle->mark = 1; 4465 if (sub_flow) 4466 *sub_flow = dev_flow; 4467 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4468 dev_flow->dv.table_id = flow_split_info->table_id; 4469 #endif 4470 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4471 } 4472 4473 /** 4474 * Get the sub policy of a meter. 4475 * 4476 * @param[in] dev 4477 * Pointer to Ethernet device. 4478 * @param[in] flow 4479 * Parent flow structure pointer. 4480 * @param[in] policy_id; 4481 * Meter Policy id. 4482 * @param[in] attr 4483 * Flow rule attributes. 4484 * @param[in] items 4485 * Pattern specification (list terminated by the END pattern item). 4486 * @param[out] error 4487 * Perform verbose error reporting if not NULL. 4488 * 4489 * @return 4490 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set. 4491 */ 4492 static struct mlx5_flow_meter_sub_policy * 4493 get_meter_sub_policy(struct rte_eth_dev *dev, 4494 struct rte_flow *flow, 4495 uint32_t policy_id, 4496 const struct rte_flow_attr *attr, 4497 const struct rte_flow_item items[], 4498 struct rte_flow_error *error) 4499 { 4500 struct mlx5_flow_meter_policy *policy; 4501 struct mlx5_flow_meter_sub_policy *sub_policy = NULL; 4502 4503 policy = mlx5_flow_meter_policy_find(dev, policy_id, NULL); 4504 if (!policy) { 4505 rte_flow_error_set(error, EINVAL, 4506 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4507 "Failed to find Meter Policy."); 4508 goto exit; 4509 } 4510 if (policy->is_rss) { 4511 struct mlx5_flow_workspace *wks = 4512 mlx5_flow_get_thread_workspace(); 4513 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS]; 4514 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0}; 4515 uint32_t i; 4516 4517 MLX5_ASSERT(wks); 4518 /** 4519 * This is a tmp dev_flow, 4520 * no need to register any matcher for it in translate. 4521 */ 4522 wks->skip_matcher_reg = 1; 4523 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) { 4524 struct mlx5_flow dev_flow = {0}; 4525 struct mlx5_flow_handle dev_handle = { {0} }; 4526 const void *rss_act = policy->act_cnt[i].rss->conf; 4527 struct rte_flow_action rss_actions[2] = { 4528 [0] = { 4529 .type = RTE_FLOW_ACTION_TYPE_RSS, 4530 .conf = rss_act 4531 }, 4532 [1] = { 4533 .type = RTE_FLOW_ACTION_TYPE_END, 4534 .conf = NULL 4535 } 4536 }; 4537 4538 dev_flow.handle = &dev_handle; 4539 dev_flow.ingress = attr->ingress; 4540 dev_flow.flow = flow; 4541 dev_flow.external = 0; 4542 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4543 dev_flow.dv.transfer = attr->transfer; 4544 #endif 4545 /* Translate RSS action to get rss hash fields. */ 4546 if (flow_drv_translate(dev, &dev_flow, attr, 4547 items, rss_actions, error)) 4548 goto exit; 4549 rss_desc_v[i] = wks->rss_desc; 4550 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN; 4551 rss_desc_v[i].hash_fields = dev_flow.hash_fields; 4552 rss_desc_v[i].queue_num = rss_desc_v[i].hash_fields ? 4553 rss_desc_v[i].queue_num : 1; 4554 rss_desc[i] = &rss_desc_v[i]; 4555 } 4556 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev, 4557 flow, policy, rss_desc); 4558 } else { 4559 enum mlx5_meter_domain mtr_domain = 4560 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4561 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4562 MLX5_MTR_DOMAIN_INGRESS; 4563 sub_policy = policy->sub_policys[mtr_domain][0]; 4564 } 4565 if (!sub_policy) { 4566 rte_flow_error_set(error, EINVAL, 4567 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4568 "Failed to get meter sub-policy."); 4569 goto exit; 4570 } 4571 exit: 4572 return sub_policy; 4573 } 4574 4575 /** 4576 * Split the meter flow. 4577 * 4578 * As meter flow will split to three sub flow, other than meter 4579 * action, the other actions make sense to only meter accepts 4580 * the packet. If it need to be dropped, no other additional 4581 * actions should be take. 4582 * 4583 * One kind of special action which decapsulates the L3 tunnel 4584 * header will be in the prefix sub flow, as not to take the 4585 * L3 tunnel header into account. 4586 * 4587 * @param[in] dev 4588 * Pointer to Ethernet device. 4589 * @param[in] flow 4590 * Parent flow structure pointer. 4591 * @param[in] fm 4592 * Pointer to flow meter structure. 4593 * @param[in] attr 4594 * Flow rule attributes. 4595 * @param[in] items 4596 * Pattern specification (list terminated by the END pattern item). 4597 * @param[out] sfx_items 4598 * Suffix flow match items (list terminated by the END pattern item). 4599 * @param[in] actions 4600 * Associated actions (list terminated by the END action). 4601 * @param[out] actions_sfx 4602 * Suffix flow actions. 4603 * @param[out] actions_pre 4604 * Prefix flow actions. 4605 * @param[out] mtr_flow_id 4606 * Pointer to meter flow id. 4607 * @param[out] error 4608 * Perform verbose error reporting if not NULL. 4609 * 4610 * @return 4611 * 0 on success, a negative errno value otherwise and rte_errno is set. 4612 */ 4613 static int 4614 flow_meter_split_prep(struct rte_eth_dev *dev, 4615 struct rte_flow *flow, 4616 struct mlx5_flow_meter_info *fm, 4617 const struct rte_flow_attr *attr, 4618 const struct rte_flow_item items[], 4619 struct rte_flow_item sfx_items[], 4620 const struct rte_flow_action actions[], 4621 struct rte_flow_action actions_sfx[], 4622 struct rte_flow_action actions_pre[], 4623 uint32_t *mtr_flow_id, 4624 struct rte_flow_error *error) 4625 { 4626 struct mlx5_priv *priv = dev->data->dev_private; 4627 struct rte_flow_action *tag_action = NULL; 4628 struct rte_flow_item *tag_item; 4629 struct mlx5_rte_flow_action_set_tag *set_tag; 4630 const struct rte_flow_action_raw_encap *raw_encap; 4631 const struct rte_flow_action_raw_decap *raw_decap; 4632 struct mlx5_rte_flow_item_tag *tag_item_spec; 4633 struct mlx5_rte_flow_item_tag *tag_item_mask; 4634 uint32_t tag_id = 0; 4635 bool copy_vlan = false; 4636 struct rte_flow_action *hw_mtr_action; 4637 struct rte_flow_action *action_pre_head = NULL; 4638 bool mtr_first = priv->sh->meter_aso_en && 4639 (attr->egress || 4640 (attr->transfer && priv->representor_id != UINT16_MAX)); 4641 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0; 4642 uint8_t mtr_reg_bits = priv->mtr_reg_share ? 4643 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS; 4644 uint32_t flow_id = 0; 4645 uint32_t flow_id_reversed = 0; 4646 uint8_t flow_id_bits = 0; 4647 int shift; 4648 4649 /* For ASO meter, meter must be before tag in TX direction. */ 4650 if (mtr_first) { 4651 action_pre_head = actions_pre++; 4652 /* Leave space for tag action. */ 4653 tag_action = actions_pre++; 4654 } 4655 /* Prepare the actions for prefix and suffix flow. */ 4656 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4657 struct rte_flow_action *action_cur = NULL; 4658 4659 switch (actions->type) { 4660 case RTE_FLOW_ACTION_TYPE_METER: 4661 if (mtr_first) { 4662 action_cur = action_pre_head; 4663 } else { 4664 /* Leave space for tag action. */ 4665 tag_action = actions_pre++; 4666 action_cur = actions_pre++; 4667 } 4668 break; 4669 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4670 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4671 action_cur = actions_pre++; 4672 break; 4673 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4674 raw_encap = actions->conf; 4675 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 4676 action_cur = actions_pre++; 4677 break; 4678 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4679 raw_decap = actions->conf; 4680 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4681 action_cur = actions_pre++; 4682 break; 4683 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4684 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4685 copy_vlan = true; 4686 break; 4687 default: 4688 break; 4689 } 4690 if (!action_cur) 4691 action_cur = (fm->def_policy) ? 4692 actions_sfx++ : actions_pre++; 4693 memcpy(action_cur, actions, sizeof(struct rte_flow_action)); 4694 } 4695 /* Add end action to the actions. */ 4696 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 4697 if (priv->sh->meter_aso_en) { 4698 /** 4699 * For ASO meter, need to add an extra jump action explicitly, 4700 * to jump from meter to policer table. 4701 */ 4702 struct mlx5_flow_meter_sub_policy *sub_policy; 4703 struct mlx5_flow_tbl_data_entry *tbl_data; 4704 4705 if (!fm->def_policy) { 4706 sub_policy = get_meter_sub_policy(dev, flow, 4707 fm->policy_id, attr, 4708 items, error); 4709 if (!sub_policy) 4710 return -rte_errno; 4711 } else { 4712 enum mlx5_meter_domain mtr_domain = 4713 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4714 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4715 MLX5_MTR_DOMAIN_INGRESS; 4716 4717 sub_policy = 4718 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy; 4719 } 4720 tbl_data = container_of(sub_policy->tbl_rsc, 4721 struct mlx5_flow_tbl_data_entry, tbl); 4722 hw_mtr_action = actions_pre++; 4723 hw_mtr_action->type = (enum rte_flow_action_type) 4724 MLX5_RTE_FLOW_ACTION_TYPE_JUMP; 4725 hw_mtr_action->conf = tbl_data->jump.action; 4726 } 4727 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 4728 actions_pre++; 4729 if (!tag_action) 4730 return rte_flow_error_set(error, ENOMEM, 4731 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4732 "No tag action space."); 4733 if (!mtr_flow_id) { 4734 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID; 4735 goto exit; 4736 } 4737 /* Only default-policy Meter creates mtr flow id. */ 4738 if (fm->def_policy) { 4739 mlx5_ipool_malloc(fm->flow_ipool, &tag_id); 4740 if (!tag_id) 4741 return rte_flow_error_set(error, ENOMEM, 4742 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4743 "Failed to allocate meter flow id."); 4744 flow_id = tag_id - 1; 4745 flow_id_bits = MLX5_REG_BITS - __builtin_clz(flow_id); 4746 flow_id_bits = flow_id_bits ? flow_id_bits : 1; 4747 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) > 4748 mtr_reg_bits) { 4749 mlx5_ipool_free(fm->flow_ipool, tag_id); 4750 return rte_flow_error_set(error, EINVAL, 4751 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4752 "Meter flow id exceeds max limit."); 4753 } 4754 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits) 4755 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits; 4756 } 4757 /* Prepare the suffix subflow items. */ 4758 tag_item = sfx_items++; 4759 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 4760 int item_type = items->type; 4761 4762 switch (item_type) { 4763 case RTE_FLOW_ITEM_TYPE_PORT_ID: 4764 memcpy(sfx_items, items, sizeof(*sfx_items)); 4765 sfx_items++; 4766 break; 4767 case RTE_FLOW_ITEM_TYPE_VLAN: 4768 if (copy_vlan) { 4769 memcpy(sfx_items, items, sizeof(*sfx_items)); 4770 /* 4771 * Convert to internal match item, it is used 4772 * for vlan push and set vid. 4773 */ 4774 sfx_items->type = (enum rte_flow_item_type) 4775 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 4776 sfx_items++; 4777 } 4778 break; 4779 default: 4780 break; 4781 } 4782 } 4783 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 4784 sfx_items++; 4785 /* Build tag actions and items for meter_id/meter flow_id. */ 4786 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre; 4787 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 4788 tag_item_mask = tag_item_spec + 1; 4789 /* Both flow_id and meter_id share the same register. */ 4790 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4791 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 4792 0, error), 4793 .offset = mtr_id_offset, 4794 .length = mtr_reg_bits, 4795 .data = flow->meter, 4796 }; 4797 /* 4798 * The color Reg bits used by flow_id are growing from 4799 * msb to lsb, so must do bit reverse for flow_id val in RegC. 4800 */ 4801 for (shift = 0; shift < flow_id_bits; shift++) 4802 flow_id_reversed = (flow_id_reversed << 1) | 4803 ((flow_id >> shift) & 0x1); 4804 set_tag->data |= 4805 flow_id_reversed << (mtr_reg_bits - flow_id_bits); 4806 tag_item_spec->id = set_tag->id; 4807 tag_item_spec->data = set_tag->data << mtr_id_offset; 4808 tag_item_mask->data = UINT32_MAX << mtr_id_offset; 4809 tag_action->type = (enum rte_flow_action_type) 4810 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4811 tag_action->conf = set_tag; 4812 tag_item->type = (enum rte_flow_item_type) 4813 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4814 tag_item->spec = tag_item_spec; 4815 tag_item->last = NULL; 4816 tag_item->mask = tag_item_mask; 4817 exit: 4818 if (mtr_flow_id) 4819 *mtr_flow_id = tag_id; 4820 return 0; 4821 } 4822 4823 /** 4824 * Split action list having QUEUE/RSS for metadata register copy. 4825 * 4826 * Once Q/RSS action is detected in user's action list, the flow action 4827 * should be split in order to copy metadata registers, which will happen in 4828 * RX_CP_TBL like, 4829 * - CQE->flow_tag := reg_c[1] (MARK) 4830 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4831 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 4832 * This is because the last action of each flow must be a terminal action 4833 * (QUEUE, RSS or DROP). 4834 * 4835 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 4836 * stored and kept in the mlx5_flow structure per each sub_flow. 4837 * 4838 * The Q/RSS action is replaced with, 4839 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 4840 * And the following JUMP action is added at the end, 4841 * - JUMP, to RX_CP_TBL. 4842 * 4843 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 4844 * flow_create_split_metadata() routine. The flow will look like, 4845 * - If flow ID matches (reg_c[2]), perform Q/RSS. 4846 * 4847 * @param dev 4848 * Pointer to Ethernet device. 4849 * @param[out] split_actions 4850 * Pointer to store split actions to jump to CP_TBL. 4851 * @param[in] actions 4852 * Pointer to the list of original flow actions. 4853 * @param[in] qrss 4854 * Pointer to the Q/RSS action. 4855 * @param[in] actions_n 4856 * Number of original actions. 4857 * @param[out] error 4858 * Perform verbose error reporting if not NULL. 4859 * 4860 * @return 4861 * non-zero unique flow_id on success, otherwise 0 and 4862 * error/rte_error are set. 4863 */ 4864 static uint32_t 4865 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 4866 struct rte_flow_action *split_actions, 4867 const struct rte_flow_action *actions, 4868 const struct rte_flow_action *qrss, 4869 int actions_n, struct rte_flow_error *error) 4870 { 4871 struct mlx5_priv *priv = dev->data->dev_private; 4872 struct mlx5_rte_flow_action_set_tag *set_tag; 4873 struct rte_flow_action_jump *jump; 4874 const int qrss_idx = qrss - actions; 4875 uint32_t flow_id = 0; 4876 int ret = 0; 4877 4878 /* 4879 * Given actions will be split 4880 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 4881 * - Add jump to mreg CP_TBL. 4882 * As a result, there will be one more action. 4883 */ 4884 ++actions_n; 4885 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 4886 set_tag = (void *)(split_actions + actions_n); 4887 /* 4888 * If tag action is not set to void(it means we are not the meter 4889 * suffix flow), add the tag action. Since meter suffix flow already 4890 * has the tag added. 4891 */ 4892 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 4893 /* 4894 * Allocate the new subflow ID. This one is unique within 4895 * device and not shared with representors. Otherwise, 4896 * we would have to resolve multi-thread access synch 4897 * issue. Each flow on the shared device is appended 4898 * with source vport identifier, so the resulting 4899 * flows will be unique in the shared (by master and 4900 * representors) domain even if they have coinciding 4901 * IDs. 4902 */ 4903 mlx5_ipool_malloc(priv->sh->ipool 4904 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); 4905 if (!flow_id) 4906 return rte_flow_error_set(error, ENOMEM, 4907 RTE_FLOW_ERROR_TYPE_ACTION, 4908 NULL, "can't allocate id " 4909 "for split Q/RSS subflow"); 4910 /* Internal SET_TAG action to set flow ID. */ 4911 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 4912 .data = flow_id, 4913 }; 4914 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 4915 if (ret < 0) 4916 return ret; 4917 set_tag->id = ret; 4918 /* Construct new actions array. */ 4919 /* Replace QUEUE/RSS action. */ 4920 split_actions[qrss_idx] = (struct rte_flow_action){ 4921 .type = (enum rte_flow_action_type) 4922 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 4923 .conf = set_tag, 4924 }; 4925 } 4926 /* JUMP action to jump to mreg copy table (CP_TBL). */ 4927 jump = (void *)(set_tag + 1); 4928 *jump = (struct rte_flow_action_jump){ 4929 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4930 }; 4931 split_actions[actions_n - 2] = (struct rte_flow_action){ 4932 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4933 .conf = jump, 4934 }; 4935 split_actions[actions_n - 1] = (struct rte_flow_action){ 4936 .type = RTE_FLOW_ACTION_TYPE_END, 4937 }; 4938 return flow_id; 4939 } 4940 4941 /** 4942 * Extend the given action list for Tx metadata copy. 4943 * 4944 * Copy the given action list to the ext_actions and add flow metadata register 4945 * copy action in order to copy reg_a set by WQE to reg_c[0]. 4946 * 4947 * @param[out] ext_actions 4948 * Pointer to the extended action list. 4949 * @param[in] actions 4950 * Pointer to the list of actions. 4951 * @param[in] actions_n 4952 * Number of actions in the list. 4953 * @param[out] error 4954 * Perform verbose error reporting if not NULL. 4955 * @param[in] encap_idx 4956 * The encap action inndex. 4957 * 4958 * @return 4959 * 0 on success, negative value otherwise 4960 */ 4961 static int 4962 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 4963 struct rte_flow_action *ext_actions, 4964 const struct rte_flow_action *actions, 4965 int actions_n, struct rte_flow_error *error, 4966 int encap_idx) 4967 { 4968 struct mlx5_flow_action_copy_mreg *cp_mreg = 4969 (struct mlx5_flow_action_copy_mreg *) 4970 (ext_actions + actions_n + 1); 4971 int ret; 4972 4973 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4974 if (ret < 0) 4975 return ret; 4976 cp_mreg->dst = ret; 4977 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 4978 if (ret < 0) 4979 return ret; 4980 cp_mreg->src = ret; 4981 if (encap_idx != 0) 4982 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 4983 if (encap_idx == actions_n - 1) { 4984 ext_actions[actions_n - 1] = (struct rte_flow_action){ 4985 .type = (enum rte_flow_action_type) 4986 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4987 .conf = cp_mreg, 4988 }; 4989 ext_actions[actions_n] = (struct rte_flow_action){ 4990 .type = RTE_FLOW_ACTION_TYPE_END, 4991 }; 4992 } else { 4993 ext_actions[encap_idx] = (struct rte_flow_action){ 4994 .type = (enum rte_flow_action_type) 4995 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4996 .conf = cp_mreg, 4997 }; 4998 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 4999 sizeof(*ext_actions) * (actions_n - encap_idx)); 5000 } 5001 return 0; 5002 } 5003 5004 /** 5005 * Check the match action from the action list. 5006 * 5007 * @param[in] actions 5008 * Pointer to the list of actions. 5009 * @param[in] attr 5010 * Flow rule attributes. 5011 * @param[in] action 5012 * The action to be check if exist. 5013 * @param[out] match_action_pos 5014 * Pointer to the position of the matched action if exists, otherwise is -1. 5015 * @param[out] qrss_action_pos 5016 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 5017 * @param[out] modify_after_mirror 5018 * Pointer to the flag of modify action after FDB mirroring. 5019 * 5020 * @return 5021 * > 0 the total number of actions. 5022 * 0 if not found match action in action list. 5023 */ 5024 static int 5025 flow_check_match_action(const struct rte_flow_action actions[], 5026 const struct rte_flow_attr *attr, 5027 enum rte_flow_action_type action, 5028 int *match_action_pos, int *qrss_action_pos, 5029 int *modify_after_mirror) 5030 { 5031 const struct rte_flow_action_sample *sample; 5032 int actions_n = 0; 5033 uint32_t ratio = 0; 5034 int sub_type = 0; 5035 int flag = 0; 5036 int fdb_mirror = 0; 5037 5038 *match_action_pos = -1; 5039 *qrss_action_pos = -1; 5040 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5041 if (actions->type == action) { 5042 flag = 1; 5043 *match_action_pos = actions_n; 5044 } 5045 switch (actions->type) { 5046 case RTE_FLOW_ACTION_TYPE_QUEUE: 5047 case RTE_FLOW_ACTION_TYPE_RSS: 5048 *qrss_action_pos = actions_n; 5049 break; 5050 case RTE_FLOW_ACTION_TYPE_SAMPLE: 5051 sample = actions->conf; 5052 ratio = sample->ratio; 5053 sub_type = ((const struct rte_flow_action *) 5054 (sample->actions))->type; 5055 if (ratio == 1 && attr->transfer) 5056 fdb_mirror = 1; 5057 break; 5058 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 5059 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 5060 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 5061 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 5062 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 5063 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 5064 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 5065 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 5066 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 5067 case RTE_FLOW_ACTION_TYPE_SET_TTL: 5068 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 5069 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 5070 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 5071 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 5072 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 5073 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 5074 case RTE_FLOW_ACTION_TYPE_FLAG: 5075 case RTE_FLOW_ACTION_TYPE_MARK: 5076 case RTE_FLOW_ACTION_TYPE_SET_META: 5077 case RTE_FLOW_ACTION_TYPE_SET_TAG: 5078 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 5079 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5080 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5081 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 5082 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5083 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5084 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5085 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 5086 if (fdb_mirror) 5087 *modify_after_mirror = 1; 5088 break; 5089 default: 5090 break; 5091 } 5092 actions_n++; 5093 } 5094 if (flag && fdb_mirror && !*modify_after_mirror) { 5095 /* FDB mirroring uses the destination array to implement 5096 * instead of FLOW_SAMPLER object. 5097 */ 5098 if (sub_type != RTE_FLOW_ACTION_TYPE_END) 5099 flag = 0; 5100 } 5101 /* Count RTE_FLOW_ACTION_TYPE_END. */ 5102 return flag ? actions_n + 1 : 0; 5103 } 5104 5105 #define SAMPLE_SUFFIX_ITEM 2 5106 5107 /** 5108 * Split the sample flow. 5109 * 5110 * As sample flow will split to two sub flow, sample flow with 5111 * sample action, the other actions will move to new suffix flow. 5112 * 5113 * Also add unique tag id with tag action in the sample flow, 5114 * the same tag id will be as match in the suffix flow. 5115 * 5116 * @param dev 5117 * Pointer to Ethernet device. 5118 * @param[in] add_tag 5119 * Add extra tag action flag. 5120 * @param[out] sfx_items 5121 * Suffix flow match items (list terminated by the END pattern item). 5122 * @param[in] actions 5123 * Associated actions (list terminated by the END action). 5124 * @param[out] actions_sfx 5125 * Suffix flow actions. 5126 * @param[out] actions_pre 5127 * Prefix flow actions. 5128 * @param[in] actions_n 5129 * The total number of actions. 5130 * @param[in] sample_action_pos 5131 * The sample action position. 5132 * @param[in] qrss_action_pos 5133 * The Queue/RSS action position. 5134 * @param[in] jump_table 5135 * Add extra jump action flag. 5136 * @param[out] error 5137 * Perform verbose error reporting if not NULL. 5138 * 5139 * @return 5140 * 0 on success, or unique flow_id, a negative errno value 5141 * otherwise and rte_errno is set. 5142 */ 5143 static int 5144 flow_sample_split_prep(struct rte_eth_dev *dev, 5145 int add_tag, 5146 struct rte_flow_item sfx_items[], 5147 const struct rte_flow_action actions[], 5148 struct rte_flow_action actions_sfx[], 5149 struct rte_flow_action actions_pre[], 5150 int actions_n, 5151 int sample_action_pos, 5152 int qrss_action_pos, 5153 int jump_table, 5154 struct rte_flow_error *error) 5155 { 5156 struct mlx5_priv *priv = dev->data->dev_private; 5157 struct mlx5_rte_flow_action_set_tag *set_tag; 5158 struct mlx5_rte_flow_item_tag *tag_spec; 5159 struct mlx5_rte_flow_item_tag *tag_mask; 5160 struct rte_flow_action_jump *jump_action; 5161 uint32_t tag_id = 0; 5162 int index; 5163 int append_index = 0; 5164 int ret; 5165 5166 if (sample_action_pos < 0) 5167 return rte_flow_error_set(error, EINVAL, 5168 RTE_FLOW_ERROR_TYPE_ACTION, 5169 NULL, "invalid position of sample " 5170 "action in list"); 5171 /* Prepare the actions for prefix and suffix flow. */ 5172 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 5173 index = qrss_action_pos; 5174 /* Put the preceding the Queue/RSS action into prefix flow. */ 5175 if (index != 0) 5176 memcpy(actions_pre, actions, 5177 sizeof(struct rte_flow_action) * index); 5178 /* Put others preceding the sample action into prefix flow. */ 5179 if (sample_action_pos > index + 1) 5180 memcpy(actions_pre + index, actions + index + 1, 5181 sizeof(struct rte_flow_action) * 5182 (sample_action_pos - index - 1)); 5183 index = sample_action_pos - 1; 5184 /* Put Queue/RSS action into Suffix flow. */ 5185 memcpy(actions_sfx, actions + qrss_action_pos, 5186 sizeof(struct rte_flow_action)); 5187 actions_sfx++; 5188 } else { 5189 index = sample_action_pos; 5190 if (index != 0) 5191 memcpy(actions_pre, actions, 5192 sizeof(struct rte_flow_action) * index); 5193 } 5194 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress. 5195 * For CX6DX and above, metadata registers Cx preserve their value, 5196 * add an extra tag action for NIC-RX and E-Switch Domain. 5197 */ 5198 if (add_tag) { 5199 /* Prepare the prefix tag action. */ 5200 append_index++; 5201 set_tag = (void *)(actions_pre + actions_n + append_index); 5202 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); 5203 if (ret < 0) 5204 return ret; 5205 mlx5_ipool_malloc(priv->sh->ipool 5206 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); 5207 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5208 .id = ret, 5209 .data = tag_id, 5210 }; 5211 /* Prepare the suffix subflow items. */ 5212 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 5213 tag_spec->data = tag_id; 5214 tag_spec->id = set_tag->id; 5215 tag_mask = tag_spec + 1; 5216 tag_mask->data = UINT32_MAX; 5217 sfx_items[0] = (struct rte_flow_item){ 5218 .type = (enum rte_flow_item_type) 5219 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5220 .spec = tag_spec, 5221 .last = NULL, 5222 .mask = tag_mask, 5223 }; 5224 sfx_items[1] = (struct rte_flow_item){ 5225 .type = (enum rte_flow_item_type) 5226 RTE_FLOW_ITEM_TYPE_END, 5227 }; 5228 /* Prepare the tag action in prefix subflow. */ 5229 actions_pre[index++] = 5230 (struct rte_flow_action){ 5231 .type = (enum rte_flow_action_type) 5232 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5233 .conf = set_tag, 5234 }; 5235 } 5236 memcpy(actions_pre + index, actions + sample_action_pos, 5237 sizeof(struct rte_flow_action)); 5238 index += 1; 5239 /* For the modify action after the sample action in E-Switch mirroring, 5240 * Add the extra jump action in prefix subflow and jump into the next 5241 * table, then do the modify action in the new table. 5242 */ 5243 if (jump_table) { 5244 /* Prepare the prefix jump action. */ 5245 append_index++; 5246 jump_action = (void *)(actions_pre + actions_n + append_index); 5247 jump_action->group = jump_table; 5248 actions_pre[index++] = 5249 (struct rte_flow_action){ 5250 .type = (enum rte_flow_action_type) 5251 RTE_FLOW_ACTION_TYPE_JUMP, 5252 .conf = jump_action, 5253 }; 5254 } 5255 actions_pre[index] = (struct rte_flow_action){ 5256 .type = (enum rte_flow_action_type) 5257 RTE_FLOW_ACTION_TYPE_END, 5258 }; 5259 /* Put the actions after sample into Suffix flow. */ 5260 memcpy(actions_sfx, actions + sample_action_pos + 1, 5261 sizeof(struct rte_flow_action) * 5262 (actions_n - sample_action_pos - 1)); 5263 return tag_id; 5264 } 5265 5266 /** 5267 * The splitting for metadata feature. 5268 * 5269 * - Q/RSS action on NIC Rx should be split in order to pass by 5270 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5271 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5272 * 5273 * - All the actions on NIC Tx should have a mreg copy action to 5274 * copy reg_a from WQE to reg_c[0]. 5275 * 5276 * @param dev 5277 * Pointer to Ethernet device. 5278 * @param[in] flow 5279 * Parent flow structure pointer. 5280 * @param[in] attr 5281 * Flow rule attributes. 5282 * @param[in] items 5283 * Pattern specification (list terminated by the END pattern item). 5284 * @param[in] actions 5285 * Associated actions (list terminated by the END action). 5286 * @param[in] flow_split_info 5287 * Pointer to flow split info structure. 5288 * @param[out] error 5289 * Perform verbose error reporting if not NULL. 5290 * @return 5291 * 0 on success, negative value otherwise 5292 */ 5293 static int 5294 flow_create_split_metadata(struct rte_eth_dev *dev, 5295 struct rte_flow *flow, 5296 const struct rte_flow_attr *attr, 5297 const struct rte_flow_item items[], 5298 const struct rte_flow_action actions[], 5299 struct mlx5_flow_split_info *flow_split_info, 5300 struct rte_flow_error *error) 5301 { 5302 struct mlx5_priv *priv = dev->data->dev_private; 5303 struct mlx5_dev_config *config = &priv->config; 5304 const struct rte_flow_action *qrss = NULL; 5305 struct rte_flow_action *ext_actions = NULL; 5306 struct mlx5_flow *dev_flow = NULL; 5307 uint32_t qrss_id = 0; 5308 int mtr_sfx = 0; 5309 size_t act_size; 5310 int actions_n; 5311 int encap_idx; 5312 int ret; 5313 5314 /* Check whether extensive metadata feature is engaged. */ 5315 if (!config->dv_flow_en || 5316 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 5317 !mlx5_flow_ext_mreg_supported(dev)) 5318 return flow_create_split_inner(dev, flow, NULL, attr, items, 5319 actions, flow_split_info, error); 5320 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 5321 &encap_idx); 5322 if (qrss) { 5323 /* Exclude hairpin flows from splitting. */ 5324 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 5325 const struct rte_flow_action_queue *queue; 5326 5327 queue = qrss->conf; 5328 if (mlx5_rxq_get_type(dev, queue->index) == 5329 MLX5_RXQ_TYPE_HAIRPIN) 5330 qrss = NULL; 5331 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 5332 const struct rte_flow_action_rss *rss; 5333 5334 rss = qrss->conf; 5335 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 5336 MLX5_RXQ_TYPE_HAIRPIN) 5337 qrss = NULL; 5338 } 5339 } 5340 if (qrss) { 5341 /* Check if it is in meter suffix table. */ 5342 mtr_sfx = attr->group == (attr->transfer ? 5343 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5344 MLX5_FLOW_TABLE_LEVEL_METER); 5345 /* 5346 * Q/RSS action on NIC Rx should be split in order to pass by 5347 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5348 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5349 */ 5350 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5351 sizeof(struct rte_flow_action_set_tag) + 5352 sizeof(struct rte_flow_action_jump); 5353 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5354 SOCKET_ID_ANY); 5355 if (!ext_actions) 5356 return rte_flow_error_set(error, ENOMEM, 5357 RTE_FLOW_ERROR_TYPE_ACTION, 5358 NULL, "no memory to split " 5359 "metadata flow"); 5360 /* 5361 * If we are the suffix flow of meter, tag already exist. 5362 * Set the tag action to void. 5363 */ 5364 if (mtr_sfx) 5365 ext_actions[qrss - actions].type = 5366 RTE_FLOW_ACTION_TYPE_VOID; 5367 else 5368 ext_actions[qrss - actions].type = 5369 (enum rte_flow_action_type) 5370 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5371 /* 5372 * Create the new actions list with removed Q/RSS action 5373 * and appended set tag and jump to register copy table 5374 * (RX_CP_TBL). We should preallocate unique tag ID here 5375 * in advance, because it is needed for set tag action. 5376 */ 5377 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5378 qrss, actions_n, error); 5379 if (!mtr_sfx && !qrss_id) { 5380 ret = -rte_errno; 5381 goto exit; 5382 } 5383 } else if (attr->egress && !attr->transfer) { 5384 /* 5385 * All the actions on NIC Tx should have a metadata register 5386 * copy action to copy reg_a from WQE to reg_c[meta] 5387 */ 5388 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5389 sizeof(struct mlx5_flow_action_copy_mreg); 5390 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5391 SOCKET_ID_ANY); 5392 if (!ext_actions) 5393 return rte_flow_error_set(error, ENOMEM, 5394 RTE_FLOW_ERROR_TYPE_ACTION, 5395 NULL, "no memory to split " 5396 "metadata flow"); 5397 /* Create the action list appended with copy register. */ 5398 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5399 actions_n, error, encap_idx); 5400 if (ret < 0) 5401 goto exit; 5402 } 5403 /* Add the unmodified original or prefix subflow. */ 5404 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5405 items, ext_actions ? ext_actions : 5406 actions, flow_split_info, error); 5407 if (ret < 0) 5408 goto exit; 5409 MLX5_ASSERT(dev_flow); 5410 if (qrss) { 5411 const struct rte_flow_attr q_attr = { 5412 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5413 .ingress = 1, 5414 }; 5415 /* Internal PMD action to set register. */ 5416 struct mlx5_rte_flow_item_tag q_tag_spec = { 5417 .data = qrss_id, 5418 .id = REG_NON, 5419 }; 5420 struct rte_flow_item q_items[] = { 5421 { 5422 .type = (enum rte_flow_item_type) 5423 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5424 .spec = &q_tag_spec, 5425 .last = NULL, 5426 .mask = NULL, 5427 }, 5428 { 5429 .type = RTE_FLOW_ITEM_TYPE_END, 5430 }, 5431 }; 5432 struct rte_flow_action q_actions[] = { 5433 { 5434 .type = qrss->type, 5435 .conf = qrss->conf, 5436 }, 5437 { 5438 .type = RTE_FLOW_ACTION_TYPE_END, 5439 }, 5440 }; 5441 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5442 5443 /* 5444 * Configure the tag item only if there is no meter subflow. 5445 * Since tag is already marked in the meter suffix subflow 5446 * we can just use the meter suffix items as is. 5447 */ 5448 if (qrss_id) { 5449 /* Not meter subflow. */ 5450 MLX5_ASSERT(!mtr_sfx); 5451 /* 5452 * Put unique id in prefix flow due to it is destroyed 5453 * after suffix flow and id will be freed after there 5454 * is no actual flows with this id and identifier 5455 * reallocation becomes possible (for example, for 5456 * other flows in other threads). 5457 */ 5458 dev_flow->handle->split_flow_id = qrss_id; 5459 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5460 error); 5461 if (ret < 0) 5462 goto exit; 5463 q_tag_spec.id = ret; 5464 } 5465 dev_flow = NULL; 5466 /* Add suffix subflow to execute Q/RSS. */ 5467 flow_split_info->prefix_layers = layers; 5468 flow_split_info->prefix_mark = 0; 5469 ret = flow_create_split_inner(dev, flow, &dev_flow, 5470 &q_attr, mtr_sfx ? items : 5471 q_items, q_actions, 5472 flow_split_info, error); 5473 if (ret < 0) 5474 goto exit; 5475 /* qrss ID should be freed if failed. */ 5476 qrss_id = 0; 5477 MLX5_ASSERT(dev_flow); 5478 } 5479 5480 exit: 5481 /* 5482 * We do not destroy the partially created sub_flows in case of error. 5483 * These ones are included into parent flow list and will be destroyed 5484 * by flow_drv_destroy. 5485 */ 5486 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 5487 qrss_id); 5488 mlx5_free(ext_actions); 5489 return ret; 5490 } 5491 5492 /** 5493 * Create meter internal drop flow with the original pattern. 5494 * 5495 * @param dev 5496 * Pointer to Ethernet device. 5497 * @param[in] flow 5498 * Parent flow structure pointer. 5499 * @param[in] attr 5500 * Flow rule attributes. 5501 * @param[in] items 5502 * Pattern specification (list terminated by the END pattern item). 5503 * @param[in] flow_split_info 5504 * Pointer to flow split info structure. 5505 * @param[in] fm 5506 * Pointer to flow meter structure. 5507 * @param[out] error 5508 * Perform verbose error reporting if not NULL. 5509 * @return 5510 * 0 on success, negative value otherwise 5511 */ 5512 static uint32_t 5513 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev, 5514 struct rte_flow *flow, 5515 const struct rte_flow_attr *attr, 5516 const struct rte_flow_item items[], 5517 struct mlx5_flow_split_info *flow_split_info, 5518 struct mlx5_flow_meter_info *fm, 5519 struct rte_flow_error *error) 5520 { 5521 struct mlx5_flow *dev_flow = NULL; 5522 struct rte_flow_attr drop_attr = *attr; 5523 struct rte_flow_action drop_actions[3]; 5524 struct mlx5_flow_split_info drop_split_info = *flow_split_info; 5525 5526 MLX5_ASSERT(fm->drop_cnt); 5527 drop_actions[0].type = 5528 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 5529 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt; 5530 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP; 5531 drop_actions[1].conf = NULL; 5532 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END; 5533 drop_actions[2].conf = NULL; 5534 drop_split_info.external = false; 5535 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5536 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP; 5537 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER; 5538 return flow_create_split_inner(dev, flow, &dev_flow, 5539 &drop_attr, items, drop_actions, 5540 &drop_split_info, error); 5541 } 5542 5543 /** 5544 * The splitting for meter feature. 5545 * 5546 * - The meter flow will be split to two flows as prefix and 5547 * suffix flow. The packets make sense only it pass the prefix 5548 * meter action. 5549 * 5550 * - Reg_C_5 is used for the packet to match betweend prefix and 5551 * suffix flow. 5552 * 5553 * @param dev 5554 * Pointer to Ethernet device. 5555 * @param[in] flow 5556 * Parent flow structure pointer. 5557 * @param[in] attr 5558 * Flow rule attributes. 5559 * @param[in] items 5560 * Pattern specification (list terminated by the END pattern item). 5561 * @param[in] actions 5562 * Associated actions (list terminated by the END action). 5563 * @param[in] flow_split_info 5564 * Pointer to flow split info structure. 5565 * @param[out] error 5566 * Perform verbose error reporting if not NULL. 5567 * @return 5568 * 0 on success, negative value otherwise 5569 */ 5570 static int 5571 flow_create_split_meter(struct rte_eth_dev *dev, 5572 struct rte_flow *flow, 5573 const struct rte_flow_attr *attr, 5574 const struct rte_flow_item items[], 5575 const struct rte_flow_action actions[], 5576 struct mlx5_flow_split_info *flow_split_info, 5577 struct rte_flow_error *error) 5578 { 5579 struct mlx5_priv *priv = dev->data->dev_private; 5580 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); 5581 struct rte_flow_action *sfx_actions = NULL; 5582 struct rte_flow_action *pre_actions = NULL; 5583 struct rte_flow_item *sfx_items = NULL; 5584 struct mlx5_flow *dev_flow = NULL; 5585 struct rte_flow_attr sfx_attr = *attr; 5586 struct mlx5_flow_meter_info *fm = NULL; 5587 uint8_t skip_scale_restore; 5588 bool has_mtr = false; 5589 bool has_modify = false; 5590 bool set_mtr_reg = true; 5591 uint32_t meter_id = 0; 5592 uint32_t mtr_idx = 0; 5593 uint32_t mtr_flow_id = 0; 5594 size_t act_size; 5595 size_t item_size; 5596 int actions_n = 0; 5597 int ret = 0; 5598 5599 if (priv->mtr_en) 5600 actions_n = flow_check_meter_action(dev, actions, &has_mtr, 5601 &has_modify, &meter_id); 5602 if (has_mtr) { 5603 if (flow->meter) { 5604 fm = flow_dv_meter_find_by_idx(priv, flow->meter); 5605 if (!fm) 5606 return rte_flow_error_set(error, EINVAL, 5607 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5608 NULL, "Meter not found."); 5609 } else { 5610 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx); 5611 if (!fm) 5612 return rte_flow_error_set(error, EINVAL, 5613 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5614 NULL, "Meter not found."); 5615 ret = mlx5_flow_meter_attach(priv, fm, 5616 &sfx_attr, error); 5617 if (ret) 5618 return -rte_errno; 5619 flow->meter = mtr_idx; 5620 } 5621 MLX5_ASSERT(wks); 5622 wks->fm = fm; 5623 /* 5624 * If it isn't default-policy Meter, and 5625 * 1. There's no action in flow to change 5626 * packet (modify/encap/decap etc.), OR 5627 * 2. No drop count needed for this meter. 5628 * no need to use regC to save meter id anymore. 5629 */ 5630 if (!fm->def_policy && (!has_modify || !fm->drop_cnt)) 5631 set_mtr_reg = false; 5632 /* Prefix actions: meter, decap, encap, tag, jump, end. */ 5633 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) + 5634 sizeof(struct mlx5_rte_flow_action_set_tag); 5635 /* Suffix items: tag, vlan, port id, end. */ 5636 #define METER_SUFFIX_ITEM 4 5637 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 5638 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5639 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 5640 0, SOCKET_ID_ANY); 5641 if (!sfx_actions) 5642 return rte_flow_error_set(error, ENOMEM, 5643 RTE_FLOW_ERROR_TYPE_ACTION, 5644 NULL, "no memory to split " 5645 "meter flow"); 5646 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 5647 act_size); 5648 /* There's no suffix flow for meter of non-default policy. */ 5649 if (!fm->def_policy) 5650 pre_actions = sfx_actions + 1; 5651 else 5652 pre_actions = sfx_actions + actions_n; 5653 ret = flow_meter_split_prep(dev, flow, fm, &sfx_attr, 5654 items, sfx_items, actions, 5655 sfx_actions, pre_actions, 5656 (set_mtr_reg ? &mtr_flow_id : NULL), 5657 error); 5658 if (ret) { 5659 ret = -rte_errno; 5660 goto exit; 5661 } 5662 /* Add the prefix subflow. */ 5663 flow_split_info->prefix_mark = 0; 5664 skip_scale_restore = flow_split_info->skip_scale; 5665 flow_split_info->skip_scale |= 5666 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 5667 ret = flow_create_split_inner(dev, flow, &dev_flow, 5668 attr, items, pre_actions, 5669 flow_split_info, error); 5670 flow_split_info->skip_scale = skip_scale_restore; 5671 if (ret) { 5672 if (mtr_flow_id) 5673 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id); 5674 ret = -rte_errno; 5675 goto exit; 5676 } 5677 if (mtr_flow_id) { 5678 dev_flow->handle->split_flow_id = mtr_flow_id; 5679 dev_flow->handle->is_meter_flow_id = 1; 5680 } 5681 if (!fm->def_policy) { 5682 if (!set_mtr_reg && fm->drop_cnt) 5683 ret = 5684 flow_meter_create_drop_flow_with_org_pattern(dev, flow, 5685 &sfx_attr, items, 5686 flow_split_info, 5687 fm, error); 5688 goto exit; 5689 } 5690 /* Setting the sfx group atrr. */ 5691 sfx_attr.group = sfx_attr.transfer ? 5692 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5693 MLX5_FLOW_TABLE_LEVEL_METER; 5694 flow_split_info->prefix_layers = 5695 flow_get_prefix_layer_flags(dev_flow); 5696 flow_split_info->prefix_mark = dev_flow->handle->mark; 5697 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX; 5698 } 5699 /* Add the prefix subflow. */ 5700 ret = flow_create_split_metadata(dev, flow, 5701 &sfx_attr, sfx_items ? 5702 sfx_items : items, 5703 sfx_actions ? sfx_actions : actions, 5704 flow_split_info, error); 5705 exit: 5706 if (sfx_actions) 5707 mlx5_free(sfx_actions); 5708 return ret; 5709 } 5710 5711 /** 5712 * The splitting for sample feature. 5713 * 5714 * Once Sample action is detected in the action list, the flow actions should 5715 * be split into prefix sub flow and suffix sub flow. 5716 * 5717 * The original items remain in the prefix sub flow, all actions preceding the 5718 * sample action and the sample action itself will be copied to the prefix 5719 * sub flow, the actions following the sample action will be copied to the 5720 * suffix sub flow, Queue action always be located in the suffix sub flow. 5721 * 5722 * In order to make the packet from prefix sub flow matches with suffix sub 5723 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 5724 * flow uses tag item with the unique flow id. 5725 * 5726 * @param dev 5727 * Pointer to Ethernet device. 5728 * @param[in] flow 5729 * Parent flow structure pointer. 5730 * @param[in] attr 5731 * Flow rule attributes. 5732 * @param[in] items 5733 * Pattern specification (list terminated by the END pattern item). 5734 * @param[in] actions 5735 * Associated actions (list terminated by the END action). 5736 * @param[in] flow_split_info 5737 * Pointer to flow split info structure. 5738 * @param[out] error 5739 * Perform verbose error reporting if not NULL. 5740 * @return 5741 * 0 on success, negative value otherwise 5742 */ 5743 static int 5744 flow_create_split_sample(struct rte_eth_dev *dev, 5745 struct rte_flow *flow, 5746 const struct rte_flow_attr *attr, 5747 const struct rte_flow_item items[], 5748 const struct rte_flow_action actions[], 5749 struct mlx5_flow_split_info *flow_split_info, 5750 struct rte_flow_error *error) 5751 { 5752 struct mlx5_priv *priv = dev->data->dev_private; 5753 struct rte_flow_action *sfx_actions = NULL; 5754 struct rte_flow_action *pre_actions = NULL; 5755 struct rte_flow_item *sfx_items = NULL; 5756 struct mlx5_flow *dev_flow = NULL; 5757 struct rte_flow_attr sfx_attr = *attr; 5758 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5759 struct mlx5_flow_dv_sample_resource *sample_res; 5760 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 5761 struct mlx5_flow_tbl_resource *sfx_tbl; 5762 #endif 5763 size_t act_size; 5764 size_t item_size; 5765 uint32_t fdb_tx = 0; 5766 int32_t tag_id = 0; 5767 int actions_n = 0; 5768 int sample_action_pos; 5769 int qrss_action_pos; 5770 int add_tag = 0; 5771 int modify_after_mirror = 0; 5772 uint16_t jump_table = 0; 5773 const uint32_t next_ft_step = 1; 5774 int ret = 0; 5775 5776 if (priv->sampler_en) 5777 actions_n = flow_check_match_action(actions, attr, 5778 RTE_FLOW_ACTION_TYPE_SAMPLE, 5779 &sample_action_pos, &qrss_action_pos, 5780 &modify_after_mirror); 5781 if (actions_n) { 5782 /* The prefix actions must includes sample, tag, end. */ 5783 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 5784 + sizeof(struct mlx5_rte_flow_action_set_tag); 5785 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 5786 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5787 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 5788 item_size), 0, SOCKET_ID_ANY); 5789 if (!sfx_actions) 5790 return rte_flow_error_set(error, ENOMEM, 5791 RTE_FLOW_ERROR_TYPE_ACTION, 5792 NULL, "no memory to split " 5793 "sample flow"); 5794 /* The representor_id is -1 for uplink. */ 5795 fdb_tx = (attr->transfer && priv->representor_id != -1); 5796 /* 5797 * When reg_c_preserve is set, metadata registers Cx preserve 5798 * their value even through packet duplication. 5799 */ 5800 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve); 5801 if (add_tag) 5802 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 5803 + act_size); 5804 if (modify_after_mirror) 5805 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR + 5806 next_ft_step; 5807 pre_actions = sfx_actions + actions_n; 5808 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items, 5809 actions, sfx_actions, 5810 pre_actions, actions_n, 5811 sample_action_pos, 5812 qrss_action_pos, jump_table, 5813 error); 5814 if (tag_id < 0 || (add_tag && !tag_id)) { 5815 ret = -rte_errno; 5816 goto exit; 5817 } 5818 if (modify_after_mirror) 5819 flow_split_info->skip_scale = 5820 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 5821 /* Add the prefix subflow. */ 5822 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5823 items, pre_actions, 5824 flow_split_info, error); 5825 if (ret) { 5826 ret = -rte_errno; 5827 goto exit; 5828 } 5829 dev_flow->handle->split_flow_id = tag_id; 5830 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5831 if (!modify_after_mirror) { 5832 /* Set the sfx group attr. */ 5833 sample_res = (struct mlx5_flow_dv_sample_resource *) 5834 dev_flow->dv.sample_res; 5835 sfx_tbl = (struct mlx5_flow_tbl_resource *) 5836 sample_res->normal_path_tbl; 5837 sfx_tbl_data = container_of(sfx_tbl, 5838 struct mlx5_flow_tbl_data_entry, 5839 tbl); 5840 sfx_attr.group = sfx_attr.transfer ? 5841 (sfx_tbl_data->level - 1) : sfx_tbl_data->level; 5842 } else { 5843 MLX5_ASSERT(attr->transfer); 5844 sfx_attr.group = jump_table; 5845 } 5846 flow_split_info->prefix_layers = 5847 flow_get_prefix_layer_flags(dev_flow); 5848 flow_split_info->prefix_mark = dev_flow->handle->mark; 5849 /* Suffix group level already be scaled with factor, set 5850 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale 5851 * again in translation. 5852 */ 5853 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5854 #endif 5855 } 5856 /* Add the suffix subflow. */ 5857 ret = flow_create_split_meter(dev, flow, &sfx_attr, 5858 sfx_items ? sfx_items : items, 5859 sfx_actions ? sfx_actions : actions, 5860 flow_split_info, error); 5861 exit: 5862 if (sfx_actions) 5863 mlx5_free(sfx_actions); 5864 return ret; 5865 } 5866 5867 /** 5868 * Split the flow to subflow set. The splitters might be linked 5869 * in the chain, like this: 5870 * flow_create_split_outer() calls: 5871 * flow_create_split_meter() calls: 5872 * flow_create_split_metadata(meter_subflow_0) calls: 5873 * flow_create_split_inner(metadata_subflow_0) 5874 * flow_create_split_inner(metadata_subflow_1) 5875 * flow_create_split_inner(metadata_subflow_2) 5876 * flow_create_split_metadata(meter_subflow_1) calls: 5877 * flow_create_split_inner(metadata_subflow_0) 5878 * flow_create_split_inner(metadata_subflow_1) 5879 * flow_create_split_inner(metadata_subflow_2) 5880 * 5881 * This provide flexible way to add new levels of flow splitting. 5882 * The all of successfully created subflows are included to the 5883 * parent flow dev_flow list. 5884 * 5885 * @param dev 5886 * Pointer to Ethernet device. 5887 * @param[in] flow 5888 * Parent flow structure pointer. 5889 * @param[in] attr 5890 * Flow rule attributes. 5891 * @param[in] items 5892 * Pattern specification (list terminated by the END pattern item). 5893 * @param[in] actions 5894 * Associated actions (list terminated by the END action). 5895 * @param[in] flow_split_info 5896 * Pointer to flow split info structure. 5897 * @param[out] error 5898 * Perform verbose error reporting if not NULL. 5899 * @return 5900 * 0 on success, negative value otherwise 5901 */ 5902 static int 5903 flow_create_split_outer(struct rte_eth_dev *dev, 5904 struct rte_flow *flow, 5905 const struct rte_flow_attr *attr, 5906 const struct rte_flow_item items[], 5907 const struct rte_flow_action actions[], 5908 struct mlx5_flow_split_info *flow_split_info, 5909 struct rte_flow_error *error) 5910 { 5911 int ret; 5912 5913 ret = flow_create_split_sample(dev, flow, attr, items, 5914 actions, flow_split_info, error); 5915 MLX5_ASSERT(ret <= 0); 5916 return ret; 5917 } 5918 5919 static struct mlx5_flow_tunnel * 5920 flow_tunnel_from_rule(struct rte_eth_dev *dev, 5921 const struct rte_flow_attr *attr, 5922 const struct rte_flow_item items[], 5923 const struct rte_flow_action actions[]) 5924 { 5925 struct mlx5_flow_tunnel *tunnel; 5926 5927 #pragma GCC diagnostic push 5928 #pragma GCC diagnostic ignored "-Wcast-qual" 5929 if (is_flow_tunnel_match_rule(dev, attr, items, actions)) 5930 tunnel = (struct mlx5_flow_tunnel *)items[0].spec; 5931 else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) 5932 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf; 5933 else 5934 tunnel = NULL; 5935 #pragma GCC diagnostic pop 5936 5937 return tunnel; 5938 } 5939 5940 /** 5941 * Adjust flow RSS workspace if needed. 5942 * 5943 * @param wks 5944 * Pointer to thread flow work space. 5945 * @param rss_desc 5946 * Pointer to RSS descriptor. 5947 * @param[in] nrssq_num 5948 * New RSS queue number. 5949 * 5950 * @return 5951 * 0 on success, -1 otherwise and rte_errno is set. 5952 */ 5953 static int 5954 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks, 5955 struct mlx5_flow_rss_desc *rss_desc, 5956 uint32_t nrssq_num) 5957 { 5958 if (likely(nrssq_num <= wks->rssq_num)) 5959 return 0; 5960 rss_desc->queue = realloc(rss_desc->queue, 5961 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2)); 5962 if (!rss_desc->queue) { 5963 rte_errno = ENOMEM; 5964 return -1; 5965 } 5966 wks->rssq_num = RTE_ALIGN(nrssq_num, 2); 5967 return 0; 5968 } 5969 5970 /** 5971 * Create a flow and add it to @p list. 5972 * 5973 * @param dev 5974 * Pointer to Ethernet device. 5975 * @param list 5976 * Pointer to a TAILQ flow list. If this parameter NULL, 5977 * no list insertion occurred, flow is just created, 5978 * this is caller's responsibility to track the 5979 * created flow. 5980 * @param[in] attr 5981 * Flow rule attributes. 5982 * @param[in] items 5983 * Pattern specification (list terminated by the END pattern item). 5984 * @param[in] actions 5985 * Associated actions (list terminated by the END action). 5986 * @param[in] external 5987 * This flow rule is created by request external to PMD. 5988 * @param[out] error 5989 * Perform verbose error reporting if not NULL. 5990 * 5991 * @return 5992 * A flow index on success, 0 otherwise and rte_errno is set. 5993 */ 5994 static uint32_t 5995 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 5996 const struct rte_flow_attr *attr, 5997 const struct rte_flow_item items[], 5998 const struct rte_flow_action original_actions[], 5999 bool external, struct rte_flow_error *error) 6000 { 6001 struct mlx5_priv *priv = dev->data->dev_private; 6002 struct rte_flow *flow = NULL; 6003 struct mlx5_flow *dev_flow; 6004 const struct rte_flow_action_rss *rss = NULL; 6005 struct mlx5_translated_action_handle 6006 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6007 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6008 union { 6009 struct mlx5_flow_expand_rss buf; 6010 uint8_t buffer[2048]; 6011 } expand_buffer; 6012 union { 6013 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6014 uint8_t buffer[2048]; 6015 } actions_rx; 6016 union { 6017 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6018 uint8_t buffer[2048]; 6019 } actions_hairpin_tx; 6020 union { 6021 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 6022 uint8_t buffer[2048]; 6023 } items_tx; 6024 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 6025 struct mlx5_flow_rss_desc *rss_desc; 6026 const struct rte_flow_action *p_actions_rx; 6027 uint32_t i; 6028 uint32_t idx = 0; 6029 int hairpin_flow; 6030 struct rte_flow_attr attr_tx = { .priority = 0 }; 6031 const struct rte_flow_action *actions; 6032 struct rte_flow_action *translated_actions = NULL; 6033 struct mlx5_flow_tunnel *tunnel; 6034 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 6035 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace(); 6036 struct mlx5_flow_split_info flow_split_info = { 6037 .external = !!external, 6038 .skip_scale = 0, 6039 .flow_idx = 0, 6040 .prefix_mark = 0, 6041 .prefix_layers = 0, 6042 .table_id = 0 6043 }; 6044 int ret; 6045 6046 MLX5_ASSERT(wks); 6047 rss_desc = &wks->rss_desc; 6048 ret = flow_action_handles_translate(dev, original_actions, 6049 indir_actions, 6050 &indir_actions_n, 6051 &translated_actions, error); 6052 if (ret < 0) { 6053 MLX5_ASSERT(translated_actions == NULL); 6054 return 0; 6055 } 6056 actions = translated_actions ? translated_actions : original_actions; 6057 p_actions_rx = actions; 6058 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6059 ret = flow_drv_validate(dev, attr, items, p_actions_rx, 6060 external, hairpin_flow, error); 6061 if (ret < 0) 6062 goto error_before_hairpin_split; 6063 flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx); 6064 if (!flow) { 6065 rte_errno = ENOMEM; 6066 goto error_before_hairpin_split; 6067 } 6068 if (hairpin_flow > 0) { 6069 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 6070 rte_errno = EINVAL; 6071 goto error_before_hairpin_split; 6072 } 6073 flow_hairpin_split(dev, actions, actions_rx.actions, 6074 actions_hairpin_tx.actions, items_tx.items, 6075 idx); 6076 p_actions_rx = actions_rx.actions; 6077 } 6078 flow_split_info.flow_idx = idx; 6079 flow->drv_type = flow_get_drv_type(dev, attr); 6080 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 6081 flow->drv_type < MLX5_FLOW_TYPE_MAX); 6082 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue)); 6083 /* RSS Action only works on NIC RX domain */ 6084 if (attr->ingress && !attr->transfer) 6085 rss = flow_get_rss_action(dev, p_actions_rx); 6086 if (rss) { 6087 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num)) 6088 return 0; 6089 /* 6090 * The following information is required by 6091 * mlx5_flow_hashfields_adjust() in advance. 6092 */ 6093 rss_desc->level = rss->level; 6094 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */ 6095 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types; 6096 } 6097 flow->dev_handles = 0; 6098 if (rss && rss->types) { 6099 unsigned int graph_root; 6100 6101 graph_root = find_graph_root(items, rss->level); 6102 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 6103 items, rss->types, 6104 mlx5_support_expansion, graph_root); 6105 MLX5_ASSERT(ret > 0 && 6106 (unsigned int)ret < sizeof(expand_buffer.buffer)); 6107 } else { 6108 buf->entries = 1; 6109 buf->entry[0].pattern = (void *)(uintptr_t)items; 6110 } 6111 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions, 6112 indir_actions_n); 6113 for (i = 0; i < buf->entries; ++i) { 6114 /* Initialize flow split data. */ 6115 flow_split_info.prefix_layers = 0; 6116 flow_split_info.prefix_mark = 0; 6117 flow_split_info.skip_scale = 0; 6118 /* 6119 * The splitter may create multiple dev_flows, 6120 * depending on configuration. In the simplest 6121 * case it just creates unmodified original flow. 6122 */ 6123 ret = flow_create_split_outer(dev, flow, attr, 6124 buf->entry[i].pattern, 6125 p_actions_rx, &flow_split_info, 6126 error); 6127 if (ret < 0) 6128 goto error; 6129 if (is_flow_tunnel_steer_rule(dev, attr, 6130 buf->entry[i].pattern, 6131 p_actions_rx)) { 6132 ret = flow_tunnel_add_default_miss(dev, flow, attr, 6133 p_actions_rx, 6134 idx, 6135 &default_miss_ctx, 6136 error); 6137 if (ret < 0) { 6138 mlx5_free(default_miss_ctx.queue); 6139 goto error; 6140 } 6141 } 6142 } 6143 /* Create the tx flow. */ 6144 if (hairpin_flow) { 6145 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 6146 attr_tx.ingress = 0; 6147 attr_tx.egress = 1; 6148 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 6149 actions_hairpin_tx.actions, 6150 idx, error); 6151 if (!dev_flow) 6152 goto error; 6153 dev_flow->flow = flow; 6154 dev_flow->external = 0; 6155 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 6156 dev_flow->handle, next); 6157 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 6158 items_tx.items, 6159 actions_hairpin_tx.actions, error); 6160 if (ret < 0) 6161 goto error; 6162 } 6163 /* 6164 * Update the metadata register copy table. If extensive 6165 * metadata feature is enabled and registers are supported 6166 * we might create the extra rte_flow for each unique 6167 * MARK/FLAG action ID. 6168 * 6169 * The table is updated for ingress Flows only, because 6170 * the egress Flows belong to the different device and 6171 * copy table should be updated in peer NIC Rx domain. 6172 */ 6173 if (attr->ingress && 6174 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 6175 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 6176 if (ret) 6177 goto error; 6178 } 6179 /* 6180 * If the flow is external (from application) OR device is started, 6181 * OR mreg discover, then apply immediately. 6182 */ 6183 if (external || dev->data->dev_started || 6184 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP && 6185 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) { 6186 ret = flow_drv_apply(dev, flow, error); 6187 if (ret < 0) 6188 goto error; 6189 } 6190 if (list) { 6191 rte_spinlock_lock(&priv->flow_list_lock); 6192 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx, 6193 flow, next); 6194 rte_spinlock_unlock(&priv->flow_list_lock); 6195 } 6196 flow_rxq_flags_set(dev, flow); 6197 rte_free(translated_actions); 6198 tunnel = flow_tunnel_from_rule(dev, attr, items, actions); 6199 if (tunnel) { 6200 flow->tunnel = 1; 6201 flow->tunnel_id = tunnel->tunnel_id; 6202 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 6203 mlx5_free(default_miss_ctx.queue); 6204 } 6205 mlx5_flow_pop_thread_workspace(); 6206 return idx; 6207 error: 6208 MLX5_ASSERT(flow); 6209 ret = rte_errno; /* Save rte_errno before cleanup. */ 6210 flow_mreg_del_copy_action(dev, flow); 6211 flow_drv_destroy(dev, flow); 6212 if (rss_desc->shared_rss) 6213 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *) 6214 mlx5_ipool_get 6215 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 6216 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED); 6217 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx); 6218 rte_errno = ret; /* Restore rte_errno. */ 6219 ret = rte_errno; 6220 rte_errno = ret; 6221 mlx5_flow_pop_thread_workspace(); 6222 error_before_hairpin_split: 6223 rte_free(translated_actions); 6224 return 0; 6225 } 6226 6227 /** 6228 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 6229 * incoming packets to table 1. 6230 * 6231 * Other flow rules, requested for group n, will be created in 6232 * e-switch table n+1. 6233 * Jump action to e-switch group n will be created to group n+1. 6234 * 6235 * Used when working in switchdev mode, to utilise advantages of table 1 6236 * and above. 6237 * 6238 * @param dev 6239 * Pointer to Ethernet device. 6240 * 6241 * @return 6242 * Pointer to flow on success, NULL otherwise and rte_errno is set. 6243 */ 6244 struct rte_flow * 6245 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 6246 { 6247 const struct rte_flow_attr attr = { 6248 .group = 0, 6249 .priority = 0, 6250 .ingress = 1, 6251 .egress = 0, 6252 .transfer = 1, 6253 }; 6254 const struct rte_flow_item pattern = { 6255 .type = RTE_FLOW_ITEM_TYPE_END, 6256 }; 6257 struct rte_flow_action_jump jump = { 6258 .group = 1, 6259 }; 6260 const struct rte_flow_action actions[] = { 6261 { 6262 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6263 .conf = &jump, 6264 }, 6265 { 6266 .type = RTE_FLOW_ACTION_TYPE_END, 6267 }, 6268 }; 6269 struct mlx5_priv *priv = dev->data->dev_private; 6270 struct rte_flow_error error; 6271 6272 return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows, 6273 &attr, &pattern, 6274 actions, false, &error); 6275 } 6276 6277 /** 6278 * Validate a flow supported by the NIC. 6279 * 6280 * @see rte_flow_validate() 6281 * @see rte_flow_ops 6282 */ 6283 int 6284 mlx5_flow_validate(struct rte_eth_dev *dev, 6285 const struct rte_flow_attr *attr, 6286 const struct rte_flow_item items[], 6287 const struct rte_flow_action original_actions[], 6288 struct rte_flow_error *error) 6289 { 6290 int hairpin_flow; 6291 struct mlx5_translated_action_handle 6292 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6293 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6294 const struct rte_flow_action *actions; 6295 struct rte_flow_action *translated_actions = NULL; 6296 int ret = flow_action_handles_translate(dev, original_actions, 6297 indir_actions, 6298 &indir_actions_n, 6299 &translated_actions, error); 6300 6301 if (ret) 6302 return ret; 6303 actions = translated_actions ? translated_actions : original_actions; 6304 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6305 ret = flow_drv_validate(dev, attr, items, actions, 6306 true, hairpin_flow, error); 6307 rte_free(translated_actions); 6308 return ret; 6309 } 6310 6311 /** 6312 * Create a flow. 6313 * 6314 * @see rte_flow_create() 6315 * @see rte_flow_ops 6316 */ 6317 struct rte_flow * 6318 mlx5_flow_create(struct rte_eth_dev *dev, 6319 const struct rte_flow_attr *attr, 6320 const struct rte_flow_item items[], 6321 const struct rte_flow_action actions[], 6322 struct rte_flow_error *error) 6323 { 6324 struct mlx5_priv *priv = dev->data->dev_private; 6325 6326 /* 6327 * If the device is not started yet, it is not allowed to created a 6328 * flow from application. PMD default flows and traffic control flows 6329 * are not affected. 6330 */ 6331 if (unlikely(!dev->data->dev_started)) { 6332 DRV_LOG(DEBUG, "port %u is not started when " 6333 "inserting a flow", dev->data->port_id); 6334 rte_flow_error_set(error, ENODEV, 6335 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6336 NULL, 6337 "port not started"); 6338 return NULL; 6339 } 6340 6341 return (void *)(uintptr_t)flow_list_create(dev, &priv->flows, 6342 attr, items, actions, true, error); 6343 } 6344 6345 /** 6346 * Destroy a flow in a list. 6347 * 6348 * @param dev 6349 * Pointer to Ethernet device. 6350 * @param list 6351 * Pointer to the Indexed flow list. If this parameter NULL, 6352 * there is no flow removal from the list. Be noted that as 6353 * flow is add to the indexed list, memory of the indexed 6354 * list points to maybe changed as flow destroyed. 6355 * @param[in] flow_idx 6356 * Index of flow to destroy. 6357 */ 6358 static void 6359 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 6360 uint32_t flow_idx) 6361 { 6362 struct mlx5_priv *priv = dev->data->dev_private; 6363 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 6364 [MLX5_IPOOL_RTE_FLOW], flow_idx); 6365 6366 if (!flow) 6367 return; 6368 /* 6369 * Update RX queue flags only if port is started, otherwise it is 6370 * already clean. 6371 */ 6372 if (dev->data->dev_started) 6373 flow_rxq_flags_trim(dev, flow); 6374 flow_drv_destroy(dev, flow); 6375 if (list) { 6376 rte_spinlock_lock(&priv->flow_list_lock); 6377 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, 6378 flow_idx, flow, next); 6379 rte_spinlock_unlock(&priv->flow_list_lock); 6380 } 6381 if (flow->tunnel) { 6382 struct mlx5_flow_tunnel *tunnel; 6383 6384 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 6385 RTE_VERIFY(tunnel); 6386 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 6387 mlx5_flow_tunnel_free(dev, tunnel); 6388 } 6389 flow_mreg_del_copy_action(dev, flow); 6390 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx); 6391 } 6392 6393 /** 6394 * Destroy all flows. 6395 * 6396 * @param dev 6397 * Pointer to Ethernet device. 6398 * @param list 6399 * Pointer to the Indexed flow list. 6400 * @param active 6401 * If flushing is called avtively. 6402 */ 6403 void 6404 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active) 6405 { 6406 uint32_t num_flushed = 0; 6407 6408 while (*list) { 6409 flow_list_destroy(dev, list, *list); 6410 num_flushed++; 6411 } 6412 if (active) { 6413 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 6414 dev->data->port_id, num_flushed); 6415 } 6416 } 6417 6418 /** 6419 * Stop all default actions for flows. 6420 * 6421 * @param dev 6422 * Pointer to Ethernet device. 6423 */ 6424 void 6425 mlx5_flow_stop_default(struct rte_eth_dev *dev) 6426 { 6427 flow_mreg_del_default_copy_action(dev); 6428 flow_rxq_flags_clear(dev); 6429 } 6430 6431 /** 6432 * Start all default actions for flows. 6433 * 6434 * @param dev 6435 * Pointer to Ethernet device. 6436 * @return 6437 * 0 on success, a negative errno value otherwise and rte_errno is set. 6438 */ 6439 int 6440 mlx5_flow_start_default(struct rte_eth_dev *dev) 6441 { 6442 struct rte_flow_error error; 6443 6444 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6445 return flow_mreg_add_default_copy_action(dev, &error); 6446 } 6447 6448 /** 6449 * Release key of thread specific flow workspace data. 6450 */ 6451 void 6452 flow_release_workspace(void *data) 6453 { 6454 struct mlx5_flow_workspace *wks = data; 6455 struct mlx5_flow_workspace *next; 6456 6457 while (wks) { 6458 next = wks->next; 6459 free(wks->rss_desc.queue); 6460 free(wks); 6461 wks = next; 6462 } 6463 } 6464 6465 /** 6466 * Get thread specific current flow workspace. 6467 * 6468 * @return pointer to thread specific flow workspace data, NULL on error. 6469 */ 6470 struct mlx5_flow_workspace* 6471 mlx5_flow_get_thread_workspace(void) 6472 { 6473 struct mlx5_flow_workspace *data; 6474 6475 data = mlx5_flow_os_get_specific_workspace(); 6476 MLX5_ASSERT(data && data->inuse); 6477 if (!data || !data->inuse) 6478 DRV_LOG(ERR, "flow workspace not initialized."); 6479 return data; 6480 } 6481 6482 /** 6483 * Allocate and init new flow workspace. 6484 * 6485 * @return pointer to flow workspace data, NULL on error. 6486 */ 6487 static struct mlx5_flow_workspace* 6488 flow_alloc_thread_workspace(void) 6489 { 6490 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data)); 6491 6492 if (!data) { 6493 DRV_LOG(ERR, "Failed to allocate flow workspace " 6494 "memory."); 6495 return NULL; 6496 } 6497 data->rss_desc.queue = calloc(1, 6498 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6499 if (!data->rss_desc.queue) 6500 goto err; 6501 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM; 6502 return data; 6503 err: 6504 if (data->rss_desc.queue) 6505 free(data->rss_desc.queue); 6506 free(data); 6507 return NULL; 6508 } 6509 6510 /** 6511 * Get new thread specific flow workspace. 6512 * 6513 * If current workspace inuse, create new one and set as current. 6514 * 6515 * @return pointer to thread specific flow workspace data, NULL on error. 6516 */ 6517 static struct mlx5_flow_workspace* 6518 mlx5_flow_push_thread_workspace(void) 6519 { 6520 struct mlx5_flow_workspace *curr; 6521 struct mlx5_flow_workspace *data; 6522 6523 curr = mlx5_flow_os_get_specific_workspace(); 6524 if (!curr) { 6525 data = flow_alloc_thread_workspace(); 6526 if (!data) 6527 return NULL; 6528 } else if (!curr->inuse) { 6529 data = curr; 6530 } else if (curr->next) { 6531 data = curr->next; 6532 } else { 6533 data = flow_alloc_thread_workspace(); 6534 if (!data) 6535 return NULL; 6536 curr->next = data; 6537 data->prev = curr; 6538 } 6539 data->inuse = 1; 6540 data->flow_idx = 0; 6541 /* Set as current workspace */ 6542 if (mlx5_flow_os_set_specific_workspace(data)) 6543 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6544 return data; 6545 } 6546 6547 /** 6548 * Close current thread specific flow workspace. 6549 * 6550 * If previous workspace available, set it as current. 6551 * 6552 * @return pointer to thread specific flow workspace data, NULL on error. 6553 */ 6554 static void 6555 mlx5_flow_pop_thread_workspace(void) 6556 { 6557 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace(); 6558 6559 if (!data) 6560 return; 6561 if (!data->inuse) { 6562 DRV_LOG(ERR, "Failed to close unused flow workspace."); 6563 return; 6564 } 6565 data->inuse = 0; 6566 if (!data->prev) 6567 return; 6568 if (mlx5_flow_os_set_specific_workspace(data->prev)) 6569 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6570 } 6571 6572 /** 6573 * Verify the flow list is empty 6574 * 6575 * @param dev 6576 * Pointer to Ethernet device. 6577 * 6578 * @return the number of flows not released. 6579 */ 6580 int 6581 mlx5_flow_verify(struct rte_eth_dev *dev) 6582 { 6583 struct mlx5_priv *priv = dev->data->dev_private; 6584 struct rte_flow *flow; 6585 uint32_t idx; 6586 int ret = 0; 6587 6588 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx, 6589 flow, next) { 6590 DRV_LOG(DEBUG, "port %u flow %p still referenced", 6591 dev->data->port_id, (void *)flow); 6592 ++ret; 6593 } 6594 return ret; 6595 } 6596 6597 /** 6598 * Enable default hairpin egress flow. 6599 * 6600 * @param dev 6601 * Pointer to Ethernet device. 6602 * @param queue 6603 * The queue index. 6604 * 6605 * @return 6606 * 0 on success, a negative errno value otherwise and rte_errno is set. 6607 */ 6608 int 6609 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 6610 uint32_t queue) 6611 { 6612 struct mlx5_priv *priv = dev->data->dev_private; 6613 const struct rte_flow_attr attr = { 6614 .egress = 1, 6615 .priority = 0, 6616 }; 6617 struct mlx5_rte_flow_item_tx_queue queue_spec = { 6618 .queue = queue, 6619 }; 6620 struct mlx5_rte_flow_item_tx_queue queue_mask = { 6621 .queue = UINT32_MAX, 6622 }; 6623 struct rte_flow_item items[] = { 6624 { 6625 .type = (enum rte_flow_item_type) 6626 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6627 .spec = &queue_spec, 6628 .last = NULL, 6629 .mask = &queue_mask, 6630 }, 6631 { 6632 .type = RTE_FLOW_ITEM_TYPE_END, 6633 }, 6634 }; 6635 struct rte_flow_action_jump jump = { 6636 .group = MLX5_HAIRPIN_TX_TABLE, 6637 }; 6638 struct rte_flow_action actions[2]; 6639 uint32_t flow_idx; 6640 struct rte_flow_error error; 6641 6642 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 6643 actions[0].conf = &jump; 6644 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 6645 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6646 &attr, items, actions, false, &error); 6647 if (!flow_idx) { 6648 DRV_LOG(DEBUG, 6649 "Failed to create ctrl flow: rte_errno(%d)," 6650 " type(%d), message(%s)", 6651 rte_errno, error.type, 6652 error.message ? error.message : " (no stated reason)"); 6653 return -rte_errno; 6654 } 6655 return 0; 6656 } 6657 6658 /** 6659 * Enable a control flow configured from the control plane. 6660 * 6661 * @param dev 6662 * Pointer to Ethernet device. 6663 * @param eth_spec 6664 * An Ethernet flow spec to apply. 6665 * @param eth_mask 6666 * An Ethernet flow mask to apply. 6667 * @param vlan_spec 6668 * A VLAN flow spec to apply. 6669 * @param vlan_mask 6670 * A VLAN flow mask to apply. 6671 * 6672 * @return 6673 * 0 on success, a negative errno value otherwise and rte_errno is set. 6674 */ 6675 int 6676 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 6677 struct rte_flow_item_eth *eth_spec, 6678 struct rte_flow_item_eth *eth_mask, 6679 struct rte_flow_item_vlan *vlan_spec, 6680 struct rte_flow_item_vlan *vlan_mask) 6681 { 6682 struct mlx5_priv *priv = dev->data->dev_private; 6683 const struct rte_flow_attr attr = { 6684 .ingress = 1, 6685 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 6686 }; 6687 struct rte_flow_item items[] = { 6688 { 6689 .type = RTE_FLOW_ITEM_TYPE_ETH, 6690 .spec = eth_spec, 6691 .last = NULL, 6692 .mask = eth_mask, 6693 }, 6694 { 6695 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 6696 RTE_FLOW_ITEM_TYPE_END, 6697 .spec = vlan_spec, 6698 .last = NULL, 6699 .mask = vlan_mask, 6700 }, 6701 { 6702 .type = RTE_FLOW_ITEM_TYPE_END, 6703 }, 6704 }; 6705 uint16_t queue[priv->reta_idx_n]; 6706 struct rte_flow_action_rss action_rss = { 6707 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 6708 .level = 0, 6709 .types = priv->rss_conf.rss_hf, 6710 .key_len = priv->rss_conf.rss_key_len, 6711 .queue_num = priv->reta_idx_n, 6712 .key = priv->rss_conf.rss_key, 6713 .queue = queue, 6714 }; 6715 struct rte_flow_action actions[] = { 6716 { 6717 .type = RTE_FLOW_ACTION_TYPE_RSS, 6718 .conf = &action_rss, 6719 }, 6720 { 6721 .type = RTE_FLOW_ACTION_TYPE_END, 6722 }, 6723 }; 6724 uint32_t flow_idx; 6725 struct rte_flow_error error; 6726 unsigned int i; 6727 6728 if (!priv->reta_idx_n || !priv->rxqs_n) { 6729 return 0; 6730 } 6731 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 6732 action_rss.types = 0; 6733 for (i = 0; i != priv->reta_idx_n; ++i) 6734 queue[i] = (*priv->reta_idx)[i]; 6735 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6736 &attr, items, actions, false, &error); 6737 if (!flow_idx) 6738 return -rte_errno; 6739 return 0; 6740 } 6741 6742 /** 6743 * Enable a flow control configured from the control plane. 6744 * 6745 * @param dev 6746 * Pointer to Ethernet device. 6747 * @param eth_spec 6748 * An Ethernet flow spec to apply. 6749 * @param eth_mask 6750 * An Ethernet flow mask to apply. 6751 * 6752 * @return 6753 * 0 on success, a negative errno value otherwise and rte_errno is set. 6754 */ 6755 int 6756 mlx5_ctrl_flow(struct rte_eth_dev *dev, 6757 struct rte_flow_item_eth *eth_spec, 6758 struct rte_flow_item_eth *eth_mask) 6759 { 6760 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 6761 } 6762 6763 /** 6764 * Create default miss flow rule matching lacp traffic 6765 * 6766 * @param dev 6767 * Pointer to Ethernet device. 6768 * @param eth_spec 6769 * An Ethernet flow spec to apply. 6770 * 6771 * @return 6772 * 0 on success, a negative errno value otherwise and rte_errno is set. 6773 */ 6774 int 6775 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 6776 { 6777 struct mlx5_priv *priv = dev->data->dev_private; 6778 /* 6779 * The LACP matching is done by only using ether type since using 6780 * a multicast dst mac causes kernel to give low priority to this flow. 6781 */ 6782 static const struct rte_flow_item_eth lacp_spec = { 6783 .type = RTE_BE16(0x8809), 6784 }; 6785 static const struct rte_flow_item_eth lacp_mask = { 6786 .type = 0xffff, 6787 }; 6788 const struct rte_flow_attr attr = { 6789 .ingress = 1, 6790 }; 6791 struct rte_flow_item items[] = { 6792 { 6793 .type = RTE_FLOW_ITEM_TYPE_ETH, 6794 .spec = &lacp_spec, 6795 .mask = &lacp_mask, 6796 }, 6797 { 6798 .type = RTE_FLOW_ITEM_TYPE_END, 6799 }, 6800 }; 6801 struct rte_flow_action actions[] = { 6802 { 6803 .type = (enum rte_flow_action_type) 6804 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 6805 }, 6806 { 6807 .type = RTE_FLOW_ACTION_TYPE_END, 6808 }, 6809 }; 6810 struct rte_flow_error error; 6811 uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6812 &attr, items, actions, false, &error); 6813 6814 if (!flow_idx) 6815 return -rte_errno; 6816 return 0; 6817 } 6818 6819 /** 6820 * Destroy a flow. 6821 * 6822 * @see rte_flow_destroy() 6823 * @see rte_flow_ops 6824 */ 6825 int 6826 mlx5_flow_destroy(struct rte_eth_dev *dev, 6827 struct rte_flow *flow, 6828 struct rte_flow_error *error __rte_unused) 6829 { 6830 struct mlx5_priv *priv = dev->data->dev_private; 6831 6832 flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow); 6833 return 0; 6834 } 6835 6836 /** 6837 * Destroy all flows. 6838 * 6839 * @see rte_flow_flush() 6840 * @see rte_flow_ops 6841 */ 6842 int 6843 mlx5_flow_flush(struct rte_eth_dev *dev, 6844 struct rte_flow_error *error __rte_unused) 6845 { 6846 struct mlx5_priv *priv = dev->data->dev_private; 6847 6848 mlx5_flow_list_flush(dev, &priv->flows, false); 6849 return 0; 6850 } 6851 6852 /** 6853 * Isolated mode. 6854 * 6855 * @see rte_flow_isolate() 6856 * @see rte_flow_ops 6857 */ 6858 int 6859 mlx5_flow_isolate(struct rte_eth_dev *dev, 6860 int enable, 6861 struct rte_flow_error *error) 6862 { 6863 struct mlx5_priv *priv = dev->data->dev_private; 6864 6865 if (dev->data->dev_started) { 6866 rte_flow_error_set(error, EBUSY, 6867 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6868 NULL, 6869 "port must be stopped first"); 6870 return -rte_errno; 6871 } 6872 priv->isolated = !!enable; 6873 if (enable) 6874 dev->dev_ops = &mlx5_dev_ops_isolate; 6875 else 6876 dev->dev_ops = &mlx5_dev_ops; 6877 6878 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 6879 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 6880 6881 return 0; 6882 } 6883 6884 /** 6885 * Query a flow. 6886 * 6887 * @see rte_flow_query() 6888 * @see rte_flow_ops 6889 */ 6890 static int 6891 flow_drv_query(struct rte_eth_dev *dev, 6892 uint32_t flow_idx, 6893 const struct rte_flow_action *actions, 6894 void *data, 6895 struct rte_flow_error *error) 6896 { 6897 struct mlx5_priv *priv = dev->data->dev_private; 6898 const struct mlx5_flow_driver_ops *fops; 6899 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 6900 [MLX5_IPOOL_RTE_FLOW], 6901 flow_idx); 6902 enum mlx5_flow_drv_type ftype; 6903 6904 if (!flow) { 6905 return rte_flow_error_set(error, ENOENT, 6906 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6907 NULL, 6908 "invalid flow handle"); 6909 } 6910 ftype = flow->drv_type; 6911 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 6912 fops = flow_get_drv_ops(ftype); 6913 6914 return fops->query(dev, flow, actions, data, error); 6915 } 6916 6917 /** 6918 * Query a flow. 6919 * 6920 * @see rte_flow_query() 6921 * @see rte_flow_ops 6922 */ 6923 int 6924 mlx5_flow_query(struct rte_eth_dev *dev, 6925 struct rte_flow *flow, 6926 const struct rte_flow_action *actions, 6927 void *data, 6928 struct rte_flow_error *error) 6929 { 6930 int ret; 6931 6932 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 6933 error); 6934 if (ret < 0) 6935 return ret; 6936 return 0; 6937 } 6938 6939 /** 6940 * Get rte_flow callbacks. 6941 * 6942 * @param dev 6943 * Pointer to Ethernet device structure. 6944 * @param ops 6945 * Pointer to operation-specific structure. 6946 * 6947 * @return 0 6948 */ 6949 int 6950 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 6951 const struct rte_flow_ops **ops) 6952 { 6953 *ops = &mlx5_flow_ops; 6954 return 0; 6955 } 6956 6957 /** 6958 * Validate meter policy actions. 6959 * Dispatcher for action type specific validation. 6960 * 6961 * @param[in] dev 6962 * Pointer to the Ethernet device structure. 6963 * @param[in] action 6964 * The meter policy action object to validate. 6965 * @param[in] attr 6966 * Attributes of flow to determine steering domain. 6967 * @param[out] is_rss 6968 * Is RSS or not. 6969 * @param[out] domain_bitmap 6970 * Domain bitmap. 6971 * @param[out] is_def_policy 6972 * Is default policy or not. 6973 * @param[out] error 6974 * Perform verbose error reporting if not NULL. Initialized in case of 6975 * error only. 6976 * 6977 * @return 6978 * 0 on success, otherwise negative errno value. 6979 */ 6980 int 6981 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev, 6982 const struct rte_flow_action *actions[RTE_COLORS], 6983 struct rte_flow_attr *attr, 6984 bool *is_rss, 6985 uint8_t *domain_bitmap, 6986 bool *is_def_policy, 6987 struct rte_mtr_error *error) 6988 { 6989 const struct mlx5_flow_driver_ops *fops; 6990 6991 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6992 return fops->validate_mtr_acts(dev, actions, attr, 6993 is_rss, domain_bitmap, is_def_policy, error); 6994 } 6995 6996 /** 6997 * Destroy the meter table set. 6998 * 6999 * @param[in] dev 7000 * Pointer to Ethernet device. 7001 * @param[in] mtr_policy 7002 * Meter policy struct. 7003 */ 7004 void 7005 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev, 7006 struct mlx5_flow_meter_policy *mtr_policy) 7007 { 7008 const struct mlx5_flow_driver_ops *fops; 7009 7010 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7011 fops->destroy_mtr_acts(dev, mtr_policy); 7012 } 7013 7014 /** 7015 * Create policy action, lock free, 7016 * (mutex should be acquired by caller). 7017 * Dispatcher for action type specific call. 7018 * 7019 * @param[in] dev 7020 * Pointer to the Ethernet device structure. 7021 * @param[in] mtr_policy 7022 * Meter policy struct. 7023 * @param[in] action 7024 * Action specification used to create meter actions. 7025 * @param[out] error 7026 * Perform verbose error reporting if not NULL. Initialized in case of 7027 * error only. 7028 * 7029 * @return 7030 * 0 on success, otherwise negative errno value. 7031 */ 7032 int 7033 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, 7034 struct mlx5_flow_meter_policy *mtr_policy, 7035 const struct rte_flow_action *actions[RTE_COLORS], 7036 struct rte_mtr_error *error) 7037 { 7038 const struct mlx5_flow_driver_ops *fops; 7039 7040 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7041 return fops->create_mtr_acts(dev, mtr_policy, actions, error); 7042 } 7043 7044 /** 7045 * Create policy rules, lock free, 7046 * (mutex should be acquired by caller). 7047 * Dispatcher for action type specific call. 7048 * 7049 * @param[in] dev 7050 * Pointer to the Ethernet device structure. 7051 * @param[in] mtr_policy 7052 * Meter policy struct. 7053 * 7054 * @return 7055 * 0 on success, -1 otherwise. 7056 */ 7057 int 7058 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev, 7059 struct mlx5_flow_meter_policy *mtr_policy) 7060 { 7061 const struct mlx5_flow_driver_ops *fops; 7062 7063 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7064 return fops->create_policy_rules(dev, mtr_policy); 7065 } 7066 7067 /** 7068 * Destroy policy rules, lock free, 7069 * (mutex should be acquired by caller). 7070 * Dispatcher for action type specific call. 7071 * 7072 * @param[in] dev 7073 * Pointer to the Ethernet device structure. 7074 * @param[in] mtr_policy 7075 * Meter policy struct. 7076 */ 7077 void 7078 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev, 7079 struct mlx5_flow_meter_policy *mtr_policy) 7080 { 7081 const struct mlx5_flow_driver_ops *fops; 7082 7083 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7084 fops->destroy_policy_rules(dev, mtr_policy); 7085 } 7086 7087 /** 7088 * Destroy the default policy table set. 7089 * 7090 * @param[in] dev 7091 * Pointer to Ethernet device. 7092 */ 7093 void 7094 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev) 7095 { 7096 const struct mlx5_flow_driver_ops *fops; 7097 7098 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7099 fops->destroy_def_policy(dev); 7100 } 7101 7102 /** 7103 * Destroy the default policy table set. 7104 * 7105 * @param[in] dev 7106 * Pointer to Ethernet device. 7107 * 7108 * @return 7109 * 0 on success, -1 otherwise. 7110 */ 7111 int 7112 mlx5_flow_create_def_policy(struct rte_eth_dev *dev) 7113 { 7114 const struct mlx5_flow_driver_ops *fops; 7115 7116 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7117 return fops->create_def_policy(dev); 7118 } 7119 7120 /** 7121 * Create the needed meter and suffix tables. 7122 * 7123 * @param[in] dev 7124 * Pointer to Ethernet device. 7125 * 7126 * @return 7127 * 0 on success, -1 otherwise. 7128 */ 7129 int 7130 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 7131 struct mlx5_flow_meter_info *fm, 7132 uint32_t mtr_idx, 7133 uint8_t domain_bitmap) 7134 { 7135 const struct mlx5_flow_driver_ops *fops; 7136 7137 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7138 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap); 7139 } 7140 7141 /** 7142 * Destroy the meter table set. 7143 * 7144 * @param[in] dev 7145 * Pointer to Ethernet device. 7146 * @param[in] tbl 7147 * Pointer to the meter table set. 7148 */ 7149 void 7150 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 7151 struct mlx5_flow_meter_info *fm) 7152 { 7153 const struct mlx5_flow_driver_ops *fops; 7154 7155 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7156 fops->destroy_mtr_tbls(dev, fm); 7157 } 7158 7159 /** 7160 * Destroy the global meter drop table. 7161 * 7162 * @param[in] dev 7163 * Pointer to Ethernet device. 7164 */ 7165 void 7166 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev) 7167 { 7168 const struct mlx5_flow_driver_ops *fops; 7169 7170 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7171 fops->destroy_mtr_drop_tbls(dev); 7172 } 7173 7174 /** 7175 * Allocate the needed aso flow meter id. 7176 * 7177 * @param[in] dev 7178 * Pointer to Ethernet device. 7179 * 7180 * @return 7181 * Index to aso flow meter on success, NULL otherwise. 7182 */ 7183 uint32_t 7184 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev) 7185 { 7186 const struct mlx5_flow_driver_ops *fops; 7187 7188 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7189 return fops->create_meter(dev); 7190 } 7191 7192 /** 7193 * Free the aso flow meter id. 7194 * 7195 * @param[in] dev 7196 * Pointer to Ethernet device. 7197 * @param[in] mtr_idx 7198 * Index to aso flow meter to be free. 7199 * 7200 * @return 7201 * 0 on success. 7202 */ 7203 void 7204 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx) 7205 { 7206 const struct mlx5_flow_driver_ops *fops; 7207 7208 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7209 fops->free_meter(dev, mtr_idx); 7210 } 7211 7212 /** 7213 * Allocate a counter. 7214 * 7215 * @param[in] dev 7216 * Pointer to Ethernet device structure. 7217 * 7218 * @return 7219 * Index to allocated counter on success, 0 otherwise. 7220 */ 7221 uint32_t 7222 mlx5_counter_alloc(struct rte_eth_dev *dev) 7223 { 7224 const struct mlx5_flow_driver_ops *fops; 7225 struct rte_flow_attr attr = { .transfer = 0 }; 7226 7227 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7228 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7229 return fops->counter_alloc(dev); 7230 } 7231 DRV_LOG(ERR, 7232 "port %u counter allocate is not supported.", 7233 dev->data->port_id); 7234 return 0; 7235 } 7236 7237 /** 7238 * Free a counter. 7239 * 7240 * @param[in] dev 7241 * Pointer to Ethernet device structure. 7242 * @param[in] cnt 7243 * Index to counter to be free. 7244 */ 7245 void 7246 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 7247 { 7248 const struct mlx5_flow_driver_ops *fops; 7249 struct rte_flow_attr attr = { .transfer = 0 }; 7250 7251 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7252 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7253 fops->counter_free(dev, cnt); 7254 return; 7255 } 7256 DRV_LOG(ERR, 7257 "port %u counter free is not supported.", 7258 dev->data->port_id); 7259 } 7260 7261 /** 7262 * Query counter statistics. 7263 * 7264 * @param[in] dev 7265 * Pointer to Ethernet device structure. 7266 * @param[in] cnt 7267 * Index to counter to query. 7268 * @param[in] clear 7269 * Set to clear counter statistics. 7270 * @param[out] pkts 7271 * The counter hits packets number to save. 7272 * @param[out] bytes 7273 * The counter hits bytes number to save. 7274 * 7275 * @return 7276 * 0 on success, a negative errno value otherwise. 7277 */ 7278 int 7279 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 7280 bool clear, uint64_t *pkts, uint64_t *bytes) 7281 { 7282 const struct mlx5_flow_driver_ops *fops; 7283 struct rte_flow_attr attr = { .transfer = 0 }; 7284 7285 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7286 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7287 return fops->counter_query(dev, cnt, clear, pkts, bytes); 7288 } 7289 DRV_LOG(ERR, 7290 "port %u counter query is not supported.", 7291 dev->data->port_id); 7292 return -ENOTSUP; 7293 } 7294 7295 /** 7296 * Allocate a new memory for the counter values wrapped by all the needed 7297 * management. 7298 * 7299 * @param[in] sh 7300 * Pointer to mlx5_dev_ctx_shared object. 7301 * 7302 * @return 7303 * 0 on success, a negative errno value otherwise. 7304 */ 7305 static int 7306 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 7307 { 7308 struct mlx5_devx_mkey_attr mkey_attr; 7309 struct mlx5_counter_stats_mem_mng *mem_mng; 7310 volatile struct flow_counter_stats *raw_data; 7311 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 7312 int size = (sizeof(struct flow_counter_stats) * 7313 MLX5_COUNTERS_PER_POOL + 7314 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 7315 sizeof(struct mlx5_counter_stats_mem_mng); 7316 size_t pgsize = rte_mem_page_size(); 7317 uint8_t *mem; 7318 int i; 7319 7320 if (pgsize == (size_t)-1) { 7321 DRV_LOG(ERR, "Failed to get mem page size"); 7322 rte_errno = ENOMEM; 7323 return -ENOMEM; 7324 } 7325 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 7326 if (!mem) { 7327 rte_errno = ENOMEM; 7328 return -ENOMEM; 7329 } 7330 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 7331 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 7332 mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size, 7333 IBV_ACCESS_LOCAL_WRITE); 7334 if (!mem_mng->umem) { 7335 rte_errno = errno; 7336 mlx5_free(mem); 7337 return -rte_errno; 7338 } 7339 mkey_attr.addr = (uintptr_t)mem; 7340 mkey_attr.size = size; 7341 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem); 7342 mkey_attr.pd = sh->pdn; 7343 mkey_attr.log_entity_size = 0; 7344 mkey_attr.pg_access = 0; 7345 mkey_attr.klm_array = NULL; 7346 mkey_attr.klm_num = 0; 7347 mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write; 7348 mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read; 7349 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr); 7350 if (!mem_mng->dm) { 7351 mlx5_os_umem_dereg(mem_mng->umem); 7352 rte_errno = errno; 7353 mlx5_free(mem); 7354 return -rte_errno; 7355 } 7356 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 7357 raw_data = (volatile struct flow_counter_stats *)mem; 7358 for (i = 0; i < raws_n; ++i) { 7359 mem_mng->raws[i].mem_mng = mem_mng; 7360 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 7361 } 7362 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 7363 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 7364 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 7365 next); 7366 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 7367 sh->cmng.mem_mng = mem_mng; 7368 return 0; 7369 } 7370 7371 /** 7372 * Set the statistic memory to the new counter pool. 7373 * 7374 * @param[in] sh 7375 * Pointer to mlx5_dev_ctx_shared object. 7376 * @param[in] pool 7377 * Pointer to the pool to set the statistic memory. 7378 * 7379 * @return 7380 * 0 on success, a negative errno value otherwise. 7381 */ 7382 static int 7383 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 7384 struct mlx5_flow_counter_pool *pool) 7385 { 7386 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7387 /* Resize statistic memory once used out. */ 7388 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 7389 mlx5_flow_create_counter_stat_mem_mng(sh)) { 7390 DRV_LOG(ERR, "Cannot resize counter stat mem."); 7391 return -1; 7392 } 7393 rte_spinlock_lock(&pool->sl); 7394 pool->raw = cmng->mem_mng->raws + pool->index % 7395 MLX5_CNT_CONTAINER_RESIZE; 7396 rte_spinlock_unlock(&pool->sl); 7397 pool->raw_hw = NULL; 7398 return 0; 7399 } 7400 7401 #define MLX5_POOL_QUERY_FREQ_US 1000000 7402 7403 /** 7404 * Set the periodic procedure for triggering asynchronous batch queries for all 7405 * the counter pools. 7406 * 7407 * @param[in] sh 7408 * Pointer to mlx5_dev_ctx_shared object. 7409 */ 7410 void 7411 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 7412 { 7413 uint32_t pools_n, us; 7414 7415 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 7416 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 7417 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 7418 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 7419 sh->cmng.query_thread_on = 0; 7420 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 7421 } else { 7422 sh->cmng.query_thread_on = 1; 7423 } 7424 } 7425 7426 /** 7427 * The periodic procedure for triggering asynchronous batch queries for all the 7428 * counter pools. This function is probably called by the host thread. 7429 * 7430 * @param[in] arg 7431 * The parameter for the alarm process. 7432 */ 7433 void 7434 mlx5_flow_query_alarm(void *arg) 7435 { 7436 struct mlx5_dev_ctx_shared *sh = arg; 7437 int ret; 7438 uint16_t pool_index = sh->cmng.pool_index; 7439 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7440 struct mlx5_flow_counter_pool *pool; 7441 uint16_t n_valid; 7442 7443 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 7444 goto set_alarm; 7445 rte_spinlock_lock(&cmng->pool_update_sl); 7446 pool = cmng->pools[pool_index]; 7447 n_valid = cmng->n_valid; 7448 rte_spinlock_unlock(&cmng->pool_update_sl); 7449 /* Set the statistic memory to the new created pool. */ 7450 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 7451 goto set_alarm; 7452 if (pool->raw_hw) 7453 /* There is a pool query in progress. */ 7454 goto set_alarm; 7455 pool->raw_hw = 7456 LIST_FIRST(&sh->cmng.free_stat_raws); 7457 if (!pool->raw_hw) 7458 /* No free counter statistics raw memory. */ 7459 goto set_alarm; 7460 /* 7461 * Identify the counters released between query trigger and query 7462 * handle more efficiently. The counter released in this gap period 7463 * should wait for a new round of query as the new arrived packets 7464 * will not be taken into account. 7465 */ 7466 pool->query_gen++; 7467 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 7468 MLX5_COUNTERS_PER_POOL, 7469 NULL, NULL, 7470 pool->raw_hw->mem_mng->dm->id, 7471 (void *)(uintptr_t) 7472 pool->raw_hw->data, 7473 sh->devx_comp, 7474 (uint64_t)(uintptr_t)pool); 7475 if (ret) { 7476 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 7477 " %d", pool->min_dcs->id); 7478 pool->raw_hw = NULL; 7479 goto set_alarm; 7480 } 7481 LIST_REMOVE(pool->raw_hw, next); 7482 sh->cmng.pending_queries++; 7483 pool_index++; 7484 if (pool_index >= n_valid) 7485 pool_index = 0; 7486 set_alarm: 7487 sh->cmng.pool_index = pool_index; 7488 mlx5_set_query_alarm(sh); 7489 } 7490 7491 /** 7492 * Check and callback event for new aged flow in the counter pool 7493 * 7494 * @param[in] sh 7495 * Pointer to mlx5_dev_ctx_shared object. 7496 * @param[in] pool 7497 * Pointer to Current counter pool. 7498 */ 7499 static void 7500 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 7501 struct mlx5_flow_counter_pool *pool) 7502 { 7503 struct mlx5_priv *priv; 7504 struct mlx5_flow_counter *cnt; 7505 struct mlx5_age_info *age_info; 7506 struct mlx5_age_param *age_param; 7507 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 7508 struct mlx5_counter_stats_raw *prev = pool->raw; 7509 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 7510 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 7511 uint16_t expected = AGE_CANDIDATE; 7512 uint32_t i; 7513 7514 pool->time_of_last_age_check = curr_time; 7515 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 7516 cnt = MLX5_POOL_GET_CNT(pool, i); 7517 age_param = MLX5_CNT_TO_AGE(cnt); 7518 if (__atomic_load_n(&age_param->state, 7519 __ATOMIC_RELAXED) != AGE_CANDIDATE) 7520 continue; 7521 if (cur->data[i].hits != prev->data[i].hits) { 7522 __atomic_store_n(&age_param->sec_since_last_hit, 0, 7523 __ATOMIC_RELAXED); 7524 continue; 7525 } 7526 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 7527 time_delta, 7528 __ATOMIC_RELAXED) <= age_param->timeout) 7529 continue; 7530 /** 7531 * Hold the lock first, or if between the 7532 * state AGE_TMOUT and tailq operation the 7533 * release happened, the release procedure 7534 * may delete a non-existent tailq node. 7535 */ 7536 priv = rte_eth_devices[age_param->port_id].data->dev_private; 7537 age_info = GET_PORT_AGE_INFO(priv); 7538 rte_spinlock_lock(&age_info->aged_sl); 7539 if (__atomic_compare_exchange_n(&age_param->state, &expected, 7540 AGE_TMOUT, false, 7541 __ATOMIC_RELAXED, 7542 __ATOMIC_RELAXED)) { 7543 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 7544 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 7545 } 7546 rte_spinlock_unlock(&age_info->aged_sl); 7547 } 7548 mlx5_age_event_prepare(sh); 7549 } 7550 7551 /** 7552 * Handler for the HW respond about ready values from an asynchronous batch 7553 * query. This function is probably called by the host thread. 7554 * 7555 * @param[in] sh 7556 * The pointer to the shared device context. 7557 * @param[in] async_id 7558 * The Devx async ID. 7559 * @param[in] status 7560 * The status of the completion. 7561 */ 7562 void 7563 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 7564 uint64_t async_id, int status) 7565 { 7566 struct mlx5_flow_counter_pool *pool = 7567 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 7568 struct mlx5_counter_stats_raw *raw_to_free; 7569 uint8_t query_gen = pool->query_gen ^ 1; 7570 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7571 enum mlx5_counter_type cnt_type = 7572 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 7573 MLX5_COUNTER_TYPE_ORIGIN; 7574 7575 if (unlikely(status)) { 7576 raw_to_free = pool->raw_hw; 7577 } else { 7578 raw_to_free = pool->raw; 7579 if (pool->is_aged) 7580 mlx5_flow_aging_check(sh, pool); 7581 rte_spinlock_lock(&pool->sl); 7582 pool->raw = pool->raw_hw; 7583 rte_spinlock_unlock(&pool->sl); 7584 /* Be sure the new raw counters data is updated in memory. */ 7585 rte_io_wmb(); 7586 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 7587 rte_spinlock_lock(&cmng->csl[cnt_type]); 7588 TAILQ_CONCAT(&cmng->counters[cnt_type], 7589 &pool->counters[query_gen], next); 7590 rte_spinlock_unlock(&cmng->csl[cnt_type]); 7591 } 7592 } 7593 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 7594 pool->raw_hw = NULL; 7595 sh->cmng.pending_queries--; 7596 } 7597 7598 static int 7599 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 7600 const struct flow_grp_info *grp_info, 7601 struct rte_flow_error *error) 7602 { 7603 if (grp_info->transfer && grp_info->external && 7604 grp_info->fdb_def_rule) { 7605 if (group == UINT32_MAX) 7606 return rte_flow_error_set 7607 (error, EINVAL, 7608 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 7609 NULL, 7610 "group index not supported"); 7611 *table = group + 1; 7612 } else { 7613 *table = group; 7614 } 7615 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 7616 return 0; 7617 } 7618 7619 /** 7620 * Translate the rte_flow group index to HW table value. 7621 * 7622 * If tunnel offload is disabled, all group ids converted to flow table 7623 * id using the standard method. 7624 * If tunnel offload is enabled, group id can be converted using the 7625 * standard or tunnel conversion method. Group conversion method 7626 * selection depends on flags in `grp_info` parameter: 7627 * - Internal (grp_info.external == 0) groups conversion uses the 7628 * standard method. 7629 * - Group ids in JUMP action converted with the tunnel conversion. 7630 * - Group id in rule attribute conversion depends on a rule type and 7631 * group id value: 7632 * ** non zero group attributes converted with the tunnel method 7633 * ** zero group attribute in non-tunnel rule is converted using the 7634 * standard method - there's only one root table 7635 * ** zero group attribute in steer tunnel rule is converted with the 7636 * standard method - single root table 7637 * ** zero group attribute in match tunnel rule is a special OvS 7638 * case: that value is used for portability reasons. That group 7639 * id is converted with the tunnel conversion method. 7640 * 7641 * @param[in] dev 7642 * Port device 7643 * @param[in] tunnel 7644 * PMD tunnel offload object 7645 * @param[in] group 7646 * rte_flow group index value. 7647 * @param[out] table 7648 * HW table value. 7649 * @param[in] grp_info 7650 * flags used for conversion 7651 * @param[out] error 7652 * Pointer to error structure. 7653 * 7654 * @return 7655 * 0 on success, a negative errno value otherwise and rte_errno is set. 7656 */ 7657 int 7658 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 7659 const struct mlx5_flow_tunnel *tunnel, 7660 uint32_t group, uint32_t *table, 7661 const struct flow_grp_info *grp_info, 7662 struct rte_flow_error *error) 7663 { 7664 int ret; 7665 bool standard_translation; 7666 7667 if (!grp_info->skip_scale && grp_info->external && 7668 group < MLX5_MAX_TABLES_EXTERNAL) 7669 group *= MLX5_FLOW_TABLE_FACTOR; 7670 if (is_tunnel_offload_active(dev)) { 7671 standard_translation = !grp_info->external || 7672 grp_info->std_tbl_fix; 7673 } else { 7674 standard_translation = true; 7675 } 7676 DRV_LOG(DEBUG, 7677 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s", 7678 dev->data->port_id, group, grp_info->transfer, 7679 grp_info->external, grp_info->fdb_def_rule, 7680 standard_translation ? "STANDARD" : "TUNNEL"); 7681 if (standard_translation) 7682 ret = flow_group_to_table(dev->data->port_id, group, table, 7683 grp_info, error); 7684 else 7685 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 7686 table, error); 7687 7688 return ret; 7689 } 7690 7691 /** 7692 * Discover availability of metadata reg_c's. 7693 * 7694 * Iteratively use test flows to check availability. 7695 * 7696 * @param[in] dev 7697 * Pointer to the Ethernet device structure. 7698 * 7699 * @return 7700 * 0 on success, a negative errno value otherwise and rte_errno is set. 7701 */ 7702 int 7703 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 7704 { 7705 struct mlx5_priv *priv = dev->data->dev_private; 7706 struct mlx5_dev_config *config = &priv->config; 7707 enum modify_reg idx; 7708 int n = 0; 7709 7710 /* reg_c[0] and reg_c[1] are reserved. */ 7711 config->flow_mreg_c[n++] = REG_C_0; 7712 config->flow_mreg_c[n++] = REG_C_1; 7713 /* Discover availability of other reg_c's. */ 7714 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 7715 struct rte_flow_attr attr = { 7716 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 7717 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 7718 .ingress = 1, 7719 }; 7720 struct rte_flow_item items[] = { 7721 [0] = { 7722 .type = RTE_FLOW_ITEM_TYPE_END, 7723 }, 7724 }; 7725 struct rte_flow_action actions[] = { 7726 [0] = { 7727 .type = (enum rte_flow_action_type) 7728 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 7729 .conf = &(struct mlx5_flow_action_copy_mreg){ 7730 .src = REG_C_1, 7731 .dst = idx, 7732 }, 7733 }, 7734 [1] = { 7735 .type = RTE_FLOW_ACTION_TYPE_JUMP, 7736 .conf = &(struct rte_flow_action_jump){ 7737 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 7738 }, 7739 }, 7740 [2] = { 7741 .type = RTE_FLOW_ACTION_TYPE_END, 7742 }, 7743 }; 7744 uint32_t flow_idx; 7745 struct rte_flow *flow; 7746 struct rte_flow_error error; 7747 7748 if (!config->dv_flow_en) 7749 break; 7750 /* Create internal flow, validation skips copy action. */ 7751 flow_idx = flow_list_create(dev, NULL, &attr, items, 7752 actions, false, &error); 7753 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 7754 flow_idx); 7755 if (!flow) 7756 continue; 7757 config->flow_mreg_c[n++] = idx; 7758 flow_list_destroy(dev, NULL, flow_idx); 7759 } 7760 for (; n < MLX5_MREG_C_NUM; ++n) 7761 config->flow_mreg_c[n] = REG_NON; 7762 return 0; 7763 } 7764 7765 /** 7766 * Dump flow raw hw data to file 7767 * 7768 * @param[in] dev 7769 * The pointer to Ethernet device. 7770 * @param[in] file 7771 * A pointer to a file for output. 7772 * @param[out] error 7773 * Perform verbose error reporting if not NULL. PMDs initialize this 7774 * structure in case of error only. 7775 * @return 7776 * 0 on success, a nagative value otherwise. 7777 */ 7778 int 7779 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx, 7780 FILE *file, 7781 struct rte_flow_error *error __rte_unused) 7782 { 7783 struct mlx5_priv *priv = dev->data->dev_private; 7784 struct mlx5_dev_ctx_shared *sh = priv->sh; 7785 uint32_t handle_idx; 7786 int ret; 7787 struct mlx5_flow_handle *dh; 7788 struct rte_flow *flow; 7789 7790 if (!priv->config.dv_flow_en) { 7791 if (fputs("device dv flow disabled\n", file) <= 0) 7792 return -errno; 7793 return -ENOTSUP; 7794 } 7795 7796 /* dump all */ 7797 if (!flow_idx) 7798 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, 7799 sh->rx_domain, 7800 sh->tx_domain, file); 7801 /* dump one */ 7802 flow = mlx5_ipool_get(priv->sh->ipool 7803 [MLX5_IPOOL_RTE_FLOW], (uintptr_t)(void *)flow_idx); 7804 if (!flow) 7805 return -ENOENT; 7806 7807 handle_idx = flow->dev_handles; 7808 while (handle_idx) { 7809 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], 7810 handle_idx); 7811 if (!dh) 7812 return -ENOENT; 7813 if (dh->drv_flow) { 7814 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow, 7815 file); 7816 if (ret) 7817 return -ENOENT; 7818 } 7819 handle_idx = dh->next.next; 7820 } 7821 return 0; 7822 } 7823 7824 /** 7825 * Get aged-out flows. 7826 * 7827 * @param[in] dev 7828 * Pointer to the Ethernet device structure. 7829 * @param[in] context 7830 * The address of an array of pointers to the aged-out flows contexts. 7831 * @param[in] nb_countexts 7832 * The length of context array pointers. 7833 * @param[out] error 7834 * Perform verbose error reporting if not NULL. Initialized in case of 7835 * error only. 7836 * 7837 * @return 7838 * how many contexts get in success, otherwise negative errno value. 7839 * if nb_contexts is 0, return the amount of all aged contexts. 7840 * if nb_contexts is not 0 , return the amount of aged flows reported 7841 * in the context array. 7842 */ 7843 int 7844 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 7845 uint32_t nb_contexts, struct rte_flow_error *error) 7846 { 7847 const struct mlx5_flow_driver_ops *fops; 7848 struct rte_flow_attr attr = { .transfer = 0 }; 7849 7850 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7851 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7852 return fops->get_aged_flows(dev, contexts, nb_contexts, 7853 error); 7854 } 7855 DRV_LOG(ERR, 7856 "port %u get aged flows is not supported.", 7857 dev->data->port_id); 7858 return -ENOTSUP; 7859 } 7860 7861 /* Wrapper for driver action_validate op callback */ 7862 static int 7863 flow_drv_action_validate(struct rte_eth_dev *dev, 7864 const struct rte_flow_indir_action_conf *conf, 7865 const struct rte_flow_action *action, 7866 const struct mlx5_flow_driver_ops *fops, 7867 struct rte_flow_error *error) 7868 { 7869 static const char err_msg[] = "indirect action validation unsupported"; 7870 7871 if (!fops->action_validate) { 7872 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7873 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7874 NULL, err_msg); 7875 return -rte_errno; 7876 } 7877 return fops->action_validate(dev, conf, action, error); 7878 } 7879 7880 /** 7881 * Destroys the shared action by handle. 7882 * 7883 * @param dev 7884 * Pointer to Ethernet device structure. 7885 * @param[in] handle 7886 * Handle for the indirect action object to be destroyed. 7887 * @param[out] error 7888 * Perform verbose error reporting if not NULL. PMDs initialize this 7889 * structure in case of error only. 7890 * 7891 * @return 7892 * 0 on success, a negative errno value otherwise and rte_errno is set. 7893 * 7894 * @note: wrapper for driver action_create op callback. 7895 */ 7896 static int 7897 mlx5_action_handle_destroy(struct rte_eth_dev *dev, 7898 struct rte_flow_action_handle *handle, 7899 struct rte_flow_error *error) 7900 { 7901 static const char err_msg[] = "indirect action destruction unsupported"; 7902 struct rte_flow_attr attr = { .transfer = 0 }; 7903 const struct mlx5_flow_driver_ops *fops = 7904 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7905 7906 if (!fops->action_destroy) { 7907 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7908 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7909 NULL, err_msg); 7910 return -rte_errno; 7911 } 7912 return fops->action_destroy(dev, handle, error); 7913 } 7914 7915 /* Wrapper for driver action_destroy op callback */ 7916 static int 7917 flow_drv_action_update(struct rte_eth_dev *dev, 7918 struct rte_flow_action_handle *handle, 7919 const void *update, 7920 const struct mlx5_flow_driver_ops *fops, 7921 struct rte_flow_error *error) 7922 { 7923 static const char err_msg[] = "indirect action update unsupported"; 7924 7925 if (!fops->action_update) { 7926 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7927 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7928 NULL, err_msg); 7929 return -rte_errno; 7930 } 7931 return fops->action_update(dev, handle, update, error); 7932 } 7933 7934 /* Wrapper for driver action_destroy op callback */ 7935 static int 7936 flow_drv_action_query(struct rte_eth_dev *dev, 7937 const struct rte_flow_action_handle *handle, 7938 void *data, 7939 const struct mlx5_flow_driver_ops *fops, 7940 struct rte_flow_error *error) 7941 { 7942 static const char err_msg[] = "indirect action query unsupported"; 7943 7944 if (!fops->action_query) { 7945 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7946 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7947 NULL, err_msg); 7948 return -rte_errno; 7949 } 7950 return fops->action_query(dev, handle, data, error); 7951 } 7952 7953 /** 7954 * Create indirect action for reuse in multiple flow rules. 7955 * 7956 * @param dev 7957 * Pointer to Ethernet device structure. 7958 * @param conf 7959 * Pointer to indirect action object configuration. 7960 * @param[in] action 7961 * Action configuration for indirect action object creation. 7962 * @param[out] error 7963 * Perform verbose error reporting if not NULL. PMDs initialize this 7964 * structure in case of error only. 7965 * @return 7966 * A valid handle in case of success, NULL otherwise and rte_errno is set. 7967 */ 7968 static struct rte_flow_action_handle * 7969 mlx5_action_handle_create(struct rte_eth_dev *dev, 7970 const struct rte_flow_indir_action_conf *conf, 7971 const struct rte_flow_action *action, 7972 struct rte_flow_error *error) 7973 { 7974 static const char err_msg[] = "indirect action creation unsupported"; 7975 struct rte_flow_attr attr = { .transfer = 0 }; 7976 const struct mlx5_flow_driver_ops *fops = 7977 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7978 7979 if (flow_drv_action_validate(dev, conf, action, fops, error)) 7980 return NULL; 7981 if (!fops->action_create) { 7982 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7983 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7984 NULL, err_msg); 7985 return NULL; 7986 } 7987 return fops->action_create(dev, conf, action, error); 7988 } 7989 7990 /** 7991 * Updates inplace the indirect action configuration pointed by *handle* 7992 * with the configuration provided as *update* argument. 7993 * The update of the indirect action configuration effects all flow rules 7994 * reusing the action via handle. 7995 * 7996 * @param dev 7997 * Pointer to Ethernet device structure. 7998 * @param[in] handle 7999 * Handle for the indirect action to be updated. 8000 * @param[in] update 8001 * Action specification used to modify the action pointed by handle. 8002 * *update* could be of same type with the action pointed by the *handle* 8003 * handle argument, or some other structures like a wrapper, depending on 8004 * the indirect action type. 8005 * @param[out] error 8006 * Perform verbose error reporting if not NULL. PMDs initialize this 8007 * structure in case of error only. 8008 * 8009 * @return 8010 * 0 on success, a negative errno value otherwise and rte_errno is set. 8011 */ 8012 static int 8013 mlx5_action_handle_update(struct rte_eth_dev *dev, 8014 struct rte_flow_action_handle *handle, 8015 const void *update, 8016 struct rte_flow_error *error) 8017 { 8018 struct rte_flow_attr attr = { .transfer = 0 }; 8019 const struct mlx5_flow_driver_ops *fops = 8020 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8021 int ret; 8022 8023 ret = flow_drv_action_validate(dev, NULL, 8024 (const struct rte_flow_action *)update, fops, error); 8025 if (ret) 8026 return ret; 8027 return flow_drv_action_update(dev, handle, update, fops, 8028 error); 8029 } 8030 8031 /** 8032 * Query the indirect action by handle. 8033 * 8034 * This function allows retrieving action-specific data such as counters. 8035 * Data is gathered by special action which may be present/referenced in 8036 * more than one flow rule definition. 8037 * 8038 * see @RTE_FLOW_ACTION_TYPE_COUNT 8039 * 8040 * @param dev 8041 * Pointer to Ethernet device structure. 8042 * @param[in] handle 8043 * Handle for the indirect action to query. 8044 * @param[in, out] data 8045 * Pointer to storage for the associated query data type. 8046 * @param[out] error 8047 * Perform verbose error reporting if not NULL. PMDs initialize this 8048 * structure in case of error only. 8049 * 8050 * @return 8051 * 0 on success, a negative errno value otherwise and rte_errno is set. 8052 */ 8053 static int 8054 mlx5_action_handle_query(struct rte_eth_dev *dev, 8055 const struct rte_flow_action_handle *handle, 8056 void *data, 8057 struct rte_flow_error *error) 8058 { 8059 struct rte_flow_attr attr = { .transfer = 0 }; 8060 const struct mlx5_flow_driver_ops *fops = 8061 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8062 8063 return flow_drv_action_query(dev, handle, data, fops, error); 8064 } 8065 8066 /** 8067 * Destroy all indirect actions (shared RSS). 8068 * 8069 * @param dev 8070 * Pointer to Ethernet device. 8071 * 8072 * @return 8073 * 0 on success, a negative errno value otherwise and rte_errno is set. 8074 */ 8075 int 8076 mlx5_action_handle_flush(struct rte_eth_dev *dev) 8077 { 8078 struct rte_flow_error error; 8079 struct mlx5_priv *priv = dev->data->dev_private; 8080 struct mlx5_shared_action_rss *shared_rss; 8081 int ret = 0; 8082 uint32_t idx; 8083 8084 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 8085 priv->rss_shared_actions, idx, shared_rss, next) { 8086 ret |= mlx5_action_handle_destroy(dev, 8087 (struct rte_flow_action_handle *)(uintptr_t)idx, &error); 8088 } 8089 return ret; 8090 } 8091 8092 #ifndef HAVE_MLX5DV_DR 8093 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) 8094 #else 8095 #define MLX5_DOMAIN_SYNC_FLOW \ 8096 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) 8097 #endif 8098 8099 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) 8100 { 8101 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 8102 const struct mlx5_flow_driver_ops *fops; 8103 int ret; 8104 struct rte_flow_attr attr = { .transfer = 0 }; 8105 8106 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8107 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); 8108 if (ret > 0) 8109 ret = -ret; 8110 return ret; 8111 } 8112 8113 /** 8114 * tunnel offload functionalilty is defined for DV environment only 8115 */ 8116 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8117 __extension__ 8118 union tunnel_offload_mark { 8119 uint32_t val; 8120 struct { 8121 uint32_t app_reserve:8; 8122 uint32_t table_id:15; 8123 uint32_t transfer:1; 8124 uint32_t _unused_:8; 8125 }; 8126 }; 8127 8128 static bool 8129 mlx5_access_tunnel_offload_db 8130 (struct rte_eth_dev *dev, 8131 bool (*match)(struct rte_eth_dev *, 8132 struct mlx5_flow_tunnel *, const void *), 8133 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8134 void (*miss)(struct rte_eth_dev *, void *), 8135 void *ctx, bool lock_op); 8136 8137 static int 8138 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 8139 struct rte_flow *flow, 8140 const struct rte_flow_attr *attr, 8141 const struct rte_flow_action *app_actions, 8142 uint32_t flow_idx, 8143 struct tunnel_default_miss_ctx *ctx, 8144 struct rte_flow_error *error) 8145 { 8146 struct mlx5_priv *priv = dev->data->dev_private; 8147 struct mlx5_flow *dev_flow; 8148 struct rte_flow_attr miss_attr = *attr; 8149 const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf; 8150 const struct rte_flow_item miss_items[2] = { 8151 { 8152 .type = RTE_FLOW_ITEM_TYPE_ETH, 8153 .spec = NULL, 8154 .last = NULL, 8155 .mask = NULL 8156 }, 8157 { 8158 .type = RTE_FLOW_ITEM_TYPE_END, 8159 .spec = NULL, 8160 .last = NULL, 8161 .mask = NULL 8162 } 8163 }; 8164 union tunnel_offload_mark mark_id; 8165 struct rte_flow_action_mark miss_mark; 8166 struct rte_flow_action miss_actions[3] = { 8167 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 8168 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 8169 }; 8170 const struct rte_flow_action_jump *jump_data; 8171 uint32_t i, flow_table = 0; /* prevent compilation warning */ 8172 struct flow_grp_info grp_info = { 8173 .external = 1, 8174 .transfer = attr->transfer, 8175 .fdb_def_rule = !!priv->fdb_def_rule, 8176 .std_tbl_fix = 0, 8177 }; 8178 int ret; 8179 8180 if (!attr->transfer) { 8181 uint32_t q_size; 8182 8183 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 8184 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 8185 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 8186 0, SOCKET_ID_ANY); 8187 if (!ctx->queue) 8188 return rte_flow_error_set 8189 (error, ENOMEM, 8190 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8191 NULL, "invalid default miss RSS"); 8192 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 8193 ctx->action_rss.level = 0, 8194 ctx->action_rss.types = priv->rss_conf.rss_hf, 8195 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 8196 ctx->action_rss.queue_num = priv->reta_idx_n, 8197 ctx->action_rss.key = priv->rss_conf.rss_key, 8198 ctx->action_rss.queue = ctx->queue; 8199 if (!priv->reta_idx_n || !priv->rxqs_n) 8200 return rte_flow_error_set 8201 (error, EINVAL, 8202 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8203 NULL, "invalid port configuration"); 8204 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 8205 ctx->action_rss.types = 0; 8206 for (i = 0; i != priv->reta_idx_n; ++i) 8207 ctx->queue[i] = (*priv->reta_idx)[i]; 8208 } else { 8209 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 8210 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 8211 } 8212 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 8213 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 8214 jump_data = app_actions->conf; 8215 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 8216 miss_attr.group = jump_data->group; 8217 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 8218 &flow_table, &grp_info, error); 8219 if (ret) 8220 return rte_flow_error_set(error, EINVAL, 8221 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8222 NULL, "invalid tunnel id"); 8223 mark_id.app_reserve = 0; 8224 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 8225 mark_id.transfer = !!attr->transfer; 8226 mark_id._unused_ = 0; 8227 miss_mark.id = mark_id.val; 8228 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 8229 miss_items, miss_actions, flow_idx, error); 8230 if (!dev_flow) 8231 return -rte_errno; 8232 dev_flow->flow = flow; 8233 dev_flow->external = true; 8234 dev_flow->tunnel = tunnel; 8235 /* Subflow object was created, we must include one in the list. */ 8236 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 8237 dev_flow->handle, next); 8238 DRV_LOG(DEBUG, 8239 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 8240 dev->data->port_id, tunnel->app_tunnel.type, 8241 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 8242 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 8243 miss_actions, error); 8244 if (!ret) 8245 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 8246 error); 8247 8248 return ret; 8249 } 8250 8251 static const struct mlx5_flow_tbl_data_entry * 8252 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 8253 { 8254 struct mlx5_priv *priv = dev->data->dev_private; 8255 struct mlx5_dev_ctx_shared *sh = priv->sh; 8256 struct mlx5_hlist_entry *he; 8257 union tunnel_offload_mark mbits = { .val = mark }; 8258 union mlx5_flow_tbl_key table_key = { 8259 { 8260 .level = tunnel_id_to_flow_tbl(mbits.table_id), 8261 .id = 0, 8262 .reserved = 0, 8263 .dummy = 0, 8264 .is_fdb = !!mbits.transfer, 8265 .is_egress = 0, 8266 } 8267 }; 8268 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL); 8269 return he ? 8270 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 8271 } 8272 8273 static void 8274 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list, 8275 struct mlx5_hlist_entry *entry) 8276 { 8277 struct mlx5_dev_ctx_shared *sh = list->ctx; 8278 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8279 8280 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8281 tunnel_flow_tbl_to_id(tte->flow_table)); 8282 mlx5_free(tte); 8283 } 8284 8285 static int 8286 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused, 8287 struct mlx5_hlist_entry *entry, 8288 uint64_t key, void *cb_ctx __rte_unused) 8289 { 8290 union tunnel_tbl_key tbl = { 8291 .val = key, 8292 }; 8293 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8294 8295 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group; 8296 } 8297 8298 static struct mlx5_hlist_entry * 8299 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key, 8300 void *ctx __rte_unused) 8301 { 8302 struct mlx5_dev_ctx_shared *sh = list->ctx; 8303 struct tunnel_tbl_entry *tte; 8304 union tunnel_tbl_key tbl = { 8305 .val = key, 8306 }; 8307 8308 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 8309 sizeof(*tte), 0, 8310 SOCKET_ID_ANY); 8311 if (!tte) 8312 goto err; 8313 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8314 &tte->flow_table); 8315 if (tte->flow_table >= MLX5_MAX_TABLES) { 8316 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.", 8317 tte->flow_table); 8318 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8319 tte->flow_table); 8320 goto err; 8321 } else if (!tte->flow_table) { 8322 goto err; 8323 } 8324 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 8325 tte->tunnel_id = tbl.tunnel_id; 8326 tte->group = tbl.group; 8327 return &tte->hash; 8328 err: 8329 if (tte) 8330 mlx5_free(tte); 8331 return NULL; 8332 } 8333 8334 static uint32_t 8335 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 8336 const struct mlx5_flow_tunnel *tunnel, 8337 uint32_t group, uint32_t *table, 8338 struct rte_flow_error *error) 8339 { 8340 struct mlx5_hlist_entry *he; 8341 struct tunnel_tbl_entry *tte; 8342 union tunnel_tbl_key key = { 8343 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 8344 .group = group 8345 }; 8346 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8347 struct mlx5_hlist *group_hash; 8348 8349 group_hash = tunnel ? tunnel->groups : thub->groups; 8350 he = mlx5_hlist_register(group_hash, key.val, NULL); 8351 if (!he) 8352 return rte_flow_error_set(error, EINVAL, 8353 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 8354 NULL, 8355 "tunnel group index not supported"); 8356 tte = container_of(he, typeof(*tte), hash); 8357 *table = tte->flow_table; 8358 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 8359 dev->data->port_id, key.tunnel_id, group, *table); 8360 return 0; 8361 } 8362 8363 static void 8364 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 8365 struct mlx5_flow_tunnel *tunnel) 8366 { 8367 struct mlx5_priv *priv = dev->data->dev_private; 8368 struct mlx5_indexed_pool *ipool; 8369 8370 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 8371 dev->data->port_id, tunnel->tunnel_id); 8372 LIST_REMOVE(tunnel, chain); 8373 mlx5_hlist_destroy(tunnel->groups); 8374 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8375 mlx5_ipool_free(ipool, tunnel->tunnel_id); 8376 } 8377 8378 static bool 8379 mlx5_access_tunnel_offload_db 8380 (struct rte_eth_dev *dev, 8381 bool (*match)(struct rte_eth_dev *, 8382 struct mlx5_flow_tunnel *, const void *), 8383 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8384 void (*miss)(struct rte_eth_dev *, void *), 8385 void *ctx, bool lock_op) 8386 { 8387 bool verdict = false; 8388 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8389 struct mlx5_flow_tunnel *tunnel; 8390 8391 rte_spinlock_lock(&thub->sl); 8392 LIST_FOREACH(tunnel, &thub->tunnels, chain) { 8393 verdict = match(dev, tunnel, (const void *)ctx); 8394 if (verdict) 8395 break; 8396 } 8397 if (!lock_op) 8398 rte_spinlock_unlock(&thub->sl); 8399 if (verdict && hit) 8400 hit(dev, tunnel, ctx); 8401 if (!verdict && miss) 8402 miss(dev, ctx); 8403 if (lock_op) 8404 rte_spinlock_unlock(&thub->sl); 8405 8406 return verdict; 8407 } 8408 8409 struct tunnel_db_find_tunnel_id_ctx { 8410 uint32_t tunnel_id; 8411 struct mlx5_flow_tunnel *tunnel; 8412 }; 8413 8414 static bool 8415 find_tunnel_id_match(struct rte_eth_dev *dev, 8416 struct mlx5_flow_tunnel *tunnel, const void *x) 8417 { 8418 const struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8419 8420 RTE_SET_USED(dev); 8421 return tunnel->tunnel_id == ctx->tunnel_id; 8422 } 8423 8424 static void 8425 find_tunnel_id_hit(struct rte_eth_dev *dev, 8426 struct mlx5_flow_tunnel *tunnel, void *x) 8427 { 8428 struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8429 RTE_SET_USED(dev); 8430 ctx->tunnel = tunnel; 8431 } 8432 8433 static struct mlx5_flow_tunnel * 8434 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 8435 { 8436 struct tunnel_db_find_tunnel_id_ctx ctx = { 8437 .tunnel_id = id, 8438 }; 8439 8440 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match, 8441 find_tunnel_id_hit, NULL, &ctx, true); 8442 8443 return ctx.tunnel; 8444 } 8445 8446 static struct mlx5_flow_tunnel * 8447 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 8448 const struct rte_flow_tunnel *app_tunnel) 8449 { 8450 struct mlx5_priv *priv = dev->data->dev_private; 8451 struct mlx5_indexed_pool *ipool; 8452 struct mlx5_flow_tunnel *tunnel; 8453 uint32_t id; 8454 8455 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8456 tunnel = mlx5_ipool_zmalloc(ipool, &id); 8457 if (!tunnel) 8458 return NULL; 8459 if (id >= MLX5_MAX_TUNNELS) { 8460 mlx5_ipool_free(ipool, id); 8461 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id); 8462 return NULL; 8463 } 8464 tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0, 8465 mlx5_flow_tunnel_grp2tbl_create_cb, 8466 mlx5_flow_tunnel_grp2tbl_match_cb, 8467 mlx5_flow_tunnel_grp2tbl_remove_cb); 8468 if (!tunnel->groups) { 8469 mlx5_ipool_free(ipool, id); 8470 return NULL; 8471 } 8472 tunnel->groups->ctx = priv->sh; 8473 /* initiate new PMD tunnel */ 8474 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 8475 tunnel->tunnel_id = id; 8476 tunnel->action.type = (typeof(tunnel->action.type)) 8477 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 8478 tunnel->action.conf = tunnel; 8479 tunnel->item.type = (typeof(tunnel->item.type)) 8480 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 8481 tunnel->item.spec = tunnel; 8482 tunnel->item.last = NULL; 8483 tunnel->item.mask = NULL; 8484 8485 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 8486 dev->data->port_id, tunnel->tunnel_id); 8487 8488 return tunnel; 8489 } 8490 8491 struct tunnel_db_get_tunnel_ctx { 8492 const struct rte_flow_tunnel *app_tunnel; 8493 struct mlx5_flow_tunnel *tunnel; 8494 }; 8495 8496 static bool get_tunnel_match(struct rte_eth_dev *dev, 8497 struct mlx5_flow_tunnel *tunnel, const void *x) 8498 { 8499 const struct tunnel_db_get_tunnel_ctx *ctx = x; 8500 8501 RTE_SET_USED(dev); 8502 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel, 8503 sizeof(*ctx->app_tunnel)); 8504 } 8505 8506 static void get_tunnel_hit(struct rte_eth_dev *dev, 8507 struct mlx5_flow_tunnel *tunnel, void *x) 8508 { 8509 /* called under tunnel spinlock protection */ 8510 struct tunnel_db_get_tunnel_ctx *ctx = x; 8511 8512 RTE_SET_USED(dev); 8513 tunnel->refctn++; 8514 ctx->tunnel = tunnel; 8515 } 8516 8517 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x) 8518 { 8519 /* called under tunnel spinlock protection */ 8520 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8521 struct tunnel_db_get_tunnel_ctx *ctx = x; 8522 8523 rte_spinlock_unlock(&thub->sl); 8524 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel); 8525 rte_spinlock_lock(&thub->sl); 8526 if (ctx->tunnel) { 8527 ctx->tunnel->refctn = 1; 8528 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain); 8529 } 8530 } 8531 8532 8533 static int 8534 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 8535 const struct rte_flow_tunnel *app_tunnel, 8536 struct mlx5_flow_tunnel **tunnel) 8537 { 8538 struct tunnel_db_get_tunnel_ctx ctx = { 8539 .app_tunnel = app_tunnel, 8540 }; 8541 8542 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit, 8543 get_tunnel_miss, &ctx, true); 8544 *tunnel = ctx.tunnel; 8545 return ctx.tunnel ? 0 : -ENOMEM; 8546 } 8547 8548 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 8549 { 8550 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 8551 8552 if (!thub) 8553 return; 8554 if (!LIST_EMPTY(&thub->tunnels)) 8555 DRV_LOG(WARNING, "port %u tunnels present", port_id); 8556 mlx5_hlist_destroy(thub->groups); 8557 mlx5_free(thub); 8558 } 8559 8560 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 8561 { 8562 int err; 8563 struct mlx5_flow_tunnel_hub *thub; 8564 8565 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 8566 0, SOCKET_ID_ANY); 8567 if (!thub) 8568 return -ENOMEM; 8569 LIST_INIT(&thub->tunnels); 8570 rte_spinlock_init(&thub->sl); 8571 thub->groups = mlx5_hlist_create("flow groups", 8572 rte_align32pow2(MLX5_MAX_TABLES), 0, 8573 0, mlx5_flow_tunnel_grp2tbl_create_cb, 8574 mlx5_flow_tunnel_grp2tbl_match_cb, 8575 mlx5_flow_tunnel_grp2tbl_remove_cb); 8576 if (!thub->groups) { 8577 err = -rte_errno; 8578 goto err; 8579 } 8580 thub->groups->ctx = sh; 8581 sh->tunnel_hub = thub; 8582 8583 return 0; 8584 8585 err: 8586 if (thub->groups) 8587 mlx5_hlist_destroy(thub->groups); 8588 if (thub) 8589 mlx5_free(thub); 8590 return err; 8591 } 8592 8593 static inline bool 8594 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 8595 struct rte_flow_tunnel *tunnel, 8596 const char *err_msg) 8597 { 8598 err_msg = NULL; 8599 if (!is_tunnel_offload_active(dev)) { 8600 err_msg = "tunnel offload was not activated"; 8601 goto out; 8602 } else if (!tunnel) { 8603 err_msg = "no application tunnel"; 8604 goto out; 8605 } 8606 8607 switch (tunnel->type) { 8608 default: 8609 err_msg = "unsupported tunnel type"; 8610 goto out; 8611 case RTE_FLOW_ITEM_TYPE_VXLAN: 8612 break; 8613 } 8614 8615 out: 8616 return !err_msg; 8617 } 8618 8619 static int 8620 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 8621 struct rte_flow_tunnel *app_tunnel, 8622 struct rte_flow_action **actions, 8623 uint32_t *num_of_actions, 8624 struct rte_flow_error *error) 8625 { 8626 int ret; 8627 struct mlx5_flow_tunnel *tunnel; 8628 const char *err_msg = NULL; 8629 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 8630 8631 if (!verdict) 8632 return rte_flow_error_set(error, EINVAL, 8633 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 8634 err_msg); 8635 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 8636 if (ret < 0) { 8637 return rte_flow_error_set(error, ret, 8638 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 8639 "failed to initialize pmd tunnel"); 8640 } 8641 *actions = &tunnel->action; 8642 *num_of_actions = 1; 8643 return 0; 8644 } 8645 8646 static int 8647 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 8648 struct rte_flow_tunnel *app_tunnel, 8649 struct rte_flow_item **items, 8650 uint32_t *num_of_items, 8651 struct rte_flow_error *error) 8652 { 8653 int ret; 8654 struct mlx5_flow_tunnel *tunnel; 8655 const char *err_msg = NULL; 8656 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 8657 8658 if (!verdict) 8659 return rte_flow_error_set(error, EINVAL, 8660 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 8661 err_msg); 8662 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 8663 if (ret < 0) { 8664 return rte_flow_error_set(error, ret, 8665 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 8666 "failed to initialize pmd tunnel"); 8667 } 8668 *items = &tunnel->item; 8669 *num_of_items = 1; 8670 return 0; 8671 } 8672 8673 struct tunnel_db_element_release_ctx { 8674 struct rte_flow_item *items; 8675 struct rte_flow_action *actions; 8676 uint32_t num_elements; 8677 struct rte_flow_error *error; 8678 int ret; 8679 }; 8680 8681 static bool 8682 tunnel_element_release_match(struct rte_eth_dev *dev, 8683 struct mlx5_flow_tunnel *tunnel, const void *x) 8684 { 8685 const struct tunnel_db_element_release_ctx *ctx = x; 8686 8687 RTE_SET_USED(dev); 8688 if (ctx->num_elements != 1) 8689 return false; 8690 else if (ctx->items) 8691 return ctx->items == &tunnel->item; 8692 else if (ctx->actions) 8693 return ctx->actions == &tunnel->action; 8694 8695 return false; 8696 } 8697 8698 static void 8699 tunnel_element_release_hit(struct rte_eth_dev *dev, 8700 struct mlx5_flow_tunnel *tunnel, void *x) 8701 { 8702 struct tunnel_db_element_release_ctx *ctx = x; 8703 ctx->ret = 0; 8704 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 8705 mlx5_flow_tunnel_free(dev, tunnel); 8706 } 8707 8708 static void 8709 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x) 8710 { 8711 struct tunnel_db_element_release_ctx *ctx = x; 8712 RTE_SET_USED(dev); 8713 ctx->ret = rte_flow_error_set(ctx->error, EINVAL, 8714 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 8715 "invalid argument"); 8716 } 8717 8718 static int 8719 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 8720 struct rte_flow_item *pmd_items, 8721 uint32_t num_items, struct rte_flow_error *err) 8722 { 8723 struct tunnel_db_element_release_ctx ctx = { 8724 .items = pmd_items, 8725 .actions = NULL, 8726 .num_elements = num_items, 8727 .error = err, 8728 }; 8729 8730 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 8731 tunnel_element_release_hit, 8732 tunnel_element_release_miss, &ctx, false); 8733 8734 return ctx.ret; 8735 } 8736 8737 static int 8738 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 8739 struct rte_flow_action *pmd_actions, 8740 uint32_t num_actions, struct rte_flow_error *err) 8741 { 8742 struct tunnel_db_element_release_ctx ctx = { 8743 .items = NULL, 8744 .actions = pmd_actions, 8745 .num_elements = num_actions, 8746 .error = err, 8747 }; 8748 8749 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 8750 tunnel_element_release_hit, 8751 tunnel_element_release_miss, &ctx, false); 8752 8753 return ctx.ret; 8754 } 8755 8756 static int 8757 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 8758 struct rte_mbuf *m, 8759 struct rte_flow_restore_info *info, 8760 struct rte_flow_error *err) 8761 { 8762 uint64_t ol_flags = m->ol_flags; 8763 const struct mlx5_flow_tbl_data_entry *tble; 8764 const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID; 8765 8766 if (!is_tunnel_offload_active(dev)) { 8767 info->flags = 0; 8768 return 0; 8769 } 8770 8771 if ((ol_flags & mask) != mask) 8772 goto err; 8773 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 8774 if (!tble) { 8775 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 8776 dev->data->port_id, m->hash.fdir.hi); 8777 goto err; 8778 } 8779 MLX5_ASSERT(tble->tunnel); 8780 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 8781 info->group_id = tble->group_id; 8782 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 8783 RTE_FLOW_RESTORE_INFO_GROUP_ID | 8784 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 8785 8786 return 0; 8787 8788 err: 8789 return rte_flow_error_set(err, EINVAL, 8790 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 8791 "failed to get restore info"); 8792 } 8793 8794 #else /* HAVE_IBV_FLOW_DV_SUPPORT */ 8795 static int 8796 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev, 8797 __rte_unused struct rte_flow_tunnel *app_tunnel, 8798 __rte_unused struct rte_flow_action **actions, 8799 __rte_unused uint32_t *num_of_actions, 8800 __rte_unused struct rte_flow_error *error) 8801 { 8802 return -ENOTSUP; 8803 } 8804 8805 static int 8806 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev, 8807 __rte_unused struct rte_flow_tunnel *app_tunnel, 8808 __rte_unused struct rte_flow_item **items, 8809 __rte_unused uint32_t *num_of_items, 8810 __rte_unused struct rte_flow_error *error) 8811 { 8812 return -ENOTSUP; 8813 } 8814 8815 static int 8816 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev, 8817 __rte_unused struct rte_flow_item *pmd_items, 8818 __rte_unused uint32_t num_items, 8819 __rte_unused struct rte_flow_error *err) 8820 { 8821 return -ENOTSUP; 8822 } 8823 8824 static int 8825 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev, 8826 __rte_unused struct rte_flow_action *pmd_action, 8827 __rte_unused uint32_t num_actions, 8828 __rte_unused struct rte_flow_error *err) 8829 { 8830 return -ENOTSUP; 8831 } 8832 8833 static int 8834 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev, 8835 __rte_unused struct rte_mbuf *m, 8836 __rte_unused struct rte_flow_restore_info *i, 8837 __rte_unused struct rte_flow_error *err) 8838 { 8839 return -ENOTSUP; 8840 } 8841 8842 static int 8843 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev, 8844 __rte_unused struct rte_flow *flow, 8845 __rte_unused const struct rte_flow_attr *attr, 8846 __rte_unused const struct rte_flow_action *actions, 8847 __rte_unused uint32_t flow_idx, 8848 __rte_unused struct tunnel_default_miss_ctx *ctx, 8849 __rte_unused struct rte_flow_error *error) 8850 { 8851 return -ENOTSUP; 8852 } 8853 8854 static struct mlx5_flow_tunnel * 8855 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev, 8856 __rte_unused uint32_t id) 8857 { 8858 return NULL; 8859 } 8860 8861 static void 8862 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev, 8863 __rte_unused struct mlx5_flow_tunnel *tunnel) 8864 { 8865 } 8866 8867 static uint32_t 8868 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev, 8869 __rte_unused const struct mlx5_flow_tunnel *t, 8870 __rte_unused uint32_t group, 8871 __rte_unused uint32_t *table, 8872 struct rte_flow_error *error) 8873 { 8874 return rte_flow_error_set(error, ENOTSUP, 8875 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 8876 "tunnel offload requires DV support"); 8877 } 8878 8879 void 8880 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh, 8881 __rte_unused uint16_t port_id) 8882 { 8883 } 8884 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 8885