1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 12 /* Verbs header. */ 13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 14 #ifdef PEDANTIC 15 #pragma GCC diagnostic ignored "-Wpedantic" 16 #endif 17 #include <infiniband/verbs.h> 18 #ifdef PEDANTIC 19 #pragma GCC diagnostic error "-Wpedantic" 20 #endif 21 22 #include <rte_common.h> 23 #include <rte_ether.h> 24 #include <rte_ethdev_driver.h> 25 #include <rte_flow.h> 26 #include <rte_flow_driver.h> 27 #include <rte_malloc.h> 28 #include <rte_ip.h> 29 30 #include "mlx5.h" 31 #include "mlx5_defs.h" 32 #include "mlx5_flow.h" 33 #include "mlx5_glue.h" 34 #include "mlx5_prm.h" 35 #include "mlx5_rxtx.h" 36 37 /* Dev ops structure defined in mlx5.c */ 38 extern const struct eth_dev_ops mlx5_dev_ops; 39 extern const struct eth_dev_ops mlx5_dev_ops_isolate; 40 41 /** Device flow drivers. */ 42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops; 44 #endif 45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 46 47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 48 49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 50 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 52 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 53 #endif 54 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 55 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 56 }; 57 58 enum mlx5_expansion { 59 MLX5_EXPANSION_ROOT, 60 MLX5_EXPANSION_ROOT_OUTER, 61 MLX5_EXPANSION_ROOT_ETH_VLAN, 62 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 63 MLX5_EXPANSION_OUTER_ETH, 64 MLX5_EXPANSION_OUTER_ETH_VLAN, 65 MLX5_EXPANSION_OUTER_VLAN, 66 MLX5_EXPANSION_OUTER_IPV4, 67 MLX5_EXPANSION_OUTER_IPV4_UDP, 68 MLX5_EXPANSION_OUTER_IPV4_TCP, 69 MLX5_EXPANSION_OUTER_IPV6, 70 MLX5_EXPANSION_OUTER_IPV6_UDP, 71 MLX5_EXPANSION_OUTER_IPV6_TCP, 72 MLX5_EXPANSION_VXLAN, 73 MLX5_EXPANSION_VXLAN_GPE, 74 MLX5_EXPANSION_GRE, 75 MLX5_EXPANSION_MPLS, 76 MLX5_EXPANSION_ETH, 77 MLX5_EXPANSION_ETH_VLAN, 78 MLX5_EXPANSION_VLAN, 79 MLX5_EXPANSION_IPV4, 80 MLX5_EXPANSION_IPV4_UDP, 81 MLX5_EXPANSION_IPV4_TCP, 82 MLX5_EXPANSION_IPV6, 83 MLX5_EXPANSION_IPV6_UDP, 84 MLX5_EXPANSION_IPV6_TCP, 85 }; 86 87 /** Supported expansion of items. */ 88 static const struct rte_flow_expand_node mlx5_support_expansion[] = { 89 [MLX5_EXPANSION_ROOT] = { 90 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 91 MLX5_EXPANSION_IPV4, 92 MLX5_EXPANSION_IPV6), 93 .type = RTE_FLOW_ITEM_TYPE_END, 94 }, 95 [MLX5_EXPANSION_ROOT_OUTER] = { 96 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 97 MLX5_EXPANSION_OUTER_IPV4, 98 MLX5_EXPANSION_OUTER_IPV6), 99 .type = RTE_FLOW_ITEM_TYPE_END, 100 }, 101 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 102 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 103 .type = RTE_FLOW_ITEM_TYPE_END, 104 }, 105 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN), 107 .type = RTE_FLOW_ITEM_TYPE_END, 108 }, 109 [MLX5_EXPANSION_OUTER_ETH] = { 110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 111 MLX5_EXPANSION_OUTER_IPV6, 112 MLX5_EXPANSION_MPLS), 113 .type = RTE_FLOW_ITEM_TYPE_ETH, 114 .rss_types = 0, 115 }, 116 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 117 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 118 .type = RTE_FLOW_ITEM_TYPE_ETH, 119 .rss_types = 0, 120 }, 121 [MLX5_EXPANSION_OUTER_VLAN] = { 122 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 123 MLX5_EXPANSION_OUTER_IPV6), 124 .type = RTE_FLOW_ITEM_TYPE_VLAN, 125 }, 126 [MLX5_EXPANSION_OUTER_IPV4] = { 127 .next = RTE_FLOW_EXPAND_RSS_NEXT 128 (MLX5_EXPANSION_OUTER_IPV4_UDP, 129 MLX5_EXPANSION_OUTER_IPV4_TCP, 130 MLX5_EXPANSION_GRE, 131 MLX5_EXPANSION_IPV4, 132 MLX5_EXPANSION_IPV6), 133 .type = RTE_FLOW_ITEM_TYPE_IPV4, 134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 135 ETH_RSS_NONFRAG_IPV4_OTHER, 136 }, 137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 139 MLX5_EXPANSION_VXLAN_GPE), 140 .type = RTE_FLOW_ITEM_TYPE_UDP, 141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 142 }, 143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 144 .type = RTE_FLOW_ITEM_TYPE_TCP, 145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 146 }, 147 [MLX5_EXPANSION_OUTER_IPV6] = { 148 .next = RTE_FLOW_EXPAND_RSS_NEXT 149 (MLX5_EXPANSION_OUTER_IPV6_UDP, 150 MLX5_EXPANSION_OUTER_IPV6_TCP, 151 MLX5_EXPANSION_IPV4, 152 MLX5_EXPANSION_IPV6), 153 .type = RTE_FLOW_ITEM_TYPE_IPV6, 154 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 155 ETH_RSS_NONFRAG_IPV6_OTHER, 156 }, 157 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 158 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 159 MLX5_EXPANSION_VXLAN_GPE), 160 .type = RTE_FLOW_ITEM_TYPE_UDP, 161 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 162 }, 163 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 164 .type = RTE_FLOW_ITEM_TYPE_TCP, 165 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 166 }, 167 [MLX5_EXPANSION_VXLAN] = { 168 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 169 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 170 }, 171 [MLX5_EXPANSION_VXLAN_GPE] = { 172 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 173 MLX5_EXPANSION_IPV4, 174 MLX5_EXPANSION_IPV6), 175 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 176 }, 177 [MLX5_EXPANSION_GRE] = { 178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 179 .type = RTE_FLOW_ITEM_TYPE_GRE, 180 }, 181 [MLX5_EXPANSION_MPLS] = { 182 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 183 MLX5_EXPANSION_IPV6), 184 .type = RTE_FLOW_ITEM_TYPE_MPLS, 185 }, 186 [MLX5_EXPANSION_ETH] = { 187 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 188 MLX5_EXPANSION_IPV6), 189 .type = RTE_FLOW_ITEM_TYPE_ETH, 190 }, 191 [MLX5_EXPANSION_ETH_VLAN] = { 192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 193 .type = RTE_FLOW_ITEM_TYPE_ETH, 194 }, 195 [MLX5_EXPANSION_VLAN] = { 196 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 197 MLX5_EXPANSION_IPV6), 198 .type = RTE_FLOW_ITEM_TYPE_VLAN, 199 }, 200 [MLX5_EXPANSION_IPV4] = { 201 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 202 MLX5_EXPANSION_IPV4_TCP), 203 .type = RTE_FLOW_ITEM_TYPE_IPV4, 204 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 205 ETH_RSS_NONFRAG_IPV4_OTHER, 206 }, 207 [MLX5_EXPANSION_IPV4_UDP] = { 208 .type = RTE_FLOW_ITEM_TYPE_UDP, 209 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 210 }, 211 [MLX5_EXPANSION_IPV4_TCP] = { 212 .type = RTE_FLOW_ITEM_TYPE_TCP, 213 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 214 }, 215 [MLX5_EXPANSION_IPV6] = { 216 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 217 MLX5_EXPANSION_IPV6_TCP), 218 .type = RTE_FLOW_ITEM_TYPE_IPV6, 219 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 220 ETH_RSS_NONFRAG_IPV6_OTHER, 221 }, 222 [MLX5_EXPANSION_IPV6_UDP] = { 223 .type = RTE_FLOW_ITEM_TYPE_UDP, 224 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 225 }, 226 [MLX5_EXPANSION_IPV6_TCP] = { 227 .type = RTE_FLOW_ITEM_TYPE_TCP, 228 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 229 }, 230 }; 231 232 static const struct rte_flow_ops mlx5_flow_ops = { 233 .validate = mlx5_flow_validate, 234 .create = mlx5_flow_create, 235 .destroy = mlx5_flow_destroy, 236 .flush = mlx5_flow_flush, 237 .isolate = mlx5_flow_isolate, 238 .query = mlx5_flow_query, 239 }; 240 241 /* Convert FDIR request to Generic flow. */ 242 struct mlx5_fdir { 243 struct rte_flow_attr attr; 244 struct rte_flow_item items[4]; 245 struct rte_flow_item_eth l2; 246 struct rte_flow_item_eth l2_mask; 247 union { 248 struct rte_flow_item_ipv4 ipv4; 249 struct rte_flow_item_ipv6 ipv6; 250 } l3; 251 union { 252 struct rte_flow_item_ipv4 ipv4; 253 struct rte_flow_item_ipv6 ipv6; 254 } l3_mask; 255 union { 256 struct rte_flow_item_udp udp; 257 struct rte_flow_item_tcp tcp; 258 } l4; 259 union { 260 struct rte_flow_item_udp udp; 261 struct rte_flow_item_tcp tcp; 262 } l4_mask; 263 struct rte_flow_action actions[2]; 264 struct rte_flow_action_queue queue; 265 }; 266 267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 269 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 270 }; 271 272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 274 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 275 { 9, 10, 11 }, { 12, 13, 14 }, 276 }; 277 278 /* Tunnel information. */ 279 struct mlx5_flow_tunnel_info { 280 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 281 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 282 }; 283 284 static struct mlx5_flow_tunnel_info tunnels_info[] = { 285 { 286 .tunnel = MLX5_FLOW_LAYER_VXLAN, 287 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 288 }, 289 { 290 .tunnel = MLX5_FLOW_LAYER_GENEVE, 291 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 292 }, 293 { 294 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 295 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 296 }, 297 { 298 .tunnel = MLX5_FLOW_LAYER_GRE, 299 .ptype = RTE_PTYPE_TUNNEL_GRE, 300 }, 301 { 302 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 303 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 304 }, 305 { 306 .tunnel = MLX5_FLOW_LAYER_MPLS, 307 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 308 }, 309 { 310 .tunnel = MLX5_FLOW_LAYER_NVGRE, 311 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 312 }, 313 { 314 .tunnel = MLX5_FLOW_LAYER_IPIP, 315 .ptype = RTE_PTYPE_TUNNEL_IP, 316 }, 317 { 318 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 319 .ptype = RTE_PTYPE_TUNNEL_IP, 320 }, 321 }; 322 323 /** 324 * Translate tag ID to register. 325 * 326 * @param[in] dev 327 * Pointer to the Ethernet device structure. 328 * @param[in] feature 329 * The feature that request the register. 330 * @param[in] id 331 * The request register ID. 332 * @param[out] error 333 * Error description in case of any. 334 * 335 * @return 336 * The request register on success, a negative errno 337 * value otherwise and rte_errno is set. 338 */ 339 enum modify_reg 340 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 341 enum mlx5_feature_name feature, 342 uint32_t id, 343 struct rte_flow_error *error) 344 { 345 struct mlx5_priv *priv = dev->data->dev_private; 346 struct mlx5_dev_config *config = &priv->config; 347 enum modify_reg start_reg; 348 349 switch (feature) { 350 case MLX5_HAIRPIN_RX: 351 return REG_B; 352 case MLX5_HAIRPIN_TX: 353 return REG_A; 354 case MLX5_METADATA_RX: 355 switch (config->dv_xmeta_en) { 356 case MLX5_XMETA_MODE_LEGACY: 357 return REG_B; 358 case MLX5_XMETA_MODE_META16: 359 return REG_C_0; 360 case MLX5_XMETA_MODE_META32: 361 return REG_C_1; 362 } 363 break; 364 case MLX5_METADATA_TX: 365 return REG_A; 366 case MLX5_METADATA_FDB: 367 return REG_C_0; 368 case MLX5_FLOW_MARK: 369 switch (config->dv_xmeta_en) { 370 case MLX5_XMETA_MODE_LEGACY: 371 return REG_NONE; 372 case MLX5_XMETA_MODE_META16: 373 return REG_C_1; 374 case MLX5_XMETA_MODE_META32: 375 return REG_C_0; 376 } 377 break; 378 case MLX5_COPY_MARK: 379 case MLX5_MTR_SFX: 380 /* 381 * Metadata COPY_MARK register using is in meter suffix sub 382 * flow while with meter. It's safe to share the same register. 383 */ 384 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 385 case MLX5_MTR_COLOR: 386 RTE_ASSERT(priv->mtr_color_reg != REG_NONE); 387 return priv->mtr_color_reg; 388 case MLX5_APP_TAG: 389 /* 390 * If meter is enable, it will engage two registers for color 391 * match and flow match. If meter color match is not using the 392 * REG_C_2, need to skip the REG_C_x be used by meter color 393 * match. 394 * If meter is disable, free to use all available registers. 395 */ 396 if (priv->mtr_color_reg != REG_NONE) 397 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_3 : 398 REG_C_4; 399 else 400 start_reg = REG_C_2; 401 if (id > (REG_C_7 - start_reg)) 402 return rte_flow_error_set(error, EINVAL, 403 RTE_FLOW_ERROR_TYPE_ITEM, 404 NULL, "invalid tag id"); 405 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE) 406 return rte_flow_error_set(error, ENOTSUP, 407 RTE_FLOW_ERROR_TYPE_ITEM, 408 NULL, "unsupported tag id"); 409 /* 410 * This case means meter is using the REG_C_x great than 2. 411 * Take care not to conflict with meter color REG_C_x. 412 * If the available index REG_C_y >= REG_C_x, skip the 413 * color register. 414 */ 415 if (start_reg == REG_C_3 && config->flow_mreg_c 416 [id + REG_C_3 - REG_C_0] >= priv->mtr_color_reg) { 417 if (config->flow_mreg_c[id + 1 + REG_C_3 - REG_C_0] != 418 REG_NONE) 419 return config->flow_mreg_c 420 [id + 1 + REG_C_3 - REG_C_0]; 421 return rte_flow_error_set(error, ENOTSUP, 422 RTE_FLOW_ERROR_TYPE_ITEM, 423 NULL, "unsupported tag id"); 424 } 425 return config->flow_mreg_c[id + start_reg - REG_C_0]; 426 } 427 assert(false); 428 return rte_flow_error_set(error, EINVAL, 429 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 430 NULL, "invalid feature name"); 431 } 432 433 /** 434 * Check extensive flow metadata register support. 435 * 436 * @param dev 437 * Pointer to rte_eth_dev structure. 438 * 439 * @return 440 * True if device supports extensive flow metadata register, otherwise false. 441 */ 442 bool 443 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 444 { 445 struct mlx5_priv *priv = dev->data->dev_private; 446 struct mlx5_dev_config *config = &priv->config; 447 448 /* 449 * Having available reg_c can be regarded inclusively as supporting 450 * extensive flow metadata register, which could mean, 451 * - metadata register copy action by modify header. 452 * - 16 modify header actions is supported. 453 * - reg_c's are preserved across different domain (FDB and NIC) on 454 * packet loopback by flow lookup miss. 455 */ 456 return config->flow_mreg_c[2] != REG_NONE; 457 } 458 459 /** 460 * Discover the maximum number of priority available. 461 * 462 * @param[in] dev 463 * Pointer to the Ethernet device structure. 464 * 465 * @return 466 * number of supported flow priority on success, a negative errno 467 * value otherwise and rte_errno is set. 468 */ 469 int 470 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 471 { 472 struct mlx5_priv *priv = dev->data->dev_private; 473 struct { 474 struct ibv_flow_attr attr; 475 struct ibv_flow_spec_eth eth; 476 struct ibv_flow_spec_action_drop drop; 477 } flow_attr = { 478 .attr = { 479 .num_of_specs = 2, 480 .port = (uint8_t)priv->ibv_port, 481 }, 482 .eth = { 483 .type = IBV_FLOW_SPEC_ETH, 484 .size = sizeof(struct ibv_flow_spec_eth), 485 }, 486 .drop = { 487 .size = sizeof(struct ibv_flow_spec_action_drop), 488 .type = IBV_FLOW_SPEC_ACTION_DROP, 489 }, 490 }; 491 struct ibv_flow *flow; 492 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev); 493 uint16_t vprio[] = { 8, 16 }; 494 int i; 495 int priority = 0; 496 497 if (!drop) { 498 rte_errno = ENOTSUP; 499 return -rte_errno; 500 } 501 for (i = 0; i != RTE_DIM(vprio); i++) { 502 flow_attr.attr.priority = vprio[i] - 1; 503 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr); 504 if (!flow) 505 break; 506 claim_zero(mlx5_glue->destroy_flow(flow)); 507 priority = vprio[i]; 508 } 509 mlx5_hrxq_drop_release(dev); 510 switch (priority) { 511 case 8: 512 priority = RTE_DIM(priority_map_3); 513 break; 514 case 16: 515 priority = RTE_DIM(priority_map_5); 516 break; 517 default: 518 rte_errno = ENOTSUP; 519 DRV_LOG(ERR, 520 "port %u verbs maximum priority: %d expected 8/16", 521 dev->data->port_id, priority); 522 return -rte_errno; 523 } 524 DRV_LOG(INFO, "port %u flow maximum priority: %d", 525 dev->data->port_id, priority); 526 return priority; 527 } 528 529 /** 530 * Adjust flow priority based on the highest layer and the request priority. 531 * 532 * @param[in] dev 533 * Pointer to the Ethernet device structure. 534 * @param[in] priority 535 * The rule base priority. 536 * @param[in] subpriority 537 * The priority based on the items. 538 * 539 * @return 540 * The new priority. 541 */ 542 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 543 uint32_t subpriority) 544 { 545 uint32_t res = 0; 546 struct mlx5_priv *priv = dev->data->dev_private; 547 548 switch (priv->config.flow_prio) { 549 case RTE_DIM(priority_map_3): 550 res = priority_map_3[priority][subpriority]; 551 break; 552 case RTE_DIM(priority_map_5): 553 res = priority_map_5[priority][subpriority]; 554 break; 555 } 556 return res; 557 } 558 559 /** 560 * Verify the @p item specifications (spec, last, mask) are compatible with the 561 * NIC capabilities. 562 * 563 * @param[in] item 564 * Item specification. 565 * @param[in] mask 566 * @p item->mask or flow default bit-masks. 567 * @param[in] nic_mask 568 * Bit-masks covering supported fields by the NIC to compare with user mask. 569 * @param[in] size 570 * Bit-masks size in bytes. 571 * @param[out] error 572 * Pointer to error structure. 573 * 574 * @return 575 * 0 on success, a negative errno value otherwise and rte_errno is set. 576 */ 577 int 578 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 579 const uint8_t *mask, 580 const uint8_t *nic_mask, 581 unsigned int size, 582 struct rte_flow_error *error) 583 { 584 unsigned int i; 585 586 assert(nic_mask); 587 for (i = 0; i < size; ++i) 588 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 589 return rte_flow_error_set(error, ENOTSUP, 590 RTE_FLOW_ERROR_TYPE_ITEM, 591 item, 592 "mask enables non supported" 593 " bits"); 594 if (!item->spec && (item->mask || item->last)) 595 return rte_flow_error_set(error, EINVAL, 596 RTE_FLOW_ERROR_TYPE_ITEM, item, 597 "mask/last without a spec is not" 598 " supported"); 599 if (item->spec && item->last) { 600 uint8_t spec[size]; 601 uint8_t last[size]; 602 unsigned int i; 603 int ret; 604 605 for (i = 0; i < size; ++i) { 606 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 607 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 608 } 609 ret = memcmp(spec, last, size); 610 if (ret != 0) 611 return rte_flow_error_set(error, EINVAL, 612 RTE_FLOW_ERROR_TYPE_ITEM, 613 item, 614 "range is not valid"); 615 } 616 return 0; 617 } 618 619 /** 620 * Adjust the hash fields according to the @p flow information. 621 * 622 * @param[in] dev_flow. 623 * Pointer to the mlx5_flow. 624 * @param[in] tunnel 625 * 1 when the hash field is for a tunnel item. 626 * @param[in] layer_types 627 * ETH_RSS_* types. 628 * @param[in] hash_fields 629 * Item hash fields. 630 * 631 * @return 632 * The hash fields that should be used. 633 */ 634 uint64_t 635 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, 636 int tunnel __rte_unused, uint64_t layer_types, 637 uint64_t hash_fields) 638 { 639 struct rte_flow *flow = dev_flow->flow; 640 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 641 int rss_request_inner = flow->rss.level >= 2; 642 643 /* Check RSS hash level for tunnel. */ 644 if (tunnel && rss_request_inner) 645 hash_fields |= IBV_RX_HASH_INNER; 646 else if (tunnel || rss_request_inner) 647 return 0; 648 #endif 649 /* Check if requested layer matches RSS hash fields. */ 650 if (!(flow->rss.types & layer_types)) 651 return 0; 652 return hash_fields; 653 } 654 655 /** 656 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 657 * if several tunnel rules are used on this queue, the tunnel ptype will be 658 * cleared. 659 * 660 * @param rxq_ctrl 661 * Rx queue to update. 662 */ 663 static void 664 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 665 { 666 unsigned int i; 667 uint32_t tunnel_ptype = 0; 668 669 /* Look up for the ptype to use. */ 670 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 671 if (!rxq_ctrl->flow_tunnels_n[i]) 672 continue; 673 if (!tunnel_ptype) { 674 tunnel_ptype = tunnels_info[i].ptype; 675 } else { 676 tunnel_ptype = 0; 677 break; 678 } 679 } 680 rxq_ctrl->rxq.tunnel = tunnel_ptype; 681 } 682 683 /** 684 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 685 * flow. 686 * 687 * @param[in] dev 688 * Pointer to the Ethernet device structure. 689 * @param[in] dev_flow 690 * Pointer to device flow structure. 691 */ 692 static void 693 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 694 { 695 struct mlx5_priv *priv = dev->data->dev_private; 696 struct rte_flow *flow = dev_flow->flow; 697 const int mark = !!(dev_flow->actions & 698 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 699 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 700 unsigned int i; 701 702 for (i = 0; i != flow->rss.queue_num; ++i) { 703 int idx = (*flow->rss.queue)[i]; 704 struct mlx5_rxq_ctrl *rxq_ctrl = 705 container_of((*priv->rxqs)[idx], 706 struct mlx5_rxq_ctrl, rxq); 707 708 /* 709 * To support metadata register copy on Tx loopback, 710 * this must be always enabled (metadata may arive 711 * from other port - not from local flows only. 712 */ 713 if (priv->config.dv_flow_en && 714 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 715 mlx5_flow_ext_mreg_supported(dev)) { 716 rxq_ctrl->rxq.mark = 1; 717 rxq_ctrl->flow_mark_n = 1; 718 } else if (mark) { 719 rxq_ctrl->rxq.mark = 1; 720 rxq_ctrl->flow_mark_n++; 721 } 722 if (tunnel) { 723 unsigned int j; 724 725 /* Increase the counter matching the flow. */ 726 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 727 if ((tunnels_info[j].tunnel & 728 dev_flow->layers) == 729 tunnels_info[j].tunnel) { 730 rxq_ctrl->flow_tunnels_n[j]++; 731 break; 732 } 733 } 734 flow_rxq_tunnel_ptype_update(rxq_ctrl); 735 } 736 } 737 } 738 739 /** 740 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 741 * 742 * @param[in] dev 743 * Pointer to the Ethernet device structure. 744 * @param[in] flow 745 * Pointer to flow structure. 746 */ 747 static void 748 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 749 { 750 struct mlx5_flow *dev_flow; 751 752 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 753 flow_drv_rxq_flags_set(dev, dev_flow); 754 } 755 756 /** 757 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 758 * device flow if no other flow uses it with the same kind of request. 759 * 760 * @param dev 761 * Pointer to Ethernet device. 762 * @param[in] dev_flow 763 * Pointer to the device flow. 764 */ 765 static void 766 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 767 { 768 struct mlx5_priv *priv = dev->data->dev_private; 769 struct rte_flow *flow = dev_flow->flow; 770 const int mark = !!(dev_flow->actions & 771 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 772 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 773 unsigned int i; 774 775 assert(dev->data->dev_started); 776 for (i = 0; i != flow->rss.queue_num; ++i) { 777 int idx = (*flow->rss.queue)[i]; 778 struct mlx5_rxq_ctrl *rxq_ctrl = 779 container_of((*priv->rxqs)[idx], 780 struct mlx5_rxq_ctrl, rxq); 781 782 if (priv->config.dv_flow_en && 783 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 784 mlx5_flow_ext_mreg_supported(dev)) { 785 rxq_ctrl->rxq.mark = 1; 786 rxq_ctrl->flow_mark_n = 1; 787 } else if (mark) { 788 rxq_ctrl->flow_mark_n--; 789 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 790 } 791 if (tunnel) { 792 unsigned int j; 793 794 /* Decrease the counter matching the flow. */ 795 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 796 if ((tunnels_info[j].tunnel & 797 dev_flow->layers) == 798 tunnels_info[j].tunnel) { 799 rxq_ctrl->flow_tunnels_n[j]--; 800 break; 801 } 802 } 803 flow_rxq_tunnel_ptype_update(rxq_ctrl); 804 } 805 } 806 } 807 808 /** 809 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 810 * @p flow if no other flow uses it with the same kind of request. 811 * 812 * @param dev 813 * Pointer to Ethernet device. 814 * @param[in] flow 815 * Pointer to the flow. 816 */ 817 static void 818 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 819 { 820 struct mlx5_flow *dev_flow; 821 822 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 823 flow_drv_rxq_flags_trim(dev, dev_flow); 824 } 825 826 /** 827 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 828 * 829 * @param dev 830 * Pointer to Ethernet device. 831 */ 832 static void 833 flow_rxq_flags_clear(struct rte_eth_dev *dev) 834 { 835 struct mlx5_priv *priv = dev->data->dev_private; 836 unsigned int i; 837 838 for (i = 0; i != priv->rxqs_n; ++i) { 839 struct mlx5_rxq_ctrl *rxq_ctrl; 840 unsigned int j; 841 842 if (!(*priv->rxqs)[i]) 843 continue; 844 rxq_ctrl = container_of((*priv->rxqs)[i], 845 struct mlx5_rxq_ctrl, rxq); 846 rxq_ctrl->flow_mark_n = 0; 847 rxq_ctrl->rxq.mark = 0; 848 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 849 rxq_ctrl->flow_tunnels_n[j] = 0; 850 rxq_ctrl->rxq.tunnel = 0; 851 } 852 } 853 854 /* 855 * return a pointer to the desired action in the list of actions. 856 * 857 * @param[in] actions 858 * The list of actions to search the action in. 859 * @param[in] action 860 * The action to find. 861 * 862 * @return 863 * Pointer to the action in the list, if found. NULL otherwise. 864 */ 865 const struct rte_flow_action * 866 mlx5_flow_find_action(const struct rte_flow_action *actions, 867 enum rte_flow_action_type action) 868 { 869 if (actions == NULL) 870 return NULL; 871 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 872 if (actions->type == action) 873 return actions; 874 return NULL; 875 } 876 877 /* 878 * Validate the flag action. 879 * 880 * @param[in] action_flags 881 * Bit-fields that holds the actions detected until now. 882 * @param[in] attr 883 * Attributes of flow that includes this action. 884 * @param[out] error 885 * Pointer to error structure. 886 * 887 * @return 888 * 0 on success, a negative errno value otherwise and rte_errno is set. 889 */ 890 int 891 mlx5_flow_validate_action_flag(uint64_t action_flags, 892 const struct rte_flow_attr *attr, 893 struct rte_flow_error *error) 894 { 895 896 if (action_flags & MLX5_FLOW_ACTION_DROP) 897 return rte_flow_error_set(error, EINVAL, 898 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 899 "can't drop and flag in same flow"); 900 if (action_flags & MLX5_FLOW_ACTION_MARK) 901 return rte_flow_error_set(error, EINVAL, 902 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 903 "can't mark and flag in same flow"); 904 if (action_flags & MLX5_FLOW_ACTION_FLAG) 905 return rte_flow_error_set(error, EINVAL, 906 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 907 "can't have 2 flag" 908 " actions in same flow"); 909 if (attr->egress) 910 return rte_flow_error_set(error, ENOTSUP, 911 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 912 "flag action not supported for " 913 "egress"); 914 return 0; 915 } 916 917 /* 918 * Validate the mark action. 919 * 920 * @param[in] action 921 * Pointer to the queue action. 922 * @param[in] action_flags 923 * Bit-fields that holds the actions detected until now. 924 * @param[in] attr 925 * Attributes of flow that includes this action. 926 * @param[out] error 927 * Pointer to error structure. 928 * 929 * @return 930 * 0 on success, a negative errno value otherwise and rte_errno is set. 931 */ 932 int 933 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 934 uint64_t action_flags, 935 const struct rte_flow_attr *attr, 936 struct rte_flow_error *error) 937 { 938 const struct rte_flow_action_mark *mark = action->conf; 939 940 if (!mark) 941 return rte_flow_error_set(error, EINVAL, 942 RTE_FLOW_ERROR_TYPE_ACTION, 943 action, 944 "configuration cannot be null"); 945 if (mark->id >= MLX5_FLOW_MARK_MAX) 946 return rte_flow_error_set(error, EINVAL, 947 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 948 &mark->id, 949 "mark id must in 0 <= id < " 950 RTE_STR(MLX5_FLOW_MARK_MAX)); 951 if (action_flags & MLX5_FLOW_ACTION_DROP) 952 return rte_flow_error_set(error, EINVAL, 953 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 954 "can't drop and mark in same flow"); 955 if (action_flags & MLX5_FLOW_ACTION_FLAG) 956 return rte_flow_error_set(error, EINVAL, 957 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 958 "can't flag and mark in same flow"); 959 if (action_flags & MLX5_FLOW_ACTION_MARK) 960 return rte_flow_error_set(error, EINVAL, 961 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 962 "can't have 2 mark actions in same" 963 " flow"); 964 if (attr->egress) 965 return rte_flow_error_set(error, ENOTSUP, 966 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 967 "mark action not supported for " 968 "egress"); 969 return 0; 970 } 971 972 /* 973 * Validate the drop action. 974 * 975 * @param[in] action_flags 976 * Bit-fields that holds the actions detected until now. 977 * @param[in] attr 978 * Attributes of flow that includes this action. 979 * @param[out] error 980 * Pointer to error structure. 981 * 982 * @return 983 * 0 on success, a negative errno value otherwise and rte_errno is set. 984 */ 985 int 986 mlx5_flow_validate_action_drop(uint64_t action_flags, 987 const struct rte_flow_attr *attr, 988 struct rte_flow_error *error) 989 { 990 if (action_flags & MLX5_FLOW_ACTION_FLAG) 991 return rte_flow_error_set(error, EINVAL, 992 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 993 "can't drop and flag in same flow"); 994 if (action_flags & MLX5_FLOW_ACTION_MARK) 995 return rte_flow_error_set(error, EINVAL, 996 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 997 "can't drop and mark in same flow"); 998 if (action_flags & (MLX5_FLOW_FATE_ACTIONS | 999 MLX5_FLOW_FATE_ESWITCH_ACTIONS)) 1000 return rte_flow_error_set(error, EINVAL, 1001 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1002 "can't have 2 fate actions in" 1003 " same flow"); 1004 if (attr->egress) 1005 return rte_flow_error_set(error, ENOTSUP, 1006 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1007 "drop action not supported for " 1008 "egress"); 1009 return 0; 1010 } 1011 1012 /* 1013 * Validate the queue action. 1014 * 1015 * @param[in] action 1016 * Pointer to the queue action. 1017 * @param[in] action_flags 1018 * Bit-fields that holds the actions detected until now. 1019 * @param[in] dev 1020 * Pointer to the Ethernet device structure. 1021 * @param[in] attr 1022 * Attributes of flow that includes this action. 1023 * @param[out] error 1024 * Pointer to error structure. 1025 * 1026 * @return 1027 * 0 on success, a negative errno value otherwise and rte_errno is set. 1028 */ 1029 int 1030 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1031 uint64_t action_flags, 1032 struct rte_eth_dev *dev, 1033 const struct rte_flow_attr *attr, 1034 struct rte_flow_error *error) 1035 { 1036 struct mlx5_priv *priv = dev->data->dev_private; 1037 const struct rte_flow_action_queue *queue = action->conf; 1038 1039 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1040 return rte_flow_error_set(error, EINVAL, 1041 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1042 "can't have 2 fate actions in" 1043 " same flow"); 1044 if (!priv->rxqs_n) 1045 return rte_flow_error_set(error, EINVAL, 1046 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1047 NULL, "No Rx queues configured"); 1048 if (queue->index >= priv->rxqs_n) 1049 return rte_flow_error_set(error, EINVAL, 1050 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1051 &queue->index, 1052 "queue index out of range"); 1053 if (!(*priv->rxqs)[queue->index]) 1054 return rte_flow_error_set(error, EINVAL, 1055 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1056 &queue->index, 1057 "queue is not configured"); 1058 if (attr->egress) 1059 return rte_flow_error_set(error, ENOTSUP, 1060 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1061 "queue action not supported for " 1062 "egress"); 1063 return 0; 1064 } 1065 1066 /* 1067 * Validate the rss action. 1068 * 1069 * @param[in] action 1070 * Pointer to the queue action. 1071 * @param[in] action_flags 1072 * Bit-fields that holds the actions detected until now. 1073 * @param[in] dev 1074 * Pointer to the Ethernet device structure. 1075 * @param[in] attr 1076 * Attributes of flow that includes this action. 1077 * @param[in] item_flags 1078 * Items that were detected. 1079 * @param[out] error 1080 * Pointer to error structure. 1081 * 1082 * @return 1083 * 0 on success, a negative errno value otherwise and rte_errno is set. 1084 */ 1085 int 1086 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1087 uint64_t action_flags, 1088 struct rte_eth_dev *dev, 1089 const struct rte_flow_attr *attr, 1090 uint64_t item_flags, 1091 struct rte_flow_error *error) 1092 { 1093 struct mlx5_priv *priv = dev->data->dev_private; 1094 const struct rte_flow_action_rss *rss = action->conf; 1095 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1096 unsigned int i; 1097 1098 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1099 return rte_flow_error_set(error, EINVAL, 1100 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1101 "can't have 2 fate actions" 1102 " in same flow"); 1103 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1104 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1105 return rte_flow_error_set(error, ENOTSUP, 1106 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1107 &rss->func, 1108 "RSS hash function not supported"); 1109 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1110 if (rss->level > 2) 1111 #else 1112 if (rss->level > 1) 1113 #endif 1114 return rte_flow_error_set(error, ENOTSUP, 1115 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1116 &rss->level, 1117 "tunnel RSS is not supported"); 1118 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1119 if (rss->key_len == 0 && rss->key != NULL) 1120 return rte_flow_error_set(error, ENOTSUP, 1121 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1122 &rss->key_len, 1123 "RSS hash key length 0"); 1124 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1125 return rte_flow_error_set(error, ENOTSUP, 1126 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1127 &rss->key_len, 1128 "RSS hash key too small"); 1129 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1130 return rte_flow_error_set(error, ENOTSUP, 1131 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1132 &rss->key_len, 1133 "RSS hash key too large"); 1134 if (rss->queue_num > priv->config.ind_table_max_size) 1135 return rte_flow_error_set(error, ENOTSUP, 1136 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1137 &rss->queue_num, 1138 "number of queues too large"); 1139 if (rss->types & MLX5_RSS_HF_MASK) 1140 return rte_flow_error_set(error, ENOTSUP, 1141 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1142 &rss->types, 1143 "some RSS protocols are not" 1144 " supported"); 1145 if (!priv->rxqs_n) 1146 return rte_flow_error_set(error, EINVAL, 1147 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1148 NULL, "No Rx queues configured"); 1149 if (!rss->queue_num) 1150 return rte_flow_error_set(error, EINVAL, 1151 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1152 NULL, "No queues configured"); 1153 for (i = 0; i != rss->queue_num; ++i) { 1154 if (rss->queue[i] >= priv->rxqs_n) 1155 return rte_flow_error_set 1156 (error, EINVAL, 1157 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1158 &rss->queue[i], "queue index out of range"); 1159 if (!(*priv->rxqs)[rss->queue[i]]) 1160 return rte_flow_error_set 1161 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1162 &rss->queue[i], "queue is not configured"); 1163 } 1164 if (attr->egress) 1165 return rte_flow_error_set(error, ENOTSUP, 1166 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1167 "rss action not supported for " 1168 "egress"); 1169 if (rss->level > 1 && !tunnel) 1170 return rte_flow_error_set(error, EINVAL, 1171 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1172 "inner RSS is not supported for " 1173 "non-tunnel flows"); 1174 return 0; 1175 } 1176 1177 /* 1178 * Validate the count action. 1179 * 1180 * @param[in] dev 1181 * Pointer to the Ethernet device structure. 1182 * @param[in] attr 1183 * Attributes of flow that includes this action. 1184 * @param[out] error 1185 * Pointer to error structure. 1186 * 1187 * @return 1188 * 0 on success, a negative errno value otherwise and rte_errno is set. 1189 */ 1190 int 1191 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1192 const struct rte_flow_attr *attr, 1193 struct rte_flow_error *error) 1194 { 1195 if (attr->egress) 1196 return rte_flow_error_set(error, ENOTSUP, 1197 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1198 "count action not supported for " 1199 "egress"); 1200 return 0; 1201 } 1202 1203 /** 1204 * Verify the @p attributes will be correctly understood by the NIC and store 1205 * them in the @p flow if everything is correct. 1206 * 1207 * @param[in] dev 1208 * Pointer to the Ethernet device structure. 1209 * @param[in] attributes 1210 * Pointer to flow attributes 1211 * @param[out] error 1212 * Pointer to error structure. 1213 * 1214 * @return 1215 * 0 on success, a negative errno value otherwise and rte_errno is set. 1216 */ 1217 int 1218 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1219 const struct rte_flow_attr *attributes, 1220 struct rte_flow_error *error) 1221 { 1222 struct mlx5_priv *priv = dev->data->dev_private; 1223 uint32_t priority_max = priv->config.flow_prio - 1; 1224 1225 if (attributes->group) 1226 return rte_flow_error_set(error, ENOTSUP, 1227 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1228 NULL, "groups is not supported"); 1229 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 1230 attributes->priority >= priority_max) 1231 return rte_flow_error_set(error, ENOTSUP, 1232 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1233 NULL, "priority out of range"); 1234 if (attributes->egress) 1235 return rte_flow_error_set(error, ENOTSUP, 1236 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1237 "egress is not supported"); 1238 if (attributes->transfer && !priv->config.dv_esw_en) 1239 return rte_flow_error_set(error, ENOTSUP, 1240 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1241 NULL, "transfer is not supported"); 1242 if (!attributes->ingress) 1243 return rte_flow_error_set(error, EINVAL, 1244 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1245 NULL, 1246 "ingress attribute is mandatory"); 1247 return 0; 1248 } 1249 1250 /** 1251 * Validate ICMP6 item. 1252 * 1253 * @param[in] item 1254 * Item specification. 1255 * @param[in] item_flags 1256 * Bit-fields that holds the items detected until now. 1257 * @param[out] error 1258 * Pointer to error structure. 1259 * 1260 * @return 1261 * 0 on success, a negative errno value otherwise and rte_errno is set. 1262 */ 1263 int 1264 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1265 uint64_t item_flags, 1266 uint8_t target_protocol, 1267 struct rte_flow_error *error) 1268 { 1269 const struct rte_flow_item_icmp6 *mask = item->mask; 1270 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1271 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1272 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1273 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1274 MLX5_FLOW_LAYER_OUTER_L4; 1275 int ret; 1276 1277 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1278 return rte_flow_error_set(error, EINVAL, 1279 RTE_FLOW_ERROR_TYPE_ITEM, item, 1280 "protocol filtering not compatible" 1281 " with ICMP6 layer"); 1282 if (!(item_flags & l3m)) 1283 return rte_flow_error_set(error, EINVAL, 1284 RTE_FLOW_ERROR_TYPE_ITEM, item, 1285 "IPv6 is mandatory to filter on" 1286 " ICMP6"); 1287 if (item_flags & l4m) 1288 return rte_flow_error_set(error, EINVAL, 1289 RTE_FLOW_ERROR_TYPE_ITEM, item, 1290 "multiple L4 layers not supported"); 1291 if (!mask) 1292 mask = &rte_flow_item_icmp6_mask; 1293 ret = mlx5_flow_item_acceptable 1294 (item, (const uint8_t *)mask, 1295 (const uint8_t *)&rte_flow_item_icmp6_mask, 1296 sizeof(struct rte_flow_item_icmp6), error); 1297 if (ret < 0) 1298 return ret; 1299 return 0; 1300 } 1301 1302 /** 1303 * Validate ICMP item. 1304 * 1305 * @param[in] item 1306 * Item specification. 1307 * @param[in] item_flags 1308 * Bit-fields that holds the items detected until now. 1309 * @param[out] error 1310 * Pointer to error structure. 1311 * 1312 * @return 1313 * 0 on success, a negative errno value otherwise and rte_errno is set. 1314 */ 1315 int 1316 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1317 uint64_t item_flags, 1318 uint8_t target_protocol, 1319 struct rte_flow_error *error) 1320 { 1321 const struct rte_flow_item_icmp *mask = item->mask; 1322 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1323 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1324 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1325 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1326 MLX5_FLOW_LAYER_OUTER_L4; 1327 int ret; 1328 1329 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1330 return rte_flow_error_set(error, EINVAL, 1331 RTE_FLOW_ERROR_TYPE_ITEM, item, 1332 "protocol filtering not compatible" 1333 " with ICMP layer"); 1334 if (!(item_flags & l3m)) 1335 return rte_flow_error_set(error, EINVAL, 1336 RTE_FLOW_ERROR_TYPE_ITEM, item, 1337 "IPv4 is mandatory to filter" 1338 " on ICMP"); 1339 if (item_flags & l4m) 1340 return rte_flow_error_set(error, EINVAL, 1341 RTE_FLOW_ERROR_TYPE_ITEM, item, 1342 "multiple L4 layers not supported"); 1343 if (!mask) 1344 mask = &rte_flow_item_icmp_mask; 1345 ret = mlx5_flow_item_acceptable 1346 (item, (const uint8_t *)mask, 1347 (const uint8_t *)&rte_flow_item_icmp_mask, 1348 sizeof(struct rte_flow_item_icmp), error); 1349 if (ret < 0) 1350 return ret; 1351 return 0; 1352 } 1353 1354 /** 1355 * Validate Ethernet item. 1356 * 1357 * @param[in] item 1358 * Item specification. 1359 * @param[in] item_flags 1360 * Bit-fields that holds the items detected until now. 1361 * @param[out] error 1362 * Pointer to error structure. 1363 * 1364 * @return 1365 * 0 on success, a negative errno value otherwise and rte_errno is set. 1366 */ 1367 int 1368 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1369 uint64_t item_flags, 1370 struct rte_flow_error *error) 1371 { 1372 const struct rte_flow_item_eth *mask = item->mask; 1373 const struct rte_flow_item_eth nic_mask = { 1374 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1375 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1376 .type = RTE_BE16(0xffff), 1377 }; 1378 int ret; 1379 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1380 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1381 MLX5_FLOW_LAYER_OUTER_L2; 1382 1383 if (item_flags & ethm) 1384 return rte_flow_error_set(error, ENOTSUP, 1385 RTE_FLOW_ERROR_TYPE_ITEM, item, 1386 "multiple L2 layers not supported"); 1387 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 1388 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 1389 return rte_flow_error_set(error, EINVAL, 1390 RTE_FLOW_ERROR_TYPE_ITEM, item, 1391 "L2 layer should not follow " 1392 "L3 layers"); 1393 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 1394 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 1395 return rte_flow_error_set(error, EINVAL, 1396 RTE_FLOW_ERROR_TYPE_ITEM, item, 1397 "L2 layer should not follow VLAN"); 1398 if (!mask) 1399 mask = &rte_flow_item_eth_mask; 1400 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1401 (const uint8_t *)&nic_mask, 1402 sizeof(struct rte_flow_item_eth), 1403 error); 1404 return ret; 1405 } 1406 1407 /** 1408 * Validate VLAN item. 1409 * 1410 * @param[in] item 1411 * Item specification. 1412 * @param[in] item_flags 1413 * Bit-fields that holds the items detected until now. 1414 * @param[in] dev 1415 * Ethernet device flow is being created on. 1416 * @param[out] error 1417 * Pointer to error structure. 1418 * 1419 * @return 1420 * 0 on success, a negative errno value otherwise and rte_errno is set. 1421 */ 1422 int 1423 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1424 uint64_t item_flags, 1425 struct rte_eth_dev *dev, 1426 struct rte_flow_error *error) 1427 { 1428 const struct rte_flow_item_vlan *spec = item->spec; 1429 const struct rte_flow_item_vlan *mask = item->mask; 1430 const struct rte_flow_item_vlan nic_mask = { 1431 .tci = RTE_BE16(UINT16_MAX), 1432 .inner_type = RTE_BE16(UINT16_MAX), 1433 }; 1434 uint16_t vlan_tag = 0; 1435 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1436 int ret; 1437 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1438 MLX5_FLOW_LAYER_INNER_L4) : 1439 (MLX5_FLOW_LAYER_OUTER_L3 | 1440 MLX5_FLOW_LAYER_OUTER_L4); 1441 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1442 MLX5_FLOW_LAYER_OUTER_VLAN; 1443 1444 if (item_flags & vlanm) 1445 return rte_flow_error_set(error, EINVAL, 1446 RTE_FLOW_ERROR_TYPE_ITEM, item, 1447 "multiple VLAN layers not supported"); 1448 else if ((item_flags & l34m) != 0) 1449 return rte_flow_error_set(error, EINVAL, 1450 RTE_FLOW_ERROR_TYPE_ITEM, item, 1451 "VLAN cannot follow L3/L4 layer"); 1452 if (!mask) 1453 mask = &rte_flow_item_vlan_mask; 1454 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1455 (const uint8_t *)&nic_mask, 1456 sizeof(struct rte_flow_item_vlan), 1457 error); 1458 if (ret) 1459 return ret; 1460 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 1461 struct mlx5_priv *priv = dev->data->dev_private; 1462 1463 if (priv->vmwa_context) { 1464 /* 1465 * Non-NULL context means we have a virtual machine 1466 * and SR-IOV enabled, we have to create VLAN interface 1467 * to make hypervisor to setup E-Switch vport 1468 * context correctly. We avoid creating the multiple 1469 * VLAN interfaces, so we cannot support VLAN tag mask. 1470 */ 1471 return rte_flow_error_set(error, EINVAL, 1472 RTE_FLOW_ERROR_TYPE_ITEM, 1473 item, 1474 "VLAN tag mask is not" 1475 " supported in virtual" 1476 " environment"); 1477 } 1478 } 1479 if (spec) { 1480 vlan_tag = spec->tci; 1481 vlan_tag &= mask->tci; 1482 } 1483 /* 1484 * From verbs perspective an empty VLAN is equivalent 1485 * to a packet without VLAN layer. 1486 */ 1487 if (!vlan_tag) 1488 return rte_flow_error_set(error, EINVAL, 1489 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1490 item->spec, 1491 "VLAN cannot be empty"); 1492 return 0; 1493 } 1494 1495 /** 1496 * Validate IPV4 item. 1497 * 1498 * @param[in] item 1499 * Item specification. 1500 * @param[in] item_flags 1501 * Bit-fields that holds the items detected until now. 1502 * @param[in] acc_mask 1503 * Acceptable mask, if NULL default internal default mask 1504 * will be used to check whether item fields are supported. 1505 * @param[out] error 1506 * Pointer to error structure. 1507 * 1508 * @return 1509 * 0 on success, a negative errno value otherwise and rte_errno is set. 1510 */ 1511 int 1512 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 1513 uint64_t item_flags, 1514 uint64_t last_item, 1515 uint16_t ether_type, 1516 const struct rte_flow_item_ipv4 *acc_mask, 1517 struct rte_flow_error *error) 1518 { 1519 const struct rte_flow_item_ipv4 *mask = item->mask; 1520 const struct rte_flow_item_ipv4 *spec = item->spec; 1521 const struct rte_flow_item_ipv4 nic_mask = { 1522 .hdr = { 1523 .src_addr = RTE_BE32(0xffffffff), 1524 .dst_addr = RTE_BE32(0xffffffff), 1525 .type_of_service = 0xff, 1526 .next_proto_id = 0xff, 1527 }, 1528 }; 1529 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1530 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1531 MLX5_FLOW_LAYER_OUTER_L3; 1532 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1533 MLX5_FLOW_LAYER_OUTER_L4; 1534 int ret; 1535 uint8_t next_proto = 0xFF; 1536 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 1537 MLX5_FLOW_LAYER_OUTER_VLAN | 1538 MLX5_FLOW_LAYER_INNER_VLAN); 1539 1540 if ((last_item & l2_vlan) && ether_type && 1541 ether_type != RTE_ETHER_TYPE_IPV4) 1542 return rte_flow_error_set(error, EINVAL, 1543 RTE_FLOW_ERROR_TYPE_ITEM, item, 1544 "IPv4 cannot follow L2/VLAN layer " 1545 "which ether type is not IPv4"); 1546 if (item_flags & MLX5_FLOW_LAYER_IPIP) { 1547 if (mask && spec) 1548 next_proto = mask->hdr.next_proto_id & 1549 spec->hdr.next_proto_id; 1550 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 1551 return rte_flow_error_set(error, EINVAL, 1552 RTE_FLOW_ERROR_TYPE_ITEM, 1553 item, 1554 "multiple tunnel " 1555 "not supported"); 1556 } 1557 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 1558 return rte_flow_error_set(error, EINVAL, 1559 RTE_FLOW_ERROR_TYPE_ITEM, item, 1560 "wrong tunnel type - IPv6 specified " 1561 "but IPv4 item provided"); 1562 if (item_flags & l3m) 1563 return rte_flow_error_set(error, ENOTSUP, 1564 RTE_FLOW_ERROR_TYPE_ITEM, item, 1565 "multiple L3 layers not supported"); 1566 else if (item_flags & l4m) 1567 return rte_flow_error_set(error, EINVAL, 1568 RTE_FLOW_ERROR_TYPE_ITEM, item, 1569 "L3 cannot follow an L4 layer."); 1570 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 1571 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 1572 return rte_flow_error_set(error, EINVAL, 1573 RTE_FLOW_ERROR_TYPE_ITEM, item, 1574 "L3 cannot follow an NVGRE layer."); 1575 if (!mask) 1576 mask = &rte_flow_item_ipv4_mask; 1577 else if (mask->hdr.next_proto_id != 0 && 1578 mask->hdr.next_proto_id != 0xff) 1579 return rte_flow_error_set(error, EINVAL, 1580 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 1581 "partial mask is not supported" 1582 " for protocol"); 1583 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1584 acc_mask ? (const uint8_t *)acc_mask 1585 : (const uint8_t *)&nic_mask, 1586 sizeof(struct rte_flow_item_ipv4), 1587 error); 1588 if (ret < 0) 1589 return ret; 1590 return 0; 1591 } 1592 1593 /** 1594 * Validate IPV6 item. 1595 * 1596 * @param[in] item 1597 * Item specification. 1598 * @param[in] item_flags 1599 * Bit-fields that holds the items detected until now. 1600 * @param[in] acc_mask 1601 * Acceptable mask, if NULL default internal default mask 1602 * will be used to check whether item fields are supported. 1603 * @param[out] error 1604 * Pointer to error structure. 1605 * 1606 * @return 1607 * 0 on success, a negative errno value otherwise and rte_errno is set. 1608 */ 1609 int 1610 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 1611 uint64_t item_flags, 1612 uint64_t last_item, 1613 uint16_t ether_type, 1614 const struct rte_flow_item_ipv6 *acc_mask, 1615 struct rte_flow_error *error) 1616 { 1617 const struct rte_flow_item_ipv6 *mask = item->mask; 1618 const struct rte_flow_item_ipv6 *spec = item->spec; 1619 const struct rte_flow_item_ipv6 nic_mask = { 1620 .hdr = { 1621 .src_addr = 1622 "\xff\xff\xff\xff\xff\xff\xff\xff" 1623 "\xff\xff\xff\xff\xff\xff\xff\xff", 1624 .dst_addr = 1625 "\xff\xff\xff\xff\xff\xff\xff\xff" 1626 "\xff\xff\xff\xff\xff\xff\xff\xff", 1627 .vtc_flow = RTE_BE32(0xffffffff), 1628 .proto = 0xff, 1629 .hop_limits = 0xff, 1630 }, 1631 }; 1632 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1633 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1634 MLX5_FLOW_LAYER_OUTER_L3; 1635 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1636 MLX5_FLOW_LAYER_OUTER_L4; 1637 int ret; 1638 uint8_t next_proto = 0xFF; 1639 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 1640 MLX5_FLOW_LAYER_OUTER_VLAN | 1641 MLX5_FLOW_LAYER_INNER_VLAN); 1642 1643 if ((last_item & l2_vlan) && ether_type && 1644 ether_type != RTE_ETHER_TYPE_IPV6) 1645 return rte_flow_error_set(error, EINVAL, 1646 RTE_FLOW_ERROR_TYPE_ITEM, item, 1647 "IPv6 cannot follow L2/VLAN layer " 1648 "which ether type is not IPv6"); 1649 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) { 1650 if (mask && spec) 1651 next_proto = mask->hdr.proto & spec->hdr.proto; 1652 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 1653 return rte_flow_error_set(error, EINVAL, 1654 RTE_FLOW_ERROR_TYPE_ITEM, 1655 item, 1656 "multiple tunnel " 1657 "not supported"); 1658 } 1659 if (item_flags & MLX5_FLOW_LAYER_IPIP) 1660 return rte_flow_error_set(error, EINVAL, 1661 RTE_FLOW_ERROR_TYPE_ITEM, item, 1662 "wrong tunnel type - IPv4 specified " 1663 "but IPv6 item provided"); 1664 if (item_flags & l3m) 1665 return rte_flow_error_set(error, ENOTSUP, 1666 RTE_FLOW_ERROR_TYPE_ITEM, item, 1667 "multiple L3 layers not supported"); 1668 else if (item_flags & l4m) 1669 return rte_flow_error_set(error, EINVAL, 1670 RTE_FLOW_ERROR_TYPE_ITEM, item, 1671 "L3 cannot follow an L4 layer."); 1672 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 1673 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 1674 return rte_flow_error_set(error, EINVAL, 1675 RTE_FLOW_ERROR_TYPE_ITEM, item, 1676 "L3 cannot follow an NVGRE layer."); 1677 if (!mask) 1678 mask = &rte_flow_item_ipv6_mask; 1679 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1680 acc_mask ? (const uint8_t *)acc_mask 1681 : (const uint8_t *)&nic_mask, 1682 sizeof(struct rte_flow_item_ipv6), 1683 error); 1684 if (ret < 0) 1685 return ret; 1686 return 0; 1687 } 1688 1689 /** 1690 * Validate UDP item. 1691 * 1692 * @param[in] item 1693 * Item specification. 1694 * @param[in] item_flags 1695 * Bit-fields that holds the items detected until now. 1696 * @param[in] target_protocol 1697 * The next protocol in the previous item. 1698 * @param[in] flow_mask 1699 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 1700 * @param[out] error 1701 * Pointer to error structure. 1702 * 1703 * @return 1704 * 0 on success, a negative errno value otherwise and rte_errno is set. 1705 */ 1706 int 1707 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 1708 uint64_t item_flags, 1709 uint8_t target_protocol, 1710 struct rte_flow_error *error) 1711 { 1712 const struct rte_flow_item_udp *mask = item->mask; 1713 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1714 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1715 MLX5_FLOW_LAYER_OUTER_L3; 1716 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1717 MLX5_FLOW_LAYER_OUTER_L4; 1718 int ret; 1719 1720 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 1721 return rte_flow_error_set(error, EINVAL, 1722 RTE_FLOW_ERROR_TYPE_ITEM, item, 1723 "protocol filtering not compatible" 1724 " with UDP layer"); 1725 if (!(item_flags & l3m)) 1726 return rte_flow_error_set(error, EINVAL, 1727 RTE_FLOW_ERROR_TYPE_ITEM, item, 1728 "L3 is mandatory to filter on L4"); 1729 if (item_flags & l4m) 1730 return rte_flow_error_set(error, EINVAL, 1731 RTE_FLOW_ERROR_TYPE_ITEM, item, 1732 "multiple L4 layers not supported"); 1733 if (!mask) 1734 mask = &rte_flow_item_udp_mask; 1735 ret = mlx5_flow_item_acceptable 1736 (item, (const uint8_t *)mask, 1737 (const uint8_t *)&rte_flow_item_udp_mask, 1738 sizeof(struct rte_flow_item_udp), error); 1739 if (ret < 0) 1740 return ret; 1741 return 0; 1742 } 1743 1744 /** 1745 * Validate TCP item. 1746 * 1747 * @param[in] item 1748 * Item specification. 1749 * @param[in] item_flags 1750 * Bit-fields that holds the items detected until now. 1751 * @param[in] target_protocol 1752 * The next protocol in the previous item. 1753 * @param[out] error 1754 * Pointer to error structure. 1755 * 1756 * @return 1757 * 0 on success, a negative errno value otherwise and rte_errno is set. 1758 */ 1759 int 1760 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 1761 uint64_t item_flags, 1762 uint8_t target_protocol, 1763 const struct rte_flow_item_tcp *flow_mask, 1764 struct rte_flow_error *error) 1765 { 1766 const struct rte_flow_item_tcp *mask = item->mask; 1767 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1768 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1769 MLX5_FLOW_LAYER_OUTER_L3; 1770 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1771 MLX5_FLOW_LAYER_OUTER_L4; 1772 int ret; 1773 1774 assert(flow_mask); 1775 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 1776 return rte_flow_error_set(error, EINVAL, 1777 RTE_FLOW_ERROR_TYPE_ITEM, item, 1778 "protocol filtering not compatible" 1779 " with TCP layer"); 1780 if (!(item_flags & l3m)) 1781 return rte_flow_error_set(error, EINVAL, 1782 RTE_FLOW_ERROR_TYPE_ITEM, item, 1783 "L3 is mandatory to filter on L4"); 1784 if (item_flags & l4m) 1785 return rte_flow_error_set(error, EINVAL, 1786 RTE_FLOW_ERROR_TYPE_ITEM, item, 1787 "multiple L4 layers not supported"); 1788 if (!mask) 1789 mask = &rte_flow_item_tcp_mask; 1790 ret = mlx5_flow_item_acceptable 1791 (item, (const uint8_t *)mask, 1792 (const uint8_t *)flow_mask, 1793 sizeof(struct rte_flow_item_tcp), error); 1794 if (ret < 0) 1795 return ret; 1796 return 0; 1797 } 1798 1799 /** 1800 * Validate VXLAN item. 1801 * 1802 * @param[in] item 1803 * Item specification. 1804 * @param[in] item_flags 1805 * Bit-fields that holds the items detected until now. 1806 * @param[in] target_protocol 1807 * The next protocol in the previous item. 1808 * @param[out] error 1809 * Pointer to error structure. 1810 * 1811 * @return 1812 * 0 on success, a negative errno value otherwise and rte_errno is set. 1813 */ 1814 int 1815 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 1816 uint64_t item_flags, 1817 struct rte_flow_error *error) 1818 { 1819 const struct rte_flow_item_vxlan *spec = item->spec; 1820 const struct rte_flow_item_vxlan *mask = item->mask; 1821 int ret; 1822 union vni { 1823 uint32_t vlan_id; 1824 uint8_t vni[4]; 1825 } id = { .vlan_id = 0, }; 1826 uint32_t vlan_id = 0; 1827 1828 1829 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1830 return rte_flow_error_set(error, ENOTSUP, 1831 RTE_FLOW_ERROR_TYPE_ITEM, item, 1832 "multiple tunnel layers not" 1833 " supported"); 1834 /* 1835 * Verify only UDPv4 is present as defined in 1836 * https://tools.ietf.org/html/rfc7348 1837 */ 1838 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1839 return rte_flow_error_set(error, EINVAL, 1840 RTE_FLOW_ERROR_TYPE_ITEM, item, 1841 "no outer UDP layer found"); 1842 if (!mask) 1843 mask = &rte_flow_item_vxlan_mask; 1844 ret = mlx5_flow_item_acceptable 1845 (item, (const uint8_t *)mask, 1846 (const uint8_t *)&rte_flow_item_vxlan_mask, 1847 sizeof(struct rte_flow_item_vxlan), 1848 error); 1849 if (ret < 0) 1850 return ret; 1851 if (spec) { 1852 memcpy(&id.vni[1], spec->vni, 3); 1853 vlan_id = id.vlan_id; 1854 memcpy(&id.vni[1], mask->vni, 3); 1855 vlan_id &= id.vlan_id; 1856 } 1857 /* 1858 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if 1859 * only this layer is defined in the Verbs specification it is 1860 * interpreted as wildcard and all packets will match this 1861 * rule, if it follows a full stack layer (ex: eth / ipv4 / 1862 * udp), all packets matching the layers before will also 1863 * match this rule. To avoid such situation, VNI 0 is 1864 * currently refused. 1865 */ 1866 if (!vlan_id) 1867 return rte_flow_error_set(error, ENOTSUP, 1868 RTE_FLOW_ERROR_TYPE_ITEM, item, 1869 "VXLAN vni cannot be 0"); 1870 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1871 return rte_flow_error_set(error, ENOTSUP, 1872 RTE_FLOW_ERROR_TYPE_ITEM, item, 1873 "VXLAN tunnel must be fully defined"); 1874 return 0; 1875 } 1876 1877 /** 1878 * Validate VXLAN_GPE item. 1879 * 1880 * @param[in] item 1881 * Item specification. 1882 * @param[in] item_flags 1883 * Bit-fields that holds the items detected until now. 1884 * @param[in] priv 1885 * Pointer to the private data structure. 1886 * @param[in] target_protocol 1887 * The next protocol in the previous item. 1888 * @param[out] error 1889 * Pointer to error structure. 1890 * 1891 * @return 1892 * 0 on success, a negative errno value otherwise and rte_errno is set. 1893 */ 1894 int 1895 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 1896 uint64_t item_flags, 1897 struct rte_eth_dev *dev, 1898 struct rte_flow_error *error) 1899 { 1900 struct mlx5_priv *priv = dev->data->dev_private; 1901 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 1902 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 1903 int ret; 1904 union vni { 1905 uint32_t vlan_id; 1906 uint8_t vni[4]; 1907 } id = { .vlan_id = 0, }; 1908 uint32_t vlan_id = 0; 1909 1910 if (!priv->config.l3_vxlan_en) 1911 return rte_flow_error_set(error, ENOTSUP, 1912 RTE_FLOW_ERROR_TYPE_ITEM, item, 1913 "L3 VXLAN is not enabled by device" 1914 " parameter and/or not configured in" 1915 " firmware"); 1916 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1917 return rte_flow_error_set(error, ENOTSUP, 1918 RTE_FLOW_ERROR_TYPE_ITEM, item, 1919 "multiple tunnel layers not" 1920 " supported"); 1921 /* 1922 * Verify only UDPv4 is present as defined in 1923 * https://tools.ietf.org/html/rfc7348 1924 */ 1925 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1926 return rte_flow_error_set(error, EINVAL, 1927 RTE_FLOW_ERROR_TYPE_ITEM, item, 1928 "no outer UDP layer found"); 1929 if (!mask) 1930 mask = &rte_flow_item_vxlan_gpe_mask; 1931 ret = mlx5_flow_item_acceptable 1932 (item, (const uint8_t *)mask, 1933 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 1934 sizeof(struct rte_flow_item_vxlan_gpe), 1935 error); 1936 if (ret < 0) 1937 return ret; 1938 if (spec) { 1939 if (spec->protocol) 1940 return rte_flow_error_set(error, ENOTSUP, 1941 RTE_FLOW_ERROR_TYPE_ITEM, 1942 item, 1943 "VxLAN-GPE protocol" 1944 " not supported"); 1945 memcpy(&id.vni[1], spec->vni, 3); 1946 vlan_id = id.vlan_id; 1947 memcpy(&id.vni[1], mask->vni, 3); 1948 vlan_id &= id.vlan_id; 1949 } 1950 /* 1951 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this 1952 * layer is defined in the Verbs specification it is interpreted as 1953 * wildcard and all packets will match this rule, if it follows a full 1954 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers 1955 * before will also match this rule. To avoid such situation, VNI 0 1956 * is currently refused. 1957 */ 1958 if (!vlan_id) 1959 return rte_flow_error_set(error, ENOTSUP, 1960 RTE_FLOW_ERROR_TYPE_ITEM, item, 1961 "VXLAN-GPE vni cannot be 0"); 1962 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1963 return rte_flow_error_set(error, ENOTSUP, 1964 RTE_FLOW_ERROR_TYPE_ITEM, item, 1965 "VXLAN-GPE tunnel must be fully" 1966 " defined"); 1967 return 0; 1968 } 1969 /** 1970 * Validate GRE Key item. 1971 * 1972 * @param[in] item 1973 * Item specification. 1974 * @param[in] item_flags 1975 * Bit flags to mark detected items. 1976 * @param[in] gre_item 1977 * Pointer to gre_item 1978 * @param[out] error 1979 * Pointer to error structure. 1980 * 1981 * @return 1982 * 0 on success, a negative errno value otherwise and rte_errno is set. 1983 */ 1984 int 1985 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 1986 uint64_t item_flags, 1987 const struct rte_flow_item *gre_item, 1988 struct rte_flow_error *error) 1989 { 1990 const rte_be32_t *mask = item->mask; 1991 int ret = 0; 1992 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 1993 const struct rte_flow_item_gre *gre_spec = gre_item->spec; 1994 const struct rte_flow_item_gre *gre_mask = gre_item->mask; 1995 1996 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 1997 return rte_flow_error_set(error, ENOTSUP, 1998 RTE_FLOW_ERROR_TYPE_ITEM, item, 1999 "Multiple GRE key not support"); 2000 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2001 return rte_flow_error_set(error, ENOTSUP, 2002 RTE_FLOW_ERROR_TYPE_ITEM, item, 2003 "No preceding GRE header"); 2004 if (item_flags & MLX5_FLOW_LAYER_INNER) 2005 return rte_flow_error_set(error, ENOTSUP, 2006 RTE_FLOW_ERROR_TYPE_ITEM, item, 2007 "GRE key following a wrong item"); 2008 if (!gre_mask) 2009 gre_mask = &rte_flow_item_gre_mask; 2010 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2011 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2012 return rte_flow_error_set(error, EINVAL, 2013 RTE_FLOW_ERROR_TYPE_ITEM, item, 2014 "Key bit must be on"); 2015 2016 if (!mask) 2017 mask = &gre_key_default_mask; 2018 ret = mlx5_flow_item_acceptable 2019 (item, (const uint8_t *)mask, 2020 (const uint8_t *)&gre_key_default_mask, 2021 sizeof(rte_be32_t), error); 2022 return ret; 2023 } 2024 2025 /** 2026 * Validate GRE item. 2027 * 2028 * @param[in] item 2029 * Item specification. 2030 * @param[in] item_flags 2031 * Bit flags to mark detected items. 2032 * @param[in] target_protocol 2033 * The next protocol in the previous item. 2034 * @param[out] error 2035 * Pointer to error structure. 2036 * 2037 * @return 2038 * 0 on success, a negative errno value otherwise and rte_errno is set. 2039 */ 2040 int 2041 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2042 uint64_t item_flags, 2043 uint8_t target_protocol, 2044 struct rte_flow_error *error) 2045 { 2046 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2047 const struct rte_flow_item_gre *mask = item->mask; 2048 int ret; 2049 const struct rte_flow_item_gre nic_mask = { 2050 .c_rsvd0_ver = RTE_BE16(0xB000), 2051 .protocol = RTE_BE16(UINT16_MAX), 2052 }; 2053 2054 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2055 return rte_flow_error_set(error, EINVAL, 2056 RTE_FLOW_ERROR_TYPE_ITEM, item, 2057 "protocol filtering not compatible" 2058 " with this GRE layer"); 2059 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2060 return rte_flow_error_set(error, ENOTSUP, 2061 RTE_FLOW_ERROR_TYPE_ITEM, item, 2062 "multiple tunnel layers not" 2063 " supported"); 2064 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2065 return rte_flow_error_set(error, ENOTSUP, 2066 RTE_FLOW_ERROR_TYPE_ITEM, item, 2067 "L3 Layer is missing"); 2068 if (!mask) 2069 mask = &rte_flow_item_gre_mask; 2070 ret = mlx5_flow_item_acceptable 2071 (item, (const uint8_t *)mask, 2072 (const uint8_t *)&nic_mask, 2073 sizeof(struct rte_flow_item_gre), error); 2074 if (ret < 0) 2075 return ret; 2076 #ifndef HAVE_MLX5DV_DR 2077 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2078 if (spec && (spec->protocol & mask->protocol)) 2079 return rte_flow_error_set(error, ENOTSUP, 2080 RTE_FLOW_ERROR_TYPE_ITEM, item, 2081 "without MPLS support the" 2082 " specification cannot be used for" 2083 " filtering"); 2084 #endif 2085 #endif 2086 return 0; 2087 } 2088 2089 /** 2090 * Validate Geneve item. 2091 * 2092 * @param[in] item 2093 * Item specification. 2094 * @param[in] itemFlags 2095 * Bit-fields that holds the items detected until now. 2096 * @param[in] enPriv 2097 * Pointer to the private data structure. 2098 * @param[out] error 2099 * Pointer to error structure. 2100 * 2101 * @return 2102 * 0 on success, a negative errno value otherwise and rte_errno is set. 2103 */ 2104 2105 int 2106 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2107 uint64_t item_flags, 2108 struct rte_eth_dev *dev, 2109 struct rte_flow_error *error) 2110 { 2111 struct mlx5_priv *priv = dev->data->dev_private; 2112 const struct rte_flow_item_geneve *spec = item->spec; 2113 const struct rte_flow_item_geneve *mask = item->mask; 2114 int ret; 2115 uint16_t gbhdr; 2116 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2117 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2118 const struct rte_flow_item_geneve nic_mask = { 2119 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2120 .vni = "\xff\xff\xff", 2121 .protocol = RTE_BE16(UINT16_MAX), 2122 }; 2123 2124 if (!(priv->config.hca_attr.flex_parser_protocols & 2125 MLX5_HCA_FLEX_GENEVE_ENABLED) || 2126 !priv->config.hca_attr.tunnel_stateless_geneve_rx) 2127 return rte_flow_error_set(error, ENOTSUP, 2128 RTE_FLOW_ERROR_TYPE_ITEM, item, 2129 "L3 Geneve is not enabled by device" 2130 " parameter and/or not configured in" 2131 " firmware"); 2132 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2133 return rte_flow_error_set(error, ENOTSUP, 2134 RTE_FLOW_ERROR_TYPE_ITEM, item, 2135 "multiple tunnel layers not" 2136 " supported"); 2137 /* 2138 * Verify only UDPv4 is present as defined in 2139 * https://tools.ietf.org/html/rfc7348 2140 */ 2141 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2142 return rte_flow_error_set(error, EINVAL, 2143 RTE_FLOW_ERROR_TYPE_ITEM, item, 2144 "no outer UDP layer found"); 2145 if (!mask) 2146 mask = &rte_flow_item_geneve_mask; 2147 ret = mlx5_flow_item_acceptable 2148 (item, (const uint8_t *)mask, 2149 (const uint8_t *)&nic_mask, 2150 sizeof(struct rte_flow_item_geneve), error); 2151 if (ret) 2152 return ret; 2153 if (spec) { 2154 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2155 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2156 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2157 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2158 return rte_flow_error_set(error, ENOTSUP, 2159 RTE_FLOW_ERROR_TYPE_ITEM, 2160 item, 2161 "Geneve protocol unsupported" 2162 " fields are being used"); 2163 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2164 return rte_flow_error_set 2165 (error, ENOTSUP, 2166 RTE_FLOW_ERROR_TYPE_ITEM, 2167 item, 2168 "Unsupported Geneve options length"); 2169 } 2170 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2171 return rte_flow_error_set 2172 (error, ENOTSUP, 2173 RTE_FLOW_ERROR_TYPE_ITEM, item, 2174 "Geneve tunnel must be fully defined"); 2175 return 0; 2176 } 2177 2178 /** 2179 * Validate MPLS item. 2180 * 2181 * @param[in] dev 2182 * Pointer to the rte_eth_dev structure. 2183 * @param[in] item 2184 * Item specification. 2185 * @param[in] item_flags 2186 * Bit-fields that holds the items detected until now. 2187 * @param[in] prev_layer 2188 * The protocol layer indicated in previous item. 2189 * @param[out] error 2190 * Pointer to error structure. 2191 * 2192 * @return 2193 * 0 on success, a negative errno value otherwise and rte_errno is set. 2194 */ 2195 int 2196 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 2197 const struct rte_flow_item *item __rte_unused, 2198 uint64_t item_flags __rte_unused, 2199 uint64_t prev_layer __rte_unused, 2200 struct rte_flow_error *error) 2201 { 2202 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 2203 const struct rte_flow_item_mpls *mask = item->mask; 2204 struct mlx5_priv *priv = dev->data->dev_private; 2205 int ret; 2206 2207 if (!priv->config.mpls_en) 2208 return rte_flow_error_set(error, ENOTSUP, 2209 RTE_FLOW_ERROR_TYPE_ITEM, item, 2210 "MPLS not supported or" 2211 " disabled in firmware" 2212 " configuration."); 2213 /* MPLS over IP, UDP, GRE is allowed */ 2214 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 | 2215 MLX5_FLOW_LAYER_OUTER_L4_UDP | 2216 MLX5_FLOW_LAYER_GRE))) 2217 return rte_flow_error_set(error, EINVAL, 2218 RTE_FLOW_ERROR_TYPE_ITEM, item, 2219 "protocol filtering not compatible" 2220 " with MPLS layer"); 2221 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 2222 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 2223 !(item_flags & MLX5_FLOW_LAYER_GRE)) 2224 return rte_flow_error_set(error, ENOTSUP, 2225 RTE_FLOW_ERROR_TYPE_ITEM, item, 2226 "multiple tunnel layers not" 2227 " supported"); 2228 if (!mask) 2229 mask = &rte_flow_item_mpls_mask; 2230 ret = mlx5_flow_item_acceptable 2231 (item, (const uint8_t *)mask, 2232 (const uint8_t *)&rte_flow_item_mpls_mask, 2233 sizeof(struct rte_flow_item_mpls), error); 2234 if (ret < 0) 2235 return ret; 2236 return 0; 2237 #endif 2238 return rte_flow_error_set(error, ENOTSUP, 2239 RTE_FLOW_ERROR_TYPE_ITEM, item, 2240 "MPLS is not supported by Verbs, please" 2241 " update."); 2242 } 2243 2244 /** 2245 * Validate NVGRE item. 2246 * 2247 * @param[in] item 2248 * Item specification. 2249 * @param[in] item_flags 2250 * Bit flags to mark detected items. 2251 * @param[in] target_protocol 2252 * The next protocol in the previous item. 2253 * @param[out] error 2254 * Pointer to error structure. 2255 * 2256 * @return 2257 * 0 on success, a negative errno value otherwise and rte_errno is set. 2258 */ 2259 int 2260 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 2261 uint64_t item_flags, 2262 uint8_t target_protocol, 2263 struct rte_flow_error *error) 2264 { 2265 const struct rte_flow_item_nvgre *mask = item->mask; 2266 int ret; 2267 2268 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2269 return rte_flow_error_set(error, EINVAL, 2270 RTE_FLOW_ERROR_TYPE_ITEM, item, 2271 "protocol filtering not compatible" 2272 " with this GRE layer"); 2273 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2274 return rte_flow_error_set(error, ENOTSUP, 2275 RTE_FLOW_ERROR_TYPE_ITEM, item, 2276 "multiple tunnel layers not" 2277 " supported"); 2278 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2279 return rte_flow_error_set(error, ENOTSUP, 2280 RTE_FLOW_ERROR_TYPE_ITEM, item, 2281 "L3 Layer is missing"); 2282 if (!mask) 2283 mask = &rte_flow_item_nvgre_mask; 2284 ret = mlx5_flow_item_acceptable 2285 (item, (const uint8_t *)mask, 2286 (const uint8_t *)&rte_flow_item_nvgre_mask, 2287 sizeof(struct rte_flow_item_nvgre), error); 2288 if (ret < 0) 2289 return ret; 2290 return 0; 2291 } 2292 2293 /* Allocate unique ID for the split Q/RSS subflows. */ 2294 static uint32_t 2295 flow_qrss_get_id(struct rte_eth_dev *dev) 2296 { 2297 struct mlx5_priv *priv = dev->data->dev_private; 2298 uint32_t qrss_id, ret; 2299 2300 ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id); 2301 if (ret) 2302 return 0; 2303 assert(qrss_id); 2304 return qrss_id; 2305 } 2306 2307 /* Free unique ID for the split Q/RSS subflows. */ 2308 static void 2309 flow_qrss_free_id(struct rte_eth_dev *dev, uint32_t qrss_id) 2310 { 2311 struct mlx5_priv *priv = dev->data->dev_private; 2312 2313 if (qrss_id) 2314 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id); 2315 } 2316 2317 /** 2318 * Release resource related QUEUE/RSS action split. 2319 * 2320 * @param dev 2321 * Pointer to Ethernet device. 2322 * @param flow 2323 * Flow to release id's from. 2324 */ 2325 static void 2326 flow_mreg_split_qrss_release(struct rte_eth_dev *dev, 2327 struct rte_flow *flow) 2328 { 2329 struct mlx5_flow *dev_flow; 2330 2331 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 2332 if (dev_flow->qrss_id) 2333 flow_qrss_free_id(dev, dev_flow->qrss_id); 2334 } 2335 2336 static int 2337 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 2338 const struct rte_flow_attr *attr __rte_unused, 2339 const struct rte_flow_item items[] __rte_unused, 2340 const struct rte_flow_action actions[] __rte_unused, 2341 bool external __rte_unused, 2342 struct rte_flow_error *error) 2343 { 2344 return rte_flow_error_set(error, ENOTSUP, 2345 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2346 } 2347 2348 static struct mlx5_flow * 2349 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused, 2350 const struct rte_flow_item items[] __rte_unused, 2351 const struct rte_flow_action actions[] __rte_unused, 2352 struct rte_flow_error *error) 2353 { 2354 rte_flow_error_set(error, ENOTSUP, 2355 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2356 return NULL; 2357 } 2358 2359 static int 2360 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 2361 struct mlx5_flow *dev_flow __rte_unused, 2362 const struct rte_flow_attr *attr __rte_unused, 2363 const struct rte_flow_item items[] __rte_unused, 2364 const struct rte_flow_action actions[] __rte_unused, 2365 struct rte_flow_error *error) 2366 { 2367 return rte_flow_error_set(error, ENOTSUP, 2368 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2369 } 2370 2371 static int 2372 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 2373 struct rte_flow *flow __rte_unused, 2374 struct rte_flow_error *error) 2375 { 2376 return rte_flow_error_set(error, ENOTSUP, 2377 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2378 } 2379 2380 static void 2381 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 2382 struct rte_flow *flow __rte_unused) 2383 { 2384 } 2385 2386 static void 2387 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 2388 struct rte_flow *flow __rte_unused) 2389 { 2390 } 2391 2392 static int 2393 flow_null_query(struct rte_eth_dev *dev __rte_unused, 2394 struct rte_flow *flow __rte_unused, 2395 const struct rte_flow_action *actions __rte_unused, 2396 void *data __rte_unused, 2397 struct rte_flow_error *error) 2398 { 2399 return rte_flow_error_set(error, ENOTSUP, 2400 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2401 } 2402 2403 /* Void driver to protect from null pointer reference. */ 2404 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 2405 .validate = flow_null_validate, 2406 .prepare = flow_null_prepare, 2407 .translate = flow_null_translate, 2408 .apply = flow_null_apply, 2409 .remove = flow_null_remove, 2410 .destroy = flow_null_destroy, 2411 .query = flow_null_query, 2412 }; 2413 2414 /** 2415 * Select flow driver type according to flow attributes and device 2416 * configuration. 2417 * 2418 * @param[in] dev 2419 * Pointer to the dev structure. 2420 * @param[in] attr 2421 * Pointer to the flow attributes. 2422 * 2423 * @return 2424 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 2425 */ 2426 static enum mlx5_flow_drv_type 2427 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 2428 { 2429 struct mlx5_priv *priv = dev->data->dev_private; 2430 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX; 2431 2432 if (attr->transfer && priv->config.dv_esw_en) 2433 type = MLX5_FLOW_TYPE_DV; 2434 if (!attr->transfer) 2435 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 2436 MLX5_FLOW_TYPE_VERBS; 2437 return type; 2438 } 2439 2440 #define flow_get_drv_ops(type) flow_drv_ops[type] 2441 2442 /** 2443 * Flow driver validation API. This abstracts calling driver specific functions. 2444 * The type of flow driver is determined according to flow attributes. 2445 * 2446 * @param[in] dev 2447 * Pointer to the dev structure. 2448 * @param[in] attr 2449 * Pointer to the flow attributes. 2450 * @param[in] items 2451 * Pointer to the list of items. 2452 * @param[in] actions 2453 * Pointer to the list of actions. 2454 * @param[in] external 2455 * This flow rule is created by request external to PMD. 2456 * @param[out] error 2457 * Pointer to the error structure. 2458 * 2459 * @return 2460 * 0 on success, a negative errno value otherwise and rte_errno is set. 2461 */ 2462 static inline int 2463 flow_drv_validate(struct rte_eth_dev *dev, 2464 const struct rte_flow_attr *attr, 2465 const struct rte_flow_item items[], 2466 const struct rte_flow_action actions[], 2467 bool external, struct rte_flow_error *error) 2468 { 2469 const struct mlx5_flow_driver_ops *fops; 2470 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 2471 2472 fops = flow_get_drv_ops(type); 2473 return fops->validate(dev, attr, items, actions, external, error); 2474 } 2475 2476 /** 2477 * Flow driver preparation API. This abstracts calling driver specific 2478 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 2479 * calculates the size of memory required for device flow, allocates the memory, 2480 * initializes the device flow and returns the pointer. 2481 * 2482 * @note 2483 * This function initializes device flow structure such as dv or verbs in 2484 * struct mlx5_flow. However, it is caller's responsibility to initialize the 2485 * rest. For example, adding returning device flow to flow->dev_flow list and 2486 * setting backward reference to the flow should be done out of this function. 2487 * layers field is not filled either. 2488 * 2489 * @param[in] attr 2490 * Pointer to the flow attributes. 2491 * @param[in] items 2492 * Pointer to the list of items. 2493 * @param[in] actions 2494 * Pointer to the list of actions. 2495 * @param[out] error 2496 * Pointer to the error structure. 2497 * 2498 * @return 2499 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 2500 */ 2501 static inline struct mlx5_flow * 2502 flow_drv_prepare(const struct rte_flow *flow, 2503 const struct rte_flow_attr *attr, 2504 const struct rte_flow_item items[], 2505 const struct rte_flow_action actions[], 2506 struct rte_flow_error *error) 2507 { 2508 const struct mlx5_flow_driver_ops *fops; 2509 enum mlx5_flow_drv_type type = flow->drv_type; 2510 2511 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2512 fops = flow_get_drv_ops(type); 2513 return fops->prepare(attr, items, actions, error); 2514 } 2515 2516 /** 2517 * Flow driver translation API. This abstracts calling driver specific 2518 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 2519 * translates a generic flow into a driver flow. flow_drv_prepare() must 2520 * precede. 2521 * 2522 * @note 2523 * dev_flow->layers could be filled as a result of parsing during translation 2524 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 2525 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 2526 * flow->actions could be overwritten even though all the expanded dev_flows 2527 * have the same actions. 2528 * 2529 * @param[in] dev 2530 * Pointer to the rte dev structure. 2531 * @param[in, out] dev_flow 2532 * Pointer to the mlx5 flow. 2533 * @param[in] attr 2534 * Pointer to the flow attributes. 2535 * @param[in] items 2536 * Pointer to the list of items. 2537 * @param[in] actions 2538 * Pointer to the list of actions. 2539 * @param[out] error 2540 * Pointer to the error structure. 2541 * 2542 * @return 2543 * 0 on success, a negative errno value otherwise and rte_errno is set. 2544 */ 2545 static inline int 2546 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 2547 const struct rte_flow_attr *attr, 2548 const struct rte_flow_item items[], 2549 const struct rte_flow_action actions[], 2550 struct rte_flow_error *error) 2551 { 2552 const struct mlx5_flow_driver_ops *fops; 2553 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 2554 2555 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2556 fops = flow_get_drv_ops(type); 2557 return fops->translate(dev, dev_flow, attr, items, actions, error); 2558 } 2559 2560 /** 2561 * Flow driver apply API. This abstracts calling driver specific functions. 2562 * Parent flow (rte_flow) should have driver type (drv_type). It applies 2563 * translated driver flows on to device. flow_drv_translate() must precede. 2564 * 2565 * @param[in] dev 2566 * Pointer to Ethernet device structure. 2567 * @param[in, out] flow 2568 * Pointer to flow structure. 2569 * @param[out] error 2570 * Pointer to error structure. 2571 * 2572 * @return 2573 * 0 on success, a negative errno value otherwise and rte_errno is set. 2574 */ 2575 static inline int 2576 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 2577 struct rte_flow_error *error) 2578 { 2579 const struct mlx5_flow_driver_ops *fops; 2580 enum mlx5_flow_drv_type type = flow->drv_type; 2581 2582 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2583 fops = flow_get_drv_ops(type); 2584 return fops->apply(dev, flow, error); 2585 } 2586 2587 /** 2588 * Flow driver remove API. This abstracts calling driver specific functions. 2589 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 2590 * on device. All the resources of the flow should be freed by calling 2591 * flow_drv_destroy(). 2592 * 2593 * @param[in] dev 2594 * Pointer to Ethernet device. 2595 * @param[in, out] flow 2596 * Pointer to flow structure. 2597 */ 2598 static inline void 2599 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow) 2600 { 2601 const struct mlx5_flow_driver_ops *fops; 2602 enum mlx5_flow_drv_type type = flow->drv_type; 2603 2604 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2605 fops = flow_get_drv_ops(type); 2606 fops->remove(dev, flow); 2607 } 2608 2609 /** 2610 * Flow driver destroy API. This abstracts calling driver specific functions. 2611 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 2612 * on device and releases resources of the flow. 2613 * 2614 * @param[in] dev 2615 * Pointer to Ethernet device. 2616 * @param[in, out] flow 2617 * Pointer to flow structure. 2618 */ 2619 static inline void 2620 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 2621 { 2622 const struct mlx5_flow_driver_ops *fops; 2623 enum mlx5_flow_drv_type type = flow->drv_type; 2624 2625 flow_mreg_split_qrss_release(dev, flow); 2626 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 2627 fops = flow_get_drv_ops(type); 2628 fops->destroy(dev, flow); 2629 } 2630 2631 /** 2632 * Validate a flow supported by the NIC. 2633 * 2634 * @see rte_flow_validate() 2635 * @see rte_flow_ops 2636 */ 2637 int 2638 mlx5_flow_validate(struct rte_eth_dev *dev, 2639 const struct rte_flow_attr *attr, 2640 const struct rte_flow_item items[], 2641 const struct rte_flow_action actions[], 2642 struct rte_flow_error *error) 2643 { 2644 int ret; 2645 2646 ret = flow_drv_validate(dev, attr, items, actions, true, error); 2647 if (ret < 0) 2648 return ret; 2649 return 0; 2650 } 2651 2652 /** 2653 * Get port id item from the item list. 2654 * 2655 * @param[in] item 2656 * Pointer to the list of items. 2657 * 2658 * @return 2659 * Pointer to the port id item if exist, else return NULL. 2660 */ 2661 static const struct rte_flow_item * 2662 find_port_id_item(const struct rte_flow_item *item) 2663 { 2664 assert(item); 2665 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 2666 if (item->type == RTE_FLOW_ITEM_TYPE_PORT_ID) 2667 return item; 2668 } 2669 return NULL; 2670 } 2671 2672 /** 2673 * Get RSS action from the action list. 2674 * 2675 * @param[in] actions 2676 * Pointer to the list of actions. 2677 * 2678 * @return 2679 * Pointer to the RSS action if exist, else return NULL. 2680 */ 2681 static const struct rte_flow_action_rss* 2682 flow_get_rss_action(const struct rte_flow_action actions[]) 2683 { 2684 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2685 switch (actions->type) { 2686 case RTE_FLOW_ACTION_TYPE_RSS: 2687 return (const struct rte_flow_action_rss *) 2688 actions->conf; 2689 default: 2690 break; 2691 } 2692 } 2693 return NULL; 2694 } 2695 2696 static unsigned int 2697 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 2698 { 2699 const struct rte_flow_item *item; 2700 unsigned int has_vlan = 0; 2701 2702 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 2703 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 2704 has_vlan = 1; 2705 break; 2706 } 2707 } 2708 if (has_vlan) 2709 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 2710 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 2711 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 2712 MLX5_EXPANSION_ROOT_OUTER; 2713 } 2714 2715 /** 2716 * Get QUEUE/RSS action from the action list. 2717 * 2718 * @param[in] actions 2719 * Pointer to the list of actions. 2720 * @param[out] qrss 2721 * Pointer to the return pointer. 2722 * @param[out] qrss_type 2723 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 2724 * if no QUEUE/RSS is found. 2725 * 2726 * @return 2727 * Total number of actions. 2728 */ 2729 static int 2730 flow_parse_qrss_action(const struct rte_flow_action actions[], 2731 const struct rte_flow_action **qrss) 2732 { 2733 int actions_n = 0; 2734 2735 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2736 switch (actions->type) { 2737 case RTE_FLOW_ACTION_TYPE_QUEUE: 2738 case RTE_FLOW_ACTION_TYPE_RSS: 2739 *qrss = actions; 2740 break; 2741 default: 2742 break; 2743 } 2744 actions_n++; 2745 } 2746 /* Count RTE_FLOW_ACTION_TYPE_END. */ 2747 return actions_n + 1; 2748 } 2749 2750 /** 2751 * Check meter action from the action list. 2752 * 2753 * @param[in] actions 2754 * Pointer to the list of actions. 2755 * @param[out] mtr 2756 * Pointer to the meter exist flag. 2757 * 2758 * @return 2759 * Total number of actions. 2760 */ 2761 static int 2762 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr) 2763 { 2764 int actions_n = 0; 2765 2766 assert(mtr); 2767 *mtr = 0; 2768 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2769 switch (actions->type) { 2770 case RTE_FLOW_ACTION_TYPE_METER: 2771 *mtr = 1; 2772 break; 2773 default: 2774 break; 2775 } 2776 actions_n++; 2777 } 2778 /* Count RTE_FLOW_ACTION_TYPE_END. */ 2779 return actions_n + 1; 2780 } 2781 2782 /** 2783 * Check if the flow should be splited due to hairpin. 2784 * The reason for the split is that in current HW we can't 2785 * support encap on Rx, so if a flow have encap we move it 2786 * to Tx. 2787 * 2788 * @param dev 2789 * Pointer to Ethernet device. 2790 * @param[in] attr 2791 * Flow rule attributes. 2792 * @param[in] actions 2793 * Associated actions (list terminated by the END action). 2794 * 2795 * @return 2796 * > 0 the number of actions and the flow should be split, 2797 * 0 when no split required. 2798 */ 2799 static int 2800 flow_check_hairpin_split(struct rte_eth_dev *dev, 2801 const struct rte_flow_attr *attr, 2802 const struct rte_flow_action actions[]) 2803 { 2804 int queue_action = 0; 2805 int action_n = 0; 2806 int encap = 0; 2807 const struct rte_flow_action_queue *queue; 2808 const struct rte_flow_action_rss *rss; 2809 const struct rte_flow_action_raw_encap *raw_encap; 2810 2811 if (!attr->ingress) 2812 return 0; 2813 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2814 switch (actions->type) { 2815 case RTE_FLOW_ACTION_TYPE_QUEUE: 2816 queue = actions->conf; 2817 if (mlx5_rxq_get_type(dev, queue->index) != 2818 MLX5_RXQ_TYPE_HAIRPIN) 2819 return 0; 2820 queue_action = 1; 2821 action_n++; 2822 break; 2823 case RTE_FLOW_ACTION_TYPE_RSS: 2824 rss = actions->conf; 2825 if (mlx5_rxq_get_type(dev, rss->queue[0]) != 2826 MLX5_RXQ_TYPE_HAIRPIN) 2827 return 0; 2828 queue_action = 1; 2829 action_n++; 2830 break; 2831 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 2832 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 2833 encap = 1; 2834 action_n++; 2835 break; 2836 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 2837 raw_encap = actions->conf; 2838 if (raw_encap->size > 2839 (sizeof(struct rte_flow_item_eth) + 2840 sizeof(struct rte_flow_item_ipv4))) 2841 encap = 1; 2842 action_n++; 2843 break; 2844 default: 2845 action_n++; 2846 break; 2847 } 2848 } 2849 if (encap == 1 && queue_action) 2850 return action_n; 2851 return 0; 2852 } 2853 2854 /* Declare flow create/destroy prototype in advance. */ 2855 static struct rte_flow * 2856 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list, 2857 const struct rte_flow_attr *attr, 2858 const struct rte_flow_item items[], 2859 const struct rte_flow_action actions[], 2860 bool external, struct rte_flow_error *error); 2861 2862 static void 2863 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list, 2864 struct rte_flow *flow); 2865 2866 /** 2867 * Add a flow of copying flow metadata registers in RX_CP_TBL. 2868 * 2869 * As mark_id is unique, if there's already a registered flow for the mark_id, 2870 * return by increasing the reference counter of the resource. Otherwise, create 2871 * the resource (mcp_res) and flow. 2872 * 2873 * Flow looks like, 2874 * - If ingress port is ANY and reg_c[1] is mark_id, 2875 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 2876 * 2877 * For default flow (zero mark_id), flow is like, 2878 * - If ingress port is ANY, 2879 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 2880 * 2881 * @param dev 2882 * Pointer to Ethernet device. 2883 * @param mark_id 2884 * ID of MARK action, zero means default flow for META. 2885 * @param[out] error 2886 * Perform verbose error reporting if not NULL. 2887 * 2888 * @return 2889 * Associated resource on success, NULL otherwise and rte_errno is set. 2890 */ 2891 static struct mlx5_flow_mreg_copy_resource * 2892 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 2893 struct rte_flow_error *error) 2894 { 2895 struct mlx5_priv *priv = dev->data->dev_private; 2896 struct rte_flow_attr attr = { 2897 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 2898 .ingress = 1, 2899 }; 2900 struct mlx5_rte_flow_item_tag tag_spec = { 2901 .data = mark_id, 2902 }; 2903 struct rte_flow_item items[] = { 2904 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 2905 }; 2906 struct rte_flow_action_mark ftag = { 2907 .id = mark_id, 2908 }; 2909 struct mlx5_flow_action_copy_mreg cp_mreg = { 2910 .dst = REG_B, 2911 .src = 0, 2912 }; 2913 struct rte_flow_action_jump jump = { 2914 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 2915 }; 2916 struct rte_flow_action actions[] = { 2917 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 2918 }; 2919 struct mlx5_flow_mreg_copy_resource *mcp_res; 2920 int ret; 2921 2922 /* Fill the register fileds in the flow. */ 2923 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 2924 if (ret < 0) 2925 return NULL; 2926 tag_spec.id = ret; 2927 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 2928 if (ret < 0) 2929 return NULL; 2930 cp_mreg.src = ret; 2931 /* Check if already registered. */ 2932 assert(priv->mreg_cp_tbl); 2933 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id); 2934 if (mcp_res) { 2935 /* For non-default rule. */ 2936 if (mark_id) 2937 mcp_res->refcnt++; 2938 assert(mark_id || mcp_res->refcnt == 1); 2939 return mcp_res; 2940 } 2941 /* Provide the full width of FLAG specific value. */ 2942 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 2943 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 2944 /* Build a new flow. */ 2945 if (mark_id) { 2946 items[0] = (struct rte_flow_item){ 2947 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG, 2948 .spec = &tag_spec, 2949 }; 2950 items[1] = (struct rte_flow_item){ 2951 .type = RTE_FLOW_ITEM_TYPE_END, 2952 }; 2953 actions[0] = (struct rte_flow_action){ 2954 .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK, 2955 .conf = &ftag, 2956 }; 2957 actions[1] = (struct rte_flow_action){ 2958 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 2959 .conf = &cp_mreg, 2960 }; 2961 actions[2] = (struct rte_flow_action){ 2962 .type = RTE_FLOW_ACTION_TYPE_JUMP, 2963 .conf = &jump, 2964 }; 2965 actions[3] = (struct rte_flow_action){ 2966 .type = RTE_FLOW_ACTION_TYPE_END, 2967 }; 2968 } else { 2969 /* Default rule, wildcard match. */ 2970 attr.priority = MLX5_FLOW_PRIO_RSVD; 2971 items[0] = (struct rte_flow_item){ 2972 .type = RTE_FLOW_ITEM_TYPE_END, 2973 }; 2974 actions[0] = (struct rte_flow_action){ 2975 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 2976 .conf = &cp_mreg, 2977 }; 2978 actions[1] = (struct rte_flow_action){ 2979 .type = RTE_FLOW_ACTION_TYPE_JUMP, 2980 .conf = &jump, 2981 }; 2982 actions[2] = (struct rte_flow_action){ 2983 .type = RTE_FLOW_ACTION_TYPE_END, 2984 }; 2985 } 2986 /* Build a new entry. */ 2987 mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0); 2988 if (!mcp_res) { 2989 rte_errno = ENOMEM; 2990 return NULL; 2991 } 2992 /* 2993 * The copy Flows are not included in any list. There 2994 * ones are referenced from other Flows and can not 2995 * be applied, removed, deleted in ardbitrary order 2996 * by list traversing. 2997 */ 2998 mcp_res->flow = flow_list_create(dev, NULL, &attr, items, 2999 actions, false, error); 3000 if (!mcp_res->flow) 3001 goto error; 3002 mcp_res->refcnt++; 3003 mcp_res->hlist_ent.key = mark_id; 3004 ret = mlx5_hlist_insert(priv->mreg_cp_tbl, 3005 &mcp_res->hlist_ent); 3006 assert(!ret); 3007 if (ret) 3008 goto error; 3009 return mcp_res; 3010 error: 3011 if (mcp_res->flow) 3012 flow_list_destroy(dev, NULL, mcp_res->flow); 3013 rte_free(mcp_res); 3014 return NULL; 3015 } 3016 3017 /** 3018 * Release flow in RX_CP_TBL. 3019 * 3020 * @param dev 3021 * Pointer to Ethernet device. 3022 * @flow 3023 * Parent flow for wich copying is provided. 3024 */ 3025 static void 3026 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 3027 struct rte_flow *flow) 3028 { 3029 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy; 3030 struct mlx5_priv *priv = dev->data->dev_private; 3031 3032 if (!mcp_res || !priv->mreg_cp_tbl) 3033 return; 3034 if (flow->copy_applied) { 3035 assert(mcp_res->appcnt); 3036 flow->copy_applied = 0; 3037 --mcp_res->appcnt; 3038 if (!mcp_res->appcnt) 3039 flow_drv_remove(dev, mcp_res->flow); 3040 } 3041 /* 3042 * We do not check availability of metadata registers here, 3043 * because copy resources are allocated in this case. 3044 */ 3045 if (--mcp_res->refcnt) 3046 return; 3047 assert(mcp_res->flow); 3048 flow_list_destroy(dev, NULL, mcp_res->flow); 3049 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 3050 rte_free(mcp_res); 3051 flow->mreg_copy = NULL; 3052 } 3053 3054 /** 3055 * Start flow in RX_CP_TBL. 3056 * 3057 * @param dev 3058 * Pointer to Ethernet device. 3059 * @flow 3060 * Parent flow for wich copying is provided. 3061 * 3062 * @return 3063 * 0 on success, a negative errno value otherwise and rte_errno is set. 3064 */ 3065 static int 3066 flow_mreg_start_copy_action(struct rte_eth_dev *dev, 3067 struct rte_flow *flow) 3068 { 3069 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy; 3070 int ret; 3071 3072 if (!mcp_res || flow->copy_applied) 3073 return 0; 3074 if (!mcp_res->appcnt) { 3075 ret = flow_drv_apply(dev, mcp_res->flow, NULL); 3076 if (ret) 3077 return ret; 3078 } 3079 ++mcp_res->appcnt; 3080 flow->copy_applied = 1; 3081 return 0; 3082 } 3083 3084 /** 3085 * Stop flow in RX_CP_TBL. 3086 * 3087 * @param dev 3088 * Pointer to Ethernet device. 3089 * @flow 3090 * Parent flow for wich copying is provided. 3091 */ 3092 static void 3093 flow_mreg_stop_copy_action(struct rte_eth_dev *dev, 3094 struct rte_flow *flow) 3095 { 3096 struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy; 3097 3098 if (!mcp_res || !flow->copy_applied) 3099 return; 3100 assert(mcp_res->appcnt); 3101 --mcp_res->appcnt; 3102 flow->copy_applied = 0; 3103 if (!mcp_res->appcnt) 3104 flow_drv_remove(dev, mcp_res->flow); 3105 } 3106 3107 /** 3108 * Remove the default copy action from RX_CP_TBL. 3109 * 3110 * @param dev 3111 * Pointer to Ethernet device. 3112 */ 3113 static void 3114 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 3115 { 3116 struct mlx5_flow_mreg_copy_resource *mcp_res; 3117 struct mlx5_priv *priv = dev->data->dev_private; 3118 3119 /* Check if default flow is registered. */ 3120 if (!priv->mreg_cp_tbl) 3121 return; 3122 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, 0ULL); 3123 if (!mcp_res) 3124 return; 3125 assert(mcp_res->flow); 3126 flow_list_destroy(dev, NULL, mcp_res->flow); 3127 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 3128 rte_free(mcp_res); 3129 } 3130 3131 /** 3132 * Add the default copy action in in RX_CP_TBL. 3133 * 3134 * @param dev 3135 * Pointer to Ethernet device. 3136 * @param[out] error 3137 * Perform verbose error reporting if not NULL. 3138 * 3139 * @return 3140 * 0 for success, negative value otherwise and rte_errno is set. 3141 */ 3142 static int 3143 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 3144 struct rte_flow_error *error) 3145 { 3146 struct mlx5_priv *priv = dev->data->dev_private; 3147 struct mlx5_flow_mreg_copy_resource *mcp_res; 3148 3149 /* Check whether extensive metadata feature is engaged. */ 3150 if (!priv->config.dv_flow_en || 3151 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 3152 !mlx5_flow_ext_mreg_supported(dev) || 3153 !priv->sh->dv_regc0_mask) 3154 return 0; 3155 mcp_res = flow_mreg_add_copy_action(dev, 0, error); 3156 if (!mcp_res) 3157 return -rte_errno; 3158 return 0; 3159 } 3160 3161 /** 3162 * Add a flow of copying flow metadata registers in RX_CP_TBL. 3163 * 3164 * All the flow having Q/RSS action should be split by 3165 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 3166 * performs the following, 3167 * - CQE->flow_tag := reg_c[1] (MARK) 3168 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 3169 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 3170 * but there should be a flow per each MARK ID set by MARK action. 3171 * 3172 * For the aforementioned reason, if there's a MARK action in flow's action 3173 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 3174 * the MARK ID to CQE's flow_tag like, 3175 * - If reg_c[1] is mark_id, 3176 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 3177 * 3178 * For SET_META action which stores value in reg_c[0], as the destination is 3179 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 3180 * MARK ID means the default flow. The default flow looks like, 3181 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 3182 * 3183 * @param dev 3184 * Pointer to Ethernet device. 3185 * @param flow 3186 * Pointer to flow structure. 3187 * @param[in] actions 3188 * Pointer to the list of actions. 3189 * @param[out] error 3190 * Perform verbose error reporting if not NULL. 3191 * 3192 * @return 3193 * 0 on success, negative value otherwise and rte_errno is set. 3194 */ 3195 static int 3196 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 3197 struct rte_flow *flow, 3198 const struct rte_flow_action *actions, 3199 struct rte_flow_error *error) 3200 { 3201 struct mlx5_priv *priv = dev->data->dev_private; 3202 struct mlx5_dev_config *config = &priv->config; 3203 struct mlx5_flow_mreg_copy_resource *mcp_res; 3204 const struct rte_flow_action_mark *mark; 3205 3206 /* Check whether extensive metadata feature is engaged. */ 3207 if (!config->dv_flow_en || 3208 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 3209 !mlx5_flow_ext_mreg_supported(dev) || 3210 !priv->sh->dv_regc0_mask) 3211 return 0; 3212 /* Find MARK action. */ 3213 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3214 switch (actions->type) { 3215 case RTE_FLOW_ACTION_TYPE_FLAG: 3216 mcp_res = flow_mreg_add_copy_action 3217 (dev, MLX5_FLOW_MARK_DEFAULT, error); 3218 if (!mcp_res) 3219 return -rte_errno; 3220 flow->mreg_copy = mcp_res; 3221 if (dev->data->dev_started) { 3222 mcp_res->appcnt++; 3223 flow->copy_applied = 1; 3224 } 3225 return 0; 3226 case RTE_FLOW_ACTION_TYPE_MARK: 3227 mark = (const struct rte_flow_action_mark *) 3228 actions->conf; 3229 mcp_res = 3230 flow_mreg_add_copy_action(dev, mark->id, error); 3231 if (!mcp_res) 3232 return -rte_errno; 3233 flow->mreg_copy = mcp_res; 3234 if (dev->data->dev_started) { 3235 mcp_res->appcnt++; 3236 flow->copy_applied = 1; 3237 } 3238 return 0; 3239 default: 3240 break; 3241 } 3242 } 3243 return 0; 3244 } 3245 3246 #define MLX5_MAX_SPLIT_ACTIONS 24 3247 #define MLX5_MAX_SPLIT_ITEMS 24 3248 3249 /** 3250 * Split the hairpin flow. 3251 * Since HW can't support encap on Rx we move the encap to Tx. 3252 * If the count action is after the encap then we also 3253 * move the count action. in this case the count will also measure 3254 * the outer bytes. 3255 * 3256 * @param dev 3257 * Pointer to Ethernet device. 3258 * @param[in] actions 3259 * Associated actions (list terminated by the END action). 3260 * @param[out] actions_rx 3261 * Rx flow actions. 3262 * @param[out] actions_tx 3263 * Tx flow actions.. 3264 * @param[out] pattern_tx 3265 * The pattern items for the Tx flow. 3266 * @param[out] flow_id 3267 * The flow ID connected to this flow. 3268 * 3269 * @return 3270 * 0 on success. 3271 */ 3272 static int 3273 flow_hairpin_split(struct rte_eth_dev *dev, 3274 const struct rte_flow_action actions[], 3275 struct rte_flow_action actions_rx[], 3276 struct rte_flow_action actions_tx[], 3277 struct rte_flow_item pattern_tx[], 3278 uint32_t *flow_id) 3279 { 3280 struct mlx5_priv *priv = dev->data->dev_private; 3281 const struct rte_flow_action_raw_encap *raw_encap; 3282 const struct rte_flow_action_raw_decap *raw_decap; 3283 struct mlx5_rte_flow_action_set_tag *set_tag; 3284 struct rte_flow_action *tag_action; 3285 struct mlx5_rte_flow_item_tag *tag_item; 3286 struct rte_flow_item *item; 3287 char *addr; 3288 int encap = 0; 3289 3290 mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id); 3291 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3292 switch (actions->type) { 3293 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3294 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3295 rte_memcpy(actions_tx, actions, 3296 sizeof(struct rte_flow_action)); 3297 actions_tx++; 3298 break; 3299 case RTE_FLOW_ACTION_TYPE_COUNT: 3300 if (encap) { 3301 rte_memcpy(actions_tx, actions, 3302 sizeof(struct rte_flow_action)); 3303 actions_tx++; 3304 } else { 3305 rte_memcpy(actions_rx, actions, 3306 sizeof(struct rte_flow_action)); 3307 actions_rx++; 3308 } 3309 break; 3310 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3311 raw_encap = actions->conf; 3312 if (raw_encap->size > 3313 (sizeof(struct rte_flow_item_eth) + 3314 sizeof(struct rte_flow_item_ipv4))) { 3315 memcpy(actions_tx, actions, 3316 sizeof(struct rte_flow_action)); 3317 actions_tx++; 3318 encap = 1; 3319 } else { 3320 rte_memcpy(actions_rx, actions, 3321 sizeof(struct rte_flow_action)); 3322 actions_rx++; 3323 } 3324 break; 3325 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3326 raw_decap = actions->conf; 3327 if (raw_decap->size < 3328 (sizeof(struct rte_flow_item_eth) + 3329 sizeof(struct rte_flow_item_ipv4))) { 3330 memcpy(actions_tx, actions, 3331 sizeof(struct rte_flow_action)); 3332 actions_tx++; 3333 } else { 3334 rte_memcpy(actions_rx, actions, 3335 sizeof(struct rte_flow_action)); 3336 actions_rx++; 3337 } 3338 break; 3339 default: 3340 rte_memcpy(actions_rx, actions, 3341 sizeof(struct rte_flow_action)); 3342 actions_rx++; 3343 break; 3344 } 3345 } 3346 /* Add set meta action and end action for the Rx flow. */ 3347 tag_action = actions_rx; 3348 tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG; 3349 actions_rx++; 3350 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 3351 actions_rx++; 3352 set_tag = (void *)actions_rx; 3353 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL); 3354 assert(set_tag->id > REG_NONE); 3355 set_tag->data = *flow_id; 3356 tag_action->conf = set_tag; 3357 /* Create Tx item list. */ 3358 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 3359 addr = (void *)&pattern_tx[2]; 3360 item = pattern_tx; 3361 item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG; 3362 tag_item = (void *)addr; 3363 tag_item->data = *flow_id; 3364 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 3365 assert(set_tag->id > REG_NONE); 3366 item->spec = tag_item; 3367 addr += sizeof(struct mlx5_rte_flow_item_tag); 3368 tag_item = (void *)addr; 3369 tag_item->data = UINT32_MAX; 3370 tag_item->id = UINT16_MAX; 3371 item->mask = tag_item; 3372 addr += sizeof(struct mlx5_rte_flow_item_tag); 3373 item->last = NULL; 3374 item++; 3375 item->type = RTE_FLOW_ITEM_TYPE_END; 3376 return 0; 3377 } 3378 3379 /** 3380 * The last stage of splitting chain, just creates the subflow 3381 * without any modification. 3382 * 3383 * @param dev 3384 * Pointer to Ethernet device. 3385 * @param[in] flow 3386 * Parent flow structure pointer. 3387 * @param[in, out] sub_flow 3388 * Pointer to return the created subflow, may be NULL. 3389 * @param[in] attr 3390 * Flow rule attributes. 3391 * @param[in] items 3392 * Pattern specification (list terminated by the END pattern item). 3393 * @param[in] actions 3394 * Associated actions (list terminated by the END action). 3395 * @param[in] external 3396 * This flow rule is created by request external to PMD. 3397 * @param[out] error 3398 * Perform verbose error reporting if not NULL. 3399 * @return 3400 * 0 on success, negative value otherwise 3401 */ 3402 static int 3403 flow_create_split_inner(struct rte_eth_dev *dev, 3404 struct rte_flow *flow, 3405 struct mlx5_flow **sub_flow, 3406 const struct rte_flow_attr *attr, 3407 const struct rte_flow_item items[], 3408 const struct rte_flow_action actions[], 3409 bool external, struct rte_flow_error *error) 3410 { 3411 struct mlx5_flow *dev_flow; 3412 3413 dev_flow = flow_drv_prepare(flow, attr, items, actions, error); 3414 if (!dev_flow) 3415 return -rte_errno; 3416 dev_flow->flow = flow; 3417 dev_flow->external = external; 3418 /* Subflow object was created, we must include one in the list. */ 3419 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next); 3420 if (sub_flow) 3421 *sub_flow = dev_flow; 3422 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 3423 } 3424 3425 /** 3426 * Split the meter flow. 3427 * 3428 * As meter flow will split to three sub flow, other than meter 3429 * action, the other actions make sense to only meter accepts 3430 * the packet. If it need to be dropped, no other additional 3431 * actions should be take. 3432 * 3433 * One kind of special action which decapsulates the L3 tunnel 3434 * header will be in the prefix sub flow, as not to take the 3435 * L3 tunnel header into account. 3436 * 3437 * @param dev 3438 * Pointer to Ethernet device. 3439 * @param[in] actions 3440 * Associated actions (list terminated by the END action). 3441 * @param[out] actions_sfx 3442 * Suffix flow actions. 3443 * @param[out] actions_pre 3444 * Prefix flow actions. 3445 * @param[out] pattern_sfx 3446 * The pattern items for the suffix flow. 3447 * @param[out] tag_sfx 3448 * Pointer to suffix flow tag. 3449 * 3450 * @return 3451 * 0 on success. 3452 */ 3453 static int 3454 flow_meter_split_prep(struct rte_eth_dev *dev, 3455 const struct rte_flow_action actions[], 3456 struct rte_flow_action actions_sfx[], 3457 struct rte_flow_action actions_pre[]) 3458 { 3459 struct rte_flow_action *tag_action; 3460 struct mlx5_rte_flow_action_set_tag *set_tag; 3461 struct rte_flow_error error; 3462 const struct rte_flow_action_raw_encap *raw_encap; 3463 const struct rte_flow_action_raw_decap *raw_decap; 3464 uint32_t tag_id; 3465 3466 /* Add the extra tag action first. */ 3467 tag_action = actions_pre; 3468 tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG; 3469 actions_pre++; 3470 /* Prepare the actions for prefix and suffix flow. */ 3471 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3472 switch (actions->type) { 3473 case RTE_FLOW_ACTION_TYPE_METER: 3474 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 3475 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 3476 memcpy(actions_pre, actions, 3477 sizeof(struct rte_flow_action)); 3478 actions_pre++; 3479 break; 3480 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3481 raw_encap = actions->conf; 3482 if (raw_encap->size > 3483 (sizeof(struct rte_flow_item_eth) + 3484 sizeof(struct rte_flow_item_ipv4))) { 3485 memcpy(actions_sfx, actions, 3486 sizeof(struct rte_flow_action)); 3487 actions_sfx++; 3488 } else { 3489 rte_memcpy(actions_pre, actions, 3490 sizeof(struct rte_flow_action)); 3491 actions_pre++; 3492 } 3493 break; 3494 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3495 raw_decap = actions->conf; 3496 /* Size 0 decap means 50 bytes as vxlan decap. */ 3497 if (raw_decap->size && (raw_decap->size < 3498 (sizeof(struct rte_flow_item_eth) + 3499 sizeof(struct rte_flow_item_ipv4)))) { 3500 memcpy(actions_sfx, actions, 3501 sizeof(struct rte_flow_action)); 3502 actions_sfx++; 3503 } else { 3504 rte_memcpy(actions_pre, actions, 3505 sizeof(struct rte_flow_action)); 3506 actions_pre++; 3507 } 3508 break; 3509 default: 3510 memcpy(actions_sfx, actions, 3511 sizeof(struct rte_flow_action)); 3512 actions_sfx++; 3513 break; 3514 } 3515 } 3516 /* Add end action to the actions. */ 3517 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 3518 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 3519 actions_pre++; 3520 /* Set the tag. */ 3521 set_tag = (void *)actions_pre; 3522 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error); 3523 /* 3524 * Get the id from the qrss_pool to make qrss share the id with meter. 3525 */ 3526 tag_id = flow_qrss_get_id(dev); 3527 set_tag->data = rte_cpu_to_be_32(tag_id); 3528 tag_action->conf = set_tag; 3529 return tag_id; 3530 } 3531 3532 /** 3533 * Split action list having QUEUE/RSS for metadata register copy. 3534 * 3535 * Once Q/RSS action is detected in user's action list, the flow action 3536 * should be split in order to copy metadata registers, which will happen in 3537 * RX_CP_TBL like, 3538 * - CQE->flow_tag := reg_c[1] (MARK) 3539 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 3540 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 3541 * This is because the last action of each flow must be a terminal action 3542 * (QUEUE, RSS or DROP). 3543 * 3544 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 3545 * stored and kept in the mlx5_flow structure per each sub_flow. 3546 * 3547 * The Q/RSS action is replaced with, 3548 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 3549 * And the following JUMP action is added at the end, 3550 * - JUMP, to RX_CP_TBL. 3551 * 3552 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 3553 * flow_create_split_metadata() routine. The flow will look like, 3554 * - If flow ID matches (reg_c[2]), perform Q/RSS. 3555 * 3556 * @param dev 3557 * Pointer to Ethernet device. 3558 * @param[out] split_actions 3559 * Pointer to store split actions to jump to CP_TBL. 3560 * @param[in] actions 3561 * Pointer to the list of original flow actions. 3562 * @param[in] qrss 3563 * Pointer to the Q/RSS action. 3564 * @param[in] actions_n 3565 * Number of original actions. 3566 * @param[out] error 3567 * Perform verbose error reporting if not NULL. 3568 * 3569 * @return 3570 * non-zero unique flow_id on success, otherwise 0 and 3571 * error/rte_error are set. 3572 */ 3573 static uint32_t 3574 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 3575 struct rte_flow_action *split_actions, 3576 const struct rte_flow_action *actions, 3577 const struct rte_flow_action *qrss, 3578 int actions_n, struct rte_flow_error *error) 3579 { 3580 struct mlx5_rte_flow_action_set_tag *set_tag; 3581 struct rte_flow_action_jump *jump; 3582 const int qrss_idx = qrss - actions; 3583 uint32_t flow_id = 0; 3584 int ret = 0; 3585 3586 /* 3587 * Given actions will be split 3588 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 3589 * - Add jump to mreg CP_TBL. 3590 * As a result, there will be one more action. 3591 */ 3592 ++actions_n; 3593 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 3594 set_tag = (void *)(split_actions + actions_n); 3595 /* 3596 * If tag action is not set to void(it means we are not the meter 3597 * suffix flow), add the tag action. Since meter suffix flow already 3598 * has the tag added. 3599 */ 3600 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 3601 /* 3602 * Allocate the new subflow ID. This one is unique within 3603 * device and not shared with representors. Otherwise, 3604 * we would have to resolve multi-thread access synch 3605 * issue. Each flow on the shared device is appended 3606 * with source vport identifier, so the resulting 3607 * flows will be unique in the shared (by master and 3608 * representors) domain even if they have coinciding 3609 * IDs. 3610 */ 3611 flow_id = flow_qrss_get_id(dev); 3612 if (!flow_id) 3613 return rte_flow_error_set(error, ENOMEM, 3614 RTE_FLOW_ERROR_TYPE_ACTION, 3615 NULL, "can't allocate id " 3616 "for split Q/RSS subflow"); 3617 /* Internal SET_TAG action to set flow ID. */ 3618 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 3619 .data = flow_id, 3620 }; 3621 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 3622 if (ret < 0) 3623 return ret; 3624 set_tag->id = ret; 3625 /* Construct new actions array. */ 3626 /* Replace QUEUE/RSS action. */ 3627 split_actions[qrss_idx] = (struct rte_flow_action){ 3628 .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG, 3629 .conf = set_tag, 3630 }; 3631 } 3632 /* JUMP action to jump to mreg copy table (CP_TBL). */ 3633 jump = (void *)(set_tag + 1); 3634 *jump = (struct rte_flow_action_jump){ 3635 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 3636 }; 3637 split_actions[actions_n - 2] = (struct rte_flow_action){ 3638 .type = RTE_FLOW_ACTION_TYPE_JUMP, 3639 .conf = jump, 3640 }; 3641 split_actions[actions_n - 1] = (struct rte_flow_action){ 3642 .type = RTE_FLOW_ACTION_TYPE_END, 3643 }; 3644 return flow_id; 3645 } 3646 3647 /** 3648 * Extend the given action list for Tx metadata copy. 3649 * 3650 * Copy the given action list to the ext_actions and add flow metadata register 3651 * copy action in order to copy reg_a set by WQE to reg_c[0]. 3652 * 3653 * @param[out] ext_actions 3654 * Pointer to the extended action list. 3655 * @param[in] actions 3656 * Pointer to the list of actions. 3657 * @param[in] actions_n 3658 * Number of actions in the list. 3659 * @param[out] error 3660 * Perform verbose error reporting if not NULL. 3661 * 3662 * @return 3663 * 0 on success, negative value otherwise 3664 */ 3665 static int 3666 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 3667 struct rte_flow_action *ext_actions, 3668 const struct rte_flow_action *actions, 3669 int actions_n, struct rte_flow_error *error) 3670 { 3671 struct mlx5_flow_action_copy_mreg *cp_mreg = 3672 (struct mlx5_flow_action_copy_mreg *) 3673 (ext_actions + actions_n + 1); 3674 int ret; 3675 3676 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 3677 if (ret < 0) 3678 return ret; 3679 cp_mreg->dst = ret; 3680 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 3681 if (ret < 0) 3682 return ret; 3683 cp_mreg->src = ret; 3684 memcpy(ext_actions, actions, 3685 sizeof(*ext_actions) * actions_n); 3686 ext_actions[actions_n - 1] = (struct rte_flow_action){ 3687 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 3688 .conf = cp_mreg, 3689 }; 3690 ext_actions[actions_n] = (struct rte_flow_action){ 3691 .type = RTE_FLOW_ACTION_TYPE_END, 3692 }; 3693 return 0; 3694 } 3695 3696 /** 3697 * The splitting for metadata feature. 3698 * 3699 * - Q/RSS action on NIC Rx should be split in order to pass by 3700 * the mreg copy table (RX_CP_TBL) and then it jumps to the 3701 * action table (RX_ACT_TBL) which has the split Q/RSS action. 3702 * 3703 * - All the actions on NIC Tx should have a mreg copy action to 3704 * copy reg_a from WQE to reg_c[0]. 3705 * 3706 * @param dev 3707 * Pointer to Ethernet device. 3708 * @param[in] flow 3709 * Parent flow structure pointer. 3710 * @param[in] attr 3711 * Flow rule attributes. 3712 * @param[in] items 3713 * Pattern specification (list terminated by the END pattern item). 3714 * @param[in] actions 3715 * Associated actions (list terminated by the END action). 3716 * @param[in] external 3717 * This flow rule is created by request external to PMD. 3718 * @param[out] error 3719 * Perform verbose error reporting if not NULL. 3720 * @return 3721 * 0 on success, negative value otherwise 3722 */ 3723 static int 3724 flow_create_split_metadata(struct rte_eth_dev *dev, 3725 struct rte_flow *flow, 3726 const struct rte_flow_attr *attr, 3727 const struct rte_flow_item items[], 3728 const struct rte_flow_action actions[], 3729 bool external, struct rte_flow_error *error) 3730 { 3731 struct mlx5_priv *priv = dev->data->dev_private; 3732 struct mlx5_dev_config *config = &priv->config; 3733 const struct rte_flow_action *qrss = NULL; 3734 struct rte_flow_action *ext_actions = NULL; 3735 struct mlx5_flow *dev_flow = NULL; 3736 uint32_t qrss_id = 0; 3737 int mtr_sfx = 0; 3738 size_t act_size; 3739 int actions_n; 3740 int ret; 3741 3742 /* Check whether extensive metadata feature is engaged. */ 3743 if (!config->dv_flow_en || 3744 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 3745 !mlx5_flow_ext_mreg_supported(dev)) 3746 return flow_create_split_inner(dev, flow, NULL, attr, items, 3747 actions, external, error); 3748 actions_n = flow_parse_qrss_action(actions, &qrss); 3749 if (qrss) { 3750 /* Exclude hairpin flows from splitting. */ 3751 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 3752 const struct rte_flow_action_queue *queue; 3753 3754 queue = qrss->conf; 3755 if (mlx5_rxq_get_type(dev, queue->index) == 3756 MLX5_RXQ_TYPE_HAIRPIN) 3757 qrss = NULL; 3758 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 3759 const struct rte_flow_action_rss *rss; 3760 3761 rss = qrss->conf; 3762 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 3763 MLX5_RXQ_TYPE_HAIRPIN) 3764 qrss = NULL; 3765 } 3766 } 3767 if (qrss) { 3768 /* Check if it is in meter suffix table. */ 3769 mtr_sfx = attr->group == (attr->transfer ? 3770 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) : 3771 MLX5_FLOW_TABLE_LEVEL_SUFFIX); 3772 /* 3773 * Q/RSS action on NIC Rx should be split in order to pass by 3774 * the mreg copy table (RX_CP_TBL) and then it jumps to the 3775 * action table (RX_ACT_TBL) which has the split Q/RSS action. 3776 */ 3777 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 3778 sizeof(struct rte_flow_action_set_tag) + 3779 sizeof(struct rte_flow_action_jump); 3780 ext_actions = rte_zmalloc(__func__, act_size, 0); 3781 if (!ext_actions) 3782 return rte_flow_error_set(error, ENOMEM, 3783 RTE_FLOW_ERROR_TYPE_ACTION, 3784 NULL, "no memory to split " 3785 "metadata flow"); 3786 /* 3787 * If we are the suffix flow of meter, tag already exist. 3788 * Set the tag action to void. 3789 */ 3790 if (mtr_sfx) 3791 ext_actions[qrss - actions].type = 3792 RTE_FLOW_ACTION_TYPE_VOID; 3793 else 3794 ext_actions[qrss - actions].type = 3795 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 3796 /* 3797 * Create the new actions list with removed Q/RSS action 3798 * and appended set tag and jump to register copy table 3799 * (RX_CP_TBL). We should preallocate unique tag ID here 3800 * in advance, because it is needed for set tag action. 3801 */ 3802 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 3803 qrss, actions_n, error); 3804 if (!mtr_sfx && !qrss_id) { 3805 ret = -rte_errno; 3806 goto exit; 3807 } 3808 } else if (attr->egress && !attr->transfer) { 3809 /* 3810 * All the actions on NIC Tx should have a metadata register 3811 * copy action to copy reg_a from WQE to reg_c[meta] 3812 */ 3813 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 3814 sizeof(struct mlx5_flow_action_copy_mreg); 3815 ext_actions = rte_zmalloc(__func__, act_size, 0); 3816 if (!ext_actions) 3817 return rte_flow_error_set(error, ENOMEM, 3818 RTE_FLOW_ERROR_TYPE_ACTION, 3819 NULL, "no memory to split " 3820 "metadata flow"); 3821 /* Create the action list appended with copy register. */ 3822 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 3823 actions_n, error); 3824 if (ret < 0) 3825 goto exit; 3826 } 3827 /* Add the unmodified original or prefix subflow. */ 3828 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items, 3829 ext_actions ? ext_actions : actions, 3830 external, error); 3831 if (ret < 0) 3832 goto exit; 3833 assert(dev_flow); 3834 if (qrss) { 3835 const struct rte_flow_attr q_attr = { 3836 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 3837 .ingress = 1, 3838 }; 3839 /* Internal PMD action to set register. */ 3840 struct mlx5_rte_flow_item_tag q_tag_spec = { 3841 .data = qrss_id, 3842 .id = 0, 3843 }; 3844 struct rte_flow_item q_items[] = { 3845 { 3846 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG, 3847 .spec = &q_tag_spec, 3848 .last = NULL, 3849 .mask = NULL, 3850 }, 3851 { 3852 .type = RTE_FLOW_ITEM_TYPE_END, 3853 }, 3854 }; 3855 struct rte_flow_action q_actions[] = { 3856 { 3857 .type = qrss->type, 3858 .conf = qrss->conf, 3859 }, 3860 { 3861 .type = RTE_FLOW_ACTION_TYPE_END, 3862 }, 3863 }; 3864 uint64_t hash_fields = dev_flow->hash_fields; 3865 dev_flow = NULL; 3866 /* 3867 * Configure the tag action only if we are not the meter sub 3868 * flow. Since tag is already marked in the meter suffix sub 3869 * flow. 3870 */ 3871 if (qrss_id) { 3872 /* 3873 * Put unique id in prefix flow due to it is destroyed 3874 * after prefix flow and id will be freed after there 3875 * is no actual flows with this id and identifier 3876 * reallocation becomes possible (for example, for 3877 * other flows in other threads). 3878 */ 3879 dev_flow->qrss_id = qrss_id; 3880 qrss_id = 0; 3881 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 3882 error); 3883 if (ret < 0) 3884 goto exit; 3885 q_tag_spec.id = ret; 3886 } 3887 /* Add suffix subflow to execute Q/RSS. */ 3888 ret = flow_create_split_inner(dev, flow, &dev_flow, 3889 &q_attr, mtr_sfx ? items : 3890 q_items, q_actions, 3891 external, error); 3892 if (ret < 0) 3893 goto exit; 3894 assert(dev_flow); 3895 dev_flow->hash_fields = hash_fields; 3896 } 3897 3898 exit: 3899 /* 3900 * We do not destroy the partially created sub_flows in case of error. 3901 * These ones are included into parent flow list and will be destroyed 3902 * by flow_drv_destroy. 3903 */ 3904 flow_qrss_free_id(dev, qrss_id); 3905 rte_free(ext_actions); 3906 return ret; 3907 } 3908 3909 /** 3910 * The splitting for meter feature. 3911 * 3912 * - The meter flow will be split to two flows as prefix and 3913 * suffix flow. The packets make sense only it pass the prefix 3914 * meter action. 3915 * 3916 * - Reg_C_5 is used for the packet to match betweend prefix and 3917 * suffix flow. 3918 * 3919 * @param dev 3920 * Pointer to Ethernet device. 3921 * @param[in] flow 3922 * Parent flow structure pointer. 3923 * @param[in] attr 3924 * Flow rule attributes. 3925 * @param[in] items 3926 * Pattern specification (list terminated by the END pattern item). 3927 * @param[in] actions 3928 * Associated actions (list terminated by the END action). 3929 * @param[in] external 3930 * This flow rule is created by request external to PMD. 3931 * @param[out] error 3932 * Perform verbose error reporting if not NULL. 3933 * @return 3934 * 0 on success, negative value otherwise 3935 */ 3936 static int 3937 flow_create_split_meter(struct rte_eth_dev *dev, 3938 struct rte_flow *flow, 3939 const struct rte_flow_attr *attr, 3940 const struct rte_flow_item items[], 3941 const struct rte_flow_action actions[], 3942 bool external, struct rte_flow_error *error) 3943 { 3944 struct mlx5_priv *priv = dev->data->dev_private; 3945 struct rte_flow_action *sfx_actions = NULL; 3946 struct rte_flow_action *pre_actions = NULL; 3947 struct rte_flow_item *sfx_items = NULL; 3948 const struct rte_flow_item *sfx_port_id_item; 3949 struct mlx5_flow *dev_flow = NULL; 3950 struct rte_flow_attr sfx_attr = *attr; 3951 uint32_t mtr = 0; 3952 uint32_t mtr_tag_id = 0; 3953 size_t act_size; 3954 size_t item_size; 3955 int actions_n = 0; 3956 int ret; 3957 3958 if (priv->mtr_en) 3959 actions_n = flow_check_meter_action(actions, &mtr); 3960 if (mtr) { 3961 struct mlx5_rte_flow_item_tag *tag_spec; 3962 /* The five prefix actions: meter, decap, encap, tag, end. */ 3963 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) + 3964 sizeof(struct rte_flow_action_set_tag); 3965 /* tag, end. */ 3966 #define METER_SUFFIX_ITEM 3 3967 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 3968 sizeof(struct mlx5_rte_flow_item_tag); 3969 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0); 3970 if (!sfx_actions) 3971 return rte_flow_error_set(error, ENOMEM, 3972 RTE_FLOW_ERROR_TYPE_ACTION, 3973 NULL, "no memory to split " 3974 "meter flow"); 3975 pre_actions = sfx_actions + actions_n; 3976 mtr_tag_id = flow_meter_split_prep(dev, actions, sfx_actions, 3977 pre_actions); 3978 if (!mtr_tag_id) { 3979 ret = -rte_errno; 3980 goto exit; 3981 } 3982 /* Add the prefix subflow. */ 3983 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items, 3984 pre_actions, external, error); 3985 if (ret) { 3986 ret = -rte_errno; 3987 goto exit; 3988 } 3989 dev_flow->mtr_flow_id = mtr_tag_id; 3990 /* Prepare the suffix flow match pattern. */ 3991 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 3992 act_size); 3993 tag_spec = (struct mlx5_rte_flow_item_tag *)(sfx_items + 3994 METER_SUFFIX_ITEM); 3995 tag_spec->data = rte_cpu_to_be_32(dev_flow->mtr_flow_id); 3996 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, 3997 error); 3998 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG; 3999 sfx_items->spec = tag_spec; 4000 sfx_items->last = NULL; 4001 sfx_items->mask = NULL; 4002 sfx_items++; 4003 sfx_port_id_item = find_port_id_item(items); 4004 if (sfx_port_id_item) { 4005 memcpy(sfx_items, sfx_port_id_item, 4006 sizeof(*sfx_items)); 4007 sfx_items++; 4008 } 4009 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 4010 sfx_items -= METER_SUFFIX_ITEM; 4011 /* Setting the sfx group atrr. */ 4012 sfx_attr.group = sfx_attr.transfer ? 4013 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) : 4014 MLX5_FLOW_TABLE_LEVEL_SUFFIX; 4015 } 4016 /* Add the prefix subflow. */ 4017 ret = flow_create_split_metadata(dev, flow, &sfx_attr, 4018 sfx_items ? sfx_items : items, 4019 sfx_actions ? sfx_actions : actions, 4020 external, error); 4021 exit: 4022 if (sfx_actions) 4023 rte_free(sfx_actions); 4024 return ret; 4025 } 4026 4027 /** 4028 * Split the flow to subflow set. The splitters might be linked 4029 * in the chain, like this: 4030 * flow_create_split_outer() calls: 4031 * flow_create_split_meter() calls: 4032 * flow_create_split_metadata(meter_subflow_0) calls: 4033 * flow_create_split_inner(metadata_subflow_0) 4034 * flow_create_split_inner(metadata_subflow_1) 4035 * flow_create_split_inner(metadata_subflow_2) 4036 * flow_create_split_metadata(meter_subflow_1) calls: 4037 * flow_create_split_inner(metadata_subflow_0) 4038 * flow_create_split_inner(metadata_subflow_1) 4039 * flow_create_split_inner(metadata_subflow_2) 4040 * 4041 * This provide flexible way to add new levels of flow splitting. 4042 * The all of successfully created subflows are included to the 4043 * parent flow dev_flow list. 4044 * 4045 * @param dev 4046 * Pointer to Ethernet device. 4047 * @param[in] flow 4048 * Parent flow structure pointer. 4049 * @param[in] attr 4050 * Flow rule attributes. 4051 * @param[in] items 4052 * Pattern specification (list terminated by the END pattern item). 4053 * @param[in] actions 4054 * Associated actions (list terminated by the END action). 4055 * @param[in] external 4056 * This flow rule is created by request external to PMD. 4057 * @param[out] error 4058 * Perform verbose error reporting if not NULL. 4059 * @return 4060 * 0 on success, negative value otherwise 4061 */ 4062 static int 4063 flow_create_split_outer(struct rte_eth_dev *dev, 4064 struct rte_flow *flow, 4065 const struct rte_flow_attr *attr, 4066 const struct rte_flow_item items[], 4067 const struct rte_flow_action actions[], 4068 bool external, struct rte_flow_error *error) 4069 { 4070 int ret; 4071 4072 ret = flow_create_split_meter(dev, flow, attr, items, 4073 actions, external, error); 4074 assert(ret <= 0); 4075 return ret; 4076 } 4077 4078 /** 4079 * Create a flow and add it to @p list. 4080 * 4081 * @param dev 4082 * Pointer to Ethernet device. 4083 * @param list 4084 * Pointer to a TAILQ flow list. If this parameter NULL, 4085 * no list insertion occurred, flow is just created, 4086 * this is caller's responsibility to track the 4087 * created flow. 4088 * @param[in] attr 4089 * Flow rule attributes. 4090 * @param[in] items 4091 * Pattern specification (list terminated by the END pattern item). 4092 * @param[in] actions 4093 * Associated actions (list terminated by the END action). 4094 * @param[in] external 4095 * This flow rule is created by request external to PMD. 4096 * @param[out] error 4097 * Perform verbose error reporting if not NULL. 4098 * 4099 * @return 4100 * A flow on success, NULL otherwise and rte_errno is set. 4101 */ 4102 static struct rte_flow * 4103 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list, 4104 const struct rte_flow_attr *attr, 4105 const struct rte_flow_item items[], 4106 const struct rte_flow_action actions[], 4107 bool external, struct rte_flow_error *error) 4108 { 4109 struct mlx5_priv *priv = dev->data->dev_private; 4110 struct rte_flow *flow = NULL; 4111 struct mlx5_flow *dev_flow; 4112 const struct rte_flow_action_rss *rss; 4113 union { 4114 struct rte_flow_expand_rss buf; 4115 uint8_t buffer[2048]; 4116 } expand_buffer; 4117 union { 4118 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 4119 uint8_t buffer[2048]; 4120 } actions_rx; 4121 union { 4122 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 4123 uint8_t buffer[2048]; 4124 } actions_hairpin_tx; 4125 union { 4126 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 4127 uint8_t buffer[2048]; 4128 } items_tx; 4129 struct rte_flow_expand_rss *buf = &expand_buffer.buf; 4130 const struct rte_flow_action *p_actions_rx = actions; 4131 int ret; 4132 uint32_t i; 4133 uint32_t flow_size; 4134 int hairpin_flow = 0; 4135 uint32_t hairpin_id = 0; 4136 struct rte_flow_attr attr_tx = { .priority = 0 }; 4137 4138 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 4139 if (hairpin_flow > 0) { 4140 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 4141 rte_errno = EINVAL; 4142 return NULL; 4143 } 4144 flow_hairpin_split(dev, actions, actions_rx.actions, 4145 actions_hairpin_tx.actions, items_tx.items, 4146 &hairpin_id); 4147 p_actions_rx = actions_rx.actions; 4148 } 4149 ret = flow_drv_validate(dev, attr, items, p_actions_rx, external, 4150 error); 4151 if (ret < 0) 4152 goto error_before_flow; 4153 flow_size = sizeof(struct rte_flow); 4154 rss = flow_get_rss_action(p_actions_rx); 4155 if (rss) 4156 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t), 4157 sizeof(void *)); 4158 else 4159 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *)); 4160 flow = rte_calloc(__func__, 1, flow_size, 0); 4161 if (!flow) { 4162 rte_errno = ENOMEM; 4163 goto error_before_flow; 4164 } 4165 flow->drv_type = flow_get_drv_type(dev, attr); 4166 if (hairpin_id != 0) 4167 flow->hairpin_flow_id = hairpin_id; 4168 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && 4169 flow->drv_type < MLX5_FLOW_TYPE_MAX); 4170 flow->rss.queue = (void *)(flow + 1); 4171 if (rss) { 4172 /* 4173 * The following information is required by 4174 * mlx5_flow_hashfields_adjust() in advance. 4175 */ 4176 flow->rss.level = rss->level; 4177 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */ 4178 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types; 4179 } 4180 LIST_INIT(&flow->dev_flows); 4181 if (rss && rss->types) { 4182 unsigned int graph_root; 4183 4184 graph_root = find_graph_root(items, rss->level); 4185 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 4186 items, rss->types, 4187 mlx5_support_expansion, 4188 graph_root); 4189 assert(ret > 0 && 4190 (unsigned int)ret < sizeof(expand_buffer.buffer)); 4191 } else { 4192 buf->entries = 1; 4193 buf->entry[0].pattern = (void *)(uintptr_t)items; 4194 } 4195 for (i = 0; i < buf->entries; ++i) { 4196 /* 4197 * The splitter may create multiple dev_flows, 4198 * depending on configuration. In the simplest 4199 * case it just creates unmodified original flow. 4200 */ 4201 ret = flow_create_split_outer(dev, flow, attr, 4202 buf->entry[i].pattern, 4203 p_actions_rx, external, 4204 error); 4205 if (ret < 0) 4206 goto error; 4207 } 4208 /* Create the tx flow. */ 4209 if (hairpin_flow) { 4210 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 4211 attr_tx.ingress = 0; 4212 attr_tx.egress = 1; 4213 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items, 4214 actions_hairpin_tx.actions, error); 4215 if (!dev_flow) 4216 goto error; 4217 dev_flow->flow = flow; 4218 dev_flow->external = 0; 4219 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next); 4220 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 4221 items_tx.items, 4222 actions_hairpin_tx.actions, error); 4223 if (ret < 0) 4224 goto error; 4225 } 4226 /* 4227 * Update the metadata register copy table. If extensive 4228 * metadata feature is enabled and registers are supported 4229 * we might create the extra rte_flow for each unique 4230 * MARK/FLAG action ID. 4231 * 4232 * The table is updated for ingress Flows only, because 4233 * the egress Flows belong to the different device and 4234 * copy table should be updated in peer NIC Rx domain. 4235 */ 4236 if (attr->ingress && 4237 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 4238 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 4239 if (ret) 4240 goto error; 4241 } 4242 if (dev->data->dev_started) { 4243 ret = flow_drv_apply(dev, flow, error); 4244 if (ret < 0) 4245 goto error; 4246 } 4247 if (list) 4248 TAILQ_INSERT_TAIL(list, flow, next); 4249 flow_rxq_flags_set(dev, flow); 4250 return flow; 4251 error_before_flow: 4252 if (hairpin_id) 4253 mlx5_flow_id_release(priv->sh->flow_id_pool, 4254 hairpin_id); 4255 return NULL; 4256 error: 4257 assert(flow); 4258 flow_mreg_del_copy_action(dev, flow); 4259 ret = rte_errno; /* Save rte_errno before cleanup. */ 4260 if (flow->hairpin_flow_id) 4261 mlx5_flow_id_release(priv->sh->flow_id_pool, 4262 flow->hairpin_flow_id); 4263 assert(flow); 4264 flow_drv_destroy(dev, flow); 4265 rte_free(flow); 4266 rte_errno = ret; /* Restore rte_errno. */ 4267 return NULL; 4268 } 4269 4270 /** 4271 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 4272 * incoming packets to table 1. 4273 * 4274 * Other flow rules, requested for group n, will be created in 4275 * e-switch table n+1. 4276 * Jump action to e-switch group n will be created to group n+1. 4277 * 4278 * Used when working in switchdev mode, to utilise advantages of table 1 4279 * and above. 4280 * 4281 * @param dev 4282 * Pointer to Ethernet device. 4283 * 4284 * @return 4285 * Pointer to flow on success, NULL otherwise and rte_errno is set. 4286 */ 4287 struct rte_flow * 4288 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 4289 { 4290 const struct rte_flow_attr attr = { 4291 .group = 0, 4292 .priority = 0, 4293 .ingress = 1, 4294 .egress = 0, 4295 .transfer = 1, 4296 }; 4297 const struct rte_flow_item pattern = { 4298 .type = RTE_FLOW_ITEM_TYPE_END, 4299 }; 4300 struct rte_flow_action_jump jump = { 4301 .group = 1, 4302 }; 4303 const struct rte_flow_action actions[] = { 4304 { 4305 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4306 .conf = &jump, 4307 }, 4308 { 4309 .type = RTE_FLOW_ACTION_TYPE_END, 4310 }, 4311 }; 4312 struct mlx5_priv *priv = dev->data->dev_private; 4313 struct rte_flow_error error; 4314 4315 return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern, 4316 actions, false, &error); 4317 } 4318 4319 /** 4320 * Create a flow. 4321 * 4322 * @see rte_flow_create() 4323 * @see rte_flow_ops 4324 */ 4325 struct rte_flow * 4326 mlx5_flow_create(struct rte_eth_dev *dev, 4327 const struct rte_flow_attr *attr, 4328 const struct rte_flow_item items[], 4329 const struct rte_flow_action actions[], 4330 struct rte_flow_error *error) 4331 { 4332 struct mlx5_priv *priv = dev->data->dev_private; 4333 4334 return flow_list_create(dev, &priv->flows, 4335 attr, items, actions, true, error); 4336 } 4337 4338 /** 4339 * Destroy a flow in a list. 4340 * 4341 * @param dev 4342 * Pointer to Ethernet device. 4343 * @param list 4344 * Pointer to a TAILQ flow list. If this parameter NULL, 4345 * there is no flow removal from the list. 4346 * @param[in] flow 4347 * Flow to destroy. 4348 */ 4349 static void 4350 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list, 4351 struct rte_flow *flow) 4352 { 4353 struct mlx5_priv *priv = dev->data->dev_private; 4354 4355 /* 4356 * Update RX queue flags only if port is started, otherwise it is 4357 * already clean. 4358 */ 4359 if (dev->data->dev_started) 4360 flow_rxq_flags_trim(dev, flow); 4361 if (flow->hairpin_flow_id) 4362 mlx5_flow_id_release(priv->sh->flow_id_pool, 4363 flow->hairpin_flow_id); 4364 flow_drv_destroy(dev, flow); 4365 if (list) 4366 TAILQ_REMOVE(list, flow, next); 4367 flow_mreg_del_copy_action(dev, flow); 4368 rte_free(flow->fdir); 4369 rte_free(flow); 4370 } 4371 4372 /** 4373 * Destroy all flows. 4374 * 4375 * @param dev 4376 * Pointer to Ethernet device. 4377 * @param list 4378 * Pointer to a TAILQ flow list. 4379 */ 4380 void 4381 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list) 4382 { 4383 while (!TAILQ_EMPTY(list)) { 4384 struct rte_flow *flow; 4385 4386 flow = TAILQ_FIRST(list); 4387 flow_list_destroy(dev, list, flow); 4388 } 4389 } 4390 4391 /** 4392 * Remove all flows. 4393 * 4394 * @param dev 4395 * Pointer to Ethernet device. 4396 * @param list 4397 * Pointer to a TAILQ flow list. 4398 */ 4399 void 4400 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list) 4401 { 4402 struct rte_flow *flow; 4403 4404 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) { 4405 flow_drv_remove(dev, flow); 4406 flow_mreg_stop_copy_action(dev, flow); 4407 } 4408 flow_mreg_del_default_copy_action(dev); 4409 flow_rxq_flags_clear(dev); 4410 } 4411 4412 /** 4413 * Add all flows. 4414 * 4415 * @param dev 4416 * Pointer to Ethernet device. 4417 * @param list 4418 * Pointer to a TAILQ flow list. 4419 * 4420 * @return 4421 * 0 on success, a negative errno value otherwise and rte_errno is set. 4422 */ 4423 int 4424 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list) 4425 { 4426 struct rte_flow *flow; 4427 struct rte_flow_error error; 4428 int ret = 0; 4429 4430 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 4431 ret = flow_mreg_add_default_copy_action(dev, &error); 4432 if (ret < 0) 4433 return -rte_errno; 4434 /* Apply Flows created by application. */ 4435 TAILQ_FOREACH(flow, list, next) { 4436 ret = flow_mreg_start_copy_action(dev, flow); 4437 if (ret < 0) 4438 goto error; 4439 ret = flow_drv_apply(dev, flow, &error); 4440 if (ret < 0) 4441 goto error; 4442 flow_rxq_flags_set(dev, flow); 4443 } 4444 return 0; 4445 error: 4446 ret = rte_errno; /* Save rte_errno before cleanup. */ 4447 mlx5_flow_stop(dev, list); 4448 rte_errno = ret; /* Restore rte_errno. */ 4449 return -rte_errno; 4450 } 4451 4452 /** 4453 * Verify the flow list is empty 4454 * 4455 * @param dev 4456 * Pointer to Ethernet device. 4457 * 4458 * @return the number of flows not released. 4459 */ 4460 int 4461 mlx5_flow_verify(struct rte_eth_dev *dev) 4462 { 4463 struct mlx5_priv *priv = dev->data->dev_private; 4464 struct rte_flow *flow; 4465 int ret = 0; 4466 4467 TAILQ_FOREACH(flow, &priv->flows, next) { 4468 DRV_LOG(DEBUG, "port %u flow %p still referenced", 4469 dev->data->port_id, (void *)flow); 4470 ++ret; 4471 } 4472 return ret; 4473 } 4474 4475 /** 4476 * Enable default hairpin egress flow. 4477 * 4478 * @param dev 4479 * Pointer to Ethernet device. 4480 * @param queue 4481 * The queue index. 4482 * 4483 * @return 4484 * 0 on success, a negative errno value otherwise and rte_errno is set. 4485 */ 4486 int 4487 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 4488 uint32_t queue) 4489 { 4490 struct mlx5_priv *priv = dev->data->dev_private; 4491 const struct rte_flow_attr attr = { 4492 .egress = 1, 4493 .priority = 0, 4494 }; 4495 struct mlx5_rte_flow_item_tx_queue queue_spec = { 4496 .queue = queue, 4497 }; 4498 struct mlx5_rte_flow_item_tx_queue queue_mask = { 4499 .queue = UINT32_MAX, 4500 }; 4501 struct rte_flow_item items[] = { 4502 { 4503 .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 4504 .spec = &queue_spec, 4505 .last = NULL, 4506 .mask = &queue_mask, 4507 }, 4508 { 4509 .type = RTE_FLOW_ITEM_TYPE_END, 4510 }, 4511 }; 4512 struct rte_flow_action_jump jump = { 4513 .group = MLX5_HAIRPIN_TX_TABLE, 4514 }; 4515 struct rte_flow_action actions[2]; 4516 struct rte_flow *flow; 4517 struct rte_flow_error error; 4518 4519 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 4520 actions[0].conf = &jump; 4521 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 4522 flow = flow_list_create(dev, &priv->ctrl_flows, 4523 &attr, items, actions, false, &error); 4524 if (!flow) { 4525 DRV_LOG(DEBUG, 4526 "Failed to create ctrl flow: rte_errno(%d)," 4527 " type(%d), message(%s)", 4528 rte_errno, error.type, 4529 error.message ? error.message : " (no stated reason)"); 4530 return -rte_errno; 4531 } 4532 return 0; 4533 } 4534 4535 /** 4536 * Enable a control flow configured from the control plane. 4537 * 4538 * @param dev 4539 * Pointer to Ethernet device. 4540 * @param eth_spec 4541 * An Ethernet flow spec to apply. 4542 * @param eth_mask 4543 * An Ethernet flow mask to apply. 4544 * @param vlan_spec 4545 * A VLAN flow spec to apply. 4546 * @param vlan_mask 4547 * A VLAN flow mask to apply. 4548 * 4549 * @return 4550 * 0 on success, a negative errno value otherwise and rte_errno is set. 4551 */ 4552 int 4553 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 4554 struct rte_flow_item_eth *eth_spec, 4555 struct rte_flow_item_eth *eth_mask, 4556 struct rte_flow_item_vlan *vlan_spec, 4557 struct rte_flow_item_vlan *vlan_mask) 4558 { 4559 struct mlx5_priv *priv = dev->data->dev_private; 4560 const struct rte_flow_attr attr = { 4561 .ingress = 1, 4562 .priority = MLX5_FLOW_PRIO_RSVD, 4563 }; 4564 struct rte_flow_item items[] = { 4565 { 4566 .type = RTE_FLOW_ITEM_TYPE_ETH, 4567 .spec = eth_spec, 4568 .last = NULL, 4569 .mask = eth_mask, 4570 }, 4571 { 4572 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 4573 RTE_FLOW_ITEM_TYPE_END, 4574 .spec = vlan_spec, 4575 .last = NULL, 4576 .mask = vlan_mask, 4577 }, 4578 { 4579 .type = RTE_FLOW_ITEM_TYPE_END, 4580 }, 4581 }; 4582 uint16_t queue[priv->reta_idx_n]; 4583 struct rte_flow_action_rss action_rss = { 4584 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 4585 .level = 0, 4586 .types = priv->rss_conf.rss_hf, 4587 .key_len = priv->rss_conf.rss_key_len, 4588 .queue_num = priv->reta_idx_n, 4589 .key = priv->rss_conf.rss_key, 4590 .queue = queue, 4591 }; 4592 struct rte_flow_action actions[] = { 4593 { 4594 .type = RTE_FLOW_ACTION_TYPE_RSS, 4595 .conf = &action_rss, 4596 }, 4597 { 4598 .type = RTE_FLOW_ACTION_TYPE_END, 4599 }, 4600 }; 4601 struct rte_flow *flow; 4602 struct rte_flow_error error; 4603 unsigned int i; 4604 4605 if (!priv->reta_idx_n || !priv->rxqs_n) { 4606 return 0; 4607 } 4608 for (i = 0; i != priv->reta_idx_n; ++i) 4609 queue[i] = (*priv->reta_idx)[i]; 4610 flow = flow_list_create(dev, &priv->ctrl_flows, 4611 &attr, items, actions, false, &error); 4612 if (!flow) 4613 return -rte_errno; 4614 return 0; 4615 } 4616 4617 /** 4618 * Enable a flow control configured from the control plane. 4619 * 4620 * @param dev 4621 * Pointer to Ethernet device. 4622 * @param eth_spec 4623 * An Ethernet flow spec to apply. 4624 * @param eth_mask 4625 * An Ethernet flow mask to apply. 4626 * 4627 * @return 4628 * 0 on success, a negative errno value otherwise and rte_errno is set. 4629 */ 4630 int 4631 mlx5_ctrl_flow(struct rte_eth_dev *dev, 4632 struct rte_flow_item_eth *eth_spec, 4633 struct rte_flow_item_eth *eth_mask) 4634 { 4635 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 4636 } 4637 4638 /** 4639 * Destroy a flow. 4640 * 4641 * @see rte_flow_destroy() 4642 * @see rte_flow_ops 4643 */ 4644 int 4645 mlx5_flow_destroy(struct rte_eth_dev *dev, 4646 struct rte_flow *flow, 4647 struct rte_flow_error *error __rte_unused) 4648 { 4649 struct mlx5_priv *priv = dev->data->dev_private; 4650 4651 flow_list_destroy(dev, &priv->flows, flow); 4652 return 0; 4653 } 4654 4655 /** 4656 * Destroy all flows. 4657 * 4658 * @see rte_flow_flush() 4659 * @see rte_flow_ops 4660 */ 4661 int 4662 mlx5_flow_flush(struct rte_eth_dev *dev, 4663 struct rte_flow_error *error __rte_unused) 4664 { 4665 struct mlx5_priv *priv = dev->data->dev_private; 4666 4667 mlx5_flow_list_flush(dev, &priv->flows); 4668 return 0; 4669 } 4670 4671 /** 4672 * Isolated mode. 4673 * 4674 * @see rte_flow_isolate() 4675 * @see rte_flow_ops 4676 */ 4677 int 4678 mlx5_flow_isolate(struct rte_eth_dev *dev, 4679 int enable, 4680 struct rte_flow_error *error) 4681 { 4682 struct mlx5_priv *priv = dev->data->dev_private; 4683 4684 if (dev->data->dev_started) { 4685 rte_flow_error_set(error, EBUSY, 4686 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 4687 NULL, 4688 "port must be stopped first"); 4689 return -rte_errno; 4690 } 4691 priv->isolated = !!enable; 4692 if (enable) 4693 dev->dev_ops = &mlx5_dev_ops_isolate; 4694 else 4695 dev->dev_ops = &mlx5_dev_ops; 4696 return 0; 4697 } 4698 4699 /** 4700 * Query a flow. 4701 * 4702 * @see rte_flow_query() 4703 * @see rte_flow_ops 4704 */ 4705 static int 4706 flow_drv_query(struct rte_eth_dev *dev, 4707 struct rte_flow *flow, 4708 const struct rte_flow_action *actions, 4709 void *data, 4710 struct rte_flow_error *error) 4711 { 4712 const struct mlx5_flow_driver_ops *fops; 4713 enum mlx5_flow_drv_type ftype = flow->drv_type; 4714 4715 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 4716 fops = flow_get_drv_ops(ftype); 4717 4718 return fops->query(dev, flow, actions, data, error); 4719 } 4720 4721 /** 4722 * Query a flow. 4723 * 4724 * @see rte_flow_query() 4725 * @see rte_flow_ops 4726 */ 4727 int 4728 mlx5_flow_query(struct rte_eth_dev *dev, 4729 struct rte_flow *flow, 4730 const struct rte_flow_action *actions, 4731 void *data, 4732 struct rte_flow_error *error) 4733 { 4734 int ret; 4735 4736 ret = flow_drv_query(dev, flow, actions, data, error); 4737 if (ret < 0) 4738 return ret; 4739 return 0; 4740 } 4741 4742 /** 4743 * Convert a flow director filter to a generic flow. 4744 * 4745 * @param dev 4746 * Pointer to Ethernet device. 4747 * @param fdir_filter 4748 * Flow director filter to add. 4749 * @param attributes 4750 * Generic flow parameters structure. 4751 * 4752 * @return 4753 * 0 on success, a negative errno value otherwise and rte_errno is set. 4754 */ 4755 static int 4756 flow_fdir_filter_convert(struct rte_eth_dev *dev, 4757 const struct rte_eth_fdir_filter *fdir_filter, 4758 struct mlx5_fdir *attributes) 4759 { 4760 struct mlx5_priv *priv = dev->data->dev_private; 4761 const struct rte_eth_fdir_input *input = &fdir_filter->input; 4762 const struct rte_eth_fdir_masks *mask = 4763 &dev->data->dev_conf.fdir_conf.mask; 4764 4765 /* Validate queue number. */ 4766 if (fdir_filter->action.rx_queue >= priv->rxqs_n) { 4767 DRV_LOG(ERR, "port %u invalid queue number %d", 4768 dev->data->port_id, fdir_filter->action.rx_queue); 4769 rte_errno = EINVAL; 4770 return -rte_errno; 4771 } 4772 attributes->attr.ingress = 1; 4773 attributes->items[0] = (struct rte_flow_item) { 4774 .type = RTE_FLOW_ITEM_TYPE_ETH, 4775 .spec = &attributes->l2, 4776 .mask = &attributes->l2_mask, 4777 }; 4778 switch (fdir_filter->action.behavior) { 4779 case RTE_ETH_FDIR_ACCEPT: 4780 attributes->actions[0] = (struct rte_flow_action){ 4781 .type = RTE_FLOW_ACTION_TYPE_QUEUE, 4782 .conf = &attributes->queue, 4783 }; 4784 break; 4785 case RTE_ETH_FDIR_REJECT: 4786 attributes->actions[0] = (struct rte_flow_action){ 4787 .type = RTE_FLOW_ACTION_TYPE_DROP, 4788 }; 4789 break; 4790 default: 4791 DRV_LOG(ERR, "port %u invalid behavior %d", 4792 dev->data->port_id, 4793 fdir_filter->action.behavior); 4794 rte_errno = ENOTSUP; 4795 return -rte_errno; 4796 } 4797 attributes->queue.index = fdir_filter->action.rx_queue; 4798 /* Handle L3. */ 4799 switch (fdir_filter->input.flow_type) { 4800 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 4801 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 4802 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 4803 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){ 4804 .src_addr = input->flow.ip4_flow.src_ip, 4805 .dst_addr = input->flow.ip4_flow.dst_ip, 4806 .time_to_live = input->flow.ip4_flow.ttl, 4807 .type_of_service = input->flow.ip4_flow.tos, 4808 }; 4809 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){ 4810 .src_addr = mask->ipv4_mask.src_ip, 4811 .dst_addr = mask->ipv4_mask.dst_ip, 4812 .time_to_live = mask->ipv4_mask.ttl, 4813 .type_of_service = mask->ipv4_mask.tos, 4814 .next_proto_id = mask->ipv4_mask.proto, 4815 }; 4816 attributes->items[1] = (struct rte_flow_item){ 4817 .type = RTE_FLOW_ITEM_TYPE_IPV4, 4818 .spec = &attributes->l3, 4819 .mask = &attributes->l3_mask, 4820 }; 4821 break; 4822 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 4823 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 4824 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 4825 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){ 4826 .hop_limits = input->flow.ipv6_flow.hop_limits, 4827 .proto = input->flow.ipv6_flow.proto, 4828 }; 4829 4830 memcpy(attributes->l3.ipv6.hdr.src_addr, 4831 input->flow.ipv6_flow.src_ip, 4832 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 4833 memcpy(attributes->l3.ipv6.hdr.dst_addr, 4834 input->flow.ipv6_flow.dst_ip, 4835 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 4836 memcpy(attributes->l3_mask.ipv6.hdr.src_addr, 4837 mask->ipv6_mask.src_ip, 4838 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 4839 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr, 4840 mask->ipv6_mask.dst_ip, 4841 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 4842 attributes->items[1] = (struct rte_flow_item){ 4843 .type = RTE_FLOW_ITEM_TYPE_IPV6, 4844 .spec = &attributes->l3, 4845 .mask = &attributes->l3_mask, 4846 }; 4847 break; 4848 default: 4849 DRV_LOG(ERR, "port %u invalid flow type%d", 4850 dev->data->port_id, fdir_filter->input.flow_type); 4851 rte_errno = ENOTSUP; 4852 return -rte_errno; 4853 } 4854 /* Handle L4. */ 4855 switch (fdir_filter->input.flow_type) { 4856 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 4857 attributes->l4.udp.hdr = (struct rte_udp_hdr){ 4858 .src_port = input->flow.udp4_flow.src_port, 4859 .dst_port = input->flow.udp4_flow.dst_port, 4860 }; 4861 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){ 4862 .src_port = mask->src_port_mask, 4863 .dst_port = mask->dst_port_mask, 4864 }; 4865 attributes->items[2] = (struct rte_flow_item){ 4866 .type = RTE_FLOW_ITEM_TYPE_UDP, 4867 .spec = &attributes->l4, 4868 .mask = &attributes->l4_mask, 4869 }; 4870 break; 4871 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 4872 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){ 4873 .src_port = input->flow.tcp4_flow.src_port, 4874 .dst_port = input->flow.tcp4_flow.dst_port, 4875 }; 4876 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){ 4877 .src_port = mask->src_port_mask, 4878 .dst_port = mask->dst_port_mask, 4879 }; 4880 attributes->items[2] = (struct rte_flow_item){ 4881 .type = RTE_FLOW_ITEM_TYPE_TCP, 4882 .spec = &attributes->l4, 4883 .mask = &attributes->l4_mask, 4884 }; 4885 break; 4886 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 4887 attributes->l4.udp.hdr = (struct rte_udp_hdr){ 4888 .src_port = input->flow.udp6_flow.src_port, 4889 .dst_port = input->flow.udp6_flow.dst_port, 4890 }; 4891 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){ 4892 .src_port = mask->src_port_mask, 4893 .dst_port = mask->dst_port_mask, 4894 }; 4895 attributes->items[2] = (struct rte_flow_item){ 4896 .type = RTE_FLOW_ITEM_TYPE_UDP, 4897 .spec = &attributes->l4, 4898 .mask = &attributes->l4_mask, 4899 }; 4900 break; 4901 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 4902 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){ 4903 .src_port = input->flow.tcp6_flow.src_port, 4904 .dst_port = input->flow.tcp6_flow.dst_port, 4905 }; 4906 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){ 4907 .src_port = mask->src_port_mask, 4908 .dst_port = mask->dst_port_mask, 4909 }; 4910 attributes->items[2] = (struct rte_flow_item){ 4911 .type = RTE_FLOW_ITEM_TYPE_TCP, 4912 .spec = &attributes->l4, 4913 .mask = &attributes->l4_mask, 4914 }; 4915 break; 4916 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 4917 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 4918 break; 4919 default: 4920 DRV_LOG(ERR, "port %u invalid flow type%d", 4921 dev->data->port_id, fdir_filter->input.flow_type); 4922 rte_errno = ENOTSUP; 4923 return -rte_errno; 4924 } 4925 return 0; 4926 } 4927 4928 #define FLOW_FDIR_CMP(f1, f2, fld) \ 4929 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld)) 4930 4931 /** 4932 * Compare two FDIR flows. If items and actions are identical, the two flows are 4933 * regarded as same. 4934 * 4935 * @param dev 4936 * Pointer to Ethernet device. 4937 * @param f1 4938 * FDIR flow to compare. 4939 * @param f2 4940 * FDIR flow to compare. 4941 * 4942 * @return 4943 * Zero on match, 1 otherwise. 4944 */ 4945 static int 4946 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2) 4947 { 4948 if (FLOW_FDIR_CMP(f1, f2, attr) || 4949 FLOW_FDIR_CMP(f1, f2, l2) || 4950 FLOW_FDIR_CMP(f1, f2, l2_mask) || 4951 FLOW_FDIR_CMP(f1, f2, l3) || 4952 FLOW_FDIR_CMP(f1, f2, l3_mask) || 4953 FLOW_FDIR_CMP(f1, f2, l4) || 4954 FLOW_FDIR_CMP(f1, f2, l4_mask) || 4955 FLOW_FDIR_CMP(f1, f2, actions[0].type)) 4956 return 1; 4957 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE && 4958 FLOW_FDIR_CMP(f1, f2, queue)) 4959 return 1; 4960 return 0; 4961 } 4962 4963 /** 4964 * Search device flow list to find out a matched FDIR flow. 4965 * 4966 * @param dev 4967 * Pointer to Ethernet device. 4968 * @param fdir_flow 4969 * FDIR flow to lookup. 4970 * 4971 * @return 4972 * Pointer of flow if found, NULL otherwise. 4973 */ 4974 static struct rte_flow * 4975 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow) 4976 { 4977 struct mlx5_priv *priv = dev->data->dev_private; 4978 struct rte_flow *flow = NULL; 4979 4980 assert(fdir_flow); 4981 TAILQ_FOREACH(flow, &priv->flows, next) { 4982 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) { 4983 DRV_LOG(DEBUG, "port %u found FDIR flow %p", 4984 dev->data->port_id, (void *)flow); 4985 break; 4986 } 4987 } 4988 return flow; 4989 } 4990 4991 /** 4992 * Add new flow director filter and store it in list. 4993 * 4994 * @param dev 4995 * Pointer to Ethernet device. 4996 * @param fdir_filter 4997 * Flow director filter to add. 4998 * 4999 * @return 5000 * 0 on success, a negative errno value otherwise and rte_errno is set. 5001 */ 5002 static int 5003 flow_fdir_filter_add(struct rte_eth_dev *dev, 5004 const struct rte_eth_fdir_filter *fdir_filter) 5005 { 5006 struct mlx5_priv *priv = dev->data->dev_private; 5007 struct mlx5_fdir *fdir_flow; 5008 struct rte_flow *flow; 5009 int ret; 5010 5011 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0); 5012 if (!fdir_flow) { 5013 rte_errno = ENOMEM; 5014 return -rte_errno; 5015 } 5016 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow); 5017 if (ret) 5018 goto error; 5019 flow = flow_fdir_filter_lookup(dev, fdir_flow); 5020 if (flow) { 5021 rte_errno = EEXIST; 5022 goto error; 5023 } 5024 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr, 5025 fdir_flow->items, fdir_flow->actions, true, 5026 NULL); 5027 if (!flow) 5028 goto error; 5029 assert(!flow->fdir); 5030 flow->fdir = fdir_flow; 5031 DRV_LOG(DEBUG, "port %u created FDIR flow %p", 5032 dev->data->port_id, (void *)flow); 5033 return 0; 5034 error: 5035 rte_free(fdir_flow); 5036 return -rte_errno; 5037 } 5038 5039 /** 5040 * Delete specific filter. 5041 * 5042 * @param dev 5043 * Pointer to Ethernet device. 5044 * @param fdir_filter 5045 * Filter to be deleted. 5046 * 5047 * @return 5048 * 0 on success, a negative errno value otherwise and rte_errno is set. 5049 */ 5050 static int 5051 flow_fdir_filter_delete(struct rte_eth_dev *dev, 5052 const struct rte_eth_fdir_filter *fdir_filter) 5053 { 5054 struct mlx5_priv *priv = dev->data->dev_private; 5055 struct rte_flow *flow; 5056 struct mlx5_fdir fdir_flow = { 5057 .attr.group = 0, 5058 }; 5059 int ret; 5060 5061 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow); 5062 if (ret) 5063 return -rte_errno; 5064 flow = flow_fdir_filter_lookup(dev, &fdir_flow); 5065 if (!flow) { 5066 rte_errno = ENOENT; 5067 return -rte_errno; 5068 } 5069 flow_list_destroy(dev, &priv->flows, flow); 5070 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p", 5071 dev->data->port_id, (void *)flow); 5072 return 0; 5073 } 5074 5075 /** 5076 * Update queue for specific filter. 5077 * 5078 * @param dev 5079 * Pointer to Ethernet device. 5080 * @param fdir_filter 5081 * Filter to be updated. 5082 * 5083 * @return 5084 * 0 on success, a negative errno value otherwise and rte_errno is set. 5085 */ 5086 static int 5087 flow_fdir_filter_update(struct rte_eth_dev *dev, 5088 const struct rte_eth_fdir_filter *fdir_filter) 5089 { 5090 int ret; 5091 5092 ret = flow_fdir_filter_delete(dev, fdir_filter); 5093 if (ret) 5094 return ret; 5095 return flow_fdir_filter_add(dev, fdir_filter); 5096 } 5097 5098 /** 5099 * Flush all filters. 5100 * 5101 * @param dev 5102 * Pointer to Ethernet device. 5103 */ 5104 static void 5105 flow_fdir_filter_flush(struct rte_eth_dev *dev) 5106 { 5107 struct mlx5_priv *priv = dev->data->dev_private; 5108 5109 mlx5_flow_list_flush(dev, &priv->flows); 5110 } 5111 5112 /** 5113 * Get flow director information. 5114 * 5115 * @param dev 5116 * Pointer to Ethernet device. 5117 * @param[out] fdir_info 5118 * Resulting flow director information. 5119 */ 5120 static void 5121 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info) 5122 { 5123 struct rte_eth_fdir_masks *mask = 5124 &dev->data->dev_conf.fdir_conf.mask; 5125 5126 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode; 5127 fdir_info->guarant_spc = 0; 5128 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask)); 5129 fdir_info->max_flexpayload = 0; 5130 fdir_info->flow_types_mask[0] = 0; 5131 fdir_info->flex_payload_unit = 0; 5132 fdir_info->max_flex_payload_segment_num = 0; 5133 fdir_info->flex_payload_limit = 0; 5134 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf)); 5135 } 5136 5137 /** 5138 * Deal with flow director operations. 5139 * 5140 * @param dev 5141 * Pointer to Ethernet device. 5142 * @param filter_op 5143 * Operation to perform. 5144 * @param arg 5145 * Pointer to operation-specific structure. 5146 * 5147 * @return 5148 * 0 on success, a negative errno value otherwise and rte_errno is set. 5149 */ 5150 static int 5151 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op, 5152 void *arg) 5153 { 5154 enum rte_fdir_mode fdir_mode = 5155 dev->data->dev_conf.fdir_conf.mode; 5156 5157 if (filter_op == RTE_ETH_FILTER_NOP) 5158 return 0; 5159 if (fdir_mode != RTE_FDIR_MODE_PERFECT && 5160 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) { 5161 DRV_LOG(ERR, "port %u flow director mode %d not supported", 5162 dev->data->port_id, fdir_mode); 5163 rte_errno = EINVAL; 5164 return -rte_errno; 5165 } 5166 switch (filter_op) { 5167 case RTE_ETH_FILTER_ADD: 5168 return flow_fdir_filter_add(dev, arg); 5169 case RTE_ETH_FILTER_UPDATE: 5170 return flow_fdir_filter_update(dev, arg); 5171 case RTE_ETH_FILTER_DELETE: 5172 return flow_fdir_filter_delete(dev, arg); 5173 case RTE_ETH_FILTER_FLUSH: 5174 flow_fdir_filter_flush(dev); 5175 break; 5176 case RTE_ETH_FILTER_INFO: 5177 flow_fdir_info_get(dev, arg); 5178 break; 5179 default: 5180 DRV_LOG(DEBUG, "port %u unknown operation %u", 5181 dev->data->port_id, filter_op); 5182 rte_errno = EINVAL; 5183 return -rte_errno; 5184 } 5185 return 0; 5186 } 5187 5188 /** 5189 * Manage filter operations. 5190 * 5191 * @param dev 5192 * Pointer to Ethernet device structure. 5193 * @param filter_type 5194 * Filter type. 5195 * @param filter_op 5196 * Operation to perform. 5197 * @param arg 5198 * Pointer to operation-specific structure. 5199 * 5200 * @return 5201 * 0 on success, a negative errno value otherwise and rte_errno is set. 5202 */ 5203 int 5204 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 5205 enum rte_filter_type filter_type, 5206 enum rte_filter_op filter_op, 5207 void *arg) 5208 { 5209 switch (filter_type) { 5210 case RTE_ETH_FILTER_GENERIC: 5211 if (filter_op != RTE_ETH_FILTER_GET) { 5212 rte_errno = EINVAL; 5213 return -rte_errno; 5214 } 5215 *(const void **)arg = &mlx5_flow_ops; 5216 return 0; 5217 case RTE_ETH_FILTER_FDIR: 5218 return flow_fdir_ctrl_func(dev, filter_op, arg); 5219 default: 5220 DRV_LOG(ERR, "port %u filter type (%d) not supported", 5221 dev->data->port_id, filter_type); 5222 rte_errno = ENOTSUP; 5223 return -rte_errno; 5224 } 5225 return 0; 5226 } 5227 5228 /** 5229 * Create the needed meter and suffix tables. 5230 * 5231 * @param[in] dev 5232 * Pointer to Ethernet device. 5233 * @param[in] fm 5234 * Pointer to the flow meter. 5235 * 5236 * @return 5237 * Pointer to table set on success, NULL otherwise. 5238 */ 5239 struct mlx5_meter_domains_infos * 5240 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 5241 const struct mlx5_flow_meter *fm) 5242 { 5243 const struct mlx5_flow_driver_ops *fops; 5244 5245 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 5246 return fops->create_mtr_tbls(dev, fm); 5247 } 5248 5249 /** 5250 * Destroy the meter table set. 5251 * 5252 * @param[in] dev 5253 * Pointer to Ethernet device. 5254 * @param[in] tbl 5255 * Pointer to the meter table set. 5256 * 5257 * @return 5258 * 0 on success. 5259 */ 5260 int 5261 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 5262 struct mlx5_meter_domains_infos *tbls) 5263 { 5264 const struct mlx5_flow_driver_ops *fops; 5265 5266 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 5267 return fops->destroy_mtr_tbls(dev, tbls); 5268 } 5269 5270 /** 5271 * Create policer rules. 5272 * 5273 * @param[in] dev 5274 * Pointer to Ethernet device. 5275 * @param[in] fm 5276 * Pointer to flow meter structure. 5277 * @param[in] attr 5278 * Pointer to flow attributes. 5279 * 5280 * @return 5281 * 0 on success, -1 otherwise. 5282 */ 5283 int 5284 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev, 5285 struct mlx5_flow_meter *fm, 5286 const struct rte_flow_attr *attr) 5287 { 5288 const struct mlx5_flow_driver_ops *fops; 5289 5290 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 5291 return fops->create_policer_rules(dev, fm, attr); 5292 } 5293 5294 /** 5295 * Destroy policer rules. 5296 * 5297 * @param[in] fm 5298 * Pointer to flow meter structure. 5299 * @param[in] attr 5300 * Pointer to flow attributes. 5301 * 5302 * @return 5303 * 0 on success, -1 otherwise. 5304 */ 5305 int 5306 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev, 5307 struct mlx5_flow_meter *fm, 5308 const struct rte_flow_attr *attr) 5309 { 5310 const struct mlx5_flow_driver_ops *fops; 5311 5312 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 5313 return fops->destroy_policer_rules(dev, fm, attr); 5314 } 5315 5316 /** 5317 * Allocate a counter. 5318 * 5319 * @param[in] dev 5320 * Pointer to Ethernet device structure. 5321 * 5322 * @return 5323 * Pointer to allocated counter on success, NULL otherwise. 5324 */ 5325 struct mlx5_flow_counter * 5326 mlx5_counter_alloc(struct rte_eth_dev *dev) 5327 { 5328 const struct mlx5_flow_driver_ops *fops; 5329 struct rte_flow_attr attr = { .transfer = 0 }; 5330 5331 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 5332 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 5333 return fops->counter_alloc(dev); 5334 } 5335 DRV_LOG(ERR, 5336 "port %u counter allocate is not supported.", 5337 dev->data->port_id); 5338 return NULL; 5339 } 5340 5341 /** 5342 * Free a counter. 5343 * 5344 * @param[in] dev 5345 * Pointer to Ethernet device structure. 5346 * @param[in] cnt 5347 * Pointer to counter to be free. 5348 */ 5349 void 5350 mlx5_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt) 5351 { 5352 const struct mlx5_flow_driver_ops *fops; 5353 struct rte_flow_attr attr = { .transfer = 0 }; 5354 5355 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 5356 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 5357 fops->counter_free(dev, cnt); 5358 return; 5359 } 5360 DRV_LOG(ERR, 5361 "port %u counter free is not supported.", 5362 dev->data->port_id); 5363 } 5364 5365 /** 5366 * Query counter statistics. 5367 * 5368 * @param[in] dev 5369 * Pointer to Ethernet device structure. 5370 * @param[in] cnt 5371 * Pointer to counter to query. 5372 * @param[in] clear 5373 * Set to clear counter statistics. 5374 * @param[out] pkts 5375 * The counter hits packets number to save. 5376 * @param[out] bytes 5377 * The counter hits bytes number to save. 5378 * 5379 * @return 5380 * 0 on success, a negative errno value otherwise. 5381 */ 5382 int 5383 mlx5_counter_query(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt, 5384 bool clear, uint64_t *pkts, uint64_t *bytes) 5385 { 5386 const struct mlx5_flow_driver_ops *fops; 5387 struct rte_flow_attr attr = { .transfer = 0 }; 5388 5389 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 5390 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 5391 return fops->counter_query(dev, cnt, clear, pkts, bytes); 5392 } 5393 DRV_LOG(ERR, 5394 "port %u counter query is not supported.", 5395 dev->data->port_id); 5396 return -ENOTSUP; 5397 } 5398 5399 #define MLX5_POOL_QUERY_FREQ_US 1000000 5400 5401 /** 5402 * Set the periodic procedure for triggering asynchronous batch queries for all 5403 * the counter pools. 5404 * 5405 * @param[in] sh 5406 * Pointer to mlx5_ibv_shared object. 5407 */ 5408 void 5409 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh) 5410 { 5411 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0); 5412 uint32_t pools_n = rte_atomic16_read(&cont->n_valid); 5413 uint32_t us; 5414 5415 cont = MLX5_CNT_CONTAINER(sh, 1, 0); 5416 pools_n += rte_atomic16_read(&cont->n_valid); 5417 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 5418 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 5419 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 5420 sh->cmng.query_thread_on = 0; 5421 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 5422 } else { 5423 sh->cmng.query_thread_on = 1; 5424 } 5425 } 5426 5427 /** 5428 * The periodic procedure for triggering asynchronous batch queries for all the 5429 * counter pools. This function is probably called by the host thread. 5430 * 5431 * @param[in] arg 5432 * The parameter for the alarm process. 5433 */ 5434 void 5435 mlx5_flow_query_alarm(void *arg) 5436 { 5437 struct mlx5_ibv_shared *sh = arg; 5438 struct mlx5_devx_obj *dcs; 5439 uint16_t offset; 5440 int ret; 5441 uint8_t batch = sh->cmng.batch; 5442 uint16_t pool_index = sh->cmng.pool_index; 5443 struct mlx5_pools_container *cont; 5444 struct mlx5_pools_container *mcont; 5445 struct mlx5_flow_counter_pool *pool; 5446 5447 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 5448 goto set_alarm; 5449 next_container: 5450 cont = MLX5_CNT_CONTAINER(sh, batch, 1); 5451 mcont = MLX5_CNT_CONTAINER(sh, batch, 0); 5452 /* Check if resize was done and need to flip a container. */ 5453 if (cont != mcont) { 5454 if (cont->pools) { 5455 /* Clean the old container. */ 5456 rte_free(cont->pools); 5457 memset(cont, 0, sizeof(*cont)); 5458 } 5459 rte_cio_wmb(); 5460 /* Flip the host container. */ 5461 sh->cmng.mhi[batch] ^= (uint8_t)2; 5462 cont = mcont; 5463 } 5464 if (!cont->pools) { 5465 /* 2 empty containers case is unexpected. */ 5466 if (unlikely(batch != sh->cmng.batch)) 5467 goto set_alarm; 5468 batch ^= 0x1; 5469 pool_index = 0; 5470 goto next_container; 5471 } 5472 pool = cont->pools[pool_index]; 5473 if (pool->raw_hw) 5474 /* There is a pool query in progress. */ 5475 goto set_alarm; 5476 pool->raw_hw = 5477 LIST_FIRST(&sh->cmng.free_stat_raws); 5478 if (!pool->raw_hw) 5479 /* No free counter statistics raw memory. */ 5480 goto set_alarm; 5481 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read 5482 (&pool->a64_dcs); 5483 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL; 5484 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL - 5485 offset, NULL, NULL, 5486 pool->raw_hw->mem_mng->dm->id, 5487 (void *)(uintptr_t) 5488 (pool->raw_hw->data + offset), 5489 sh->devx_comp, 5490 (uint64_t)(uintptr_t)pool); 5491 if (ret) { 5492 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 5493 " %d", pool->min_dcs->id); 5494 pool->raw_hw = NULL; 5495 goto set_alarm; 5496 } 5497 pool->raw_hw->min_dcs_id = dcs->id; 5498 LIST_REMOVE(pool->raw_hw, next); 5499 sh->cmng.pending_queries++; 5500 pool_index++; 5501 if (pool_index >= rte_atomic16_read(&cont->n_valid)) { 5502 batch ^= 0x1; 5503 pool_index = 0; 5504 } 5505 set_alarm: 5506 sh->cmng.batch = batch; 5507 sh->cmng.pool_index = pool_index; 5508 mlx5_set_query_alarm(sh); 5509 } 5510 5511 /** 5512 * Handler for the HW respond about ready values from an asynchronous batch 5513 * query. This function is probably called by the host thread. 5514 * 5515 * @param[in] sh 5516 * The pointer to the shared IB device context. 5517 * @param[in] async_id 5518 * The Devx async ID. 5519 * @param[in] status 5520 * The status of the completion. 5521 */ 5522 void 5523 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh, 5524 uint64_t async_id, int status) 5525 { 5526 struct mlx5_flow_counter_pool *pool = 5527 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 5528 struct mlx5_counter_stats_raw *raw_to_free; 5529 5530 if (unlikely(status)) { 5531 raw_to_free = pool->raw_hw; 5532 } else { 5533 raw_to_free = pool->raw; 5534 rte_spinlock_lock(&pool->sl); 5535 pool->raw = pool->raw_hw; 5536 rte_spinlock_unlock(&pool->sl); 5537 rte_atomic64_add(&pool->query_gen, 1); 5538 /* Be sure the new raw counters data is updated in memory. */ 5539 rte_cio_wmb(); 5540 } 5541 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 5542 pool->raw_hw = NULL; 5543 sh->cmng.pending_queries--; 5544 } 5545 5546 /** 5547 * Translate the rte_flow group index to HW table value. 5548 * 5549 * @param[in] attributes 5550 * Pointer to flow attributes 5551 * @param[in] external 5552 * Value is part of flow rule created by request external to PMD. 5553 * @param[in] group 5554 * rte_flow group index value. 5555 * @param[out] table 5556 * HW table value. 5557 * @param[out] error 5558 * Pointer to error structure. 5559 * 5560 * @return 5561 * 0 on success, a negative errno value otherwise and rte_errno is set. 5562 */ 5563 int 5564 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external, 5565 uint32_t group, uint32_t *table, 5566 struct rte_flow_error *error) 5567 { 5568 if (attributes->transfer && external) { 5569 if (group == UINT32_MAX) 5570 return rte_flow_error_set 5571 (error, EINVAL, 5572 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 5573 NULL, 5574 "group index not supported"); 5575 *table = group + 1; 5576 } else { 5577 *table = group; 5578 } 5579 return 0; 5580 } 5581 5582 /** 5583 * Discover availability of metadata reg_c's. 5584 * 5585 * Iteratively use test flows to check availability. 5586 * 5587 * @param[in] dev 5588 * Pointer to the Ethernet device structure. 5589 * 5590 * @return 5591 * 0 on success, a negative errno value otherwise and rte_errno is set. 5592 */ 5593 int 5594 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 5595 { 5596 struct mlx5_priv *priv = dev->data->dev_private; 5597 struct mlx5_dev_config *config = &priv->config; 5598 enum modify_reg idx; 5599 int n = 0; 5600 5601 /* reg_c[0] and reg_c[1] are reserved. */ 5602 config->flow_mreg_c[n++] = REG_C_0; 5603 config->flow_mreg_c[n++] = REG_C_1; 5604 /* Discover availability of other reg_c's. */ 5605 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 5606 struct rte_flow_attr attr = { 5607 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 5608 .priority = MLX5_FLOW_PRIO_RSVD, 5609 .ingress = 1, 5610 }; 5611 struct rte_flow_item items[] = { 5612 [0] = { 5613 .type = RTE_FLOW_ITEM_TYPE_END, 5614 }, 5615 }; 5616 struct rte_flow_action actions[] = { 5617 [0] = { 5618 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5619 .conf = &(struct mlx5_flow_action_copy_mreg){ 5620 .src = REG_C_1, 5621 .dst = idx, 5622 }, 5623 }, 5624 [1] = { 5625 .type = RTE_FLOW_ACTION_TYPE_JUMP, 5626 .conf = &(struct rte_flow_action_jump){ 5627 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5628 }, 5629 }, 5630 [2] = { 5631 .type = RTE_FLOW_ACTION_TYPE_END, 5632 }, 5633 }; 5634 struct rte_flow *flow; 5635 struct rte_flow_error error; 5636 5637 if (!config->dv_flow_en) 5638 break; 5639 /* Create internal flow, validation skips copy action. */ 5640 flow = flow_list_create(dev, NULL, &attr, items, 5641 actions, false, &error); 5642 if (!flow) 5643 continue; 5644 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL)) 5645 config->flow_mreg_c[n++] = idx; 5646 flow_list_destroy(dev, NULL, flow); 5647 } 5648 for (; n < MLX5_MREG_C_NUM; ++n) 5649 config->flow_mreg_c[n] = REG_NONE; 5650 return 0; 5651 } 5652