1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <stdalign.h> 7 #include <stdint.h> 8 #include <string.h> 9 #include <stdbool.h> 10 #include <sys/queue.h> 11 12 #include <rte_common.h> 13 #include <rte_ether.h> 14 #include <ethdev_driver.h> 15 #include <rte_eal_paging.h> 16 #include <rte_flow.h> 17 #include <rte_cycles.h> 18 #include <rte_flow_driver.h> 19 #include <rte_malloc.h> 20 #include <rte_ip.h> 21 22 #include <mlx5_glue.h> 23 #include <mlx5_devx_cmds.h> 24 #include <mlx5_prm.h> 25 #include <mlx5_malloc.h> 26 27 #include "mlx5_defs.h" 28 #include "mlx5.h" 29 #include "mlx5_flow.h" 30 #include "mlx5_flow_os.h" 31 #include "mlx5_rx.h" 32 #include "mlx5_tx.h" 33 #include "mlx5_common_os.h" 34 #include "rte_pmd_mlx5.h" 35 36 struct tunnel_default_miss_ctx { 37 uint16_t *queue; 38 __extension__ 39 union { 40 struct rte_flow_action_rss action_rss; 41 struct rte_flow_action_queue miss_queue; 42 struct rte_flow_action_jump miss_jump; 43 uint8_t raw[0]; 44 }; 45 }; 46 47 static int 48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 49 struct rte_flow *flow, 50 const struct rte_flow_attr *attr, 51 const struct rte_flow_action *app_actions, 52 uint32_t flow_idx, 53 const struct mlx5_flow_tunnel *tunnel, 54 struct tunnel_default_miss_ctx *ctx, 55 struct rte_flow_error *error); 56 static struct mlx5_flow_tunnel * 57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 58 static void 59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 60 static uint32_t 61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 62 const struct mlx5_flow_tunnel *tunnel, 63 uint32_t group, uint32_t *table, 64 struct rte_flow_error *error); 65 66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void); 67 static void mlx5_flow_pop_thread_workspace(void); 68 69 70 /** Device flow drivers. */ 71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 72 73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 74 75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 76 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) 78 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 79 #endif 80 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 81 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 82 }; 83 84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 86 (const int []){ \ 87 __VA_ARGS__, 0, \ 88 } 89 90 /** Node object of input graph for mlx5_flow_expand_rss(). */ 91 struct mlx5_flow_expand_node { 92 const int *const next; 93 /**< 94 * List of next node indexes. Index 0 is interpreted as a terminator. 95 */ 96 const enum rte_flow_item_type type; 97 /**< Pattern item type of current node. */ 98 uint64_t rss_types; 99 /**< 100 * RSS types bit-field associated with this node 101 * (see RTE_ETH_RSS_* definitions). 102 */ 103 uint64_t node_flags; 104 /**< 105 * Bit-fields that define how the node is used in the expansion. 106 * (see MLX5_EXPANSION_NODE_* definitions). 107 */ 108 }; 109 110 /* Optional expand field. The expansion alg will not go deeper. */ 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0) 112 113 /* The node is not added implicitly as expansion to the flow pattern. 114 * If the node type does not match the flow pattern item type, the 115 * expansion alg will go deeper to its next items. 116 * In the current implementation, the list of next nodes indexes can 117 * have up to one node with this flag set and it has to be the last 118 * node index (before the list terminator). 119 */ 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1) 121 122 /** Object returned by mlx5_flow_expand_rss(). */ 123 struct mlx5_flow_expand_rss { 124 uint32_t entries; 125 /**< Number of entries @p patterns and @p priorities. */ 126 struct { 127 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 128 uint32_t priority; /**< Priority offset for each expansion. */ 129 } entry[]; 130 }; 131 132 static void 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item); 134 135 static const struct mlx5_flow_expand_node * 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern, 137 unsigned int item_idx, 138 const struct mlx5_flow_expand_node graph[], 139 const struct mlx5_flow_expand_node *node); 140 141 static bool 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item) 143 { 144 switch (item->type) { 145 case RTE_FLOW_ITEM_TYPE_ETH: 146 case RTE_FLOW_ITEM_TYPE_VLAN: 147 case RTE_FLOW_ITEM_TYPE_IPV4: 148 case RTE_FLOW_ITEM_TYPE_IPV6: 149 case RTE_FLOW_ITEM_TYPE_UDP: 150 case RTE_FLOW_ITEM_TYPE_TCP: 151 case RTE_FLOW_ITEM_TYPE_VXLAN: 152 case RTE_FLOW_ITEM_TYPE_NVGRE: 153 case RTE_FLOW_ITEM_TYPE_GRE: 154 case RTE_FLOW_ITEM_TYPE_GENEVE: 155 case RTE_FLOW_ITEM_TYPE_MPLS: 156 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE: 157 case RTE_FLOW_ITEM_TYPE_GRE_KEY: 158 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT: 159 case RTE_FLOW_ITEM_TYPE_GTP: 160 return true; 161 default: 162 break; 163 } 164 return false; 165 } 166 167 static enum rte_flow_item_type 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 169 { 170 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 171 uint16_t ether_type = 0; 172 uint16_t ether_type_m; 173 uint8_t ip_next_proto = 0; 174 uint8_t ip_next_proto_m; 175 176 if (item == NULL || item->spec == NULL) 177 return ret; 178 switch (item->type) { 179 case RTE_FLOW_ITEM_TYPE_ETH: 180 if (item->mask) 181 ether_type_m = ((const struct rte_flow_item_eth *) 182 (item->mask))->type; 183 else 184 ether_type_m = rte_flow_item_eth_mask.type; 185 if (ether_type_m != RTE_BE16(0xFFFF)) 186 break; 187 ether_type = ((const struct rte_flow_item_eth *) 188 (item->spec))->type; 189 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 190 ret = RTE_FLOW_ITEM_TYPE_IPV4; 191 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 192 ret = RTE_FLOW_ITEM_TYPE_IPV6; 193 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 194 ret = RTE_FLOW_ITEM_TYPE_VLAN; 195 else 196 ret = RTE_FLOW_ITEM_TYPE_END; 197 break; 198 case RTE_FLOW_ITEM_TYPE_VLAN: 199 if (item->mask) 200 ether_type_m = ((const struct rte_flow_item_vlan *) 201 (item->mask))->inner_type; 202 else 203 ether_type_m = rte_flow_item_vlan_mask.inner_type; 204 if (ether_type_m != RTE_BE16(0xFFFF)) 205 break; 206 ether_type = ((const struct rte_flow_item_vlan *) 207 (item->spec))->inner_type; 208 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 209 ret = RTE_FLOW_ITEM_TYPE_IPV4; 210 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 211 ret = RTE_FLOW_ITEM_TYPE_IPV6; 212 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 213 ret = RTE_FLOW_ITEM_TYPE_VLAN; 214 else 215 ret = RTE_FLOW_ITEM_TYPE_END; 216 break; 217 case RTE_FLOW_ITEM_TYPE_IPV4: 218 if (item->mask) 219 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 220 (item->mask))->hdr.next_proto_id; 221 else 222 ip_next_proto_m = 223 rte_flow_item_ipv4_mask.hdr.next_proto_id; 224 if (ip_next_proto_m != 0xFF) 225 break; 226 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 227 (item->spec))->hdr.next_proto_id; 228 if (ip_next_proto == IPPROTO_UDP) 229 ret = RTE_FLOW_ITEM_TYPE_UDP; 230 else if (ip_next_proto == IPPROTO_TCP) 231 ret = RTE_FLOW_ITEM_TYPE_TCP; 232 else if (ip_next_proto == IPPROTO_IP) 233 ret = RTE_FLOW_ITEM_TYPE_IPV4; 234 else if (ip_next_proto == IPPROTO_IPV6) 235 ret = RTE_FLOW_ITEM_TYPE_IPV6; 236 else 237 ret = RTE_FLOW_ITEM_TYPE_END; 238 break; 239 case RTE_FLOW_ITEM_TYPE_IPV6: 240 if (item->mask) 241 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 242 (item->mask))->hdr.proto; 243 else 244 ip_next_proto_m = 245 rte_flow_item_ipv6_mask.hdr.proto; 246 if (ip_next_proto_m != 0xFF) 247 break; 248 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 249 (item->spec))->hdr.proto; 250 if (ip_next_proto == IPPROTO_UDP) 251 ret = RTE_FLOW_ITEM_TYPE_UDP; 252 else if (ip_next_proto == IPPROTO_TCP) 253 ret = RTE_FLOW_ITEM_TYPE_TCP; 254 else if (ip_next_proto == IPPROTO_IP) 255 ret = RTE_FLOW_ITEM_TYPE_IPV4; 256 else if (ip_next_proto == IPPROTO_IPV6) 257 ret = RTE_FLOW_ITEM_TYPE_IPV6; 258 else 259 ret = RTE_FLOW_ITEM_TYPE_END; 260 break; 261 default: 262 ret = RTE_FLOW_ITEM_TYPE_VOID; 263 break; 264 } 265 return ret; 266 } 267 268 static const int * 269 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[], 270 const int *next_node) 271 { 272 const struct mlx5_flow_expand_node *node = NULL; 273 const int *next = next_node; 274 275 while (next && *next) { 276 /* 277 * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT 278 * flag set, because they were not found in the flow pattern. 279 */ 280 node = &graph[*next]; 281 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT)) 282 break; 283 next = node->next; 284 } 285 return next; 286 } 287 288 #define MLX5_RSS_EXP_ELT_N 16 289 290 /** 291 * Expand RSS flows into several possible flows according to the RSS hash 292 * fields requested and the driver capabilities. 293 * 294 * @param[out] buf 295 * Buffer to store the result expansion. 296 * @param[in] size 297 * Buffer size in bytes. If 0, @p buf can be NULL. 298 * @param[in] pattern 299 * User flow pattern. 300 * @param[in] types 301 * RSS types to expand (see RTE_ETH_RSS_* definitions). 302 * @param[in] graph 303 * Input graph to expand @p pattern according to @p types. 304 * @param[in] graph_root_index 305 * Index of root node in @p graph, typically 0. 306 * 307 * @return 308 * A positive value representing the size of @p buf in bytes regardless of 309 * @p size on success, a negative errno value otherwise and rte_errno is 310 * set, the following errors are defined: 311 * 312 * -E2BIG: graph-depth @p graph is too deep. 313 * -EINVAL: @p size has not enough space for expanded pattern. 314 */ 315 static int 316 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 317 const struct rte_flow_item *pattern, uint64_t types, 318 const struct mlx5_flow_expand_node graph[], 319 int graph_root_index) 320 { 321 const struct rte_flow_item *item; 322 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 323 const int *next_node; 324 const int *stack[MLX5_RSS_EXP_ELT_N]; 325 int stack_pos = 0; 326 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N]; 327 unsigned int i, item_idx, last_expand_item_idx = 0; 328 size_t lsize; 329 size_t user_pattern_size = 0; 330 void *addr = NULL; 331 const struct mlx5_flow_expand_node *next = NULL; 332 struct rte_flow_item missed_item; 333 int missed = 0; 334 int elt = 0; 335 const struct rte_flow_item *last_expand_item = NULL; 336 337 memset(&missed_item, 0, sizeof(missed_item)); 338 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 339 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]); 340 if (lsize > size) 341 return -EINVAL; 342 buf->entry[0].priority = 0; 343 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N]; 344 buf->entries = 0; 345 addr = buf->entry[0].pattern; 346 for (item = pattern, item_idx = 0; 347 item->type != RTE_FLOW_ITEM_TYPE_END; 348 item++, item_idx++) { 349 if (!mlx5_flow_is_rss_expandable_item(item)) { 350 user_pattern_size += sizeof(*item); 351 continue; 352 } 353 last_expand_item = item; 354 last_expand_item_idx = item_idx; 355 i = 0; 356 while (node->next && node->next[i]) { 357 next = &graph[node->next[i]]; 358 if (next->type == item->type) 359 break; 360 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) { 361 node = next; 362 i = 0; 363 } else { 364 ++i; 365 } 366 } 367 if (next) 368 node = next; 369 user_pattern_size += sizeof(*item); 370 } 371 user_pattern_size += sizeof(*item); /* Handle END item. */ 372 lsize += user_pattern_size; 373 if (lsize > size) 374 return -EINVAL; 375 /* Copy the user pattern in the first entry of the buffer. */ 376 rte_memcpy(addr, pattern, user_pattern_size); 377 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 378 buf->entries = 1; 379 /* Start expanding. */ 380 memset(flow_items, 0, sizeof(flow_items)); 381 user_pattern_size -= sizeof(*item); 382 /* 383 * Check if the last valid item has spec set, need complete pattern, 384 * and the pattern can be used for expansion. 385 */ 386 missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item); 387 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 388 /* Item type END indicates expansion is not required. */ 389 return lsize; 390 } 391 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 392 next = NULL; 393 missed = 1; 394 i = 0; 395 while (node->next && node->next[i]) { 396 next = &graph[node->next[i]]; 397 if (next->type == missed_item.type) { 398 flow_items[0].type = missed_item.type; 399 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 400 break; 401 } 402 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) { 403 node = next; 404 i = 0; 405 } else { 406 ++i; 407 } 408 next = NULL; 409 } 410 } 411 if (next && missed) { 412 elt = 2; /* missed item + item end. */ 413 node = next; 414 lsize += elt * sizeof(*item) + user_pattern_size; 415 if (lsize > size) 416 return -EINVAL; 417 if (node->rss_types & types) { 418 buf->entry[buf->entries].priority = 1; 419 buf->entry[buf->entries].pattern = addr; 420 buf->entries++; 421 rte_memcpy(addr, buf->entry[0].pattern, 422 user_pattern_size); 423 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 424 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 425 addr = (void *)(((uintptr_t)addr) + 426 elt * sizeof(*item)); 427 } 428 } else if (last_expand_item != NULL) { 429 node = mlx5_flow_expand_rss_adjust_node(pattern, 430 last_expand_item_idx, graph, node); 431 } 432 memset(flow_items, 0, sizeof(flow_items)); 433 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 434 node->next); 435 stack[stack_pos] = next_node; 436 node = next_node ? &graph[*next_node] : NULL; 437 while (node) { 438 flow_items[stack_pos].type = node->type; 439 if (node->rss_types & types) { 440 size_t n; 441 /* 442 * compute the number of items to copy from the 443 * expansion and copy it. 444 * When the stack_pos is 0, there are 1 element in it, 445 * plus the addition END item. 446 */ 447 elt = stack_pos + 2; 448 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 449 lsize += elt * sizeof(*item) + user_pattern_size; 450 if (lsize > size) 451 return -EINVAL; 452 n = elt * sizeof(*item); 453 buf->entry[buf->entries].priority = 454 stack_pos + 1 + missed; 455 buf->entry[buf->entries].pattern = addr; 456 buf->entries++; 457 rte_memcpy(addr, buf->entry[0].pattern, 458 user_pattern_size); 459 addr = (void *)(((uintptr_t)addr) + 460 user_pattern_size); 461 rte_memcpy(addr, &missed_item, 462 missed * sizeof(*item)); 463 addr = (void *)(((uintptr_t)addr) + 464 missed * sizeof(*item)); 465 rte_memcpy(addr, flow_items, n); 466 addr = (void *)(((uintptr_t)addr) + n); 467 } 468 /* Go deeper. */ 469 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) && 470 node->next) { 471 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 472 node->next); 473 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) { 474 rte_errno = E2BIG; 475 return -rte_errno; 476 } 477 stack[stack_pos] = next_node; 478 } else if (*(next_node + 1)) { 479 /* Follow up with the next possibility. */ 480 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 481 ++next_node); 482 } else if (!stack_pos) { 483 /* 484 * Completing the traverse over the different paths. 485 * The next_node is advanced to the terminator. 486 */ 487 ++next_node; 488 } else { 489 /* Move to the next path. */ 490 while (stack_pos) { 491 next_node = stack[--stack_pos]; 492 next_node++; 493 if (*next_node) 494 break; 495 } 496 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 497 next_node); 498 stack[stack_pos] = next_node; 499 } 500 node = next_node && *next_node ? &graph[*next_node] : NULL; 501 }; 502 return lsize; 503 } 504 505 enum mlx5_expansion { 506 MLX5_EXPANSION_ROOT, 507 MLX5_EXPANSION_ROOT_OUTER, 508 MLX5_EXPANSION_OUTER_ETH, 509 MLX5_EXPANSION_OUTER_VLAN, 510 MLX5_EXPANSION_OUTER_IPV4, 511 MLX5_EXPANSION_OUTER_IPV4_UDP, 512 MLX5_EXPANSION_OUTER_IPV4_TCP, 513 MLX5_EXPANSION_OUTER_IPV6, 514 MLX5_EXPANSION_OUTER_IPV6_UDP, 515 MLX5_EXPANSION_OUTER_IPV6_TCP, 516 MLX5_EXPANSION_VXLAN, 517 MLX5_EXPANSION_STD_VXLAN, 518 MLX5_EXPANSION_L3_VXLAN, 519 MLX5_EXPANSION_VXLAN_GPE, 520 MLX5_EXPANSION_GRE, 521 MLX5_EXPANSION_NVGRE, 522 MLX5_EXPANSION_GRE_KEY, 523 MLX5_EXPANSION_MPLS, 524 MLX5_EXPANSION_ETH, 525 MLX5_EXPANSION_VLAN, 526 MLX5_EXPANSION_IPV4, 527 MLX5_EXPANSION_IPV4_UDP, 528 MLX5_EXPANSION_IPV4_TCP, 529 MLX5_EXPANSION_IPV6, 530 MLX5_EXPANSION_IPV6_UDP, 531 MLX5_EXPANSION_IPV6_TCP, 532 MLX5_EXPANSION_IPV6_FRAG_EXT, 533 MLX5_EXPANSION_GTP 534 }; 535 536 /** Supported expansion of items. */ 537 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 538 [MLX5_EXPANSION_ROOT] = { 539 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 540 MLX5_EXPANSION_IPV4, 541 MLX5_EXPANSION_IPV6), 542 .type = RTE_FLOW_ITEM_TYPE_END, 543 }, 544 [MLX5_EXPANSION_ROOT_OUTER] = { 545 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 546 MLX5_EXPANSION_OUTER_IPV4, 547 MLX5_EXPANSION_OUTER_IPV6), 548 .type = RTE_FLOW_ITEM_TYPE_END, 549 }, 550 [MLX5_EXPANSION_OUTER_ETH] = { 551 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 552 .type = RTE_FLOW_ITEM_TYPE_ETH, 553 .rss_types = 0, 554 }, 555 [MLX5_EXPANSION_OUTER_VLAN] = { 556 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 557 MLX5_EXPANSION_OUTER_IPV6), 558 .type = RTE_FLOW_ITEM_TYPE_VLAN, 559 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT, 560 }, 561 [MLX5_EXPANSION_OUTER_IPV4] = { 562 .next = MLX5_FLOW_EXPAND_RSS_NEXT 563 (MLX5_EXPANSION_OUTER_IPV4_UDP, 564 MLX5_EXPANSION_OUTER_IPV4_TCP, 565 MLX5_EXPANSION_GRE, 566 MLX5_EXPANSION_NVGRE, 567 MLX5_EXPANSION_IPV4, 568 MLX5_EXPANSION_IPV6), 569 .type = RTE_FLOW_ITEM_TYPE_IPV4, 570 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 | 571 RTE_ETH_RSS_NONFRAG_IPV4_OTHER, 572 }, 573 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 574 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 575 MLX5_EXPANSION_VXLAN_GPE, 576 MLX5_EXPANSION_MPLS, 577 MLX5_EXPANSION_GTP), 578 .type = RTE_FLOW_ITEM_TYPE_UDP, 579 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP, 580 }, 581 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 582 .type = RTE_FLOW_ITEM_TYPE_TCP, 583 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP, 584 }, 585 [MLX5_EXPANSION_OUTER_IPV6] = { 586 .next = MLX5_FLOW_EXPAND_RSS_NEXT 587 (MLX5_EXPANSION_OUTER_IPV6_UDP, 588 MLX5_EXPANSION_OUTER_IPV6_TCP, 589 MLX5_EXPANSION_IPV4, 590 MLX5_EXPANSION_IPV6, 591 MLX5_EXPANSION_GRE, 592 MLX5_EXPANSION_NVGRE), 593 .type = RTE_FLOW_ITEM_TYPE_IPV6, 594 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 | 595 RTE_ETH_RSS_NONFRAG_IPV6_OTHER, 596 }, 597 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 598 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 599 MLX5_EXPANSION_VXLAN_GPE, 600 MLX5_EXPANSION_MPLS, 601 MLX5_EXPANSION_GTP), 602 .type = RTE_FLOW_ITEM_TYPE_UDP, 603 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP, 604 }, 605 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 606 .type = RTE_FLOW_ITEM_TYPE_TCP, 607 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP, 608 }, 609 [MLX5_EXPANSION_VXLAN] = { 610 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 611 MLX5_EXPANSION_IPV4, 612 MLX5_EXPANSION_IPV6), 613 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 614 }, 615 [MLX5_EXPANSION_STD_VXLAN] = { 616 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 617 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 618 }, 619 [MLX5_EXPANSION_L3_VXLAN] = { 620 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 621 MLX5_EXPANSION_IPV6), 622 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 623 }, 624 [MLX5_EXPANSION_VXLAN_GPE] = { 625 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 626 MLX5_EXPANSION_IPV4, 627 MLX5_EXPANSION_IPV6), 628 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 629 }, 630 [MLX5_EXPANSION_GRE] = { 631 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 632 MLX5_EXPANSION_IPV6, 633 MLX5_EXPANSION_GRE_KEY, 634 MLX5_EXPANSION_MPLS), 635 .type = RTE_FLOW_ITEM_TYPE_GRE, 636 }, 637 [MLX5_EXPANSION_GRE_KEY] = { 638 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 639 MLX5_EXPANSION_IPV6, 640 MLX5_EXPANSION_MPLS), 641 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY, 642 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL, 643 }, 644 [MLX5_EXPANSION_NVGRE] = { 645 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 646 .type = RTE_FLOW_ITEM_TYPE_NVGRE, 647 }, 648 [MLX5_EXPANSION_MPLS] = { 649 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 650 MLX5_EXPANSION_IPV6, 651 MLX5_EXPANSION_ETH), 652 .type = RTE_FLOW_ITEM_TYPE_MPLS, 653 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL, 654 }, 655 [MLX5_EXPANSION_ETH] = { 656 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 657 .type = RTE_FLOW_ITEM_TYPE_ETH, 658 }, 659 [MLX5_EXPANSION_VLAN] = { 660 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 661 MLX5_EXPANSION_IPV6), 662 .type = RTE_FLOW_ITEM_TYPE_VLAN, 663 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT, 664 }, 665 [MLX5_EXPANSION_IPV4] = { 666 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 667 MLX5_EXPANSION_IPV4_TCP), 668 .type = RTE_FLOW_ITEM_TYPE_IPV4, 669 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 | 670 RTE_ETH_RSS_NONFRAG_IPV4_OTHER, 671 }, 672 [MLX5_EXPANSION_IPV4_UDP] = { 673 .type = RTE_FLOW_ITEM_TYPE_UDP, 674 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP, 675 }, 676 [MLX5_EXPANSION_IPV4_TCP] = { 677 .type = RTE_FLOW_ITEM_TYPE_TCP, 678 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP, 679 }, 680 [MLX5_EXPANSION_IPV6] = { 681 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 682 MLX5_EXPANSION_IPV6_TCP, 683 MLX5_EXPANSION_IPV6_FRAG_EXT), 684 .type = RTE_FLOW_ITEM_TYPE_IPV6, 685 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 | 686 RTE_ETH_RSS_NONFRAG_IPV6_OTHER, 687 }, 688 [MLX5_EXPANSION_IPV6_UDP] = { 689 .type = RTE_FLOW_ITEM_TYPE_UDP, 690 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP, 691 }, 692 [MLX5_EXPANSION_IPV6_TCP] = { 693 .type = RTE_FLOW_ITEM_TYPE_TCP, 694 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP, 695 }, 696 [MLX5_EXPANSION_IPV6_FRAG_EXT] = { 697 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT, 698 }, 699 [MLX5_EXPANSION_GTP] = { 700 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 701 MLX5_EXPANSION_IPV6), 702 .type = RTE_FLOW_ITEM_TYPE_GTP, 703 }, 704 }; 705 706 static struct rte_flow_action_handle * 707 mlx5_action_handle_create(struct rte_eth_dev *dev, 708 const struct rte_flow_indir_action_conf *conf, 709 const struct rte_flow_action *action, 710 struct rte_flow_error *error); 711 static int mlx5_action_handle_destroy 712 (struct rte_eth_dev *dev, 713 struct rte_flow_action_handle *handle, 714 struct rte_flow_error *error); 715 static int mlx5_action_handle_update 716 (struct rte_eth_dev *dev, 717 struct rte_flow_action_handle *handle, 718 const void *update, 719 struct rte_flow_error *error); 720 static int mlx5_action_handle_query 721 (struct rte_eth_dev *dev, 722 const struct rte_flow_action_handle *handle, 723 void *data, 724 struct rte_flow_error *error); 725 static int 726 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 727 struct rte_flow_tunnel *app_tunnel, 728 struct rte_flow_action **actions, 729 uint32_t *num_of_actions, 730 struct rte_flow_error *error); 731 static int 732 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 733 struct rte_flow_tunnel *app_tunnel, 734 struct rte_flow_item **items, 735 uint32_t *num_of_items, 736 struct rte_flow_error *error); 737 static int 738 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 739 struct rte_flow_item *pmd_items, 740 uint32_t num_items, struct rte_flow_error *err); 741 static int 742 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 743 struct rte_flow_action *pmd_actions, 744 uint32_t num_actions, 745 struct rte_flow_error *err); 746 static int 747 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 748 struct rte_mbuf *m, 749 struct rte_flow_restore_info *info, 750 struct rte_flow_error *err); 751 static struct rte_flow_item_flex_handle * 752 mlx5_flow_flex_item_create(struct rte_eth_dev *dev, 753 const struct rte_flow_item_flex_conf *conf, 754 struct rte_flow_error *error); 755 static int 756 mlx5_flow_flex_item_release(struct rte_eth_dev *dev, 757 const struct rte_flow_item_flex_handle *handle, 758 struct rte_flow_error *error); 759 760 static const struct rte_flow_ops mlx5_flow_ops = { 761 .validate = mlx5_flow_validate, 762 .create = mlx5_flow_create, 763 .destroy = mlx5_flow_destroy, 764 .flush = mlx5_flow_flush, 765 .isolate = mlx5_flow_isolate, 766 .query = mlx5_flow_query, 767 .dev_dump = mlx5_flow_dev_dump, 768 .get_aged_flows = mlx5_flow_get_aged_flows, 769 .action_handle_create = mlx5_action_handle_create, 770 .action_handle_destroy = mlx5_action_handle_destroy, 771 .action_handle_update = mlx5_action_handle_update, 772 .action_handle_query = mlx5_action_handle_query, 773 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 774 .tunnel_match = mlx5_flow_tunnel_match, 775 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release, 776 .tunnel_item_release = mlx5_flow_tunnel_item_release, 777 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 778 .flex_item_create = mlx5_flow_flex_item_create, 779 .flex_item_release = mlx5_flow_flex_item_release, 780 }; 781 782 /* Tunnel information. */ 783 struct mlx5_flow_tunnel_info { 784 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 785 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 786 }; 787 788 static struct mlx5_flow_tunnel_info tunnels_info[] = { 789 { 790 .tunnel = MLX5_FLOW_LAYER_VXLAN, 791 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 792 }, 793 { 794 .tunnel = MLX5_FLOW_LAYER_GENEVE, 795 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 796 }, 797 { 798 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 799 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 800 }, 801 { 802 .tunnel = MLX5_FLOW_LAYER_GRE, 803 .ptype = RTE_PTYPE_TUNNEL_GRE, 804 }, 805 { 806 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 807 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 808 }, 809 { 810 .tunnel = MLX5_FLOW_LAYER_MPLS, 811 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 812 }, 813 { 814 .tunnel = MLX5_FLOW_LAYER_NVGRE, 815 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 816 }, 817 { 818 .tunnel = MLX5_FLOW_LAYER_IPIP, 819 .ptype = RTE_PTYPE_TUNNEL_IP, 820 }, 821 { 822 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 823 .ptype = RTE_PTYPE_TUNNEL_IP, 824 }, 825 { 826 .tunnel = MLX5_FLOW_LAYER_GTP, 827 .ptype = RTE_PTYPE_TUNNEL_GTPU, 828 }, 829 }; 830 831 832 833 /** 834 * Translate tag ID to register. 835 * 836 * @param[in] dev 837 * Pointer to the Ethernet device structure. 838 * @param[in] feature 839 * The feature that request the register. 840 * @param[in] id 841 * The request register ID. 842 * @param[out] error 843 * Error description in case of any. 844 * 845 * @return 846 * The request register on success, a negative errno 847 * value otherwise and rte_errno is set. 848 */ 849 int 850 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 851 enum mlx5_feature_name feature, 852 uint32_t id, 853 struct rte_flow_error *error) 854 { 855 struct mlx5_priv *priv = dev->data->dev_private; 856 struct mlx5_dev_config *config = &priv->config; 857 enum modify_reg start_reg; 858 bool skip_mtr_reg = false; 859 860 switch (feature) { 861 case MLX5_HAIRPIN_RX: 862 return REG_B; 863 case MLX5_HAIRPIN_TX: 864 return REG_A; 865 case MLX5_METADATA_RX: 866 switch (config->dv_xmeta_en) { 867 case MLX5_XMETA_MODE_LEGACY: 868 return REG_B; 869 case MLX5_XMETA_MODE_META16: 870 return REG_C_0; 871 case MLX5_XMETA_MODE_META32: 872 return REG_C_1; 873 } 874 break; 875 case MLX5_METADATA_TX: 876 return REG_A; 877 case MLX5_METADATA_FDB: 878 switch (config->dv_xmeta_en) { 879 case MLX5_XMETA_MODE_LEGACY: 880 return REG_NON; 881 case MLX5_XMETA_MODE_META16: 882 return REG_C_0; 883 case MLX5_XMETA_MODE_META32: 884 return REG_C_1; 885 } 886 break; 887 case MLX5_FLOW_MARK: 888 switch (config->dv_xmeta_en) { 889 case MLX5_XMETA_MODE_LEGACY: 890 return REG_NON; 891 case MLX5_XMETA_MODE_META16: 892 return REG_C_1; 893 case MLX5_XMETA_MODE_META32: 894 return REG_C_0; 895 } 896 break; 897 case MLX5_MTR_ID: 898 /* 899 * If meter color and meter id share one register, flow match 900 * should use the meter color register for match. 901 */ 902 if (priv->mtr_reg_share) 903 return priv->mtr_color_reg; 904 else 905 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 906 REG_C_3; 907 case MLX5_MTR_COLOR: 908 case MLX5_ASO_FLOW_HIT: 909 case MLX5_ASO_CONNTRACK: 910 /* All features use the same REG_C. */ 911 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 912 return priv->mtr_color_reg; 913 case MLX5_COPY_MARK: 914 /* 915 * Metadata COPY_MARK register using is in meter suffix sub 916 * flow while with meter. It's safe to share the same register. 917 */ 918 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 919 case MLX5_APP_TAG: 920 /* 921 * If meter is enable, it will engage the register for color 922 * match and flow match. If meter color match is not using the 923 * REG_C_2, need to skip the REG_C_x be used by meter color 924 * match. 925 * If meter is disable, free to use all available registers. 926 */ 927 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 928 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 929 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 930 if (id > (uint32_t)(REG_C_7 - start_reg)) 931 return rte_flow_error_set(error, EINVAL, 932 RTE_FLOW_ERROR_TYPE_ITEM, 933 NULL, "invalid tag id"); 934 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 935 return rte_flow_error_set(error, ENOTSUP, 936 RTE_FLOW_ERROR_TYPE_ITEM, 937 NULL, "unsupported tag id"); 938 /* 939 * This case means meter is using the REG_C_x great than 2. 940 * Take care not to conflict with meter color REG_C_x. 941 * If the available index REG_C_y >= REG_C_x, skip the 942 * color register. 943 */ 944 if (skip_mtr_reg && priv->sh->flow_mreg_c 945 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 946 if (id >= (uint32_t)(REG_C_7 - start_reg)) 947 return rte_flow_error_set(error, EINVAL, 948 RTE_FLOW_ERROR_TYPE_ITEM, 949 NULL, "invalid tag id"); 950 if (priv->sh->flow_mreg_c 951 [id + 1 + start_reg - REG_C_0] != REG_NON) 952 return priv->sh->flow_mreg_c 953 [id + 1 + start_reg - REG_C_0]; 954 return rte_flow_error_set(error, ENOTSUP, 955 RTE_FLOW_ERROR_TYPE_ITEM, 956 NULL, "unsupported tag id"); 957 } 958 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0]; 959 } 960 MLX5_ASSERT(false); 961 return rte_flow_error_set(error, EINVAL, 962 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 963 NULL, "invalid feature name"); 964 } 965 966 /** 967 * Check extensive flow metadata register support. 968 * 969 * @param dev 970 * Pointer to rte_eth_dev structure. 971 * 972 * @return 973 * True if device supports extensive flow metadata register, otherwise false. 974 */ 975 bool 976 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 977 { 978 struct mlx5_priv *priv = dev->data->dev_private; 979 980 /* 981 * Having available reg_c can be regarded inclusively as supporting 982 * extensive flow metadata register, which could mean, 983 * - metadata register copy action by modify header. 984 * - 16 modify header actions is supported. 985 * - reg_c's are preserved across different domain (FDB and NIC) on 986 * packet loopback by flow lookup miss. 987 */ 988 return priv->sh->flow_mreg_c[2] != REG_NON; 989 } 990 991 /** 992 * Get the lowest priority. 993 * 994 * @param[in] dev 995 * Pointer to the Ethernet device structure. 996 * @param[in] attributes 997 * Pointer to device flow rule attributes. 998 * 999 * @return 1000 * The value of lowest priority of flow. 1001 */ 1002 uint32_t 1003 mlx5_get_lowest_priority(struct rte_eth_dev *dev, 1004 const struct rte_flow_attr *attr) 1005 { 1006 struct mlx5_priv *priv = dev->data->dev_private; 1007 1008 if (!attr->group && !attr->transfer) 1009 return priv->sh->flow_max_priority - 2; 1010 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1; 1011 } 1012 1013 /** 1014 * Calculate matcher priority of the flow. 1015 * 1016 * @param[in] dev 1017 * Pointer to the Ethernet device structure. 1018 * @param[in] attr 1019 * Pointer to device flow rule attributes. 1020 * @param[in] subpriority 1021 * The priority based on the items. 1022 * @param[in] external 1023 * Flow is user flow. 1024 * @return 1025 * The matcher priority of the flow. 1026 */ 1027 uint16_t 1028 mlx5_get_matcher_priority(struct rte_eth_dev *dev, 1029 const struct rte_flow_attr *attr, 1030 uint32_t subpriority, bool external) 1031 { 1032 uint16_t priority = (uint16_t)attr->priority; 1033 struct mlx5_priv *priv = dev->data->dev_private; 1034 1035 if (!attr->group && !attr->transfer) { 1036 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 1037 priority = priv->sh->flow_max_priority - 1; 1038 return mlx5_os_flow_adjust_priority(dev, priority, subpriority); 1039 } else if (!external && attr->transfer && attr->group == 0 && 1040 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) { 1041 return (priv->sh->flow_max_priority - 1) * 3; 1042 } 1043 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 1044 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO; 1045 return priority * 3 + subpriority; 1046 } 1047 1048 /** 1049 * Verify the @p item specifications (spec, last, mask) are compatible with the 1050 * NIC capabilities. 1051 * 1052 * @param[in] item 1053 * Item specification. 1054 * @param[in] mask 1055 * @p item->mask or flow default bit-masks. 1056 * @param[in] nic_mask 1057 * Bit-masks covering supported fields by the NIC to compare with user mask. 1058 * @param[in] size 1059 * Bit-masks size in bytes. 1060 * @param[in] range_accepted 1061 * True if range of values is accepted for specific fields, false otherwise. 1062 * @param[out] error 1063 * Pointer to error structure. 1064 * 1065 * @return 1066 * 0 on success, a negative errno value otherwise and rte_errno is set. 1067 */ 1068 int 1069 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 1070 const uint8_t *mask, 1071 const uint8_t *nic_mask, 1072 unsigned int size, 1073 bool range_accepted, 1074 struct rte_flow_error *error) 1075 { 1076 unsigned int i; 1077 1078 MLX5_ASSERT(nic_mask); 1079 for (i = 0; i < size; ++i) 1080 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 1081 return rte_flow_error_set(error, ENOTSUP, 1082 RTE_FLOW_ERROR_TYPE_ITEM, 1083 item, 1084 "mask enables non supported" 1085 " bits"); 1086 if (!item->spec && (item->mask || item->last)) 1087 return rte_flow_error_set(error, EINVAL, 1088 RTE_FLOW_ERROR_TYPE_ITEM, item, 1089 "mask/last without a spec is not" 1090 " supported"); 1091 if (item->spec && item->last && !range_accepted) { 1092 uint8_t spec[size]; 1093 uint8_t last[size]; 1094 unsigned int i; 1095 int ret; 1096 1097 for (i = 0; i < size; ++i) { 1098 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 1099 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 1100 } 1101 ret = memcmp(spec, last, size); 1102 if (ret != 0) 1103 return rte_flow_error_set(error, EINVAL, 1104 RTE_FLOW_ERROR_TYPE_ITEM, 1105 item, 1106 "range is not valid"); 1107 } 1108 return 0; 1109 } 1110 1111 /** 1112 * Adjust the hash fields according to the @p flow information. 1113 * 1114 * @param[in] dev_flow. 1115 * Pointer to the mlx5_flow. 1116 * @param[in] tunnel 1117 * 1 when the hash field is for a tunnel item. 1118 * @param[in] layer_types 1119 * RTE_ETH_RSS_* types. 1120 * @param[in] hash_fields 1121 * Item hash fields. 1122 * 1123 * @return 1124 * The hash fields that should be used. 1125 */ 1126 uint64_t 1127 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 1128 int tunnel __rte_unused, uint64_t layer_types, 1129 uint64_t hash_fields) 1130 { 1131 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1132 int rss_request_inner = rss_desc->level >= 2; 1133 1134 /* Check RSS hash level for tunnel. */ 1135 if (tunnel && rss_request_inner) 1136 hash_fields |= IBV_RX_HASH_INNER; 1137 else if (tunnel || rss_request_inner) 1138 return 0; 1139 #endif 1140 /* Check if requested layer matches RSS hash fields. */ 1141 if (!(rss_desc->types & layer_types)) 1142 return 0; 1143 return hash_fields; 1144 } 1145 1146 /** 1147 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 1148 * if several tunnel rules are used on this queue, the tunnel ptype will be 1149 * cleared. 1150 * 1151 * @param rxq_ctrl 1152 * Rx queue to update. 1153 */ 1154 static void 1155 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1156 { 1157 unsigned int i; 1158 uint32_t tunnel_ptype = 0; 1159 1160 /* Look up for the ptype to use. */ 1161 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1162 if (!rxq_ctrl->flow_tunnels_n[i]) 1163 continue; 1164 if (!tunnel_ptype) { 1165 tunnel_ptype = tunnels_info[i].ptype; 1166 } else { 1167 tunnel_ptype = 0; 1168 break; 1169 } 1170 } 1171 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1172 } 1173 1174 /** 1175 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1176 * flow. 1177 * 1178 * @param[in] dev 1179 * Pointer to the Ethernet device structure. 1180 * @param[in] dev_handle 1181 * Pointer to device flow handle structure. 1182 */ 1183 void 1184 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1185 struct mlx5_flow_handle *dev_handle) 1186 { 1187 struct mlx5_priv *priv = dev->data->dev_private; 1188 const int mark = dev_handle->mark; 1189 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1190 struct mlx5_ind_table_obj *ind_tbl = NULL; 1191 unsigned int i; 1192 1193 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1194 struct mlx5_hrxq *hrxq; 1195 1196 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1197 dev_handle->rix_hrxq); 1198 if (hrxq) 1199 ind_tbl = hrxq->ind_table; 1200 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1201 struct mlx5_shared_action_rss *shared_rss; 1202 1203 shared_rss = mlx5_ipool_get 1204 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1205 dev_handle->rix_srss); 1206 if (shared_rss) 1207 ind_tbl = shared_rss->ind_tbl; 1208 } 1209 if (!ind_tbl) 1210 return; 1211 for (i = 0; i != ind_tbl->queues_n; ++i) { 1212 int idx = ind_tbl->queues[i]; 1213 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx); 1214 1215 MLX5_ASSERT(rxq_ctrl != NULL); 1216 if (rxq_ctrl == NULL) 1217 continue; 1218 /* 1219 * To support metadata register copy on Tx loopback, 1220 * this must be always enabled (metadata may arive 1221 * from other port - not from local flows only. 1222 */ 1223 if (priv->config.dv_flow_en && 1224 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1225 mlx5_flow_ext_mreg_supported(dev)) { 1226 rxq_ctrl->rxq.mark = 1; 1227 rxq_ctrl->flow_mark_n = 1; 1228 } else if (mark) { 1229 rxq_ctrl->rxq.mark = 1; 1230 rxq_ctrl->flow_mark_n++; 1231 } 1232 if (tunnel) { 1233 unsigned int j; 1234 1235 /* Increase the counter matching the flow. */ 1236 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1237 if ((tunnels_info[j].tunnel & 1238 dev_handle->layers) == 1239 tunnels_info[j].tunnel) { 1240 rxq_ctrl->flow_tunnels_n[j]++; 1241 break; 1242 } 1243 } 1244 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1245 } 1246 } 1247 } 1248 1249 /** 1250 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1251 * 1252 * @param[in] dev 1253 * Pointer to the Ethernet device structure. 1254 * @param[in] flow 1255 * Pointer to flow structure. 1256 */ 1257 static void 1258 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1259 { 1260 struct mlx5_priv *priv = dev->data->dev_private; 1261 uint32_t handle_idx; 1262 struct mlx5_flow_handle *dev_handle; 1263 1264 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1265 handle_idx, dev_handle, next) 1266 flow_drv_rxq_flags_set(dev, dev_handle); 1267 } 1268 1269 /** 1270 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1271 * device flow if no other flow uses it with the same kind of request. 1272 * 1273 * @param dev 1274 * Pointer to Ethernet device. 1275 * @param[in] dev_handle 1276 * Pointer to the device flow handle structure. 1277 */ 1278 static void 1279 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1280 struct mlx5_flow_handle *dev_handle) 1281 { 1282 struct mlx5_priv *priv = dev->data->dev_private; 1283 const int mark = dev_handle->mark; 1284 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1285 struct mlx5_ind_table_obj *ind_tbl = NULL; 1286 unsigned int i; 1287 1288 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1289 struct mlx5_hrxq *hrxq; 1290 1291 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1292 dev_handle->rix_hrxq); 1293 if (hrxq) 1294 ind_tbl = hrxq->ind_table; 1295 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1296 struct mlx5_shared_action_rss *shared_rss; 1297 1298 shared_rss = mlx5_ipool_get 1299 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1300 dev_handle->rix_srss); 1301 if (shared_rss) 1302 ind_tbl = shared_rss->ind_tbl; 1303 } 1304 if (!ind_tbl) 1305 return; 1306 MLX5_ASSERT(dev->data->dev_started); 1307 for (i = 0; i != ind_tbl->queues_n; ++i) { 1308 int idx = ind_tbl->queues[i]; 1309 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx); 1310 1311 MLX5_ASSERT(rxq_ctrl != NULL); 1312 if (rxq_ctrl == NULL) 1313 continue; 1314 if (priv->config.dv_flow_en && 1315 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1316 mlx5_flow_ext_mreg_supported(dev)) { 1317 rxq_ctrl->rxq.mark = 1; 1318 rxq_ctrl->flow_mark_n = 1; 1319 } else if (mark) { 1320 rxq_ctrl->flow_mark_n--; 1321 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1322 } 1323 if (tunnel) { 1324 unsigned int j; 1325 1326 /* Decrease the counter matching the flow. */ 1327 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1328 if ((tunnels_info[j].tunnel & 1329 dev_handle->layers) == 1330 tunnels_info[j].tunnel) { 1331 rxq_ctrl->flow_tunnels_n[j]--; 1332 break; 1333 } 1334 } 1335 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1336 } 1337 } 1338 } 1339 1340 /** 1341 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1342 * @p flow if no other flow uses it with the same kind of request. 1343 * 1344 * @param dev 1345 * Pointer to Ethernet device. 1346 * @param[in] flow 1347 * Pointer to the flow. 1348 */ 1349 static void 1350 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1351 { 1352 struct mlx5_priv *priv = dev->data->dev_private; 1353 uint32_t handle_idx; 1354 struct mlx5_flow_handle *dev_handle; 1355 1356 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1357 handle_idx, dev_handle, next) 1358 flow_drv_rxq_flags_trim(dev, dev_handle); 1359 } 1360 1361 /** 1362 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1363 * 1364 * @param dev 1365 * Pointer to Ethernet device. 1366 */ 1367 static void 1368 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1369 { 1370 struct mlx5_priv *priv = dev->data->dev_private; 1371 unsigned int i; 1372 1373 for (i = 0; i != priv->rxqs_n; ++i) { 1374 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i); 1375 unsigned int j; 1376 1377 if (rxq == NULL || rxq->ctrl == NULL) 1378 continue; 1379 rxq->ctrl->flow_mark_n = 0; 1380 rxq->ctrl->rxq.mark = 0; 1381 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1382 rxq->ctrl->flow_tunnels_n[j] = 0; 1383 rxq->ctrl->rxq.tunnel = 0; 1384 } 1385 } 1386 1387 /** 1388 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1389 * 1390 * @param[in] dev 1391 * Pointer to the Ethernet device structure. 1392 */ 1393 void 1394 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1395 { 1396 struct mlx5_priv *priv = dev->data->dev_private; 1397 unsigned int i; 1398 1399 for (i = 0; i != priv->rxqs_n; ++i) { 1400 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i); 1401 struct mlx5_rxq_data *data; 1402 1403 if (rxq == NULL || rxq->ctrl == NULL) 1404 continue; 1405 data = &rxq->ctrl->rxq; 1406 if (!rte_flow_dynf_metadata_avail()) { 1407 data->dynf_meta = 0; 1408 data->flow_meta_mask = 0; 1409 data->flow_meta_offset = -1; 1410 data->flow_meta_port_mask = 0; 1411 } else { 1412 data->dynf_meta = 1; 1413 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1414 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1415 data->flow_meta_port_mask = priv->sh->dv_meta_mask; 1416 } 1417 } 1418 } 1419 1420 /* 1421 * return a pointer to the desired action in the list of actions. 1422 * 1423 * @param[in] actions 1424 * The list of actions to search the action in. 1425 * @param[in] action 1426 * The action to find. 1427 * 1428 * @return 1429 * Pointer to the action in the list, if found. NULL otherwise. 1430 */ 1431 const struct rte_flow_action * 1432 mlx5_flow_find_action(const struct rte_flow_action *actions, 1433 enum rte_flow_action_type action) 1434 { 1435 if (actions == NULL) 1436 return NULL; 1437 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1438 if (actions->type == action) 1439 return actions; 1440 return NULL; 1441 } 1442 1443 /* 1444 * Validate the flag action. 1445 * 1446 * @param[in] action_flags 1447 * Bit-fields that holds the actions detected until now. 1448 * @param[in] attr 1449 * Attributes of flow that includes this action. 1450 * @param[out] error 1451 * Pointer to error structure. 1452 * 1453 * @return 1454 * 0 on success, a negative errno value otherwise and rte_errno is set. 1455 */ 1456 int 1457 mlx5_flow_validate_action_flag(uint64_t action_flags, 1458 const struct rte_flow_attr *attr, 1459 struct rte_flow_error *error) 1460 { 1461 if (action_flags & MLX5_FLOW_ACTION_MARK) 1462 return rte_flow_error_set(error, EINVAL, 1463 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1464 "can't mark and flag in same flow"); 1465 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1466 return rte_flow_error_set(error, EINVAL, 1467 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1468 "can't have 2 flag" 1469 " actions in same flow"); 1470 if (attr->egress) 1471 return rte_flow_error_set(error, ENOTSUP, 1472 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1473 "flag action not supported for " 1474 "egress"); 1475 return 0; 1476 } 1477 1478 /* 1479 * Validate the mark action. 1480 * 1481 * @param[in] action 1482 * Pointer to the queue action. 1483 * @param[in] action_flags 1484 * Bit-fields that holds the actions detected until now. 1485 * @param[in] attr 1486 * Attributes of flow that includes this action. 1487 * @param[out] error 1488 * Pointer to error structure. 1489 * 1490 * @return 1491 * 0 on success, a negative errno value otherwise and rte_errno is set. 1492 */ 1493 int 1494 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1495 uint64_t action_flags, 1496 const struct rte_flow_attr *attr, 1497 struct rte_flow_error *error) 1498 { 1499 const struct rte_flow_action_mark *mark = action->conf; 1500 1501 if (!mark) 1502 return rte_flow_error_set(error, EINVAL, 1503 RTE_FLOW_ERROR_TYPE_ACTION, 1504 action, 1505 "configuration cannot be null"); 1506 if (mark->id >= MLX5_FLOW_MARK_MAX) 1507 return rte_flow_error_set(error, EINVAL, 1508 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1509 &mark->id, 1510 "mark id must in 0 <= id < " 1511 RTE_STR(MLX5_FLOW_MARK_MAX)); 1512 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1513 return rte_flow_error_set(error, EINVAL, 1514 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1515 "can't flag and mark in same flow"); 1516 if (action_flags & MLX5_FLOW_ACTION_MARK) 1517 return rte_flow_error_set(error, EINVAL, 1518 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1519 "can't have 2 mark actions in same" 1520 " flow"); 1521 if (attr->egress) 1522 return rte_flow_error_set(error, ENOTSUP, 1523 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1524 "mark action not supported for " 1525 "egress"); 1526 return 0; 1527 } 1528 1529 /* 1530 * Validate the drop action. 1531 * 1532 * @param[in] action_flags 1533 * Bit-fields that holds the actions detected until now. 1534 * @param[in] attr 1535 * Attributes of flow that includes this action. 1536 * @param[out] error 1537 * Pointer to error structure. 1538 * 1539 * @return 1540 * 0 on success, a negative errno value otherwise and rte_errno is set. 1541 */ 1542 int 1543 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1544 const struct rte_flow_attr *attr, 1545 struct rte_flow_error *error) 1546 { 1547 if (attr->egress) 1548 return rte_flow_error_set(error, ENOTSUP, 1549 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1550 "drop action not supported for " 1551 "egress"); 1552 return 0; 1553 } 1554 1555 /* 1556 * Validate the queue action. 1557 * 1558 * @param[in] action 1559 * Pointer to the queue action. 1560 * @param[in] action_flags 1561 * Bit-fields that holds the actions detected until now. 1562 * @param[in] dev 1563 * Pointer to the Ethernet device structure. 1564 * @param[in] attr 1565 * Attributes of flow that includes this action. 1566 * @param[out] error 1567 * Pointer to error structure. 1568 * 1569 * @return 1570 * 0 on success, a negative errno value otherwise and rte_errno is set. 1571 */ 1572 int 1573 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1574 uint64_t action_flags, 1575 struct rte_eth_dev *dev, 1576 const struct rte_flow_attr *attr, 1577 struct rte_flow_error *error) 1578 { 1579 struct mlx5_priv *priv = dev->data->dev_private; 1580 const struct rte_flow_action_queue *queue = action->conf; 1581 1582 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1583 return rte_flow_error_set(error, EINVAL, 1584 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1585 "can't have 2 fate actions in" 1586 " same flow"); 1587 if (!priv->rxqs_n) 1588 return rte_flow_error_set(error, EINVAL, 1589 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1590 NULL, "No Rx queues configured"); 1591 if (queue->index >= priv->rxqs_n) 1592 return rte_flow_error_set(error, EINVAL, 1593 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1594 &queue->index, 1595 "queue index out of range"); 1596 if (mlx5_rxq_get(dev, queue->index) == NULL) 1597 return rte_flow_error_set(error, EINVAL, 1598 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1599 &queue->index, 1600 "queue is not configured"); 1601 if (attr->egress) 1602 return rte_flow_error_set(error, ENOTSUP, 1603 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1604 "queue action not supported for " 1605 "egress"); 1606 return 0; 1607 } 1608 1609 /** 1610 * Validate queue numbers for device RSS. 1611 * 1612 * @param[in] dev 1613 * Configured device. 1614 * @param[in] queues 1615 * Array of queue numbers. 1616 * @param[in] queues_n 1617 * Size of the @p queues array. 1618 * @param[out] error 1619 * On error, filled with a textual error description. 1620 * @param[out] queue 1621 * On error, filled with an offending queue index in @p queues array. 1622 * 1623 * @return 1624 * 0 on success, a negative errno code on error. 1625 */ 1626 static int 1627 mlx5_validate_rss_queues(struct rte_eth_dev *dev, 1628 const uint16_t *queues, uint32_t queues_n, 1629 const char **error, uint32_t *queue_idx) 1630 { 1631 const struct mlx5_priv *priv = dev->data->dev_private; 1632 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; 1633 uint32_t i; 1634 1635 for (i = 0; i != queues_n; ++i) { 1636 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, 1637 queues[i]); 1638 1639 if (queues[i] >= priv->rxqs_n) { 1640 *error = "queue index out of range"; 1641 *queue_idx = i; 1642 return -EINVAL; 1643 } 1644 if (rxq_ctrl == NULL) { 1645 *error = "queue is not configured"; 1646 *queue_idx = i; 1647 return -EINVAL; 1648 } 1649 if (i == 0) 1650 rxq_type = rxq_ctrl->type; 1651 if (rxq_type != rxq_ctrl->type) { 1652 *error = "combining hairpin and regular RSS queues is not supported"; 1653 *queue_idx = i; 1654 return -ENOTSUP; 1655 } 1656 } 1657 return 0; 1658 } 1659 1660 /* 1661 * Validate the rss action. 1662 * 1663 * @param[in] dev 1664 * Pointer to the Ethernet device structure. 1665 * @param[in] action 1666 * Pointer to the queue action. 1667 * @param[out] error 1668 * Pointer to error structure. 1669 * 1670 * @return 1671 * 0 on success, a negative errno value otherwise and rte_errno is set. 1672 */ 1673 int 1674 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1675 const struct rte_flow_action *action, 1676 struct rte_flow_error *error) 1677 { 1678 struct mlx5_priv *priv = dev->data->dev_private; 1679 const struct rte_flow_action_rss *rss = action->conf; 1680 int ret; 1681 const char *message; 1682 uint32_t queue_idx; 1683 1684 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1685 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1686 return rte_flow_error_set(error, ENOTSUP, 1687 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1688 &rss->func, 1689 "RSS hash function not supported"); 1690 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1691 if (rss->level > 2) 1692 #else 1693 if (rss->level > 1) 1694 #endif 1695 return rte_flow_error_set(error, ENOTSUP, 1696 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1697 &rss->level, 1698 "tunnel RSS is not supported"); 1699 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1700 if (rss->key_len == 0 && rss->key != NULL) 1701 return rte_flow_error_set(error, ENOTSUP, 1702 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1703 &rss->key_len, 1704 "RSS hash key length 0"); 1705 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1706 return rte_flow_error_set(error, ENOTSUP, 1707 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1708 &rss->key_len, 1709 "RSS hash key too small"); 1710 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1711 return rte_flow_error_set(error, ENOTSUP, 1712 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1713 &rss->key_len, 1714 "RSS hash key too large"); 1715 if (rss->queue_num > priv->config.ind_table_max_size) 1716 return rte_flow_error_set(error, ENOTSUP, 1717 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1718 &rss->queue_num, 1719 "number of queues too large"); 1720 if (rss->types & MLX5_RSS_HF_MASK) 1721 return rte_flow_error_set(error, ENOTSUP, 1722 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1723 &rss->types, 1724 "some RSS protocols are not" 1725 " supported"); 1726 if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) && 1727 !(rss->types & RTE_ETH_RSS_IP)) 1728 return rte_flow_error_set(error, EINVAL, 1729 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1730 "L3 partial RSS requested but L3 RSS" 1731 " type not specified"); 1732 if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) && 1733 !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP))) 1734 return rte_flow_error_set(error, EINVAL, 1735 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1736 "L4 partial RSS requested but L4 RSS" 1737 " type not specified"); 1738 if (!priv->rxqs_n) 1739 return rte_flow_error_set(error, EINVAL, 1740 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1741 NULL, "No Rx queues configured"); 1742 if (!rss->queue_num) 1743 return rte_flow_error_set(error, EINVAL, 1744 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1745 NULL, "No queues configured"); 1746 ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num, 1747 &message, &queue_idx); 1748 if (ret != 0) { 1749 return rte_flow_error_set(error, -ret, 1750 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1751 &rss->queue[queue_idx], message); 1752 } 1753 return 0; 1754 } 1755 1756 /* 1757 * Validate the rss action. 1758 * 1759 * @param[in] action 1760 * Pointer to the queue action. 1761 * @param[in] action_flags 1762 * Bit-fields that holds the actions detected until now. 1763 * @param[in] dev 1764 * Pointer to the Ethernet device structure. 1765 * @param[in] attr 1766 * Attributes of flow that includes this action. 1767 * @param[in] item_flags 1768 * Items that were detected. 1769 * @param[out] error 1770 * Pointer to error structure. 1771 * 1772 * @return 1773 * 0 on success, a negative errno value otherwise and rte_errno is set. 1774 */ 1775 int 1776 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1777 uint64_t action_flags, 1778 struct rte_eth_dev *dev, 1779 const struct rte_flow_attr *attr, 1780 uint64_t item_flags, 1781 struct rte_flow_error *error) 1782 { 1783 const struct rte_flow_action_rss *rss = action->conf; 1784 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1785 int ret; 1786 1787 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1788 return rte_flow_error_set(error, EINVAL, 1789 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1790 "can't have 2 fate actions" 1791 " in same flow"); 1792 ret = mlx5_validate_action_rss(dev, action, error); 1793 if (ret) 1794 return ret; 1795 if (attr->egress) 1796 return rte_flow_error_set(error, ENOTSUP, 1797 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1798 "rss action not supported for " 1799 "egress"); 1800 if (rss->level > 1 && !tunnel) 1801 return rte_flow_error_set(error, EINVAL, 1802 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1803 "inner RSS is not supported for " 1804 "non-tunnel flows"); 1805 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1806 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1807 return rte_flow_error_set(error, EINVAL, 1808 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1809 "RSS on eCPRI is not supported now"); 1810 } 1811 if ((item_flags & MLX5_FLOW_LAYER_MPLS) && 1812 !(item_flags & 1813 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) && 1814 rss->level > 1) 1815 return rte_flow_error_set(error, EINVAL, 1816 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1817 "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern"); 1818 return 0; 1819 } 1820 1821 /* 1822 * Validate the default miss action. 1823 * 1824 * @param[in] action_flags 1825 * Bit-fields that holds the actions detected until now. 1826 * @param[out] error 1827 * Pointer to error structure. 1828 * 1829 * @return 1830 * 0 on success, a negative errno value otherwise and rte_errno is set. 1831 */ 1832 int 1833 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1834 const struct rte_flow_attr *attr, 1835 struct rte_flow_error *error) 1836 { 1837 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1838 return rte_flow_error_set(error, EINVAL, 1839 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1840 "can't have 2 fate actions in" 1841 " same flow"); 1842 if (attr->egress) 1843 return rte_flow_error_set(error, ENOTSUP, 1844 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1845 "default miss action not supported " 1846 "for egress"); 1847 if (attr->group) 1848 return rte_flow_error_set(error, ENOTSUP, 1849 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1850 "only group 0 is supported"); 1851 if (attr->transfer) 1852 return rte_flow_error_set(error, ENOTSUP, 1853 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1854 NULL, "transfer is not supported"); 1855 return 0; 1856 } 1857 1858 /* 1859 * Validate the count action. 1860 * 1861 * @param[in] dev 1862 * Pointer to the Ethernet device structure. 1863 * @param[in] attr 1864 * Attributes of flow that includes this action. 1865 * @param[out] error 1866 * Pointer to error structure. 1867 * 1868 * @return 1869 * 0 on success, a negative errno value otherwise and rte_errno is set. 1870 */ 1871 int 1872 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1873 const struct rte_flow_attr *attr, 1874 struct rte_flow_error *error) 1875 { 1876 if (attr->egress) 1877 return rte_flow_error_set(error, ENOTSUP, 1878 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1879 "count action not supported for " 1880 "egress"); 1881 return 0; 1882 } 1883 1884 /* 1885 * Validate the ASO CT action. 1886 * 1887 * @param[in] dev 1888 * Pointer to the Ethernet device structure. 1889 * @param[in] conntrack 1890 * Pointer to the CT action profile. 1891 * @param[out] error 1892 * Pointer to error structure. 1893 * 1894 * @return 1895 * 0 on success, a negative errno value otherwise and rte_errno is set. 1896 */ 1897 int 1898 mlx5_validate_action_ct(struct rte_eth_dev *dev, 1899 const struct rte_flow_action_conntrack *conntrack, 1900 struct rte_flow_error *error) 1901 { 1902 RTE_SET_USED(dev); 1903 1904 if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT) 1905 return rte_flow_error_set(error, EINVAL, 1906 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1907 "Invalid CT state"); 1908 if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST) 1909 return rte_flow_error_set(error, EINVAL, 1910 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1911 "Invalid last TCP packet flag"); 1912 return 0; 1913 } 1914 1915 /** 1916 * Verify the @p attributes will be correctly understood by the NIC and store 1917 * them in the @p flow if everything is correct. 1918 * 1919 * @param[in] dev 1920 * Pointer to the Ethernet device structure. 1921 * @param[in] attributes 1922 * Pointer to flow attributes 1923 * @param[out] error 1924 * Pointer to error structure. 1925 * 1926 * @return 1927 * 0 on success, a negative errno value otherwise and rte_errno is set. 1928 */ 1929 int 1930 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1931 const struct rte_flow_attr *attributes, 1932 struct rte_flow_error *error) 1933 { 1934 struct mlx5_priv *priv = dev->data->dev_private; 1935 uint32_t priority_max = priv->sh->flow_max_priority - 1; 1936 1937 if (attributes->group) 1938 return rte_flow_error_set(error, ENOTSUP, 1939 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1940 NULL, "groups is not supported"); 1941 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR && 1942 attributes->priority >= priority_max) 1943 return rte_flow_error_set(error, ENOTSUP, 1944 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1945 NULL, "priority out of range"); 1946 if (attributes->egress) 1947 return rte_flow_error_set(error, ENOTSUP, 1948 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1949 "egress is not supported"); 1950 if (attributes->transfer && !priv->config.dv_esw_en) 1951 return rte_flow_error_set(error, ENOTSUP, 1952 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1953 NULL, "transfer is not supported"); 1954 if (!attributes->ingress) 1955 return rte_flow_error_set(error, EINVAL, 1956 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1957 NULL, 1958 "ingress attribute is mandatory"); 1959 return 0; 1960 } 1961 1962 /** 1963 * Validate ICMP6 item. 1964 * 1965 * @param[in] item 1966 * Item specification. 1967 * @param[in] item_flags 1968 * Bit-fields that holds the items detected until now. 1969 * @param[in] ext_vlan_sup 1970 * Whether extended VLAN features are supported or not. 1971 * @param[out] error 1972 * Pointer to error structure. 1973 * 1974 * @return 1975 * 0 on success, a negative errno value otherwise and rte_errno is set. 1976 */ 1977 int 1978 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1979 uint64_t item_flags, 1980 uint8_t target_protocol, 1981 struct rte_flow_error *error) 1982 { 1983 const struct rte_flow_item_icmp6 *mask = item->mask; 1984 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1985 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1986 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1987 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1988 MLX5_FLOW_LAYER_OUTER_L4; 1989 int ret; 1990 1991 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1992 return rte_flow_error_set(error, EINVAL, 1993 RTE_FLOW_ERROR_TYPE_ITEM, item, 1994 "protocol filtering not compatible" 1995 " with ICMP6 layer"); 1996 if (!(item_flags & l3m)) 1997 return rte_flow_error_set(error, EINVAL, 1998 RTE_FLOW_ERROR_TYPE_ITEM, item, 1999 "IPv6 is mandatory to filter on" 2000 " ICMP6"); 2001 if (item_flags & l4m) 2002 return rte_flow_error_set(error, EINVAL, 2003 RTE_FLOW_ERROR_TYPE_ITEM, item, 2004 "multiple L4 layers not supported"); 2005 if (!mask) 2006 mask = &rte_flow_item_icmp6_mask; 2007 ret = mlx5_flow_item_acceptable 2008 (item, (const uint8_t *)mask, 2009 (const uint8_t *)&rte_flow_item_icmp6_mask, 2010 sizeof(struct rte_flow_item_icmp6), 2011 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2012 if (ret < 0) 2013 return ret; 2014 return 0; 2015 } 2016 2017 /** 2018 * Validate ICMP item. 2019 * 2020 * @param[in] item 2021 * Item specification. 2022 * @param[in] item_flags 2023 * Bit-fields that holds the items detected until now. 2024 * @param[out] error 2025 * Pointer to error structure. 2026 * 2027 * @return 2028 * 0 on success, a negative errno value otherwise and rte_errno is set. 2029 */ 2030 int 2031 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 2032 uint64_t item_flags, 2033 uint8_t target_protocol, 2034 struct rte_flow_error *error) 2035 { 2036 const struct rte_flow_item_icmp *mask = item->mask; 2037 const struct rte_flow_item_icmp nic_mask = { 2038 .hdr.icmp_type = 0xff, 2039 .hdr.icmp_code = 0xff, 2040 .hdr.icmp_ident = RTE_BE16(0xffff), 2041 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 2042 }; 2043 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2044 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 2045 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 2046 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2047 MLX5_FLOW_LAYER_OUTER_L4; 2048 int ret; 2049 2050 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 2051 return rte_flow_error_set(error, EINVAL, 2052 RTE_FLOW_ERROR_TYPE_ITEM, item, 2053 "protocol filtering not compatible" 2054 " with ICMP layer"); 2055 if (!(item_flags & l3m)) 2056 return rte_flow_error_set(error, EINVAL, 2057 RTE_FLOW_ERROR_TYPE_ITEM, item, 2058 "IPv4 is mandatory to filter" 2059 " on ICMP"); 2060 if (item_flags & l4m) 2061 return rte_flow_error_set(error, EINVAL, 2062 RTE_FLOW_ERROR_TYPE_ITEM, item, 2063 "multiple L4 layers not supported"); 2064 if (!mask) 2065 mask = &nic_mask; 2066 ret = mlx5_flow_item_acceptable 2067 (item, (const uint8_t *)mask, 2068 (const uint8_t *)&nic_mask, 2069 sizeof(struct rte_flow_item_icmp), 2070 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2071 if (ret < 0) 2072 return ret; 2073 return 0; 2074 } 2075 2076 /** 2077 * Validate Ethernet item. 2078 * 2079 * @param[in] item 2080 * Item specification. 2081 * @param[in] item_flags 2082 * Bit-fields that holds the items detected until now. 2083 * @param[out] error 2084 * Pointer to error structure. 2085 * 2086 * @return 2087 * 0 on success, a negative errno value otherwise and rte_errno is set. 2088 */ 2089 int 2090 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 2091 uint64_t item_flags, bool ext_vlan_sup, 2092 struct rte_flow_error *error) 2093 { 2094 const struct rte_flow_item_eth *mask = item->mask; 2095 const struct rte_flow_item_eth nic_mask = { 2096 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 2097 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 2098 .type = RTE_BE16(0xffff), 2099 .has_vlan = ext_vlan_sup ? 1 : 0, 2100 }; 2101 int ret; 2102 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2103 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 2104 MLX5_FLOW_LAYER_OUTER_L2; 2105 2106 if (item_flags & ethm) 2107 return rte_flow_error_set(error, ENOTSUP, 2108 RTE_FLOW_ERROR_TYPE_ITEM, item, 2109 "multiple L2 layers not supported"); 2110 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 2111 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 2112 return rte_flow_error_set(error, EINVAL, 2113 RTE_FLOW_ERROR_TYPE_ITEM, item, 2114 "L2 layer should not follow " 2115 "L3 layers"); 2116 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 2117 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 2118 return rte_flow_error_set(error, EINVAL, 2119 RTE_FLOW_ERROR_TYPE_ITEM, item, 2120 "L2 layer should not follow VLAN"); 2121 if (item_flags & MLX5_FLOW_LAYER_GTP) 2122 return rte_flow_error_set(error, EINVAL, 2123 RTE_FLOW_ERROR_TYPE_ITEM, item, 2124 "L2 layer should not follow GTP"); 2125 if (!mask) 2126 mask = &rte_flow_item_eth_mask; 2127 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2128 (const uint8_t *)&nic_mask, 2129 sizeof(struct rte_flow_item_eth), 2130 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2131 return ret; 2132 } 2133 2134 /** 2135 * Validate VLAN item. 2136 * 2137 * @param[in] item 2138 * Item specification. 2139 * @param[in] item_flags 2140 * Bit-fields that holds the items detected until now. 2141 * @param[in] dev 2142 * Ethernet device flow is being created on. 2143 * @param[out] error 2144 * Pointer to error structure. 2145 * 2146 * @return 2147 * 0 on success, a negative errno value otherwise and rte_errno is set. 2148 */ 2149 int 2150 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 2151 uint64_t item_flags, 2152 struct rte_eth_dev *dev, 2153 struct rte_flow_error *error) 2154 { 2155 const struct rte_flow_item_vlan *spec = item->spec; 2156 const struct rte_flow_item_vlan *mask = item->mask; 2157 const struct rte_flow_item_vlan nic_mask = { 2158 .tci = RTE_BE16(UINT16_MAX), 2159 .inner_type = RTE_BE16(UINT16_MAX), 2160 }; 2161 uint16_t vlan_tag = 0; 2162 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2163 int ret; 2164 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 2165 MLX5_FLOW_LAYER_INNER_L4) : 2166 (MLX5_FLOW_LAYER_OUTER_L3 | 2167 MLX5_FLOW_LAYER_OUTER_L4); 2168 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 2169 MLX5_FLOW_LAYER_OUTER_VLAN; 2170 2171 if (item_flags & vlanm) 2172 return rte_flow_error_set(error, EINVAL, 2173 RTE_FLOW_ERROR_TYPE_ITEM, item, 2174 "multiple VLAN layers not supported"); 2175 else if ((item_flags & l34m) != 0) 2176 return rte_flow_error_set(error, EINVAL, 2177 RTE_FLOW_ERROR_TYPE_ITEM, item, 2178 "VLAN cannot follow L3/L4 layer"); 2179 if (!mask) 2180 mask = &rte_flow_item_vlan_mask; 2181 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2182 (const uint8_t *)&nic_mask, 2183 sizeof(struct rte_flow_item_vlan), 2184 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2185 if (ret) 2186 return ret; 2187 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 2188 struct mlx5_priv *priv = dev->data->dev_private; 2189 2190 if (priv->vmwa_context) { 2191 /* 2192 * Non-NULL context means we have a virtual machine 2193 * and SR-IOV enabled, we have to create VLAN interface 2194 * to make hypervisor to setup E-Switch vport 2195 * context correctly. We avoid creating the multiple 2196 * VLAN interfaces, so we cannot support VLAN tag mask. 2197 */ 2198 return rte_flow_error_set(error, EINVAL, 2199 RTE_FLOW_ERROR_TYPE_ITEM, 2200 item, 2201 "VLAN tag mask is not" 2202 " supported in virtual" 2203 " environment"); 2204 } 2205 } 2206 if (spec) { 2207 vlan_tag = spec->tci; 2208 vlan_tag &= mask->tci; 2209 } 2210 /* 2211 * From verbs perspective an empty VLAN is equivalent 2212 * to a packet without VLAN layer. 2213 */ 2214 if (!vlan_tag) 2215 return rte_flow_error_set(error, EINVAL, 2216 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 2217 item->spec, 2218 "VLAN cannot be empty"); 2219 return 0; 2220 } 2221 2222 /** 2223 * Validate IPV4 item. 2224 * 2225 * @param[in] item 2226 * Item specification. 2227 * @param[in] item_flags 2228 * Bit-fields that holds the items detected until now. 2229 * @param[in] last_item 2230 * Previous validated item in the pattern items. 2231 * @param[in] ether_type 2232 * Type in the ethernet layer header (including dot1q). 2233 * @param[in] acc_mask 2234 * Acceptable mask, if NULL default internal default mask 2235 * will be used to check whether item fields are supported. 2236 * @param[in] range_accepted 2237 * True if range of values is accepted for specific fields, false otherwise. 2238 * @param[out] error 2239 * Pointer to error structure. 2240 * 2241 * @return 2242 * 0 on success, a negative errno value otherwise and rte_errno is set. 2243 */ 2244 int 2245 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2246 uint64_t item_flags, 2247 uint64_t last_item, 2248 uint16_t ether_type, 2249 const struct rte_flow_item_ipv4 *acc_mask, 2250 bool range_accepted, 2251 struct rte_flow_error *error) 2252 { 2253 const struct rte_flow_item_ipv4 *mask = item->mask; 2254 const struct rte_flow_item_ipv4 *spec = item->spec; 2255 const struct rte_flow_item_ipv4 nic_mask = { 2256 .hdr = { 2257 .src_addr = RTE_BE32(0xffffffff), 2258 .dst_addr = RTE_BE32(0xffffffff), 2259 .type_of_service = 0xff, 2260 .next_proto_id = 0xff, 2261 }, 2262 }; 2263 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2264 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2265 MLX5_FLOW_LAYER_OUTER_L3; 2266 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2267 MLX5_FLOW_LAYER_OUTER_L4; 2268 int ret; 2269 uint8_t next_proto = 0xFF; 2270 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2271 MLX5_FLOW_LAYER_OUTER_VLAN | 2272 MLX5_FLOW_LAYER_INNER_VLAN); 2273 2274 if ((last_item & l2_vlan) && ether_type && 2275 ether_type != RTE_ETHER_TYPE_IPV4) 2276 return rte_flow_error_set(error, EINVAL, 2277 RTE_FLOW_ERROR_TYPE_ITEM, item, 2278 "IPv4 cannot follow L2/VLAN layer " 2279 "which ether type is not IPv4"); 2280 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2281 if (mask && spec) 2282 next_proto = mask->hdr.next_proto_id & 2283 spec->hdr.next_proto_id; 2284 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2285 return rte_flow_error_set(error, EINVAL, 2286 RTE_FLOW_ERROR_TYPE_ITEM, 2287 item, 2288 "multiple tunnel " 2289 "not supported"); 2290 } 2291 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2292 return rte_flow_error_set(error, EINVAL, 2293 RTE_FLOW_ERROR_TYPE_ITEM, item, 2294 "wrong tunnel type - IPv6 specified " 2295 "but IPv4 item provided"); 2296 if (item_flags & l3m) 2297 return rte_flow_error_set(error, ENOTSUP, 2298 RTE_FLOW_ERROR_TYPE_ITEM, item, 2299 "multiple L3 layers not supported"); 2300 else if (item_flags & l4m) 2301 return rte_flow_error_set(error, EINVAL, 2302 RTE_FLOW_ERROR_TYPE_ITEM, item, 2303 "L3 cannot follow an L4 layer."); 2304 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2305 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2306 return rte_flow_error_set(error, EINVAL, 2307 RTE_FLOW_ERROR_TYPE_ITEM, item, 2308 "L3 cannot follow an NVGRE layer."); 2309 if (!mask) 2310 mask = &rte_flow_item_ipv4_mask; 2311 else if (mask->hdr.next_proto_id != 0 && 2312 mask->hdr.next_proto_id != 0xff) 2313 return rte_flow_error_set(error, EINVAL, 2314 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2315 "partial mask is not supported" 2316 " for protocol"); 2317 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2318 acc_mask ? (const uint8_t *)acc_mask 2319 : (const uint8_t *)&nic_mask, 2320 sizeof(struct rte_flow_item_ipv4), 2321 range_accepted, error); 2322 if (ret < 0) 2323 return ret; 2324 return 0; 2325 } 2326 2327 /** 2328 * Validate IPV6 item. 2329 * 2330 * @param[in] item 2331 * Item specification. 2332 * @param[in] item_flags 2333 * Bit-fields that holds the items detected until now. 2334 * @param[in] last_item 2335 * Previous validated item in the pattern items. 2336 * @param[in] ether_type 2337 * Type in the ethernet layer header (including dot1q). 2338 * @param[in] acc_mask 2339 * Acceptable mask, if NULL default internal default mask 2340 * will be used to check whether item fields are supported. 2341 * @param[out] error 2342 * Pointer to error structure. 2343 * 2344 * @return 2345 * 0 on success, a negative errno value otherwise and rte_errno is set. 2346 */ 2347 int 2348 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2349 uint64_t item_flags, 2350 uint64_t last_item, 2351 uint16_t ether_type, 2352 const struct rte_flow_item_ipv6 *acc_mask, 2353 struct rte_flow_error *error) 2354 { 2355 const struct rte_flow_item_ipv6 *mask = item->mask; 2356 const struct rte_flow_item_ipv6 *spec = item->spec; 2357 const struct rte_flow_item_ipv6 nic_mask = { 2358 .hdr = { 2359 .src_addr = 2360 "\xff\xff\xff\xff\xff\xff\xff\xff" 2361 "\xff\xff\xff\xff\xff\xff\xff\xff", 2362 .dst_addr = 2363 "\xff\xff\xff\xff\xff\xff\xff\xff" 2364 "\xff\xff\xff\xff\xff\xff\xff\xff", 2365 .vtc_flow = RTE_BE32(0xffffffff), 2366 .proto = 0xff, 2367 }, 2368 }; 2369 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2370 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2371 MLX5_FLOW_LAYER_OUTER_L3; 2372 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2373 MLX5_FLOW_LAYER_OUTER_L4; 2374 int ret; 2375 uint8_t next_proto = 0xFF; 2376 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2377 MLX5_FLOW_LAYER_OUTER_VLAN | 2378 MLX5_FLOW_LAYER_INNER_VLAN); 2379 2380 if ((last_item & l2_vlan) && ether_type && 2381 ether_type != RTE_ETHER_TYPE_IPV6) 2382 return rte_flow_error_set(error, EINVAL, 2383 RTE_FLOW_ERROR_TYPE_ITEM, item, 2384 "IPv6 cannot follow L2/VLAN layer " 2385 "which ether type is not IPv6"); 2386 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2387 next_proto = spec->hdr.proto; 2388 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2389 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2390 return rte_flow_error_set(error, EINVAL, 2391 RTE_FLOW_ERROR_TYPE_ITEM, 2392 item, 2393 "multiple tunnel " 2394 "not supported"); 2395 } 2396 if (next_proto == IPPROTO_HOPOPTS || 2397 next_proto == IPPROTO_ROUTING || 2398 next_proto == IPPROTO_FRAGMENT || 2399 next_proto == IPPROTO_ESP || 2400 next_proto == IPPROTO_AH || 2401 next_proto == IPPROTO_DSTOPTS) 2402 return rte_flow_error_set(error, EINVAL, 2403 RTE_FLOW_ERROR_TYPE_ITEM, item, 2404 "IPv6 proto (next header) should " 2405 "not be set as extension header"); 2406 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2407 return rte_flow_error_set(error, EINVAL, 2408 RTE_FLOW_ERROR_TYPE_ITEM, item, 2409 "wrong tunnel type - IPv4 specified " 2410 "but IPv6 item provided"); 2411 if (item_flags & l3m) 2412 return rte_flow_error_set(error, ENOTSUP, 2413 RTE_FLOW_ERROR_TYPE_ITEM, item, 2414 "multiple L3 layers not supported"); 2415 else if (item_flags & l4m) 2416 return rte_flow_error_set(error, EINVAL, 2417 RTE_FLOW_ERROR_TYPE_ITEM, item, 2418 "L3 cannot follow an L4 layer."); 2419 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2420 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2421 return rte_flow_error_set(error, EINVAL, 2422 RTE_FLOW_ERROR_TYPE_ITEM, item, 2423 "L3 cannot follow an NVGRE layer."); 2424 if (!mask) 2425 mask = &rte_flow_item_ipv6_mask; 2426 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2427 acc_mask ? (const uint8_t *)acc_mask 2428 : (const uint8_t *)&nic_mask, 2429 sizeof(struct rte_flow_item_ipv6), 2430 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2431 if (ret < 0) 2432 return ret; 2433 return 0; 2434 } 2435 2436 /** 2437 * Validate UDP item. 2438 * 2439 * @param[in] item 2440 * Item specification. 2441 * @param[in] item_flags 2442 * Bit-fields that holds the items detected until now. 2443 * @param[in] target_protocol 2444 * The next protocol in the previous item. 2445 * @param[in] flow_mask 2446 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2447 * @param[out] error 2448 * Pointer to error structure. 2449 * 2450 * @return 2451 * 0 on success, a negative errno value otherwise and rte_errno is set. 2452 */ 2453 int 2454 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2455 uint64_t item_flags, 2456 uint8_t target_protocol, 2457 struct rte_flow_error *error) 2458 { 2459 const struct rte_flow_item_udp *mask = item->mask; 2460 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2461 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2462 MLX5_FLOW_LAYER_OUTER_L3; 2463 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2464 MLX5_FLOW_LAYER_OUTER_L4; 2465 int ret; 2466 2467 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2468 return rte_flow_error_set(error, EINVAL, 2469 RTE_FLOW_ERROR_TYPE_ITEM, item, 2470 "protocol filtering not compatible" 2471 " with UDP layer"); 2472 if (!(item_flags & l3m)) 2473 return rte_flow_error_set(error, EINVAL, 2474 RTE_FLOW_ERROR_TYPE_ITEM, item, 2475 "L3 is mandatory to filter on L4"); 2476 if (item_flags & l4m) 2477 return rte_flow_error_set(error, EINVAL, 2478 RTE_FLOW_ERROR_TYPE_ITEM, item, 2479 "multiple L4 layers not supported"); 2480 if (!mask) 2481 mask = &rte_flow_item_udp_mask; 2482 ret = mlx5_flow_item_acceptable 2483 (item, (const uint8_t *)mask, 2484 (const uint8_t *)&rte_flow_item_udp_mask, 2485 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2486 error); 2487 if (ret < 0) 2488 return ret; 2489 return 0; 2490 } 2491 2492 /** 2493 * Validate TCP item. 2494 * 2495 * @param[in] item 2496 * Item specification. 2497 * @param[in] item_flags 2498 * Bit-fields that holds the items detected until now. 2499 * @param[in] target_protocol 2500 * The next protocol in the previous item. 2501 * @param[out] error 2502 * Pointer to error structure. 2503 * 2504 * @return 2505 * 0 on success, a negative errno value otherwise and rte_errno is set. 2506 */ 2507 int 2508 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2509 uint64_t item_flags, 2510 uint8_t target_protocol, 2511 const struct rte_flow_item_tcp *flow_mask, 2512 struct rte_flow_error *error) 2513 { 2514 const struct rte_flow_item_tcp *mask = item->mask; 2515 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2516 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2517 MLX5_FLOW_LAYER_OUTER_L3; 2518 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2519 MLX5_FLOW_LAYER_OUTER_L4; 2520 int ret; 2521 2522 MLX5_ASSERT(flow_mask); 2523 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2524 return rte_flow_error_set(error, EINVAL, 2525 RTE_FLOW_ERROR_TYPE_ITEM, item, 2526 "protocol filtering not compatible" 2527 " with TCP layer"); 2528 if (!(item_flags & l3m)) 2529 return rte_flow_error_set(error, EINVAL, 2530 RTE_FLOW_ERROR_TYPE_ITEM, item, 2531 "L3 is mandatory to filter on L4"); 2532 if (item_flags & l4m) 2533 return rte_flow_error_set(error, EINVAL, 2534 RTE_FLOW_ERROR_TYPE_ITEM, item, 2535 "multiple L4 layers not supported"); 2536 if (!mask) 2537 mask = &rte_flow_item_tcp_mask; 2538 ret = mlx5_flow_item_acceptable 2539 (item, (const uint8_t *)mask, 2540 (const uint8_t *)flow_mask, 2541 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2542 error); 2543 if (ret < 0) 2544 return ret; 2545 return 0; 2546 } 2547 2548 /** 2549 * Validate VXLAN item. 2550 * 2551 * @param[in] dev 2552 * Pointer to the Ethernet device structure. 2553 * @param[in] udp_dport 2554 * UDP destination port 2555 * @param[in] item 2556 * Item specification. 2557 * @param[in] item_flags 2558 * Bit-fields that holds the items detected until now. 2559 * @param[in] attr 2560 * Flow rule attributes. 2561 * @param[out] error 2562 * Pointer to error structure. 2563 * 2564 * @return 2565 * 0 on success, a negative errno value otherwise and rte_errno is set. 2566 */ 2567 int 2568 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev, 2569 uint16_t udp_dport, 2570 const struct rte_flow_item *item, 2571 uint64_t item_flags, 2572 const struct rte_flow_attr *attr, 2573 struct rte_flow_error *error) 2574 { 2575 const struct rte_flow_item_vxlan *spec = item->spec; 2576 const struct rte_flow_item_vxlan *mask = item->mask; 2577 int ret; 2578 struct mlx5_priv *priv = dev->data->dev_private; 2579 union vni { 2580 uint32_t vlan_id; 2581 uint8_t vni[4]; 2582 } id = { .vlan_id = 0, }; 2583 const struct rte_flow_item_vxlan nic_mask = { 2584 .vni = "\xff\xff\xff", 2585 .rsvd1 = 0xff, 2586 }; 2587 const struct rte_flow_item_vxlan *valid_mask; 2588 2589 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2590 return rte_flow_error_set(error, ENOTSUP, 2591 RTE_FLOW_ERROR_TYPE_ITEM, item, 2592 "multiple tunnel layers not" 2593 " supported"); 2594 valid_mask = &rte_flow_item_vxlan_mask; 2595 /* 2596 * Verify only UDPv4 is present as defined in 2597 * https://tools.ietf.org/html/rfc7348 2598 */ 2599 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2600 return rte_flow_error_set(error, EINVAL, 2601 RTE_FLOW_ERROR_TYPE_ITEM, item, 2602 "no outer UDP layer found"); 2603 if (!mask) 2604 mask = &rte_flow_item_vxlan_mask; 2605 2606 if (priv->sh->steering_format_version != 2607 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 || 2608 !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) { 2609 /* FDB domain & NIC domain non-zero group */ 2610 if ((attr->transfer || attr->group) && priv->sh->misc5_cap) 2611 valid_mask = &nic_mask; 2612 /* Group zero in NIC domain */ 2613 if (!attr->group && !attr->transfer && 2614 priv->sh->tunnel_header_0_1) 2615 valid_mask = &nic_mask; 2616 } 2617 ret = mlx5_flow_item_acceptable 2618 (item, (const uint8_t *)mask, 2619 (const uint8_t *)valid_mask, 2620 sizeof(struct rte_flow_item_vxlan), 2621 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2622 if (ret < 0) 2623 return ret; 2624 if (spec) { 2625 memcpy(&id.vni[1], spec->vni, 3); 2626 memcpy(&id.vni[1], mask->vni, 3); 2627 } 2628 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2629 return rte_flow_error_set(error, ENOTSUP, 2630 RTE_FLOW_ERROR_TYPE_ITEM, item, 2631 "VXLAN tunnel must be fully defined"); 2632 return 0; 2633 } 2634 2635 /** 2636 * Validate VXLAN_GPE item. 2637 * 2638 * @param[in] item 2639 * Item specification. 2640 * @param[in] item_flags 2641 * Bit-fields that holds the items detected until now. 2642 * @param[in] priv 2643 * Pointer to the private data structure. 2644 * @param[in] target_protocol 2645 * The next protocol in the previous item. 2646 * @param[out] error 2647 * Pointer to error structure. 2648 * 2649 * @return 2650 * 0 on success, a negative errno value otherwise and rte_errno is set. 2651 */ 2652 int 2653 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2654 uint64_t item_flags, 2655 struct rte_eth_dev *dev, 2656 struct rte_flow_error *error) 2657 { 2658 struct mlx5_priv *priv = dev->data->dev_private; 2659 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2660 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2661 int ret; 2662 union vni { 2663 uint32_t vlan_id; 2664 uint8_t vni[4]; 2665 } id = { .vlan_id = 0, }; 2666 2667 if (!priv->config.l3_vxlan_en) 2668 return rte_flow_error_set(error, ENOTSUP, 2669 RTE_FLOW_ERROR_TYPE_ITEM, item, 2670 "L3 VXLAN is not enabled by device" 2671 " parameter and/or not configured in" 2672 " firmware"); 2673 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2674 return rte_flow_error_set(error, ENOTSUP, 2675 RTE_FLOW_ERROR_TYPE_ITEM, item, 2676 "multiple tunnel layers not" 2677 " supported"); 2678 /* 2679 * Verify only UDPv4 is present as defined in 2680 * https://tools.ietf.org/html/rfc7348 2681 */ 2682 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2683 return rte_flow_error_set(error, EINVAL, 2684 RTE_FLOW_ERROR_TYPE_ITEM, item, 2685 "no outer UDP layer found"); 2686 if (!mask) 2687 mask = &rte_flow_item_vxlan_gpe_mask; 2688 ret = mlx5_flow_item_acceptable 2689 (item, (const uint8_t *)mask, 2690 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2691 sizeof(struct rte_flow_item_vxlan_gpe), 2692 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2693 if (ret < 0) 2694 return ret; 2695 if (spec) { 2696 if (spec->protocol) 2697 return rte_flow_error_set(error, ENOTSUP, 2698 RTE_FLOW_ERROR_TYPE_ITEM, 2699 item, 2700 "VxLAN-GPE protocol" 2701 " not supported"); 2702 memcpy(&id.vni[1], spec->vni, 3); 2703 memcpy(&id.vni[1], mask->vni, 3); 2704 } 2705 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2706 return rte_flow_error_set(error, ENOTSUP, 2707 RTE_FLOW_ERROR_TYPE_ITEM, item, 2708 "VXLAN-GPE tunnel must be fully" 2709 " defined"); 2710 return 0; 2711 } 2712 /** 2713 * Validate GRE Key item. 2714 * 2715 * @param[in] item 2716 * Item specification. 2717 * @param[in] item_flags 2718 * Bit flags to mark detected items. 2719 * @param[in] gre_item 2720 * Pointer to gre_item 2721 * @param[out] error 2722 * Pointer to error structure. 2723 * 2724 * @return 2725 * 0 on success, a negative errno value otherwise and rte_errno is set. 2726 */ 2727 int 2728 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2729 uint64_t item_flags, 2730 const struct rte_flow_item *gre_item, 2731 struct rte_flow_error *error) 2732 { 2733 const rte_be32_t *mask = item->mask; 2734 int ret = 0; 2735 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2736 const struct rte_flow_item_gre *gre_spec; 2737 const struct rte_flow_item_gre *gre_mask; 2738 2739 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2740 return rte_flow_error_set(error, ENOTSUP, 2741 RTE_FLOW_ERROR_TYPE_ITEM, item, 2742 "Multiple GRE key not support"); 2743 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2744 return rte_flow_error_set(error, ENOTSUP, 2745 RTE_FLOW_ERROR_TYPE_ITEM, item, 2746 "No preceding GRE header"); 2747 if (item_flags & MLX5_FLOW_LAYER_INNER) 2748 return rte_flow_error_set(error, ENOTSUP, 2749 RTE_FLOW_ERROR_TYPE_ITEM, item, 2750 "GRE key following a wrong item"); 2751 gre_mask = gre_item->mask; 2752 if (!gre_mask) 2753 gre_mask = &rte_flow_item_gre_mask; 2754 gre_spec = gre_item->spec; 2755 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2756 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2757 return rte_flow_error_set(error, EINVAL, 2758 RTE_FLOW_ERROR_TYPE_ITEM, item, 2759 "Key bit must be on"); 2760 2761 if (!mask) 2762 mask = &gre_key_default_mask; 2763 ret = mlx5_flow_item_acceptable 2764 (item, (const uint8_t *)mask, 2765 (const uint8_t *)&gre_key_default_mask, 2766 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2767 return ret; 2768 } 2769 2770 /** 2771 * Validate GRE item. 2772 * 2773 * @param[in] item 2774 * Item specification. 2775 * @param[in] item_flags 2776 * Bit flags to mark detected items. 2777 * @param[in] target_protocol 2778 * The next protocol in the previous item. 2779 * @param[out] error 2780 * Pointer to error structure. 2781 * 2782 * @return 2783 * 0 on success, a negative errno value otherwise and rte_errno is set. 2784 */ 2785 int 2786 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2787 uint64_t item_flags, 2788 uint8_t target_protocol, 2789 struct rte_flow_error *error) 2790 { 2791 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2792 const struct rte_flow_item_gre *mask = item->mask; 2793 int ret; 2794 const struct rte_flow_item_gre nic_mask = { 2795 .c_rsvd0_ver = RTE_BE16(0xB000), 2796 .protocol = RTE_BE16(UINT16_MAX), 2797 }; 2798 2799 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2800 return rte_flow_error_set(error, EINVAL, 2801 RTE_FLOW_ERROR_TYPE_ITEM, item, 2802 "protocol filtering not compatible" 2803 " with this GRE layer"); 2804 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2805 return rte_flow_error_set(error, ENOTSUP, 2806 RTE_FLOW_ERROR_TYPE_ITEM, item, 2807 "multiple tunnel layers not" 2808 " supported"); 2809 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2810 return rte_flow_error_set(error, ENOTSUP, 2811 RTE_FLOW_ERROR_TYPE_ITEM, item, 2812 "L3 Layer is missing"); 2813 if (!mask) 2814 mask = &rte_flow_item_gre_mask; 2815 ret = mlx5_flow_item_acceptable 2816 (item, (const uint8_t *)mask, 2817 (const uint8_t *)&nic_mask, 2818 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2819 error); 2820 if (ret < 0) 2821 return ret; 2822 #ifndef HAVE_MLX5DV_DR 2823 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2824 if (spec && (spec->protocol & mask->protocol)) 2825 return rte_flow_error_set(error, ENOTSUP, 2826 RTE_FLOW_ERROR_TYPE_ITEM, item, 2827 "without MPLS support the" 2828 " specification cannot be used for" 2829 " filtering"); 2830 #endif 2831 #endif 2832 return 0; 2833 } 2834 2835 /** 2836 * Validate Geneve item. 2837 * 2838 * @param[in] item 2839 * Item specification. 2840 * @param[in] itemFlags 2841 * Bit-fields that holds the items detected until now. 2842 * @param[in] enPriv 2843 * Pointer to the private data structure. 2844 * @param[out] error 2845 * Pointer to error structure. 2846 * 2847 * @return 2848 * 0 on success, a negative errno value otherwise and rte_errno is set. 2849 */ 2850 2851 int 2852 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2853 uint64_t item_flags, 2854 struct rte_eth_dev *dev, 2855 struct rte_flow_error *error) 2856 { 2857 struct mlx5_priv *priv = dev->data->dev_private; 2858 const struct rte_flow_item_geneve *spec = item->spec; 2859 const struct rte_flow_item_geneve *mask = item->mask; 2860 int ret; 2861 uint16_t gbhdr; 2862 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2863 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2864 const struct rte_flow_item_geneve nic_mask = { 2865 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2866 .vni = "\xff\xff\xff", 2867 .protocol = RTE_BE16(UINT16_MAX), 2868 }; 2869 2870 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2871 return rte_flow_error_set(error, ENOTSUP, 2872 RTE_FLOW_ERROR_TYPE_ITEM, item, 2873 "L3 Geneve is not enabled by device" 2874 " parameter and/or not configured in" 2875 " firmware"); 2876 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2877 return rte_flow_error_set(error, ENOTSUP, 2878 RTE_FLOW_ERROR_TYPE_ITEM, item, 2879 "multiple tunnel layers not" 2880 " supported"); 2881 /* 2882 * Verify only UDPv4 is present as defined in 2883 * https://tools.ietf.org/html/rfc7348 2884 */ 2885 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2886 return rte_flow_error_set(error, EINVAL, 2887 RTE_FLOW_ERROR_TYPE_ITEM, item, 2888 "no outer UDP layer found"); 2889 if (!mask) 2890 mask = &rte_flow_item_geneve_mask; 2891 ret = mlx5_flow_item_acceptable 2892 (item, (const uint8_t *)mask, 2893 (const uint8_t *)&nic_mask, 2894 sizeof(struct rte_flow_item_geneve), 2895 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2896 if (ret) 2897 return ret; 2898 if (spec) { 2899 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2900 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2901 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2902 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2903 return rte_flow_error_set(error, ENOTSUP, 2904 RTE_FLOW_ERROR_TYPE_ITEM, 2905 item, 2906 "Geneve protocol unsupported" 2907 " fields are being used"); 2908 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2909 return rte_flow_error_set 2910 (error, ENOTSUP, 2911 RTE_FLOW_ERROR_TYPE_ITEM, 2912 item, 2913 "Unsupported Geneve options length"); 2914 } 2915 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2916 return rte_flow_error_set 2917 (error, ENOTSUP, 2918 RTE_FLOW_ERROR_TYPE_ITEM, item, 2919 "Geneve tunnel must be fully defined"); 2920 return 0; 2921 } 2922 2923 /** 2924 * Validate Geneve TLV option item. 2925 * 2926 * @param[in] item 2927 * Item specification. 2928 * @param[in] last_item 2929 * Previous validated item in the pattern items. 2930 * @param[in] geneve_item 2931 * Previous GENEVE item specification. 2932 * @param[in] dev 2933 * Pointer to the rte_eth_dev structure. 2934 * @param[out] error 2935 * Pointer to error structure. 2936 * 2937 * @return 2938 * 0 on success, a negative errno value otherwise and rte_errno is set. 2939 */ 2940 int 2941 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item, 2942 uint64_t last_item, 2943 const struct rte_flow_item *geneve_item, 2944 struct rte_eth_dev *dev, 2945 struct rte_flow_error *error) 2946 { 2947 struct mlx5_priv *priv = dev->data->dev_private; 2948 struct mlx5_dev_ctx_shared *sh = priv->sh; 2949 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource; 2950 struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr; 2951 uint8_t data_max_supported = 2952 hca_attr->max_geneve_tlv_option_data_len * 4; 2953 struct mlx5_dev_config *config = &priv->config; 2954 const struct rte_flow_item_geneve *geneve_spec; 2955 const struct rte_flow_item_geneve *geneve_mask; 2956 const struct rte_flow_item_geneve_opt *spec = item->spec; 2957 const struct rte_flow_item_geneve_opt *mask = item->mask; 2958 unsigned int i; 2959 unsigned int data_len; 2960 uint8_t tlv_option_len; 2961 uint16_t optlen_m, optlen_v; 2962 const struct rte_flow_item_geneve_opt full_mask = { 2963 .option_class = RTE_BE16(0xffff), 2964 .option_type = 0xff, 2965 .option_len = 0x1f, 2966 }; 2967 2968 if (!mask) 2969 mask = &rte_flow_item_geneve_opt_mask; 2970 if (!spec) 2971 return rte_flow_error_set 2972 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2973 "Geneve TLV opt class/type/length must be specified"); 2974 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK) 2975 return rte_flow_error_set 2976 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2977 "Geneve TLV opt length exceeeds the limit (31)"); 2978 /* Check if class type and length masks are full. */ 2979 if (full_mask.option_class != mask->option_class || 2980 full_mask.option_type != mask->option_type || 2981 full_mask.option_len != (mask->option_len & full_mask.option_len)) 2982 return rte_flow_error_set 2983 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2984 "Geneve TLV opt class/type/length masks must be full"); 2985 /* Check if length is supported */ 2986 if ((uint32_t)spec->option_len > 2987 config->hca_attr.max_geneve_tlv_option_data_len) 2988 return rte_flow_error_set 2989 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2990 "Geneve TLV opt length not supported"); 2991 if (config->hca_attr.max_geneve_tlv_options > 1) 2992 DRV_LOG(DEBUG, 2993 "max_geneve_tlv_options supports more than 1 option"); 2994 /* Check GENEVE item preceding. */ 2995 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE)) 2996 return rte_flow_error_set 2997 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2998 "Geneve opt item must be preceded with Geneve item"); 2999 geneve_spec = geneve_item->spec; 3000 geneve_mask = geneve_item->mask ? geneve_item->mask : 3001 &rte_flow_item_geneve_mask; 3002 /* Check if GENEVE TLV option size doesn't exceed option length */ 3003 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 || 3004 geneve_spec->ver_opt_len_o_c_rsvd0)) { 3005 tlv_option_len = spec->option_len & mask->option_len; 3006 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0); 3007 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v); 3008 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0); 3009 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m); 3010 if ((optlen_v & optlen_m) <= tlv_option_len) 3011 return rte_flow_error_set 3012 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3013 "GENEVE TLV option length exceeds optlen"); 3014 } 3015 /* Check if length is 0 or data is 0. */ 3016 if (spec->data == NULL || spec->option_len == 0) 3017 return rte_flow_error_set 3018 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3019 "Geneve TLV opt with zero data/length not supported"); 3020 /* Check not all data & mask are 0. */ 3021 data_len = spec->option_len * 4; 3022 if (mask->data == NULL) { 3023 for (i = 0; i < data_len; i++) 3024 if (spec->data[i]) 3025 break; 3026 if (i == data_len) 3027 return rte_flow_error_set(error, ENOTSUP, 3028 RTE_FLOW_ERROR_TYPE_ITEM, item, 3029 "Can't match on Geneve option data 0"); 3030 } else { 3031 for (i = 0; i < data_len; i++) 3032 if (spec->data[i] & mask->data[i]) 3033 break; 3034 if (i == data_len) 3035 return rte_flow_error_set(error, ENOTSUP, 3036 RTE_FLOW_ERROR_TYPE_ITEM, item, 3037 "Can't match on Geneve option data and mask 0"); 3038 /* Check data mask supported. */ 3039 for (i = data_max_supported; i < data_len ; i++) 3040 if (mask->data[i]) 3041 return rte_flow_error_set(error, ENOTSUP, 3042 RTE_FLOW_ERROR_TYPE_ITEM, item, 3043 "Data mask is of unsupported size"); 3044 } 3045 /* Check GENEVE option is supported in NIC. */ 3046 if (!config->hca_attr.geneve_tlv_opt) 3047 return rte_flow_error_set 3048 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3049 "Geneve TLV opt not supported"); 3050 /* Check if we already have geneve option with different type/class. */ 3051 rte_spinlock_lock(&sh->geneve_tlv_opt_sl); 3052 geneve_opt_resource = sh->geneve_tlv_option_resource; 3053 if (geneve_opt_resource != NULL) 3054 if (geneve_opt_resource->option_class != spec->option_class || 3055 geneve_opt_resource->option_type != spec->option_type || 3056 geneve_opt_resource->length != spec->option_len) { 3057 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 3058 return rte_flow_error_set(error, ENOTSUP, 3059 RTE_FLOW_ERROR_TYPE_ITEM, item, 3060 "Only one Geneve TLV option supported"); 3061 } 3062 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 3063 return 0; 3064 } 3065 3066 /** 3067 * Validate MPLS item. 3068 * 3069 * @param[in] dev 3070 * Pointer to the rte_eth_dev structure. 3071 * @param[in] item 3072 * Item specification. 3073 * @param[in] item_flags 3074 * Bit-fields that holds the items detected until now. 3075 * @param[in] prev_layer 3076 * The protocol layer indicated in previous item. 3077 * @param[out] error 3078 * Pointer to error structure. 3079 * 3080 * @return 3081 * 0 on success, a negative errno value otherwise and rte_errno is set. 3082 */ 3083 int 3084 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 3085 const struct rte_flow_item *item __rte_unused, 3086 uint64_t item_flags __rte_unused, 3087 uint64_t prev_layer __rte_unused, 3088 struct rte_flow_error *error) 3089 { 3090 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 3091 const struct rte_flow_item_mpls *mask = item->mask; 3092 struct mlx5_priv *priv = dev->data->dev_private; 3093 int ret; 3094 3095 if (!priv->config.mpls_en) 3096 return rte_flow_error_set(error, ENOTSUP, 3097 RTE_FLOW_ERROR_TYPE_ITEM, item, 3098 "MPLS not supported or" 3099 " disabled in firmware" 3100 " configuration."); 3101 /* MPLS over UDP, GRE is allowed */ 3102 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP | 3103 MLX5_FLOW_LAYER_GRE | 3104 MLX5_FLOW_LAYER_GRE_KEY))) 3105 return rte_flow_error_set(error, EINVAL, 3106 RTE_FLOW_ERROR_TYPE_ITEM, item, 3107 "protocol filtering not compatible" 3108 " with MPLS layer"); 3109 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 3110 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 3111 !(item_flags & MLX5_FLOW_LAYER_GRE)) 3112 return rte_flow_error_set(error, ENOTSUP, 3113 RTE_FLOW_ERROR_TYPE_ITEM, item, 3114 "multiple tunnel layers not" 3115 " supported"); 3116 if (!mask) 3117 mask = &rte_flow_item_mpls_mask; 3118 ret = mlx5_flow_item_acceptable 3119 (item, (const uint8_t *)mask, 3120 (const uint8_t *)&rte_flow_item_mpls_mask, 3121 sizeof(struct rte_flow_item_mpls), 3122 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3123 if (ret < 0) 3124 return ret; 3125 return 0; 3126 #else 3127 return rte_flow_error_set(error, ENOTSUP, 3128 RTE_FLOW_ERROR_TYPE_ITEM, item, 3129 "MPLS is not supported by Verbs, please" 3130 " update."); 3131 #endif 3132 } 3133 3134 /** 3135 * Validate NVGRE item. 3136 * 3137 * @param[in] item 3138 * Item specification. 3139 * @param[in] item_flags 3140 * Bit flags to mark detected items. 3141 * @param[in] target_protocol 3142 * The next protocol in the previous item. 3143 * @param[out] error 3144 * Pointer to error structure. 3145 * 3146 * @return 3147 * 0 on success, a negative errno value otherwise and rte_errno is set. 3148 */ 3149 int 3150 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 3151 uint64_t item_flags, 3152 uint8_t target_protocol, 3153 struct rte_flow_error *error) 3154 { 3155 const struct rte_flow_item_nvgre *mask = item->mask; 3156 int ret; 3157 3158 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 3159 return rte_flow_error_set(error, EINVAL, 3160 RTE_FLOW_ERROR_TYPE_ITEM, item, 3161 "protocol filtering not compatible" 3162 " with this GRE layer"); 3163 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3164 return rte_flow_error_set(error, ENOTSUP, 3165 RTE_FLOW_ERROR_TYPE_ITEM, item, 3166 "multiple tunnel layers not" 3167 " supported"); 3168 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 3169 return rte_flow_error_set(error, ENOTSUP, 3170 RTE_FLOW_ERROR_TYPE_ITEM, item, 3171 "L3 Layer is missing"); 3172 if (!mask) 3173 mask = &rte_flow_item_nvgre_mask; 3174 ret = mlx5_flow_item_acceptable 3175 (item, (const uint8_t *)mask, 3176 (const uint8_t *)&rte_flow_item_nvgre_mask, 3177 sizeof(struct rte_flow_item_nvgre), 3178 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3179 if (ret < 0) 3180 return ret; 3181 return 0; 3182 } 3183 3184 /** 3185 * Validate eCPRI item. 3186 * 3187 * @param[in] item 3188 * Item specification. 3189 * @param[in] item_flags 3190 * Bit-fields that holds the items detected until now. 3191 * @param[in] last_item 3192 * Previous validated item in the pattern items. 3193 * @param[in] ether_type 3194 * Type in the ethernet layer header (including dot1q). 3195 * @param[in] acc_mask 3196 * Acceptable mask, if NULL default internal default mask 3197 * will be used to check whether item fields are supported. 3198 * @param[out] error 3199 * Pointer to error structure. 3200 * 3201 * @return 3202 * 0 on success, a negative errno value otherwise and rte_errno is set. 3203 */ 3204 int 3205 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 3206 uint64_t item_flags, 3207 uint64_t last_item, 3208 uint16_t ether_type, 3209 const struct rte_flow_item_ecpri *acc_mask, 3210 struct rte_flow_error *error) 3211 { 3212 const struct rte_flow_item_ecpri *mask = item->mask; 3213 const struct rte_flow_item_ecpri nic_mask = { 3214 .hdr = { 3215 .common = { 3216 .u32 = 3217 RTE_BE32(((const struct rte_ecpri_common_hdr) { 3218 .type = 0xFF, 3219 }).u32), 3220 }, 3221 .dummy[0] = 0xFFFFFFFF, 3222 }, 3223 }; 3224 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 3225 MLX5_FLOW_LAYER_OUTER_VLAN); 3226 struct rte_flow_item_ecpri mask_lo; 3227 3228 if (!(last_item & outer_l2_vlan) && 3229 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP) 3230 return rte_flow_error_set(error, EINVAL, 3231 RTE_FLOW_ERROR_TYPE_ITEM, item, 3232 "eCPRI can only follow L2/VLAN layer or UDP layer"); 3233 if ((last_item & outer_l2_vlan) && ether_type && 3234 ether_type != RTE_ETHER_TYPE_ECPRI) 3235 return rte_flow_error_set(error, EINVAL, 3236 RTE_FLOW_ERROR_TYPE_ITEM, item, 3237 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE"); 3238 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3239 return rte_flow_error_set(error, EINVAL, 3240 RTE_FLOW_ERROR_TYPE_ITEM, item, 3241 "eCPRI with tunnel is not supported right now"); 3242 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 3243 return rte_flow_error_set(error, ENOTSUP, 3244 RTE_FLOW_ERROR_TYPE_ITEM, item, 3245 "multiple L3 layers not supported"); 3246 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 3247 return rte_flow_error_set(error, EINVAL, 3248 RTE_FLOW_ERROR_TYPE_ITEM, item, 3249 "eCPRI cannot coexist with a TCP layer"); 3250 /* In specification, eCPRI could be over UDP layer. */ 3251 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 3252 return rte_flow_error_set(error, EINVAL, 3253 RTE_FLOW_ERROR_TYPE_ITEM, item, 3254 "eCPRI over UDP layer is not yet supported right now"); 3255 /* Mask for type field in common header could be zero. */ 3256 if (!mask) 3257 mask = &rte_flow_item_ecpri_mask; 3258 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 3259 /* Input mask is in big-endian format. */ 3260 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 3261 return rte_flow_error_set(error, EINVAL, 3262 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3263 "partial mask is not supported for protocol"); 3264 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 3265 return rte_flow_error_set(error, EINVAL, 3266 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3267 "message header mask must be after a type mask"); 3268 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 3269 acc_mask ? (const uint8_t *)acc_mask 3270 : (const uint8_t *)&nic_mask, 3271 sizeof(struct rte_flow_item_ecpri), 3272 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3273 } 3274 3275 static int 3276 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 3277 const struct rte_flow_attr *attr __rte_unused, 3278 const struct rte_flow_item items[] __rte_unused, 3279 const struct rte_flow_action actions[] __rte_unused, 3280 bool external __rte_unused, 3281 int hairpin __rte_unused, 3282 struct rte_flow_error *error) 3283 { 3284 return rte_flow_error_set(error, ENOTSUP, 3285 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3286 } 3287 3288 static struct mlx5_flow * 3289 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 3290 const struct rte_flow_attr *attr __rte_unused, 3291 const struct rte_flow_item items[] __rte_unused, 3292 const struct rte_flow_action actions[] __rte_unused, 3293 struct rte_flow_error *error) 3294 { 3295 rte_flow_error_set(error, ENOTSUP, 3296 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3297 return NULL; 3298 } 3299 3300 static int 3301 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 3302 struct mlx5_flow *dev_flow __rte_unused, 3303 const struct rte_flow_attr *attr __rte_unused, 3304 const struct rte_flow_item items[] __rte_unused, 3305 const struct rte_flow_action actions[] __rte_unused, 3306 struct rte_flow_error *error) 3307 { 3308 return rte_flow_error_set(error, ENOTSUP, 3309 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3310 } 3311 3312 static int 3313 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 3314 struct rte_flow *flow __rte_unused, 3315 struct rte_flow_error *error) 3316 { 3317 return rte_flow_error_set(error, ENOTSUP, 3318 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3319 } 3320 3321 static void 3322 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 3323 struct rte_flow *flow __rte_unused) 3324 { 3325 } 3326 3327 static void 3328 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 3329 struct rte_flow *flow __rte_unused) 3330 { 3331 } 3332 3333 static int 3334 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3335 struct rte_flow *flow __rte_unused, 3336 const struct rte_flow_action *actions __rte_unused, 3337 void *data __rte_unused, 3338 struct rte_flow_error *error) 3339 { 3340 return rte_flow_error_set(error, ENOTSUP, 3341 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3342 } 3343 3344 static int 3345 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused, 3346 uint32_t domains __rte_unused, 3347 uint32_t flags __rte_unused) 3348 { 3349 return 0; 3350 } 3351 3352 /* Void driver to protect from null pointer reference. */ 3353 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3354 .validate = flow_null_validate, 3355 .prepare = flow_null_prepare, 3356 .translate = flow_null_translate, 3357 .apply = flow_null_apply, 3358 .remove = flow_null_remove, 3359 .destroy = flow_null_destroy, 3360 .query = flow_null_query, 3361 .sync_domain = flow_null_sync_domain, 3362 }; 3363 3364 /** 3365 * Select flow driver type according to flow attributes and device 3366 * configuration. 3367 * 3368 * @param[in] dev 3369 * Pointer to the dev structure. 3370 * @param[in] attr 3371 * Pointer to the flow attributes. 3372 * 3373 * @return 3374 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3375 */ 3376 static enum mlx5_flow_drv_type 3377 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3378 { 3379 struct mlx5_priv *priv = dev->data->dev_private; 3380 /* The OS can determine first a specific flow type (DV, VERBS) */ 3381 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3382 3383 if (type != MLX5_FLOW_TYPE_MAX) 3384 return type; 3385 /* If no OS specific type - continue with DV/VERBS selection */ 3386 if (attr->transfer && priv->config.dv_esw_en) 3387 type = MLX5_FLOW_TYPE_DV; 3388 if (!attr->transfer) 3389 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3390 MLX5_FLOW_TYPE_VERBS; 3391 return type; 3392 } 3393 3394 #define flow_get_drv_ops(type) flow_drv_ops[type] 3395 3396 /** 3397 * Flow driver validation API. This abstracts calling driver specific functions. 3398 * The type of flow driver is determined according to flow attributes. 3399 * 3400 * @param[in] dev 3401 * Pointer to the dev structure. 3402 * @param[in] attr 3403 * Pointer to the flow attributes. 3404 * @param[in] items 3405 * Pointer to the list of items. 3406 * @param[in] actions 3407 * Pointer to the list of actions. 3408 * @param[in] external 3409 * This flow rule is created by request external to PMD. 3410 * @param[in] hairpin 3411 * Number of hairpin TX actions, 0 means classic flow. 3412 * @param[out] error 3413 * Pointer to the error structure. 3414 * 3415 * @return 3416 * 0 on success, a negative errno value otherwise and rte_errno is set. 3417 */ 3418 static inline int 3419 flow_drv_validate(struct rte_eth_dev *dev, 3420 const struct rte_flow_attr *attr, 3421 const struct rte_flow_item items[], 3422 const struct rte_flow_action actions[], 3423 bool external, int hairpin, struct rte_flow_error *error) 3424 { 3425 const struct mlx5_flow_driver_ops *fops; 3426 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3427 3428 fops = flow_get_drv_ops(type); 3429 return fops->validate(dev, attr, items, actions, external, 3430 hairpin, error); 3431 } 3432 3433 /** 3434 * Flow driver preparation API. This abstracts calling driver specific 3435 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3436 * calculates the size of memory required for device flow, allocates the memory, 3437 * initializes the device flow and returns the pointer. 3438 * 3439 * @note 3440 * This function initializes device flow structure such as dv or verbs in 3441 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3442 * rest. For example, adding returning device flow to flow->dev_flow list and 3443 * setting backward reference to the flow should be done out of this function. 3444 * layers field is not filled either. 3445 * 3446 * @param[in] dev 3447 * Pointer to the dev structure. 3448 * @param[in] attr 3449 * Pointer to the flow attributes. 3450 * @param[in] items 3451 * Pointer to the list of items. 3452 * @param[in] actions 3453 * Pointer to the list of actions. 3454 * @param[in] flow_idx 3455 * This memory pool index to the flow. 3456 * @param[out] error 3457 * Pointer to the error structure. 3458 * 3459 * @return 3460 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3461 */ 3462 static inline struct mlx5_flow * 3463 flow_drv_prepare(struct rte_eth_dev *dev, 3464 const struct rte_flow *flow, 3465 const struct rte_flow_attr *attr, 3466 const struct rte_flow_item items[], 3467 const struct rte_flow_action actions[], 3468 uint32_t flow_idx, 3469 struct rte_flow_error *error) 3470 { 3471 const struct mlx5_flow_driver_ops *fops; 3472 enum mlx5_flow_drv_type type = flow->drv_type; 3473 struct mlx5_flow *mlx5_flow = NULL; 3474 3475 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3476 fops = flow_get_drv_ops(type); 3477 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3478 if (mlx5_flow) 3479 mlx5_flow->flow_idx = flow_idx; 3480 return mlx5_flow; 3481 } 3482 3483 /** 3484 * Flow driver translation API. This abstracts calling driver specific 3485 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3486 * translates a generic flow into a driver flow. flow_drv_prepare() must 3487 * precede. 3488 * 3489 * @note 3490 * dev_flow->layers could be filled as a result of parsing during translation 3491 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3492 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3493 * flow->actions could be overwritten even though all the expanded dev_flows 3494 * have the same actions. 3495 * 3496 * @param[in] dev 3497 * Pointer to the rte dev structure. 3498 * @param[in, out] dev_flow 3499 * Pointer to the mlx5 flow. 3500 * @param[in] attr 3501 * Pointer to the flow attributes. 3502 * @param[in] items 3503 * Pointer to the list of items. 3504 * @param[in] actions 3505 * Pointer to the list of actions. 3506 * @param[out] error 3507 * Pointer to the error structure. 3508 * 3509 * @return 3510 * 0 on success, a negative errno value otherwise and rte_errno is set. 3511 */ 3512 static inline int 3513 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3514 const struct rte_flow_attr *attr, 3515 const struct rte_flow_item items[], 3516 const struct rte_flow_action actions[], 3517 struct rte_flow_error *error) 3518 { 3519 const struct mlx5_flow_driver_ops *fops; 3520 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3521 3522 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3523 fops = flow_get_drv_ops(type); 3524 return fops->translate(dev, dev_flow, attr, items, actions, error); 3525 } 3526 3527 /** 3528 * Flow driver apply API. This abstracts calling driver specific functions. 3529 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3530 * translated driver flows on to device. flow_drv_translate() must precede. 3531 * 3532 * @param[in] dev 3533 * Pointer to Ethernet device structure. 3534 * @param[in, out] flow 3535 * Pointer to flow structure. 3536 * @param[out] error 3537 * Pointer to error structure. 3538 * 3539 * @return 3540 * 0 on success, a negative errno value otherwise and rte_errno is set. 3541 */ 3542 static inline int 3543 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3544 struct rte_flow_error *error) 3545 { 3546 const struct mlx5_flow_driver_ops *fops; 3547 enum mlx5_flow_drv_type type = flow->drv_type; 3548 3549 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3550 fops = flow_get_drv_ops(type); 3551 return fops->apply(dev, flow, error); 3552 } 3553 3554 /** 3555 * Flow driver destroy API. This abstracts calling driver specific functions. 3556 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3557 * on device and releases resources of the flow. 3558 * 3559 * @param[in] dev 3560 * Pointer to Ethernet device. 3561 * @param[in, out] flow 3562 * Pointer to flow structure. 3563 */ 3564 static inline void 3565 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3566 { 3567 const struct mlx5_flow_driver_ops *fops; 3568 enum mlx5_flow_drv_type type = flow->drv_type; 3569 3570 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3571 fops = flow_get_drv_ops(type); 3572 fops->destroy(dev, flow); 3573 } 3574 3575 /** 3576 * Flow driver find RSS policy tbl API. This abstracts calling driver 3577 * specific functions. Parent flow (rte_flow) should have driver 3578 * type (drv_type). It will find the RSS policy table that has the rss_desc. 3579 * 3580 * @param[in] dev 3581 * Pointer to Ethernet device. 3582 * @param[in, out] flow 3583 * Pointer to flow structure. 3584 * @param[in] policy 3585 * Pointer to meter policy table. 3586 * @param[in] rss_desc 3587 * Pointer to rss_desc 3588 */ 3589 static struct mlx5_flow_meter_sub_policy * 3590 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev, 3591 struct rte_flow *flow, 3592 struct mlx5_flow_meter_policy *policy, 3593 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS]) 3594 { 3595 const struct mlx5_flow_driver_ops *fops; 3596 enum mlx5_flow_drv_type type = flow->drv_type; 3597 3598 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3599 fops = flow_get_drv_ops(type); 3600 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc); 3601 } 3602 3603 /** 3604 * Flow driver color tag rule API. This abstracts calling driver 3605 * specific functions. Parent flow (rte_flow) should have driver 3606 * type (drv_type). It will create the color tag rules in hierarchy meter. 3607 * 3608 * @param[in] dev 3609 * Pointer to Ethernet device. 3610 * @param[in, out] flow 3611 * Pointer to flow structure. 3612 * @param[in] fm 3613 * Pointer to flow meter structure. 3614 * @param[in] src_port 3615 * The src port this extra rule should use. 3616 * @param[in] item 3617 * The src port id match item. 3618 * @param[out] error 3619 * Pointer to error structure. 3620 */ 3621 static int 3622 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev, 3623 struct rte_flow *flow, 3624 struct mlx5_flow_meter_info *fm, 3625 int32_t src_port, 3626 const struct rte_flow_item *item, 3627 struct rte_flow_error *error) 3628 { 3629 const struct mlx5_flow_driver_ops *fops; 3630 enum mlx5_flow_drv_type type = flow->drv_type; 3631 3632 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3633 fops = flow_get_drv_ops(type); 3634 return fops->meter_hierarchy_rule_create(dev, fm, 3635 src_port, item, error); 3636 } 3637 3638 /** 3639 * Get RSS action from the action list. 3640 * 3641 * @param[in] dev 3642 * Pointer to Ethernet device. 3643 * @param[in] actions 3644 * Pointer to the list of actions. 3645 * @param[in] flow 3646 * Parent flow structure pointer. 3647 * 3648 * @return 3649 * Pointer to the RSS action if exist, else return NULL. 3650 */ 3651 static const struct rte_flow_action_rss* 3652 flow_get_rss_action(struct rte_eth_dev *dev, 3653 const struct rte_flow_action actions[]) 3654 { 3655 struct mlx5_priv *priv = dev->data->dev_private; 3656 const struct rte_flow_action_rss *rss = NULL; 3657 struct mlx5_meter_policy_action_container *acg; 3658 struct mlx5_meter_policy_action_container *acy; 3659 3660 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3661 switch (actions->type) { 3662 case RTE_FLOW_ACTION_TYPE_RSS: 3663 rss = actions->conf; 3664 break; 3665 case RTE_FLOW_ACTION_TYPE_SAMPLE: 3666 { 3667 const struct rte_flow_action_sample *sample = 3668 actions->conf; 3669 const struct rte_flow_action *act = sample->actions; 3670 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) 3671 if (act->type == RTE_FLOW_ACTION_TYPE_RSS) 3672 rss = act->conf; 3673 break; 3674 } 3675 case RTE_FLOW_ACTION_TYPE_METER: 3676 { 3677 uint32_t mtr_idx; 3678 struct mlx5_flow_meter_info *fm; 3679 struct mlx5_flow_meter_policy *policy; 3680 const struct rte_flow_action_meter *mtr = actions->conf; 3681 3682 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx); 3683 if (fm && !fm->def_policy) { 3684 policy = mlx5_flow_meter_policy_find(dev, 3685 fm->policy_id, NULL); 3686 MLX5_ASSERT(policy); 3687 if (policy->is_hierarchy) { 3688 policy = 3689 mlx5_flow_meter_hierarchy_get_final_policy(dev, 3690 policy); 3691 if (!policy) 3692 return NULL; 3693 } 3694 if (policy->is_rss) { 3695 acg = 3696 &policy->act_cnt[RTE_COLOR_GREEN]; 3697 acy = 3698 &policy->act_cnt[RTE_COLOR_YELLOW]; 3699 if (acg->fate_action == 3700 MLX5_FLOW_FATE_SHARED_RSS) 3701 rss = acg->rss->conf; 3702 else if (acy->fate_action == 3703 MLX5_FLOW_FATE_SHARED_RSS) 3704 rss = acy->rss->conf; 3705 } 3706 } 3707 break; 3708 } 3709 default: 3710 break; 3711 } 3712 } 3713 return rss; 3714 } 3715 3716 /** 3717 * Get ASO age action by index. 3718 * 3719 * @param[in] dev 3720 * Pointer to the Ethernet device structure. 3721 * @param[in] age_idx 3722 * Index to the ASO age action. 3723 * 3724 * @return 3725 * The specified ASO age action. 3726 */ 3727 struct mlx5_aso_age_action* 3728 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx) 3729 { 3730 uint16_t pool_idx = age_idx & UINT16_MAX; 3731 uint16_t offset = (age_idx >> 16) & UINT16_MAX; 3732 struct mlx5_priv *priv = dev->data->dev_private; 3733 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng; 3734 struct mlx5_aso_age_pool *pool; 3735 3736 rte_rwlock_read_lock(&mng->resize_rwl); 3737 pool = mng->pools[pool_idx]; 3738 rte_rwlock_read_unlock(&mng->resize_rwl); 3739 return &pool->actions[offset - 1]; 3740 } 3741 3742 /* maps indirect action to translated direct in some actions array */ 3743 struct mlx5_translated_action_handle { 3744 struct rte_flow_action_handle *action; /**< Indirect action handle. */ 3745 int index; /**< Index in related array of rte_flow_action. */ 3746 }; 3747 3748 /** 3749 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related 3750 * direct action if translation possible. 3751 * This functionality used to run same execution path for both direct and 3752 * indirect actions on flow create. All necessary preparations for indirect 3753 * action handling should be performed on *handle* actions list returned 3754 * from this call. 3755 * 3756 * @param[in] dev 3757 * Pointer to Ethernet device. 3758 * @param[in] actions 3759 * List of actions to translate. 3760 * @param[out] handle 3761 * List to store translated indirect action object handles. 3762 * @param[in, out] indir_n 3763 * Size of *handle* array. On return should be updated with number of 3764 * indirect actions retrieved from the *actions* list. 3765 * @param[out] translated_actions 3766 * List of actions where all indirect actions were translated to direct 3767 * if possible. NULL if no translation took place. 3768 * @param[out] error 3769 * Pointer to the error structure. 3770 * 3771 * @return 3772 * 0 on success, a negative errno value otherwise and rte_errno is set. 3773 */ 3774 static int 3775 flow_action_handles_translate(struct rte_eth_dev *dev, 3776 const struct rte_flow_action actions[], 3777 struct mlx5_translated_action_handle *handle, 3778 int *indir_n, 3779 struct rte_flow_action **translated_actions, 3780 struct rte_flow_error *error) 3781 { 3782 struct mlx5_priv *priv = dev->data->dev_private; 3783 struct rte_flow_action *translated = NULL; 3784 size_t actions_size; 3785 int n; 3786 int copied_n = 0; 3787 struct mlx5_translated_action_handle *handle_end = NULL; 3788 3789 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3790 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT) 3791 continue; 3792 if (copied_n == *indir_n) { 3793 return rte_flow_error_set 3794 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3795 NULL, "too many shared actions"); 3796 } 3797 rte_memcpy(&handle[copied_n].action, &actions[n].conf, 3798 sizeof(actions[n].conf)); 3799 handle[copied_n].index = n; 3800 copied_n++; 3801 } 3802 n++; 3803 *indir_n = copied_n; 3804 if (!copied_n) 3805 return 0; 3806 actions_size = sizeof(struct rte_flow_action) * n; 3807 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3808 if (!translated) { 3809 rte_errno = ENOMEM; 3810 return -ENOMEM; 3811 } 3812 memcpy(translated, actions, actions_size); 3813 for (handle_end = handle + copied_n; handle < handle_end; handle++) { 3814 struct mlx5_shared_action_rss *shared_rss; 3815 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3816 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3817 uint32_t idx = act_idx & 3818 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3819 3820 switch (type) { 3821 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3822 shared_rss = mlx5_ipool_get 3823 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx); 3824 translated[handle->index].type = 3825 RTE_FLOW_ACTION_TYPE_RSS; 3826 translated[handle->index].conf = 3827 &shared_rss->origin; 3828 break; 3829 case MLX5_INDIRECT_ACTION_TYPE_COUNT: 3830 translated[handle->index].type = 3831 (enum rte_flow_action_type) 3832 MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 3833 translated[handle->index].conf = (void *)(uintptr_t)idx; 3834 break; 3835 case MLX5_INDIRECT_ACTION_TYPE_AGE: 3836 if (priv->sh->flow_hit_aso_en) { 3837 translated[handle->index].type = 3838 (enum rte_flow_action_type) 3839 MLX5_RTE_FLOW_ACTION_TYPE_AGE; 3840 translated[handle->index].conf = 3841 (void *)(uintptr_t)idx; 3842 break; 3843 } 3844 /* Fall-through */ 3845 case MLX5_INDIRECT_ACTION_TYPE_CT: 3846 if (priv->sh->ct_aso_en) { 3847 translated[handle->index].type = 3848 RTE_FLOW_ACTION_TYPE_CONNTRACK; 3849 translated[handle->index].conf = 3850 (void *)(uintptr_t)idx; 3851 break; 3852 } 3853 /* Fall-through */ 3854 default: 3855 mlx5_free(translated); 3856 return rte_flow_error_set 3857 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3858 NULL, "invalid indirect action type"); 3859 } 3860 } 3861 *translated_actions = translated; 3862 return 0; 3863 } 3864 3865 /** 3866 * Get Shared RSS action from the action list. 3867 * 3868 * @param[in] dev 3869 * Pointer to Ethernet device. 3870 * @param[in] shared 3871 * Pointer to the list of actions. 3872 * @param[in] shared_n 3873 * Actions list length. 3874 * 3875 * @return 3876 * The MLX5 RSS action ID if exists, otherwise return 0. 3877 */ 3878 static uint32_t 3879 flow_get_shared_rss_action(struct rte_eth_dev *dev, 3880 struct mlx5_translated_action_handle *handle, 3881 int shared_n) 3882 { 3883 struct mlx5_translated_action_handle *handle_end; 3884 struct mlx5_priv *priv = dev->data->dev_private; 3885 struct mlx5_shared_action_rss *shared_rss; 3886 3887 3888 for (handle_end = handle + shared_n; handle < handle_end; handle++) { 3889 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3890 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3891 uint32_t idx = act_idx & 3892 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3893 switch (type) { 3894 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3895 shared_rss = mlx5_ipool_get 3896 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 3897 idx); 3898 __atomic_add_fetch(&shared_rss->refcnt, 1, 3899 __ATOMIC_RELAXED); 3900 return idx; 3901 default: 3902 break; 3903 } 3904 } 3905 return 0; 3906 } 3907 3908 static unsigned int 3909 find_graph_root(uint32_t rss_level) 3910 { 3911 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3912 MLX5_EXPANSION_ROOT_OUTER; 3913 } 3914 3915 /** 3916 * Get layer flags from the prefix flow. 3917 * 3918 * Some flows may be split to several subflows, the prefix subflow gets the 3919 * match items and the suffix sub flow gets the actions. 3920 * Some actions need the user defined match item flags to get the detail for 3921 * the action. 3922 * This function helps the suffix flow to get the item layer flags from prefix 3923 * subflow. 3924 * 3925 * @param[in] dev_flow 3926 * Pointer the created preifx subflow. 3927 * 3928 * @return 3929 * The layers get from prefix subflow. 3930 */ 3931 static inline uint64_t 3932 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3933 { 3934 uint64_t layers = 0; 3935 3936 /* 3937 * Layers bits could be localization, but usually the compiler will 3938 * help to do the optimization work for source code. 3939 * If no decap actions, use the layers directly. 3940 */ 3941 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3942 return dev_flow->handle->layers; 3943 /* Convert L3 layers with decap action. */ 3944 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3945 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3946 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3947 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3948 /* Convert L4 layers with decap action. */ 3949 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3950 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3951 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3952 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3953 return layers; 3954 } 3955 3956 /** 3957 * Get metadata split action information. 3958 * 3959 * @param[in] actions 3960 * Pointer to the list of actions. 3961 * @param[out] qrss 3962 * Pointer to the return pointer. 3963 * @param[out] qrss_type 3964 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3965 * if no QUEUE/RSS is found. 3966 * @param[out] encap_idx 3967 * Pointer to the index of the encap action if exists, otherwise the last 3968 * action index. 3969 * 3970 * @return 3971 * Total number of actions. 3972 */ 3973 static int 3974 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 3975 const struct rte_flow_action **qrss, 3976 int *encap_idx) 3977 { 3978 const struct rte_flow_action_raw_encap *raw_encap; 3979 int actions_n = 0; 3980 int raw_decap_idx = -1; 3981 3982 *encap_idx = -1; 3983 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3984 switch (actions->type) { 3985 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3986 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3987 *encap_idx = actions_n; 3988 break; 3989 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3990 raw_decap_idx = actions_n; 3991 break; 3992 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3993 raw_encap = actions->conf; 3994 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3995 *encap_idx = raw_decap_idx != -1 ? 3996 raw_decap_idx : actions_n; 3997 break; 3998 case RTE_FLOW_ACTION_TYPE_QUEUE: 3999 case RTE_FLOW_ACTION_TYPE_RSS: 4000 *qrss = actions; 4001 break; 4002 default: 4003 break; 4004 } 4005 actions_n++; 4006 } 4007 if (*encap_idx == -1) 4008 *encap_idx = actions_n; 4009 /* Count RTE_FLOW_ACTION_TYPE_END. */ 4010 return actions_n + 1; 4011 } 4012 4013 /** 4014 * Check if the action will change packet. 4015 * 4016 * @param dev 4017 * Pointer to Ethernet device. 4018 * @param[in] type 4019 * action type. 4020 * 4021 * @return 4022 * true if action will change packet, false otherwise. 4023 */ 4024 static bool flow_check_modify_action_type(struct rte_eth_dev *dev, 4025 enum rte_flow_action_type type) 4026 { 4027 struct mlx5_priv *priv = dev->data->dev_private; 4028 4029 switch (type) { 4030 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 4031 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 4032 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 4033 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 4034 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 4035 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 4036 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 4037 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 4038 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 4039 case RTE_FLOW_ACTION_TYPE_SET_TTL: 4040 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 4041 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 4042 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 4043 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 4044 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 4045 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 4046 case RTE_FLOW_ACTION_TYPE_SET_META: 4047 case RTE_FLOW_ACTION_TYPE_SET_TAG: 4048 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 4049 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4050 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4051 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4052 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4053 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4054 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4055 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4056 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4057 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4058 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 4059 return true; 4060 case RTE_FLOW_ACTION_TYPE_FLAG: 4061 case RTE_FLOW_ACTION_TYPE_MARK: 4062 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) 4063 return true; 4064 else 4065 return false; 4066 default: 4067 return false; 4068 } 4069 } 4070 4071 /** 4072 * Check meter action from the action list. 4073 * 4074 * @param dev 4075 * Pointer to Ethernet device. 4076 * @param[in] actions 4077 * Pointer to the list of actions. 4078 * @param[out] has_mtr 4079 * Pointer to the meter exist flag. 4080 * @param[out] has_modify 4081 * Pointer to the flag showing there's packet change action. 4082 * @param[out] meter_id 4083 * Pointer to the meter id. 4084 * 4085 * @return 4086 * Total number of actions. 4087 */ 4088 static int 4089 flow_check_meter_action(struct rte_eth_dev *dev, 4090 const struct rte_flow_action actions[], 4091 bool *has_mtr, bool *has_modify, uint32_t *meter_id) 4092 { 4093 const struct rte_flow_action_meter *mtr = NULL; 4094 int actions_n = 0; 4095 4096 MLX5_ASSERT(has_mtr); 4097 *has_mtr = false; 4098 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4099 switch (actions->type) { 4100 case RTE_FLOW_ACTION_TYPE_METER: 4101 mtr = actions->conf; 4102 *meter_id = mtr->mtr_id; 4103 *has_mtr = true; 4104 break; 4105 default: 4106 break; 4107 } 4108 if (!*has_mtr) 4109 *has_modify |= flow_check_modify_action_type(dev, 4110 actions->type); 4111 actions_n++; 4112 } 4113 /* Count RTE_FLOW_ACTION_TYPE_END. */ 4114 return actions_n + 1; 4115 } 4116 4117 /** 4118 * Check if the flow should be split due to hairpin. 4119 * The reason for the split is that in current HW we can't 4120 * support encap and push-vlan on Rx, so if a flow contains 4121 * these actions we move it to Tx. 4122 * 4123 * @param dev 4124 * Pointer to Ethernet device. 4125 * @param[in] attr 4126 * Flow rule attributes. 4127 * @param[in] actions 4128 * Associated actions (list terminated by the END action). 4129 * 4130 * @return 4131 * > 0 the number of actions and the flow should be split, 4132 * 0 when no split required. 4133 */ 4134 static int 4135 flow_check_hairpin_split(struct rte_eth_dev *dev, 4136 const struct rte_flow_attr *attr, 4137 const struct rte_flow_action actions[]) 4138 { 4139 int queue_action = 0; 4140 int action_n = 0; 4141 int split = 0; 4142 const struct rte_flow_action_queue *queue; 4143 const struct rte_flow_action_rss *rss; 4144 const struct rte_flow_action_raw_encap *raw_encap; 4145 const struct rte_eth_hairpin_conf *conf; 4146 4147 if (!attr->ingress) 4148 return 0; 4149 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4150 switch (actions->type) { 4151 case RTE_FLOW_ACTION_TYPE_QUEUE: 4152 queue = actions->conf; 4153 if (queue == NULL) 4154 return 0; 4155 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); 4156 if (conf == NULL || conf->tx_explicit != 0) 4157 return 0; 4158 queue_action = 1; 4159 action_n++; 4160 break; 4161 case RTE_FLOW_ACTION_TYPE_RSS: 4162 rss = actions->conf; 4163 if (rss == NULL || rss->queue_num == 0) 4164 return 0; 4165 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); 4166 if (conf == NULL || conf->tx_explicit != 0) 4167 return 0; 4168 queue_action = 1; 4169 action_n++; 4170 break; 4171 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4172 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4173 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4174 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4175 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4176 split++; 4177 action_n++; 4178 break; 4179 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4180 raw_encap = actions->conf; 4181 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4182 split++; 4183 action_n++; 4184 break; 4185 default: 4186 action_n++; 4187 break; 4188 } 4189 } 4190 if (split && queue_action) 4191 return action_n; 4192 return 0; 4193 } 4194 4195 /* Declare flow create/destroy prototype in advance. */ 4196 static uint32_t 4197 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type, 4198 const struct rte_flow_attr *attr, 4199 const struct rte_flow_item items[], 4200 const struct rte_flow_action actions[], 4201 bool external, struct rte_flow_error *error); 4202 4203 static void 4204 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type, 4205 uint32_t flow_idx); 4206 4207 int 4208 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused, 4209 struct mlx5_list_entry *entry, void *cb_ctx) 4210 { 4211 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 4212 struct mlx5_flow_mreg_copy_resource *mcp_res = 4213 container_of(entry, typeof(*mcp_res), hlist_ent); 4214 4215 return mcp_res->mark_id != *(uint32_t *)(ctx->data); 4216 } 4217 4218 struct mlx5_list_entry * 4219 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx) 4220 { 4221 struct rte_eth_dev *dev = tool_ctx; 4222 struct mlx5_priv *priv = dev->data->dev_private; 4223 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 4224 struct mlx5_flow_mreg_copy_resource *mcp_res; 4225 struct rte_flow_error *error = ctx->error; 4226 uint32_t idx = 0; 4227 int ret; 4228 uint32_t mark_id = *(uint32_t *)(ctx->data); 4229 struct rte_flow_attr attr = { 4230 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4231 .ingress = 1, 4232 }; 4233 struct mlx5_rte_flow_item_tag tag_spec = { 4234 .data = mark_id, 4235 }; 4236 struct rte_flow_item items[] = { 4237 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 4238 }; 4239 struct rte_flow_action_mark ftag = { 4240 .id = mark_id, 4241 }; 4242 struct mlx5_flow_action_copy_mreg cp_mreg = { 4243 .dst = REG_B, 4244 .src = REG_NON, 4245 }; 4246 struct rte_flow_action_jump jump = { 4247 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 4248 }; 4249 struct rte_flow_action actions[] = { 4250 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 4251 }; 4252 4253 /* Fill the register fileds in the flow. */ 4254 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 4255 if (ret < 0) 4256 return NULL; 4257 tag_spec.id = ret; 4258 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4259 if (ret < 0) 4260 return NULL; 4261 cp_mreg.src = ret; 4262 /* Provide the full width of FLAG specific value. */ 4263 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 4264 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 4265 /* Build a new flow. */ 4266 if (mark_id != MLX5_DEFAULT_COPY_ID) { 4267 items[0] = (struct rte_flow_item){ 4268 .type = (enum rte_flow_item_type) 4269 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 4270 .spec = &tag_spec, 4271 }; 4272 items[1] = (struct rte_flow_item){ 4273 .type = RTE_FLOW_ITEM_TYPE_END, 4274 }; 4275 actions[0] = (struct rte_flow_action){ 4276 .type = (enum rte_flow_action_type) 4277 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 4278 .conf = &ftag, 4279 }; 4280 actions[1] = (struct rte_flow_action){ 4281 .type = (enum rte_flow_action_type) 4282 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4283 .conf = &cp_mreg, 4284 }; 4285 actions[2] = (struct rte_flow_action){ 4286 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4287 .conf = &jump, 4288 }; 4289 actions[3] = (struct rte_flow_action){ 4290 .type = RTE_FLOW_ACTION_TYPE_END, 4291 }; 4292 } else { 4293 /* Default rule, wildcard match. */ 4294 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR; 4295 items[0] = (struct rte_flow_item){ 4296 .type = RTE_FLOW_ITEM_TYPE_END, 4297 }; 4298 actions[0] = (struct rte_flow_action){ 4299 .type = (enum rte_flow_action_type) 4300 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4301 .conf = &cp_mreg, 4302 }; 4303 actions[1] = (struct rte_flow_action){ 4304 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4305 .conf = &jump, 4306 }; 4307 actions[2] = (struct rte_flow_action){ 4308 .type = RTE_FLOW_ACTION_TYPE_END, 4309 }; 4310 } 4311 /* Build a new entry. */ 4312 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4313 if (!mcp_res) { 4314 rte_errno = ENOMEM; 4315 return NULL; 4316 } 4317 mcp_res->idx = idx; 4318 mcp_res->mark_id = mark_id; 4319 /* 4320 * The copy Flows are not included in any list. There 4321 * ones are referenced from other Flows and can not 4322 * be applied, removed, deleted in ardbitrary order 4323 * by list traversing. 4324 */ 4325 mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP, 4326 &attr, items, actions, false, error); 4327 if (!mcp_res->rix_flow) { 4328 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx); 4329 return NULL; 4330 } 4331 return &mcp_res->hlist_ent; 4332 } 4333 4334 struct mlx5_list_entry * 4335 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry, 4336 void *cb_ctx __rte_unused) 4337 { 4338 struct rte_eth_dev *dev = tool_ctx; 4339 struct mlx5_priv *priv = dev->data->dev_private; 4340 struct mlx5_flow_mreg_copy_resource *mcp_res; 4341 uint32_t idx = 0; 4342 4343 mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4344 if (!mcp_res) { 4345 rte_errno = ENOMEM; 4346 return NULL; 4347 } 4348 memcpy(mcp_res, oentry, sizeof(*mcp_res)); 4349 mcp_res->idx = idx; 4350 return &mcp_res->hlist_ent; 4351 } 4352 4353 void 4354 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry) 4355 { 4356 struct mlx5_flow_mreg_copy_resource *mcp_res = 4357 container_of(entry, typeof(*mcp_res), hlist_ent); 4358 struct rte_eth_dev *dev = tool_ctx; 4359 struct mlx5_priv *priv = dev->data->dev_private; 4360 4361 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4362 } 4363 4364 /** 4365 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4366 * 4367 * As mark_id is unique, if there's already a registered flow for the mark_id, 4368 * return by increasing the reference counter of the resource. Otherwise, create 4369 * the resource (mcp_res) and flow. 4370 * 4371 * Flow looks like, 4372 * - If ingress port is ANY and reg_c[1] is mark_id, 4373 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4374 * 4375 * For default flow (zero mark_id), flow is like, 4376 * - If ingress port is ANY, 4377 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 4378 * 4379 * @param dev 4380 * Pointer to Ethernet device. 4381 * @param mark_id 4382 * ID of MARK action, zero means default flow for META. 4383 * @param[out] error 4384 * Perform verbose error reporting if not NULL. 4385 * 4386 * @return 4387 * Associated resource on success, NULL otherwise and rte_errno is set. 4388 */ 4389 static struct mlx5_flow_mreg_copy_resource * 4390 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 4391 struct rte_flow_error *error) 4392 { 4393 struct mlx5_priv *priv = dev->data->dev_private; 4394 struct mlx5_list_entry *entry; 4395 struct mlx5_flow_cb_ctx ctx = { 4396 .dev = dev, 4397 .error = error, 4398 .data = &mark_id, 4399 }; 4400 4401 /* Check if already registered. */ 4402 MLX5_ASSERT(priv->mreg_cp_tbl); 4403 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx); 4404 if (!entry) 4405 return NULL; 4406 return container_of(entry, struct mlx5_flow_mreg_copy_resource, 4407 hlist_ent); 4408 } 4409 4410 void 4411 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry) 4412 { 4413 struct mlx5_flow_mreg_copy_resource *mcp_res = 4414 container_of(entry, typeof(*mcp_res), hlist_ent); 4415 struct rte_eth_dev *dev = tool_ctx; 4416 struct mlx5_priv *priv = dev->data->dev_private; 4417 4418 MLX5_ASSERT(mcp_res->rix_flow); 4419 flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow); 4420 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4421 } 4422 4423 /** 4424 * Release flow in RX_CP_TBL. 4425 * 4426 * @param dev 4427 * Pointer to Ethernet device. 4428 * @flow 4429 * Parent flow for wich copying is provided. 4430 */ 4431 static void 4432 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 4433 struct rte_flow *flow) 4434 { 4435 struct mlx5_flow_mreg_copy_resource *mcp_res; 4436 struct mlx5_priv *priv = dev->data->dev_private; 4437 4438 if (!flow->rix_mreg_copy) 4439 return; 4440 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 4441 flow->rix_mreg_copy); 4442 if (!mcp_res || !priv->mreg_cp_tbl) 4443 return; 4444 MLX5_ASSERT(mcp_res->rix_flow); 4445 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 4446 flow->rix_mreg_copy = 0; 4447 } 4448 4449 /** 4450 * Remove the default copy action from RX_CP_TBL. 4451 * 4452 * This functions is called in the mlx5_dev_start(). No thread safe 4453 * is guaranteed. 4454 * 4455 * @param dev 4456 * Pointer to Ethernet device. 4457 */ 4458 static void 4459 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 4460 { 4461 struct mlx5_list_entry *entry; 4462 struct mlx5_priv *priv = dev->data->dev_private; 4463 struct mlx5_flow_cb_ctx ctx; 4464 uint32_t mark_id; 4465 4466 /* Check if default flow is registered. */ 4467 if (!priv->mreg_cp_tbl) 4468 return; 4469 mark_id = MLX5_DEFAULT_COPY_ID; 4470 ctx.data = &mark_id; 4471 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx); 4472 if (!entry) 4473 return; 4474 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry); 4475 } 4476 4477 /** 4478 * Add the default copy action in in RX_CP_TBL. 4479 * 4480 * This functions is called in the mlx5_dev_start(). No thread safe 4481 * is guaranteed. 4482 * 4483 * @param dev 4484 * Pointer to Ethernet device. 4485 * @param[out] error 4486 * Perform verbose error reporting if not NULL. 4487 * 4488 * @return 4489 * 0 for success, negative value otherwise and rte_errno is set. 4490 */ 4491 static int 4492 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 4493 struct rte_flow_error *error) 4494 { 4495 struct mlx5_priv *priv = dev->data->dev_private; 4496 struct mlx5_flow_mreg_copy_resource *mcp_res; 4497 struct mlx5_flow_cb_ctx ctx; 4498 uint32_t mark_id; 4499 4500 /* Check whether extensive metadata feature is engaged. */ 4501 if (!priv->config.dv_flow_en || 4502 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4503 !mlx5_flow_ext_mreg_supported(dev) || 4504 !priv->sh->dv_regc0_mask) 4505 return 0; 4506 /* 4507 * Add default mreg copy flow may be called multiple time, but 4508 * only be called once in stop. Avoid register it twice. 4509 */ 4510 mark_id = MLX5_DEFAULT_COPY_ID; 4511 ctx.data = &mark_id; 4512 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx)) 4513 return 0; 4514 mcp_res = flow_mreg_add_copy_action(dev, mark_id, error); 4515 if (!mcp_res) 4516 return -rte_errno; 4517 return 0; 4518 } 4519 4520 /** 4521 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4522 * 4523 * All the flow having Q/RSS action should be split by 4524 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 4525 * performs the following, 4526 * - CQE->flow_tag := reg_c[1] (MARK) 4527 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4528 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 4529 * but there should be a flow per each MARK ID set by MARK action. 4530 * 4531 * For the aforementioned reason, if there's a MARK action in flow's action 4532 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 4533 * the MARK ID to CQE's flow_tag like, 4534 * - If reg_c[1] is mark_id, 4535 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4536 * 4537 * For SET_META action which stores value in reg_c[0], as the destination is 4538 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 4539 * MARK ID means the default flow. The default flow looks like, 4540 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4541 * 4542 * @param dev 4543 * Pointer to Ethernet device. 4544 * @param flow 4545 * Pointer to flow structure. 4546 * @param[in] actions 4547 * Pointer to the list of actions. 4548 * @param[out] error 4549 * Perform verbose error reporting if not NULL. 4550 * 4551 * @return 4552 * 0 on success, negative value otherwise and rte_errno is set. 4553 */ 4554 static int 4555 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 4556 struct rte_flow *flow, 4557 const struct rte_flow_action *actions, 4558 struct rte_flow_error *error) 4559 { 4560 struct mlx5_priv *priv = dev->data->dev_private; 4561 struct mlx5_dev_config *config = &priv->config; 4562 struct mlx5_flow_mreg_copy_resource *mcp_res; 4563 const struct rte_flow_action_mark *mark; 4564 4565 /* Check whether extensive metadata feature is engaged. */ 4566 if (!config->dv_flow_en || 4567 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4568 !mlx5_flow_ext_mreg_supported(dev) || 4569 !priv->sh->dv_regc0_mask) 4570 return 0; 4571 /* Find MARK action. */ 4572 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4573 switch (actions->type) { 4574 case RTE_FLOW_ACTION_TYPE_FLAG: 4575 mcp_res = flow_mreg_add_copy_action 4576 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4577 if (!mcp_res) 4578 return -rte_errno; 4579 flow->rix_mreg_copy = mcp_res->idx; 4580 return 0; 4581 case RTE_FLOW_ACTION_TYPE_MARK: 4582 mark = (const struct rte_flow_action_mark *) 4583 actions->conf; 4584 mcp_res = 4585 flow_mreg_add_copy_action(dev, mark->id, error); 4586 if (!mcp_res) 4587 return -rte_errno; 4588 flow->rix_mreg_copy = mcp_res->idx; 4589 return 0; 4590 default: 4591 break; 4592 } 4593 } 4594 return 0; 4595 } 4596 4597 #define MLX5_MAX_SPLIT_ACTIONS 24 4598 #define MLX5_MAX_SPLIT_ITEMS 24 4599 4600 /** 4601 * Split the hairpin flow. 4602 * Since HW can't support encap and push-vlan on Rx, we move these 4603 * actions to Tx. 4604 * If the count action is after the encap then we also 4605 * move the count action. in this case the count will also measure 4606 * the outer bytes. 4607 * 4608 * @param dev 4609 * Pointer to Ethernet device. 4610 * @param[in] actions 4611 * Associated actions (list terminated by the END action). 4612 * @param[out] actions_rx 4613 * Rx flow actions. 4614 * @param[out] actions_tx 4615 * Tx flow actions.. 4616 * @param[out] pattern_tx 4617 * The pattern items for the Tx flow. 4618 * @param[out] flow_id 4619 * The flow ID connected to this flow. 4620 * 4621 * @return 4622 * 0 on success. 4623 */ 4624 static int 4625 flow_hairpin_split(struct rte_eth_dev *dev, 4626 const struct rte_flow_action actions[], 4627 struct rte_flow_action actions_rx[], 4628 struct rte_flow_action actions_tx[], 4629 struct rte_flow_item pattern_tx[], 4630 uint32_t flow_id) 4631 { 4632 const struct rte_flow_action_raw_encap *raw_encap; 4633 const struct rte_flow_action_raw_decap *raw_decap; 4634 struct mlx5_rte_flow_action_set_tag *set_tag; 4635 struct rte_flow_action *tag_action; 4636 struct mlx5_rte_flow_item_tag *tag_item; 4637 struct rte_flow_item *item; 4638 char *addr; 4639 int encap = 0; 4640 4641 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4642 switch (actions->type) { 4643 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4644 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4645 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4646 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4647 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4648 rte_memcpy(actions_tx, actions, 4649 sizeof(struct rte_flow_action)); 4650 actions_tx++; 4651 break; 4652 case RTE_FLOW_ACTION_TYPE_COUNT: 4653 if (encap) { 4654 rte_memcpy(actions_tx, actions, 4655 sizeof(struct rte_flow_action)); 4656 actions_tx++; 4657 } else { 4658 rte_memcpy(actions_rx, actions, 4659 sizeof(struct rte_flow_action)); 4660 actions_rx++; 4661 } 4662 break; 4663 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4664 raw_encap = actions->conf; 4665 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) { 4666 memcpy(actions_tx, actions, 4667 sizeof(struct rte_flow_action)); 4668 actions_tx++; 4669 encap = 1; 4670 } else { 4671 rte_memcpy(actions_rx, actions, 4672 sizeof(struct rte_flow_action)); 4673 actions_rx++; 4674 } 4675 break; 4676 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4677 raw_decap = actions->conf; 4678 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) { 4679 memcpy(actions_tx, actions, 4680 sizeof(struct rte_flow_action)); 4681 actions_tx++; 4682 } else { 4683 rte_memcpy(actions_rx, actions, 4684 sizeof(struct rte_flow_action)); 4685 actions_rx++; 4686 } 4687 break; 4688 default: 4689 rte_memcpy(actions_rx, actions, 4690 sizeof(struct rte_flow_action)); 4691 actions_rx++; 4692 break; 4693 } 4694 } 4695 /* Add set meta action and end action for the Rx flow. */ 4696 tag_action = actions_rx; 4697 tag_action->type = (enum rte_flow_action_type) 4698 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4699 actions_rx++; 4700 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4701 actions_rx++; 4702 set_tag = (void *)actions_rx; 4703 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4704 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), 4705 .data = flow_id, 4706 }; 4707 MLX5_ASSERT(set_tag->id > REG_NON); 4708 tag_action->conf = set_tag; 4709 /* Create Tx item list. */ 4710 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4711 addr = (void *)&pattern_tx[2]; 4712 item = pattern_tx; 4713 item->type = (enum rte_flow_item_type) 4714 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4715 tag_item = (void *)addr; 4716 tag_item->data = flow_id; 4717 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4718 MLX5_ASSERT(set_tag->id > REG_NON); 4719 item->spec = tag_item; 4720 addr += sizeof(struct mlx5_rte_flow_item_tag); 4721 tag_item = (void *)addr; 4722 tag_item->data = UINT32_MAX; 4723 tag_item->id = UINT16_MAX; 4724 item->mask = tag_item; 4725 item->last = NULL; 4726 item++; 4727 item->type = RTE_FLOW_ITEM_TYPE_END; 4728 return 0; 4729 } 4730 4731 /** 4732 * The last stage of splitting chain, just creates the subflow 4733 * without any modification. 4734 * 4735 * @param[in] dev 4736 * Pointer to Ethernet device. 4737 * @param[in] flow 4738 * Parent flow structure pointer. 4739 * @param[in, out] sub_flow 4740 * Pointer to return the created subflow, may be NULL. 4741 * @param[in] attr 4742 * Flow rule attributes. 4743 * @param[in] items 4744 * Pattern specification (list terminated by the END pattern item). 4745 * @param[in] actions 4746 * Associated actions (list terminated by the END action). 4747 * @param[in] flow_split_info 4748 * Pointer to flow split info structure. 4749 * @param[out] error 4750 * Perform verbose error reporting if not NULL. 4751 * @return 4752 * 0 on success, negative value otherwise 4753 */ 4754 static int 4755 flow_create_split_inner(struct rte_eth_dev *dev, 4756 struct rte_flow *flow, 4757 struct mlx5_flow **sub_flow, 4758 const struct rte_flow_attr *attr, 4759 const struct rte_flow_item items[], 4760 const struct rte_flow_action actions[], 4761 struct mlx5_flow_split_info *flow_split_info, 4762 struct rte_flow_error *error) 4763 { 4764 struct mlx5_flow *dev_flow; 4765 4766 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4767 flow_split_info->flow_idx, error); 4768 if (!dev_flow) 4769 return -rte_errno; 4770 dev_flow->flow = flow; 4771 dev_flow->external = flow_split_info->external; 4772 dev_flow->skip_scale = flow_split_info->skip_scale; 4773 /* Subflow object was created, we must include one in the list. */ 4774 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4775 dev_flow->handle, next); 4776 /* 4777 * If dev_flow is as one of the suffix flow, some actions in suffix 4778 * flow may need some user defined item layer flags, and pass the 4779 * Metadate rxq mark flag to suffix flow as well. 4780 */ 4781 if (flow_split_info->prefix_layers) 4782 dev_flow->handle->layers = flow_split_info->prefix_layers; 4783 if (flow_split_info->prefix_mark) 4784 dev_flow->handle->mark = 1; 4785 if (sub_flow) 4786 *sub_flow = dev_flow; 4787 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4788 dev_flow->dv.table_id = flow_split_info->table_id; 4789 #endif 4790 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4791 } 4792 4793 /** 4794 * Get the sub policy of a meter. 4795 * 4796 * @param[in] dev 4797 * Pointer to Ethernet device. 4798 * @param[in] flow 4799 * Parent flow structure pointer. 4800 * @param wks 4801 * Pointer to thread flow work space. 4802 * @param[in] attr 4803 * Flow rule attributes. 4804 * @param[in] items 4805 * Pattern specification (list terminated by the END pattern item). 4806 * @param[out] error 4807 * Perform verbose error reporting if not NULL. 4808 * 4809 * @return 4810 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set. 4811 */ 4812 static struct mlx5_flow_meter_sub_policy * 4813 get_meter_sub_policy(struct rte_eth_dev *dev, 4814 struct rte_flow *flow, 4815 struct mlx5_flow_workspace *wks, 4816 const struct rte_flow_attr *attr, 4817 const struct rte_flow_item items[], 4818 struct rte_flow_error *error) 4819 { 4820 struct mlx5_flow_meter_policy *policy; 4821 struct mlx5_flow_meter_policy *final_policy; 4822 struct mlx5_flow_meter_sub_policy *sub_policy = NULL; 4823 4824 policy = wks->policy; 4825 final_policy = policy->is_hierarchy ? wks->final_policy : policy; 4826 if (final_policy->is_rss || final_policy->is_queue) { 4827 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS]; 4828 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0}; 4829 uint32_t i; 4830 4831 /* 4832 * This is a tmp dev_flow, 4833 * no need to register any matcher for it in translate. 4834 */ 4835 wks->skip_matcher_reg = 1; 4836 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) { 4837 struct mlx5_flow dev_flow = {0}; 4838 struct mlx5_flow_handle dev_handle = { {0} }; 4839 uint8_t fate = final_policy->act_cnt[i].fate_action; 4840 4841 if (fate == MLX5_FLOW_FATE_SHARED_RSS) { 4842 const struct rte_flow_action_rss *rss_act = 4843 final_policy->act_cnt[i].rss->conf; 4844 struct rte_flow_action rss_actions[2] = { 4845 [0] = { 4846 .type = RTE_FLOW_ACTION_TYPE_RSS, 4847 .conf = rss_act, 4848 }, 4849 [1] = { 4850 .type = RTE_FLOW_ACTION_TYPE_END, 4851 .conf = NULL, 4852 } 4853 }; 4854 4855 dev_flow.handle = &dev_handle; 4856 dev_flow.ingress = attr->ingress; 4857 dev_flow.flow = flow; 4858 dev_flow.external = 0; 4859 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4860 dev_flow.dv.transfer = attr->transfer; 4861 #endif 4862 /** 4863 * Translate RSS action to get rss hash fields. 4864 */ 4865 if (flow_drv_translate(dev, &dev_flow, attr, 4866 items, rss_actions, error)) 4867 goto exit; 4868 rss_desc_v[i] = wks->rss_desc; 4869 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN; 4870 rss_desc_v[i].hash_fields = 4871 dev_flow.hash_fields; 4872 rss_desc_v[i].queue_num = 4873 rss_desc_v[i].hash_fields ? 4874 rss_desc_v[i].queue_num : 1; 4875 rss_desc_v[i].tunnel = 4876 !!(dev_flow.handle->layers & 4877 MLX5_FLOW_LAYER_TUNNEL); 4878 /* Use the RSS queues in the containers. */ 4879 rss_desc_v[i].queue = 4880 (uint16_t *)(uintptr_t)rss_act->queue; 4881 rss_desc[i] = &rss_desc_v[i]; 4882 } else if (fate == MLX5_FLOW_FATE_QUEUE) { 4883 /* This is queue action. */ 4884 rss_desc_v[i] = wks->rss_desc; 4885 rss_desc_v[i].key_len = 0; 4886 rss_desc_v[i].hash_fields = 0; 4887 rss_desc_v[i].queue = 4888 &final_policy->act_cnt[i].queue; 4889 rss_desc_v[i].queue_num = 1; 4890 rss_desc[i] = &rss_desc_v[i]; 4891 } else { 4892 rss_desc[i] = NULL; 4893 } 4894 } 4895 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev, 4896 flow, policy, rss_desc); 4897 } else { 4898 enum mlx5_meter_domain mtr_domain = 4899 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4900 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4901 MLX5_MTR_DOMAIN_INGRESS); 4902 sub_policy = policy->sub_policys[mtr_domain][0]; 4903 } 4904 if (!sub_policy) 4905 rte_flow_error_set(error, EINVAL, 4906 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4907 "Failed to get meter sub-policy."); 4908 exit: 4909 return sub_policy; 4910 } 4911 4912 /** 4913 * Split the meter flow. 4914 * 4915 * As meter flow will split to three sub flow, other than meter 4916 * action, the other actions make sense to only meter accepts 4917 * the packet. If it need to be dropped, no other additional 4918 * actions should be take. 4919 * 4920 * One kind of special action which decapsulates the L3 tunnel 4921 * header will be in the prefix sub flow, as not to take the 4922 * L3 tunnel header into account. 4923 * 4924 * @param[in] dev 4925 * Pointer to Ethernet device. 4926 * @param[in] flow 4927 * Parent flow structure pointer. 4928 * @param wks 4929 * Pointer to thread flow work space. 4930 * @param[in] attr 4931 * Flow rule attributes. 4932 * @param[in] items 4933 * Pattern specification (list terminated by the END pattern item). 4934 * @param[out] sfx_items 4935 * Suffix flow match items (list terminated by the END pattern item). 4936 * @param[in] actions 4937 * Associated actions (list terminated by the END action). 4938 * @param[out] actions_sfx 4939 * Suffix flow actions. 4940 * @param[out] actions_pre 4941 * Prefix flow actions. 4942 * @param[out] mtr_flow_id 4943 * Pointer to meter flow id. 4944 * @param[out] error 4945 * Perform verbose error reporting if not NULL. 4946 * 4947 * @return 4948 * 0 on success, a negative errno value otherwise and rte_errno is set. 4949 */ 4950 static int 4951 flow_meter_split_prep(struct rte_eth_dev *dev, 4952 struct rte_flow *flow, 4953 struct mlx5_flow_workspace *wks, 4954 const struct rte_flow_attr *attr, 4955 const struct rte_flow_item items[], 4956 struct rte_flow_item sfx_items[], 4957 const struct rte_flow_action actions[], 4958 struct rte_flow_action actions_sfx[], 4959 struct rte_flow_action actions_pre[], 4960 uint32_t *mtr_flow_id, 4961 struct rte_flow_error *error) 4962 { 4963 struct mlx5_priv *priv = dev->data->dev_private; 4964 struct mlx5_flow_meter_info *fm = wks->fm; 4965 struct rte_flow_action *tag_action = NULL; 4966 struct rte_flow_item *tag_item; 4967 struct mlx5_rte_flow_action_set_tag *set_tag; 4968 const struct rte_flow_action_raw_encap *raw_encap; 4969 const struct rte_flow_action_raw_decap *raw_decap; 4970 struct mlx5_rte_flow_item_tag *tag_item_spec; 4971 struct mlx5_rte_flow_item_tag *tag_item_mask; 4972 uint32_t tag_id = 0; 4973 struct rte_flow_item *vlan_item_dst = NULL; 4974 const struct rte_flow_item *vlan_item_src = NULL; 4975 struct rte_flow_action *hw_mtr_action; 4976 struct rte_flow_action *action_pre_head = NULL; 4977 int32_t flow_src_port = priv->representor_id; 4978 bool mtr_first; 4979 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0; 4980 uint8_t mtr_reg_bits = priv->mtr_reg_share ? 4981 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS; 4982 uint32_t flow_id = 0; 4983 uint32_t flow_id_reversed = 0; 4984 uint8_t flow_id_bits = 0; 4985 int shift; 4986 4987 /* Prepare the suffix subflow items. */ 4988 tag_item = sfx_items++; 4989 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 4990 struct mlx5_priv *port_priv; 4991 const struct rte_flow_item_port_id *pid_v; 4992 int item_type = items->type; 4993 4994 switch (item_type) { 4995 case RTE_FLOW_ITEM_TYPE_PORT_ID: 4996 pid_v = items->spec; 4997 MLX5_ASSERT(pid_v); 4998 port_priv = mlx5_port_to_eswitch_info(pid_v->id, false); 4999 if (!port_priv) 5000 return rte_flow_error_set(error, 5001 rte_errno, 5002 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 5003 pid_v, 5004 "Failed to get port info."); 5005 flow_src_port = port_priv->representor_id; 5006 if (!fm->def_policy && wks->policy->is_hierarchy && 5007 flow_src_port != priv->representor_id) { 5008 if (flow_drv_mtr_hierarchy_rule_create(dev, 5009 flow, fm, 5010 flow_src_port, 5011 items, 5012 error)) 5013 return -rte_errno; 5014 } 5015 memcpy(sfx_items, items, sizeof(*sfx_items)); 5016 sfx_items++; 5017 break; 5018 case RTE_FLOW_ITEM_TYPE_VLAN: 5019 /* Determine if copy vlan item below. */ 5020 vlan_item_src = items; 5021 vlan_item_dst = sfx_items++; 5022 vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID; 5023 break; 5024 default: 5025 break; 5026 } 5027 } 5028 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 5029 sfx_items++; 5030 mtr_first = priv->sh->meter_aso_en && 5031 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX)); 5032 /* For ASO meter, meter must be before tag in TX direction. */ 5033 if (mtr_first) { 5034 action_pre_head = actions_pre++; 5035 /* Leave space for tag action. */ 5036 tag_action = actions_pre++; 5037 } 5038 /* Prepare the actions for prefix and suffix flow. */ 5039 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5040 struct rte_flow_action *action_cur = NULL; 5041 5042 switch (actions->type) { 5043 case RTE_FLOW_ACTION_TYPE_METER: 5044 if (mtr_first) { 5045 action_cur = action_pre_head; 5046 } else { 5047 /* Leave space for tag action. */ 5048 tag_action = actions_pre++; 5049 action_cur = actions_pre++; 5050 } 5051 break; 5052 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5053 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5054 action_cur = actions_pre++; 5055 break; 5056 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 5057 raw_encap = actions->conf; 5058 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 5059 action_cur = actions_pre++; 5060 break; 5061 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5062 raw_decap = actions->conf; 5063 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 5064 action_cur = actions_pre++; 5065 break; 5066 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5067 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5068 if (vlan_item_dst && vlan_item_src) { 5069 memcpy(vlan_item_dst, vlan_item_src, 5070 sizeof(*vlan_item_dst)); 5071 /* 5072 * Convert to internal match item, it is used 5073 * for vlan push and set vid. 5074 */ 5075 vlan_item_dst->type = (enum rte_flow_item_type) 5076 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 5077 } 5078 break; 5079 default: 5080 break; 5081 } 5082 if (!action_cur) 5083 action_cur = (fm->def_policy) ? 5084 actions_sfx++ : actions_pre++; 5085 memcpy(action_cur, actions, sizeof(struct rte_flow_action)); 5086 } 5087 /* Add end action to the actions. */ 5088 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 5089 if (priv->sh->meter_aso_en) { 5090 /** 5091 * For ASO meter, need to add an extra jump action explicitly, 5092 * to jump from meter to policer table. 5093 */ 5094 struct mlx5_flow_meter_sub_policy *sub_policy; 5095 struct mlx5_flow_tbl_data_entry *tbl_data; 5096 5097 if (!fm->def_policy) { 5098 sub_policy = get_meter_sub_policy(dev, flow, wks, 5099 attr, items, error); 5100 if (!sub_policy) 5101 return -rte_errno; 5102 } else { 5103 enum mlx5_meter_domain mtr_domain = 5104 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 5105 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 5106 MLX5_MTR_DOMAIN_INGRESS); 5107 5108 sub_policy = 5109 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy; 5110 } 5111 tbl_data = container_of(sub_policy->tbl_rsc, 5112 struct mlx5_flow_tbl_data_entry, tbl); 5113 hw_mtr_action = actions_pre++; 5114 hw_mtr_action->type = (enum rte_flow_action_type) 5115 MLX5_RTE_FLOW_ACTION_TYPE_JUMP; 5116 hw_mtr_action->conf = tbl_data->jump.action; 5117 } 5118 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 5119 actions_pre++; 5120 if (!tag_action) 5121 return rte_flow_error_set(error, ENOMEM, 5122 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5123 NULL, "No tag action space."); 5124 if (!mtr_flow_id) { 5125 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID; 5126 goto exit; 5127 } 5128 /* Only default-policy Meter creates mtr flow id. */ 5129 if (fm->def_policy) { 5130 mlx5_ipool_malloc(fm->flow_ipool, &tag_id); 5131 if (!tag_id) 5132 return rte_flow_error_set(error, ENOMEM, 5133 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 5134 "Failed to allocate meter flow id."); 5135 flow_id = tag_id - 1; 5136 flow_id_bits = (!flow_id) ? 1 : 5137 (MLX5_REG_BITS - __builtin_clz(flow_id)); 5138 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) > 5139 mtr_reg_bits) { 5140 mlx5_ipool_free(fm->flow_ipool, tag_id); 5141 return rte_flow_error_set(error, EINVAL, 5142 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 5143 "Meter flow id exceeds max limit."); 5144 } 5145 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits) 5146 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits; 5147 } 5148 /* Build tag actions and items for meter_id/meter flow_id. */ 5149 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre; 5150 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 5151 tag_item_mask = tag_item_spec + 1; 5152 /* Both flow_id and meter_id share the same register. */ 5153 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5154 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 5155 0, error), 5156 .offset = mtr_id_offset, 5157 .length = mtr_reg_bits, 5158 .data = flow->meter, 5159 }; 5160 /* 5161 * The color Reg bits used by flow_id are growing from 5162 * msb to lsb, so must do bit reverse for flow_id val in RegC. 5163 */ 5164 for (shift = 0; shift < flow_id_bits; shift++) 5165 flow_id_reversed = (flow_id_reversed << 1) | 5166 ((flow_id >> shift) & 0x1); 5167 set_tag->data |= 5168 flow_id_reversed << (mtr_reg_bits - flow_id_bits); 5169 tag_item_spec->id = set_tag->id; 5170 tag_item_spec->data = set_tag->data << mtr_id_offset; 5171 tag_item_mask->data = UINT32_MAX << mtr_id_offset; 5172 tag_action->type = (enum rte_flow_action_type) 5173 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5174 tag_action->conf = set_tag; 5175 tag_item->type = (enum rte_flow_item_type) 5176 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 5177 tag_item->spec = tag_item_spec; 5178 tag_item->last = NULL; 5179 tag_item->mask = tag_item_mask; 5180 exit: 5181 if (mtr_flow_id) 5182 *mtr_flow_id = tag_id; 5183 return 0; 5184 } 5185 5186 /** 5187 * Split action list having QUEUE/RSS for metadata register copy. 5188 * 5189 * Once Q/RSS action is detected in user's action list, the flow action 5190 * should be split in order to copy metadata registers, which will happen in 5191 * RX_CP_TBL like, 5192 * - CQE->flow_tag := reg_c[1] (MARK) 5193 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 5194 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 5195 * This is because the last action of each flow must be a terminal action 5196 * (QUEUE, RSS or DROP). 5197 * 5198 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 5199 * stored and kept in the mlx5_flow structure per each sub_flow. 5200 * 5201 * The Q/RSS action is replaced with, 5202 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 5203 * And the following JUMP action is added at the end, 5204 * - JUMP, to RX_CP_TBL. 5205 * 5206 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 5207 * flow_create_split_metadata() routine. The flow will look like, 5208 * - If flow ID matches (reg_c[2]), perform Q/RSS. 5209 * 5210 * @param dev 5211 * Pointer to Ethernet device. 5212 * @param[out] split_actions 5213 * Pointer to store split actions to jump to CP_TBL. 5214 * @param[in] actions 5215 * Pointer to the list of original flow actions. 5216 * @param[in] qrss 5217 * Pointer to the Q/RSS action. 5218 * @param[in] actions_n 5219 * Number of original actions. 5220 * @param[out] error 5221 * Perform verbose error reporting if not NULL. 5222 * 5223 * @return 5224 * non-zero unique flow_id on success, otherwise 0 and 5225 * error/rte_error are set. 5226 */ 5227 static uint32_t 5228 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 5229 struct rte_flow_action *split_actions, 5230 const struct rte_flow_action *actions, 5231 const struct rte_flow_action *qrss, 5232 int actions_n, struct rte_flow_error *error) 5233 { 5234 struct mlx5_priv *priv = dev->data->dev_private; 5235 struct mlx5_rte_flow_action_set_tag *set_tag; 5236 struct rte_flow_action_jump *jump; 5237 const int qrss_idx = qrss - actions; 5238 uint32_t flow_id = 0; 5239 int ret = 0; 5240 5241 /* 5242 * Given actions will be split 5243 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 5244 * - Add jump to mreg CP_TBL. 5245 * As a result, there will be one more action. 5246 */ 5247 ++actions_n; 5248 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 5249 set_tag = (void *)(split_actions + actions_n); 5250 /* 5251 * If tag action is not set to void(it means we are not the meter 5252 * suffix flow), add the tag action. Since meter suffix flow already 5253 * has the tag added. 5254 */ 5255 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 5256 /* 5257 * Allocate the new subflow ID. This one is unique within 5258 * device and not shared with representors. Otherwise, 5259 * we would have to resolve multi-thread access synch 5260 * issue. Each flow on the shared device is appended 5261 * with source vport identifier, so the resulting 5262 * flows will be unique in the shared (by master and 5263 * representors) domain even if they have coinciding 5264 * IDs. 5265 */ 5266 mlx5_ipool_malloc(priv->sh->ipool 5267 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); 5268 if (!flow_id) 5269 return rte_flow_error_set(error, ENOMEM, 5270 RTE_FLOW_ERROR_TYPE_ACTION, 5271 NULL, "can't allocate id " 5272 "for split Q/RSS subflow"); 5273 /* Internal SET_TAG action to set flow ID. */ 5274 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 5275 .data = flow_id, 5276 }; 5277 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 5278 if (ret < 0) 5279 return ret; 5280 set_tag->id = ret; 5281 /* Construct new actions array. */ 5282 /* Replace QUEUE/RSS action. */ 5283 split_actions[qrss_idx] = (struct rte_flow_action){ 5284 .type = (enum rte_flow_action_type) 5285 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5286 .conf = set_tag, 5287 }; 5288 } 5289 /* JUMP action to jump to mreg copy table (CP_TBL). */ 5290 jump = (void *)(set_tag + 1); 5291 *jump = (struct rte_flow_action_jump){ 5292 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 5293 }; 5294 split_actions[actions_n - 2] = (struct rte_flow_action){ 5295 .type = RTE_FLOW_ACTION_TYPE_JUMP, 5296 .conf = jump, 5297 }; 5298 split_actions[actions_n - 1] = (struct rte_flow_action){ 5299 .type = RTE_FLOW_ACTION_TYPE_END, 5300 }; 5301 return flow_id; 5302 } 5303 5304 /** 5305 * Extend the given action list for Tx metadata copy. 5306 * 5307 * Copy the given action list to the ext_actions and add flow metadata register 5308 * copy action in order to copy reg_a set by WQE to reg_c[0]. 5309 * 5310 * @param[out] ext_actions 5311 * Pointer to the extended action list. 5312 * @param[in] actions 5313 * Pointer to the list of actions. 5314 * @param[in] actions_n 5315 * Number of actions in the list. 5316 * @param[out] error 5317 * Perform verbose error reporting if not NULL. 5318 * @param[in] encap_idx 5319 * The encap action inndex. 5320 * 5321 * @return 5322 * 0 on success, negative value otherwise 5323 */ 5324 static int 5325 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 5326 struct rte_flow_action *ext_actions, 5327 const struct rte_flow_action *actions, 5328 int actions_n, struct rte_flow_error *error, 5329 int encap_idx) 5330 { 5331 struct mlx5_flow_action_copy_mreg *cp_mreg = 5332 (struct mlx5_flow_action_copy_mreg *) 5333 (ext_actions + actions_n + 1); 5334 int ret; 5335 5336 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 5337 if (ret < 0) 5338 return ret; 5339 cp_mreg->dst = ret; 5340 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 5341 if (ret < 0) 5342 return ret; 5343 cp_mreg->src = ret; 5344 if (encap_idx != 0) 5345 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 5346 if (encap_idx == actions_n - 1) { 5347 ext_actions[actions_n - 1] = (struct rte_flow_action){ 5348 .type = (enum rte_flow_action_type) 5349 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5350 .conf = cp_mreg, 5351 }; 5352 ext_actions[actions_n] = (struct rte_flow_action){ 5353 .type = RTE_FLOW_ACTION_TYPE_END, 5354 }; 5355 } else { 5356 ext_actions[encap_idx] = (struct rte_flow_action){ 5357 .type = (enum rte_flow_action_type) 5358 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5359 .conf = cp_mreg, 5360 }; 5361 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 5362 sizeof(*ext_actions) * (actions_n - encap_idx)); 5363 } 5364 return 0; 5365 } 5366 5367 /** 5368 * Check the match action from the action list. 5369 * 5370 * @param[in] actions 5371 * Pointer to the list of actions. 5372 * @param[in] attr 5373 * Flow rule attributes. 5374 * @param[in] action 5375 * The action to be check if exist. 5376 * @param[out] match_action_pos 5377 * Pointer to the position of the matched action if exists, otherwise is -1. 5378 * @param[out] qrss_action_pos 5379 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 5380 * @param[out] modify_after_mirror 5381 * Pointer to the flag of modify action after FDB mirroring. 5382 * 5383 * @return 5384 * > 0 the total number of actions. 5385 * 0 if not found match action in action list. 5386 */ 5387 static int 5388 flow_check_match_action(const struct rte_flow_action actions[], 5389 const struct rte_flow_attr *attr, 5390 enum rte_flow_action_type action, 5391 int *match_action_pos, int *qrss_action_pos, 5392 int *modify_after_mirror) 5393 { 5394 const struct rte_flow_action_sample *sample; 5395 const struct rte_flow_action_raw_decap *decap; 5396 int actions_n = 0; 5397 uint32_t ratio = 0; 5398 int sub_type = 0; 5399 int flag = 0; 5400 int fdb_mirror = 0; 5401 5402 *match_action_pos = -1; 5403 *qrss_action_pos = -1; 5404 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5405 if (actions->type == action) { 5406 flag = 1; 5407 *match_action_pos = actions_n; 5408 } 5409 switch (actions->type) { 5410 case RTE_FLOW_ACTION_TYPE_QUEUE: 5411 case RTE_FLOW_ACTION_TYPE_RSS: 5412 *qrss_action_pos = actions_n; 5413 break; 5414 case RTE_FLOW_ACTION_TYPE_SAMPLE: 5415 sample = actions->conf; 5416 ratio = sample->ratio; 5417 sub_type = ((const struct rte_flow_action *) 5418 (sample->actions))->type; 5419 if (ratio == 1 && attr->transfer) 5420 fdb_mirror = 1; 5421 break; 5422 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 5423 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 5424 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 5425 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 5426 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 5427 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 5428 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 5429 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 5430 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 5431 case RTE_FLOW_ACTION_TYPE_SET_TTL: 5432 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 5433 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 5434 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 5435 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 5436 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 5437 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 5438 case RTE_FLOW_ACTION_TYPE_FLAG: 5439 case RTE_FLOW_ACTION_TYPE_MARK: 5440 case RTE_FLOW_ACTION_TYPE_SET_META: 5441 case RTE_FLOW_ACTION_TYPE_SET_TAG: 5442 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 5443 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5444 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5445 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 5446 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5447 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5448 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 5449 case RTE_FLOW_ACTION_TYPE_METER: 5450 if (fdb_mirror) 5451 *modify_after_mirror = 1; 5452 break; 5453 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5454 decap = actions->conf; 5455 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID) 5456 ; 5457 actions_n++; 5458 if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) { 5459 const struct rte_flow_action_raw_encap *encap = 5460 actions->conf; 5461 if (decap->size <= 5462 MLX5_ENCAPSULATION_DECISION_SIZE && 5463 encap->size > 5464 MLX5_ENCAPSULATION_DECISION_SIZE) 5465 /* L3 encap. */ 5466 break; 5467 } 5468 if (fdb_mirror) 5469 *modify_after_mirror = 1; 5470 break; 5471 default: 5472 break; 5473 } 5474 actions_n++; 5475 } 5476 if (flag && fdb_mirror && !*modify_after_mirror) { 5477 /* FDB mirroring uses the destination array to implement 5478 * instead of FLOW_SAMPLER object. 5479 */ 5480 if (sub_type != RTE_FLOW_ACTION_TYPE_END) 5481 flag = 0; 5482 } 5483 /* Count RTE_FLOW_ACTION_TYPE_END. */ 5484 return flag ? actions_n + 1 : 0; 5485 } 5486 5487 #define SAMPLE_SUFFIX_ITEM 2 5488 5489 /** 5490 * Split the sample flow. 5491 * 5492 * As sample flow will split to two sub flow, sample flow with 5493 * sample action, the other actions will move to new suffix flow. 5494 * 5495 * Also add unique tag id with tag action in the sample flow, 5496 * the same tag id will be as match in the suffix flow. 5497 * 5498 * @param dev 5499 * Pointer to Ethernet device. 5500 * @param[in] add_tag 5501 * Add extra tag action flag. 5502 * @param[out] sfx_items 5503 * Suffix flow match items (list terminated by the END pattern item). 5504 * @param[in] actions 5505 * Associated actions (list terminated by the END action). 5506 * @param[out] actions_sfx 5507 * Suffix flow actions. 5508 * @param[out] actions_pre 5509 * Prefix flow actions. 5510 * @param[in] actions_n 5511 * The total number of actions. 5512 * @param[in] sample_action_pos 5513 * The sample action position. 5514 * @param[in] qrss_action_pos 5515 * The Queue/RSS action position. 5516 * @param[in] jump_table 5517 * Add extra jump action flag. 5518 * @param[out] error 5519 * Perform verbose error reporting if not NULL. 5520 * 5521 * @return 5522 * 0 on success, or unique flow_id, a negative errno value 5523 * otherwise and rte_errno is set. 5524 */ 5525 static int 5526 flow_sample_split_prep(struct rte_eth_dev *dev, 5527 int add_tag, 5528 struct rte_flow_item sfx_items[], 5529 const struct rte_flow_action actions[], 5530 struct rte_flow_action actions_sfx[], 5531 struct rte_flow_action actions_pre[], 5532 int actions_n, 5533 int sample_action_pos, 5534 int qrss_action_pos, 5535 int jump_table, 5536 struct rte_flow_error *error) 5537 { 5538 struct mlx5_priv *priv = dev->data->dev_private; 5539 struct mlx5_rte_flow_action_set_tag *set_tag; 5540 struct mlx5_rte_flow_item_tag *tag_spec; 5541 struct mlx5_rte_flow_item_tag *tag_mask; 5542 struct rte_flow_action_jump *jump_action; 5543 uint32_t tag_id = 0; 5544 int index; 5545 int append_index = 0; 5546 int ret; 5547 5548 if (sample_action_pos < 0) 5549 return rte_flow_error_set(error, EINVAL, 5550 RTE_FLOW_ERROR_TYPE_ACTION, 5551 NULL, "invalid position of sample " 5552 "action in list"); 5553 /* Prepare the actions for prefix and suffix flow. */ 5554 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 5555 index = qrss_action_pos; 5556 /* Put the preceding the Queue/RSS action into prefix flow. */ 5557 if (index != 0) 5558 memcpy(actions_pre, actions, 5559 sizeof(struct rte_flow_action) * index); 5560 /* Put others preceding the sample action into prefix flow. */ 5561 if (sample_action_pos > index + 1) 5562 memcpy(actions_pre + index, actions + index + 1, 5563 sizeof(struct rte_flow_action) * 5564 (sample_action_pos - index - 1)); 5565 index = sample_action_pos - 1; 5566 /* Put Queue/RSS action into Suffix flow. */ 5567 memcpy(actions_sfx, actions + qrss_action_pos, 5568 sizeof(struct rte_flow_action)); 5569 actions_sfx++; 5570 } else { 5571 index = sample_action_pos; 5572 if (index != 0) 5573 memcpy(actions_pre, actions, 5574 sizeof(struct rte_flow_action) * index); 5575 } 5576 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress. 5577 * For CX6DX and above, metadata registers Cx preserve their value, 5578 * add an extra tag action for NIC-RX and E-Switch Domain. 5579 */ 5580 if (add_tag) { 5581 /* Prepare the prefix tag action. */ 5582 append_index++; 5583 set_tag = (void *)(actions_pre + actions_n + append_index); 5584 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); 5585 if (ret < 0) 5586 return ret; 5587 mlx5_ipool_malloc(priv->sh->ipool 5588 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); 5589 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5590 .id = ret, 5591 .data = tag_id, 5592 }; 5593 /* Prepare the suffix subflow items. */ 5594 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 5595 tag_spec->data = tag_id; 5596 tag_spec->id = set_tag->id; 5597 tag_mask = tag_spec + 1; 5598 tag_mask->data = UINT32_MAX; 5599 sfx_items[0] = (struct rte_flow_item){ 5600 .type = (enum rte_flow_item_type) 5601 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5602 .spec = tag_spec, 5603 .last = NULL, 5604 .mask = tag_mask, 5605 }; 5606 sfx_items[1] = (struct rte_flow_item){ 5607 .type = (enum rte_flow_item_type) 5608 RTE_FLOW_ITEM_TYPE_END, 5609 }; 5610 /* Prepare the tag action in prefix subflow. */ 5611 actions_pre[index++] = 5612 (struct rte_flow_action){ 5613 .type = (enum rte_flow_action_type) 5614 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5615 .conf = set_tag, 5616 }; 5617 } 5618 memcpy(actions_pre + index, actions + sample_action_pos, 5619 sizeof(struct rte_flow_action)); 5620 index += 1; 5621 /* For the modify action after the sample action in E-Switch mirroring, 5622 * Add the extra jump action in prefix subflow and jump into the next 5623 * table, then do the modify action in the new table. 5624 */ 5625 if (jump_table) { 5626 /* Prepare the prefix jump action. */ 5627 append_index++; 5628 jump_action = (void *)(actions_pre + actions_n + append_index); 5629 jump_action->group = jump_table; 5630 actions_pre[index++] = 5631 (struct rte_flow_action){ 5632 .type = (enum rte_flow_action_type) 5633 RTE_FLOW_ACTION_TYPE_JUMP, 5634 .conf = jump_action, 5635 }; 5636 } 5637 actions_pre[index] = (struct rte_flow_action){ 5638 .type = (enum rte_flow_action_type) 5639 RTE_FLOW_ACTION_TYPE_END, 5640 }; 5641 /* Put the actions after sample into Suffix flow. */ 5642 memcpy(actions_sfx, actions + sample_action_pos + 1, 5643 sizeof(struct rte_flow_action) * 5644 (actions_n - sample_action_pos - 1)); 5645 return tag_id; 5646 } 5647 5648 /** 5649 * The splitting for metadata feature. 5650 * 5651 * - Q/RSS action on NIC Rx should be split in order to pass by 5652 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5653 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5654 * 5655 * - All the actions on NIC Tx should have a mreg copy action to 5656 * copy reg_a from WQE to reg_c[0]. 5657 * 5658 * @param dev 5659 * Pointer to Ethernet device. 5660 * @param[in] flow 5661 * Parent flow structure pointer. 5662 * @param[in] attr 5663 * Flow rule attributes. 5664 * @param[in] items 5665 * Pattern specification (list terminated by the END pattern item). 5666 * @param[in] actions 5667 * Associated actions (list terminated by the END action). 5668 * @param[in] flow_split_info 5669 * Pointer to flow split info structure. 5670 * @param[out] error 5671 * Perform verbose error reporting if not NULL. 5672 * @return 5673 * 0 on success, negative value otherwise 5674 */ 5675 static int 5676 flow_create_split_metadata(struct rte_eth_dev *dev, 5677 struct rte_flow *flow, 5678 const struct rte_flow_attr *attr, 5679 const struct rte_flow_item items[], 5680 const struct rte_flow_action actions[], 5681 struct mlx5_flow_split_info *flow_split_info, 5682 struct rte_flow_error *error) 5683 { 5684 struct mlx5_priv *priv = dev->data->dev_private; 5685 struct mlx5_dev_config *config = &priv->config; 5686 const struct rte_flow_action *qrss = NULL; 5687 struct rte_flow_action *ext_actions = NULL; 5688 struct mlx5_flow *dev_flow = NULL; 5689 uint32_t qrss_id = 0; 5690 int mtr_sfx = 0; 5691 size_t act_size; 5692 int actions_n; 5693 int encap_idx; 5694 int ret; 5695 5696 /* Check whether extensive metadata feature is engaged. */ 5697 if (!config->dv_flow_en || 5698 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 5699 !mlx5_flow_ext_mreg_supported(dev)) 5700 return flow_create_split_inner(dev, flow, NULL, attr, items, 5701 actions, flow_split_info, error); 5702 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 5703 &encap_idx); 5704 if (qrss) { 5705 /* Exclude hairpin flows from splitting. */ 5706 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 5707 const struct rte_flow_action_queue *queue; 5708 5709 queue = qrss->conf; 5710 if (mlx5_rxq_get_type(dev, queue->index) == 5711 MLX5_RXQ_TYPE_HAIRPIN) 5712 qrss = NULL; 5713 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 5714 const struct rte_flow_action_rss *rss; 5715 5716 rss = qrss->conf; 5717 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 5718 MLX5_RXQ_TYPE_HAIRPIN) 5719 qrss = NULL; 5720 } 5721 } 5722 if (qrss) { 5723 /* Check if it is in meter suffix table. */ 5724 mtr_sfx = attr->group == (attr->transfer ? 5725 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5726 MLX5_FLOW_TABLE_LEVEL_METER); 5727 /* 5728 * Q/RSS action on NIC Rx should be split in order to pass by 5729 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5730 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5731 */ 5732 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5733 sizeof(struct rte_flow_action_set_tag) + 5734 sizeof(struct rte_flow_action_jump); 5735 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5736 SOCKET_ID_ANY); 5737 if (!ext_actions) 5738 return rte_flow_error_set(error, ENOMEM, 5739 RTE_FLOW_ERROR_TYPE_ACTION, 5740 NULL, "no memory to split " 5741 "metadata flow"); 5742 /* 5743 * If we are the suffix flow of meter, tag already exist. 5744 * Set the tag action to void. 5745 */ 5746 if (mtr_sfx) 5747 ext_actions[qrss - actions].type = 5748 RTE_FLOW_ACTION_TYPE_VOID; 5749 else 5750 ext_actions[qrss - actions].type = 5751 (enum rte_flow_action_type) 5752 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5753 /* 5754 * Create the new actions list with removed Q/RSS action 5755 * and appended set tag and jump to register copy table 5756 * (RX_CP_TBL). We should preallocate unique tag ID here 5757 * in advance, because it is needed for set tag action. 5758 */ 5759 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5760 qrss, actions_n, error); 5761 if (!mtr_sfx && !qrss_id) { 5762 ret = -rte_errno; 5763 goto exit; 5764 } 5765 } else if (attr->egress && !attr->transfer) { 5766 /* 5767 * All the actions on NIC Tx should have a metadata register 5768 * copy action to copy reg_a from WQE to reg_c[meta] 5769 */ 5770 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5771 sizeof(struct mlx5_flow_action_copy_mreg); 5772 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5773 SOCKET_ID_ANY); 5774 if (!ext_actions) 5775 return rte_flow_error_set(error, ENOMEM, 5776 RTE_FLOW_ERROR_TYPE_ACTION, 5777 NULL, "no memory to split " 5778 "metadata flow"); 5779 /* Create the action list appended with copy register. */ 5780 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5781 actions_n, error, encap_idx); 5782 if (ret < 0) 5783 goto exit; 5784 } 5785 /* Add the unmodified original or prefix subflow. */ 5786 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5787 items, ext_actions ? ext_actions : 5788 actions, flow_split_info, error); 5789 if (ret < 0) 5790 goto exit; 5791 MLX5_ASSERT(dev_flow); 5792 if (qrss) { 5793 const struct rte_flow_attr q_attr = { 5794 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5795 .ingress = 1, 5796 }; 5797 /* Internal PMD action to set register. */ 5798 struct mlx5_rte_flow_item_tag q_tag_spec = { 5799 .data = qrss_id, 5800 .id = REG_NON, 5801 }; 5802 struct rte_flow_item q_items[] = { 5803 { 5804 .type = (enum rte_flow_item_type) 5805 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5806 .spec = &q_tag_spec, 5807 .last = NULL, 5808 .mask = NULL, 5809 }, 5810 { 5811 .type = RTE_FLOW_ITEM_TYPE_END, 5812 }, 5813 }; 5814 struct rte_flow_action q_actions[] = { 5815 { 5816 .type = qrss->type, 5817 .conf = qrss->conf, 5818 }, 5819 { 5820 .type = RTE_FLOW_ACTION_TYPE_END, 5821 }, 5822 }; 5823 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5824 5825 /* 5826 * Configure the tag item only if there is no meter subflow. 5827 * Since tag is already marked in the meter suffix subflow 5828 * we can just use the meter suffix items as is. 5829 */ 5830 if (qrss_id) { 5831 /* Not meter subflow. */ 5832 MLX5_ASSERT(!mtr_sfx); 5833 /* 5834 * Put unique id in prefix flow due to it is destroyed 5835 * after suffix flow and id will be freed after there 5836 * is no actual flows with this id and identifier 5837 * reallocation becomes possible (for example, for 5838 * other flows in other threads). 5839 */ 5840 dev_flow->handle->split_flow_id = qrss_id; 5841 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5842 error); 5843 if (ret < 0) 5844 goto exit; 5845 q_tag_spec.id = ret; 5846 } 5847 dev_flow = NULL; 5848 /* Add suffix subflow to execute Q/RSS. */ 5849 flow_split_info->prefix_layers = layers; 5850 flow_split_info->prefix_mark = 0; 5851 ret = flow_create_split_inner(dev, flow, &dev_flow, 5852 &q_attr, mtr_sfx ? items : 5853 q_items, q_actions, 5854 flow_split_info, error); 5855 if (ret < 0) 5856 goto exit; 5857 /* qrss ID should be freed if failed. */ 5858 qrss_id = 0; 5859 MLX5_ASSERT(dev_flow); 5860 } 5861 5862 exit: 5863 /* 5864 * We do not destroy the partially created sub_flows in case of error. 5865 * These ones are included into parent flow list and will be destroyed 5866 * by flow_drv_destroy. 5867 */ 5868 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 5869 qrss_id); 5870 mlx5_free(ext_actions); 5871 return ret; 5872 } 5873 5874 /** 5875 * Create meter internal drop flow with the original pattern. 5876 * 5877 * @param dev 5878 * Pointer to Ethernet device. 5879 * @param[in] flow 5880 * Parent flow structure pointer. 5881 * @param[in] attr 5882 * Flow rule attributes. 5883 * @param[in] items 5884 * Pattern specification (list terminated by the END pattern item). 5885 * @param[in] flow_split_info 5886 * Pointer to flow split info structure. 5887 * @param[in] fm 5888 * Pointer to flow meter structure. 5889 * @param[out] error 5890 * Perform verbose error reporting if not NULL. 5891 * @return 5892 * 0 on success, negative value otherwise 5893 */ 5894 static uint32_t 5895 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev, 5896 struct rte_flow *flow, 5897 const struct rte_flow_attr *attr, 5898 const struct rte_flow_item items[], 5899 struct mlx5_flow_split_info *flow_split_info, 5900 struct mlx5_flow_meter_info *fm, 5901 struct rte_flow_error *error) 5902 { 5903 struct mlx5_flow *dev_flow = NULL; 5904 struct rte_flow_attr drop_attr = *attr; 5905 struct rte_flow_action drop_actions[3]; 5906 struct mlx5_flow_split_info drop_split_info = *flow_split_info; 5907 5908 MLX5_ASSERT(fm->drop_cnt); 5909 drop_actions[0].type = 5910 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 5911 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt; 5912 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP; 5913 drop_actions[1].conf = NULL; 5914 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END; 5915 drop_actions[2].conf = NULL; 5916 drop_split_info.external = false; 5917 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5918 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP; 5919 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER; 5920 return flow_create_split_inner(dev, flow, &dev_flow, 5921 &drop_attr, items, drop_actions, 5922 &drop_split_info, error); 5923 } 5924 5925 /** 5926 * The splitting for meter feature. 5927 * 5928 * - The meter flow will be split to two flows as prefix and 5929 * suffix flow. The packets make sense only it pass the prefix 5930 * meter action. 5931 * 5932 * - Reg_C_5 is used for the packet to match betweend prefix and 5933 * suffix flow. 5934 * 5935 * @param dev 5936 * Pointer to Ethernet device. 5937 * @param[in] flow 5938 * Parent flow structure pointer. 5939 * @param[in] attr 5940 * Flow rule attributes. 5941 * @param[in] items 5942 * Pattern specification (list terminated by the END pattern item). 5943 * @param[in] actions 5944 * Associated actions (list terminated by the END action). 5945 * @param[in] flow_split_info 5946 * Pointer to flow split info structure. 5947 * @param[out] error 5948 * Perform verbose error reporting if not NULL. 5949 * @return 5950 * 0 on success, negative value otherwise 5951 */ 5952 static int 5953 flow_create_split_meter(struct rte_eth_dev *dev, 5954 struct rte_flow *flow, 5955 const struct rte_flow_attr *attr, 5956 const struct rte_flow_item items[], 5957 const struct rte_flow_action actions[], 5958 struct mlx5_flow_split_info *flow_split_info, 5959 struct rte_flow_error *error) 5960 { 5961 struct mlx5_priv *priv = dev->data->dev_private; 5962 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); 5963 struct rte_flow_action *sfx_actions = NULL; 5964 struct rte_flow_action *pre_actions = NULL; 5965 struct rte_flow_item *sfx_items = NULL; 5966 struct mlx5_flow *dev_flow = NULL; 5967 struct rte_flow_attr sfx_attr = *attr; 5968 struct mlx5_flow_meter_info *fm = NULL; 5969 uint8_t skip_scale_restore; 5970 bool has_mtr = false; 5971 bool has_modify = false; 5972 bool set_mtr_reg = true; 5973 bool is_mtr_hierarchy = false; 5974 uint32_t meter_id = 0; 5975 uint32_t mtr_idx = 0; 5976 uint32_t mtr_flow_id = 0; 5977 size_t act_size; 5978 size_t item_size; 5979 int actions_n = 0; 5980 int ret = 0; 5981 5982 if (priv->mtr_en) 5983 actions_n = flow_check_meter_action(dev, actions, &has_mtr, 5984 &has_modify, &meter_id); 5985 if (has_mtr) { 5986 if (flow->meter) { 5987 fm = flow_dv_meter_find_by_idx(priv, flow->meter); 5988 if (!fm) 5989 return rte_flow_error_set(error, EINVAL, 5990 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5991 NULL, "Meter not found."); 5992 } else { 5993 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx); 5994 if (!fm) 5995 return rte_flow_error_set(error, EINVAL, 5996 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5997 NULL, "Meter not found."); 5998 ret = mlx5_flow_meter_attach(priv, fm, 5999 &sfx_attr, error); 6000 if (ret) 6001 return -rte_errno; 6002 flow->meter = mtr_idx; 6003 } 6004 MLX5_ASSERT(wks); 6005 wks->fm = fm; 6006 if (!fm->def_policy) { 6007 wks->policy = mlx5_flow_meter_policy_find(dev, 6008 fm->policy_id, 6009 NULL); 6010 MLX5_ASSERT(wks->policy); 6011 if (wks->policy->is_hierarchy) { 6012 wks->final_policy = 6013 mlx5_flow_meter_hierarchy_get_final_policy(dev, 6014 wks->policy); 6015 if (!wks->final_policy) 6016 return rte_flow_error_set(error, 6017 EINVAL, 6018 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 6019 "Failed to find terminal policy of hierarchy."); 6020 is_mtr_hierarchy = true; 6021 } 6022 } 6023 /* 6024 * If it isn't default-policy Meter, and 6025 * 1. There's no action in flow to change 6026 * packet (modify/encap/decap etc.), OR 6027 * 2. No drop count needed for this meter. 6028 * 3. It's not meter hierarchy. 6029 * Then no need to use regC to save meter id anymore. 6030 */ 6031 if (!fm->def_policy && !is_mtr_hierarchy && 6032 (!has_modify || !fm->drop_cnt)) 6033 set_mtr_reg = false; 6034 /* Prefix actions: meter, decap, encap, tag, jump, end. */ 6035 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) + 6036 sizeof(struct mlx5_rte_flow_action_set_tag); 6037 /* Suffix items: tag, vlan, port id, end. */ 6038 #define METER_SUFFIX_ITEM 4 6039 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 6040 sizeof(struct mlx5_rte_flow_item_tag) * 2; 6041 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 6042 0, SOCKET_ID_ANY); 6043 if (!sfx_actions) 6044 return rte_flow_error_set(error, ENOMEM, 6045 RTE_FLOW_ERROR_TYPE_ACTION, 6046 NULL, "no memory to split " 6047 "meter flow"); 6048 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 6049 act_size); 6050 /* There's no suffix flow for meter of non-default policy. */ 6051 if (!fm->def_policy) 6052 pre_actions = sfx_actions + 1; 6053 else 6054 pre_actions = sfx_actions + actions_n; 6055 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr, 6056 items, sfx_items, actions, 6057 sfx_actions, pre_actions, 6058 (set_mtr_reg ? &mtr_flow_id : NULL), 6059 error); 6060 if (ret) { 6061 ret = -rte_errno; 6062 goto exit; 6063 } 6064 /* Add the prefix subflow. */ 6065 flow_split_info->prefix_mark = 0; 6066 skip_scale_restore = flow_split_info->skip_scale; 6067 flow_split_info->skip_scale |= 6068 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 6069 ret = flow_create_split_inner(dev, flow, &dev_flow, 6070 attr, items, pre_actions, 6071 flow_split_info, error); 6072 flow_split_info->skip_scale = skip_scale_restore; 6073 if (ret) { 6074 if (mtr_flow_id) 6075 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id); 6076 ret = -rte_errno; 6077 goto exit; 6078 } 6079 if (mtr_flow_id) { 6080 dev_flow->handle->split_flow_id = mtr_flow_id; 6081 dev_flow->handle->is_meter_flow_id = 1; 6082 } 6083 if (!fm->def_policy) { 6084 if (!set_mtr_reg && fm->drop_cnt) 6085 ret = 6086 flow_meter_create_drop_flow_with_org_pattern(dev, flow, 6087 &sfx_attr, items, 6088 flow_split_info, 6089 fm, error); 6090 goto exit; 6091 } 6092 /* Setting the sfx group atrr. */ 6093 sfx_attr.group = sfx_attr.transfer ? 6094 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 6095 MLX5_FLOW_TABLE_LEVEL_METER; 6096 flow_split_info->prefix_layers = 6097 flow_get_prefix_layer_flags(dev_flow); 6098 flow_split_info->prefix_mark = dev_flow->handle->mark; 6099 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX; 6100 } 6101 /* Add the prefix subflow. */ 6102 ret = flow_create_split_metadata(dev, flow, 6103 &sfx_attr, sfx_items ? 6104 sfx_items : items, 6105 sfx_actions ? sfx_actions : actions, 6106 flow_split_info, error); 6107 exit: 6108 if (sfx_actions) 6109 mlx5_free(sfx_actions); 6110 return ret; 6111 } 6112 6113 /** 6114 * The splitting for sample feature. 6115 * 6116 * Once Sample action is detected in the action list, the flow actions should 6117 * be split into prefix sub flow and suffix sub flow. 6118 * 6119 * The original items remain in the prefix sub flow, all actions preceding the 6120 * sample action and the sample action itself will be copied to the prefix 6121 * sub flow, the actions following the sample action will be copied to the 6122 * suffix sub flow, Queue action always be located in the suffix sub flow. 6123 * 6124 * In order to make the packet from prefix sub flow matches with suffix sub 6125 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 6126 * flow uses tag item with the unique flow id. 6127 * 6128 * @param dev 6129 * Pointer to Ethernet device. 6130 * @param[in] flow 6131 * Parent flow structure pointer. 6132 * @param[in] attr 6133 * Flow rule attributes. 6134 * @param[in] items 6135 * Pattern specification (list terminated by the END pattern item). 6136 * @param[in] actions 6137 * Associated actions (list terminated by the END action). 6138 * @param[in] flow_split_info 6139 * Pointer to flow split info structure. 6140 * @param[out] error 6141 * Perform verbose error reporting if not NULL. 6142 * @return 6143 * 0 on success, negative value otherwise 6144 */ 6145 static int 6146 flow_create_split_sample(struct rte_eth_dev *dev, 6147 struct rte_flow *flow, 6148 const struct rte_flow_attr *attr, 6149 const struct rte_flow_item items[], 6150 const struct rte_flow_action actions[], 6151 struct mlx5_flow_split_info *flow_split_info, 6152 struct rte_flow_error *error) 6153 { 6154 struct mlx5_priv *priv = dev->data->dev_private; 6155 struct rte_flow_action *sfx_actions = NULL; 6156 struct rte_flow_action *pre_actions = NULL; 6157 struct rte_flow_item *sfx_items = NULL; 6158 struct mlx5_flow *dev_flow = NULL; 6159 struct rte_flow_attr sfx_attr = *attr; 6160 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 6161 struct mlx5_flow_dv_sample_resource *sample_res; 6162 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 6163 struct mlx5_flow_tbl_resource *sfx_tbl; 6164 #endif 6165 size_t act_size; 6166 size_t item_size; 6167 uint32_t fdb_tx = 0; 6168 int32_t tag_id = 0; 6169 int actions_n = 0; 6170 int sample_action_pos; 6171 int qrss_action_pos; 6172 int add_tag = 0; 6173 int modify_after_mirror = 0; 6174 uint16_t jump_table = 0; 6175 const uint32_t next_ft_step = 1; 6176 int ret = 0; 6177 6178 if (priv->sampler_en) 6179 actions_n = flow_check_match_action(actions, attr, 6180 RTE_FLOW_ACTION_TYPE_SAMPLE, 6181 &sample_action_pos, &qrss_action_pos, 6182 &modify_after_mirror); 6183 if (actions_n) { 6184 /* The prefix actions must includes sample, tag, end. */ 6185 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 6186 + sizeof(struct mlx5_rte_flow_action_set_tag); 6187 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 6188 sizeof(struct mlx5_rte_flow_item_tag) * 2; 6189 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 6190 item_size), 0, SOCKET_ID_ANY); 6191 if (!sfx_actions) 6192 return rte_flow_error_set(error, ENOMEM, 6193 RTE_FLOW_ERROR_TYPE_ACTION, 6194 NULL, "no memory to split " 6195 "sample flow"); 6196 /* The representor_id is UINT16_MAX for uplink. */ 6197 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX); 6198 /* 6199 * When reg_c_preserve is set, metadata registers Cx preserve 6200 * their value even through packet duplication. 6201 */ 6202 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve); 6203 if (add_tag) 6204 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 6205 + act_size); 6206 if (modify_after_mirror) 6207 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR + 6208 next_ft_step; 6209 pre_actions = sfx_actions + actions_n; 6210 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items, 6211 actions, sfx_actions, 6212 pre_actions, actions_n, 6213 sample_action_pos, 6214 qrss_action_pos, jump_table, 6215 error); 6216 if (tag_id < 0 || (add_tag && !tag_id)) { 6217 ret = -rte_errno; 6218 goto exit; 6219 } 6220 if (modify_after_mirror) 6221 flow_split_info->skip_scale = 6222 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 6223 /* Add the prefix subflow. */ 6224 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 6225 items, pre_actions, 6226 flow_split_info, error); 6227 if (ret) { 6228 ret = -rte_errno; 6229 goto exit; 6230 } 6231 dev_flow->handle->split_flow_id = tag_id; 6232 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 6233 if (!modify_after_mirror) { 6234 /* Set the sfx group attr. */ 6235 sample_res = (struct mlx5_flow_dv_sample_resource *) 6236 dev_flow->dv.sample_res; 6237 sfx_tbl = (struct mlx5_flow_tbl_resource *) 6238 sample_res->normal_path_tbl; 6239 sfx_tbl_data = container_of(sfx_tbl, 6240 struct mlx5_flow_tbl_data_entry, 6241 tbl); 6242 sfx_attr.group = sfx_attr.transfer ? 6243 (sfx_tbl_data->level - 1) : sfx_tbl_data->level; 6244 } else { 6245 MLX5_ASSERT(attr->transfer); 6246 sfx_attr.group = jump_table; 6247 } 6248 flow_split_info->prefix_layers = 6249 flow_get_prefix_layer_flags(dev_flow); 6250 flow_split_info->prefix_mark = dev_flow->handle->mark; 6251 /* Suffix group level already be scaled with factor, set 6252 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale 6253 * again in translation. 6254 */ 6255 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT; 6256 #endif 6257 } 6258 /* Add the suffix subflow. */ 6259 ret = flow_create_split_meter(dev, flow, &sfx_attr, 6260 sfx_items ? sfx_items : items, 6261 sfx_actions ? sfx_actions : actions, 6262 flow_split_info, error); 6263 exit: 6264 if (sfx_actions) 6265 mlx5_free(sfx_actions); 6266 return ret; 6267 } 6268 6269 /** 6270 * Split the flow to subflow set. The splitters might be linked 6271 * in the chain, like this: 6272 * flow_create_split_outer() calls: 6273 * flow_create_split_meter() calls: 6274 * flow_create_split_metadata(meter_subflow_0) calls: 6275 * flow_create_split_inner(metadata_subflow_0) 6276 * flow_create_split_inner(metadata_subflow_1) 6277 * flow_create_split_inner(metadata_subflow_2) 6278 * flow_create_split_metadata(meter_subflow_1) calls: 6279 * flow_create_split_inner(metadata_subflow_0) 6280 * flow_create_split_inner(metadata_subflow_1) 6281 * flow_create_split_inner(metadata_subflow_2) 6282 * 6283 * This provide flexible way to add new levels of flow splitting. 6284 * The all of successfully created subflows are included to the 6285 * parent flow dev_flow list. 6286 * 6287 * @param dev 6288 * Pointer to Ethernet device. 6289 * @param[in] flow 6290 * Parent flow structure pointer. 6291 * @param[in] attr 6292 * Flow rule attributes. 6293 * @param[in] items 6294 * Pattern specification (list terminated by the END pattern item). 6295 * @param[in] actions 6296 * Associated actions (list terminated by the END action). 6297 * @param[in] flow_split_info 6298 * Pointer to flow split info structure. 6299 * @param[out] error 6300 * Perform verbose error reporting if not NULL. 6301 * @return 6302 * 0 on success, negative value otherwise 6303 */ 6304 static int 6305 flow_create_split_outer(struct rte_eth_dev *dev, 6306 struct rte_flow *flow, 6307 const struct rte_flow_attr *attr, 6308 const struct rte_flow_item items[], 6309 const struct rte_flow_action actions[], 6310 struct mlx5_flow_split_info *flow_split_info, 6311 struct rte_flow_error *error) 6312 { 6313 int ret; 6314 6315 ret = flow_create_split_sample(dev, flow, attr, items, 6316 actions, flow_split_info, error); 6317 MLX5_ASSERT(ret <= 0); 6318 return ret; 6319 } 6320 6321 static inline struct mlx5_flow_tunnel * 6322 flow_tunnel_from_rule(const struct mlx5_flow *flow) 6323 { 6324 struct mlx5_flow_tunnel *tunnel; 6325 6326 #pragma GCC diagnostic push 6327 #pragma GCC diagnostic ignored "-Wcast-qual" 6328 tunnel = (typeof(tunnel))flow->tunnel; 6329 #pragma GCC diagnostic pop 6330 6331 return tunnel; 6332 } 6333 6334 /** 6335 * Adjust flow RSS workspace if needed. 6336 * 6337 * @param wks 6338 * Pointer to thread flow work space. 6339 * @param rss_desc 6340 * Pointer to RSS descriptor. 6341 * @param[in] nrssq_num 6342 * New RSS queue number. 6343 * 6344 * @return 6345 * 0 on success, -1 otherwise and rte_errno is set. 6346 */ 6347 static int 6348 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks, 6349 struct mlx5_flow_rss_desc *rss_desc, 6350 uint32_t nrssq_num) 6351 { 6352 if (likely(nrssq_num <= wks->rssq_num)) 6353 return 0; 6354 rss_desc->queue = realloc(rss_desc->queue, 6355 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2)); 6356 if (!rss_desc->queue) { 6357 rte_errno = ENOMEM; 6358 return -1; 6359 } 6360 wks->rssq_num = RTE_ALIGN(nrssq_num, 2); 6361 return 0; 6362 } 6363 6364 /** 6365 * Create a flow and add it to @p list. 6366 * 6367 * @param dev 6368 * Pointer to Ethernet device. 6369 * @param list 6370 * Pointer to a TAILQ flow list. If this parameter NULL, 6371 * no list insertion occurred, flow is just created, 6372 * this is caller's responsibility to track the 6373 * created flow. 6374 * @param[in] attr 6375 * Flow rule attributes. 6376 * @param[in] items 6377 * Pattern specification (list terminated by the END pattern item). 6378 * @param[in] actions 6379 * Associated actions (list terminated by the END action). 6380 * @param[in] external 6381 * This flow rule is created by request external to PMD. 6382 * @param[out] error 6383 * Perform verbose error reporting if not NULL. 6384 * 6385 * @return 6386 * A flow index on success, 0 otherwise and rte_errno is set. 6387 */ 6388 static uint32_t 6389 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6390 const struct rte_flow_attr *attr, 6391 const struct rte_flow_item items[], 6392 const struct rte_flow_action original_actions[], 6393 bool external, struct rte_flow_error *error) 6394 { 6395 struct mlx5_priv *priv = dev->data->dev_private; 6396 struct rte_flow *flow = NULL; 6397 struct mlx5_flow *dev_flow; 6398 const struct rte_flow_action_rss *rss = NULL; 6399 struct mlx5_translated_action_handle 6400 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6401 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6402 union { 6403 struct mlx5_flow_expand_rss buf; 6404 uint8_t buffer[4096]; 6405 } expand_buffer; 6406 union { 6407 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6408 uint8_t buffer[2048]; 6409 } actions_rx; 6410 union { 6411 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6412 uint8_t buffer[2048]; 6413 } actions_hairpin_tx; 6414 union { 6415 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 6416 uint8_t buffer[2048]; 6417 } items_tx; 6418 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 6419 struct mlx5_flow_rss_desc *rss_desc; 6420 const struct rte_flow_action *p_actions_rx; 6421 uint32_t i; 6422 uint32_t idx = 0; 6423 int hairpin_flow; 6424 struct rte_flow_attr attr_tx = { .priority = 0 }; 6425 const struct rte_flow_action *actions; 6426 struct rte_flow_action *translated_actions = NULL; 6427 struct mlx5_flow_tunnel *tunnel; 6428 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 6429 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace(); 6430 struct mlx5_flow_split_info flow_split_info = { 6431 .external = !!external, 6432 .skip_scale = 0, 6433 .flow_idx = 0, 6434 .prefix_mark = 0, 6435 .prefix_layers = 0, 6436 .table_id = 0 6437 }; 6438 int ret; 6439 6440 MLX5_ASSERT(wks); 6441 rss_desc = &wks->rss_desc; 6442 ret = flow_action_handles_translate(dev, original_actions, 6443 indir_actions, 6444 &indir_actions_n, 6445 &translated_actions, error); 6446 if (ret < 0) { 6447 MLX5_ASSERT(translated_actions == NULL); 6448 return 0; 6449 } 6450 actions = translated_actions ? translated_actions : original_actions; 6451 p_actions_rx = actions; 6452 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6453 ret = flow_drv_validate(dev, attr, items, p_actions_rx, 6454 external, hairpin_flow, error); 6455 if (ret < 0) 6456 goto error_before_hairpin_split; 6457 flow = mlx5_ipool_zmalloc(priv->flows[type], &idx); 6458 if (!flow) { 6459 rte_errno = ENOMEM; 6460 goto error_before_hairpin_split; 6461 } 6462 if (hairpin_flow > 0) { 6463 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 6464 rte_errno = EINVAL; 6465 goto error_before_hairpin_split; 6466 } 6467 flow_hairpin_split(dev, actions, actions_rx.actions, 6468 actions_hairpin_tx.actions, items_tx.items, 6469 idx); 6470 p_actions_rx = actions_rx.actions; 6471 } 6472 flow_split_info.flow_idx = idx; 6473 flow->drv_type = flow_get_drv_type(dev, attr); 6474 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 6475 flow->drv_type < MLX5_FLOW_TYPE_MAX); 6476 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue)); 6477 /* RSS Action only works on NIC RX domain */ 6478 if (attr->ingress && !attr->transfer) 6479 rss = flow_get_rss_action(dev, p_actions_rx); 6480 if (rss) { 6481 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num)) 6482 return 0; 6483 /* 6484 * The following information is required by 6485 * mlx5_flow_hashfields_adjust() in advance. 6486 */ 6487 rss_desc->level = rss->level; 6488 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */ 6489 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types; 6490 } 6491 flow->dev_handles = 0; 6492 if (rss && rss->types) { 6493 unsigned int graph_root; 6494 6495 graph_root = find_graph_root(rss->level); 6496 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 6497 items, rss->types, 6498 mlx5_support_expansion, graph_root); 6499 MLX5_ASSERT(ret > 0 && 6500 (unsigned int)ret < sizeof(expand_buffer.buffer)); 6501 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) { 6502 for (i = 0; i < buf->entries; ++i) 6503 mlx5_dbg__print_pattern(buf->entry[i].pattern); 6504 } 6505 } else { 6506 buf->entries = 1; 6507 buf->entry[0].pattern = (void *)(uintptr_t)items; 6508 } 6509 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions, 6510 indir_actions_n); 6511 for (i = 0; i < buf->entries; ++i) { 6512 /* Initialize flow split data. */ 6513 flow_split_info.prefix_layers = 0; 6514 flow_split_info.prefix_mark = 0; 6515 flow_split_info.skip_scale = 0; 6516 /* 6517 * The splitter may create multiple dev_flows, 6518 * depending on configuration. In the simplest 6519 * case it just creates unmodified original flow. 6520 */ 6521 ret = flow_create_split_outer(dev, flow, attr, 6522 buf->entry[i].pattern, 6523 p_actions_rx, &flow_split_info, 6524 error); 6525 if (ret < 0) 6526 goto error; 6527 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) { 6528 ret = flow_tunnel_add_default_miss(dev, flow, attr, 6529 p_actions_rx, 6530 idx, 6531 wks->flows[0].tunnel, 6532 &default_miss_ctx, 6533 error); 6534 if (ret < 0) { 6535 mlx5_free(default_miss_ctx.queue); 6536 goto error; 6537 } 6538 } 6539 } 6540 /* Create the tx flow. */ 6541 if (hairpin_flow) { 6542 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 6543 attr_tx.ingress = 0; 6544 attr_tx.egress = 1; 6545 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 6546 actions_hairpin_tx.actions, 6547 idx, error); 6548 if (!dev_flow) 6549 goto error; 6550 dev_flow->flow = flow; 6551 dev_flow->external = 0; 6552 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 6553 dev_flow->handle, next); 6554 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 6555 items_tx.items, 6556 actions_hairpin_tx.actions, error); 6557 if (ret < 0) 6558 goto error; 6559 } 6560 /* 6561 * Update the metadata register copy table. If extensive 6562 * metadata feature is enabled and registers are supported 6563 * we might create the extra rte_flow for each unique 6564 * MARK/FLAG action ID. 6565 * 6566 * The table is updated for ingress Flows only, because 6567 * the egress Flows belong to the different device and 6568 * copy table should be updated in peer NIC Rx domain. 6569 */ 6570 if (attr->ingress && 6571 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 6572 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 6573 if (ret) 6574 goto error; 6575 } 6576 /* 6577 * If the flow is external (from application) OR device is started, 6578 * OR mreg discover, then apply immediately. 6579 */ 6580 if (external || dev->data->dev_started || 6581 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP && 6582 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) { 6583 ret = flow_drv_apply(dev, flow, error); 6584 if (ret < 0) 6585 goto error; 6586 } 6587 flow->type = type; 6588 flow_rxq_flags_set(dev, flow); 6589 rte_free(translated_actions); 6590 tunnel = flow_tunnel_from_rule(wks->flows); 6591 if (tunnel) { 6592 flow->tunnel = 1; 6593 flow->tunnel_id = tunnel->tunnel_id; 6594 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 6595 mlx5_free(default_miss_ctx.queue); 6596 } 6597 mlx5_flow_pop_thread_workspace(); 6598 return idx; 6599 error: 6600 MLX5_ASSERT(flow); 6601 ret = rte_errno; /* Save rte_errno before cleanup. */ 6602 flow_mreg_del_copy_action(dev, flow); 6603 flow_drv_destroy(dev, flow); 6604 if (rss_desc->shared_rss) 6605 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *) 6606 mlx5_ipool_get 6607 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 6608 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED); 6609 mlx5_ipool_free(priv->flows[type], idx); 6610 rte_errno = ret; /* Restore rte_errno. */ 6611 ret = rte_errno; 6612 rte_errno = ret; 6613 mlx5_flow_pop_thread_workspace(); 6614 error_before_hairpin_split: 6615 rte_free(translated_actions); 6616 return 0; 6617 } 6618 6619 /** 6620 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 6621 * incoming packets to table 1. 6622 * 6623 * Other flow rules, requested for group n, will be created in 6624 * e-switch table n+1. 6625 * Jump action to e-switch group n will be created to group n+1. 6626 * 6627 * Used when working in switchdev mode, to utilise advantages of table 1 6628 * and above. 6629 * 6630 * @param dev 6631 * Pointer to Ethernet device. 6632 * 6633 * @return 6634 * Pointer to flow on success, NULL otherwise and rte_errno is set. 6635 */ 6636 struct rte_flow * 6637 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 6638 { 6639 const struct rte_flow_attr attr = { 6640 .group = 0, 6641 .priority = 0, 6642 .ingress = 1, 6643 .egress = 0, 6644 .transfer = 1, 6645 }; 6646 const struct rte_flow_item pattern = { 6647 .type = RTE_FLOW_ITEM_TYPE_END, 6648 }; 6649 struct rte_flow_action_jump jump = { 6650 .group = 1, 6651 }; 6652 const struct rte_flow_action actions[] = { 6653 { 6654 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6655 .conf = &jump, 6656 }, 6657 { 6658 .type = RTE_FLOW_ACTION_TYPE_END, 6659 }, 6660 }; 6661 struct rte_flow_error error; 6662 6663 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 6664 &attr, &pattern, 6665 actions, false, &error); 6666 } 6667 6668 /** 6669 * Create a dedicated flow rule on e-switch table 1, matches ESW manager 6670 * and sq number, directs all packets to peer vport. 6671 * 6672 * @param dev 6673 * Pointer to Ethernet device. 6674 * @param txq 6675 * Txq index. 6676 * 6677 * @return 6678 * Flow ID on success, 0 otherwise and rte_errno is set. 6679 */ 6680 uint32_t 6681 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq) 6682 { 6683 struct rte_flow_attr attr = { 6684 .group = 0, 6685 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 6686 .ingress = 1, 6687 .egress = 0, 6688 .transfer = 1, 6689 }; 6690 struct rte_flow_item_port_id port_spec = { 6691 .id = MLX5_PORT_ESW_MGR, 6692 }; 6693 struct mlx5_rte_flow_item_tx_queue txq_spec = { 6694 .queue = txq, 6695 }; 6696 struct rte_flow_item pattern[] = { 6697 { 6698 .type = RTE_FLOW_ITEM_TYPE_PORT_ID, 6699 .spec = &port_spec, 6700 }, 6701 { 6702 .type = (enum rte_flow_item_type) 6703 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6704 .spec = &txq_spec, 6705 }, 6706 { 6707 .type = RTE_FLOW_ITEM_TYPE_END, 6708 }, 6709 }; 6710 struct rte_flow_action_jump jump = { 6711 .group = 1, 6712 }; 6713 struct rte_flow_action_port_id port = { 6714 .id = dev->data->port_id, 6715 }; 6716 struct rte_flow_action actions[] = { 6717 { 6718 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6719 .conf = &jump, 6720 }, 6721 { 6722 .type = RTE_FLOW_ACTION_TYPE_END, 6723 }, 6724 }; 6725 struct rte_flow_error error; 6726 6727 /* 6728 * Creates group 0, highest priority jump flow. 6729 * Matches txq to bypass kernel packets. 6730 */ 6731 if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions, 6732 false, &error) == 0) 6733 return 0; 6734 /* Create group 1, lowest priority redirect flow for txq. */ 6735 attr.group = 1; 6736 actions[0].conf = &port; 6737 actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID; 6738 return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, 6739 actions, false, &error); 6740 } 6741 6742 /** 6743 * Validate a flow supported by the NIC. 6744 * 6745 * @see rte_flow_validate() 6746 * @see rte_flow_ops 6747 */ 6748 int 6749 mlx5_flow_validate(struct rte_eth_dev *dev, 6750 const struct rte_flow_attr *attr, 6751 const struct rte_flow_item items[], 6752 const struct rte_flow_action original_actions[], 6753 struct rte_flow_error *error) 6754 { 6755 int hairpin_flow; 6756 struct mlx5_translated_action_handle 6757 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6758 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6759 const struct rte_flow_action *actions; 6760 struct rte_flow_action *translated_actions = NULL; 6761 int ret = flow_action_handles_translate(dev, original_actions, 6762 indir_actions, 6763 &indir_actions_n, 6764 &translated_actions, error); 6765 6766 if (ret) 6767 return ret; 6768 actions = translated_actions ? translated_actions : original_actions; 6769 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6770 ret = flow_drv_validate(dev, attr, items, actions, 6771 true, hairpin_flow, error); 6772 rte_free(translated_actions); 6773 return ret; 6774 } 6775 6776 /** 6777 * Create a flow. 6778 * 6779 * @see rte_flow_create() 6780 * @see rte_flow_ops 6781 */ 6782 struct rte_flow * 6783 mlx5_flow_create(struct rte_eth_dev *dev, 6784 const struct rte_flow_attr *attr, 6785 const struct rte_flow_item items[], 6786 const struct rte_flow_action actions[], 6787 struct rte_flow_error *error) 6788 { 6789 /* 6790 * If the device is not started yet, it is not allowed to created a 6791 * flow from application. PMD default flows and traffic control flows 6792 * are not affected. 6793 */ 6794 if (unlikely(!dev->data->dev_started)) { 6795 DRV_LOG(DEBUG, "port %u is not started when " 6796 "inserting a flow", dev->data->port_id); 6797 rte_flow_error_set(error, ENODEV, 6798 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6799 NULL, 6800 "port not started"); 6801 return NULL; 6802 } 6803 6804 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN, 6805 attr, items, actions, 6806 true, error); 6807 } 6808 6809 /** 6810 * Destroy a flow in a list. 6811 * 6812 * @param dev 6813 * Pointer to Ethernet device. 6814 * @param[in] flow_idx 6815 * Index of flow to destroy. 6816 */ 6817 static void 6818 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6819 uint32_t flow_idx) 6820 { 6821 struct mlx5_priv *priv = dev->data->dev_private; 6822 struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx); 6823 6824 if (!flow) 6825 return; 6826 MLX5_ASSERT(flow->type == type); 6827 /* 6828 * Update RX queue flags only if port is started, otherwise it is 6829 * already clean. 6830 */ 6831 if (dev->data->dev_started) 6832 flow_rxq_flags_trim(dev, flow); 6833 flow_drv_destroy(dev, flow); 6834 if (flow->tunnel) { 6835 struct mlx5_flow_tunnel *tunnel; 6836 6837 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 6838 RTE_VERIFY(tunnel); 6839 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 6840 mlx5_flow_tunnel_free(dev, tunnel); 6841 } 6842 flow_mreg_del_copy_action(dev, flow); 6843 mlx5_ipool_free(priv->flows[type], flow_idx); 6844 } 6845 6846 /** 6847 * Destroy all flows. 6848 * 6849 * @param dev 6850 * Pointer to Ethernet device. 6851 * @param type 6852 * Flow type to be flushed. 6853 * @param active 6854 * If flushing is called avtively. 6855 */ 6856 void 6857 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6858 bool active) 6859 { 6860 struct mlx5_priv *priv = dev->data->dev_private; 6861 uint32_t num_flushed = 0, fidx = 1; 6862 struct rte_flow *flow; 6863 6864 MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) { 6865 flow_list_destroy(dev, type, fidx); 6866 num_flushed++; 6867 } 6868 if (active) { 6869 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 6870 dev->data->port_id, num_flushed); 6871 } 6872 } 6873 6874 /** 6875 * Stop all default actions for flows. 6876 * 6877 * @param dev 6878 * Pointer to Ethernet device. 6879 */ 6880 void 6881 mlx5_flow_stop_default(struct rte_eth_dev *dev) 6882 { 6883 flow_mreg_del_default_copy_action(dev); 6884 flow_rxq_flags_clear(dev); 6885 } 6886 6887 /** 6888 * Start all default actions for flows. 6889 * 6890 * @param dev 6891 * Pointer to Ethernet device. 6892 * @return 6893 * 0 on success, a negative errno value otherwise and rte_errno is set. 6894 */ 6895 int 6896 mlx5_flow_start_default(struct rte_eth_dev *dev) 6897 { 6898 struct rte_flow_error error; 6899 6900 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6901 return flow_mreg_add_default_copy_action(dev, &error); 6902 } 6903 6904 /** 6905 * Release key of thread specific flow workspace data. 6906 */ 6907 void 6908 flow_release_workspace(void *data) 6909 { 6910 struct mlx5_flow_workspace *wks = data; 6911 struct mlx5_flow_workspace *next; 6912 6913 while (wks) { 6914 next = wks->next; 6915 free(wks->rss_desc.queue); 6916 free(wks); 6917 wks = next; 6918 } 6919 } 6920 6921 /** 6922 * Get thread specific current flow workspace. 6923 * 6924 * @return pointer to thread specific flow workspace data, NULL on error. 6925 */ 6926 struct mlx5_flow_workspace* 6927 mlx5_flow_get_thread_workspace(void) 6928 { 6929 struct mlx5_flow_workspace *data; 6930 6931 data = mlx5_flow_os_get_specific_workspace(); 6932 MLX5_ASSERT(data && data->inuse); 6933 if (!data || !data->inuse) 6934 DRV_LOG(ERR, "flow workspace not initialized."); 6935 return data; 6936 } 6937 6938 /** 6939 * Allocate and init new flow workspace. 6940 * 6941 * @return pointer to flow workspace data, NULL on error. 6942 */ 6943 static struct mlx5_flow_workspace* 6944 flow_alloc_thread_workspace(void) 6945 { 6946 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data)); 6947 6948 if (!data) { 6949 DRV_LOG(ERR, "Failed to allocate flow workspace " 6950 "memory."); 6951 return NULL; 6952 } 6953 data->rss_desc.queue = calloc(1, 6954 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6955 if (!data->rss_desc.queue) 6956 goto err; 6957 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM; 6958 return data; 6959 err: 6960 if (data->rss_desc.queue) 6961 free(data->rss_desc.queue); 6962 free(data); 6963 return NULL; 6964 } 6965 6966 /** 6967 * Get new thread specific flow workspace. 6968 * 6969 * If current workspace inuse, create new one and set as current. 6970 * 6971 * @return pointer to thread specific flow workspace data, NULL on error. 6972 */ 6973 static struct mlx5_flow_workspace* 6974 mlx5_flow_push_thread_workspace(void) 6975 { 6976 struct mlx5_flow_workspace *curr; 6977 struct mlx5_flow_workspace *data; 6978 6979 curr = mlx5_flow_os_get_specific_workspace(); 6980 if (!curr) { 6981 data = flow_alloc_thread_workspace(); 6982 if (!data) 6983 return NULL; 6984 } else if (!curr->inuse) { 6985 data = curr; 6986 } else if (curr->next) { 6987 data = curr->next; 6988 } else { 6989 data = flow_alloc_thread_workspace(); 6990 if (!data) 6991 return NULL; 6992 curr->next = data; 6993 data->prev = curr; 6994 } 6995 data->inuse = 1; 6996 data->flow_idx = 0; 6997 /* Set as current workspace */ 6998 if (mlx5_flow_os_set_specific_workspace(data)) 6999 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 7000 return data; 7001 } 7002 7003 /** 7004 * Close current thread specific flow workspace. 7005 * 7006 * If previous workspace available, set it as current. 7007 * 7008 * @return pointer to thread specific flow workspace data, NULL on error. 7009 */ 7010 static void 7011 mlx5_flow_pop_thread_workspace(void) 7012 { 7013 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace(); 7014 7015 if (!data) 7016 return; 7017 if (!data->inuse) { 7018 DRV_LOG(ERR, "Failed to close unused flow workspace."); 7019 return; 7020 } 7021 data->inuse = 0; 7022 if (!data->prev) 7023 return; 7024 if (mlx5_flow_os_set_specific_workspace(data->prev)) 7025 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 7026 } 7027 7028 /** 7029 * Verify the flow list is empty 7030 * 7031 * @param dev 7032 * Pointer to Ethernet device. 7033 * 7034 * @return the number of flows not released. 7035 */ 7036 int 7037 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused) 7038 { 7039 struct mlx5_priv *priv = dev->data->dev_private; 7040 struct rte_flow *flow; 7041 uint32_t idx = 0; 7042 int ret = 0, i; 7043 7044 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 7045 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) { 7046 DRV_LOG(DEBUG, "port %u flow %p still referenced", 7047 dev->data->port_id, (void *)flow); 7048 ret++; 7049 } 7050 } 7051 return ret; 7052 } 7053 7054 /** 7055 * Enable default hairpin egress flow. 7056 * 7057 * @param dev 7058 * Pointer to Ethernet device. 7059 * @param queue 7060 * The queue index. 7061 * 7062 * @return 7063 * 0 on success, a negative errno value otherwise and rte_errno is set. 7064 */ 7065 int 7066 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 7067 uint32_t queue) 7068 { 7069 const struct rte_flow_attr attr = { 7070 .egress = 1, 7071 .priority = 0, 7072 }; 7073 struct mlx5_rte_flow_item_tx_queue queue_spec = { 7074 .queue = queue, 7075 }; 7076 struct mlx5_rte_flow_item_tx_queue queue_mask = { 7077 .queue = UINT32_MAX, 7078 }; 7079 struct rte_flow_item items[] = { 7080 { 7081 .type = (enum rte_flow_item_type) 7082 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 7083 .spec = &queue_spec, 7084 .last = NULL, 7085 .mask = &queue_mask, 7086 }, 7087 { 7088 .type = RTE_FLOW_ITEM_TYPE_END, 7089 }, 7090 }; 7091 struct rte_flow_action_jump jump = { 7092 .group = MLX5_HAIRPIN_TX_TABLE, 7093 }; 7094 struct rte_flow_action actions[2]; 7095 uint32_t flow_idx; 7096 struct rte_flow_error error; 7097 7098 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 7099 actions[0].conf = &jump; 7100 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 7101 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 7102 &attr, items, actions, false, &error); 7103 if (!flow_idx) { 7104 DRV_LOG(DEBUG, 7105 "Failed to create ctrl flow: rte_errno(%d)," 7106 " type(%d), message(%s)", 7107 rte_errno, error.type, 7108 error.message ? error.message : " (no stated reason)"); 7109 return -rte_errno; 7110 } 7111 return 0; 7112 } 7113 7114 /** 7115 * Enable a control flow configured from the control plane. 7116 * 7117 * @param dev 7118 * Pointer to Ethernet device. 7119 * @param eth_spec 7120 * An Ethernet flow spec to apply. 7121 * @param eth_mask 7122 * An Ethernet flow mask to apply. 7123 * @param vlan_spec 7124 * A VLAN flow spec to apply. 7125 * @param vlan_mask 7126 * A VLAN flow mask to apply. 7127 * 7128 * @return 7129 * 0 on success, a negative errno value otherwise and rte_errno is set. 7130 */ 7131 int 7132 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 7133 struct rte_flow_item_eth *eth_spec, 7134 struct rte_flow_item_eth *eth_mask, 7135 struct rte_flow_item_vlan *vlan_spec, 7136 struct rte_flow_item_vlan *vlan_mask) 7137 { 7138 struct mlx5_priv *priv = dev->data->dev_private; 7139 const struct rte_flow_attr attr = { 7140 .ingress = 1, 7141 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 7142 }; 7143 struct rte_flow_item items[] = { 7144 { 7145 .type = RTE_FLOW_ITEM_TYPE_ETH, 7146 .spec = eth_spec, 7147 .last = NULL, 7148 .mask = eth_mask, 7149 }, 7150 { 7151 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 7152 RTE_FLOW_ITEM_TYPE_END, 7153 .spec = vlan_spec, 7154 .last = NULL, 7155 .mask = vlan_mask, 7156 }, 7157 { 7158 .type = RTE_FLOW_ITEM_TYPE_END, 7159 }, 7160 }; 7161 uint16_t queue[priv->reta_idx_n]; 7162 struct rte_flow_action_rss action_rss = { 7163 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 7164 .level = 0, 7165 .types = priv->rss_conf.rss_hf, 7166 .key_len = priv->rss_conf.rss_key_len, 7167 .queue_num = priv->reta_idx_n, 7168 .key = priv->rss_conf.rss_key, 7169 .queue = queue, 7170 }; 7171 struct rte_flow_action actions[] = { 7172 { 7173 .type = RTE_FLOW_ACTION_TYPE_RSS, 7174 .conf = &action_rss, 7175 }, 7176 { 7177 .type = RTE_FLOW_ACTION_TYPE_END, 7178 }, 7179 }; 7180 uint32_t flow_idx; 7181 struct rte_flow_error error; 7182 unsigned int i; 7183 7184 if (!priv->reta_idx_n || !priv->rxqs_n) { 7185 return 0; 7186 } 7187 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) 7188 action_rss.types = 0; 7189 for (i = 0; i != priv->reta_idx_n; ++i) 7190 queue[i] = (*priv->reta_idx)[i]; 7191 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 7192 &attr, items, actions, false, &error); 7193 if (!flow_idx) 7194 return -rte_errno; 7195 return 0; 7196 } 7197 7198 /** 7199 * Enable a flow control configured from the control plane. 7200 * 7201 * @param dev 7202 * Pointer to Ethernet device. 7203 * @param eth_spec 7204 * An Ethernet flow spec to apply. 7205 * @param eth_mask 7206 * An Ethernet flow mask to apply. 7207 * 7208 * @return 7209 * 0 on success, a negative errno value otherwise and rte_errno is set. 7210 */ 7211 int 7212 mlx5_ctrl_flow(struct rte_eth_dev *dev, 7213 struct rte_flow_item_eth *eth_spec, 7214 struct rte_flow_item_eth *eth_mask) 7215 { 7216 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 7217 } 7218 7219 /** 7220 * Create default miss flow rule matching lacp traffic 7221 * 7222 * @param dev 7223 * Pointer to Ethernet device. 7224 * @param eth_spec 7225 * An Ethernet flow spec to apply. 7226 * 7227 * @return 7228 * 0 on success, a negative errno value otherwise and rte_errno is set. 7229 */ 7230 int 7231 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 7232 { 7233 /* 7234 * The LACP matching is done by only using ether type since using 7235 * a multicast dst mac causes kernel to give low priority to this flow. 7236 */ 7237 static const struct rte_flow_item_eth lacp_spec = { 7238 .type = RTE_BE16(0x8809), 7239 }; 7240 static const struct rte_flow_item_eth lacp_mask = { 7241 .type = 0xffff, 7242 }; 7243 const struct rte_flow_attr attr = { 7244 .ingress = 1, 7245 }; 7246 struct rte_flow_item items[] = { 7247 { 7248 .type = RTE_FLOW_ITEM_TYPE_ETH, 7249 .spec = &lacp_spec, 7250 .mask = &lacp_mask, 7251 }, 7252 { 7253 .type = RTE_FLOW_ITEM_TYPE_END, 7254 }, 7255 }; 7256 struct rte_flow_action actions[] = { 7257 { 7258 .type = (enum rte_flow_action_type) 7259 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 7260 }, 7261 { 7262 .type = RTE_FLOW_ACTION_TYPE_END, 7263 }, 7264 }; 7265 struct rte_flow_error error; 7266 uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 7267 &attr, items, actions, 7268 false, &error); 7269 7270 if (!flow_idx) 7271 return -rte_errno; 7272 return 0; 7273 } 7274 7275 /** 7276 * Destroy a flow. 7277 * 7278 * @see rte_flow_destroy() 7279 * @see rte_flow_ops 7280 */ 7281 int 7282 mlx5_flow_destroy(struct rte_eth_dev *dev, 7283 struct rte_flow *flow, 7284 struct rte_flow_error *error __rte_unused) 7285 { 7286 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, 7287 (uintptr_t)(void *)flow); 7288 return 0; 7289 } 7290 7291 /** 7292 * Destroy all flows. 7293 * 7294 * @see rte_flow_flush() 7295 * @see rte_flow_ops 7296 */ 7297 int 7298 mlx5_flow_flush(struct rte_eth_dev *dev, 7299 struct rte_flow_error *error __rte_unused) 7300 { 7301 mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false); 7302 return 0; 7303 } 7304 7305 /** 7306 * Isolated mode. 7307 * 7308 * @see rte_flow_isolate() 7309 * @see rte_flow_ops 7310 */ 7311 int 7312 mlx5_flow_isolate(struct rte_eth_dev *dev, 7313 int enable, 7314 struct rte_flow_error *error) 7315 { 7316 struct mlx5_priv *priv = dev->data->dev_private; 7317 7318 if (dev->data->dev_started) { 7319 rte_flow_error_set(error, EBUSY, 7320 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7321 NULL, 7322 "port must be stopped first"); 7323 return -rte_errno; 7324 } 7325 priv->isolated = !!enable; 7326 if (enable) 7327 dev->dev_ops = &mlx5_dev_ops_isolate; 7328 else 7329 dev->dev_ops = &mlx5_dev_ops; 7330 7331 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 7332 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 7333 7334 return 0; 7335 } 7336 7337 /** 7338 * Query a flow. 7339 * 7340 * @see rte_flow_query() 7341 * @see rte_flow_ops 7342 */ 7343 static int 7344 flow_drv_query(struct rte_eth_dev *dev, 7345 uint32_t flow_idx, 7346 const struct rte_flow_action *actions, 7347 void *data, 7348 struct rte_flow_error *error) 7349 { 7350 struct mlx5_priv *priv = dev->data->dev_private; 7351 const struct mlx5_flow_driver_ops *fops; 7352 struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 7353 flow_idx); 7354 enum mlx5_flow_drv_type ftype; 7355 7356 if (!flow) { 7357 return rte_flow_error_set(error, ENOENT, 7358 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7359 NULL, 7360 "invalid flow handle"); 7361 } 7362 ftype = flow->drv_type; 7363 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 7364 fops = flow_get_drv_ops(ftype); 7365 7366 return fops->query(dev, flow, actions, data, error); 7367 } 7368 7369 /** 7370 * Query a flow. 7371 * 7372 * @see rte_flow_query() 7373 * @see rte_flow_ops 7374 */ 7375 int 7376 mlx5_flow_query(struct rte_eth_dev *dev, 7377 struct rte_flow *flow, 7378 const struct rte_flow_action *actions, 7379 void *data, 7380 struct rte_flow_error *error) 7381 { 7382 int ret; 7383 7384 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 7385 error); 7386 if (ret < 0) 7387 return ret; 7388 return 0; 7389 } 7390 7391 /** 7392 * Get rte_flow callbacks. 7393 * 7394 * @param dev 7395 * Pointer to Ethernet device structure. 7396 * @param ops 7397 * Pointer to operation-specific structure. 7398 * 7399 * @return 0 7400 */ 7401 int 7402 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 7403 const struct rte_flow_ops **ops) 7404 { 7405 *ops = &mlx5_flow_ops; 7406 return 0; 7407 } 7408 7409 /** 7410 * Validate meter policy actions. 7411 * Dispatcher for action type specific validation. 7412 * 7413 * @param[in] dev 7414 * Pointer to the Ethernet device structure. 7415 * @param[in] action 7416 * The meter policy action object to validate. 7417 * @param[in] attr 7418 * Attributes of flow to determine steering domain. 7419 * @param[out] is_rss 7420 * Is RSS or not. 7421 * @param[out] domain_bitmap 7422 * Domain bitmap. 7423 * @param[out] is_def_policy 7424 * Is default policy or not. 7425 * @param[out] error 7426 * Perform verbose error reporting if not NULL. Initialized in case of 7427 * error only. 7428 * 7429 * @return 7430 * 0 on success, otherwise negative errno value. 7431 */ 7432 int 7433 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev, 7434 const struct rte_flow_action *actions[RTE_COLORS], 7435 struct rte_flow_attr *attr, 7436 bool *is_rss, 7437 uint8_t *domain_bitmap, 7438 uint8_t *policy_mode, 7439 struct rte_mtr_error *error) 7440 { 7441 const struct mlx5_flow_driver_ops *fops; 7442 7443 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7444 return fops->validate_mtr_acts(dev, actions, attr, is_rss, 7445 domain_bitmap, policy_mode, error); 7446 } 7447 7448 /** 7449 * Destroy the meter table set. 7450 * 7451 * @param[in] dev 7452 * Pointer to Ethernet device. 7453 * @param[in] mtr_policy 7454 * Meter policy struct. 7455 */ 7456 void 7457 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev, 7458 struct mlx5_flow_meter_policy *mtr_policy) 7459 { 7460 const struct mlx5_flow_driver_ops *fops; 7461 7462 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7463 fops->destroy_mtr_acts(dev, mtr_policy); 7464 } 7465 7466 /** 7467 * Create policy action, lock free, 7468 * (mutex should be acquired by caller). 7469 * Dispatcher for action type specific call. 7470 * 7471 * @param[in] dev 7472 * Pointer to the Ethernet device structure. 7473 * @param[in] mtr_policy 7474 * Meter policy struct. 7475 * @param[in] action 7476 * Action specification used to create meter actions. 7477 * @param[out] error 7478 * Perform verbose error reporting if not NULL. Initialized in case of 7479 * error only. 7480 * 7481 * @return 7482 * 0 on success, otherwise negative errno value. 7483 */ 7484 int 7485 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, 7486 struct mlx5_flow_meter_policy *mtr_policy, 7487 const struct rte_flow_action *actions[RTE_COLORS], 7488 struct rte_mtr_error *error) 7489 { 7490 const struct mlx5_flow_driver_ops *fops; 7491 7492 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7493 return fops->create_mtr_acts(dev, mtr_policy, actions, error); 7494 } 7495 7496 /** 7497 * Create policy rules, lock free, 7498 * (mutex should be acquired by caller). 7499 * Dispatcher for action type specific call. 7500 * 7501 * @param[in] dev 7502 * Pointer to the Ethernet device structure. 7503 * @param[in] mtr_policy 7504 * Meter policy struct. 7505 * 7506 * @return 7507 * 0 on success, -1 otherwise. 7508 */ 7509 int 7510 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev, 7511 struct mlx5_flow_meter_policy *mtr_policy) 7512 { 7513 const struct mlx5_flow_driver_ops *fops; 7514 7515 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7516 return fops->create_policy_rules(dev, mtr_policy); 7517 } 7518 7519 /** 7520 * Destroy policy rules, lock free, 7521 * (mutex should be acquired by caller). 7522 * Dispatcher for action type specific call. 7523 * 7524 * @param[in] dev 7525 * Pointer to the Ethernet device structure. 7526 * @param[in] mtr_policy 7527 * Meter policy struct. 7528 */ 7529 void 7530 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev, 7531 struct mlx5_flow_meter_policy *mtr_policy) 7532 { 7533 const struct mlx5_flow_driver_ops *fops; 7534 7535 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7536 fops->destroy_policy_rules(dev, mtr_policy); 7537 } 7538 7539 /** 7540 * Destroy the default policy table set. 7541 * 7542 * @param[in] dev 7543 * Pointer to Ethernet device. 7544 */ 7545 void 7546 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev) 7547 { 7548 const struct mlx5_flow_driver_ops *fops; 7549 7550 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7551 fops->destroy_def_policy(dev); 7552 } 7553 7554 /** 7555 * Destroy the default policy table set. 7556 * 7557 * @param[in] dev 7558 * Pointer to Ethernet device. 7559 * 7560 * @return 7561 * 0 on success, -1 otherwise. 7562 */ 7563 int 7564 mlx5_flow_create_def_policy(struct rte_eth_dev *dev) 7565 { 7566 const struct mlx5_flow_driver_ops *fops; 7567 7568 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7569 return fops->create_def_policy(dev); 7570 } 7571 7572 /** 7573 * Create the needed meter and suffix tables. 7574 * 7575 * @param[in] dev 7576 * Pointer to Ethernet device. 7577 * 7578 * @return 7579 * 0 on success, -1 otherwise. 7580 */ 7581 int 7582 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 7583 struct mlx5_flow_meter_info *fm, 7584 uint32_t mtr_idx, 7585 uint8_t domain_bitmap) 7586 { 7587 const struct mlx5_flow_driver_ops *fops; 7588 7589 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7590 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap); 7591 } 7592 7593 /** 7594 * Destroy the meter table set. 7595 * 7596 * @param[in] dev 7597 * Pointer to Ethernet device. 7598 * @param[in] tbl 7599 * Pointer to the meter table set. 7600 */ 7601 void 7602 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 7603 struct mlx5_flow_meter_info *fm) 7604 { 7605 const struct mlx5_flow_driver_ops *fops; 7606 7607 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7608 fops->destroy_mtr_tbls(dev, fm); 7609 } 7610 7611 /** 7612 * Destroy the global meter drop table. 7613 * 7614 * @param[in] dev 7615 * Pointer to Ethernet device. 7616 */ 7617 void 7618 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev) 7619 { 7620 const struct mlx5_flow_driver_ops *fops; 7621 7622 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7623 fops->destroy_mtr_drop_tbls(dev); 7624 } 7625 7626 /** 7627 * Destroy the sub policy table with RX queue. 7628 * 7629 * @param[in] dev 7630 * Pointer to Ethernet device. 7631 * @param[in] mtr_policy 7632 * Pointer to meter policy table. 7633 */ 7634 void 7635 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev, 7636 struct mlx5_flow_meter_policy *mtr_policy) 7637 { 7638 const struct mlx5_flow_driver_ops *fops; 7639 7640 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7641 fops->destroy_sub_policy_with_rxq(dev, mtr_policy); 7642 } 7643 7644 /** 7645 * Allocate the needed aso flow meter id. 7646 * 7647 * @param[in] dev 7648 * Pointer to Ethernet device. 7649 * 7650 * @return 7651 * Index to aso flow meter on success, NULL otherwise. 7652 */ 7653 uint32_t 7654 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev) 7655 { 7656 const struct mlx5_flow_driver_ops *fops; 7657 7658 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7659 return fops->create_meter(dev); 7660 } 7661 7662 /** 7663 * Free the aso flow meter id. 7664 * 7665 * @param[in] dev 7666 * Pointer to Ethernet device. 7667 * @param[in] mtr_idx 7668 * Index to aso flow meter to be free. 7669 * 7670 * @return 7671 * 0 on success. 7672 */ 7673 void 7674 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx) 7675 { 7676 const struct mlx5_flow_driver_ops *fops; 7677 7678 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7679 fops->free_meter(dev, mtr_idx); 7680 } 7681 7682 /** 7683 * Allocate a counter. 7684 * 7685 * @param[in] dev 7686 * Pointer to Ethernet device structure. 7687 * 7688 * @return 7689 * Index to allocated counter on success, 0 otherwise. 7690 */ 7691 uint32_t 7692 mlx5_counter_alloc(struct rte_eth_dev *dev) 7693 { 7694 const struct mlx5_flow_driver_ops *fops; 7695 struct rte_flow_attr attr = { .transfer = 0 }; 7696 7697 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7698 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7699 return fops->counter_alloc(dev); 7700 } 7701 DRV_LOG(ERR, 7702 "port %u counter allocate is not supported.", 7703 dev->data->port_id); 7704 return 0; 7705 } 7706 7707 /** 7708 * Free a counter. 7709 * 7710 * @param[in] dev 7711 * Pointer to Ethernet device structure. 7712 * @param[in] cnt 7713 * Index to counter to be free. 7714 */ 7715 void 7716 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 7717 { 7718 const struct mlx5_flow_driver_ops *fops; 7719 struct rte_flow_attr attr = { .transfer = 0 }; 7720 7721 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7722 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7723 fops->counter_free(dev, cnt); 7724 return; 7725 } 7726 DRV_LOG(ERR, 7727 "port %u counter free is not supported.", 7728 dev->data->port_id); 7729 } 7730 7731 /** 7732 * Query counter statistics. 7733 * 7734 * @param[in] dev 7735 * Pointer to Ethernet device structure. 7736 * @param[in] cnt 7737 * Index to counter to query. 7738 * @param[in] clear 7739 * Set to clear counter statistics. 7740 * @param[out] pkts 7741 * The counter hits packets number to save. 7742 * @param[out] bytes 7743 * The counter hits bytes number to save. 7744 * 7745 * @return 7746 * 0 on success, a negative errno value otherwise. 7747 */ 7748 int 7749 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 7750 bool clear, uint64_t *pkts, uint64_t *bytes) 7751 { 7752 const struct mlx5_flow_driver_ops *fops; 7753 struct rte_flow_attr attr = { .transfer = 0 }; 7754 7755 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7756 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7757 return fops->counter_query(dev, cnt, clear, pkts, bytes); 7758 } 7759 DRV_LOG(ERR, 7760 "port %u counter query is not supported.", 7761 dev->data->port_id); 7762 return -ENOTSUP; 7763 } 7764 7765 /** 7766 * Allocate a new memory for the counter values wrapped by all the needed 7767 * management. 7768 * 7769 * @param[in] sh 7770 * Pointer to mlx5_dev_ctx_shared object. 7771 * 7772 * @return 7773 * 0 on success, a negative errno value otherwise. 7774 */ 7775 static int 7776 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 7777 { 7778 struct mlx5_devx_mkey_attr mkey_attr; 7779 struct mlx5_counter_stats_mem_mng *mem_mng; 7780 volatile struct flow_counter_stats *raw_data; 7781 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 7782 int size = (sizeof(struct flow_counter_stats) * 7783 MLX5_COUNTERS_PER_POOL + 7784 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 7785 sizeof(struct mlx5_counter_stats_mem_mng); 7786 size_t pgsize = rte_mem_page_size(); 7787 uint8_t *mem; 7788 int i; 7789 7790 if (pgsize == (size_t)-1) { 7791 DRV_LOG(ERR, "Failed to get mem page size"); 7792 rte_errno = ENOMEM; 7793 return -ENOMEM; 7794 } 7795 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 7796 if (!mem) { 7797 rte_errno = ENOMEM; 7798 return -ENOMEM; 7799 } 7800 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 7801 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 7802 mem_mng->umem = mlx5_os_umem_reg(sh->cdev->ctx, mem, size, 7803 IBV_ACCESS_LOCAL_WRITE); 7804 if (!mem_mng->umem) { 7805 rte_errno = errno; 7806 mlx5_free(mem); 7807 return -rte_errno; 7808 } 7809 memset(&mkey_attr, 0, sizeof(mkey_attr)); 7810 mkey_attr.addr = (uintptr_t)mem; 7811 mkey_attr.size = size; 7812 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem); 7813 mkey_attr.pd = sh->cdev->pdn; 7814 mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write; 7815 mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read; 7816 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->cdev->ctx, &mkey_attr); 7817 if (!mem_mng->dm) { 7818 mlx5_os_umem_dereg(mem_mng->umem); 7819 rte_errno = errno; 7820 mlx5_free(mem); 7821 return -rte_errno; 7822 } 7823 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 7824 raw_data = (volatile struct flow_counter_stats *)mem; 7825 for (i = 0; i < raws_n; ++i) { 7826 mem_mng->raws[i].mem_mng = mem_mng; 7827 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 7828 } 7829 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 7830 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 7831 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 7832 next); 7833 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 7834 sh->cmng.mem_mng = mem_mng; 7835 return 0; 7836 } 7837 7838 /** 7839 * Set the statistic memory to the new counter pool. 7840 * 7841 * @param[in] sh 7842 * Pointer to mlx5_dev_ctx_shared object. 7843 * @param[in] pool 7844 * Pointer to the pool to set the statistic memory. 7845 * 7846 * @return 7847 * 0 on success, a negative errno value otherwise. 7848 */ 7849 static int 7850 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 7851 struct mlx5_flow_counter_pool *pool) 7852 { 7853 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7854 /* Resize statistic memory once used out. */ 7855 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 7856 mlx5_flow_create_counter_stat_mem_mng(sh)) { 7857 DRV_LOG(ERR, "Cannot resize counter stat mem."); 7858 return -1; 7859 } 7860 rte_spinlock_lock(&pool->sl); 7861 pool->raw = cmng->mem_mng->raws + pool->index % 7862 MLX5_CNT_CONTAINER_RESIZE; 7863 rte_spinlock_unlock(&pool->sl); 7864 pool->raw_hw = NULL; 7865 return 0; 7866 } 7867 7868 #define MLX5_POOL_QUERY_FREQ_US 1000000 7869 7870 /** 7871 * Set the periodic procedure for triggering asynchronous batch queries for all 7872 * the counter pools. 7873 * 7874 * @param[in] sh 7875 * Pointer to mlx5_dev_ctx_shared object. 7876 */ 7877 void 7878 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 7879 { 7880 uint32_t pools_n, us; 7881 7882 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 7883 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 7884 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 7885 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 7886 sh->cmng.query_thread_on = 0; 7887 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 7888 } else { 7889 sh->cmng.query_thread_on = 1; 7890 } 7891 } 7892 7893 /** 7894 * The periodic procedure for triggering asynchronous batch queries for all the 7895 * counter pools. This function is probably called by the host thread. 7896 * 7897 * @param[in] arg 7898 * The parameter for the alarm process. 7899 */ 7900 void 7901 mlx5_flow_query_alarm(void *arg) 7902 { 7903 struct mlx5_dev_ctx_shared *sh = arg; 7904 int ret; 7905 uint16_t pool_index = sh->cmng.pool_index; 7906 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7907 struct mlx5_flow_counter_pool *pool; 7908 uint16_t n_valid; 7909 7910 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 7911 goto set_alarm; 7912 rte_spinlock_lock(&cmng->pool_update_sl); 7913 pool = cmng->pools[pool_index]; 7914 n_valid = cmng->n_valid; 7915 rte_spinlock_unlock(&cmng->pool_update_sl); 7916 /* Set the statistic memory to the new created pool. */ 7917 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 7918 goto set_alarm; 7919 if (pool->raw_hw) 7920 /* There is a pool query in progress. */ 7921 goto set_alarm; 7922 pool->raw_hw = 7923 LIST_FIRST(&sh->cmng.free_stat_raws); 7924 if (!pool->raw_hw) 7925 /* No free counter statistics raw memory. */ 7926 goto set_alarm; 7927 /* 7928 * Identify the counters released between query trigger and query 7929 * handle more efficiently. The counter released in this gap period 7930 * should wait for a new round of query as the new arrived packets 7931 * will not be taken into account. 7932 */ 7933 pool->query_gen++; 7934 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 7935 MLX5_COUNTERS_PER_POOL, 7936 NULL, NULL, 7937 pool->raw_hw->mem_mng->dm->id, 7938 (void *)(uintptr_t) 7939 pool->raw_hw->data, 7940 sh->devx_comp, 7941 (uint64_t)(uintptr_t)pool); 7942 if (ret) { 7943 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 7944 " %d", pool->min_dcs->id); 7945 pool->raw_hw = NULL; 7946 goto set_alarm; 7947 } 7948 LIST_REMOVE(pool->raw_hw, next); 7949 sh->cmng.pending_queries++; 7950 pool_index++; 7951 if (pool_index >= n_valid) 7952 pool_index = 0; 7953 set_alarm: 7954 sh->cmng.pool_index = pool_index; 7955 mlx5_set_query_alarm(sh); 7956 } 7957 7958 /** 7959 * Check and callback event for new aged flow in the counter pool 7960 * 7961 * @param[in] sh 7962 * Pointer to mlx5_dev_ctx_shared object. 7963 * @param[in] pool 7964 * Pointer to Current counter pool. 7965 */ 7966 static void 7967 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 7968 struct mlx5_flow_counter_pool *pool) 7969 { 7970 struct mlx5_priv *priv; 7971 struct mlx5_flow_counter *cnt; 7972 struct mlx5_age_info *age_info; 7973 struct mlx5_age_param *age_param; 7974 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 7975 struct mlx5_counter_stats_raw *prev = pool->raw; 7976 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 7977 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 7978 uint16_t expected = AGE_CANDIDATE; 7979 uint32_t i; 7980 7981 pool->time_of_last_age_check = curr_time; 7982 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 7983 cnt = MLX5_POOL_GET_CNT(pool, i); 7984 age_param = MLX5_CNT_TO_AGE(cnt); 7985 if (__atomic_load_n(&age_param->state, 7986 __ATOMIC_RELAXED) != AGE_CANDIDATE) 7987 continue; 7988 if (cur->data[i].hits != prev->data[i].hits) { 7989 __atomic_store_n(&age_param->sec_since_last_hit, 0, 7990 __ATOMIC_RELAXED); 7991 continue; 7992 } 7993 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 7994 time_delta, 7995 __ATOMIC_RELAXED) <= age_param->timeout) 7996 continue; 7997 /** 7998 * Hold the lock first, or if between the 7999 * state AGE_TMOUT and tailq operation the 8000 * release happened, the release procedure 8001 * may delete a non-existent tailq node. 8002 */ 8003 priv = rte_eth_devices[age_param->port_id].data->dev_private; 8004 age_info = GET_PORT_AGE_INFO(priv); 8005 rte_spinlock_lock(&age_info->aged_sl); 8006 if (__atomic_compare_exchange_n(&age_param->state, &expected, 8007 AGE_TMOUT, false, 8008 __ATOMIC_RELAXED, 8009 __ATOMIC_RELAXED)) { 8010 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 8011 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 8012 } 8013 rte_spinlock_unlock(&age_info->aged_sl); 8014 } 8015 mlx5_age_event_prepare(sh); 8016 } 8017 8018 /** 8019 * Handler for the HW respond about ready values from an asynchronous batch 8020 * query. This function is probably called by the host thread. 8021 * 8022 * @param[in] sh 8023 * The pointer to the shared device context. 8024 * @param[in] async_id 8025 * The Devx async ID. 8026 * @param[in] status 8027 * The status of the completion. 8028 */ 8029 void 8030 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 8031 uint64_t async_id, int status) 8032 { 8033 struct mlx5_flow_counter_pool *pool = 8034 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 8035 struct mlx5_counter_stats_raw *raw_to_free; 8036 uint8_t query_gen = pool->query_gen ^ 1; 8037 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 8038 enum mlx5_counter_type cnt_type = 8039 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 8040 MLX5_COUNTER_TYPE_ORIGIN; 8041 8042 if (unlikely(status)) { 8043 raw_to_free = pool->raw_hw; 8044 } else { 8045 raw_to_free = pool->raw; 8046 if (pool->is_aged) 8047 mlx5_flow_aging_check(sh, pool); 8048 rte_spinlock_lock(&pool->sl); 8049 pool->raw = pool->raw_hw; 8050 rte_spinlock_unlock(&pool->sl); 8051 /* Be sure the new raw counters data is updated in memory. */ 8052 rte_io_wmb(); 8053 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 8054 rte_spinlock_lock(&cmng->csl[cnt_type]); 8055 TAILQ_CONCAT(&cmng->counters[cnt_type], 8056 &pool->counters[query_gen], next); 8057 rte_spinlock_unlock(&cmng->csl[cnt_type]); 8058 } 8059 } 8060 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 8061 pool->raw_hw = NULL; 8062 sh->cmng.pending_queries--; 8063 } 8064 8065 static int 8066 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 8067 const struct flow_grp_info *grp_info, 8068 struct rte_flow_error *error) 8069 { 8070 if (grp_info->transfer && grp_info->external && 8071 grp_info->fdb_def_rule) { 8072 if (group == UINT32_MAX) 8073 return rte_flow_error_set 8074 (error, EINVAL, 8075 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 8076 NULL, 8077 "group index not supported"); 8078 *table = group + 1; 8079 } else { 8080 *table = group; 8081 } 8082 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 8083 return 0; 8084 } 8085 8086 /** 8087 * Translate the rte_flow group index to HW table value. 8088 * 8089 * If tunnel offload is disabled, all group ids converted to flow table 8090 * id using the standard method. 8091 * If tunnel offload is enabled, group id can be converted using the 8092 * standard or tunnel conversion method. Group conversion method 8093 * selection depends on flags in `grp_info` parameter: 8094 * - Internal (grp_info.external == 0) groups conversion uses the 8095 * standard method. 8096 * - Group ids in JUMP action converted with the tunnel conversion. 8097 * - Group id in rule attribute conversion depends on a rule type and 8098 * group id value: 8099 * ** non zero group attributes converted with the tunnel method 8100 * ** zero group attribute in non-tunnel rule is converted using the 8101 * standard method - there's only one root table 8102 * ** zero group attribute in steer tunnel rule is converted with the 8103 * standard method - single root table 8104 * ** zero group attribute in match tunnel rule is a special OvS 8105 * case: that value is used for portability reasons. That group 8106 * id is converted with the tunnel conversion method. 8107 * 8108 * @param[in] dev 8109 * Port device 8110 * @param[in] tunnel 8111 * PMD tunnel offload object 8112 * @param[in] group 8113 * rte_flow group index value. 8114 * @param[out] table 8115 * HW table value. 8116 * @param[in] grp_info 8117 * flags used for conversion 8118 * @param[out] error 8119 * Pointer to error structure. 8120 * 8121 * @return 8122 * 0 on success, a negative errno value otherwise and rte_errno is set. 8123 */ 8124 int 8125 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 8126 const struct mlx5_flow_tunnel *tunnel, 8127 uint32_t group, uint32_t *table, 8128 const struct flow_grp_info *grp_info, 8129 struct rte_flow_error *error) 8130 { 8131 int ret; 8132 bool standard_translation; 8133 8134 if (!grp_info->skip_scale && grp_info->external && 8135 group < MLX5_MAX_TABLES_EXTERNAL) 8136 group *= MLX5_FLOW_TABLE_FACTOR; 8137 if (is_tunnel_offload_active(dev)) { 8138 standard_translation = !grp_info->external || 8139 grp_info->std_tbl_fix; 8140 } else { 8141 standard_translation = true; 8142 } 8143 DRV_LOG(DEBUG, 8144 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s", 8145 dev->data->port_id, group, grp_info->transfer, 8146 grp_info->external, grp_info->fdb_def_rule, 8147 standard_translation ? "STANDARD" : "TUNNEL"); 8148 if (standard_translation) 8149 ret = flow_group_to_table(dev->data->port_id, group, table, 8150 grp_info, error); 8151 else 8152 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 8153 table, error); 8154 8155 return ret; 8156 } 8157 8158 /** 8159 * Discover availability of metadata reg_c's. 8160 * 8161 * Iteratively use test flows to check availability. 8162 * 8163 * @param[in] dev 8164 * Pointer to the Ethernet device structure. 8165 * 8166 * @return 8167 * 0 on success, a negative errno value otherwise and rte_errno is set. 8168 */ 8169 int 8170 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 8171 { 8172 struct mlx5_priv *priv = dev->data->dev_private; 8173 enum modify_reg idx; 8174 int n = 0; 8175 8176 /* reg_c[0] and reg_c[1] are reserved. */ 8177 priv->sh->flow_mreg_c[n++] = REG_C_0; 8178 priv->sh->flow_mreg_c[n++] = REG_C_1; 8179 /* Discover availability of other reg_c's. */ 8180 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 8181 struct rte_flow_attr attr = { 8182 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 8183 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 8184 .ingress = 1, 8185 }; 8186 struct rte_flow_item items[] = { 8187 [0] = { 8188 .type = RTE_FLOW_ITEM_TYPE_END, 8189 }, 8190 }; 8191 struct rte_flow_action actions[] = { 8192 [0] = { 8193 .type = (enum rte_flow_action_type) 8194 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 8195 .conf = &(struct mlx5_flow_action_copy_mreg){ 8196 .src = REG_C_1, 8197 .dst = idx, 8198 }, 8199 }, 8200 [1] = { 8201 .type = RTE_FLOW_ACTION_TYPE_JUMP, 8202 .conf = &(struct rte_flow_action_jump){ 8203 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 8204 }, 8205 }, 8206 [2] = { 8207 .type = RTE_FLOW_ACTION_TYPE_END, 8208 }, 8209 }; 8210 uint32_t flow_idx; 8211 struct rte_flow *flow; 8212 struct rte_flow_error error; 8213 8214 if (!priv->config.dv_flow_en) 8215 break; 8216 /* Create internal flow, validation skips copy action. */ 8217 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr, 8218 items, actions, false, &error); 8219 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 8220 flow_idx); 8221 if (!flow) 8222 continue; 8223 priv->sh->flow_mreg_c[n++] = idx; 8224 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx); 8225 } 8226 for (; n < MLX5_MREG_C_NUM; ++n) 8227 priv->sh->flow_mreg_c[n] = REG_NON; 8228 priv->sh->metadata_regc_check_flag = 1; 8229 return 0; 8230 } 8231 8232 int 8233 save_dump_file(const uint8_t *data, uint32_t size, 8234 uint32_t type, uint64_t id, void *arg, FILE *file) 8235 { 8236 char line[BUF_SIZE]; 8237 uint32_t out = 0; 8238 uint32_t k; 8239 uint32_t actions_num; 8240 struct rte_flow_query_count *count; 8241 8242 memset(line, 0, BUF_SIZE); 8243 switch (type) { 8244 case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR: 8245 actions_num = *(uint32_t *)(arg); 8246 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,", 8247 type, id, actions_num); 8248 break; 8249 case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT: 8250 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",", 8251 type, id); 8252 break; 8253 case DR_DUMP_REC_TYPE_PMD_COUNTER: 8254 count = (struct rte_flow_query_count *)arg; 8255 fprintf(file, 8256 "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n", 8257 type, id, count->hits, count->bytes); 8258 return 0; 8259 default: 8260 return -1; 8261 } 8262 8263 for (k = 0; k < size; k++) { 8264 /* Make sure we do not overrun the line buffer length. */ 8265 if (out >= BUF_SIZE - 4) { 8266 line[out] = '\0'; 8267 break; 8268 } 8269 out += snprintf(line + out, BUF_SIZE - out, "%02x", 8270 (data[k]) & 0xff); 8271 } 8272 fprintf(file, "%s\n", line); 8273 return 0; 8274 } 8275 8276 int 8277 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow, 8278 struct rte_flow_query_count *count, struct rte_flow_error *error) 8279 { 8280 struct rte_flow_action action[2]; 8281 enum mlx5_flow_drv_type ftype; 8282 const struct mlx5_flow_driver_ops *fops; 8283 8284 if (!flow) { 8285 return rte_flow_error_set(error, ENOENT, 8286 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8287 NULL, 8288 "invalid flow handle"); 8289 } 8290 action[0].type = RTE_FLOW_ACTION_TYPE_COUNT; 8291 action[1].type = RTE_FLOW_ACTION_TYPE_END; 8292 if (flow->counter) { 8293 memset(count, 0, sizeof(struct rte_flow_query_count)); 8294 ftype = (enum mlx5_flow_drv_type)(flow->drv_type); 8295 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && 8296 ftype < MLX5_FLOW_TYPE_MAX); 8297 fops = flow_get_drv_ops(ftype); 8298 return fops->query(dev, flow, action, count, error); 8299 } 8300 return -1; 8301 } 8302 8303 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8304 /** 8305 * Dump flow ipool data to file 8306 * 8307 * @param[in] dev 8308 * The pointer to Ethernet device. 8309 * @param[in] file 8310 * A pointer to a file for output. 8311 * @param[out] error 8312 * Perform verbose error reporting if not NULL. PMDs initialize this 8313 * structure in case of error only. 8314 * @return 8315 * 0 on success, a negative value otherwise. 8316 */ 8317 int 8318 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev, 8319 struct rte_flow *flow, FILE *file, 8320 struct rte_flow_error *error) 8321 { 8322 struct mlx5_priv *priv = dev->data->dev_private; 8323 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; 8324 struct mlx5_flow_dv_encap_decap_resource *encap_decap; 8325 uint32_t handle_idx; 8326 struct mlx5_flow_handle *dh; 8327 struct rte_flow_query_count count; 8328 uint32_t actions_num; 8329 const uint8_t *data; 8330 size_t size; 8331 uint64_t id; 8332 uint32_t type; 8333 void *action = NULL; 8334 8335 if (!flow) { 8336 return rte_flow_error_set(error, ENOENT, 8337 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8338 NULL, 8339 "invalid flow handle"); 8340 } 8341 handle_idx = flow->dev_handles; 8342 while (handle_idx) { 8343 dh = mlx5_ipool_get(priv->sh->ipool 8344 [MLX5_IPOOL_MLX5_FLOW], handle_idx); 8345 if (!dh) 8346 continue; 8347 handle_idx = dh->next.next; 8348 8349 /* query counter */ 8350 type = DR_DUMP_REC_TYPE_PMD_COUNTER; 8351 flow_dv_query_count_ptr(dev, flow->counter, 8352 &action, error); 8353 if (action) { 8354 id = (uint64_t)(uintptr_t)action; 8355 if (!mlx5_flow_query_counter(dev, flow, &count, error)) 8356 save_dump_file(NULL, 0, type, 8357 id, (void *)&count, file); 8358 } 8359 /* Get modify_hdr and encap_decap buf from ipools. */ 8360 encap_decap = NULL; 8361 modify_hdr = dh->dvh.modify_hdr; 8362 8363 if (dh->dvh.rix_encap_decap) { 8364 encap_decap = mlx5_ipool_get(priv->sh->ipool 8365 [MLX5_IPOOL_DECAP_ENCAP], 8366 dh->dvh.rix_encap_decap); 8367 } 8368 if (modify_hdr) { 8369 data = (const uint8_t *)modify_hdr->actions; 8370 size = (size_t)(modify_hdr->actions_num) * 8; 8371 id = (uint64_t)(uintptr_t)modify_hdr->action; 8372 actions_num = modify_hdr->actions_num; 8373 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR; 8374 save_dump_file(data, size, type, id, 8375 (void *)(&actions_num), file); 8376 } 8377 if (encap_decap) { 8378 data = encap_decap->buf; 8379 size = encap_decap->size; 8380 id = (uint64_t)(uintptr_t)encap_decap->action; 8381 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT; 8382 save_dump_file(data, size, type, 8383 id, NULL, file); 8384 } 8385 } 8386 return 0; 8387 } 8388 8389 /** 8390 * Dump all flow's encap_decap/modify_hdr/counter data to file 8391 * 8392 * @param[in] dev 8393 * The pointer to Ethernet device. 8394 * @param[in] file 8395 * A pointer to a file for output. 8396 * @param[out] error 8397 * Perform verbose error reporting if not NULL. PMDs initialize this 8398 * structure in case of error only. 8399 * @return 8400 * 0 on success, a negative value otherwise. 8401 */ 8402 static int 8403 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev, 8404 FILE *file, struct rte_flow_error *error) 8405 { 8406 struct mlx5_priv *priv = dev->data->dev_private; 8407 struct mlx5_dev_ctx_shared *sh = priv->sh; 8408 struct mlx5_hlist *h; 8409 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; 8410 struct mlx5_flow_dv_encap_decap_resource *encap_decap; 8411 struct rte_flow_query_count count; 8412 uint32_t actions_num; 8413 const uint8_t *data; 8414 size_t size; 8415 uint64_t id; 8416 uint32_t type; 8417 uint32_t i; 8418 uint32_t j; 8419 struct mlx5_list_inconst *l_inconst; 8420 struct mlx5_list_entry *e; 8421 int lcore_index; 8422 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng; 8423 uint32_t max; 8424 void *action; 8425 8426 /* encap_decap hlist is lcore_share, get global core cache. */ 8427 i = MLX5_LIST_GLOBAL; 8428 h = sh->encaps_decaps; 8429 if (h) { 8430 for (j = 0; j <= h->mask; j++) { 8431 l_inconst = &h->buckets[j].l; 8432 if (!l_inconst || !l_inconst->cache[i]) 8433 continue; 8434 8435 e = LIST_FIRST(&l_inconst->cache[i]->h); 8436 while (e) { 8437 encap_decap = 8438 (struct mlx5_flow_dv_encap_decap_resource *)e; 8439 data = encap_decap->buf; 8440 size = encap_decap->size; 8441 id = (uint64_t)(uintptr_t)encap_decap->action; 8442 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT; 8443 save_dump_file(data, size, type, 8444 id, NULL, file); 8445 e = LIST_NEXT(e, next); 8446 } 8447 } 8448 } 8449 8450 /* get modify_hdr */ 8451 h = sh->modify_cmds; 8452 if (h) { 8453 lcore_index = rte_lcore_index(rte_lcore_id()); 8454 if (unlikely(lcore_index == -1)) { 8455 lcore_index = MLX5_LIST_NLCORE; 8456 rte_spinlock_lock(&h->l_const.lcore_lock); 8457 } 8458 i = lcore_index; 8459 8460 for (j = 0; j <= h->mask; j++) { 8461 l_inconst = &h->buckets[j].l; 8462 if (!l_inconst || !l_inconst->cache[i]) 8463 continue; 8464 8465 e = LIST_FIRST(&l_inconst->cache[i]->h); 8466 while (e) { 8467 modify_hdr = 8468 (struct mlx5_flow_dv_modify_hdr_resource *)e; 8469 data = (const uint8_t *)modify_hdr->actions; 8470 size = (size_t)(modify_hdr->actions_num) * 8; 8471 actions_num = modify_hdr->actions_num; 8472 id = (uint64_t)(uintptr_t)modify_hdr->action; 8473 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR; 8474 save_dump_file(data, size, type, id, 8475 (void *)(&actions_num), file); 8476 e = LIST_NEXT(e, next); 8477 } 8478 } 8479 8480 if (unlikely(lcore_index == MLX5_LIST_NLCORE)) 8481 rte_spinlock_unlock(&h->l_const.lcore_lock); 8482 } 8483 8484 /* get counter */ 8485 MLX5_ASSERT(cmng->n_valid <= cmng->n); 8486 max = MLX5_COUNTERS_PER_POOL * cmng->n_valid; 8487 for (j = 1; j <= max; j++) { 8488 action = NULL; 8489 flow_dv_query_count_ptr(dev, j, &action, error); 8490 if (action) { 8491 if (!flow_dv_query_count(dev, j, &count, error)) { 8492 type = DR_DUMP_REC_TYPE_PMD_COUNTER; 8493 id = (uint64_t)(uintptr_t)action; 8494 save_dump_file(NULL, 0, type, 8495 id, (void *)&count, file); 8496 } 8497 } 8498 } 8499 return 0; 8500 } 8501 #endif 8502 8503 /** 8504 * Dump flow raw hw data to file 8505 * 8506 * @param[in] dev 8507 * The pointer to Ethernet device. 8508 * @param[in] file 8509 * A pointer to a file for output. 8510 * @param[out] error 8511 * Perform verbose error reporting if not NULL. PMDs initialize this 8512 * structure in case of error only. 8513 * @return 8514 * 0 on success, a nagative value otherwise. 8515 */ 8516 int 8517 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx, 8518 FILE *file, 8519 struct rte_flow_error *error __rte_unused) 8520 { 8521 struct mlx5_priv *priv = dev->data->dev_private; 8522 struct mlx5_dev_ctx_shared *sh = priv->sh; 8523 uint32_t handle_idx; 8524 int ret; 8525 struct mlx5_flow_handle *dh; 8526 struct rte_flow *flow; 8527 8528 if (!priv->config.dv_flow_en) { 8529 if (fputs("device dv flow disabled\n", file) <= 0) 8530 return -errno; 8531 return -ENOTSUP; 8532 } 8533 8534 /* dump all */ 8535 if (!flow_idx) { 8536 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8537 if (mlx5_flow_dev_dump_sh_all(dev, file, error)) 8538 return -EINVAL; 8539 #endif 8540 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, 8541 sh->rx_domain, 8542 sh->tx_domain, file); 8543 } 8544 /* dump one */ 8545 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 8546 (uintptr_t)(void *)flow_idx); 8547 if (!flow) 8548 return -EINVAL; 8549 8550 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8551 mlx5_flow_dev_dump_ipool(dev, flow, file, error); 8552 #endif 8553 handle_idx = flow->dev_handles; 8554 while (handle_idx) { 8555 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], 8556 handle_idx); 8557 if (!dh) 8558 return -ENOENT; 8559 if (dh->drv_flow) { 8560 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow, 8561 file); 8562 if (ret) 8563 return -ENOENT; 8564 } 8565 handle_idx = dh->next.next; 8566 } 8567 return 0; 8568 } 8569 8570 /** 8571 * Get aged-out flows. 8572 * 8573 * @param[in] dev 8574 * Pointer to the Ethernet device structure. 8575 * @param[in] context 8576 * The address of an array of pointers to the aged-out flows contexts. 8577 * @param[in] nb_countexts 8578 * The length of context array pointers. 8579 * @param[out] error 8580 * Perform verbose error reporting if not NULL. Initialized in case of 8581 * error only. 8582 * 8583 * @return 8584 * how many contexts get in success, otherwise negative errno value. 8585 * if nb_contexts is 0, return the amount of all aged contexts. 8586 * if nb_contexts is not 0 , return the amount of aged flows reported 8587 * in the context array. 8588 */ 8589 int 8590 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 8591 uint32_t nb_contexts, struct rte_flow_error *error) 8592 { 8593 const struct mlx5_flow_driver_ops *fops; 8594 struct rte_flow_attr attr = { .transfer = 0 }; 8595 8596 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 8597 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 8598 return fops->get_aged_flows(dev, contexts, nb_contexts, 8599 error); 8600 } 8601 DRV_LOG(ERR, 8602 "port %u get aged flows is not supported.", 8603 dev->data->port_id); 8604 return -ENOTSUP; 8605 } 8606 8607 /* Wrapper for driver action_validate op callback */ 8608 static int 8609 flow_drv_action_validate(struct rte_eth_dev *dev, 8610 const struct rte_flow_indir_action_conf *conf, 8611 const struct rte_flow_action *action, 8612 const struct mlx5_flow_driver_ops *fops, 8613 struct rte_flow_error *error) 8614 { 8615 static const char err_msg[] = "indirect action validation unsupported"; 8616 8617 if (!fops->action_validate) { 8618 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8619 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8620 NULL, err_msg); 8621 return -rte_errno; 8622 } 8623 return fops->action_validate(dev, conf, action, error); 8624 } 8625 8626 /** 8627 * Destroys the shared action by handle. 8628 * 8629 * @param dev 8630 * Pointer to Ethernet device structure. 8631 * @param[in] handle 8632 * Handle for the indirect action object to be destroyed. 8633 * @param[out] error 8634 * Perform verbose error reporting if not NULL. PMDs initialize this 8635 * structure in case of error only. 8636 * 8637 * @return 8638 * 0 on success, a negative errno value otherwise and rte_errno is set. 8639 * 8640 * @note: wrapper for driver action_create op callback. 8641 */ 8642 static int 8643 mlx5_action_handle_destroy(struct rte_eth_dev *dev, 8644 struct rte_flow_action_handle *handle, 8645 struct rte_flow_error *error) 8646 { 8647 static const char err_msg[] = "indirect action destruction unsupported"; 8648 struct rte_flow_attr attr = { .transfer = 0 }; 8649 const struct mlx5_flow_driver_ops *fops = 8650 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8651 8652 if (!fops->action_destroy) { 8653 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8654 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8655 NULL, err_msg); 8656 return -rte_errno; 8657 } 8658 return fops->action_destroy(dev, handle, error); 8659 } 8660 8661 /* Wrapper for driver action_destroy op callback */ 8662 static int 8663 flow_drv_action_update(struct rte_eth_dev *dev, 8664 struct rte_flow_action_handle *handle, 8665 const void *update, 8666 const struct mlx5_flow_driver_ops *fops, 8667 struct rte_flow_error *error) 8668 { 8669 static const char err_msg[] = "indirect action update unsupported"; 8670 8671 if (!fops->action_update) { 8672 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8673 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8674 NULL, err_msg); 8675 return -rte_errno; 8676 } 8677 return fops->action_update(dev, handle, update, error); 8678 } 8679 8680 /* Wrapper for driver action_destroy op callback */ 8681 static int 8682 flow_drv_action_query(struct rte_eth_dev *dev, 8683 const struct rte_flow_action_handle *handle, 8684 void *data, 8685 const struct mlx5_flow_driver_ops *fops, 8686 struct rte_flow_error *error) 8687 { 8688 static const char err_msg[] = "indirect action query unsupported"; 8689 8690 if (!fops->action_query) { 8691 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8692 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8693 NULL, err_msg); 8694 return -rte_errno; 8695 } 8696 return fops->action_query(dev, handle, data, error); 8697 } 8698 8699 /** 8700 * Create indirect action for reuse in multiple flow rules. 8701 * 8702 * @param dev 8703 * Pointer to Ethernet device structure. 8704 * @param conf 8705 * Pointer to indirect action object configuration. 8706 * @param[in] action 8707 * Action configuration for indirect action object creation. 8708 * @param[out] error 8709 * Perform verbose error reporting if not NULL. PMDs initialize this 8710 * structure in case of error only. 8711 * @return 8712 * A valid handle in case of success, NULL otherwise and rte_errno is set. 8713 */ 8714 static struct rte_flow_action_handle * 8715 mlx5_action_handle_create(struct rte_eth_dev *dev, 8716 const struct rte_flow_indir_action_conf *conf, 8717 const struct rte_flow_action *action, 8718 struct rte_flow_error *error) 8719 { 8720 static const char err_msg[] = "indirect action creation unsupported"; 8721 struct rte_flow_attr attr = { .transfer = 0 }; 8722 const struct mlx5_flow_driver_ops *fops = 8723 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8724 8725 if (flow_drv_action_validate(dev, conf, action, fops, error)) 8726 return NULL; 8727 if (!fops->action_create) { 8728 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8729 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8730 NULL, err_msg); 8731 return NULL; 8732 } 8733 return fops->action_create(dev, conf, action, error); 8734 } 8735 8736 /** 8737 * Updates inplace the indirect action configuration pointed by *handle* 8738 * with the configuration provided as *update* argument. 8739 * The update of the indirect action configuration effects all flow rules 8740 * reusing the action via handle. 8741 * 8742 * @param dev 8743 * Pointer to Ethernet device structure. 8744 * @param[in] handle 8745 * Handle for the indirect action to be updated. 8746 * @param[in] update 8747 * Action specification used to modify the action pointed by handle. 8748 * *update* could be of same type with the action pointed by the *handle* 8749 * handle argument, or some other structures like a wrapper, depending on 8750 * the indirect action type. 8751 * @param[out] error 8752 * Perform verbose error reporting if not NULL. PMDs initialize this 8753 * structure in case of error only. 8754 * 8755 * @return 8756 * 0 on success, a negative errno value otherwise and rte_errno is set. 8757 */ 8758 static int 8759 mlx5_action_handle_update(struct rte_eth_dev *dev, 8760 struct rte_flow_action_handle *handle, 8761 const void *update, 8762 struct rte_flow_error *error) 8763 { 8764 struct rte_flow_attr attr = { .transfer = 0 }; 8765 const struct mlx5_flow_driver_ops *fops = 8766 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8767 int ret; 8768 8769 ret = flow_drv_action_validate(dev, NULL, 8770 (const struct rte_flow_action *)update, fops, error); 8771 if (ret) 8772 return ret; 8773 return flow_drv_action_update(dev, handle, update, fops, 8774 error); 8775 } 8776 8777 /** 8778 * Query the indirect action by handle. 8779 * 8780 * This function allows retrieving action-specific data such as counters. 8781 * Data is gathered by special action which may be present/referenced in 8782 * more than one flow rule definition. 8783 * 8784 * see @RTE_FLOW_ACTION_TYPE_COUNT 8785 * 8786 * @param dev 8787 * Pointer to Ethernet device structure. 8788 * @param[in] handle 8789 * Handle for the indirect action to query. 8790 * @param[in, out] data 8791 * Pointer to storage for the associated query data type. 8792 * @param[out] error 8793 * Perform verbose error reporting if not NULL. PMDs initialize this 8794 * structure in case of error only. 8795 * 8796 * @return 8797 * 0 on success, a negative errno value otherwise and rte_errno is set. 8798 */ 8799 static int 8800 mlx5_action_handle_query(struct rte_eth_dev *dev, 8801 const struct rte_flow_action_handle *handle, 8802 void *data, 8803 struct rte_flow_error *error) 8804 { 8805 struct rte_flow_attr attr = { .transfer = 0 }; 8806 const struct mlx5_flow_driver_ops *fops = 8807 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8808 8809 return flow_drv_action_query(dev, handle, data, fops, error); 8810 } 8811 8812 /** 8813 * Destroy all indirect actions (shared RSS). 8814 * 8815 * @param dev 8816 * Pointer to Ethernet device. 8817 * 8818 * @return 8819 * 0 on success, a negative errno value otherwise and rte_errno is set. 8820 */ 8821 int 8822 mlx5_action_handle_flush(struct rte_eth_dev *dev) 8823 { 8824 struct rte_flow_error error; 8825 struct mlx5_priv *priv = dev->data->dev_private; 8826 struct mlx5_shared_action_rss *shared_rss; 8827 int ret = 0; 8828 uint32_t idx; 8829 8830 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 8831 priv->rss_shared_actions, idx, shared_rss, next) { 8832 ret |= mlx5_action_handle_destroy(dev, 8833 (struct rte_flow_action_handle *)(uintptr_t)idx, &error); 8834 } 8835 return ret; 8836 } 8837 8838 /** 8839 * Validate existing indirect actions against current device configuration 8840 * and attach them to device resources. 8841 * 8842 * @param dev 8843 * Pointer to Ethernet device. 8844 * 8845 * @return 8846 * 0 on success, a negative errno value otherwise and rte_errno is set. 8847 */ 8848 int 8849 mlx5_action_handle_attach(struct rte_eth_dev *dev) 8850 { 8851 struct mlx5_priv *priv = dev->data->dev_private; 8852 struct mlx5_indexed_pool *ipool = 8853 priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS]; 8854 struct mlx5_shared_action_rss *shared_rss, *shared_rss_last; 8855 int ret = 0; 8856 uint32_t idx; 8857 8858 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8859 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8860 const char *message; 8861 uint32_t queue_idx; 8862 8863 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues, 8864 ind_tbl->queues_n, 8865 &message, &queue_idx); 8866 if (ret != 0) { 8867 DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s", 8868 dev->data->port_id, ind_tbl->queues[queue_idx], 8869 message); 8870 break; 8871 } 8872 } 8873 if (ret != 0) 8874 return ret; 8875 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8876 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8877 8878 ret = mlx5_ind_table_obj_attach(dev, ind_tbl); 8879 if (ret != 0) { 8880 DRV_LOG(ERR, "Port %u could not attach " 8881 "indirection table obj %p", 8882 dev->data->port_id, (void *)ind_tbl); 8883 goto error; 8884 } 8885 } 8886 return 0; 8887 error: 8888 shared_rss_last = shared_rss; 8889 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8890 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8891 8892 if (shared_rss == shared_rss_last) 8893 break; 8894 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0) 8895 DRV_LOG(CRIT, "Port %u could not detach " 8896 "indirection table obj %p on rollback", 8897 dev->data->port_id, (void *)ind_tbl); 8898 } 8899 return ret; 8900 } 8901 8902 /** 8903 * Detach indirect actions of the device from its resources. 8904 * 8905 * @param dev 8906 * Pointer to Ethernet device. 8907 * 8908 * @return 8909 * 0 on success, a negative errno value otherwise and rte_errno is set. 8910 */ 8911 int 8912 mlx5_action_handle_detach(struct rte_eth_dev *dev) 8913 { 8914 struct mlx5_priv *priv = dev->data->dev_private; 8915 struct mlx5_indexed_pool *ipool = 8916 priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS]; 8917 struct mlx5_shared_action_rss *shared_rss, *shared_rss_last; 8918 int ret = 0; 8919 uint32_t idx; 8920 8921 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8922 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8923 8924 ret = mlx5_ind_table_obj_detach(dev, ind_tbl); 8925 if (ret != 0) { 8926 DRV_LOG(ERR, "Port %u could not detach " 8927 "indirection table obj %p", 8928 dev->data->port_id, (void *)ind_tbl); 8929 goto error; 8930 } 8931 } 8932 return 0; 8933 error: 8934 shared_rss_last = shared_rss; 8935 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8936 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8937 8938 if (shared_rss == shared_rss_last) 8939 break; 8940 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0) 8941 DRV_LOG(CRIT, "Port %u could not attach " 8942 "indirection table obj %p on rollback", 8943 dev->data->port_id, (void *)ind_tbl); 8944 } 8945 return ret; 8946 } 8947 8948 #ifndef HAVE_MLX5DV_DR 8949 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) 8950 #else 8951 #define MLX5_DOMAIN_SYNC_FLOW \ 8952 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) 8953 #endif 8954 8955 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) 8956 { 8957 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 8958 const struct mlx5_flow_driver_ops *fops; 8959 int ret; 8960 struct rte_flow_attr attr = { .transfer = 0 }; 8961 8962 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8963 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); 8964 if (ret > 0) 8965 ret = -ret; 8966 return ret; 8967 } 8968 8969 const struct mlx5_flow_tunnel * 8970 mlx5_get_tof(const struct rte_flow_item *item, 8971 const struct rte_flow_action *action, 8972 enum mlx5_tof_rule_type *rule_type) 8973 { 8974 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 8975 if (item->type == (typeof(item->type)) 8976 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) { 8977 *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE; 8978 return flow_items_to_tunnel(item); 8979 } 8980 } 8981 for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) { 8982 if (action->type == (typeof(action->type)) 8983 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) { 8984 *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE; 8985 return flow_actions_to_tunnel(action); 8986 } 8987 } 8988 return NULL; 8989 } 8990 8991 /** 8992 * tunnel offload functionalilty is defined for DV environment only 8993 */ 8994 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8995 __extension__ 8996 union tunnel_offload_mark { 8997 uint32_t val; 8998 struct { 8999 uint32_t app_reserve:8; 9000 uint32_t table_id:15; 9001 uint32_t transfer:1; 9002 uint32_t _unused_:8; 9003 }; 9004 }; 9005 9006 static bool 9007 mlx5_access_tunnel_offload_db 9008 (struct rte_eth_dev *dev, 9009 bool (*match)(struct rte_eth_dev *, 9010 struct mlx5_flow_tunnel *, const void *), 9011 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 9012 void (*miss)(struct rte_eth_dev *, void *), 9013 void *ctx, bool lock_op); 9014 9015 static int 9016 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 9017 struct rte_flow *flow, 9018 const struct rte_flow_attr *attr, 9019 const struct rte_flow_action *app_actions, 9020 uint32_t flow_idx, 9021 const struct mlx5_flow_tunnel *tunnel, 9022 struct tunnel_default_miss_ctx *ctx, 9023 struct rte_flow_error *error) 9024 { 9025 struct mlx5_priv *priv = dev->data->dev_private; 9026 struct mlx5_flow *dev_flow; 9027 struct rte_flow_attr miss_attr = *attr; 9028 const struct rte_flow_item miss_items[2] = { 9029 { 9030 .type = RTE_FLOW_ITEM_TYPE_ETH, 9031 .spec = NULL, 9032 .last = NULL, 9033 .mask = NULL 9034 }, 9035 { 9036 .type = RTE_FLOW_ITEM_TYPE_END, 9037 .spec = NULL, 9038 .last = NULL, 9039 .mask = NULL 9040 } 9041 }; 9042 union tunnel_offload_mark mark_id; 9043 struct rte_flow_action_mark miss_mark; 9044 struct rte_flow_action miss_actions[3] = { 9045 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 9046 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 9047 }; 9048 const struct rte_flow_action_jump *jump_data; 9049 uint32_t i, flow_table = 0; /* prevent compilation warning */ 9050 struct flow_grp_info grp_info = { 9051 .external = 1, 9052 .transfer = attr->transfer, 9053 .fdb_def_rule = !!priv->fdb_def_rule, 9054 .std_tbl_fix = 0, 9055 }; 9056 int ret; 9057 9058 if (!attr->transfer) { 9059 uint32_t q_size; 9060 9061 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 9062 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 9063 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 9064 0, SOCKET_ID_ANY); 9065 if (!ctx->queue) 9066 return rte_flow_error_set 9067 (error, ENOMEM, 9068 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 9069 NULL, "invalid default miss RSS"); 9070 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 9071 ctx->action_rss.level = 0, 9072 ctx->action_rss.types = priv->rss_conf.rss_hf, 9073 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 9074 ctx->action_rss.queue_num = priv->reta_idx_n, 9075 ctx->action_rss.key = priv->rss_conf.rss_key, 9076 ctx->action_rss.queue = ctx->queue; 9077 if (!priv->reta_idx_n || !priv->rxqs_n) 9078 return rte_flow_error_set 9079 (error, EINVAL, 9080 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 9081 NULL, "invalid port configuration"); 9082 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) 9083 ctx->action_rss.types = 0; 9084 for (i = 0; i != priv->reta_idx_n; ++i) 9085 ctx->queue[i] = (*priv->reta_idx)[i]; 9086 } else { 9087 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 9088 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 9089 } 9090 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 9091 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 9092 jump_data = app_actions->conf; 9093 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 9094 miss_attr.group = jump_data->group; 9095 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 9096 &flow_table, &grp_info, error); 9097 if (ret) 9098 return rte_flow_error_set(error, EINVAL, 9099 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 9100 NULL, "invalid tunnel id"); 9101 mark_id.app_reserve = 0; 9102 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 9103 mark_id.transfer = !!attr->transfer; 9104 mark_id._unused_ = 0; 9105 miss_mark.id = mark_id.val; 9106 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 9107 miss_items, miss_actions, flow_idx, error); 9108 if (!dev_flow) 9109 return -rte_errno; 9110 dev_flow->flow = flow; 9111 dev_flow->external = true; 9112 dev_flow->tunnel = tunnel; 9113 dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE; 9114 /* Subflow object was created, we must include one in the list. */ 9115 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 9116 dev_flow->handle, next); 9117 DRV_LOG(DEBUG, 9118 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 9119 dev->data->port_id, tunnel->app_tunnel.type, 9120 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 9121 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 9122 miss_actions, error); 9123 if (!ret) 9124 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 9125 error); 9126 9127 return ret; 9128 } 9129 9130 static const struct mlx5_flow_tbl_data_entry * 9131 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 9132 { 9133 struct mlx5_priv *priv = dev->data->dev_private; 9134 struct mlx5_dev_ctx_shared *sh = priv->sh; 9135 struct mlx5_list_entry *he; 9136 union tunnel_offload_mark mbits = { .val = mark }; 9137 union mlx5_flow_tbl_key table_key = { 9138 { 9139 .level = tunnel_id_to_flow_tbl(mbits.table_id), 9140 .id = 0, 9141 .reserved = 0, 9142 .dummy = 0, 9143 .is_fdb = !!mbits.transfer, 9144 .is_egress = 0, 9145 } 9146 }; 9147 struct mlx5_flow_cb_ctx ctx = { 9148 .data = &table_key.v64, 9149 }; 9150 9151 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx); 9152 return he ? 9153 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 9154 } 9155 9156 static void 9157 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx, 9158 struct mlx5_list_entry *entry) 9159 { 9160 struct mlx5_dev_ctx_shared *sh = tool_ctx; 9161 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 9162 9163 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 9164 tunnel_flow_tbl_to_id(tte->flow_table)); 9165 mlx5_free(tte); 9166 } 9167 9168 static int 9169 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused, 9170 struct mlx5_list_entry *entry, void *cb_ctx) 9171 { 9172 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 9173 union tunnel_tbl_key tbl = { 9174 .val = *(uint64_t *)(ctx->data), 9175 }; 9176 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 9177 9178 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group; 9179 } 9180 9181 static struct mlx5_list_entry * 9182 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx) 9183 { 9184 struct mlx5_dev_ctx_shared *sh = tool_ctx; 9185 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 9186 struct tunnel_tbl_entry *tte; 9187 union tunnel_tbl_key tbl = { 9188 .val = *(uint64_t *)(ctx->data), 9189 }; 9190 9191 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 9192 sizeof(*tte), 0, 9193 SOCKET_ID_ANY); 9194 if (!tte) 9195 goto err; 9196 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 9197 &tte->flow_table); 9198 if (tte->flow_table >= MLX5_MAX_TABLES) { 9199 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.", 9200 tte->flow_table); 9201 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 9202 tte->flow_table); 9203 goto err; 9204 } else if (!tte->flow_table) { 9205 goto err; 9206 } 9207 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 9208 tte->tunnel_id = tbl.tunnel_id; 9209 tte->group = tbl.group; 9210 return &tte->hash; 9211 err: 9212 if (tte) 9213 mlx5_free(tte); 9214 return NULL; 9215 } 9216 9217 static struct mlx5_list_entry * 9218 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused, 9219 struct mlx5_list_entry *oentry, 9220 void *cb_ctx __rte_unused) 9221 { 9222 struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte), 9223 0, SOCKET_ID_ANY); 9224 9225 if (!tte) 9226 return NULL; 9227 memcpy(tte, oentry, sizeof(*tte)); 9228 return &tte->hash; 9229 } 9230 9231 static void 9232 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused, 9233 struct mlx5_list_entry *entry) 9234 { 9235 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 9236 9237 mlx5_free(tte); 9238 } 9239 9240 static uint32_t 9241 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 9242 const struct mlx5_flow_tunnel *tunnel, 9243 uint32_t group, uint32_t *table, 9244 struct rte_flow_error *error) 9245 { 9246 struct mlx5_list_entry *he; 9247 struct tunnel_tbl_entry *tte; 9248 union tunnel_tbl_key key = { 9249 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 9250 .group = group 9251 }; 9252 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 9253 struct mlx5_hlist *group_hash; 9254 struct mlx5_flow_cb_ctx ctx = { 9255 .data = &key.val, 9256 }; 9257 9258 group_hash = tunnel ? tunnel->groups : thub->groups; 9259 he = mlx5_hlist_register(group_hash, key.val, &ctx); 9260 if (!he) 9261 return rte_flow_error_set(error, EINVAL, 9262 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 9263 NULL, 9264 "tunnel group index not supported"); 9265 tte = container_of(he, typeof(*tte), hash); 9266 *table = tte->flow_table; 9267 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 9268 dev->data->port_id, key.tunnel_id, group, *table); 9269 return 0; 9270 } 9271 9272 static void 9273 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 9274 struct mlx5_flow_tunnel *tunnel) 9275 { 9276 struct mlx5_priv *priv = dev->data->dev_private; 9277 struct mlx5_indexed_pool *ipool; 9278 9279 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 9280 dev->data->port_id, tunnel->tunnel_id); 9281 LIST_REMOVE(tunnel, chain); 9282 mlx5_hlist_destroy(tunnel->groups); 9283 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 9284 mlx5_ipool_free(ipool, tunnel->tunnel_id); 9285 } 9286 9287 static bool 9288 mlx5_access_tunnel_offload_db 9289 (struct rte_eth_dev *dev, 9290 bool (*match)(struct rte_eth_dev *, 9291 struct mlx5_flow_tunnel *, const void *), 9292 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 9293 void (*miss)(struct rte_eth_dev *, void *), 9294 void *ctx, bool lock_op) 9295 { 9296 bool verdict = false; 9297 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 9298 struct mlx5_flow_tunnel *tunnel; 9299 9300 rte_spinlock_lock(&thub->sl); 9301 LIST_FOREACH(tunnel, &thub->tunnels, chain) { 9302 verdict = match(dev, tunnel, (const void *)ctx); 9303 if (verdict) 9304 break; 9305 } 9306 if (!lock_op) 9307 rte_spinlock_unlock(&thub->sl); 9308 if (verdict && hit) 9309 hit(dev, tunnel, ctx); 9310 if (!verdict && miss) 9311 miss(dev, ctx); 9312 if (lock_op) 9313 rte_spinlock_unlock(&thub->sl); 9314 9315 return verdict; 9316 } 9317 9318 struct tunnel_db_find_tunnel_id_ctx { 9319 uint32_t tunnel_id; 9320 struct mlx5_flow_tunnel *tunnel; 9321 }; 9322 9323 static bool 9324 find_tunnel_id_match(struct rte_eth_dev *dev, 9325 struct mlx5_flow_tunnel *tunnel, const void *x) 9326 { 9327 const struct tunnel_db_find_tunnel_id_ctx *ctx = x; 9328 9329 RTE_SET_USED(dev); 9330 return tunnel->tunnel_id == ctx->tunnel_id; 9331 } 9332 9333 static void 9334 find_tunnel_id_hit(struct rte_eth_dev *dev, 9335 struct mlx5_flow_tunnel *tunnel, void *x) 9336 { 9337 struct tunnel_db_find_tunnel_id_ctx *ctx = x; 9338 RTE_SET_USED(dev); 9339 ctx->tunnel = tunnel; 9340 } 9341 9342 static struct mlx5_flow_tunnel * 9343 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 9344 { 9345 struct tunnel_db_find_tunnel_id_ctx ctx = { 9346 .tunnel_id = id, 9347 }; 9348 9349 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match, 9350 find_tunnel_id_hit, NULL, &ctx, true); 9351 9352 return ctx.tunnel; 9353 } 9354 9355 static struct mlx5_flow_tunnel * 9356 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 9357 const struct rte_flow_tunnel *app_tunnel) 9358 { 9359 struct mlx5_priv *priv = dev->data->dev_private; 9360 struct mlx5_indexed_pool *ipool; 9361 struct mlx5_flow_tunnel *tunnel; 9362 uint32_t id; 9363 9364 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 9365 tunnel = mlx5_ipool_zmalloc(ipool, &id); 9366 if (!tunnel) 9367 return NULL; 9368 if (id >= MLX5_MAX_TUNNELS) { 9369 mlx5_ipool_free(ipool, id); 9370 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id); 9371 return NULL; 9372 } 9373 tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true, 9374 priv->sh, 9375 mlx5_flow_tunnel_grp2tbl_create_cb, 9376 mlx5_flow_tunnel_grp2tbl_match_cb, 9377 mlx5_flow_tunnel_grp2tbl_remove_cb, 9378 mlx5_flow_tunnel_grp2tbl_clone_cb, 9379 mlx5_flow_tunnel_grp2tbl_clone_free_cb); 9380 if (!tunnel->groups) { 9381 mlx5_ipool_free(ipool, id); 9382 return NULL; 9383 } 9384 /* initiate new PMD tunnel */ 9385 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 9386 tunnel->tunnel_id = id; 9387 tunnel->action.type = (typeof(tunnel->action.type)) 9388 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 9389 tunnel->action.conf = tunnel; 9390 tunnel->item.type = (typeof(tunnel->item.type)) 9391 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 9392 tunnel->item.spec = tunnel; 9393 tunnel->item.last = NULL; 9394 tunnel->item.mask = NULL; 9395 9396 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 9397 dev->data->port_id, tunnel->tunnel_id); 9398 9399 return tunnel; 9400 } 9401 9402 struct tunnel_db_get_tunnel_ctx { 9403 const struct rte_flow_tunnel *app_tunnel; 9404 struct mlx5_flow_tunnel *tunnel; 9405 }; 9406 9407 static bool get_tunnel_match(struct rte_eth_dev *dev, 9408 struct mlx5_flow_tunnel *tunnel, const void *x) 9409 { 9410 const struct tunnel_db_get_tunnel_ctx *ctx = x; 9411 9412 RTE_SET_USED(dev); 9413 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel, 9414 sizeof(*ctx->app_tunnel)); 9415 } 9416 9417 static void get_tunnel_hit(struct rte_eth_dev *dev, 9418 struct mlx5_flow_tunnel *tunnel, void *x) 9419 { 9420 /* called under tunnel spinlock protection */ 9421 struct tunnel_db_get_tunnel_ctx *ctx = x; 9422 9423 RTE_SET_USED(dev); 9424 tunnel->refctn++; 9425 ctx->tunnel = tunnel; 9426 } 9427 9428 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x) 9429 { 9430 /* called under tunnel spinlock protection */ 9431 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 9432 struct tunnel_db_get_tunnel_ctx *ctx = x; 9433 9434 rte_spinlock_unlock(&thub->sl); 9435 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel); 9436 rte_spinlock_lock(&thub->sl); 9437 if (ctx->tunnel) { 9438 ctx->tunnel->refctn = 1; 9439 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain); 9440 } 9441 } 9442 9443 9444 static int 9445 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 9446 const struct rte_flow_tunnel *app_tunnel, 9447 struct mlx5_flow_tunnel **tunnel) 9448 { 9449 struct tunnel_db_get_tunnel_ctx ctx = { 9450 .app_tunnel = app_tunnel, 9451 }; 9452 9453 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit, 9454 get_tunnel_miss, &ctx, true); 9455 *tunnel = ctx.tunnel; 9456 return ctx.tunnel ? 0 : -ENOMEM; 9457 } 9458 9459 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 9460 { 9461 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 9462 9463 if (!thub) 9464 return; 9465 if (!LIST_EMPTY(&thub->tunnels)) 9466 DRV_LOG(WARNING, "port %u tunnels present", port_id); 9467 mlx5_hlist_destroy(thub->groups); 9468 mlx5_free(thub); 9469 } 9470 9471 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 9472 { 9473 int err; 9474 struct mlx5_flow_tunnel_hub *thub; 9475 9476 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 9477 0, SOCKET_ID_ANY); 9478 if (!thub) 9479 return -ENOMEM; 9480 LIST_INIT(&thub->tunnels); 9481 rte_spinlock_init(&thub->sl); 9482 thub->groups = mlx5_hlist_create("flow groups", 64, 9483 false, true, sh, 9484 mlx5_flow_tunnel_grp2tbl_create_cb, 9485 mlx5_flow_tunnel_grp2tbl_match_cb, 9486 mlx5_flow_tunnel_grp2tbl_remove_cb, 9487 mlx5_flow_tunnel_grp2tbl_clone_cb, 9488 mlx5_flow_tunnel_grp2tbl_clone_free_cb); 9489 if (!thub->groups) { 9490 err = -rte_errno; 9491 goto err; 9492 } 9493 sh->tunnel_hub = thub; 9494 9495 return 0; 9496 9497 err: 9498 if (thub->groups) 9499 mlx5_hlist_destroy(thub->groups); 9500 if (thub) 9501 mlx5_free(thub); 9502 return err; 9503 } 9504 9505 static inline bool 9506 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 9507 struct rte_flow_tunnel *tunnel, 9508 const char *err_msg) 9509 { 9510 err_msg = NULL; 9511 if (!is_tunnel_offload_active(dev)) { 9512 err_msg = "tunnel offload was not activated"; 9513 goto out; 9514 } else if (!tunnel) { 9515 err_msg = "no application tunnel"; 9516 goto out; 9517 } 9518 9519 switch (tunnel->type) { 9520 default: 9521 err_msg = "unsupported tunnel type"; 9522 goto out; 9523 case RTE_FLOW_ITEM_TYPE_VXLAN: 9524 case RTE_FLOW_ITEM_TYPE_GRE: 9525 case RTE_FLOW_ITEM_TYPE_NVGRE: 9526 case RTE_FLOW_ITEM_TYPE_GENEVE: 9527 break; 9528 } 9529 9530 out: 9531 return !err_msg; 9532 } 9533 9534 static int 9535 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 9536 struct rte_flow_tunnel *app_tunnel, 9537 struct rte_flow_action **actions, 9538 uint32_t *num_of_actions, 9539 struct rte_flow_error *error) 9540 { 9541 int ret; 9542 struct mlx5_flow_tunnel *tunnel; 9543 const char *err_msg = NULL; 9544 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 9545 9546 if (!verdict) 9547 return rte_flow_error_set(error, EINVAL, 9548 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9549 err_msg); 9550 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9551 if (ret < 0) { 9552 return rte_flow_error_set(error, ret, 9553 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9554 "failed to initialize pmd tunnel"); 9555 } 9556 *actions = &tunnel->action; 9557 *num_of_actions = 1; 9558 return 0; 9559 } 9560 9561 static int 9562 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 9563 struct rte_flow_tunnel *app_tunnel, 9564 struct rte_flow_item **items, 9565 uint32_t *num_of_items, 9566 struct rte_flow_error *error) 9567 { 9568 int ret; 9569 struct mlx5_flow_tunnel *tunnel; 9570 const char *err_msg = NULL; 9571 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 9572 9573 if (!verdict) 9574 return rte_flow_error_set(error, EINVAL, 9575 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9576 err_msg); 9577 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9578 if (ret < 0) { 9579 return rte_flow_error_set(error, ret, 9580 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9581 "failed to initialize pmd tunnel"); 9582 } 9583 *items = &tunnel->item; 9584 *num_of_items = 1; 9585 return 0; 9586 } 9587 9588 struct tunnel_db_element_release_ctx { 9589 struct rte_flow_item *items; 9590 struct rte_flow_action *actions; 9591 uint32_t num_elements; 9592 struct rte_flow_error *error; 9593 int ret; 9594 }; 9595 9596 static bool 9597 tunnel_element_release_match(struct rte_eth_dev *dev, 9598 struct mlx5_flow_tunnel *tunnel, const void *x) 9599 { 9600 const struct tunnel_db_element_release_ctx *ctx = x; 9601 9602 RTE_SET_USED(dev); 9603 if (ctx->num_elements != 1) 9604 return false; 9605 else if (ctx->items) 9606 return ctx->items == &tunnel->item; 9607 else if (ctx->actions) 9608 return ctx->actions == &tunnel->action; 9609 9610 return false; 9611 } 9612 9613 static void 9614 tunnel_element_release_hit(struct rte_eth_dev *dev, 9615 struct mlx5_flow_tunnel *tunnel, void *x) 9616 { 9617 struct tunnel_db_element_release_ctx *ctx = x; 9618 ctx->ret = 0; 9619 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 9620 mlx5_flow_tunnel_free(dev, tunnel); 9621 } 9622 9623 static void 9624 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x) 9625 { 9626 struct tunnel_db_element_release_ctx *ctx = x; 9627 RTE_SET_USED(dev); 9628 ctx->ret = rte_flow_error_set(ctx->error, EINVAL, 9629 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9630 "invalid argument"); 9631 } 9632 9633 static int 9634 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 9635 struct rte_flow_item *pmd_items, 9636 uint32_t num_items, struct rte_flow_error *err) 9637 { 9638 struct tunnel_db_element_release_ctx ctx = { 9639 .items = pmd_items, 9640 .actions = NULL, 9641 .num_elements = num_items, 9642 .error = err, 9643 }; 9644 9645 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9646 tunnel_element_release_hit, 9647 tunnel_element_release_miss, &ctx, false); 9648 9649 return ctx.ret; 9650 } 9651 9652 static int 9653 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 9654 struct rte_flow_action *pmd_actions, 9655 uint32_t num_actions, struct rte_flow_error *err) 9656 { 9657 struct tunnel_db_element_release_ctx ctx = { 9658 .items = NULL, 9659 .actions = pmd_actions, 9660 .num_elements = num_actions, 9661 .error = err, 9662 }; 9663 9664 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9665 tunnel_element_release_hit, 9666 tunnel_element_release_miss, &ctx, false); 9667 9668 return ctx.ret; 9669 } 9670 9671 static int 9672 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 9673 struct rte_mbuf *m, 9674 struct rte_flow_restore_info *info, 9675 struct rte_flow_error *err) 9676 { 9677 uint64_t ol_flags = m->ol_flags; 9678 const struct mlx5_flow_tbl_data_entry *tble; 9679 const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID; 9680 9681 if (!is_tunnel_offload_active(dev)) { 9682 info->flags = 0; 9683 return 0; 9684 } 9685 9686 if ((ol_flags & mask) != mask) 9687 goto err; 9688 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 9689 if (!tble) { 9690 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 9691 dev->data->port_id, m->hash.fdir.hi); 9692 goto err; 9693 } 9694 MLX5_ASSERT(tble->tunnel); 9695 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 9696 info->group_id = tble->group_id; 9697 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 9698 RTE_FLOW_RESTORE_INFO_GROUP_ID | 9699 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 9700 9701 return 0; 9702 9703 err: 9704 return rte_flow_error_set(err, EINVAL, 9705 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9706 "failed to get restore info"); 9707 } 9708 9709 #else /* HAVE_IBV_FLOW_DV_SUPPORT */ 9710 static int 9711 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev, 9712 __rte_unused struct rte_flow_tunnel *app_tunnel, 9713 __rte_unused struct rte_flow_action **actions, 9714 __rte_unused uint32_t *num_of_actions, 9715 __rte_unused struct rte_flow_error *error) 9716 { 9717 return -ENOTSUP; 9718 } 9719 9720 static int 9721 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev, 9722 __rte_unused struct rte_flow_tunnel *app_tunnel, 9723 __rte_unused struct rte_flow_item **items, 9724 __rte_unused uint32_t *num_of_items, 9725 __rte_unused struct rte_flow_error *error) 9726 { 9727 return -ENOTSUP; 9728 } 9729 9730 static int 9731 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev, 9732 __rte_unused struct rte_flow_item *pmd_items, 9733 __rte_unused uint32_t num_items, 9734 __rte_unused struct rte_flow_error *err) 9735 { 9736 return -ENOTSUP; 9737 } 9738 9739 static int 9740 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev, 9741 __rte_unused struct rte_flow_action *pmd_action, 9742 __rte_unused uint32_t num_actions, 9743 __rte_unused struct rte_flow_error *err) 9744 { 9745 return -ENOTSUP; 9746 } 9747 9748 static int 9749 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev, 9750 __rte_unused struct rte_mbuf *m, 9751 __rte_unused struct rte_flow_restore_info *i, 9752 __rte_unused struct rte_flow_error *err) 9753 { 9754 return -ENOTSUP; 9755 } 9756 9757 static int 9758 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev, 9759 __rte_unused struct rte_flow *flow, 9760 __rte_unused const struct rte_flow_attr *attr, 9761 __rte_unused const struct rte_flow_action *actions, 9762 __rte_unused uint32_t flow_idx, 9763 __rte_unused const struct mlx5_flow_tunnel *tunnel, 9764 __rte_unused struct tunnel_default_miss_ctx *ctx, 9765 __rte_unused struct rte_flow_error *error) 9766 { 9767 return -ENOTSUP; 9768 } 9769 9770 static struct mlx5_flow_tunnel * 9771 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev, 9772 __rte_unused uint32_t id) 9773 { 9774 return NULL; 9775 } 9776 9777 static void 9778 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev, 9779 __rte_unused struct mlx5_flow_tunnel *tunnel) 9780 { 9781 } 9782 9783 static uint32_t 9784 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev, 9785 __rte_unused const struct mlx5_flow_tunnel *t, 9786 __rte_unused uint32_t group, 9787 __rte_unused uint32_t *table, 9788 struct rte_flow_error *error) 9789 { 9790 return rte_flow_error_set(error, ENOTSUP, 9791 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9792 "tunnel offload requires DV support"); 9793 } 9794 9795 void 9796 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh, 9797 __rte_unused uint16_t port_id) 9798 { 9799 } 9800 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 9801 9802 /* Flex flow item API */ 9803 static struct rte_flow_item_flex_handle * 9804 mlx5_flow_flex_item_create(struct rte_eth_dev *dev, 9805 const struct rte_flow_item_flex_conf *conf, 9806 struct rte_flow_error *error) 9807 { 9808 static const char err_msg[] = "flex item creation unsupported"; 9809 struct rte_flow_attr attr = { .transfer = 0 }; 9810 const struct mlx5_flow_driver_ops *fops = 9811 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 9812 9813 if (!fops->item_create) { 9814 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 9815 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 9816 NULL, err_msg); 9817 return NULL; 9818 } 9819 return fops->item_create(dev, conf, error); 9820 } 9821 9822 static int 9823 mlx5_flow_flex_item_release(struct rte_eth_dev *dev, 9824 const struct rte_flow_item_flex_handle *handle, 9825 struct rte_flow_error *error) 9826 { 9827 static const char err_msg[] = "flex item release unsupported"; 9828 struct rte_flow_attr attr = { .transfer = 0 }; 9829 const struct mlx5_flow_driver_ops *fops = 9830 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 9831 9832 if (!fops->item_release) { 9833 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 9834 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 9835 NULL, err_msg); 9836 return -rte_errno; 9837 } 9838 return fops->item_release(dev, handle, error); 9839 } 9840 9841 static void 9842 mlx5_dbg__print_pattern(const struct rte_flow_item *item) 9843 { 9844 int ret; 9845 struct rte_flow_error error; 9846 9847 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 9848 char *item_name; 9849 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name, 9850 sizeof(item_name), 9851 (void *)(uintptr_t)item->type, &error); 9852 if (ret > 0) 9853 printf("%s ", item_name); 9854 else 9855 printf("%d\n", (int)item->type); 9856 } 9857 printf("END\n"); 9858 } 9859 9860 static int 9861 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item) 9862 { 9863 const struct rte_flow_item_udp *spec = udp_item->spec; 9864 const struct rte_flow_item_udp *mask = udp_item->mask; 9865 uint16_t udp_dport = 0; 9866 9867 if (spec != NULL) { 9868 if (!mask) 9869 mask = &rte_flow_item_udp_mask; 9870 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port & 9871 mask->hdr.dst_port); 9872 } 9873 return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN); 9874 } 9875 9876 static const struct mlx5_flow_expand_node * 9877 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern, 9878 unsigned int item_idx, 9879 const struct mlx5_flow_expand_node graph[], 9880 const struct mlx5_flow_expand_node *node) 9881 { 9882 const struct rte_flow_item *item = pattern + item_idx, *prev_item; 9883 9884 if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN && 9885 node != NULL && 9886 node->type == RTE_FLOW_ITEM_TYPE_VXLAN) { 9887 /* 9888 * The expansion node is VXLAN and it is also the last 9889 * expandable item in the pattern, so need to continue 9890 * expansion of the inner tunnel. 9891 */ 9892 MLX5_ASSERT(item_idx > 0); 9893 prev_item = pattern + item_idx - 1; 9894 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP); 9895 if (mlx5_flow_is_std_vxlan_port(prev_item)) 9896 return &graph[MLX5_EXPANSION_STD_VXLAN]; 9897 return &graph[MLX5_EXPANSION_L3_VXLAN]; 9898 } 9899 return node; 9900 } 9901 9902 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 9903 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 9904 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 9905 }; 9906 9907 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 9908 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 9909 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 9910 { 9, 10, 11 }, { 12, 13, 14 }, 9911 }; 9912 9913 /** 9914 * Discover the number of available flow priorities. 9915 * 9916 * @param dev 9917 * Ethernet device. 9918 * 9919 * @return 9920 * On success, number of available flow priorities. 9921 * On failure, a negative errno-style code and rte_errno is set. 9922 */ 9923 int 9924 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 9925 { 9926 static const uint16_t vprio[] = {8, 16}; 9927 const struct mlx5_priv *priv = dev->data->dev_private; 9928 const struct mlx5_flow_driver_ops *fops; 9929 enum mlx5_flow_drv_type type; 9930 int ret; 9931 9932 type = mlx5_flow_os_get_type(); 9933 if (type == MLX5_FLOW_TYPE_MAX) { 9934 type = MLX5_FLOW_TYPE_VERBS; 9935 if (priv->sh->devx && priv->config.dv_flow_en) 9936 type = MLX5_FLOW_TYPE_DV; 9937 } 9938 fops = flow_get_drv_ops(type); 9939 if (fops->discover_priorities == NULL) { 9940 DRV_LOG(ERR, "Priority discovery not supported"); 9941 rte_errno = ENOTSUP; 9942 return -rte_errno; 9943 } 9944 ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio)); 9945 if (ret < 0) 9946 return ret; 9947 switch (ret) { 9948 case 8: 9949 ret = RTE_DIM(priority_map_3); 9950 break; 9951 case 16: 9952 ret = RTE_DIM(priority_map_5); 9953 break; 9954 default: 9955 rte_errno = ENOTSUP; 9956 DRV_LOG(ERR, 9957 "port %u maximum priority: %d expected 8/16", 9958 dev->data->port_id, ret); 9959 return -rte_errno; 9960 } 9961 DRV_LOG(INFO, "port %u supported flow priorities:" 9962 " 0-%d for ingress or egress root table," 9963 " 0-%d for non-root table or transfer root table.", 9964 dev->data->port_id, ret - 2, 9965 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1); 9966 return ret; 9967 } 9968 9969 /** 9970 * Adjust flow priority based on the highest layer and the request priority. 9971 * 9972 * @param[in] dev 9973 * Pointer to the Ethernet device structure. 9974 * @param[in] priority 9975 * The rule base priority. 9976 * @param[in] subpriority 9977 * The priority based on the items. 9978 * 9979 * @return 9980 * The new priority. 9981 */ 9982 uint32_t 9983 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 9984 uint32_t subpriority) 9985 { 9986 uint32_t res = 0; 9987 struct mlx5_priv *priv = dev->data->dev_private; 9988 9989 switch (priv->sh->flow_max_priority) { 9990 case RTE_DIM(priority_map_3): 9991 res = priority_map_3[priority][subpriority]; 9992 break; 9993 case RTE_DIM(priority_map_5): 9994 res = priority_map_5[priority][subpriority]; 9995 break; 9996 } 9997 return res; 9998 } 9999