1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 12 /* Verbs header. */ 13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 14 #ifdef PEDANTIC 15 #pragma GCC diagnostic ignored "-Wpedantic" 16 #endif 17 #include <infiniband/verbs.h> 18 #ifdef PEDANTIC 19 #pragma GCC diagnostic error "-Wpedantic" 20 #endif 21 22 #include <rte_common.h> 23 #include <rte_ether.h> 24 #include <rte_eth_ctrl.h> 25 #include <rte_ethdev_driver.h> 26 #include <rte_flow.h> 27 #include <rte_flow_driver.h> 28 #include <rte_malloc.h> 29 #include <rte_ip.h> 30 31 #include "mlx5.h" 32 #include "mlx5_defs.h" 33 #include "mlx5_prm.h" 34 #include "mlx5_glue.h" 35 #include "mlx5_flow.h" 36 37 /* Dev ops structure defined in mlx5.c */ 38 extern const struct eth_dev_ops mlx5_dev_ops; 39 extern const struct eth_dev_ops mlx5_dev_ops_isolate; 40 41 /** Device flow drivers. */ 42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops; 44 #endif 45 extern const struct mlx5_flow_driver_ops mlx5_flow_tcf_drv_ops; 46 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 47 48 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 49 50 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 51 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 52 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 53 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 54 #endif 55 [MLX5_FLOW_TYPE_TCF] = &mlx5_flow_tcf_drv_ops, 56 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 57 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 58 }; 59 60 enum mlx5_expansion { 61 MLX5_EXPANSION_ROOT, 62 MLX5_EXPANSION_ROOT_OUTER, 63 MLX5_EXPANSION_ROOT_ETH_VLAN, 64 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 65 MLX5_EXPANSION_OUTER_ETH, 66 MLX5_EXPANSION_OUTER_ETH_VLAN, 67 MLX5_EXPANSION_OUTER_VLAN, 68 MLX5_EXPANSION_OUTER_IPV4, 69 MLX5_EXPANSION_OUTER_IPV4_UDP, 70 MLX5_EXPANSION_OUTER_IPV4_TCP, 71 MLX5_EXPANSION_OUTER_IPV6, 72 MLX5_EXPANSION_OUTER_IPV6_UDP, 73 MLX5_EXPANSION_OUTER_IPV6_TCP, 74 MLX5_EXPANSION_VXLAN, 75 MLX5_EXPANSION_VXLAN_GPE, 76 MLX5_EXPANSION_GRE, 77 MLX5_EXPANSION_MPLS, 78 MLX5_EXPANSION_ETH, 79 MLX5_EXPANSION_ETH_VLAN, 80 MLX5_EXPANSION_VLAN, 81 MLX5_EXPANSION_IPV4, 82 MLX5_EXPANSION_IPV4_UDP, 83 MLX5_EXPANSION_IPV4_TCP, 84 MLX5_EXPANSION_IPV6, 85 MLX5_EXPANSION_IPV6_UDP, 86 MLX5_EXPANSION_IPV6_TCP, 87 }; 88 89 /** Supported expansion of items. */ 90 static const struct rte_flow_expand_node mlx5_support_expansion[] = { 91 [MLX5_EXPANSION_ROOT] = { 92 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 93 MLX5_EXPANSION_IPV4, 94 MLX5_EXPANSION_IPV6), 95 .type = RTE_FLOW_ITEM_TYPE_END, 96 }, 97 [MLX5_EXPANSION_ROOT_OUTER] = { 98 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 99 MLX5_EXPANSION_OUTER_IPV4, 100 MLX5_EXPANSION_OUTER_IPV6), 101 .type = RTE_FLOW_ITEM_TYPE_END, 102 }, 103 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 104 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 105 .type = RTE_FLOW_ITEM_TYPE_END, 106 }, 107 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 108 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN), 109 .type = RTE_FLOW_ITEM_TYPE_END, 110 }, 111 [MLX5_EXPANSION_OUTER_ETH] = { 112 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 113 MLX5_EXPANSION_OUTER_IPV6, 114 MLX5_EXPANSION_MPLS), 115 .type = RTE_FLOW_ITEM_TYPE_ETH, 116 .rss_types = 0, 117 }, 118 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 119 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 120 .type = RTE_FLOW_ITEM_TYPE_ETH, 121 .rss_types = 0, 122 }, 123 [MLX5_EXPANSION_OUTER_VLAN] = { 124 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 125 MLX5_EXPANSION_OUTER_IPV6), 126 .type = RTE_FLOW_ITEM_TYPE_VLAN, 127 }, 128 [MLX5_EXPANSION_OUTER_IPV4] = { 129 .next = RTE_FLOW_EXPAND_RSS_NEXT 130 (MLX5_EXPANSION_OUTER_IPV4_UDP, 131 MLX5_EXPANSION_OUTER_IPV4_TCP, 132 MLX5_EXPANSION_GRE), 133 .type = RTE_FLOW_ITEM_TYPE_IPV4, 134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 135 ETH_RSS_NONFRAG_IPV4_OTHER, 136 }, 137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 139 MLX5_EXPANSION_VXLAN_GPE), 140 .type = RTE_FLOW_ITEM_TYPE_UDP, 141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 142 }, 143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 144 .type = RTE_FLOW_ITEM_TYPE_TCP, 145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 146 }, 147 [MLX5_EXPANSION_OUTER_IPV6] = { 148 .next = RTE_FLOW_EXPAND_RSS_NEXT 149 (MLX5_EXPANSION_OUTER_IPV6_UDP, 150 MLX5_EXPANSION_OUTER_IPV6_TCP), 151 .type = RTE_FLOW_ITEM_TYPE_IPV6, 152 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 153 ETH_RSS_NONFRAG_IPV6_OTHER, 154 }, 155 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 156 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 157 MLX5_EXPANSION_VXLAN_GPE), 158 .type = RTE_FLOW_ITEM_TYPE_UDP, 159 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 160 }, 161 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 162 .type = RTE_FLOW_ITEM_TYPE_TCP, 163 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 164 }, 165 [MLX5_EXPANSION_VXLAN] = { 166 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 167 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 168 }, 169 [MLX5_EXPANSION_VXLAN_GPE] = { 170 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 171 MLX5_EXPANSION_IPV4, 172 MLX5_EXPANSION_IPV6), 173 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 174 }, 175 [MLX5_EXPANSION_GRE] = { 176 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 177 .type = RTE_FLOW_ITEM_TYPE_GRE, 178 }, 179 [MLX5_EXPANSION_MPLS] = { 180 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 181 MLX5_EXPANSION_IPV6), 182 .type = RTE_FLOW_ITEM_TYPE_MPLS, 183 }, 184 [MLX5_EXPANSION_ETH] = { 185 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 186 MLX5_EXPANSION_IPV6), 187 .type = RTE_FLOW_ITEM_TYPE_ETH, 188 }, 189 [MLX5_EXPANSION_ETH_VLAN] = { 190 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 191 .type = RTE_FLOW_ITEM_TYPE_ETH, 192 }, 193 [MLX5_EXPANSION_VLAN] = { 194 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 195 MLX5_EXPANSION_IPV6), 196 .type = RTE_FLOW_ITEM_TYPE_VLAN, 197 }, 198 [MLX5_EXPANSION_IPV4] = { 199 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 200 MLX5_EXPANSION_IPV4_TCP), 201 .type = RTE_FLOW_ITEM_TYPE_IPV4, 202 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 203 ETH_RSS_NONFRAG_IPV4_OTHER, 204 }, 205 [MLX5_EXPANSION_IPV4_UDP] = { 206 .type = RTE_FLOW_ITEM_TYPE_UDP, 207 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 208 }, 209 [MLX5_EXPANSION_IPV4_TCP] = { 210 .type = RTE_FLOW_ITEM_TYPE_TCP, 211 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 212 }, 213 [MLX5_EXPANSION_IPV6] = { 214 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 215 MLX5_EXPANSION_IPV6_TCP), 216 .type = RTE_FLOW_ITEM_TYPE_IPV6, 217 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 218 ETH_RSS_NONFRAG_IPV6_OTHER, 219 }, 220 [MLX5_EXPANSION_IPV6_UDP] = { 221 .type = RTE_FLOW_ITEM_TYPE_UDP, 222 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 223 }, 224 [MLX5_EXPANSION_IPV6_TCP] = { 225 .type = RTE_FLOW_ITEM_TYPE_TCP, 226 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 227 }, 228 }; 229 230 static const struct rte_flow_ops mlx5_flow_ops = { 231 .validate = mlx5_flow_validate, 232 .create = mlx5_flow_create, 233 .destroy = mlx5_flow_destroy, 234 .flush = mlx5_flow_flush, 235 .isolate = mlx5_flow_isolate, 236 .query = mlx5_flow_query, 237 }; 238 239 /* Convert FDIR request to Generic flow. */ 240 struct mlx5_fdir { 241 struct rte_flow_attr attr; 242 struct rte_flow_action actions[2]; 243 struct rte_flow_item items[4]; 244 struct rte_flow_item_eth l2; 245 struct rte_flow_item_eth l2_mask; 246 union { 247 struct rte_flow_item_ipv4 ipv4; 248 struct rte_flow_item_ipv6 ipv6; 249 } l3; 250 union { 251 struct rte_flow_item_ipv4 ipv4; 252 struct rte_flow_item_ipv6 ipv6; 253 } l3_mask; 254 union { 255 struct rte_flow_item_udp udp; 256 struct rte_flow_item_tcp tcp; 257 } l4; 258 union { 259 struct rte_flow_item_udp udp; 260 struct rte_flow_item_tcp tcp; 261 } l4_mask; 262 struct rte_flow_action_queue queue; 263 }; 264 265 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 266 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 267 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 268 }; 269 270 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 271 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 272 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 273 { 9, 10, 11 }, { 12, 13, 14 }, 274 }; 275 276 /* Tunnel information. */ 277 struct mlx5_flow_tunnel_info { 278 uint32_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 279 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 280 }; 281 282 static struct mlx5_flow_tunnel_info tunnels_info[] = { 283 { 284 .tunnel = MLX5_FLOW_LAYER_VXLAN, 285 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 286 }, 287 { 288 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 289 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 290 }, 291 { 292 .tunnel = MLX5_FLOW_LAYER_GRE, 293 .ptype = RTE_PTYPE_TUNNEL_GRE, 294 }, 295 { 296 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 297 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE | RTE_PTYPE_L4_UDP, 298 }, 299 { 300 .tunnel = MLX5_FLOW_LAYER_MPLS, 301 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 302 }, 303 }; 304 305 /** 306 * Discover the maximum number of priority available. 307 * 308 * @param[in] dev 309 * Pointer to the Ethernet device structure. 310 * 311 * @return 312 * number of supported flow priority on success, a negative errno 313 * value otherwise and rte_errno is set. 314 */ 315 int 316 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 317 { 318 struct { 319 struct ibv_flow_attr attr; 320 struct ibv_flow_spec_eth eth; 321 struct ibv_flow_spec_action_drop drop; 322 } flow_attr = { 323 .attr = { 324 .num_of_specs = 2, 325 }, 326 .eth = { 327 .type = IBV_FLOW_SPEC_ETH, 328 .size = sizeof(struct ibv_flow_spec_eth), 329 }, 330 .drop = { 331 .size = sizeof(struct ibv_flow_spec_action_drop), 332 .type = IBV_FLOW_SPEC_ACTION_DROP, 333 }, 334 }; 335 struct ibv_flow *flow; 336 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev); 337 uint16_t vprio[] = { 8, 16 }; 338 int i; 339 int priority = 0; 340 341 if (!drop) { 342 rte_errno = ENOTSUP; 343 return -rte_errno; 344 } 345 for (i = 0; i != RTE_DIM(vprio); i++) { 346 flow_attr.attr.priority = vprio[i] - 1; 347 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr); 348 if (!flow) 349 break; 350 claim_zero(mlx5_glue->destroy_flow(flow)); 351 priority = vprio[i]; 352 } 353 switch (priority) { 354 case 8: 355 priority = RTE_DIM(priority_map_3); 356 break; 357 case 16: 358 priority = RTE_DIM(priority_map_5); 359 break; 360 default: 361 rte_errno = ENOTSUP; 362 DRV_LOG(ERR, 363 "port %u verbs maximum priority: %d expected 8/16", 364 dev->data->port_id, vprio[i]); 365 return -rte_errno; 366 } 367 mlx5_hrxq_drop_release(dev); 368 DRV_LOG(INFO, "port %u flow maximum priority: %d", 369 dev->data->port_id, priority); 370 return priority; 371 } 372 373 /** 374 * Adjust flow priority based on the highest layer and the request priority. 375 * 376 * @param[in] dev 377 * Pointer to the Ethernet device structure. 378 * @param[in] priority 379 * The rule base priority. 380 * @param[in] subpriority 381 * The priority based on the items. 382 * 383 * @return 384 * The new priority. 385 */ 386 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 387 uint32_t subpriority) 388 { 389 uint32_t res = 0; 390 struct priv *priv = dev->data->dev_private; 391 392 switch (priv->config.flow_prio) { 393 case RTE_DIM(priority_map_3): 394 res = priority_map_3[priority][subpriority]; 395 break; 396 case RTE_DIM(priority_map_5): 397 res = priority_map_5[priority][subpriority]; 398 break; 399 } 400 return res; 401 } 402 403 /** 404 * Verify the @p item specifications (spec, last, mask) are compatible with the 405 * NIC capabilities. 406 * 407 * @param[in] item 408 * Item specification. 409 * @param[in] mask 410 * @p item->mask or flow default bit-masks. 411 * @param[in] nic_mask 412 * Bit-masks covering supported fields by the NIC to compare with user mask. 413 * @param[in] size 414 * Bit-masks size in bytes. 415 * @param[out] error 416 * Pointer to error structure. 417 * 418 * @return 419 * 0 on success, a negative errno value otherwise and rte_errno is set. 420 */ 421 static int 422 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 423 const uint8_t *mask, 424 const uint8_t *nic_mask, 425 unsigned int size, 426 struct rte_flow_error *error) 427 { 428 unsigned int i; 429 430 assert(nic_mask); 431 for (i = 0; i < size; ++i) 432 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 433 return rte_flow_error_set(error, ENOTSUP, 434 RTE_FLOW_ERROR_TYPE_ITEM, 435 item, 436 "mask enables non supported" 437 " bits"); 438 if (!item->spec && (item->mask || item->last)) 439 return rte_flow_error_set(error, EINVAL, 440 RTE_FLOW_ERROR_TYPE_ITEM, item, 441 "mask/last without a spec is not" 442 " supported"); 443 if (item->spec && item->last) { 444 uint8_t spec[size]; 445 uint8_t last[size]; 446 unsigned int i; 447 int ret; 448 449 for (i = 0; i < size; ++i) { 450 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 451 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 452 } 453 ret = memcmp(spec, last, size); 454 if (ret != 0) 455 return rte_flow_error_set(error, ENOTSUP, 456 RTE_FLOW_ERROR_TYPE_ITEM, 457 item, 458 "range is not supported"); 459 } 460 return 0; 461 } 462 463 /** 464 * Adjust the hash fields according to the @p flow information. 465 * 466 * @param[in] dev_flow. 467 * Pointer to the mlx5_flow. 468 * @param[in] tunnel 469 * 1 when the hash field is for a tunnel item. 470 * @param[in] layer_types 471 * ETH_RSS_* types. 472 * @param[in] hash_fields 473 * Item hash fields. 474 * 475 * @return 476 * The hash fileds that should be used. 477 */ 478 uint64_t 479 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, 480 int tunnel __rte_unused, uint32_t layer_types, 481 uint64_t hash_fields) 482 { 483 struct rte_flow *flow = dev_flow->flow; 484 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 485 int rss_request_inner = flow->rss.level >= 2; 486 487 /* Check RSS hash level for tunnel. */ 488 if (tunnel && rss_request_inner) 489 hash_fields |= IBV_RX_HASH_INNER; 490 else if (tunnel || rss_request_inner) 491 return 0; 492 #endif 493 /* Check if requested layer matches RSS hash fields. */ 494 if (!(flow->rss.types & layer_types)) 495 return 0; 496 return hash_fields; 497 } 498 499 /** 500 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 501 * if several tunnel rules are used on this queue, the tunnel ptype will be 502 * cleared. 503 * 504 * @param rxq_ctrl 505 * Rx queue to update. 506 */ 507 static void 508 mlx5_flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 509 { 510 unsigned int i; 511 uint32_t tunnel_ptype = 0; 512 513 /* Look up for the ptype to use. */ 514 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 515 if (!rxq_ctrl->flow_tunnels_n[i]) 516 continue; 517 if (!tunnel_ptype) { 518 tunnel_ptype = tunnels_info[i].ptype; 519 } else { 520 tunnel_ptype = 0; 521 break; 522 } 523 } 524 rxq_ctrl->rxq.tunnel = tunnel_ptype; 525 } 526 527 /** 528 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the flow. 529 * 530 * @param[in] dev 531 * Pointer to the Ethernet device structure. 532 * @param[in] flow 533 * Pointer to flow structure. 534 */ 535 static void 536 mlx5_flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 537 { 538 struct priv *priv = dev->data->dev_private; 539 const int mark = !!(flow->actions & 540 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 541 const int tunnel = !!(flow->layers & MLX5_FLOW_LAYER_TUNNEL); 542 unsigned int i; 543 544 for (i = 0; i != flow->rss.queue_num; ++i) { 545 int idx = (*flow->queue)[i]; 546 struct mlx5_rxq_ctrl *rxq_ctrl = 547 container_of((*priv->rxqs)[idx], 548 struct mlx5_rxq_ctrl, rxq); 549 550 if (mark) { 551 rxq_ctrl->rxq.mark = 1; 552 rxq_ctrl->flow_mark_n++; 553 } 554 if (tunnel) { 555 unsigned int j; 556 557 /* Increase the counter matching the flow. */ 558 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 559 if ((tunnels_info[j].tunnel & flow->layers) == 560 tunnels_info[j].tunnel) { 561 rxq_ctrl->flow_tunnels_n[j]++; 562 break; 563 } 564 } 565 mlx5_flow_rxq_tunnel_ptype_update(rxq_ctrl); 566 } 567 } 568 } 569 570 /** 571 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 572 * @p flow if no other flow uses it with the same kind of request. 573 * 574 * @param dev 575 * Pointer to Ethernet device. 576 * @param[in] flow 577 * Pointer to the flow. 578 */ 579 static void 580 mlx5_flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 581 { 582 struct priv *priv = dev->data->dev_private; 583 const int mark = !!(flow->actions & 584 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 585 const int tunnel = !!(flow->layers & MLX5_FLOW_LAYER_TUNNEL); 586 unsigned int i; 587 588 assert(dev->data->dev_started); 589 for (i = 0; i != flow->rss.queue_num; ++i) { 590 int idx = (*flow->queue)[i]; 591 struct mlx5_rxq_ctrl *rxq_ctrl = 592 container_of((*priv->rxqs)[idx], 593 struct mlx5_rxq_ctrl, rxq); 594 595 if (mark) { 596 rxq_ctrl->flow_mark_n--; 597 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 598 } 599 if (tunnel) { 600 unsigned int j; 601 602 /* Decrease the counter matching the flow. */ 603 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 604 if ((tunnels_info[j].tunnel & flow->layers) == 605 tunnels_info[j].tunnel) { 606 rxq_ctrl->flow_tunnels_n[j]--; 607 break; 608 } 609 } 610 mlx5_flow_rxq_tunnel_ptype_update(rxq_ctrl); 611 } 612 } 613 } 614 615 /** 616 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 617 * 618 * @param dev 619 * Pointer to Ethernet device. 620 */ 621 static void 622 mlx5_flow_rxq_flags_clear(struct rte_eth_dev *dev) 623 { 624 struct priv *priv = dev->data->dev_private; 625 unsigned int i; 626 627 for (i = 0; i != priv->rxqs_n; ++i) { 628 struct mlx5_rxq_ctrl *rxq_ctrl; 629 unsigned int j; 630 631 if (!(*priv->rxqs)[i]) 632 continue; 633 rxq_ctrl = container_of((*priv->rxqs)[i], 634 struct mlx5_rxq_ctrl, rxq); 635 rxq_ctrl->flow_mark_n = 0; 636 rxq_ctrl->rxq.mark = 0; 637 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 638 rxq_ctrl->flow_tunnels_n[j] = 0; 639 rxq_ctrl->rxq.tunnel = 0; 640 } 641 } 642 643 /* 644 * Validate the flag action. 645 * 646 * @param[in] action_flags 647 * Bit-fields that holds the actions detected until now. 648 * @param[out] error 649 * Pointer to error structure. 650 * 651 * @return 652 * 0 on success, a negative errno value otherwise and rte_errno is set. 653 */ 654 int 655 mlx5_flow_validate_action_flag(uint64_t action_flags, 656 struct rte_flow_error *error) 657 { 658 659 if (action_flags & MLX5_FLOW_ACTION_DROP) 660 return rte_flow_error_set(error, EINVAL, 661 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 662 "can't drop and flag in same flow"); 663 if (action_flags & MLX5_FLOW_ACTION_MARK) 664 return rte_flow_error_set(error, EINVAL, 665 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 666 "can't mark and flag in same flow"); 667 if (action_flags & MLX5_FLOW_ACTION_FLAG) 668 return rte_flow_error_set(error, EINVAL, 669 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 670 "can't have 2 flag" 671 " actions in same flow"); 672 return 0; 673 } 674 675 /* 676 * Validate the mark action. 677 * 678 * @param[in] action 679 * Pointer to the queue action. 680 * @param[in] action_flags 681 * Bit-fields that holds the actions detected until now. 682 * @param[out] error 683 * Pointer to error structure. 684 * 685 * @return 686 * 0 on success, a negative errno value otherwise and rte_errno is set. 687 */ 688 int 689 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 690 uint64_t action_flags, 691 struct rte_flow_error *error) 692 { 693 const struct rte_flow_action_mark *mark = action->conf; 694 695 if (!mark) 696 return rte_flow_error_set(error, EINVAL, 697 RTE_FLOW_ERROR_TYPE_ACTION, 698 action, 699 "configuration cannot be null"); 700 if (mark->id >= MLX5_FLOW_MARK_MAX) 701 return rte_flow_error_set(error, EINVAL, 702 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 703 &mark->id, 704 "mark id must in 0 <= id < " 705 RTE_STR(MLX5_FLOW_MARK_MAX)); 706 if (action_flags & MLX5_FLOW_ACTION_DROP) 707 return rte_flow_error_set(error, EINVAL, 708 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 709 "can't drop and mark in same flow"); 710 if (action_flags & MLX5_FLOW_ACTION_FLAG) 711 return rte_flow_error_set(error, EINVAL, 712 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 713 "can't flag and mark in same flow"); 714 if (action_flags & MLX5_FLOW_ACTION_MARK) 715 return rte_flow_error_set(error, EINVAL, 716 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 717 "can't have 2 mark actions in same" 718 " flow"); 719 return 0; 720 } 721 722 /* 723 * Validate the drop action. 724 * 725 * @param[in] action_flags 726 * Bit-fields that holds the actions detected until now. 727 * @param[out] error 728 * Pointer to error structure. 729 * 730 * @return 731 * 0 on success, a negative errno value otherwise and rte_ernno is set. 732 */ 733 int 734 mlx5_flow_validate_action_drop(uint64_t action_flags, 735 struct rte_flow_error *error) 736 { 737 if (action_flags & MLX5_FLOW_ACTION_FLAG) 738 return rte_flow_error_set(error, EINVAL, 739 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 740 "can't drop and flag in same flow"); 741 if (action_flags & MLX5_FLOW_ACTION_MARK) 742 return rte_flow_error_set(error, EINVAL, 743 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 744 "can't drop and mark in same flow"); 745 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 746 return rte_flow_error_set(error, EINVAL, 747 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 748 "can't have 2 fate actions in" 749 " same flow"); 750 return 0; 751 } 752 753 /* 754 * Validate the queue action. 755 * 756 * @param[in] action 757 * Pointer to the queue action. 758 * @param[in] action_flags 759 * Bit-fields that holds the actions detected until now. 760 * @param[in] dev 761 * Pointer to the Ethernet device structure. 762 * @param[out] error 763 * Pointer to error structure. 764 * 765 * @return 766 * 0 on success, a negative errno value otherwise and rte_ernno is set. 767 */ 768 int 769 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 770 uint64_t action_flags, 771 struct rte_eth_dev *dev, 772 struct rte_flow_error *error) 773 { 774 struct priv *priv = dev->data->dev_private; 775 const struct rte_flow_action_queue *queue = action->conf; 776 777 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 778 return rte_flow_error_set(error, EINVAL, 779 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 780 "can't have 2 fate actions in" 781 " same flow"); 782 if (queue->index >= priv->rxqs_n) 783 return rte_flow_error_set(error, EINVAL, 784 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 785 &queue->index, 786 "queue index out of range"); 787 if (!(*priv->rxqs)[queue->index]) 788 return rte_flow_error_set(error, EINVAL, 789 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 790 &queue->index, 791 "queue is not configured"); 792 return 0; 793 } 794 795 /* 796 * Validate the rss action. 797 * 798 * @param[in] action 799 * Pointer to the queue action. 800 * @param[in] action_flags 801 * Bit-fields that holds the actions detected until now. 802 * @param[in] dev 803 * Pointer to the Ethernet device structure. 804 * @param[out] error 805 * Pointer to error structure. 806 * 807 * @return 808 * 0 on success, a negative errno value otherwise and rte_ernno is set. 809 */ 810 int 811 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 812 uint64_t action_flags, 813 struct rte_eth_dev *dev, 814 struct rte_flow_error *error) 815 { 816 struct priv *priv = dev->data->dev_private; 817 const struct rte_flow_action_rss *rss = action->conf; 818 unsigned int i; 819 820 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 821 return rte_flow_error_set(error, EINVAL, 822 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 823 "can't have 2 fate actions" 824 " in same flow"); 825 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 826 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 827 return rte_flow_error_set(error, ENOTSUP, 828 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 829 &rss->func, 830 "RSS hash function not supported"); 831 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 832 if (rss->level > 2) 833 #else 834 if (rss->level > 1) 835 #endif 836 return rte_flow_error_set(error, ENOTSUP, 837 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 838 &rss->level, 839 "tunnel RSS is not supported"); 840 if (rss->key_len < MLX5_RSS_HASH_KEY_LEN) 841 return rte_flow_error_set(error, ENOTSUP, 842 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 843 &rss->key_len, 844 "RSS hash key too small"); 845 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 846 return rte_flow_error_set(error, ENOTSUP, 847 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 848 &rss->key_len, 849 "RSS hash key too large"); 850 if (rss->queue_num > priv->config.ind_table_max_size) 851 return rte_flow_error_set(error, ENOTSUP, 852 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 853 &rss->queue_num, 854 "number of queues too large"); 855 if (rss->types & MLX5_RSS_HF_MASK) 856 return rte_flow_error_set(error, ENOTSUP, 857 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 858 &rss->types, 859 "some RSS protocols are not" 860 " supported"); 861 for (i = 0; i != rss->queue_num; ++i) { 862 if (!(*priv->rxqs)[rss->queue[i]]) 863 return rte_flow_error_set 864 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 865 &rss->queue[i], "queue is not configured"); 866 } 867 return 0; 868 } 869 870 /* 871 * Validate the count action. 872 * 873 * @param[in] dev 874 * Pointer to the Ethernet device structure. 875 * @param[out] error 876 * Pointer to error structure. 877 * 878 * @return 879 * 0 on success, a negative errno value otherwise and rte_ernno is set. 880 */ 881 int 882 mlx5_flow_validate_action_count(struct rte_eth_dev *dev, 883 struct rte_flow_error *error) 884 { 885 struct priv *priv = dev->data->dev_private; 886 887 if (!priv->config.flow_counter_en) 888 return rte_flow_error_set(error, ENOTSUP, 889 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 890 "flow counters are not supported."); 891 return 0; 892 } 893 894 /** 895 * Verify the @p attributes will be correctly understood by the NIC and store 896 * them in the @p flow if everything is correct. 897 * 898 * @param[in] dev 899 * Pointer to the Ethernet device structure. 900 * @param[in] attributes 901 * Pointer to flow attributes 902 * @param[out] error 903 * Pointer to error structure. 904 * 905 * @return 906 * 0 on success, a negative errno value otherwise and rte_errno is set. 907 */ 908 int 909 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 910 const struct rte_flow_attr *attributes, 911 struct rte_flow_error *error) 912 { 913 struct priv *priv = dev->data->dev_private; 914 uint32_t priority_max = priv->config.flow_prio - 1; 915 916 if (attributes->group) 917 return rte_flow_error_set(error, ENOTSUP, 918 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 919 NULL, "groups is not supported"); 920 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 921 attributes->priority >= priority_max) 922 return rte_flow_error_set(error, ENOTSUP, 923 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 924 NULL, "priority out of range"); 925 if (attributes->egress) 926 return rte_flow_error_set(error, ENOTSUP, 927 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 928 "egress is not supported"); 929 if (attributes->transfer) 930 return rte_flow_error_set(error, ENOTSUP, 931 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 932 NULL, "transfer is not supported"); 933 if (!attributes->ingress) 934 return rte_flow_error_set(error, EINVAL, 935 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 936 NULL, 937 "ingress attribute is mandatory"); 938 return 0; 939 } 940 941 /** 942 * Validate Ethernet item. 943 * 944 * @param[in] item 945 * Item specification. 946 * @param[in] item_flags 947 * Bit-fields that holds the items detected until now. 948 * @param[out] error 949 * Pointer to error structure. 950 * 951 * @return 952 * 0 on success, a negative errno value otherwise and rte_errno is set. 953 */ 954 int 955 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 956 uint64_t item_flags, 957 struct rte_flow_error *error) 958 { 959 const struct rte_flow_item_eth *mask = item->mask; 960 const struct rte_flow_item_eth nic_mask = { 961 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 962 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 963 .type = RTE_BE16(0xffff), 964 }; 965 int ret; 966 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 967 968 if (item_flags & MLX5_FLOW_LAYER_OUTER_L2) 969 return rte_flow_error_set(error, ENOTSUP, 970 RTE_FLOW_ERROR_TYPE_ITEM, item, 971 "3 levels of l2 are not supported"); 972 if ((item_flags & MLX5_FLOW_LAYER_INNER_L2) && !tunnel) 973 return rte_flow_error_set(error, ENOTSUP, 974 RTE_FLOW_ERROR_TYPE_ITEM, item, 975 "2 L2 without tunnel are not supported"); 976 if (!mask) 977 mask = &rte_flow_item_eth_mask; 978 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 979 (const uint8_t *)&nic_mask, 980 sizeof(struct rte_flow_item_eth), 981 error); 982 return ret; 983 } 984 985 /** 986 * Validate VLAN item. 987 * 988 * @param[in] item 989 * Item specification. 990 * @param[in] item_flags 991 * Bit-fields that holds the items detected until now. 992 * @param[out] error 993 * Pointer to error structure. 994 * 995 * @return 996 * 0 on success, a negative errno value otherwise and rte_errno is set. 997 */ 998 int 999 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1000 int64_t item_flags, 1001 struct rte_flow_error *error) 1002 { 1003 const struct rte_flow_item_vlan *spec = item->spec; 1004 const struct rte_flow_item_vlan *mask = item->mask; 1005 const struct rte_flow_item_vlan nic_mask = { 1006 .tci = RTE_BE16(0x0fff), 1007 .inner_type = RTE_BE16(0xffff), 1008 }; 1009 uint16_t vlan_tag = 0; 1010 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1011 int ret; 1012 const uint32_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1013 MLX5_FLOW_LAYER_INNER_L4) : 1014 (MLX5_FLOW_LAYER_OUTER_L3 | 1015 MLX5_FLOW_LAYER_OUTER_L4); 1016 const uint32_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1017 MLX5_FLOW_LAYER_OUTER_VLAN; 1018 1019 if (item_flags & vlanm) 1020 return rte_flow_error_set(error, EINVAL, 1021 RTE_FLOW_ERROR_TYPE_ITEM, item, 1022 "VLAN layer already configured"); 1023 else if ((item_flags & l34m) != 0) 1024 return rte_flow_error_set(error, EINVAL, 1025 RTE_FLOW_ERROR_TYPE_ITEM, item, 1026 "L2 layer cannot follow L3/L4 layer"); 1027 if (!mask) 1028 mask = &rte_flow_item_vlan_mask; 1029 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1030 (const uint8_t *)&nic_mask, 1031 sizeof(struct rte_flow_item_vlan), 1032 error); 1033 if (ret) 1034 return ret; 1035 if (spec) { 1036 vlan_tag = spec->tci; 1037 vlan_tag &= mask->tci; 1038 } 1039 /* 1040 * From verbs perspective an empty VLAN is equivalent 1041 * to a packet without VLAN layer. 1042 */ 1043 if (!vlan_tag) 1044 return rte_flow_error_set(error, EINVAL, 1045 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1046 item->spec, 1047 "VLAN cannot be empty"); 1048 return 0; 1049 } 1050 1051 /** 1052 * Validate IPV4 item. 1053 * 1054 * @param[in] item 1055 * Item specification. 1056 * @param[in] item_flags 1057 * Bit-fields that holds the items detected until now. 1058 * @param[out] error 1059 * Pointer to error structure. 1060 * 1061 * @return 1062 * 0 on success, a negative errno value otherwise and rte_errno is set. 1063 */ 1064 int 1065 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 1066 int64_t item_flags, 1067 struct rte_flow_error *error) 1068 { 1069 const struct rte_flow_item_ipv4 *mask = item->mask; 1070 const struct rte_flow_item_ipv4 nic_mask = { 1071 .hdr = { 1072 .src_addr = RTE_BE32(0xffffffff), 1073 .dst_addr = RTE_BE32(0xffffffff), 1074 .type_of_service = 0xff, 1075 .next_proto_id = 0xff, 1076 }, 1077 }; 1078 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1079 int ret; 1080 1081 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1082 MLX5_FLOW_LAYER_OUTER_L3)) 1083 return rte_flow_error_set(error, ENOTSUP, 1084 RTE_FLOW_ERROR_TYPE_ITEM, item, 1085 "multiple L3 layers not supported"); 1086 else if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1087 MLX5_FLOW_LAYER_OUTER_L4)) 1088 return rte_flow_error_set(error, EINVAL, 1089 RTE_FLOW_ERROR_TYPE_ITEM, item, 1090 "L3 cannot follow an L4 layer."); 1091 if (!mask) 1092 mask = &rte_flow_item_ipv4_mask; 1093 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1094 (const uint8_t *)&nic_mask, 1095 sizeof(struct rte_flow_item_ipv4), 1096 error); 1097 if (ret < 0) 1098 return ret; 1099 return 0; 1100 } 1101 1102 /** 1103 * Validate IPV6 item. 1104 * 1105 * @param[in] item 1106 * Item specification. 1107 * @param[in] item_flags 1108 * Bit-fields that holds the items detected until now. 1109 * @param[out] error 1110 * Pointer to error structure. 1111 * 1112 * @return 1113 * 0 on success, a negative errno value otherwise and rte_errno is set. 1114 */ 1115 int 1116 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 1117 uint64_t item_flags, 1118 struct rte_flow_error *error) 1119 { 1120 const struct rte_flow_item_ipv6 *mask = item->mask; 1121 const struct rte_flow_item_ipv6 nic_mask = { 1122 .hdr = { 1123 .src_addr = 1124 "\xff\xff\xff\xff\xff\xff\xff\xff" 1125 "\xff\xff\xff\xff\xff\xff\xff\xff", 1126 .dst_addr = 1127 "\xff\xff\xff\xff\xff\xff\xff\xff" 1128 "\xff\xff\xff\xff\xff\xff\xff\xff", 1129 .vtc_flow = RTE_BE32(0xffffffff), 1130 .proto = 0xff, 1131 .hop_limits = 0xff, 1132 }, 1133 }; 1134 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1135 int ret; 1136 1137 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1138 MLX5_FLOW_LAYER_OUTER_L3)) 1139 return rte_flow_error_set(error, ENOTSUP, 1140 RTE_FLOW_ERROR_TYPE_ITEM, item, 1141 "multiple L3 layers not supported"); 1142 else if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1143 MLX5_FLOW_LAYER_OUTER_L4)) 1144 return rte_flow_error_set(error, EINVAL, 1145 RTE_FLOW_ERROR_TYPE_ITEM, item, 1146 "L3 cannot follow an L4 layer."); 1147 /* 1148 * IPv6 is not recognised by the NIC inside a GRE tunnel. 1149 * Such support has to be disabled as the rule will be 1150 * accepted. Issue reproduced with Mellanox OFED 4.3-3.0.2.1 and 1151 * Mellanox OFED 4.4-1.0.0.0. 1152 */ 1153 if (tunnel && item_flags & MLX5_FLOW_LAYER_GRE) 1154 return rte_flow_error_set(error, ENOTSUP, 1155 RTE_FLOW_ERROR_TYPE_ITEM, item, 1156 "IPv6 inside a GRE tunnel is" 1157 " not recognised."); 1158 if (!mask) 1159 mask = &rte_flow_item_ipv6_mask; 1160 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1161 (const uint8_t *)&nic_mask, 1162 sizeof(struct rte_flow_item_ipv6), 1163 error); 1164 if (ret < 0) 1165 return ret; 1166 return 0; 1167 } 1168 1169 /** 1170 * Validate UDP item. 1171 * 1172 * @param[in] item 1173 * Item specification. 1174 * @param[in] item_flags 1175 * Bit-fields that holds the items detected until now. 1176 * @param[in] target_protocol 1177 * The next protocol in the previous item. 1178 * @param[out] error 1179 * Pointer to error structure. 1180 * 1181 * @return 1182 * 0 on success, a negative errno value otherwise and rte_errno is set. 1183 */ 1184 int 1185 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 1186 uint64_t item_flags, 1187 uint8_t target_protocol, 1188 struct rte_flow_error *error) 1189 { 1190 const struct rte_flow_item_udp *mask = item->mask; 1191 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1192 int ret; 1193 1194 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 1195 return rte_flow_error_set(error, EINVAL, 1196 RTE_FLOW_ERROR_TYPE_ITEM, item, 1197 "protocol filtering not compatible" 1198 " with UDP layer"); 1199 if (!(item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1200 MLX5_FLOW_LAYER_OUTER_L3))) 1201 return rte_flow_error_set(error, EINVAL, 1202 RTE_FLOW_ERROR_TYPE_ITEM, item, 1203 "L3 is mandatory to filter on L4"); 1204 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1205 MLX5_FLOW_LAYER_OUTER_L4)) 1206 return rte_flow_error_set(error, EINVAL, 1207 RTE_FLOW_ERROR_TYPE_ITEM, item, 1208 "L4 layer is already present"); 1209 if (!mask) 1210 mask = &rte_flow_item_udp_mask; 1211 ret = mlx5_flow_item_acceptable 1212 (item, (const uint8_t *)mask, 1213 (const uint8_t *)&rte_flow_item_udp_mask, 1214 sizeof(struct rte_flow_item_udp), error); 1215 if (ret < 0) 1216 return ret; 1217 return 0; 1218 } 1219 1220 /** 1221 * Validate TCP item. 1222 * 1223 * @param[in] item 1224 * Item specification. 1225 * @param[in] item_flags 1226 * Bit-fields that holds the items detected until now. 1227 * @param[in] target_protocol 1228 * The next protocol in the previous item. 1229 * @param[out] error 1230 * Pointer to error structure. 1231 * 1232 * @return 1233 * 0 on success, a negative errno value otherwise and rte_errno is set. 1234 */ 1235 int 1236 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 1237 uint64_t item_flags, 1238 uint8_t target_protocol, 1239 struct rte_flow_error *error) 1240 { 1241 const struct rte_flow_item_tcp *mask = item->mask; 1242 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1243 int ret; 1244 1245 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 1246 return rte_flow_error_set(error, EINVAL, 1247 RTE_FLOW_ERROR_TYPE_ITEM, item, 1248 "protocol filtering not compatible" 1249 " with TCP layer"); 1250 if (!(item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1251 MLX5_FLOW_LAYER_OUTER_L3))) 1252 return rte_flow_error_set(error, EINVAL, 1253 RTE_FLOW_ERROR_TYPE_ITEM, item, 1254 "L3 is mandatory to filter on L4"); 1255 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1256 MLX5_FLOW_LAYER_OUTER_L4)) 1257 return rte_flow_error_set(error, EINVAL, 1258 RTE_FLOW_ERROR_TYPE_ITEM, item, 1259 "L4 layer is already present"); 1260 if (!mask) 1261 mask = &rte_flow_item_tcp_mask; 1262 ret = mlx5_flow_item_acceptable 1263 (item, (const uint8_t *)mask, 1264 (const uint8_t *)&rte_flow_item_tcp_mask, 1265 sizeof(struct rte_flow_item_tcp), error); 1266 if (ret < 0) 1267 return ret; 1268 return 0; 1269 } 1270 1271 /** 1272 * Validate VXLAN item. 1273 * 1274 * @param[in] item 1275 * Item specification. 1276 * @param[in] item_flags 1277 * Bit-fields that holds the items detected until now. 1278 * @param[in] target_protocol 1279 * The next protocol in the previous item. 1280 * @param[out] error 1281 * Pointer to error structure. 1282 * 1283 * @return 1284 * 0 on success, a negative errno value otherwise and rte_errno is set. 1285 */ 1286 int 1287 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 1288 uint64_t item_flags, 1289 struct rte_flow_error *error) 1290 { 1291 const struct rte_flow_item_vxlan *spec = item->spec; 1292 const struct rte_flow_item_vxlan *mask = item->mask; 1293 int ret; 1294 union vni { 1295 uint32_t vlan_id; 1296 uint8_t vni[4]; 1297 } id = { .vlan_id = 0, }; 1298 uint32_t vlan_id = 0; 1299 1300 1301 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1302 return rte_flow_error_set(error, ENOTSUP, 1303 RTE_FLOW_ERROR_TYPE_ITEM, item, 1304 "a tunnel is already present"); 1305 /* 1306 * Verify only UDPv4 is present as defined in 1307 * https://tools.ietf.org/html/rfc7348 1308 */ 1309 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1310 return rte_flow_error_set(error, EINVAL, 1311 RTE_FLOW_ERROR_TYPE_ITEM, item, 1312 "no outer UDP layer found"); 1313 if (!mask) 1314 mask = &rte_flow_item_vxlan_mask; 1315 ret = mlx5_flow_item_acceptable 1316 (item, (const uint8_t *)mask, 1317 (const uint8_t *)&rte_flow_item_vxlan_mask, 1318 sizeof(struct rte_flow_item_vxlan), 1319 error); 1320 if (ret < 0) 1321 return ret; 1322 if (spec) { 1323 memcpy(&id.vni[1], spec->vni, 3); 1324 vlan_id = id.vlan_id; 1325 memcpy(&id.vni[1], mask->vni, 3); 1326 vlan_id &= id.vlan_id; 1327 } 1328 /* 1329 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if 1330 * only this layer is defined in the Verbs specification it is 1331 * interpreted as wildcard and all packets will match this 1332 * rule, if it follows a full stack layer (ex: eth / ipv4 / 1333 * udp), all packets matching the layers before will also 1334 * match this rule. To avoid such situation, VNI 0 is 1335 * currently refused. 1336 */ 1337 if (!vlan_id) 1338 return rte_flow_error_set(error, ENOTSUP, 1339 RTE_FLOW_ERROR_TYPE_ITEM, item, 1340 "VXLAN vni cannot be 0"); 1341 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1342 return rte_flow_error_set(error, ENOTSUP, 1343 RTE_FLOW_ERROR_TYPE_ITEM, item, 1344 "VXLAN tunnel must be fully defined"); 1345 return 0; 1346 } 1347 1348 /** 1349 * Validate VXLAN_GPE item. 1350 * 1351 * @param[in] item 1352 * Item specification. 1353 * @param[in] item_flags 1354 * Bit-fields that holds the items detected until now. 1355 * @param[in] priv 1356 * Pointer to the private data structure. 1357 * @param[in] target_protocol 1358 * The next protocol in the previous item. 1359 * @param[out] error 1360 * Pointer to error structure. 1361 * 1362 * @return 1363 * 0 on success, a negative errno value otherwise and rte_errno is set. 1364 */ 1365 int 1366 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 1367 uint64_t item_flags, 1368 struct rte_eth_dev *dev, 1369 struct rte_flow_error *error) 1370 { 1371 struct priv *priv = dev->data->dev_private; 1372 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 1373 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 1374 int ret; 1375 union vni { 1376 uint32_t vlan_id; 1377 uint8_t vni[4]; 1378 } id = { .vlan_id = 0, }; 1379 uint32_t vlan_id = 0; 1380 1381 if (!priv->config.l3_vxlan_en) 1382 return rte_flow_error_set(error, ENOTSUP, 1383 RTE_FLOW_ERROR_TYPE_ITEM, item, 1384 "L3 VXLAN is not enabled by device" 1385 " parameter and/or not configured in" 1386 " firmware"); 1387 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1388 return rte_flow_error_set(error, ENOTSUP, 1389 RTE_FLOW_ERROR_TYPE_ITEM, item, 1390 "a tunnel is already present"); 1391 /* 1392 * Verify only UDPv4 is present as defined in 1393 * https://tools.ietf.org/html/rfc7348 1394 */ 1395 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1396 return rte_flow_error_set(error, EINVAL, 1397 RTE_FLOW_ERROR_TYPE_ITEM, item, 1398 "no outer UDP layer found"); 1399 if (!mask) 1400 mask = &rte_flow_item_vxlan_gpe_mask; 1401 ret = mlx5_flow_item_acceptable 1402 (item, (const uint8_t *)mask, 1403 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 1404 sizeof(struct rte_flow_item_vxlan_gpe), 1405 error); 1406 if (ret < 0) 1407 return ret; 1408 if (spec) { 1409 if (spec->protocol) 1410 return rte_flow_error_set(error, ENOTSUP, 1411 RTE_FLOW_ERROR_TYPE_ITEM, 1412 item, 1413 "VxLAN-GPE protocol" 1414 " not supported"); 1415 memcpy(&id.vni[1], spec->vni, 3); 1416 vlan_id = id.vlan_id; 1417 memcpy(&id.vni[1], mask->vni, 3); 1418 vlan_id &= id.vlan_id; 1419 } 1420 /* 1421 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this 1422 * layer is defined in the Verbs specification it is interpreted as 1423 * wildcard and all packets will match this rule, if it follows a full 1424 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers 1425 * before will also match this rule. To avoid such situation, VNI 0 1426 * is currently refused. 1427 */ 1428 if (!vlan_id) 1429 return rte_flow_error_set(error, ENOTSUP, 1430 RTE_FLOW_ERROR_TYPE_ITEM, item, 1431 "VXLAN-GPE vni cannot be 0"); 1432 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1433 return rte_flow_error_set(error, ENOTSUP, 1434 RTE_FLOW_ERROR_TYPE_ITEM, item, 1435 "VXLAN-GPE tunnel must be fully" 1436 " defined"); 1437 return 0; 1438 } 1439 1440 /** 1441 * Validate GRE item. 1442 * 1443 * @param[in] item 1444 * Item specification. 1445 * @param[in] item_flags 1446 * Bit flags to mark detected items. 1447 * @param[in] target_protocol 1448 * The next protocol in the previous item. 1449 * @param[out] error 1450 * Pointer to error structure. 1451 * 1452 * @return 1453 * 0 on success, a negative errno value otherwise and rte_errno is set. 1454 */ 1455 int 1456 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 1457 uint64_t item_flags, 1458 uint8_t target_protocol, 1459 struct rte_flow_error *error) 1460 { 1461 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 1462 const struct rte_flow_item_gre *mask = item->mask; 1463 int ret; 1464 1465 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 1466 return rte_flow_error_set(error, EINVAL, 1467 RTE_FLOW_ERROR_TYPE_ITEM, item, 1468 "protocol filtering not compatible" 1469 " with this GRE layer"); 1470 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1471 return rte_flow_error_set(error, ENOTSUP, 1472 RTE_FLOW_ERROR_TYPE_ITEM, item, 1473 "a tunnel is already present"); 1474 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 1475 return rte_flow_error_set(error, ENOTSUP, 1476 RTE_FLOW_ERROR_TYPE_ITEM, item, 1477 "L3 Layer is missing"); 1478 if (!mask) 1479 mask = &rte_flow_item_gre_mask; 1480 ret = mlx5_flow_item_acceptable 1481 (item, (const uint8_t *)mask, 1482 (const uint8_t *)&rte_flow_item_gre_mask, 1483 sizeof(struct rte_flow_item_gre), error); 1484 if (ret < 0) 1485 return ret; 1486 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 1487 if (spec && (spec->protocol & mask->protocol)) 1488 return rte_flow_error_set(error, ENOTSUP, 1489 RTE_FLOW_ERROR_TYPE_ITEM, item, 1490 "without MPLS support the" 1491 " specification cannot be used for" 1492 " filtering"); 1493 #endif 1494 return 0; 1495 } 1496 1497 /** 1498 * Validate MPLS item. 1499 * 1500 * @param[in] item 1501 * Item specification. 1502 * @param[in] item_flags 1503 * Bit-fields that holds the items detected until now. 1504 * @param[in] target_protocol 1505 * The next protocol in the previous item. 1506 * @param[out] error 1507 * Pointer to error structure. 1508 * 1509 * @return 1510 * 0 on success, a negative errno value otherwise and rte_errno is set. 1511 */ 1512 int 1513 mlx5_flow_validate_item_mpls(const struct rte_flow_item *item __rte_unused, 1514 uint64_t item_flags __rte_unused, 1515 uint8_t target_protocol __rte_unused, 1516 struct rte_flow_error *error) 1517 { 1518 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 1519 const struct rte_flow_item_mpls *mask = item->mask; 1520 int ret; 1521 1522 if (target_protocol != 0xff && target_protocol != IPPROTO_MPLS) 1523 return rte_flow_error_set(error, EINVAL, 1524 RTE_FLOW_ERROR_TYPE_ITEM, item, 1525 "protocol filtering not compatible" 1526 " with MPLS layer"); 1527 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1528 return rte_flow_error_set(error, ENOTSUP, 1529 RTE_FLOW_ERROR_TYPE_ITEM, item, 1530 "a tunnel is already" 1531 " present"); 1532 if (!mask) 1533 mask = &rte_flow_item_mpls_mask; 1534 ret = mlx5_flow_item_acceptable 1535 (item, (const uint8_t *)mask, 1536 (const uint8_t *)&rte_flow_item_mpls_mask, 1537 sizeof(struct rte_flow_item_mpls), error); 1538 if (ret < 0) 1539 return ret; 1540 return 0; 1541 #endif 1542 return rte_flow_error_set(error, ENOTSUP, 1543 RTE_FLOW_ERROR_TYPE_ITEM, item, 1544 "MPLS is not supported by Verbs, please" 1545 " update."); 1546 } 1547 1548 static int 1549 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 1550 const struct rte_flow_attr *attr __rte_unused, 1551 const struct rte_flow_item items[] __rte_unused, 1552 const struct rte_flow_action actions[] __rte_unused, 1553 struct rte_flow_error *error __rte_unused) 1554 { 1555 rte_errno = ENOTSUP; 1556 return -rte_errno; 1557 } 1558 1559 static struct mlx5_flow * 1560 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused, 1561 const struct rte_flow_item items[] __rte_unused, 1562 const struct rte_flow_action actions[] __rte_unused, 1563 uint64_t *item_flags __rte_unused, 1564 uint64_t *action_flags __rte_unused, 1565 struct rte_flow_error *error __rte_unused) 1566 { 1567 rte_errno = ENOTSUP; 1568 return NULL; 1569 } 1570 1571 static int 1572 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 1573 struct mlx5_flow *dev_flow __rte_unused, 1574 const struct rte_flow_attr *attr __rte_unused, 1575 const struct rte_flow_item items[] __rte_unused, 1576 const struct rte_flow_action actions[] __rte_unused, 1577 struct rte_flow_error *error __rte_unused) 1578 { 1579 rte_errno = ENOTSUP; 1580 return -rte_errno; 1581 } 1582 1583 static int 1584 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 1585 struct rte_flow *flow __rte_unused, 1586 struct rte_flow_error *error __rte_unused) 1587 { 1588 rte_errno = ENOTSUP; 1589 return -rte_errno; 1590 } 1591 1592 static void 1593 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 1594 struct rte_flow *flow __rte_unused) 1595 { 1596 } 1597 1598 static void 1599 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 1600 struct rte_flow *flow __rte_unused) 1601 { 1602 } 1603 1604 /* Void driver to protect from null pointer reference. */ 1605 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 1606 .validate = flow_null_validate, 1607 .prepare = flow_null_prepare, 1608 .translate = flow_null_translate, 1609 .apply = flow_null_apply, 1610 .remove = flow_null_remove, 1611 .destroy = flow_null_destroy, 1612 }; 1613 1614 /** 1615 * Select flow driver type according to flow attributes and device 1616 * configuration. 1617 * 1618 * @param[in] dev 1619 * Pointer to the dev structure. 1620 * @param[in] attr 1621 * Pointer to the flow attributes. 1622 * 1623 * @return 1624 * flow driver type if supported, MLX5_FLOW_TYPE_MAX otherwise. 1625 */ 1626 static enum mlx5_flow_drv_type 1627 flow_get_drv_type(struct rte_eth_dev *dev __rte_unused, 1628 const struct rte_flow_attr *attr) 1629 { 1630 struct priv *priv __rte_unused = dev->data->dev_private; 1631 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX; 1632 1633 if (attr->transfer) { 1634 type = MLX5_FLOW_TYPE_TCF; 1635 } else { 1636 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 1637 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 1638 MLX5_FLOW_TYPE_VERBS; 1639 #else 1640 type = MLX5_FLOW_TYPE_VERBS; 1641 #endif 1642 } 1643 return type; 1644 } 1645 1646 #define flow_get_drv_ops(type) flow_drv_ops[type] 1647 1648 /** 1649 * Flow driver validation API. This abstracts calling driver specific functions. 1650 * The type of flow driver is determined according to flow attributes. 1651 * 1652 * @param[in] dev 1653 * Pointer to the dev structure. 1654 * @param[in] attr 1655 * Pointer to the flow attributes. 1656 * @param[in] items 1657 * Pointer to the list of items. 1658 * @param[in] actions 1659 * Pointer to the list of actions. 1660 * @param[out] error 1661 * Pointer to the error structure. 1662 * 1663 * @return 1664 * 0 on success, a negative errno value otherwise and rte_ernno is set. 1665 */ 1666 static inline int 1667 flow_drv_validate(struct rte_eth_dev *dev, 1668 const struct rte_flow_attr *attr, 1669 const struct rte_flow_item items[], 1670 const struct rte_flow_action actions[], 1671 struct rte_flow_error *error) 1672 { 1673 const struct mlx5_flow_driver_ops *fops; 1674 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 1675 1676 fops = flow_get_drv_ops(type); 1677 return fops->validate(dev, attr, items, actions, error); 1678 } 1679 1680 /** 1681 * Flow driver preparation API. This abstracts calling driver specific 1682 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1683 * calculates the size of memory required for device flow, allocates the memory, 1684 * initializes the device flow and returns the pointer. 1685 * 1686 * @param[in] attr 1687 * Pointer to the flow attributes. 1688 * @param[in] items 1689 * Pointer to the list of items. 1690 * @param[in] actions 1691 * Pointer to the list of actions. 1692 * @param[out] item_flags 1693 * Pointer to bit mask of all items detected. 1694 * @param[out] action_flags 1695 * Pointer to bit mask of all actions detected. 1696 * @param[out] error 1697 * Pointer to the error structure. 1698 * 1699 * @return 1700 * Pointer to device flow on success, otherwise NULL and rte_ernno is set. 1701 */ 1702 static inline struct mlx5_flow * 1703 flow_drv_prepare(struct rte_flow *flow, 1704 const struct rte_flow_attr *attr, 1705 const struct rte_flow_item items[], 1706 const struct rte_flow_action actions[], 1707 uint64_t *item_flags, 1708 uint64_t *action_flags, 1709 struct rte_flow_error *error) 1710 { 1711 const struct mlx5_flow_driver_ops *fops; 1712 enum mlx5_flow_drv_type type = flow->drv_type; 1713 1714 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1715 fops = flow_get_drv_ops(type); 1716 return fops->prepare(attr, items, actions, item_flags, action_flags, 1717 error); 1718 } 1719 1720 /** 1721 * Flow driver translation API. This abstracts calling driver specific 1722 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1723 * translates a generic flow into a driver flow. flow_drv_prepare() must 1724 * precede. 1725 * 1726 * 1727 * @param[in] dev 1728 * Pointer to the rte dev structure. 1729 * @param[in, out] dev_flow 1730 * Pointer to the mlx5 flow. 1731 * @param[in] attr 1732 * Pointer to the flow attributes. 1733 * @param[in] items 1734 * Pointer to the list of items. 1735 * @param[in] actions 1736 * Pointer to the list of actions. 1737 * @param[out] error 1738 * Pointer to the error structure. 1739 * 1740 * @return 1741 * 0 on success, a negative errno value otherwise and rte_ernno is set. 1742 */ 1743 static inline int 1744 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 1745 const struct rte_flow_attr *attr, 1746 const struct rte_flow_item items[], 1747 const struct rte_flow_action actions[], 1748 struct rte_flow_error *error) 1749 { 1750 const struct mlx5_flow_driver_ops *fops; 1751 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 1752 1753 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1754 fops = flow_get_drv_ops(type); 1755 return fops->translate(dev, dev_flow, attr, items, actions, error); 1756 } 1757 1758 /** 1759 * Flow driver apply API. This abstracts calling driver specific functions. 1760 * Parent flow (rte_flow) should have driver type (drv_type). It applies 1761 * translated driver flows on to device. flow_drv_translate() must precede. 1762 * 1763 * @param[in] dev 1764 * Pointer to Ethernet device structure. 1765 * @param[in, out] flow 1766 * Pointer to flow structure. 1767 * @param[out] error 1768 * Pointer to error structure. 1769 * 1770 * @return 1771 * 0 on success, a negative errno value otherwise and rte_errno is set. 1772 */ 1773 static inline int 1774 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 1775 struct rte_flow_error *error) 1776 { 1777 const struct mlx5_flow_driver_ops *fops; 1778 enum mlx5_flow_drv_type type = flow->drv_type; 1779 1780 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1781 fops = flow_get_drv_ops(type); 1782 return fops->apply(dev, flow, error); 1783 } 1784 1785 /** 1786 * Flow driver remove API. This abstracts calling driver specific functions. 1787 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1788 * on device. All the resources of the flow should be freed by calling 1789 * flow_dv_destroy(). 1790 * 1791 * @param[in] dev 1792 * Pointer to Ethernet device. 1793 * @param[in, out] flow 1794 * Pointer to flow structure. 1795 */ 1796 static inline void 1797 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow) 1798 { 1799 const struct mlx5_flow_driver_ops *fops; 1800 enum mlx5_flow_drv_type type = flow->drv_type; 1801 1802 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1803 fops = flow_get_drv_ops(type); 1804 fops->remove(dev, flow); 1805 } 1806 1807 /** 1808 * Flow driver destroy API. This abstracts calling driver specific functions. 1809 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1810 * on device and releases resources of the flow. 1811 * 1812 * @param[in] dev 1813 * Pointer to Ethernet device. 1814 * @param[in, out] flow 1815 * Pointer to flow structure. 1816 */ 1817 static inline void 1818 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 1819 { 1820 const struct mlx5_flow_driver_ops *fops; 1821 enum mlx5_flow_drv_type type = flow->drv_type; 1822 1823 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1824 fops = flow_get_drv_ops(type); 1825 fops->destroy(dev, flow); 1826 } 1827 1828 /** 1829 * Validate a flow supported by the NIC. 1830 * 1831 * @see rte_flow_validate() 1832 * @see rte_flow_ops 1833 */ 1834 int 1835 mlx5_flow_validate(struct rte_eth_dev *dev, 1836 const struct rte_flow_attr *attr, 1837 const struct rte_flow_item items[], 1838 const struct rte_flow_action actions[], 1839 struct rte_flow_error *error) 1840 { 1841 int ret; 1842 1843 ret = flow_drv_validate(dev, attr, items, actions, error); 1844 if (ret < 0) 1845 return ret; 1846 return 0; 1847 } 1848 1849 /** 1850 * Get RSS action from the action list. 1851 * 1852 * @param[in] actions 1853 * Pointer to the list of actions. 1854 * 1855 * @return 1856 * Pointer to the RSS action if exist, else return NULL. 1857 */ 1858 static const struct rte_flow_action_rss* 1859 mlx5_flow_get_rss_action(const struct rte_flow_action actions[]) 1860 { 1861 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 1862 switch (actions->type) { 1863 case RTE_FLOW_ACTION_TYPE_RSS: 1864 return (const struct rte_flow_action_rss *) 1865 actions->conf; 1866 default: 1867 break; 1868 } 1869 } 1870 return NULL; 1871 } 1872 1873 static unsigned int 1874 mlx5_find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 1875 { 1876 const struct rte_flow_item *item; 1877 unsigned int has_vlan = 0; 1878 1879 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 1880 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 1881 has_vlan = 1; 1882 break; 1883 } 1884 } 1885 if (has_vlan) 1886 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 1887 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 1888 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 1889 MLX5_EXPANSION_ROOT_OUTER; 1890 } 1891 1892 /** 1893 * Create a flow and add it to @p list. 1894 * 1895 * @param dev 1896 * Pointer to Ethernet device. 1897 * @param list 1898 * Pointer to a TAILQ flow list. 1899 * @param[in] attr 1900 * Flow rule attributes. 1901 * @param[in] items 1902 * Pattern specification (list terminated by the END pattern item). 1903 * @param[in] actions 1904 * Associated actions (list terminated by the END action). 1905 * @param[out] error 1906 * Perform verbose error reporting if not NULL. 1907 * 1908 * @return 1909 * A flow on success, NULL otherwise and rte_errno is set. 1910 */ 1911 static struct rte_flow * 1912 mlx5_flow_list_create(struct rte_eth_dev *dev, 1913 struct mlx5_flows *list, 1914 const struct rte_flow_attr *attr, 1915 const struct rte_flow_item items[], 1916 const struct rte_flow_action actions[], 1917 struct rte_flow_error *error) 1918 { 1919 struct rte_flow *flow = NULL; 1920 struct mlx5_flow *dev_flow; 1921 uint64_t action_flags = 0; 1922 uint64_t item_flags = 0; 1923 const struct rte_flow_action_rss *rss; 1924 union { 1925 struct rte_flow_expand_rss buf; 1926 uint8_t buffer[2048]; 1927 } expand_buffer; 1928 struct rte_flow_expand_rss *buf = &expand_buffer.buf; 1929 int ret; 1930 uint32_t i; 1931 uint32_t flow_size; 1932 1933 ret = flow_drv_validate(dev, attr, items, actions, error); 1934 if (ret < 0) 1935 return NULL; 1936 flow_size = sizeof(struct rte_flow); 1937 rss = mlx5_flow_get_rss_action(actions); 1938 if (rss) 1939 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t), 1940 sizeof(void *)); 1941 else 1942 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *)); 1943 flow = rte_calloc(__func__, 1, flow_size, 0); 1944 flow->drv_type = flow_get_drv_type(dev, attr); 1945 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && 1946 flow->drv_type < MLX5_FLOW_TYPE_MAX); 1947 flow->queue = (void *)(flow + 1); 1948 LIST_INIT(&flow->dev_flows); 1949 if (rss && rss->types) { 1950 unsigned int graph_root; 1951 1952 graph_root = mlx5_find_graph_root(items, rss->level); 1953 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 1954 items, rss->types, 1955 mlx5_support_expansion, 1956 graph_root); 1957 assert(ret > 0 && 1958 (unsigned int)ret < sizeof(expand_buffer.buffer)); 1959 } else { 1960 buf->entries = 1; 1961 buf->entry[0].pattern = (void *)(uintptr_t)items; 1962 } 1963 for (i = 0; i < buf->entries; ++i) { 1964 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern, 1965 actions, &item_flags, &action_flags, 1966 error); 1967 if (!dev_flow) 1968 goto error; 1969 dev_flow->flow = flow; 1970 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next); 1971 ret = flow_drv_translate(dev, dev_flow, attr, 1972 buf->entry[i].pattern, 1973 actions, error); 1974 if (ret < 0) 1975 goto error; 1976 } 1977 if (dev->data->dev_started) { 1978 ret = flow_drv_apply(dev, flow, error); 1979 if (ret < 0) 1980 goto error; 1981 } 1982 TAILQ_INSERT_TAIL(list, flow, next); 1983 mlx5_flow_rxq_flags_set(dev, flow); 1984 return flow; 1985 error: 1986 ret = rte_errno; /* Save rte_errno before cleanup. */ 1987 assert(flow); 1988 flow_drv_destroy(dev, flow); 1989 rte_free(flow); 1990 rte_errno = ret; /* Restore rte_errno. */ 1991 return NULL; 1992 } 1993 1994 /** 1995 * Create a flow. 1996 * 1997 * @see rte_flow_create() 1998 * @see rte_flow_ops 1999 */ 2000 struct rte_flow * 2001 mlx5_flow_create(struct rte_eth_dev *dev, 2002 const struct rte_flow_attr *attr, 2003 const struct rte_flow_item items[], 2004 const struct rte_flow_action actions[], 2005 struct rte_flow_error *error) 2006 { 2007 return mlx5_flow_list_create 2008 (dev, &((struct priv *)dev->data->dev_private)->flows, 2009 attr, items, actions, error); 2010 } 2011 2012 /** 2013 * Destroy a flow in a list. 2014 * 2015 * @param dev 2016 * Pointer to Ethernet device. 2017 * @param list 2018 * Pointer to a TAILQ flow list. 2019 * @param[in] flow 2020 * Flow to destroy. 2021 */ 2022 static void 2023 mlx5_flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list, 2024 struct rte_flow *flow) 2025 { 2026 flow_drv_destroy(dev, flow); 2027 TAILQ_REMOVE(list, flow, next); 2028 /* 2029 * Update RX queue flags only if port is started, otherwise it is 2030 * already clean. 2031 */ 2032 if (dev->data->dev_started) 2033 mlx5_flow_rxq_flags_trim(dev, flow); 2034 rte_free(flow); 2035 } 2036 2037 /** 2038 * Destroy all flows. 2039 * 2040 * @param dev 2041 * Pointer to Ethernet device. 2042 * @param list 2043 * Pointer to a TAILQ flow list. 2044 */ 2045 void 2046 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list) 2047 { 2048 while (!TAILQ_EMPTY(list)) { 2049 struct rte_flow *flow; 2050 2051 flow = TAILQ_FIRST(list); 2052 mlx5_flow_list_destroy(dev, list, flow); 2053 } 2054 } 2055 2056 /** 2057 * Remove all flows. 2058 * 2059 * @param dev 2060 * Pointer to Ethernet device. 2061 * @param list 2062 * Pointer to a TAILQ flow list. 2063 */ 2064 void 2065 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list) 2066 { 2067 struct rte_flow *flow; 2068 2069 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) 2070 flow_drv_remove(dev, flow); 2071 mlx5_flow_rxq_flags_clear(dev); 2072 } 2073 2074 /** 2075 * Add all flows. 2076 * 2077 * @param dev 2078 * Pointer to Ethernet device. 2079 * @param list 2080 * Pointer to a TAILQ flow list. 2081 * 2082 * @return 2083 * 0 on success, a negative errno value otherwise and rte_errno is set. 2084 */ 2085 int 2086 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list) 2087 { 2088 struct rte_flow *flow; 2089 struct rte_flow_error error; 2090 int ret = 0; 2091 2092 TAILQ_FOREACH(flow, list, next) { 2093 ret = flow_drv_apply(dev, flow, &error); 2094 if (ret < 0) 2095 goto error; 2096 mlx5_flow_rxq_flags_set(dev, flow); 2097 } 2098 return 0; 2099 error: 2100 ret = rte_errno; /* Save rte_errno before cleanup. */ 2101 mlx5_flow_stop(dev, list); 2102 rte_errno = ret; /* Restore rte_errno. */ 2103 return -rte_errno; 2104 } 2105 2106 /** 2107 * Verify the flow list is empty 2108 * 2109 * @param dev 2110 * Pointer to Ethernet device. 2111 * 2112 * @return the number of flows not released. 2113 */ 2114 int 2115 mlx5_flow_verify(struct rte_eth_dev *dev) 2116 { 2117 struct priv *priv = dev->data->dev_private; 2118 struct rte_flow *flow; 2119 int ret = 0; 2120 2121 TAILQ_FOREACH(flow, &priv->flows, next) { 2122 DRV_LOG(DEBUG, "port %u flow %p still referenced", 2123 dev->data->port_id, (void *)flow); 2124 ++ret; 2125 } 2126 return ret; 2127 } 2128 2129 /** 2130 * Enable a control flow configured from the control plane. 2131 * 2132 * @param dev 2133 * Pointer to Ethernet device. 2134 * @param eth_spec 2135 * An Ethernet flow spec to apply. 2136 * @param eth_mask 2137 * An Ethernet flow mask to apply. 2138 * @param vlan_spec 2139 * A VLAN flow spec to apply. 2140 * @param vlan_mask 2141 * A VLAN flow mask to apply. 2142 * 2143 * @return 2144 * 0 on success, a negative errno value otherwise and rte_errno is set. 2145 */ 2146 int 2147 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 2148 struct rte_flow_item_eth *eth_spec, 2149 struct rte_flow_item_eth *eth_mask, 2150 struct rte_flow_item_vlan *vlan_spec, 2151 struct rte_flow_item_vlan *vlan_mask) 2152 { 2153 struct priv *priv = dev->data->dev_private; 2154 const struct rte_flow_attr attr = { 2155 .ingress = 1, 2156 .priority = MLX5_FLOW_PRIO_RSVD, 2157 }; 2158 struct rte_flow_item items[] = { 2159 { 2160 .type = RTE_FLOW_ITEM_TYPE_ETH, 2161 .spec = eth_spec, 2162 .last = NULL, 2163 .mask = eth_mask, 2164 }, 2165 { 2166 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 2167 RTE_FLOW_ITEM_TYPE_END, 2168 .spec = vlan_spec, 2169 .last = NULL, 2170 .mask = vlan_mask, 2171 }, 2172 { 2173 .type = RTE_FLOW_ITEM_TYPE_END, 2174 }, 2175 }; 2176 uint16_t queue[priv->reta_idx_n]; 2177 struct rte_flow_action_rss action_rss = { 2178 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 2179 .level = 0, 2180 .types = priv->rss_conf.rss_hf, 2181 .key_len = priv->rss_conf.rss_key_len, 2182 .queue_num = priv->reta_idx_n, 2183 .key = priv->rss_conf.rss_key, 2184 .queue = queue, 2185 }; 2186 struct rte_flow_action actions[] = { 2187 { 2188 .type = RTE_FLOW_ACTION_TYPE_RSS, 2189 .conf = &action_rss, 2190 }, 2191 { 2192 .type = RTE_FLOW_ACTION_TYPE_END, 2193 }, 2194 }; 2195 struct rte_flow *flow; 2196 struct rte_flow_error error; 2197 unsigned int i; 2198 2199 if (!priv->reta_idx_n) { 2200 rte_errno = EINVAL; 2201 return -rte_errno; 2202 } 2203 for (i = 0; i != priv->reta_idx_n; ++i) 2204 queue[i] = (*priv->reta_idx)[i]; 2205 flow = mlx5_flow_list_create(dev, &priv->ctrl_flows, &attr, items, 2206 actions, &error); 2207 if (!flow) 2208 return -rte_errno; 2209 return 0; 2210 } 2211 2212 /** 2213 * Enable a flow control configured from the control plane. 2214 * 2215 * @param dev 2216 * Pointer to Ethernet device. 2217 * @param eth_spec 2218 * An Ethernet flow spec to apply. 2219 * @param eth_mask 2220 * An Ethernet flow mask to apply. 2221 * 2222 * @return 2223 * 0 on success, a negative errno value otherwise and rte_errno is set. 2224 */ 2225 int 2226 mlx5_ctrl_flow(struct rte_eth_dev *dev, 2227 struct rte_flow_item_eth *eth_spec, 2228 struct rte_flow_item_eth *eth_mask) 2229 { 2230 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 2231 } 2232 2233 /** 2234 * Destroy a flow. 2235 * 2236 * @see rte_flow_destroy() 2237 * @see rte_flow_ops 2238 */ 2239 int 2240 mlx5_flow_destroy(struct rte_eth_dev *dev, 2241 struct rte_flow *flow, 2242 struct rte_flow_error *error __rte_unused) 2243 { 2244 struct priv *priv = dev->data->dev_private; 2245 2246 mlx5_flow_list_destroy(dev, &priv->flows, flow); 2247 return 0; 2248 } 2249 2250 /** 2251 * Destroy all flows. 2252 * 2253 * @see rte_flow_flush() 2254 * @see rte_flow_ops 2255 */ 2256 int 2257 mlx5_flow_flush(struct rte_eth_dev *dev, 2258 struct rte_flow_error *error __rte_unused) 2259 { 2260 struct priv *priv = dev->data->dev_private; 2261 2262 mlx5_flow_list_flush(dev, &priv->flows); 2263 return 0; 2264 } 2265 2266 /** 2267 * Isolated mode. 2268 * 2269 * @see rte_flow_isolate() 2270 * @see rte_flow_ops 2271 */ 2272 int 2273 mlx5_flow_isolate(struct rte_eth_dev *dev, 2274 int enable, 2275 struct rte_flow_error *error) 2276 { 2277 struct priv *priv = dev->data->dev_private; 2278 2279 if (dev->data->dev_started) { 2280 rte_flow_error_set(error, EBUSY, 2281 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2282 NULL, 2283 "port must be stopped first"); 2284 return -rte_errno; 2285 } 2286 priv->isolated = !!enable; 2287 if (enable) 2288 dev->dev_ops = &mlx5_dev_ops_isolate; 2289 else 2290 dev->dev_ops = &mlx5_dev_ops; 2291 return 0; 2292 } 2293 2294 /** 2295 * Query flow counter. 2296 * 2297 * @param flow 2298 * Pointer to the flow. 2299 * 2300 * @return 2301 * 0 on success, a negative errno value otherwise and rte_errno is set. 2302 */ 2303 static int 2304 mlx5_flow_query_count(struct rte_flow *flow __rte_unused, 2305 void *data __rte_unused, 2306 struct rte_flow_error *error) 2307 { 2308 #ifdef HAVE_IBV_DEVICE_COUNTERS_SET_SUPPORT 2309 if (flow->actions & MLX5_FLOW_ACTION_COUNT) { 2310 struct rte_flow_query_count *qc = data; 2311 uint64_t counters[2] = {0, 0}; 2312 struct ibv_query_counter_set_attr query_cs_attr = { 2313 .cs = flow->counter->cs, 2314 .query_flags = IBV_COUNTER_SET_FORCE_UPDATE, 2315 }; 2316 struct ibv_counter_set_data query_out = { 2317 .out = counters, 2318 .outlen = 2 * sizeof(uint64_t), 2319 }; 2320 int err = mlx5_glue->query_counter_set(&query_cs_attr, 2321 &query_out); 2322 2323 if (err) 2324 return rte_flow_error_set 2325 (error, err, 2326 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2327 NULL, 2328 "cannot read counter"); 2329 qc->hits_set = 1; 2330 qc->bytes_set = 1; 2331 qc->hits = counters[0] - flow->counter->hits; 2332 qc->bytes = counters[1] - flow->counter->bytes; 2333 if (qc->reset) { 2334 flow->counter->hits = counters[0]; 2335 flow->counter->bytes = counters[1]; 2336 } 2337 return 0; 2338 } 2339 return rte_flow_error_set(error, ENOTSUP, 2340 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2341 NULL, 2342 "flow does not have counter"); 2343 #endif 2344 return rte_flow_error_set(error, ENOTSUP, 2345 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2346 NULL, 2347 "counters are not available"); 2348 } 2349 2350 /** 2351 * Query a flows. 2352 * 2353 * @see rte_flow_query() 2354 * @see rte_flow_ops 2355 */ 2356 int 2357 mlx5_flow_query(struct rte_eth_dev *dev __rte_unused, 2358 struct rte_flow *flow, 2359 const struct rte_flow_action *actions, 2360 void *data, 2361 struct rte_flow_error *error) 2362 { 2363 int ret = 0; 2364 2365 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2366 switch (actions->type) { 2367 case RTE_FLOW_ACTION_TYPE_VOID: 2368 break; 2369 case RTE_FLOW_ACTION_TYPE_COUNT: 2370 ret = mlx5_flow_query_count(flow, data, error); 2371 break; 2372 default: 2373 return rte_flow_error_set(error, ENOTSUP, 2374 RTE_FLOW_ERROR_TYPE_ACTION, 2375 actions, 2376 "action not supported"); 2377 } 2378 if (ret < 0) 2379 return ret; 2380 } 2381 return 0; 2382 } 2383 2384 /** 2385 * Convert a flow director filter to a generic flow. 2386 * 2387 * @param dev 2388 * Pointer to Ethernet device. 2389 * @param fdir_filter 2390 * Flow director filter to add. 2391 * @param attributes 2392 * Generic flow parameters structure. 2393 * 2394 * @return 2395 * 0 on success, a negative errno value otherwise and rte_errno is set. 2396 */ 2397 static int 2398 mlx5_fdir_filter_convert(struct rte_eth_dev *dev, 2399 const struct rte_eth_fdir_filter *fdir_filter, 2400 struct mlx5_fdir *attributes) 2401 { 2402 struct priv *priv = dev->data->dev_private; 2403 const struct rte_eth_fdir_input *input = &fdir_filter->input; 2404 const struct rte_eth_fdir_masks *mask = 2405 &dev->data->dev_conf.fdir_conf.mask; 2406 2407 /* Validate queue number. */ 2408 if (fdir_filter->action.rx_queue >= priv->rxqs_n) { 2409 DRV_LOG(ERR, "port %u invalid queue number %d", 2410 dev->data->port_id, fdir_filter->action.rx_queue); 2411 rte_errno = EINVAL; 2412 return -rte_errno; 2413 } 2414 attributes->attr.ingress = 1; 2415 attributes->items[0] = (struct rte_flow_item) { 2416 .type = RTE_FLOW_ITEM_TYPE_ETH, 2417 .spec = &attributes->l2, 2418 .mask = &attributes->l2_mask, 2419 }; 2420 switch (fdir_filter->action.behavior) { 2421 case RTE_ETH_FDIR_ACCEPT: 2422 attributes->actions[0] = (struct rte_flow_action){ 2423 .type = RTE_FLOW_ACTION_TYPE_QUEUE, 2424 .conf = &attributes->queue, 2425 }; 2426 break; 2427 case RTE_ETH_FDIR_REJECT: 2428 attributes->actions[0] = (struct rte_flow_action){ 2429 .type = RTE_FLOW_ACTION_TYPE_DROP, 2430 }; 2431 break; 2432 default: 2433 DRV_LOG(ERR, "port %u invalid behavior %d", 2434 dev->data->port_id, 2435 fdir_filter->action.behavior); 2436 rte_errno = ENOTSUP; 2437 return -rte_errno; 2438 } 2439 attributes->queue.index = fdir_filter->action.rx_queue; 2440 /* Handle L3. */ 2441 switch (fdir_filter->input.flow_type) { 2442 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2443 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2444 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2445 attributes->l3.ipv4.hdr = (struct ipv4_hdr){ 2446 .src_addr = input->flow.ip4_flow.src_ip, 2447 .dst_addr = input->flow.ip4_flow.dst_ip, 2448 .time_to_live = input->flow.ip4_flow.ttl, 2449 .type_of_service = input->flow.ip4_flow.tos, 2450 }; 2451 attributes->l3_mask.ipv4.hdr = (struct ipv4_hdr){ 2452 .src_addr = mask->ipv4_mask.src_ip, 2453 .dst_addr = mask->ipv4_mask.dst_ip, 2454 .time_to_live = mask->ipv4_mask.ttl, 2455 .type_of_service = mask->ipv4_mask.tos, 2456 .next_proto_id = mask->ipv4_mask.proto, 2457 }; 2458 attributes->items[1] = (struct rte_flow_item){ 2459 .type = RTE_FLOW_ITEM_TYPE_IPV4, 2460 .spec = &attributes->l3, 2461 .mask = &attributes->l3_mask, 2462 }; 2463 break; 2464 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2465 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2466 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2467 attributes->l3.ipv6.hdr = (struct ipv6_hdr){ 2468 .hop_limits = input->flow.ipv6_flow.hop_limits, 2469 .proto = input->flow.ipv6_flow.proto, 2470 }; 2471 2472 memcpy(attributes->l3.ipv6.hdr.src_addr, 2473 input->flow.ipv6_flow.src_ip, 2474 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2475 memcpy(attributes->l3.ipv6.hdr.dst_addr, 2476 input->flow.ipv6_flow.dst_ip, 2477 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2478 memcpy(attributes->l3_mask.ipv6.hdr.src_addr, 2479 mask->ipv6_mask.src_ip, 2480 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2481 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr, 2482 mask->ipv6_mask.dst_ip, 2483 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2484 attributes->items[1] = (struct rte_flow_item){ 2485 .type = RTE_FLOW_ITEM_TYPE_IPV6, 2486 .spec = &attributes->l3, 2487 .mask = &attributes->l3_mask, 2488 }; 2489 break; 2490 default: 2491 DRV_LOG(ERR, "port %u invalid flow type%d", 2492 dev->data->port_id, fdir_filter->input.flow_type); 2493 rte_errno = ENOTSUP; 2494 return -rte_errno; 2495 } 2496 /* Handle L4. */ 2497 switch (fdir_filter->input.flow_type) { 2498 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2499 attributes->l4.udp.hdr = (struct udp_hdr){ 2500 .src_port = input->flow.udp4_flow.src_port, 2501 .dst_port = input->flow.udp4_flow.dst_port, 2502 }; 2503 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2504 .src_port = mask->src_port_mask, 2505 .dst_port = mask->dst_port_mask, 2506 }; 2507 attributes->items[2] = (struct rte_flow_item){ 2508 .type = RTE_FLOW_ITEM_TYPE_UDP, 2509 .spec = &attributes->l4, 2510 .mask = &attributes->l4_mask, 2511 }; 2512 break; 2513 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2514 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2515 .src_port = input->flow.tcp4_flow.src_port, 2516 .dst_port = input->flow.tcp4_flow.dst_port, 2517 }; 2518 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2519 .src_port = mask->src_port_mask, 2520 .dst_port = mask->dst_port_mask, 2521 }; 2522 attributes->items[2] = (struct rte_flow_item){ 2523 .type = RTE_FLOW_ITEM_TYPE_TCP, 2524 .spec = &attributes->l4, 2525 .mask = &attributes->l4_mask, 2526 }; 2527 break; 2528 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2529 attributes->l4.udp.hdr = (struct udp_hdr){ 2530 .src_port = input->flow.udp6_flow.src_port, 2531 .dst_port = input->flow.udp6_flow.dst_port, 2532 }; 2533 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2534 .src_port = mask->src_port_mask, 2535 .dst_port = mask->dst_port_mask, 2536 }; 2537 attributes->items[2] = (struct rte_flow_item){ 2538 .type = RTE_FLOW_ITEM_TYPE_UDP, 2539 .spec = &attributes->l4, 2540 .mask = &attributes->l4_mask, 2541 }; 2542 break; 2543 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2544 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2545 .src_port = input->flow.tcp6_flow.src_port, 2546 .dst_port = input->flow.tcp6_flow.dst_port, 2547 }; 2548 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2549 .src_port = mask->src_port_mask, 2550 .dst_port = mask->dst_port_mask, 2551 }; 2552 attributes->items[2] = (struct rte_flow_item){ 2553 .type = RTE_FLOW_ITEM_TYPE_TCP, 2554 .spec = &attributes->l4, 2555 .mask = &attributes->l4_mask, 2556 }; 2557 break; 2558 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2559 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2560 break; 2561 default: 2562 DRV_LOG(ERR, "port %u invalid flow type%d", 2563 dev->data->port_id, fdir_filter->input.flow_type); 2564 rte_errno = ENOTSUP; 2565 return -rte_errno; 2566 } 2567 return 0; 2568 } 2569 2570 /** 2571 * Add new flow director filter and store it in list. 2572 * 2573 * @param dev 2574 * Pointer to Ethernet device. 2575 * @param fdir_filter 2576 * Flow director filter to add. 2577 * 2578 * @return 2579 * 0 on success, a negative errno value otherwise and rte_errno is set. 2580 */ 2581 static int 2582 mlx5_fdir_filter_add(struct rte_eth_dev *dev, 2583 const struct rte_eth_fdir_filter *fdir_filter) 2584 { 2585 struct priv *priv = dev->data->dev_private; 2586 struct mlx5_fdir attributes = { 2587 .attr.group = 0, 2588 .l2_mask = { 2589 .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00", 2590 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 2591 .type = 0, 2592 }, 2593 }; 2594 struct rte_flow_error error; 2595 struct rte_flow *flow; 2596 int ret; 2597 2598 ret = mlx5_fdir_filter_convert(dev, fdir_filter, &attributes); 2599 if (ret) 2600 return ret; 2601 flow = mlx5_flow_list_create(dev, &priv->flows, &attributes.attr, 2602 attributes.items, attributes.actions, 2603 &error); 2604 if (flow) { 2605 DRV_LOG(DEBUG, "port %u FDIR created %p", dev->data->port_id, 2606 (void *)flow); 2607 return 0; 2608 } 2609 return -rte_errno; 2610 } 2611 2612 /** 2613 * Delete specific filter. 2614 * 2615 * @param dev 2616 * Pointer to Ethernet device. 2617 * @param fdir_filter 2618 * Filter to be deleted. 2619 * 2620 * @return 2621 * 0 on success, a negative errno value otherwise and rte_errno is set. 2622 */ 2623 static int 2624 mlx5_fdir_filter_delete(struct rte_eth_dev *dev __rte_unused, 2625 const struct rte_eth_fdir_filter *fdir_filter 2626 __rte_unused) 2627 { 2628 rte_errno = ENOTSUP; 2629 return -rte_errno; 2630 } 2631 2632 /** 2633 * Update queue for specific filter. 2634 * 2635 * @param dev 2636 * Pointer to Ethernet device. 2637 * @param fdir_filter 2638 * Filter to be updated. 2639 * 2640 * @return 2641 * 0 on success, a negative errno value otherwise and rte_errno is set. 2642 */ 2643 static int 2644 mlx5_fdir_filter_update(struct rte_eth_dev *dev, 2645 const struct rte_eth_fdir_filter *fdir_filter) 2646 { 2647 int ret; 2648 2649 ret = mlx5_fdir_filter_delete(dev, fdir_filter); 2650 if (ret) 2651 return ret; 2652 return mlx5_fdir_filter_add(dev, fdir_filter); 2653 } 2654 2655 /** 2656 * Flush all filters. 2657 * 2658 * @param dev 2659 * Pointer to Ethernet device. 2660 */ 2661 static void 2662 mlx5_fdir_filter_flush(struct rte_eth_dev *dev) 2663 { 2664 struct priv *priv = dev->data->dev_private; 2665 2666 mlx5_flow_list_flush(dev, &priv->flows); 2667 } 2668 2669 /** 2670 * Get flow director information. 2671 * 2672 * @param dev 2673 * Pointer to Ethernet device. 2674 * @param[out] fdir_info 2675 * Resulting flow director information. 2676 */ 2677 static void 2678 mlx5_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info) 2679 { 2680 struct rte_eth_fdir_masks *mask = 2681 &dev->data->dev_conf.fdir_conf.mask; 2682 2683 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode; 2684 fdir_info->guarant_spc = 0; 2685 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask)); 2686 fdir_info->max_flexpayload = 0; 2687 fdir_info->flow_types_mask[0] = 0; 2688 fdir_info->flex_payload_unit = 0; 2689 fdir_info->max_flex_payload_segment_num = 0; 2690 fdir_info->flex_payload_limit = 0; 2691 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf)); 2692 } 2693 2694 /** 2695 * Deal with flow director operations. 2696 * 2697 * @param dev 2698 * Pointer to Ethernet device. 2699 * @param filter_op 2700 * Operation to perform. 2701 * @param arg 2702 * Pointer to operation-specific structure. 2703 * 2704 * @return 2705 * 0 on success, a negative errno value otherwise and rte_errno is set. 2706 */ 2707 static int 2708 mlx5_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op, 2709 void *arg) 2710 { 2711 enum rte_fdir_mode fdir_mode = 2712 dev->data->dev_conf.fdir_conf.mode; 2713 2714 if (filter_op == RTE_ETH_FILTER_NOP) 2715 return 0; 2716 if (fdir_mode != RTE_FDIR_MODE_PERFECT && 2717 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) { 2718 DRV_LOG(ERR, "port %u flow director mode %d not supported", 2719 dev->data->port_id, fdir_mode); 2720 rte_errno = EINVAL; 2721 return -rte_errno; 2722 } 2723 switch (filter_op) { 2724 case RTE_ETH_FILTER_ADD: 2725 return mlx5_fdir_filter_add(dev, arg); 2726 case RTE_ETH_FILTER_UPDATE: 2727 return mlx5_fdir_filter_update(dev, arg); 2728 case RTE_ETH_FILTER_DELETE: 2729 return mlx5_fdir_filter_delete(dev, arg); 2730 case RTE_ETH_FILTER_FLUSH: 2731 mlx5_fdir_filter_flush(dev); 2732 break; 2733 case RTE_ETH_FILTER_INFO: 2734 mlx5_fdir_info_get(dev, arg); 2735 break; 2736 default: 2737 DRV_LOG(DEBUG, "port %u unknown operation %u", 2738 dev->data->port_id, filter_op); 2739 rte_errno = EINVAL; 2740 return -rte_errno; 2741 } 2742 return 0; 2743 } 2744 2745 /** 2746 * Manage filter operations. 2747 * 2748 * @param dev 2749 * Pointer to Ethernet device structure. 2750 * @param filter_type 2751 * Filter type. 2752 * @param filter_op 2753 * Operation to perform. 2754 * @param arg 2755 * Pointer to operation-specific structure. 2756 * 2757 * @return 2758 * 0 on success, a negative errno value otherwise and rte_errno is set. 2759 */ 2760 int 2761 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 2762 enum rte_filter_type filter_type, 2763 enum rte_filter_op filter_op, 2764 void *arg) 2765 { 2766 switch (filter_type) { 2767 case RTE_ETH_FILTER_GENERIC: 2768 if (filter_op != RTE_ETH_FILTER_GET) { 2769 rte_errno = EINVAL; 2770 return -rte_errno; 2771 } 2772 *(const void **)arg = &mlx5_flow_ops; 2773 return 0; 2774 case RTE_ETH_FILTER_FDIR: 2775 return mlx5_fdir_ctrl_func(dev, filter_op, arg); 2776 default: 2777 DRV_LOG(ERR, "port %u filter type (%d) not supported", 2778 dev->data->port_id, filter_type); 2779 rte_errno = ENOTSUP; 2780 return -rte_errno; 2781 } 2782 return 0; 2783 } 2784