1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 #include <stdbool.h> 12 13 #include <rte_common.h> 14 #include <rte_ether.h> 15 #include <rte_ethdev_driver.h> 16 #include <rte_eal_paging.h> 17 #include <rte_flow.h> 18 #include <rte_cycles.h> 19 #include <rte_flow_driver.h> 20 #include <rte_malloc.h> 21 #include <rte_ip.h> 22 23 #include <mlx5_glue.h> 24 #include <mlx5_devx_cmds.h> 25 #include <mlx5_prm.h> 26 #include <mlx5_malloc.h> 27 28 #include "mlx5_defs.h" 29 #include "mlx5.h" 30 #include "mlx5_flow.h" 31 #include "mlx5_flow_os.h" 32 #include "mlx5_rxtx.h" 33 #include "mlx5_common_os.h" 34 35 static struct mlx5_flow_tunnel * 36 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 37 static void 38 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 39 static const struct mlx5_flow_tbl_data_entry * 40 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark); 41 static int 42 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 43 const struct rte_flow_tunnel *app_tunnel, 44 struct mlx5_flow_tunnel **tunnel); 45 46 47 /** Device flow drivers. */ 48 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 49 50 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 51 52 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 53 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 54 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 55 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 56 #endif 57 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 58 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 59 }; 60 61 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 62 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 63 (const int []){ \ 64 __VA_ARGS__, 0, \ 65 } 66 67 /** Node object of input graph for mlx5_flow_expand_rss(). */ 68 struct mlx5_flow_expand_node { 69 const int *const next; 70 /**< 71 * List of next node indexes. Index 0 is interpreted as a terminator. 72 */ 73 const enum rte_flow_item_type type; 74 /**< Pattern item type of current node. */ 75 uint64_t rss_types; 76 /**< 77 * RSS types bit-field associated with this node 78 * (see ETH_RSS_* definitions). 79 */ 80 }; 81 82 /** Object returned by mlx5_flow_expand_rss(). */ 83 struct mlx5_flow_expand_rss { 84 uint32_t entries; 85 /**< Number of entries @p patterns and @p priorities. */ 86 struct { 87 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 88 uint32_t priority; /**< Priority offset for each expansion. */ 89 } entry[]; 90 }; 91 92 static enum rte_flow_item_type 93 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 94 { 95 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 96 uint16_t ether_type = 0; 97 uint16_t ether_type_m; 98 uint8_t ip_next_proto = 0; 99 uint8_t ip_next_proto_m; 100 101 if (item == NULL || item->spec == NULL) 102 return ret; 103 switch (item->type) { 104 case RTE_FLOW_ITEM_TYPE_ETH: 105 if (item->mask) 106 ether_type_m = ((const struct rte_flow_item_eth *) 107 (item->mask))->type; 108 else 109 ether_type_m = rte_flow_item_eth_mask.type; 110 if (ether_type_m != RTE_BE16(0xFFFF)) 111 break; 112 ether_type = ((const struct rte_flow_item_eth *) 113 (item->spec))->type; 114 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 115 ret = RTE_FLOW_ITEM_TYPE_IPV4; 116 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 117 ret = RTE_FLOW_ITEM_TYPE_IPV6; 118 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 119 ret = RTE_FLOW_ITEM_TYPE_VLAN; 120 else 121 ret = RTE_FLOW_ITEM_TYPE_END; 122 break; 123 case RTE_FLOW_ITEM_TYPE_VLAN: 124 if (item->mask) 125 ether_type_m = ((const struct rte_flow_item_vlan *) 126 (item->mask))->inner_type; 127 else 128 ether_type_m = rte_flow_item_vlan_mask.inner_type; 129 if (ether_type_m != RTE_BE16(0xFFFF)) 130 break; 131 ether_type = ((const struct rte_flow_item_vlan *) 132 (item->spec))->inner_type; 133 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 134 ret = RTE_FLOW_ITEM_TYPE_IPV4; 135 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 136 ret = RTE_FLOW_ITEM_TYPE_IPV6; 137 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 138 ret = RTE_FLOW_ITEM_TYPE_VLAN; 139 else 140 ret = RTE_FLOW_ITEM_TYPE_END; 141 break; 142 case RTE_FLOW_ITEM_TYPE_IPV4: 143 if (item->mask) 144 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 145 (item->mask))->hdr.next_proto_id; 146 else 147 ip_next_proto_m = 148 rte_flow_item_ipv4_mask.hdr.next_proto_id; 149 if (ip_next_proto_m != 0xFF) 150 break; 151 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 152 (item->spec))->hdr.next_proto_id; 153 if (ip_next_proto == IPPROTO_UDP) 154 ret = RTE_FLOW_ITEM_TYPE_UDP; 155 else if (ip_next_proto == IPPROTO_TCP) 156 ret = RTE_FLOW_ITEM_TYPE_TCP; 157 else if (ip_next_proto == IPPROTO_IP) 158 ret = RTE_FLOW_ITEM_TYPE_IPV4; 159 else if (ip_next_proto == IPPROTO_IPV6) 160 ret = RTE_FLOW_ITEM_TYPE_IPV6; 161 else 162 ret = RTE_FLOW_ITEM_TYPE_END; 163 break; 164 case RTE_FLOW_ITEM_TYPE_IPV6: 165 if (item->mask) 166 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 167 (item->mask))->hdr.proto; 168 else 169 ip_next_proto_m = 170 rte_flow_item_ipv6_mask.hdr.proto; 171 if (ip_next_proto_m != 0xFF) 172 break; 173 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 174 (item->spec))->hdr.proto; 175 if (ip_next_proto == IPPROTO_UDP) 176 ret = RTE_FLOW_ITEM_TYPE_UDP; 177 else if (ip_next_proto == IPPROTO_TCP) 178 ret = RTE_FLOW_ITEM_TYPE_TCP; 179 else if (ip_next_proto == IPPROTO_IP) 180 ret = RTE_FLOW_ITEM_TYPE_IPV4; 181 else if (ip_next_proto == IPPROTO_IPV6) 182 ret = RTE_FLOW_ITEM_TYPE_IPV6; 183 else 184 ret = RTE_FLOW_ITEM_TYPE_END; 185 break; 186 default: 187 ret = RTE_FLOW_ITEM_TYPE_VOID; 188 break; 189 } 190 return ret; 191 } 192 193 /** 194 * Expand RSS flows into several possible flows according to the RSS hash 195 * fields requested and the driver capabilities. 196 * 197 * @param[out] buf 198 * Buffer to store the result expansion. 199 * @param[in] size 200 * Buffer size in bytes. If 0, @p buf can be NULL. 201 * @param[in] pattern 202 * User flow pattern. 203 * @param[in] types 204 * RSS types to expand (see ETH_RSS_* definitions). 205 * @param[in] graph 206 * Input graph to expand @p pattern according to @p types. 207 * @param[in] graph_root_index 208 * Index of root node in @p graph, typically 0. 209 * 210 * @return 211 * A positive value representing the size of @p buf in bytes regardless of 212 * @p size on success, a negative errno value otherwise and rte_errno is 213 * set, the following errors are defined: 214 * 215 * -E2BIG: graph-depth @p graph is too deep. 216 */ 217 static int 218 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 219 const struct rte_flow_item *pattern, uint64_t types, 220 const struct mlx5_flow_expand_node graph[], 221 int graph_root_index) 222 { 223 const int elt_n = 8; 224 const struct rte_flow_item *item; 225 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 226 const int *next_node; 227 const int *stack[elt_n]; 228 int stack_pos = 0; 229 struct rte_flow_item flow_items[elt_n]; 230 unsigned int i; 231 size_t lsize; 232 size_t user_pattern_size = 0; 233 void *addr = NULL; 234 const struct mlx5_flow_expand_node *next = NULL; 235 struct rte_flow_item missed_item; 236 int missed = 0; 237 int elt = 0; 238 const struct rte_flow_item *last_item = NULL; 239 240 memset(&missed_item, 0, sizeof(missed_item)); 241 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 242 elt_n * sizeof(buf->entry[0]); 243 if (lsize <= size) { 244 buf->entry[0].priority = 0; 245 buf->entry[0].pattern = (void *)&buf->entry[elt_n]; 246 buf->entries = 0; 247 addr = buf->entry[0].pattern; 248 } 249 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 250 if (item->type != RTE_FLOW_ITEM_TYPE_VOID) 251 last_item = item; 252 for (i = 0; node->next && node->next[i]; ++i) { 253 next = &graph[node->next[i]]; 254 if (next->type == item->type) 255 break; 256 } 257 if (next) 258 node = next; 259 user_pattern_size += sizeof(*item); 260 } 261 user_pattern_size += sizeof(*item); /* Handle END item. */ 262 lsize += user_pattern_size; 263 /* Copy the user pattern in the first entry of the buffer. */ 264 if (lsize <= size) { 265 rte_memcpy(addr, pattern, user_pattern_size); 266 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 267 buf->entries = 1; 268 } 269 /* Start expanding. */ 270 memset(flow_items, 0, sizeof(flow_items)); 271 user_pattern_size -= sizeof(*item); 272 /* 273 * Check if the last valid item has spec set, need complete pattern, 274 * and the pattern can be used for expansion. 275 */ 276 missed_item.type = mlx5_flow_expand_rss_item_complete(last_item); 277 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 278 /* Item type END indicates expansion is not required. */ 279 return lsize; 280 } 281 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 282 next = NULL; 283 missed = 1; 284 for (i = 0; node->next && node->next[i]; ++i) { 285 next = &graph[node->next[i]]; 286 if (next->type == missed_item.type) { 287 flow_items[0].type = missed_item.type; 288 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 289 break; 290 } 291 next = NULL; 292 } 293 } 294 if (next && missed) { 295 elt = 2; /* missed item + item end. */ 296 node = next; 297 lsize += elt * sizeof(*item) + user_pattern_size; 298 if ((node->rss_types & types) && lsize <= size) { 299 buf->entry[buf->entries].priority = 1; 300 buf->entry[buf->entries].pattern = addr; 301 buf->entries++; 302 rte_memcpy(addr, buf->entry[0].pattern, 303 user_pattern_size); 304 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 305 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 306 addr = (void *)(((uintptr_t)addr) + 307 elt * sizeof(*item)); 308 } 309 } 310 memset(flow_items, 0, sizeof(flow_items)); 311 next_node = node->next; 312 stack[stack_pos] = next_node; 313 node = next_node ? &graph[*next_node] : NULL; 314 while (node) { 315 flow_items[stack_pos].type = node->type; 316 if (node->rss_types & types) { 317 /* 318 * compute the number of items to copy from the 319 * expansion and copy it. 320 * When the stack_pos is 0, there are 1 element in it, 321 * plus the addition END item. 322 */ 323 elt = stack_pos + 2; 324 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 325 lsize += elt * sizeof(*item) + user_pattern_size; 326 if (lsize <= size) { 327 size_t n = elt * sizeof(*item); 328 329 buf->entry[buf->entries].priority = 330 stack_pos + 1 + missed; 331 buf->entry[buf->entries].pattern = addr; 332 buf->entries++; 333 rte_memcpy(addr, buf->entry[0].pattern, 334 user_pattern_size); 335 addr = (void *)(((uintptr_t)addr) + 336 user_pattern_size); 337 rte_memcpy(addr, &missed_item, 338 missed * sizeof(*item)); 339 addr = (void *)(((uintptr_t)addr) + 340 missed * sizeof(*item)); 341 rte_memcpy(addr, flow_items, n); 342 addr = (void *)(((uintptr_t)addr) + n); 343 } 344 } 345 /* Go deeper. */ 346 if (node->next) { 347 next_node = node->next; 348 if (stack_pos++ == elt_n) { 349 rte_errno = E2BIG; 350 return -rte_errno; 351 } 352 stack[stack_pos] = next_node; 353 } else if (*(next_node + 1)) { 354 /* Follow up with the next possibility. */ 355 ++next_node; 356 } else { 357 /* Move to the next path. */ 358 if (stack_pos) 359 next_node = stack[--stack_pos]; 360 next_node++; 361 stack[stack_pos] = next_node; 362 } 363 node = *next_node ? &graph[*next_node] : NULL; 364 }; 365 /* no expanded flows but we have missed item, create one rule for it */ 366 if (buf->entries == 1 && missed != 0) { 367 elt = 2; 368 lsize += elt * sizeof(*item) + user_pattern_size; 369 if (lsize <= size) { 370 buf->entry[buf->entries].priority = 1; 371 buf->entry[buf->entries].pattern = addr; 372 buf->entries++; 373 flow_items[0].type = missed_item.type; 374 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 375 rte_memcpy(addr, buf->entry[0].pattern, 376 user_pattern_size); 377 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 378 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 379 addr = (void *)(((uintptr_t)addr) + 380 elt * sizeof(*item)); 381 } 382 } 383 return lsize; 384 } 385 386 enum mlx5_expansion { 387 MLX5_EXPANSION_ROOT, 388 MLX5_EXPANSION_ROOT_OUTER, 389 MLX5_EXPANSION_ROOT_ETH_VLAN, 390 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 391 MLX5_EXPANSION_OUTER_ETH, 392 MLX5_EXPANSION_OUTER_ETH_VLAN, 393 MLX5_EXPANSION_OUTER_VLAN, 394 MLX5_EXPANSION_OUTER_IPV4, 395 MLX5_EXPANSION_OUTER_IPV4_UDP, 396 MLX5_EXPANSION_OUTER_IPV4_TCP, 397 MLX5_EXPANSION_OUTER_IPV6, 398 MLX5_EXPANSION_OUTER_IPV6_UDP, 399 MLX5_EXPANSION_OUTER_IPV6_TCP, 400 MLX5_EXPANSION_VXLAN, 401 MLX5_EXPANSION_VXLAN_GPE, 402 MLX5_EXPANSION_GRE, 403 MLX5_EXPANSION_MPLS, 404 MLX5_EXPANSION_ETH, 405 MLX5_EXPANSION_ETH_VLAN, 406 MLX5_EXPANSION_VLAN, 407 MLX5_EXPANSION_IPV4, 408 MLX5_EXPANSION_IPV4_UDP, 409 MLX5_EXPANSION_IPV4_TCP, 410 MLX5_EXPANSION_IPV6, 411 MLX5_EXPANSION_IPV6_UDP, 412 MLX5_EXPANSION_IPV6_TCP, 413 }; 414 415 /** Supported expansion of items. */ 416 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 417 [MLX5_EXPANSION_ROOT] = { 418 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 419 MLX5_EXPANSION_IPV4, 420 MLX5_EXPANSION_IPV6), 421 .type = RTE_FLOW_ITEM_TYPE_END, 422 }, 423 [MLX5_EXPANSION_ROOT_OUTER] = { 424 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 425 MLX5_EXPANSION_OUTER_IPV4, 426 MLX5_EXPANSION_OUTER_IPV6), 427 .type = RTE_FLOW_ITEM_TYPE_END, 428 }, 429 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 430 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 431 .type = RTE_FLOW_ITEM_TYPE_END, 432 }, 433 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 434 .next = MLX5_FLOW_EXPAND_RSS_NEXT 435 (MLX5_EXPANSION_OUTER_ETH_VLAN), 436 .type = RTE_FLOW_ITEM_TYPE_END, 437 }, 438 [MLX5_EXPANSION_OUTER_ETH] = { 439 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 440 MLX5_EXPANSION_OUTER_IPV6, 441 MLX5_EXPANSION_MPLS), 442 .type = RTE_FLOW_ITEM_TYPE_ETH, 443 .rss_types = 0, 444 }, 445 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 446 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 447 .type = RTE_FLOW_ITEM_TYPE_ETH, 448 .rss_types = 0, 449 }, 450 [MLX5_EXPANSION_OUTER_VLAN] = { 451 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 452 MLX5_EXPANSION_OUTER_IPV6), 453 .type = RTE_FLOW_ITEM_TYPE_VLAN, 454 }, 455 [MLX5_EXPANSION_OUTER_IPV4] = { 456 .next = MLX5_FLOW_EXPAND_RSS_NEXT 457 (MLX5_EXPANSION_OUTER_IPV4_UDP, 458 MLX5_EXPANSION_OUTER_IPV4_TCP, 459 MLX5_EXPANSION_GRE, 460 MLX5_EXPANSION_IPV4, 461 MLX5_EXPANSION_IPV6), 462 .type = RTE_FLOW_ITEM_TYPE_IPV4, 463 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 464 ETH_RSS_NONFRAG_IPV4_OTHER, 465 }, 466 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 467 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 468 MLX5_EXPANSION_VXLAN_GPE), 469 .type = RTE_FLOW_ITEM_TYPE_UDP, 470 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 471 }, 472 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 473 .type = RTE_FLOW_ITEM_TYPE_TCP, 474 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 475 }, 476 [MLX5_EXPANSION_OUTER_IPV6] = { 477 .next = MLX5_FLOW_EXPAND_RSS_NEXT 478 (MLX5_EXPANSION_OUTER_IPV6_UDP, 479 MLX5_EXPANSION_OUTER_IPV6_TCP, 480 MLX5_EXPANSION_IPV4, 481 MLX5_EXPANSION_IPV6), 482 .type = RTE_FLOW_ITEM_TYPE_IPV6, 483 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 484 ETH_RSS_NONFRAG_IPV6_OTHER, 485 }, 486 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 487 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 488 MLX5_EXPANSION_VXLAN_GPE), 489 .type = RTE_FLOW_ITEM_TYPE_UDP, 490 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 491 }, 492 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 493 .type = RTE_FLOW_ITEM_TYPE_TCP, 494 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 495 }, 496 [MLX5_EXPANSION_VXLAN] = { 497 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 498 MLX5_EXPANSION_IPV4, 499 MLX5_EXPANSION_IPV6), 500 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 501 }, 502 [MLX5_EXPANSION_VXLAN_GPE] = { 503 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 504 MLX5_EXPANSION_IPV4, 505 MLX5_EXPANSION_IPV6), 506 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 507 }, 508 [MLX5_EXPANSION_GRE] = { 509 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 510 .type = RTE_FLOW_ITEM_TYPE_GRE, 511 }, 512 [MLX5_EXPANSION_MPLS] = { 513 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 514 MLX5_EXPANSION_IPV6), 515 .type = RTE_FLOW_ITEM_TYPE_MPLS, 516 }, 517 [MLX5_EXPANSION_ETH] = { 518 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 519 MLX5_EXPANSION_IPV6), 520 .type = RTE_FLOW_ITEM_TYPE_ETH, 521 }, 522 [MLX5_EXPANSION_ETH_VLAN] = { 523 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 524 .type = RTE_FLOW_ITEM_TYPE_ETH, 525 }, 526 [MLX5_EXPANSION_VLAN] = { 527 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 528 MLX5_EXPANSION_IPV6), 529 .type = RTE_FLOW_ITEM_TYPE_VLAN, 530 }, 531 [MLX5_EXPANSION_IPV4] = { 532 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 533 MLX5_EXPANSION_IPV4_TCP), 534 .type = RTE_FLOW_ITEM_TYPE_IPV4, 535 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 536 ETH_RSS_NONFRAG_IPV4_OTHER, 537 }, 538 [MLX5_EXPANSION_IPV4_UDP] = { 539 .type = RTE_FLOW_ITEM_TYPE_UDP, 540 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 541 }, 542 [MLX5_EXPANSION_IPV4_TCP] = { 543 .type = RTE_FLOW_ITEM_TYPE_TCP, 544 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 545 }, 546 [MLX5_EXPANSION_IPV6] = { 547 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 548 MLX5_EXPANSION_IPV6_TCP), 549 .type = RTE_FLOW_ITEM_TYPE_IPV6, 550 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 551 ETH_RSS_NONFRAG_IPV6_OTHER, 552 }, 553 [MLX5_EXPANSION_IPV6_UDP] = { 554 .type = RTE_FLOW_ITEM_TYPE_UDP, 555 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 556 }, 557 [MLX5_EXPANSION_IPV6_TCP] = { 558 .type = RTE_FLOW_ITEM_TYPE_TCP, 559 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 560 }, 561 }; 562 563 static struct rte_flow_shared_action * 564 mlx5_shared_action_create(struct rte_eth_dev *dev, 565 const struct rte_flow_shared_action_conf *conf, 566 const struct rte_flow_action *action, 567 struct rte_flow_error *error); 568 static int mlx5_shared_action_destroy 569 (struct rte_eth_dev *dev, 570 struct rte_flow_shared_action *shared_action, 571 struct rte_flow_error *error); 572 static int mlx5_shared_action_update 573 (struct rte_eth_dev *dev, 574 struct rte_flow_shared_action *shared_action, 575 const struct rte_flow_action *action, 576 struct rte_flow_error *error); 577 static int mlx5_shared_action_query 578 (struct rte_eth_dev *dev, 579 const struct rte_flow_shared_action *action, 580 void *data, 581 struct rte_flow_error *error); 582 static inline bool 583 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 584 struct rte_flow_tunnel *tunnel, 585 const char *err_msg) 586 { 587 err_msg = NULL; 588 if (!is_tunnel_offload_active(dev)) { 589 err_msg = "tunnel offload was not activated"; 590 goto out; 591 } else if (!tunnel) { 592 err_msg = "no application tunnel"; 593 goto out; 594 } 595 596 switch (tunnel->type) { 597 default: 598 err_msg = "unsupported tunnel type"; 599 goto out; 600 case RTE_FLOW_ITEM_TYPE_VXLAN: 601 break; 602 } 603 604 out: 605 return !err_msg; 606 } 607 608 609 static int 610 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 611 struct rte_flow_tunnel *app_tunnel, 612 struct rte_flow_action **actions, 613 uint32_t *num_of_actions, 614 struct rte_flow_error *error) 615 { 616 int ret; 617 struct mlx5_flow_tunnel *tunnel; 618 const char *err_msg = NULL; 619 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 620 621 if (!verdict) 622 return rte_flow_error_set(error, EINVAL, 623 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 624 err_msg); 625 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 626 if (ret < 0) { 627 return rte_flow_error_set(error, ret, 628 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 629 "failed to initialize pmd tunnel"); 630 } 631 *actions = &tunnel->action; 632 *num_of_actions = 1; 633 return 0; 634 } 635 636 static int 637 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 638 struct rte_flow_tunnel *app_tunnel, 639 struct rte_flow_item **items, 640 uint32_t *num_of_items, 641 struct rte_flow_error *error) 642 { 643 int ret; 644 struct mlx5_flow_tunnel *tunnel; 645 const char *err_msg = NULL; 646 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 647 648 if (!verdict) 649 return rte_flow_error_set(error, EINVAL, 650 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 651 err_msg); 652 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 653 if (ret < 0) { 654 return rte_flow_error_set(error, ret, 655 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 656 "failed to initialize pmd tunnel"); 657 } 658 *items = &tunnel->item; 659 *num_of_items = 1; 660 return 0; 661 } 662 663 static int 664 mlx5_flow_item_release(struct rte_eth_dev *dev, 665 struct rte_flow_item *pmd_items, 666 uint32_t num_items, struct rte_flow_error *err) 667 { 668 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 669 struct mlx5_flow_tunnel *tun; 670 671 LIST_FOREACH(tun, &thub->tunnels, chain) { 672 if (&tun->item == pmd_items) 673 break; 674 } 675 if (!tun || num_items != 1) 676 return rte_flow_error_set(err, EINVAL, 677 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 678 "invalid argument"); 679 if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED)) 680 mlx5_flow_tunnel_free(dev, tun); 681 return 0; 682 } 683 684 static int 685 mlx5_flow_action_release(struct rte_eth_dev *dev, 686 struct rte_flow_action *pmd_actions, 687 uint32_t num_actions, struct rte_flow_error *err) 688 { 689 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 690 struct mlx5_flow_tunnel *tun; 691 692 LIST_FOREACH(tun, &thub->tunnels, chain) { 693 if (&tun->action == pmd_actions) 694 break; 695 } 696 if (!tun || num_actions != 1) 697 return rte_flow_error_set(err, EINVAL, 698 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 699 "invalid argument"); 700 if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED)) 701 mlx5_flow_tunnel_free(dev, tun); 702 703 return 0; 704 } 705 706 static int 707 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 708 struct rte_mbuf *m, 709 struct rte_flow_restore_info *info, 710 struct rte_flow_error *err) 711 { 712 uint64_t ol_flags = m->ol_flags; 713 const struct mlx5_flow_tbl_data_entry *tble; 714 const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID; 715 716 if ((ol_flags & mask) != mask) 717 goto err; 718 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 719 if (!tble) { 720 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 721 dev->data->port_id, m->hash.fdir.hi); 722 goto err; 723 } 724 MLX5_ASSERT(tble->tunnel); 725 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 726 info->group_id = tble->group_id; 727 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 728 RTE_FLOW_RESTORE_INFO_GROUP_ID | 729 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 730 731 return 0; 732 733 err: 734 return rte_flow_error_set(err, EINVAL, 735 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 736 "failed to get restore info"); 737 } 738 739 static const struct rte_flow_ops mlx5_flow_ops = { 740 .validate = mlx5_flow_validate, 741 .create = mlx5_flow_create, 742 .destroy = mlx5_flow_destroy, 743 .flush = mlx5_flow_flush, 744 .isolate = mlx5_flow_isolate, 745 .query = mlx5_flow_query, 746 .dev_dump = mlx5_flow_dev_dump, 747 .get_aged_flows = mlx5_flow_get_aged_flows, 748 .shared_action_create = mlx5_shared_action_create, 749 .shared_action_destroy = mlx5_shared_action_destroy, 750 .shared_action_update = mlx5_shared_action_update, 751 .shared_action_query = mlx5_shared_action_query, 752 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 753 .tunnel_match = mlx5_flow_tunnel_match, 754 .tunnel_action_decap_release = mlx5_flow_action_release, 755 .tunnel_item_release = mlx5_flow_item_release, 756 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 757 }; 758 759 /* Convert FDIR request to Generic flow. */ 760 struct mlx5_fdir { 761 struct rte_flow_attr attr; 762 struct rte_flow_item items[4]; 763 struct rte_flow_item_eth l2; 764 struct rte_flow_item_eth l2_mask; 765 union { 766 struct rte_flow_item_ipv4 ipv4; 767 struct rte_flow_item_ipv6 ipv6; 768 } l3; 769 union { 770 struct rte_flow_item_ipv4 ipv4; 771 struct rte_flow_item_ipv6 ipv6; 772 } l3_mask; 773 union { 774 struct rte_flow_item_udp udp; 775 struct rte_flow_item_tcp tcp; 776 } l4; 777 union { 778 struct rte_flow_item_udp udp; 779 struct rte_flow_item_tcp tcp; 780 } l4_mask; 781 struct rte_flow_action actions[2]; 782 struct rte_flow_action_queue queue; 783 }; 784 785 /* Tunnel information. */ 786 struct mlx5_flow_tunnel_info { 787 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 788 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 789 }; 790 791 static struct mlx5_flow_tunnel_info tunnels_info[] = { 792 { 793 .tunnel = MLX5_FLOW_LAYER_VXLAN, 794 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 795 }, 796 { 797 .tunnel = MLX5_FLOW_LAYER_GENEVE, 798 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 799 }, 800 { 801 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 802 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 803 }, 804 { 805 .tunnel = MLX5_FLOW_LAYER_GRE, 806 .ptype = RTE_PTYPE_TUNNEL_GRE, 807 }, 808 { 809 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 810 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 811 }, 812 { 813 .tunnel = MLX5_FLOW_LAYER_MPLS, 814 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 815 }, 816 { 817 .tunnel = MLX5_FLOW_LAYER_NVGRE, 818 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 819 }, 820 { 821 .tunnel = MLX5_FLOW_LAYER_IPIP, 822 .ptype = RTE_PTYPE_TUNNEL_IP, 823 }, 824 { 825 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 826 .ptype = RTE_PTYPE_TUNNEL_IP, 827 }, 828 { 829 .tunnel = MLX5_FLOW_LAYER_GTP, 830 .ptype = RTE_PTYPE_TUNNEL_GTPU, 831 }, 832 }; 833 834 /** 835 * Translate tag ID to register. 836 * 837 * @param[in] dev 838 * Pointer to the Ethernet device structure. 839 * @param[in] feature 840 * The feature that request the register. 841 * @param[in] id 842 * The request register ID. 843 * @param[out] error 844 * Error description in case of any. 845 * 846 * @return 847 * The request register on success, a negative errno 848 * value otherwise and rte_errno is set. 849 */ 850 int 851 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 852 enum mlx5_feature_name feature, 853 uint32_t id, 854 struct rte_flow_error *error) 855 { 856 struct mlx5_priv *priv = dev->data->dev_private; 857 struct mlx5_dev_config *config = &priv->config; 858 enum modify_reg start_reg; 859 bool skip_mtr_reg = false; 860 861 switch (feature) { 862 case MLX5_HAIRPIN_RX: 863 return REG_B; 864 case MLX5_HAIRPIN_TX: 865 return REG_A; 866 case MLX5_METADATA_RX: 867 switch (config->dv_xmeta_en) { 868 case MLX5_XMETA_MODE_LEGACY: 869 return REG_B; 870 case MLX5_XMETA_MODE_META16: 871 return REG_C_0; 872 case MLX5_XMETA_MODE_META32: 873 return REG_C_1; 874 } 875 break; 876 case MLX5_METADATA_TX: 877 return REG_A; 878 case MLX5_METADATA_FDB: 879 switch (config->dv_xmeta_en) { 880 case MLX5_XMETA_MODE_LEGACY: 881 return REG_NON; 882 case MLX5_XMETA_MODE_META16: 883 return REG_C_0; 884 case MLX5_XMETA_MODE_META32: 885 return REG_C_1; 886 } 887 break; 888 case MLX5_FLOW_MARK: 889 switch (config->dv_xmeta_en) { 890 case MLX5_XMETA_MODE_LEGACY: 891 return REG_NON; 892 case MLX5_XMETA_MODE_META16: 893 return REG_C_1; 894 case MLX5_XMETA_MODE_META32: 895 return REG_C_0; 896 } 897 break; 898 case MLX5_MTR_SFX: 899 /* 900 * If meter color and flow match share one register, flow match 901 * should use the meter color register for match. 902 */ 903 if (priv->mtr_reg_share) 904 return priv->mtr_color_reg; 905 else 906 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 907 REG_C_3; 908 case MLX5_MTR_COLOR: 909 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 910 return priv->mtr_color_reg; 911 case MLX5_COPY_MARK: 912 /* 913 * Metadata COPY_MARK register using is in meter suffix sub 914 * flow while with meter. It's safe to share the same register. 915 */ 916 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 917 case MLX5_APP_TAG: 918 /* 919 * If meter is enable, it will engage the register for color 920 * match and flow match. If meter color match is not using the 921 * REG_C_2, need to skip the REG_C_x be used by meter color 922 * match. 923 * If meter is disable, free to use all available registers. 924 */ 925 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 926 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 927 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 928 if (id > (REG_C_7 - start_reg)) 929 return rte_flow_error_set(error, EINVAL, 930 RTE_FLOW_ERROR_TYPE_ITEM, 931 NULL, "invalid tag id"); 932 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 933 return rte_flow_error_set(error, ENOTSUP, 934 RTE_FLOW_ERROR_TYPE_ITEM, 935 NULL, "unsupported tag id"); 936 /* 937 * This case means meter is using the REG_C_x great than 2. 938 * Take care not to conflict with meter color REG_C_x. 939 * If the available index REG_C_y >= REG_C_x, skip the 940 * color register. 941 */ 942 if (skip_mtr_reg && config->flow_mreg_c 943 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 944 if (id >= (REG_C_7 - start_reg)) 945 return rte_flow_error_set(error, EINVAL, 946 RTE_FLOW_ERROR_TYPE_ITEM, 947 NULL, "invalid tag id"); 948 if (config->flow_mreg_c 949 [id + 1 + start_reg - REG_C_0] != REG_NON) 950 return config->flow_mreg_c 951 [id + 1 + start_reg - REG_C_0]; 952 return rte_flow_error_set(error, ENOTSUP, 953 RTE_FLOW_ERROR_TYPE_ITEM, 954 NULL, "unsupported tag id"); 955 } 956 return config->flow_mreg_c[id + start_reg - REG_C_0]; 957 } 958 MLX5_ASSERT(false); 959 return rte_flow_error_set(error, EINVAL, 960 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 961 NULL, "invalid feature name"); 962 } 963 964 /** 965 * Check extensive flow metadata register support. 966 * 967 * @param dev 968 * Pointer to rte_eth_dev structure. 969 * 970 * @return 971 * True if device supports extensive flow metadata register, otherwise false. 972 */ 973 bool 974 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 975 { 976 struct mlx5_priv *priv = dev->data->dev_private; 977 struct mlx5_dev_config *config = &priv->config; 978 979 /* 980 * Having available reg_c can be regarded inclusively as supporting 981 * extensive flow metadata register, which could mean, 982 * - metadata register copy action by modify header. 983 * - 16 modify header actions is supported. 984 * - reg_c's are preserved across different domain (FDB and NIC) on 985 * packet loopback by flow lookup miss. 986 */ 987 return config->flow_mreg_c[2] != REG_NON; 988 } 989 990 /** 991 * Verify the @p item specifications (spec, last, mask) are compatible with the 992 * NIC capabilities. 993 * 994 * @param[in] item 995 * Item specification. 996 * @param[in] mask 997 * @p item->mask or flow default bit-masks. 998 * @param[in] nic_mask 999 * Bit-masks covering supported fields by the NIC to compare with user mask. 1000 * @param[in] size 1001 * Bit-masks size in bytes. 1002 * @param[in] range_accepted 1003 * True if range of values is accepted for specific fields, false otherwise. 1004 * @param[out] error 1005 * Pointer to error structure. 1006 * 1007 * @return 1008 * 0 on success, a negative errno value otherwise and rte_errno is set. 1009 */ 1010 int 1011 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 1012 const uint8_t *mask, 1013 const uint8_t *nic_mask, 1014 unsigned int size, 1015 bool range_accepted, 1016 struct rte_flow_error *error) 1017 { 1018 unsigned int i; 1019 1020 MLX5_ASSERT(nic_mask); 1021 for (i = 0; i < size; ++i) 1022 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 1023 return rte_flow_error_set(error, ENOTSUP, 1024 RTE_FLOW_ERROR_TYPE_ITEM, 1025 item, 1026 "mask enables non supported" 1027 " bits"); 1028 if (!item->spec && (item->mask || item->last)) 1029 return rte_flow_error_set(error, EINVAL, 1030 RTE_FLOW_ERROR_TYPE_ITEM, item, 1031 "mask/last without a spec is not" 1032 " supported"); 1033 if (item->spec && item->last && !range_accepted) { 1034 uint8_t spec[size]; 1035 uint8_t last[size]; 1036 unsigned int i; 1037 int ret; 1038 1039 for (i = 0; i < size; ++i) { 1040 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 1041 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 1042 } 1043 ret = memcmp(spec, last, size); 1044 if (ret != 0) 1045 return rte_flow_error_set(error, EINVAL, 1046 RTE_FLOW_ERROR_TYPE_ITEM, 1047 item, 1048 "range is not valid"); 1049 } 1050 return 0; 1051 } 1052 1053 /** 1054 * Adjust the hash fields according to the @p flow information. 1055 * 1056 * @param[in] dev_flow. 1057 * Pointer to the mlx5_flow. 1058 * @param[in] tunnel 1059 * 1 when the hash field is for a tunnel item. 1060 * @param[in] layer_types 1061 * ETH_RSS_* types. 1062 * @param[in] hash_fields 1063 * Item hash fields. 1064 * 1065 * @return 1066 * The hash fields that should be used. 1067 */ 1068 uint64_t 1069 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 1070 int tunnel __rte_unused, uint64_t layer_types, 1071 uint64_t hash_fields) 1072 { 1073 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1074 int rss_request_inner = rss_desc->level >= 2; 1075 1076 /* Check RSS hash level for tunnel. */ 1077 if (tunnel && rss_request_inner) 1078 hash_fields |= IBV_RX_HASH_INNER; 1079 else if (tunnel || rss_request_inner) 1080 return 0; 1081 #endif 1082 /* Check if requested layer matches RSS hash fields. */ 1083 if (!(rss_desc->types & layer_types)) 1084 return 0; 1085 return hash_fields; 1086 } 1087 1088 /** 1089 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 1090 * if several tunnel rules are used on this queue, the tunnel ptype will be 1091 * cleared. 1092 * 1093 * @param rxq_ctrl 1094 * Rx queue to update. 1095 */ 1096 static void 1097 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1098 { 1099 unsigned int i; 1100 uint32_t tunnel_ptype = 0; 1101 1102 /* Look up for the ptype to use. */ 1103 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1104 if (!rxq_ctrl->flow_tunnels_n[i]) 1105 continue; 1106 if (!tunnel_ptype) { 1107 tunnel_ptype = tunnels_info[i].ptype; 1108 } else { 1109 tunnel_ptype = 0; 1110 break; 1111 } 1112 } 1113 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1114 } 1115 1116 /** 1117 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1118 * flow. 1119 * 1120 * @param[in] dev 1121 * Pointer to the Ethernet device structure. 1122 * @param[in] dev_handle 1123 * Pointer to device flow handle structure. 1124 */ 1125 static void 1126 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1127 struct mlx5_flow_handle *dev_handle) 1128 { 1129 struct mlx5_priv *priv = dev->data->dev_private; 1130 const int mark = dev_handle->mark; 1131 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1132 struct mlx5_hrxq *hrxq; 1133 unsigned int i; 1134 1135 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE) 1136 return; 1137 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1138 dev_handle->rix_hrxq); 1139 if (!hrxq) 1140 return; 1141 for (i = 0; i != hrxq->ind_table->queues_n; ++i) { 1142 int idx = hrxq->ind_table->queues[i]; 1143 struct mlx5_rxq_ctrl *rxq_ctrl = 1144 container_of((*priv->rxqs)[idx], 1145 struct mlx5_rxq_ctrl, rxq); 1146 1147 /* 1148 * To support metadata register copy on Tx loopback, 1149 * this must be always enabled (metadata may arive 1150 * from other port - not from local flows only. 1151 */ 1152 if (priv->config.dv_flow_en && 1153 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1154 mlx5_flow_ext_mreg_supported(dev)) { 1155 rxq_ctrl->rxq.mark = 1; 1156 rxq_ctrl->flow_mark_n = 1; 1157 } else if (mark) { 1158 rxq_ctrl->rxq.mark = 1; 1159 rxq_ctrl->flow_mark_n++; 1160 } 1161 if (tunnel) { 1162 unsigned int j; 1163 1164 /* Increase the counter matching the flow. */ 1165 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1166 if ((tunnels_info[j].tunnel & 1167 dev_handle->layers) == 1168 tunnels_info[j].tunnel) { 1169 rxq_ctrl->flow_tunnels_n[j]++; 1170 break; 1171 } 1172 } 1173 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1174 } 1175 } 1176 } 1177 1178 /** 1179 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1180 * 1181 * @param[in] dev 1182 * Pointer to the Ethernet device structure. 1183 * @param[in] flow 1184 * Pointer to flow structure. 1185 */ 1186 static void 1187 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1188 { 1189 struct mlx5_priv *priv = dev->data->dev_private; 1190 uint32_t handle_idx; 1191 struct mlx5_flow_handle *dev_handle; 1192 1193 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1194 handle_idx, dev_handle, next) 1195 flow_drv_rxq_flags_set(dev, dev_handle); 1196 } 1197 1198 /** 1199 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1200 * device flow if no other flow uses it with the same kind of request. 1201 * 1202 * @param dev 1203 * Pointer to Ethernet device. 1204 * @param[in] dev_handle 1205 * Pointer to the device flow handle structure. 1206 */ 1207 static void 1208 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1209 struct mlx5_flow_handle *dev_handle) 1210 { 1211 struct mlx5_priv *priv = dev->data->dev_private; 1212 const int mark = dev_handle->mark; 1213 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1214 struct mlx5_hrxq *hrxq; 1215 unsigned int i; 1216 1217 if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE) 1218 return; 1219 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1220 dev_handle->rix_hrxq); 1221 if (!hrxq) 1222 return; 1223 MLX5_ASSERT(dev->data->dev_started); 1224 for (i = 0; i != hrxq->ind_table->queues_n; ++i) { 1225 int idx = hrxq->ind_table->queues[i]; 1226 struct mlx5_rxq_ctrl *rxq_ctrl = 1227 container_of((*priv->rxqs)[idx], 1228 struct mlx5_rxq_ctrl, rxq); 1229 1230 if (priv->config.dv_flow_en && 1231 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1232 mlx5_flow_ext_mreg_supported(dev)) { 1233 rxq_ctrl->rxq.mark = 1; 1234 rxq_ctrl->flow_mark_n = 1; 1235 } else if (mark) { 1236 rxq_ctrl->flow_mark_n--; 1237 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1238 } 1239 if (tunnel) { 1240 unsigned int j; 1241 1242 /* Decrease the counter matching the flow. */ 1243 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1244 if ((tunnels_info[j].tunnel & 1245 dev_handle->layers) == 1246 tunnels_info[j].tunnel) { 1247 rxq_ctrl->flow_tunnels_n[j]--; 1248 break; 1249 } 1250 } 1251 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1252 } 1253 } 1254 } 1255 1256 /** 1257 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1258 * @p flow if no other flow uses it with the same kind of request. 1259 * 1260 * @param dev 1261 * Pointer to Ethernet device. 1262 * @param[in] flow 1263 * Pointer to the flow. 1264 */ 1265 static void 1266 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1267 { 1268 struct mlx5_priv *priv = dev->data->dev_private; 1269 uint32_t handle_idx; 1270 struct mlx5_flow_handle *dev_handle; 1271 1272 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1273 handle_idx, dev_handle, next) 1274 flow_drv_rxq_flags_trim(dev, dev_handle); 1275 } 1276 1277 /** 1278 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1279 * 1280 * @param dev 1281 * Pointer to Ethernet device. 1282 */ 1283 static void 1284 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1285 { 1286 struct mlx5_priv *priv = dev->data->dev_private; 1287 unsigned int i; 1288 1289 for (i = 0; i != priv->rxqs_n; ++i) { 1290 struct mlx5_rxq_ctrl *rxq_ctrl; 1291 unsigned int j; 1292 1293 if (!(*priv->rxqs)[i]) 1294 continue; 1295 rxq_ctrl = container_of((*priv->rxqs)[i], 1296 struct mlx5_rxq_ctrl, rxq); 1297 rxq_ctrl->flow_mark_n = 0; 1298 rxq_ctrl->rxq.mark = 0; 1299 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1300 rxq_ctrl->flow_tunnels_n[j] = 0; 1301 rxq_ctrl->rxq.tunnel = 0; 1302 } 1303 } 1304 1305 /** 1306 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1307 * 1308 * @param[in] dev 1309 * Pointer to the Ethernet device structure. 1310 */ 1311 void 1312 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1313 { 1314 struct mlx5_priv *priv = dev->data->dev_private; 1315 struct mlx5_rxq_data *data; 1316 unsigned int i; 1317 1318 for (i = 0; i != priv->rxqs_n; ++i) { 1319 if (!(*priv->rxqs)[i]) 1320 continue; 1321 data = (*priv->rxqs)[i]; 1322 if (!rte_flow_dynf_metadata_avail()) { 1323 data->dynf_meta = 0; 1324 data->flow_meta_mask = 0; 1325 data->flow_meta_offset = -1; 1326 } else { 1327 data->dynf_meta = 1; 1328 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1329 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1330 } 1331 } 1332 } 1333 1334 /* 1335 * return a pointer to the desired action in the list of actions. 1336 * 1337 * @param[in] actions 1338 * The list of actions to search the action in. 1339 * @param[in] action 1340 * The action to find. 1341 * 1342 * @return 1343 * Pointer to the action in the list, if found. NULL otherwise. 1344 */ 1345 const struct rte_flow_action * 1346 mlx5_flow_find_action(const struct rte_flow_action *actions, 1347 enum rte_flow_action_type action) 1348 { 1349 if (actions == NULL) 1350 return NULL; 1351 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1352 if (actions->type == action) 1353 return actions; 1354 return NULL; 1355 } 1356 1357 /* 1358 * Validate the flag action. 1359 * 1360 * @param[in] action_flags 1361 * Bit-fields that holds the actions detected until now. 1362 * @param[in] attr 1363 * Attributes of flow that includes this action. 1364 * @param[out] error 1365 * Pointer to error structure. 1366 * 1367 * @return 1368 * 0 on success, a negative errno value otherwise and rte_errno is set. 1369 */ 1370 int 1371 mlx5_flow_validate_action_flag(uint64_t action_flags, 1372 const struct rte_flow_attr *attr, 1373 struct rte_flow_error *error) 1374 { 1375 if (action_flags & MLX5_FLOW_ACTION_MARK) 1376 return rte_flow_error_set(error, EINVAL, 1377 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1378 "can't mark and flag in same flow"); 1379 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1380 return rte_flow_error_set(error, EINVAL, 1381 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1382 "can't have 2 flag" 1383 " actions in same flow"); 1384 if (attr->egress) 1385 return rte_flow_error_set(error, ENOTSUP, 1386 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1387 "flag action not supported for " 1388 "egress"); 1389 return 0; 1390 } 1391 1392 /* 1393 * Validate the mark action. 1394 * 1395 * @param[in] action 1396 * Pointer to the queue action. 1397 * @param[in] action_flags 1398 * Bit-fields that holds the actions detected until now. 1399 * @param[in] attr 1400 * Attributes of flow that includes this action. 1401 * @param[out] error 1402 * Pointer to error structure. 1403 * 1404 * @return 1405 * 0 on success, a negative errno value otherwise and rte_errno is set. 1406 */ 1407 int 1408 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1409 uint64_t action_flags, 1410 const struct rte_flow_attr *attr, 1411 struct rte_flow_error *error) 1412 { 1413 const struct rte_flow_action_mark *mark = action->conf; 1414 1415 if (!mark) 1416 return rte_flow_error_set(error, EINVAL, 1417 RTE_FLOW_ERROR_TYPE_ACTION, 1418 action, 1419 "configuration cannot be null"); 1420 if (mark->id >= MLX5_FLOW_MARK_MAX) 1421 return rte_flow_error_set(error, EINVAL, 1422 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1423 &mark->id, 1424 "mark id must in 0 <= id < " 1425 RTE_STR(MLX5_FLOW_MARK_MAX)); 1426 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1427 return rte_flow_error_set(error, EINVAL, 1428 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1429 "can't flag and mark in same flow"); 1430 if (action_flags & MLX5_FLOW_ACTION_MARK) 1431 return rte_flow_error_set(error, EINVAL, 1432 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1433 "can't have 2 mark actions in same" 1434 " flow"); 1435 if (attr->egress) 1436 return rte_flow_error_set(error, ENOTSUP, 1437 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1438 "mark action not supported for " 1439 "egress"); 1440 return 0; 1441 } 1442 1443 /* 1444 * Validate the drop action. 1445 * 1446 * @param[in] action_flags 1447 * Bit-fields that holds the actions detected until now. 1448 * @param[in] attr 1449 * Attributes of flow that includes this action. 1450 * @param[out] error 1451 * Pointer to error structure. 1452 * 1453 * @return 1454 * 0 on success, a negative errno value otherwise and rte_errno is set. 1455 */ 1456 int 1457 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1458 const struct rte_flow_attr *attr, 1459 struct rte_flow_error *error) 1460 { 1461 if (attr->egress) 1462 return rte_flow_error_set(error, ENOTSUP, 1463 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1464 "drop action not supported for " 1465 "egress"); 1466 return 0; 1467 } 1468 1469 /* 1470 * Validate the queue action. 1471 * 1472 * @param[in] action 1473 * Pointer to the queue action. 1474 * @param[in] action_flags 1475 * Bit-fields that holds the actions detected until now. 1476 * @param[in] dev 1477 * Pointer to the Ethernet device structure. 1478 * @param[in] attr 1479 * Attributes of flow that includes this action. 1480 * @param[out] error 1481 * Pointer to error structure. 1482 * 1483 * @return 1484 * 0 on success, a negative errno value otherwise and rte_errno is set. 1485 */ 1486 int 1487 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1488 uint64_t action_flags, 1489 struct rte_eth_dev *dev, 1490 const struct rte_flow_attr *attr, 1491 struct rte_flow_error *error) 1492 { 1493 struct mlx5_priv *priv = dev->data->dev_private; 1494 const struct rte_flow_action_queue *queue = action->conf; 1495 1496 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1497 return rte_flow_error_set(error, EINVAL, 1498 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1499 "can't have 2 fate actions in" 1500 " same flow"); 1501 if (!priv->rxqs_n) 1502 return rte_flow_error_set(error, EINVAL, 1503 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1504 NULL, "No Rx queues configured"); 1505 if (queue->index >= priv->rxqs_n) 1506 return rte_flow_error_set(error, EINVAL, 1507 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1508 &queue->index, 1509 "queue index out of range"); 1510 if (!(*priv->rxqs)[queue->index]) 1511 return rte_flow_error_set(error, EINVAL, 1512 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1513 &queue->index, 1514 "queue is not configured"); 1515 if (attr->egress) 1516 return rte_flow_error_set(error, ENOTSUP, 1517 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1518 "queue action not supported for " 1519 "egress"); 1520 return 0; 1521 } 1522 1523 /* 1524 * Validate the rss action. 1525 * 1526 * @param[in] dev 1527 * Pointer to the Ethernet device structure. 1528 * @param[in] action 1529 * Pointer to the queue action. 1530 * @param[out] error 1531 * Pointer to error structure. 1532 * 1533 * @return 1534 * 0 on success, a negative errno value otherwise and rte_errno is set. 1535 */ 1536 int 1537 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1538 const struct rte_flow_action *action, 1539 struct rte_flow_error *error) 1540 { 1541 struct mlx5_priv *priv = dev->data->dev_private; 1542 const struct rte_flow_action_rss *rss = action->conf; 1543 unsigned int i; 1544 1545 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1546 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1547 return rte_flow_error_set(error, ENOTSUP, 1548 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1549 &rss->func, 1550 "RSS hash function not supported"); 1551 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1552 if (rss->level > 2) 1553 #else 1554 if (rss->level > 1) 1555 #endif 1556 return rte_flow_error_set(error, ENOTSUP, 1557 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1558 &rss->level, 1559 "tunnel RSS is not supported"); 1560 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1561 if (rss->key_len == 0 && rss->key != NULL) 1562 return rte_flow_error_set(error, ENOTSUP, 1563 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1564 &rss->key_len, 1565 "RSS hash key length 0"); 1566 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1567 return rte_flow_error_set(error, ENOTSUP, 1568 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1569 &rss->key_len, 1570 "RSS hash key too small"); 1571 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1572 return rte_flow_error_set(error, ENOTSUP, 1573 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1574 &rss->key_len, 1575 "RSS hash key too large"); 1576 if (rss->queue_num > priv->config.ind_table_max_size) 1577 return rte_flow_error_set(error, ENOTSUP, 1578 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1579 &rss->queue_num, 1580 "number of queues too large"); 1581 if (rss->types & MLX5_RSS_HF_MASK) 1582 return rte_flow_error_set(error, ENOTSUP, 1583 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1584 &rss->types, 1585 "some RSS protocols are not" 1586 " supported"); 1587 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) && 1588 !(rss->types & ETH_RSS_IP)) 1589 return rte_flow_error_set(error, EINVAL, 1590 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1591 "L3 partial RSS requested but L3 RSS" 1592 " type not specified"); 1593 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) && 1594 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP))) 1595 return rte_flow_error_set(error, EINVAL, 1596 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1597 "L4 partial RSS requested but L4 RSS" 1598 " type not specified"); 1599 if (!priv->rxqs_n) 1600 return rte_flow_error_set(error, EINVAL, 1601 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1602 NULL, "No Rx queues configured"); 1603 if (!rss->queue_num) 1604 return rte_flow_error_set(error, EINVAL, 1605 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1606 NULL, "No queues configured"); 1607 for (i = 0; i != rss->queue_num; ++i) { 1608 if (rss->queue[i] >= priv->rxqs_n) 1609 return rte_flow_error_set 1610 (error, EINVAL, 1611 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1612 &rss->queue[i], "queue index out of range"); 1613 if (!(*priv->rxqs)[rss->queue[i]]) 1614 return rte_flow_error_set 1615 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1616 &rss->queue[i], "queue is not configured"); 1617 } 1618 return 0; 1619 } 1620 1621 /* 1622 * Validate the rss action. 1623 * 1624 * @param[in] action 1625 * Pointer to the queue action. 1626 * @param[in] action_flags 1627 * Bit-fields that holds the actions detected until now. 1628 * @param[in] dev 1629 * Pointer to the Ethernet device structure. 1630 * @param[in] attr 1631 * Attributes of flow that includes this action. 1632 * @param[in] item_flags 1633 * Items that were detected. 1634 * @param[out] error 1635 * Pointer to error structure. 1636 * 1637 * @return 1638 * 0 on success, a negative errno value otherwise and rte_errno is set. 1639 */ 1640 int 1641 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1642 uint64_t action_flags, 1643 struct rte_eth_dev *dev, 1644 const struct rte_flow_attr *attr, 1645 uint64_t item_flags, 1646 struct rte_flow_error *error) 1647 { 1648 const struct rte_flow_action_rss *rss = action->conf; 1649 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1650 int ret; 1651 1652 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1653 return rte_flow_error_set(error, EINVAL, 1654 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1655 "can't have 2 fate actions" 1656 " in same flow"); 1657 ret = mlx5_validate_action_rss(dev, action, error); 1658 if (ret) 1659 return ret; 1660 if (attr->egress) 1661 return rte_flow_error_set(error, ENOTSUP, 1662 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1663 "rss action not supported for " 1664 "egress"); 1665 if (rss->level > 1 && !tunnel) 1666 return rte_flow_error_set(error, EINVAL, 1667 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1668 "inner RSS is not supported for " 1669 "non-tunnel flows"); 1670 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1671 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1672 return rte_flow_error_set(error, EINVAL, 1673 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1674 "RSS on eCPRI is not supported now"); 1675 } 1676 return 0; 1677 } 1678 1679 /* 1680 * Validate the default miss action. 1681 * 1682 * @param[in] action_flags 1683 * Bit-fields that holds the actions detected until now. 1684 * @param[out] error 1685 * Pointer to error structure. 1686 * 1687 * @return 1688 * 0 on success, a negative errno value otherwise and rte_errno is set. 1689 */ 1690 int 1691 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1692 const struct rte_flow_attr *attr, 1693 struct rte_flow_error *error) 1694 { 1695 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1696 return rte_flow_error_set(error, EINVAL, 1697 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1698 "can't have 2 fate actions in" 1699 " same flow"); 1700 if (attr->egress) 1701 return rte_flow_error_set(error, ENOTSUP, 1702 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1703 "default miss action not supported " 1704 "for egress"); 1705 if (attr->group) 1706 return rte_flow_error_set(error, ENOTSUP, 1707 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1708 "only group 0 is supported"); 1709 if (attr->transfer) 1710 return rte_flow_error_set(error, ENOTSUP, 1711 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1712 NULL, "transfer is not supported"); 1713 return 0; 1714 } 1715 1716 /* 1717 * Validate the count action. 1718 * 1719 * @param[in] dev 1720 * Pointer to the Ethernet device structure. 1721 * @param[in] attr 1722 * Attributes of flow that includes this action. 1723 * @param[out] error 1724 * Pointer to error structure. 1725 * 1726 * @return 1727 * 0 on success, a negative errno value otherwise and rte_errno is set. 1728 */ 1729 int 1730 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1731 const struct rte_flow_attr *attr, 1732 struct rte_flow_error *error) 1733 { 1734 if (attr->egress) 1735 return rte_flow_error_set(error, ENOTSUP, 1736 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1737 "count action not supported for " 1738 "egress"); 1739 return 0; 1740 } 1741 1742 /** 1743 * Verify the @p attributes will be correctly understood by the NIC and store 1744 * them in the @p flow if everything is correct. 1745 * 1746 * @param[in] dev 1747 * Pointer to the Ethernet device structure. 1748 * @param[in] attributes 1749 * Pointer to flow attributes 1750 * @param[out] error 1751 * Pointer to error structure. 1752 * 1753 * @return 1754 * 0 on success, a negative errno value otherwise and rte_errno is set. 1755 */ 1756 int 1757 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1758 const struct rte_flow_attr *attributes, 1759 struct rte_flow_error *error) 1760 { 1761 struct mlx5_priv *priv = dev->data->dev_private; 1762 uint32_t priority_max = priv->config.flow_prio - 1; 1763 1764 if (attributes->group) 1765 return rte_flow_error_set(error, ENOTSUP, 1766 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1767 NULL, "groups is not supported"); 1768 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 1769 attributes->priority >= priority_max) 1770 return rte_flow_error_set(error, ENOTSUP, 1771 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1772 NULL, "priority out of range"); 1773 if (attributes->egress) 1774 return rte_flow_error_set(error, ENOTSUP, 1775 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1776 "egress is not supported"); 1777 if (attributes->transfer && !priv->config.dv_esw_en) 1778 return rte_flow_error_set(error, ENOTSUP, 1779 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1780 NULL, "transfer is not supported"); 1781 if (!attributes->ingress) 1782 return rte_flow_error_set(error, EINVAL, 1783 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1784 NULL, 1785 "ingress attribute is mandatory"); 1786 return 0; 1787 } 1788 1789 /** 1790 * Validate ICMP6 item. 1791 * 1792 * @param[in] item 1793 * Item specification. 1794 * @param[in] item_flags 1795 * Bit-fields that holds the items detected until now. 1796 * @param[out] error 1797 * Pointer to error structure. 1798 * 1799 * @return 1800 * 0 on success, a negative errno value otherwise and rte_errno is set. 1801 */ 1802 int 1803 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1804 uint64_t item_flags, 1805 uint8_t target_protocol, 1806 struct rte_flow_error *error) 1807 { 1808 const struct rte_flow_item_icmp6 *mask = item->mask; 1809 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1810 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1811 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1812 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1813 MLX5_FLOW_LAYER_OUTER_L4; 1814 int ret; 1815 1816 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1817 return rte_flow_error_set(error, EINVAL, 1818 RTE_FLOW_ERROR_TYPE_ITEM, item, 1819 "protocol filtering not compatible" 1820 " with ICMP6 layer"); 1821 if (!(item_flags & l3m)) 1822 return rte_flow_error_set(error, EINVAL, 1823 RTE_FLOW_ERROR_TYPE_ITEM, item, 1824 "IPv6 is mandatory to filter on" 1825 " ICMP6"); 1826 if (item_flags & l4m) 1827 return rte_flow_error_set(error, EINVAL, 1828 RTE_FLOW_ERROR_TYPE_ITEM, item, 1829 "multiple L4 layers not supported"); 1830 if (!mask) 1831 mask = &rte_flow_item_icmp6_mask; 1832 ret = mlx5_flow_item_acceptable 1833 (item, (const uint8_t *)mask, 1834 (const uint8_t *)&rte_flow_item_icmp6_mask, 1835 sizeof(struct rte_flow_item_icmp6), 1836 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1837 if (ret < 0) 1838 return ret; 1839 return 0; 1840 } 1841 1842 /** 1843 * Validate ICMP item. 1844 * 1845 * @param[in] item 1846 * Item specification. 1847 * @param[in] item_flags 1848 * Bit-fields that holds the items detected until now. 1849 * @param[out] error 1850 * Pointer to error structure. 1851 * 1852 * @return 1853 * 0 on success, a negative errno value otherwise and rte_errno is set. 1854 */ 1855 int 1856 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1857 uint64_t item_flags, 1858 uint8_t target_protocol, 1859 struct rte_flow_error *error) 1860 { 1861 const struct rte_flow_item_icmp *mask = item->mask; 1862 const struct rte_flow_item_icmp nic_mask = { 1863 .hdr.icmp_type = 0xff, 1864 .hdr.icmp_code = 0xff, 1865 .hdr.icmp_ident = RTE_BE16(0xffff), 1866 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 1867 }; 1868 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1869 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1870 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1871 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1872 MLX5_FLOW_LAYER_OUTER_L4; 1873 int ret; 1874 1875 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1876 return rte_flow_error_set(error, EINVAL, 1877 RTE_FLOW_ERROR_TYPE_ITEM, item, 1878 "protocol filtering not compatible" 1879 " with ICMP layer"); 1880 if (!(item_flags & l3m)) 1881 return rte_flow_error_set(error, EINVAL, 1882 RTE_FLOW_ERROR_TYPE_ITEM, item, 1883 "IPv4 is mandatory to filter" 1884 " on ICMP"); 1885 if (item_flags & l4m) 1886 return rte_flow_error_set(error, EINVAL, 1887 RTE_FLOW_ERROR_TYPE_ITEM, item, 1888 "multiple L4 layers not supported"); 1889 if (!mask) 1890 mask = &nic_mask; 1891 ret = mlx5_flow_item_acceptable 1892 (item, (const uint8_t *)mask, 1893 (const uint8_t *)&nic_mask, 1894 sizeof(struct rte_flow_item_icmp), 1895 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1896 if (ret < 0) 1897 return ret; 1898 return 0; 1899 } 1900 1901 /** 1902 * Validate Ethernet item. 1903 * 1904 * @param[in] item 1905 * Item specification. 1906 * @param[in] item_flags 1907 * Bit-fields that holds the items detected until now. 1908 * @param[out] error 1909 * Pointer to error structure. 1910 * 1911 * @return 1912 * 0 on success, a negative errno value otherwise and rte_errno is set. 1913 */ 1914 int 1915 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1916 uint64_t item_flags, 1917 struct rte_flow_error *error) 1918 { 1919 const struct rte_flow_item_eth *mask = item->mask; 1920 const struct rte_flow_item_eth nic_mask = { 1921 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1922 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1923 .type = RTE_BE16(0xffff), 1924 }; 1925 int ret; 1926 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1927 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1928 MLX5_FLOW_LAYER_OUTER_L2; 1929 1930 if (item_flags & ethm) 1931 return rte_flow_error_set(error, ENOTSUP, 1932 RTE_FLOW_ERROR_TYPE_ITEM, item, 1933 "multiple L2 layers not supported"); 1934 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 1935 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 1936 return rte_flow_error_set(error, EINVAL, 1937 RTE_FLOW_ERROR_TYPE_ITEM, item, 1938 "L2 layer should not follow " 1939 "L3 layers"); 1940 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 1941 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 1942 return rte_flow_error_set(error, EINVAL, 1943 RTE_FLOW_ERROR_TYPE_ITEM, item, 1944 "L2 layer should not follow VLAN"); 1945 if (!mask) 1946 mask = &rte_flow_item_eth_mask; 1947 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1948 (const uint8_t *)&nic_mask, 1949 sizeof(struct rte_flow_item_eth), 1950 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1951 return ret; 1952 } 1953 1954 /** 1955 * Validate VLAN item. 1956 * 1957 * @param[in] item 1958 * Item specification. 1959 * @param[in] item_flags 1960 * Bit-fields that holds the items detected until now. 1961 * @param[in] dev 1962 * Ethernet device flow is being created on. 1963 * @param[out] error 1964 * Pointer to error structure. 1965 * 1966 * @return 1967 * 0 on success, a negative errno value otherwise and rte_errno is set. 1968 */ 1969 int 1970 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1971 uint64_t item_flags, 1972 struct rte_eth_dev *dev, 1973 struct rte_flow_error *error) 1974 { 1975 const struct rte_flow_item_vlan *spec = item->spec; 1976 const struct rte_flow_item_vlan *mask = item->mask; 1977 const struct rte_flow_item_vlan nic_mask = { 1978 .tci = RTE_BE16(UINT16_MAX), 1979 .inner_type = RTE_BE16(UINT16_MAX), 1980 }; 1981 uint16_t vlan_tag = 0; 1982 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1983 int ret; 1984 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1985 MLX5_FLOW_LAYER_INNER_L4) : 1986 (MLX5_FLOW_LAYER_OUTER_L3 | 1987 MLX5_FLOW_LAYER_OUTER_L4); 1988 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1989 MLX5_FLOW_LAYER_OUTER_VLAN; 1990 1991 if (item_flags & vlanm) 1992 return rte_flow_error_set(error, EINVAL, 1993 RTE_FLOW_ERROR_TYPE_ITEM, item, 1994 "multiple VLAN layers not supported"); 1995 else if ((item_flags & l34m) != 0) 1996 return rte_flow_error_set(error, EINVAL, 1997 RTE_FLOW_ERROR_TYPE_ITEM, item, 1998 "VLAN cannot follow L3/L4 layer"); 1999 if (!mask) 2000 mask = &rte_flow_item_vlan_mask; 2001 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2002 (const uint8_t *)&nic_mask, 2003 sizeof(struct rte_flow_item_vlan), 2004 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2005 if (ret) 2006 return ret; 2007 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 2008 struct mlx5_priv *priv = dev->data->dev_private; 2009 2010 if (priv->vmwa_context) { 2011 /* 2012 * Non-NULL context means we have a virtual machine 2013 * and SR-IOV enabled, we have to create VLAN interface 2014 * to make hypervisor to setup E-Switch vport 2015 * context correctly. We avoid creating the multiple 2016 * VLAN interfaces, so we cannot support VLAN tag mask. 2017 */ 2018 return rte_flow_error_set(error, EINVAL, 2019 RTE_FLOW_ERROR_TYPE_ITEM, 2020 item, 2021 "VLAN tag mask is not" 2022 " supported in virtual" 2023 " environment"); 2024 } 2025 } 2026 if (spec) { 2027 vlan_tag = spec->tci; 2028 vlan_tag &= mask->tci; 2029 } 2030 /* 2031 * From verbs perspective an empty VLAN is equivalent 2032 * to a packet without VLAN layer. 2033 */ 2034 if (!vlan_tag) 2035 return rte_flow_error_set(error, EINVAL, 2036 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 2037 item->spec, 2038 "VLAN cannot be empty"); 2039 return 0; 2040 } 2041 2042 /** 2043 * Validate IPV4 item. 2044 * 2045 * @param[in] item 2046 * Item specification. 2047 * @param[in] item_flags 2048 * Bit-fields that holds the items detected until now. 2049 * @param[in] last_item 2050 * Previous validated item in the pattern items. 2051 * @param[in] ether_type 2052 * Type in the ethernet layer header (including dot1q). 2053 * @param[in] acc_mask 2054 * Acceptable mask, if NULL default internal default mask 2055 * will be used to check whether item fields are supported. 2056 * @param[in] range_accepted 2057 * True if range of values is accepted for specific fields, false otherwise. 2058 * @param[out] error 2059 * Pointer to error structure. 2060 * 2061 * @return 2062 * 0 on success, a negative errno value otherwise and rte_errno is set. 2063 */ 2064 int 2065 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2066 uint64_t item_flags, 2067 uint64_t last_item, 2068 uint16_t ether_type, 2069 const struct rte_flow_item_ipv4 *acc_mask, 2070 bool range_accepted, 2071 struct rte_flow_error *error) 2072 { 2073 const struct rte_flow_item_ipv4 *mask = item->mask; 2074 const struct rte_flow_item_ipv4 *spec = item->spec; 2075 const struct rte_flow_item_ipv4 nic_mask = { 2076 .hdr = { 2077 .src_addr = RTE_BE32(0xffffffff), 2078 .dst_addr = RTE_BE32(0xffffffff), 2079 .type_of_service = 0xff, 2080 .next_proto_id = 0xff, 2081 }, 2082 }; 2083 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2084 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2085 MLX5_FLOW_LAYER_OUTER_L3; 2086 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2087 MLX5_FLOW_LAYER_OUTER_L4; 2088 int ret; 2089 uint8_t next_proto = 0xFF; 2090 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2091 MLX5_FLOW_LAYER_OUTER_VLAN | 2092 MLX5_FLOW_LAYER_INNER_VLAN); 2093 2094 if ((last_item & l2_vlan) && ether_type && 2095 ether_type != RTE_ETHER_TYPE_IPV4) 2096 return rte_flow_error_set(error, EINVAL, 2097 RTE_FLOW_ERROR_TYPE_ITEM, item, 2098 "IPv4 cannot follow L2/VLAN layer " 2099 "which ether type is not IPv4"); 2100 if (item_flags & MLX5_FLOW_LAYER_IPIP) { 2101 if (mask && spec) 2102 next_proto = mask->hdr.next_proto_id & 2103 spec->hdr.next_proto_id; 2104 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2105 return rte_flow_error_set(error, EINVAL, 2106 RTE_FLOW_ERROR_TYPE_ITEM, 2107 item, 2108 "multiple tunnel " 2109 "not supported"); 2110 } 2111 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2112 return rte_flow_error_set(error, EINVAL, 2113 RTE_FLOW_ERROR_TYPE_ITEM, item, 2114 "wrong tunnel type - IPv6 specified " 2115 "but IPv4 item provided"); 2116 if (item_flags & l3m) 2117 return rte_flow_error_set(error, ENOTSUP, 2118 RTE_FLOW_ERROR_TYPE_ITEM, item, 2119 "multiple L3 layers not supported"); 2120 else if (item_flags & l4m) 2121 return rte_flow_error_set(error, EINVAL, 2122 RTE_FLOW_ERROR_TYPE_ITEM, item, 2123 "L3 cannot follow an L4 layer."); 2124 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2125 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2126 return rte_flow_error_set(error, EINVAL, 2127 RTE_FLOW_ERROR_TYPE_ITEM, item, 2128 "L3 cannot follow an NVGRE layer."); 2129 if (!mask) 2130 mask = &rte_flow_item_ipv4_mask; 2131 else if (mask->hdr.next_proto_id != 0 && 2132 mask->hdr.next_proto_id != 0xff) 2133 return rte_flow_error_set(error, EINVAL, 2134 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2135 "partial mask is not supported" 2136 " for protocol"); 2137 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2138 acc_mask ? (const uint8_t *)acc_mask 2139 : (const uint8_t *)&nic_mask, 2140 sizeof(struct rte_flow_item_ipv4), 2141 range_accepted, error); 2142 if (ret < 0) 2143 return ret; 2144 return 0; 2145 } 2146 2147 /** 2148 * Validate IPV6 item. 2149 * 2150 * @param[in] item 2151 * Item specification. 2152 * @param[in] item_flags 2153 * Bit-fields that holds the items detected until now. 2154 * @param[in] last_item 2155 * Previous validated item in the pattern items. 2156 * @param[in] ether_type 2157 * Type in the ethernet layer header (including dot1q). 2158 * @param[in] acc_mask 2159 * Acceptable mask, if NULL default internal default mask 2160 * will be used to check whether item fields are supported. 2161 * @param[out] error 2162 * Pointer to error structure. 2163 * 2164 * @return 2165 * 0 on success, a negative errno value otherwise and rte_errno is set. 2166 */ 2167 int 2168 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2169 uint64_t item_flags, 2170 uint64_t last_item, 2171 uint16_t ether_type, 2172 const struct rte_flow_item_ipv6 *acc_mask, 2173 struct rte_flow_error *error) 2174 { 2175 const struct rte_flow_item_ipv6 *mask = item->mask; 2176 const struct rte_flow_item_ipv6 *spec = item->spec; 2177 const struct rte_flow_item_ipv6 nic_mask = { 2178 .hdr = { 2179 .src_addr = 2180 "\xff\xff\xff\xff\xff\xff\xff\xff" 2181 "\xff\xff\xff\xff\xff\xff\xff\xff", 2182 .dst_addr = 2183 "\xff\xff\xff\xff\xff\xff\xff\xff" 2184 "\xff\xff\xff\xff\xff\xff\xff\xff", 2185 .vtc_flow = RTE_BE32(0xffffffff), 2186 .proto = 0xff, 2187 }, 2188 }; 2189 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2190 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2191 MLX5_FLOW_LAYER_OUTER_L3; 2192 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2193 MLX5_FLOW_LAYER_OUTER_L4; 2194 int ret; 2195 uint8_t next_proto = 0xFF; 2196 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2197 MLX5_FLOW_LAYER_OUTER_VLAN | 2198 MLX5_FLOW_LAYER_INNER_VLAN); 2199 2200 if ((last_item & l2_vlan) && ether_type && 2201 ether_type != RTE_ETHER_TYPE_IPV6) 2202 return rte_flow_error_set(error, EINVAL, 2203 RTE_FLOW_ERROR_TYPE_ITEM, item, 2204 "IPv6 cannot follow L2/VLAN layer " 2205 "which ether type is not IPv6"); 2206 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2207 next_proto = spec->hdr.proto; 2208 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) { 2209 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2210 return rte_flow_error_set(error, EINVAL, 2211 RTE_FLOW_ERROR_TYPE_ITEM, 2212 item, 2213 "multiple tunnel " 2214 "not supported"); 2215 } 2216 if (next_proto == IPPROTO_HOPOPTS || 2217 next_proto == IPPROTO_ROUTING || 2218 next_proto == IPPROTO_FRAGMENT || 2219 next_proto == IPPROTO_ESP || 2220 next_proto == IPPROTO_AH || 2221 next_proto == IPPROTO_DSTOPTS) 2222 return rte_flow_error_set(error, EINVAL, 2223 RTE_FLOW_ERROR_TYPE_ITEM, item, 2224 "IPv6 proto (next header) should " 2225 "not be set as extension header"); 2226 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2227 return rte_flow_error_set(error, EINVAL, 2228 RTE_FLOW_ERROR_TYPE_ITEM, item, 2229 "wrong tunnel type - IPv4 specified " 2230 "but IPv6 item provided"); 2231 if (item_flags & l3m) 2232 return rte_flow_error_set(error, ENOTSUP, 2233 RTE_FLOW_ERROR_TYPE_ITEM, item, 2234 "multiple L3 layers not supported"); 2235 else if (item_flags & l4m) 2236 return rte_flow_error_set(error, EINVAL, 2237 RTE_FLOW_ERROR_TYPE_ITEM, item, 2238 "L3 cannot follow an L4 layer."); 2239 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2240 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2241 return rte_flow_error_set(error, EINVAL, 2242 RTE_FLOW_ERROR_TYPE_ITEM, item, 2243 "L3 cannot follow an NVGRE layer."); 2244 if (!mask) 2245 mask = &rte_flow_item_ipv6_mask; 2246 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2247 acc_mask ? (const uint8_t *)acc_mask 2248 : (const uint8_t *)&nic_mask, 2249 sizeof(struct rte_flow_item_ipv6), 2250 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2251 if (ret < 0) 2252 return ret; 2253 return 0; 2254 } 2255 2256 /** 2257 * Validate UDP item. 2258 * 2259 * @param[in] item 2260 * Item specification. 2261 * @param[in] item_flags 2262 * Bit-fields that holds the items detected until now. 2263 * @param[in] target_protocol 2264 * The next protocol in the previous item. 2265 * @param[in] flow_mask 2266 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2267 * @param[out] error 2268 * Pointer to error structure. 2269 * 2270 * @return 2271 * 0 on success, a negative errno value otherwise and rte_errno is set. 2272 */ 2273 int 2274 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2275 uint64_t item_flags, 2276 uint8_t target_protocol, 2277 struct rte_flow_error *error) 2278 { 2279 const struct rte_flow_item_udp *mask = item->mask; 2280 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2281 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2282 MLX5_FLOW_LAYER_OUTER_L3; 2283 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2284 MLX5_FLOW_LAYER_OUTER_L4; 2285 int ret; 2286 2287 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2288 return rte_flow_error_set(error, EINVAL, 2289 RTE_FLOW_ERROR_TYPE_ITEM, item, 2290 "protocol filtering not compatible" 2291 " with UDP layer"); 2292 if (!(item_flags & l3m)) 2293 return rte_flow_error_set(error, EINVAL, 2294 RTE_FLOW_ERROR_TYPE_ITEM, item, 2295 "L3 is mandatory to filter on L4"); 2296 if (item_flags & l4m) 2297 return rte_flow_error_set(error, EINVAL, 2298 RTE_FLOW_ERROR_TYPE_ITEM, item, 2299 "multiple L4 layers not supported"); 2300 if (!mask) 2301 mask = &rte_flow_item_udp_mask; 2302 ret = mlx5_flow_item_acceptable 2303 (item, (const uint8_t *)mask, 2304 (const uint8_t *)&rte_flow_item_udp_mask, 2305 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2306 error); 2307 if (ret < 0) 2308 return ret; 2309 return 0; 2310 } 2311 2312 /** 2313 * Validate TCP item. 2314 * 2315 * @param[in] item 2316 * Item specification. 2317 * @param[in] item_flags 2318 * Bit-fields that holds the items detected until now. 2319 * @param[in] target_protocol 2320 * The next protocol in the previous item. 2321 * @param[out] error 2322 * Pointer to error structure. 2323 * 2324 * @return 2325 * 0 on success, a negative errno value otherwise and rte_errno is set. 2326 */ 2327 int 2328 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2329 uint64_t item_flags, 2330 uint8_t target_protocol, 2331 const struct rte_flow_item_tcp *flow_mask, 2332 struct rte_flow_error *error) 2333 { 2334 const struct rte_flow_item_tcp *mask = item->mask; 2335 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2336 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2337 MLX5_FLOW_LAYER_OUTER_L3; 2338 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2339 MLX5_FLOW_LAYER_OUTER_L4; 2340 int ret; 2341 2342 MLX5_ASSERT(flow_mask); 2343 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2344 return rte_flow_error_set(error, EINVAL, 2345 RTE_FLOW_ERROR_TYPE_ITEM, item, 2346 "protocol filtering not compatible" 2347 " with TCP layer"); 2348 if (!(item_flags & l3m)) 2349 return rte_flow_error_set(error, EINVAL, 2350 RTE_FLOW_ERROR_TYPE_ITEM, item, 2351 "L3 is mandatory to filter on L4"); 2352 if (item_flags & l4m) 2353 return rte_flow_error_set(error, EINVAL, 2354 RTE_FLOW_ERROR_TYPE_ITEM, item, 2355 "multiple L4 layers not supported"); 2356 if (!mask) 2357 mask = &rte_flow_item_tcp_mask; 2358 ret = mlx5_flow_item_acceptable 2359 (item, (const uint8_t *)mask, 2360 (const uint8_t *)flow_mask, 2361 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2362 error); 2363 if (ret < 0) 2364 return ret; 2365 return 0; 2366 } 2367 2368 /** 2369 * Validate VXLAN item. 2370 * 2371 * @param[in] item 2372 * Item specification. 2373 * @param[in] item_flags 2374 * Bit-fields that holds the items detected until now. 2375 * @param[in] target_protocol 2376 * The next protocol in the previous item. 2377 * @param[out] error 2378 * Pointer to error structure. 2379 * 2380 * @return 2381 * 0 on success, a negative errno value otherwise and rte_errno is set. 2382 */ 2383 int 2384 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 2385 uint64_t item_flags, 2386 struct rte_flow_error *error) 2387 { 2388 const struct rte_flow_item_vxlan *spec = item->spec; 2389 const struct rte_flow_item_vxlan *mask = item->mask; 2390 int ret; 2391 union vni { 2392 uint32_t vlan_id; 2393 uint8_t vni[4]; 2394 } id = { .vlan_id = 0, }; 2395 2396 2397 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2398 return rte_flow_error_set(error, ENOTSUP, 2399 RTE_FLOW_ERROR_TYPE_ITEM, item, 2400 "multiple tunnel layers not" 2401 " supported"); 2402 /* 2403 * Verify only UDPv4 is present as defined in 2404 * https://tools.ietf.org/html/rfc7348 2405 */ 2406 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2407 return rte_flow_error_set(error, EINVAL, 2408 RTE_FLOW_ERROR_TYPE_ITEM, item, 2409 "no outer UDP layer found"); 2410 if (!mask) 2411 mask = &rte_flow_item_vxlan_mask; 2412 ret = mlx5_flow_item_acceptable 2413 (item, (const uint8_t *)mask, 2414 (const uint8_t *)&rte_flow_item_vxlan_mask, 2415 sizeof(struct rte_flow_item_vxlan), 2416 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2417 if (ret < 0) 2418 return ret; 2419 if (spec) { 2420 memcpy(&id.vni[1], spec->vni, 3); 2421 memcpy(&id.vni[1], mask->vni, 3); 2422 } 2423 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2424 return rte_flow_error_set(error, ENOTSUP, 2425 RTE_FLOW_ERROR_TYPE_ITEM, item, 2426 "VXLAN tunnel must be fully defined"); 2427 return 0; 2428 } 2429 2430 /** 2431 * Validate VXLAN_GPE item. 2432 * 2433 * @param[in] item 2434 * Item specification. 2435 * @param[in] item_flags 2436 * Bit-fields that holds the items detected until now. 2437 * @param[in] priv 2438 * Pointer to the private data structure. 2439 * @param[in] target_protocol 2440 * The next protocol in the previous item. 2441 * @param[out] error 2442 * Pointer to error structure. 2443 * 2444 * @return 2445 * 0 on success, a negative errno value otherwise and rte_errno is set. 2446 */ 2447 int 2448 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2449 uint64_t item_flags, 2450 struct rte_eth_dev *dev, 2451 struct rte_flow_error *error) 2452 { 2453 struct mlx5_priv *priv = dev->data->dev_private; 2454 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2455 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2456 int ret; 2457 union vni { 2458 uint32_t vlan_id; 2459 uint8_t vni[4]; 2460 } id = { .vlan_id = 0, }; 2461 2462 if (!priv->config.l3_vxlan_en) 2463 return rte_flow_error_set(error, ENOTSUP, 2464 RTE_FLOW_ERROR_TYPE_ITEM, item, 2465 "L3 VXLAN is not enabled by device" 2466 " parameter and/or not configured in" 2467 " firmware"); 2468 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2469 return rte_flow_error_set(error, ENOTSUP, 2470 RTE_FLOW_ERROR_TYPE_ITEM, item, 2471 "multiple tunnel layers not" 2472 " supported"); 2473 /* 2474 * Verify only UDPv4 is present as defined in 2475 * https://tools.ietf.org/html/rfc7348 2476 */ 2477 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2478 return rte_flow_error_set(error, EINVAL, 2479 RTE_FLOW_ERROR_TYPE_ITEM, item, 2480 "no outer UDP layer found"); 2481 if (!mask) 2482 mask = &rte_flow_item_vxlan_gpe_mask; 2483 ret = mlx5_flow_item_acceptable 2484 (item, (const uint8_t *)mask, 2485 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2486 sizeof(struct rte_flow_item_vxlan_gpe), 2487 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2488 if (ret < 0) 2489 return ret; 2490 if (spec) { 2491 if (spec->protocol) 2492 return rte_flow_error_set(error, ENOTSUP, 2493 RTE_FLOW_ERROR_TYPE_ITEM, 2494 item, 2495 "VxLAN-GPE protocol" 2496 " not supported"); 2497 memcpy(&id.vni[1], spec->vni, 3); 2498 memcpy(&id.vni[1], mask->vni, 3); 2499 } 2500 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2501 return rte_flow_error_set(error, ENOTSUP, 2502 RTE_FLOW_ERROR_TYPE_ITEM, item, 2503 "VXLAN-GPE tunnel must be fully" 2504 " defined"); 2505 return 0; 2506 } 2507 /** 2508 * Validate GRE Key item. 2509 * 2510 * @param[in] item 2511 * Item specification. 2512 * @param[in] item_flags 2513 * Bit flags to mark detected items. 2514 * @param[in] gre_item 2515 * Pointer to gre_item 2516 * @param[out] error 2517 * Pointer to error structure. 2518 * 2519 * @return 2520 * 0 on success, a negative errno value otherwise and rte_errno is set. 2521 */ 2522 int 2523 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2524 uint64_t item_flags, 2525 const struct rte_flow_item *gre_item, 2526 struct rte_flow_error *error) 2527 { 2528 const rte_be32_t *mask = item->mask; 2529 int ret = 0; 2530 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2531 const struct rte_flow_item_gre *gre_spec; 2532 const struct rte_flow_item_gre *gre_mask; 2533 2534 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2535 return rte_flow_error_set(error, ENOTSUP, 2536 RTE_FLOW_ERROR_TYPE_ITEM, item, 2537 "Multiple GRE key not support"); 2538 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2539 return rte_flow_error_set(error, ENOTSUP, 2540 RTE_FLOW_ERROR_TYPE_ITEM, item, 2541 "No preceding GRE header"); 2542 if (item_flags & MLX5_FLOW_LAYER_INNER) 2543 return rte_flow_error_set(error, ENOTSUP, 2544 RTE_FLOW_ERROR_TYPE_ITEM, item, 2545 "GRE key following a wrong item"); 2546 gre_mask = gre_item->mask; 2547 if (!gre_mask) 2548 gre_mask = &rte_flow_item_gre_mask; 2549 gre_spec = gre_item->spec; 2550 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2551 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2552 return rte_flow_error_set(error, EINVAL, 2553 RTE_FLOW_ERROR_TYPE_ITEM, item, 2554 "Key bit must be on"); 2555 2556 if (!mask) 2557 mask = &gre_key_default_mask; 2558 ret = mlx5_flow_item_acceptable 2559 (item, (const uint8_t *)mask, 2560 (const uint8_t *)&gre_key_default_mask, 2561 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2562 return ret; 2563 } 2564 2565 /** 2566 * Validate GRE item. 2567 * 2568 * @param[in] item 2569 * Item specification. 2570 * @param[in] item_flags 2571 * Bit flags to mark detected items. 2572 * @param[in] target_protocol 2573 * The next protocol in the previous item. 2574 * @param[out] error 2575 * Pointer to error structure. 2576 * 2577 * @return 2578 * 0 on success, a negative errno value otherwise and rte_errno is set. 2579 */ 2580 int 2581 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2582 uint64_t item_flags, 2583 uint8_t target_protocol, 2584 struct rte_flow_error *error) 2585 { 2586 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2587 const struct rte_flow_item_gre *mask = item->mask; 2588 int ret; 2589 const struct rte_flow_item_gre nic_mask = { 2590 .c_rsvd0_ver = RTE_BE16(0xB000), 2591 .protocol = RTE_BE16(UINT16_MAX), 2592 }; 2593 2594 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2595 return rte_flow_error_set(error, EINVAL, 2596 RTE_FLOW_ERROR_TYPE_ITEM, item, 2597 "protocol filtering not compatible" 2598 " with this GRE layer"); 2599 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2600 return rte_flow_error_set(error, ENOTSUP, 2601 RTE_FLOW_ERROR_TYPE_ITEM, item, 2602 "multiple tunnel layers not" 2603 " supported"); 2604 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2605 return rte_flow_error_set(error, ENOTSUP, 2606 RTE_FLOW_ERROR_TYPE_ITEM, item, 2607 "L3 Layer is missing"); 2608 if (!mask) 2609 mask = &rte_flow_item_gre_mask; 2610 ret = mlx5_flow_item_acceptable 2611 (item, (const uint8_t *)mask, 2612 (const uint8_t *)&nic_mask, 2613 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2614 error); 2615 if (ret < 0) 2616 return ret; 2617 #ifndef HAVE_MLX5DV_DR 2618 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2619 if (spec && (spec->protocol & mask->protocol)) 2620 return rte_flow_error_set(error, ENOTSUP, 2621 RTE_FLOW_ERROR_TYPE_ITEM, item, 2622 "without MPLS support the" 2623 " specification cannot be used for" 2624 " filtering"); 2625 #endif 2626 #endif 2627 return 0; 2628 } 2629 2630 /** 2631 * Validate Geneve item. 2632 * 2633 * @param[in] item 2634 * Item specification. 2635 * @param[in] itemFlags 2636 * Bit-fields that holds the items detected until now. 2637 * @param[in] enPriv 2638 * Pointer to the private data structure. 2639 * @param[out] error 2640 * Pointer to error structure. 2641 * 2642 * @return 2643 * 0 on success, a negative errno value otherwise and rte_errno is set. 2644 */ 2645 2646 int 2647 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2648 uint64_t item_flags, 2649 struct rte_eth_dev *dev, 2650 struct rte_flow_error *error) 2651 { 2652 struct mlx5_priv *priv = dev->data->dev_private; 2653 const struct rte_flow_item_geneve *spec = item->spec; 2654 const struct rte_flow_item_geneve *mask = item->mask; 2655 int ret; 2656 uint16_t gbhdr; 2657 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2658 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2659 const struct rte_flow_item_geneve nic_mask = { 2660 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2661 .vni = "\xff\xff\xff", 2662 .protocol = RTE_BE16(UINT16_MAX), 2663 }; 2664 2665 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2666 return rte_flow_error_set(error, ENOTSUP, 2667 RTE_FLOW_ERROR_TYPE_ITEM, item, 2668 "L3 Geneve is not enabled by device" 2669 " parameter and/or not configured in" 2670 " firmware"); 2671 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2672 return rte_flow_error_set(error, ENOTSUP, 2673 RTE_FLOW_ERROR_TYPE_ITEM, item, 2674 "multiple tunnel layers not" 2675 " supported"); 2676 /* 2677 * Verify only UDPv4 is present as defined in 2678 * https://tools.ietf.org/html/rfc7348 2679 */ 2680 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2681 return rte_flow_error_set(error, EINVAL, 2682 RTE_FLOW_ERROR_TYPE_ITEM, item, 2683 "no outer UDP layer found"); 2684 if (!mask) 2685 mask = &rte_flow_item_geneve_mask; 2686 ret = mlx5_flow_item_acceptable 2687 (item, (const uint8_t *)mask, 2688 (const uint8_t *)&nic_mask, 2689 sizeof(struct rte_flow_item_geneve), 2690 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2691 if (ret) 2692 return ret; 2693 if (spec) { 2694 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2695 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2696 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2697 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2698 return rte_flow_error_set(error, ENOTSUP, 2699 RTE_FLOW_ERROR_TYPE_ITEM, 2700 item, 2701 "Geneve protocol unsupported" 2702 " fields are being used"); 2703 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2704 return rte_flow_error_set 2705 (error, ENOTSUP, 2706 RTE_FLOW_ERROR_TYPE_ITEM, 2707 item, 2708 "Unsupported Geneve options length"); 2709 } 2710 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2711 return rte_flow_error_set 2712 (error, ENOTSUP, 2713 RTE_FLOW_ERROR_TYPE_ITEM, item, 2714 "Geneve tunnel must be fully defined"); 2715 return 0; 2716 } 2717 2718 /** 2719 * Validate MPLS item. 2720 * 2721 * @param[in] dev 2722 * Pointer to the rte_eth_dev structure. 2723 * @param[in] item 2724 * Item specification. 2725 * @param[in] item_flags 2726 * Bit-fields that holds the items detected until now. 2727 * @param[in] prev_layer 2728 * The protocol layer indicated in previous item. 2729 * @param[out] error 2730 * Pointer to error structure. 2731 * 2732 * @return 2733 * 0 on success, a negative errno value otherwise and rte_errno is set. 2734 */ 2735 int 2736 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 2737 const struct rte_flow_item *item __rte_unused, 2738 uint64_t item_flags __rte_unused, 2739 uint64_t prev_layer __rte_unused, 2740 struct rte_flow_error *error) 2741 { 2742 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 2743 const struct rte_flow_item_mpls *mask = item->mask; 2744 struct mlx5_priv *priv = dev->data->dev_private; 2745 int ret; 2746 2747 if (!priv->config.mpls_en) 2748 return rte_flow_error_set(error, ENOTSUP, 2749 RTE_FLOW_ERROR_TYPE_ITEM, item, 2750 "MPLS not supported or" 2751 " disabled in firmware" 2752 " configuration."); 2753 /* MPLS over IP, UDP, GRE is allowed */ 2754 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 | 2755 MLX5_FLOW_LAYER_OUTER_L4_UDP | 2756 MLX5_FLOW_LAYER_GRE))) 2757 return rte_flow_error_set(error, EINVAL, 2758 RTE_FLOW_ERROR_TYPE_ITEM, item, 2759 "protocol filtering not compatible" 2760 " with MPLS layer"); 2761 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 2762 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 2763 !(item_flags & MLX5_FLOW_LAYER_GRE)) 2764 return rte_flow_error_set(error, ENOTSUP, 2765 RTE_FLOW_ERROR_TYPE_ITEM, item, 2766 "multiple tunnel layers not" 2767 " supported"); 2768 if (!mask) 2769 mask = &rte_flow_item_mpls_mask; 2770 ret = mlx5_flow_item_acceptable 2771 (item, (const uint8_t *)mask, 2772 (const uint8_t *)&rte_flow_item_mpls_mask, 2773 sizeof(struct rte_flow_item_mpls), 2774 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2775 if (ret < 0) 2776 return ret; 2777 return 0; 2778 #else 2779 return rte_flow_error_set(error, ENOTSUP, 2780 RTE_FLOW_ERROR_TYPE_ITEM, item, 2781 "MPLS is not supported by Verbs, please" 2782 " update."); 2783 #endif 2784 } 2785 2786 /** 2787 * Validate NVGRE item. 2788 * 2789 * @param[in] item 2790 * Item specification. 2791 * @param[in] item_flags 2792 * Bit flags to mark detected items. 2793 * @param[in] target_protocol 2794 * The next protocol in the previous item. 2795 * @param[out] error 2796 * Pointer to error structure. 2797 * 2798 * @return 2799 * 0 on success, a negative errno value otherwise and rte_errno is set. 2800 */ 2801 int 2802 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 2803 uint64_t item_flags, 2804 uint8_t target_protocol, 2805 struct rte_flow_error *error) 2806 { 2807 const struct rte_flow_item_nvgre *mask = item->mask; 2808 int ret; 2809 2810 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2811 return rte_flow_error_set(error, EINVAL, 2812 RTE_FLOW_ERROR_TYPE_ITEM, item, 2813 "protocol filtering not compatible" 2814 " with this GRE layer"); 2815 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2816 return rte_flow_error_set(error, ENOTSUP, 2817 RTE_FLOW_ERROR_TYPE_ITEM, item, 2818 "multiple tunnel layers not" 2819 " supported"); 2820 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2821 return rte_flow_error_set(error, ENOTSUP, 2822 RTE_FLOW_ERROR_TYPE_ITEM, item, 2823 "L3 Layer is missing"); 2824 if (!mask) 2825 mask = &rte_flow_item_nvgre_mask; 2826 ret = mlx5_flow_item_acceptable 2827 (item, (const uint8_t *)mask, 2828 (const uint8_t *)&rte_flow_item_nvgre_mask, 2829 sizeof(struct rte_flow_item_nvgre), 2830 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2831 if (ret < 0) 2832 return ret; 2833 return 0; 2834 } 2835 2836 /** 2837 * Validate eCPRI item. 2838 * 2839 * @param[in] item 2840 * Item specification. 2841 * @param[in] item_flags 2842 * Bit-fields that holds the items detected until now. 2843 * @param[in] last_item 2844 * Previous validated item in the pattern items. 2845 * @param[in] ether_type 2846 * Type in the ethernet layer header (including dot1q). 2847 * @param[in] acc_mask 2848 * Acceptable mask, if NULL default internal default mask 2849 * will be used to check whether item fields are supported. 2850 * @param[out] error 2851 * Pointer to error structure. 2852 * 2853 * @return 2854 * 0 on success, a negative errno value otherwise and rte_errno is set. 2855 */ 2856 int 2857 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 2858 uint64_t item_flags, 2859 uint64_t last_item, 2860 uint16_t ether_type, 2861 const struct rte_flow_item_ecpri *acc_mask, 2862 struct rte_flow_error *error) 2863 { 2864 const struct rte_flow_item_ecpri *mask = item->mask; 2865 const struct rte_flow_item_ecpri nic_mask = { 2866 .hdr = { 2867 .common = { 2868 .u32 = 2869 RTE_BE32(((const struct rte_ecpri_common_hdr) { 2870 .type = 0xFF, 2871 }).u32), 2872 }, 2873 .dummy[0] = 0xFFFFFFFF, 2874 }, 2875 }; 2876 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 2877 MLX5_FLOW_LAYER_OUTER_VLAN); 2878 struct rte_flow_item_ecpri mask_lo; 2879 2880 if ((last_item & outer_l2_vlan) && ether_type && 2881 ether_type != RTE_ETHER_TYPE_ECPRI) 2882 return rte_flow_error_set(error, EINVAL, 2883 RTE_FLOW_ERROR_TYPE_ITEM, item, 2884 "eCPRI cannot follow L2/VLAN layer " 2885 "which ether type is not 0xAEFE."); 2886 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2887 return rte_flow_error_set(error, EINVAL, 2888 RTE_FLOW_ERROR_TYPE_ITEM, item, 2889 "eCPRI with tunnel is not supported " 2890 "right now."); 2891 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 2892 return rte_flow_error_set(error, ENOTSUP, 2893 RTE_FLOW_ERROR_TYPE_ITEM, item, 2894 "multiple L3 layers not supported"); 2895 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 2896 return rte_flow_error_set(error, EINVAL, 2897 RTE_FLOW_ERROR_TYPE_ITEM, item, 2898 "eCPRI cannot follow a TCP layer."); 2899 /* In specification, eCPRI could be over UDP layer. */ 2900 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 2901 return rte_flow_error_set(error, EINVAL, 2902 RTE_FLOW_ERROR_TYPE_ITEM, item, 2903 "eCPRI over UDP layer is not yet " 2904 "supported right now."); 2905 /* Mask for type field in common header could be zero. */ 2906 if (!mask) 2907 mask = &rte_flow_item_ecpri_mask; 2908 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 2909 /* Input mask is in big-endian format. */ 2910 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 2911 return rte_flow_error_set(error, EINVAL, 2912 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2913 "partial mask is not supported " 2914 "for protocol"); 2915 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 2916 return rte_flow_error_set(error, EINVAL, 2917 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2918 "message header mask must be after " 2919 "a type mask"); 2920 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2921 acc_mask ? (const uint8_t *)acc_mask 2922 : (const uint8_t *)&nic_mask, 2923 sizeof(struct rte_flow_item_ecpri), 2924 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2925 } 2926 2927 /* Allocate unique ID for the split Q/RSS subflows. */ 2928 static uint32_t 2929 flow_qrss_get_id(struct rte_eth_dev *dev) 2930 { 2931 struct mlx5_priv *priv = dev->data->dev_private; 2932 uint32_t qrss_id, ret; 2933 2934 ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id); 2935 if (ret) 2936 return 0; 2937 MLX5_ASSERT(qrss_id); 2938 return qrss_id; 2939 } 2940 2941 /* Free unique ID for the split Q/RSS subflows. */ 2942 static void 2943 flow_qrss_free_id(struct rte_eth_dev *dev, uint32_t qrss_id) 2944 { 2945 struct mlx5_priv *priv = dev->data->dev_private; 2946 2947 if (qrss_id) 2948 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id); 2949 } 2950 2951 /** 2952 * Release resource related QUEUE/RSS action split. 2953 * 2954 * @param dev 2955 * Pointer to Ethernet device. 2956 * @param flow 2957 * Flow to release id's from. 2958 */ 2959 static void 2960 flow_mreg_split_qrss_release(struct rte_eth_dev *dev, 2961 struct rte_flow *flow) 2962 { 2963 struct mlx5_priv *priv = dev->data->dev_private; 2964 uint32_t handle_idx; 2965 struct mlx5_flow_handle *dev_handle; 2966 2967 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 2968 handle_idx, dev_handle, next) 2969 if (dev_handle->split_flow_id) 2970 flow_qrss_free_id(dev, dev_handle->split_flow_id); 2971 } 2972 2973 static int 2974 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 2975 const struct rte_flow_attr *attr __rte_unused, 2976 const struct rte_flow_item items[] __rte_unused, 2977 const struct rte_flow_action actions[] __rte_unused, 2978 bool external __rte_unused, 2979 int hairpin __rte_unused, 2980 struct rte_flow_error *error) 2981 { 2982 return rte_flow_error_set(error, ENOTSUP, 2983 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2984 } 2985 2986 static struct mlx5_flow * 2987 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 2988 const struct rte_flow_attr *attr __rte_unused, 2989 const struct rte_flow_item items[] __rte_unused, 2990 const struct rte_flow_action actions[] __rte_unused, 2991 struct rte_flow_error *error) 2992 { 2993 rte_flow_error_set(error, ENOTSUP, 2994 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 2995 return NULL; 2996 } 2997 2998 static int 2999 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 3000 struct mlx5_flow *dev_flow __rte_unused, 3001 const struct rte_flow_attr *attr __rte_unused, 3002 const struct rte_flow_item items[] __rte_unused, 3003 const struct rte_flow_action actions[] __rte_unused, 3004 struct rte_flow_error *error) 3005 { 3006 return rte_flow_error_set(error, ENOTSUP, 3007 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3008 } 3009 3010 static int 3011 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 3012 struct rte_flow *flow __rte_unused, 3013 struct rte_flow_error *error) 3014 { 3015 return rte_flow_error_set(error, ENOTSUP, 3016 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3017 } 3018 3019 static void 3020 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 3021 struct rte_flow *flow __rte_unused) 3022 { 3023 } 3024 3025 static void 3026 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 3027 struct rte_flow *flow __rte_unused) 3028 { 3029 } 3030 3031 static int 3032 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3033 struct rte_flow *flow __rte_unused, 3034 const struct rte_flow_action *actions __rte_unused, 3035 void *data __rte_unused, 3036 struct rte_flow_error *error) 3037 { 3038 return rte_flow_error_set(error, ENOTSUP, 3039 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3040 } 3041 3042 /* Void driver to protect from null pointer reference. */ 3043 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3044 .validate = flow_null_validate, 3045 .prepare = flow_null_prepare, 3046 .translate = flow_null_translate, 3047 .apply = flow_null_apply, 3048 .remove = flow_null_remove, 3049 .destroy = flow_null_destroy, 3050 .query = flow_null_query, 3051 }; 3052 3053 /** 3054 * Select flow driver type according to flow attributes and device 3055 * configuration. 3056 * 3057 * @param[in] dev 3058 * Pointer to the dev structure. 3059 * @param[in] attr 3060 * Pointer to the flow attributes. 3061 * 3062 * @return 3063 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3064 */ 3065 static enum mlx5_flow_drv_type 3066 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3067 { 3068 struct mlx5_priv *priv = dev->data->dev_private; 3069 /* The OS can determine first a specific flow type (DV, VERBS) */ 3070 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3071 3072 if (type != MLX5_FLOW_TYPE_MAX) 3073 return type; 3074 /* If no OS specific type - continue with DV/VERBS selection */ 3075 if (attr->transfer && priv->config.dv_esw_en) 3076 type = MLX5_FLOW_TYPE_DV; 3077 if (!attr->transfer) 3078 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3079 MLX5_FLOW_TYPE_VERBS; 3080 return type; 3081 } 3082 3083 #define flow_get_drv_ops(type) flow_drv_ops[type] 3084 3085 /** 3086 * Flow driver validation API. This abstracts calling driver specific functions. 3087 * The type of flow driver is determined according to flow attributes. 3088 * 3089 * @param[in] dev 3090 * Pointer to the dev structure. 3091 * @param[in] attr 3092 * Pointer to the flow attributes. 3093 * @param[in] items 3094 * Pointer to the list of items. 3095 * @param[in] actions 3096 * Pointer to the list of actions. 3097 * @param[in] external 3098 * This flow rule is created by request external to PMD. 3099 * @param[in] hairpin 3100 * Number of hairpin TX actions, 0 means classic flow. 3101 * @param[out] error 3102 * Pointer to the error structure. 3103 * 3104 * @return 3105 * 0 on success, a negative errno value otherwise and rte_errno is set. 3106 */ 3107 static inline int 3108 flow_drv_validate(struct rte_eth_dev *dev, 3109 const struct rte_flow_attr *attr, 3110 const struct rte_flow_item items[], 3111 const struct rte_flow_action actions[], 3112 bool external, int hairpin, struct rte_flow_error *error) 3113 { 3114 const struct mlx5_flow_driver_ops *fops; 3115 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3116 3117 fops = flow_get_drv_ops(type); 3118 return fops->validate(dev, attr, items, actions, external, 3119 hairpin, error); 3120 } 3121 3122 /** 3123 * Flow driver preparation API. This abstracts calling driver specific 3124 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3125 * calculates the size of memory required for device flow, allocates the memory, 3126 * initializes the device flow and returns the pointer. 3127 * 3128 * @note 3129 * This function initializes device flow structure such as dv or verbs in 3130 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3131 * rest. For example, adding returning device flow to flow->dev_flow list and 3132 * setting backward reference to the flow should be done out of this function. 3133 * layers field is not filled either. 3134 * 3135 * @param[in] dev 3136 * Pointer to the dev structure. 3137 * @param[in] attr 3138 * Pointer to the flow attributes. 3139 * @param[in] items 3140 * Pointer to the list of items. 3141 * @param[in] actions 3142 * Pointer to the list of actions. 3143 * @param[in] flow_idx 3144 * This memory pool index to the flow. 3145 * @param[out] error 3146 * Pointer to the error structure. 3147 * 3148 * @return 3149 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3150 */ 3151 static inline struct mlx5_flow * 3152 flow_drv_prepare(struct rte_eth_dev *dev, 3153 const struct rte_flow *flow, 3154 const struct rte_flow_attr *attr, 3155 const struct rte_flow_item items[], 3156 const struct rte_flow_action actions[], 3157 uint32_t flow_idx, 3158 struct rte_flow_error *error) 3159 { 3160 const struct mlx5_flow_driver_ops *fops; 3161 enum mlx5_flow_drv_type type = flow->drv_type; 3162 struct mlx5_flow *mlx5_flow = NULL; 3163 3164 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3165 fops = flow_get_drv_ops(type); 3166 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3167 if (mlx5_flow) 3168 mlx5_flow->flow_idx = flow_idx; 3169 return mlx5_flow; 3170 } 3171 3172 /** 3173 * Flow driver translation API. This abstracts calling driver specific 3174 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3175 * translates a generic flow into a driver flow. flow_drv_prepare() must 3176 * precede. 3177 * 3178 * @note 3179 * dev_flow->layers could be filled as a result of parsing during translation 3180 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3181 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3182 * flow->actions could be overwritten even though all the expanded dev_flows 3183 * have the same actions. 3184 * 3185 * @param[in] dev 3186 * Pointer to the rte dev structure. 3187 * @param[in, out] dev_flow 3188 * Pointer to the mlx5 flow. 3189 * @param[in] attr 3190 * Pointer to the flow attributes. 3191 * @param[in] items 3192 * Pointer to the list of items. 3193 * @param[in] actions 3194 * Pointer to the list of actions. 3195 * @param[out] error 3196 * Pointer to the error structure. 3197 * 3198 * @return 3199 * 0 on success, a negative errno value otherwise and rte_errno is set. 3200 */ 3201 static inline int 3202 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3203 const struct rte_flow_attr *attr, 3204 const struct rte_flow_item items[], 3205 const struct rte_flow_action actions[], 3206 struct rte_flow_error *error) 3207 { 3208 const struct mlx5_flow_driver_ops *fops; 3209 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3210 3211 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3212 fops = flow_get_drv_ops(type); 3213 return fops->translate(dev, dev_flow, attr, items, actions, error); 3214 } 3215 3216 /** 3217 * Flow driver apply API. This abstracts calling driver specific functions. 3218 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3219 * translated driver flows on to device. flow_drv_translate() must precede. 3220 * 3221 * @param[in] dev 3222 * Pointer to Ethernet device structure. 3223 * @param[in, out] flow 3224 * Pointer to flow structure. 3225 * @param[out] error 3226 * Pointer to error structure. 3227 * 3228 * @return 3229 * 0 on success, a negative errno value otherwise and rte_errno is set. 3230 */ 3231 static inline int 3232 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3233 struct rte_flow_error *error) 3234 { 3235 const struct mlx5_flow_driver_ops *fops; 3236 enum mlx5_flow_drv_type type = flow->drv_type; 3237 3238 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3239 fops = flow_get_drv_ops(type); 3240 return fops->apply(dev, flow, error); 3241 } 3242 3243 /** 3244 * Flow driver remove API. This abstracts calling driver specific functions. 3245 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3246 * on device. All the resources of the flow should be freed by calling 3247 * flow_drv_destroy(). 3248 * 3249 * @param[in] dev 3250 * Pointer to Ethernet device. 3251 * @param[in, out] flow 3252 * Pointer to flow structure. 3253 */ 3254 static inline void 3255 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow) 3256 { 3257 const struct mlx5_flow_driver_ops *fops; 3258 enum mlx5_flow_drv_type type = flow->drv_type; 3259 3260 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3261 fops = flow_get_drv_ops(type); 3262 fops->remove(dev, flow); 3263 } 3264 3265 /** 3266 * Flow driver destroy API. This abstracts calling driver specific functions. 3267 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3268 * on device and releases resources of the flow. 3269 * 3270 * @param[in] dev 3271 * Pointer to Ethernet device. 3272 * @param[in, out] flow 3273 * Pointer to flow structure. 3274 */ 3275 static inline void 3276 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3277 { 3278 const struct mlx5_flow_driver_ops *fops; 3279 enum mlx5_flow_drv_type type = flow->drv_type; 3280 3281 flow_mreg_split_qrss_release(dev, flow); 3282 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3283 fops = flow_get_drv_ops(type); 3284 fops->destroy(dev, flow); 3285 } 3286 3287 /** 3288 * Get RSS action from the action list. 3289 * 3290 * @param[in] actions 3291 * Pointer to the list of actions. 3292 * 3293 * @return 3294 * Pointer to the RSS action if exist, else return NULL. 3295 */ 3296 static const struct rte_flow_action_rss* 3297 flow_get_rss_action(const struct rte_flow_action actions[]) 3298 { 3299 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3300 switch (actions->type) { 3301 case RTE_FLOW_ACTION_TYPE_RSS: 3302 return (const struct rte_flow_action_rss *) 3303 actions->conf; 3304 default: 3305 break; 3306 } 3307 } 3308 return NULL; 3309 } 3310 3311 /* maps shared action to translated non shared in some actions array */ 3312 struct mlx5_translated_shared_action { 3313 struct rte_flow_shared_action *action; /**< Shared action */ 3314 int index; /**< Index in related array of rte_flow_action */ 3315 }; 3316 3317 /** 3318 * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related 3319 * non shared action if translation possible. 3320 * This functionality used to run same execution path for both shared & non 3321 * shared actions on flow create. All necessary preparations for shared 3322 * action handling should be preformed on *shared* actions list returned 3323 * from this call. 3324 * 3325 * @param[in] actions 3326 * List of actions to translate. 3327 * @param[out] shared 3328 * List to store translated shared actions. 3329 * @param[in, out] shared_n 3330 * Size of *shared* array. On return should be updated with number of shared 3331 * actions retrieved from the *actions* list. 3332 * @param[out] translated_actions 3333 * List of actions where all shared actions were translated to non shared 3334 * if possible. NULL if no translation took place. 3335 * @param[out] error 3336 * Pointer to the error structure. 3337 * 3338 * @return 3339 * 0 on success, a negative errno value otherwise and rte_errno is set. 3340 */ 3341 static int 3342 flow_shared_actions_translate(const struct rte_flow_action actions[], 3343 struct mlx5_translated_shared_action *shared, 3344 int *shared_n, 3345 struct rte_flow_action **translated_actions, 3346 struct rte_flow_error *error) 3347 { 3348 struct rte_flow_action *translated = NULL; 3349 size_t actions_size; 3350 int n; 3351 int copied_n = 0; 3352 struct mlx5_translated_shared_action *shared_end = NULL; 3353 3354 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3355 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED) 3356 continue; 3357 if (copied_n == *shared_n) { 3358 return rte_flow_error_set 3359 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3360 NULL, "too many shared actions"); 3361 } 3362 rte_memcpy(&shared[copied_n].action, &actions[n].conf, 3363 sizeof(actions[n].conf)); 3364 shared[copied_n].index = n; 3365 copied_n++; 3366 } 3367 n++; 3368 *shared_n = copied_n; 3369 if (!copied_n) 3370 return 0; 3371 actions_size = sizeof(struct rte_flow_action) * n; 3372 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3373 if (!translated) { 3374 rte_errno = ENOMEM; 3375 return -ENOMEM; 3376 } 3377 memcpy(translated, actions, actions_size); 3378 for (shared_end = shared + copied_n; shared < shared_end; shared++) { 3379 const struct rte_flow_shared_action *shared_action; 3380 3381 shared_action = shared->action; 3382 switch (shared_action->type) { 3383 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS: 3384 translated[shared->index].type = 3385 RTE_FLOW_ACTION_TYPE_RSS; 3386 translated[shared->index].conf = 3387 &shared_action->rss.origin; 3388 break; 3389 default: 3390 mlx5_free(translated); 3391 return rte_flow_error_set 3392 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3393 NULL, "invalid shared action type"); 3394 } 3395 } 3396 *translated_actions = translated; 3397 return 0; 3398 } 3399 3400 /** 3401 * Get Shared RSS action from the action list. 3402 * 3403 * @param[in] shared 3404 * Pointer to the list of actions. 3405 * @param[in] shared_n 3406 * Actions list length. 3407 * 3408 * @return 3409 * Pointer to the MLX5 RSS action if exists, otherwise return NULL. 3410 */ 3411 static struct mlx5_shared_action_rss * 3412 flow_get_shared_rss_action(struct mlx5_translated_shared_action *shared, 3413 int shared_n) 3414 { 3415 struct mlx5_translated_shared_action *shared_end; 3416 3417 for (shared_end = shared + shared_n; shared < shared_end; shared++) { 3418 struct rte_flow_shared_action *shared_action; 3419 3420 shared_action = shared->action; 3421 switch (shared_action->type) { 3422 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS: 3423 __atomic_add_fetch(&shared_action->refcnt, 1, 3424 __ATOMIC_RELAXED); 3425 return &shared_action->rss; 3426 default: 3427 break; 3428 } 3429 } 3430 return NULL; 3431 } 3432 3433 struct rte_flow_shared_action * 3434 mlx5_flow_get_shared_rss(struct rte_flow *flow) 3435 { 3436 if (flow->shared_rss) 3437 return container_of(flow->shared_rss, 3438 struct rte_flow_shared_action, rss); 3439 else 3440 return NULL; 3441 } 3442 3443 static unsigned int 3444 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 3445 { 3446 const struct rte_flow_item *item; 3447 unsigned int has_vlan = 0; 3448 3449 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3450 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 3451 has_vlan = 1; 3452 break; 3453 } 3454 } 3455 if (has_vlan) 3456 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 3457 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 3458 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3459 MLX5_EXPANSION_ROOT_OUTER; 3460 } 3461 3462 /** 3463 * Get layer flags from the prefix flow. 3464 * 3465 * Some flows may be split to several subflows, the prefix subflow gets the 3466 * match items and the suffix sub flow gets the actions. 3467 * Some actions need the user defined match item flags to get the detail for 3468 * the action. 3469 * This function helps the suffix flow to get the item layer flags from prefix 3470 * subflow. 3471 * 3472 * @param[in] dev_flow 3473 * Pointer the created preifx subflow. 3474 * 3475 * @return 3476 * The layers get from prefix subflow. 3477 */ 3478 static inline uint64_t 3479 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3480 { 3481 uint64_t layers = 0; 3482 3483 /* 3484 * Layers bits could be localization, but usually the compiler will 3485 * help to do the optimization work for source code. 3486 * If no decap actions, use the layers directly. 3487 */ 3488 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3489 return dev_flow->handle->layers; 3490 /* Convert L3 layers with decap action. */ 3491 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3492 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3493 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3494 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3495 /* Convert L4 layers with decap action. */ 3496 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3497 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3498 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3499 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3500 return layers; 3501 } 3502 3503 /** 3504 * Get metadata split action information. 3505 * 3506 * @param[in] actions 3507 * Pointer to the list of actions. 3508 * @param[out] qrss 3509 * Pointer to the return pointer. 3510 * @param[out] qrss_type 3511 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3512 * if no QUEUE/RSS is found. 3513 * @param[out] encap_idx 3514 * Pointer to the index of the encap action if exists, otherwise the last 3515 * action index. 3516 * 3517 * @return 3518 * Total number of actions. 3519 */ 3520 static int 3521 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 3522 const struct rte_flow_action **qrss, 3523 int *encap_idx) 3524 { 3525 const struct rte_flow_action_raw_encap *raw_encap; 3526 int actions_n = 0; 3527 int raw_decap_idx = -1; 3528 3529 *encap_idx = -1; 3530 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3531 switch (actions->type) { 3532 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3533 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3534 *encap_idx = actions_n; 3535 break; 3536 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3537 raw_decap_idx = actions_n; 3538 break; 3539 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3540 raw_encap = actions->conf; 3541 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3542 *encap_idx = raw_decap_idx != -1 ? 3543 raw_decap_idx : actions_n; 3544 break; 3545 case RTE_FLOW_ACTION_TYPE_QUEUE: 3546 case RTE_FLOW_ACTION_TYPE_RSS: 3547 *qrss = actions; 3548 break; 3549 default: 3550 break; 3551 } 3552 actions_n++; 3553 } 3554 if (*encap_idx == -1) 3555 *encap_idx = actions_n; 3556 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3557 return actions_n + 1; 3558 } 3559 3560 /** 3561 * Check meter action from the action list. 3562 * 3563 * @param[in] actions 3564 * Pointer to the list of actions. 3565 * @param[out] mtr 3566 * Pointer to the meter exist flag. 3567 * 3568 * @return 3569 * Total number of actions. 3570 */ 3571 static int 3572 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr) 3573 { 3574 int actions_n = 0; 3575 3576 MLX5_ASSERT(mtr); 3577 *mtr = 0; 3578 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3579 switch (actions->type) { 3580 case RTE_FLOW_ACTION_TYPE_METER: 3581 *mtr = 1; 3582 break; 3583 default: 3584 break; 3585 } 3586 actions_n++; 3587 } 3588 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3589 return actions_n + 1; 3590 } 3591 3592 /** 3593 * Check if the flow should be split due to hairpin. 3594 * The reason for the split is that in current HW we can't 3595 * support encap and push-vlan on Rx, so if a flow contains 3596 * these actions we move it to Tx. 3597 * 3598 * @param dev 3599 * Pointer to Ethernet device. 3600 * @param[in] attr 3601 * Flow rule attributes. 3602 * @param[in] actions 3603 * Associated actions (list terminated by the END action). 3604 * 3605 * @return 3606 * > 0 the number of actions and the flow should be split, 3607 * 0 when no split required. 3608 */ 3609 static int 3610 flow_check_hairpin_split(struct rte_eth_dev *dev, 3611 const struct rte_flow_attr *attr, 3612 const struct rte_flow_action actions[]) 3613 { 3614 int queue_action = 0; 3615 int action_n = 0; 3616 int split = 0; 3617 const struct rte_flow_action_queue *queue; 3618 const struct rte_flow_action_rss *rss; 3619 const struct rte_flow_action_raw_encap *raw_encap; 3620 3621 if (!attr->ingress) 3622 return 0; 3623 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3624 switch (actions->type) { 3625 case RTE_FLOW_ACTION_TYPE_QUEUE: 3626 queue = actions->conf; 3627 if (queue == NULL) 3628 return 0; 3629 if (mlx5_rxq_get_type(dev, queue->index) != 3630 MLX5_RXQ_TYPE_HAIRPIN) 3631 return 0; 3632 queue_action = 1; 3633 action_n++; 3634 break; 3635 case RTE_FLOW_ACTION_TYPE_RSS: 3636 rss = actions->conf; 3637 if (rss == NULL || rss->queue_num == 0) 3638 return 0; 3639 if (mlx5_rxq_get_type(dev, rss->queue[0]) != 3640 MLX5_RXQ_TYPE_HAIRPIN) 3641 return 0; 3642 queue_action = 1; 3643 action_n++; 3644 break; 3645 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3646 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3647 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3648 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3649 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3650 split++; 3651 action_n++; 3652 break; 3653 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3654 raw_encap = actions->conf; 3655 if (raw_encap->size > 3656 (sizeof(struct rte_flow_item_eth) + 3657 sizeof(struct rte_flow_item_ipv4))) 3658 split++; 3659 action_n++; 3660 break; 3661 default: 3662 action_n++; 3663 break; 3664 } 3665 } 3666 if (split && queue_action) 3667 return action_n; 3668 return 0; 3669 } 3670 3671 /* Declare flow create/destroy prototype in advance. */ 3672 static uint32_t 3673 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 3674 const struct rte_flow_attr *attr, 3675 const struct rte_flow_item items[], 3676 const struct rte_flow_action actions[], 3677 bool external, struct rte_flow_error *error); 3678 3679 static void 3680 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 3681 uint32_t flow_idx); 3682 3683 /** 3684 * Add a flow of copying flow metadata registers in RX_CP_TBL. 3685 * 3686 * As mark_id is unique, if there's already a registered flow for the mark_id, 3687 * return by increasing the reference counter of the resource. Otherwise, create 3688 * the resource (mcp_res) and flow. 3689 * 3690 * Flow looks like, 3691 * - If ingress port is ANY and reg_c[1] is mark_id, 3692 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 3693 * 3694 * For default flow (zero mark_id), flow is like, 3695 * - If ingress port is ANY, 3696 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 3697 * 3698 * @param dev 3699 * Pointer to Ethernet device. 3700 * @param mark_id 3701 * ID of MARK action, zero means default flow for META. 3702 * @param[out] error 3703 * Perform verbose error reporting if not NULL. 3704 * 3705 * @return 3706 * Associated resource on success, NULL otherwise and rte_errno is set. 3707 */ 3708 static struct mlx5_flow_mreg_copy_resource * 3709 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 3710 struct rte_flow_error *error) 3711 { 3712 struct mlx5_priv *priv = dev->data->dev_private; 3713 struct rte_flow_attr attr = { 3714 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 3715 .ingress = 1, 3716 }; 3717 struct mlx5_rte_flow_item_tag tag_spec = { 3718 .data = mark_id, 3719 }; 3720 struct rte_flow_item items[] = { 3721 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 3722 }; 3723 struct rte_flow_action_mark ftag = { 3724 .id = mark_id, 3725 }; 3726 struct mlx5_flow_action_copy_mreg cp_mreg = { 3727 .dst = REG_B, 3728 .src = REG_NON, 3729 }; 3730 struct rte_flow_action_jump jump = { 3731 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 3732 }; 3733 struct rte_flow_action actions[] = { 3734 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 3735 }; 3736 struct mlx5_flow_mreg_copy_resource *mcp_res; 3737 uint32_t idx = 0; 3738 int ret; 3739 3740 /* Fill the register fileds in the flow. */ 3741 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 3742 if (ret < 0) 3743 return NULL; 3744 tag_spec.id = ret; 3745 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 3746 if (ret < 0) 3747 return NULL; 3748 cp_mreg.src = ret; 3749 /* Check if already registered. */ 3750 MLX5_ASSERT(priv->mreg_cp_tbl); 3751 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id); 3752 if (mcp_res) { 3753 /* For non-default rule. */ 3754 if (mark_id != MLX5_DEFAULT_COPY_ID) 3755 mcp_res->refcnt++; 3756 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID || 3757 mcp_res->refcnt == 1); 3758 return mcp_res; 3759 } 3760 /* Provide the full width of FLAG specific value. */ 3761 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 3762 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 3763 /* Build a new flow. */ 3764 if (mark_id != MLX5_DEFAULT_COPY_ID) { 3765 items[0] = (struct rte_flow_item){ 3766 .type = (enum rte_flow_item_type) 3767 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 3768 .spec = &tag_spec, 3769 }; 3770 items[1] = (struct rte_flow_item){ 3771 .type = RTE_FLOW_ITEM_TYPE_END, 3772 }; 3773 actions[0] = (struct rte_flow_action){ 3774 .type = (enum rte_flow_action_type) 3775 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 3776 .conf = &ftag, 3777 }; 3778 actions[1] = (struct rte_flow_action){ 3779 .type = (enum rte_flow_action_type) 3780 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 3781 .conf = &cp_mreg, 3782 }; 3783 actions[2] = (struct rte_flow_action){ 3784 .type = RTE_FLOW_ACTION_TYPE_JUMP, 3785 .conf = &jump, 3786 }; 3787 actions[3] = (struct rte_flow_action){ 3788 .type = RTE_FLOW_ACTION_TYPE_END, 3789 }; 3790 } else { 3791 /* Default rule, wildcard match. */ 3792 attr.priority = MLX5_FLOW_PRIO_RSVD; 3793 items[0] = (struct rte_flow_item){ 3794 .type = RTE_FLOW_ITEM_TYPE_END, 3795 }; 3796 actions[0] = (struct rte_flow_action){ 3797 .type = (enum rte_flow_action_type) 3798 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 3799 .conf = &cp_mreg, 3800 }; 3801 actions[1] = (struct rte_flow_action){ 3802 .type = RTE_FLOW_ACTION_TYPE_JUMP, 3803 .conf = &jump, 3804 }; 3805 actions[2] = (struct rte_flow_action){ 3806 .type = RTE_FLOW_ACTION_TYPE_END, 3807 }; 3808 } 3809 /* Build a new entry. */ 3810 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 3811 if (!mcp_res) { 3812 rte_errno = ENOMEM; 3813 return NULL; 3814 } 3815 mcp_res->idx = idx; 3816 /* 3817 * The copy Flows are not included in any list. There 3818 * ones are referenced from other Flows and can not 3819 * be applied, removed, deleted in ardbitrary order 3820 * by list traversing. 3821 */ 3822 mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items, 3823 actions, false, error); 3824 if (!mcp_res->rix_flow) 3825 goto error; 3826 mcp_res->refcnt++; 3827 mcp_res->hlist_ent.key = mark_id; 3828 ret = mlx5_hlist_insert(priv->mreg_cp_tbl, 3829 &mcp_res->hlist_ent); 3830 MLX5_ASSERT(!ret); 3831 if (ret) 3832 goto error; 3833 return mcp_res; 3834 error: 3835 if (mcp_res->rix_flow) 3836 flow_list_destroy(dev, NULL, mcp_res->rix_flow); 3837 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 3838 return NULL; 3839 } 3840 3841 /** 3842 * Release flow in RX_CP_TBL. 3843 * 3844 * @param dev 3845 * Pointer to Ethernet device. 3846 * @flow 3847 * Parent flow for wich copying is provided. 3848 */ 3849 static void 3850 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 3851 struct rte_flow *flow) 3852 { 3853 struct mlx5_flow_mreg_copy_resource *mcp_res; 3854 struct mlx5_priv *priv = dev->data->dev_private; 3855 3856 if (!flow->rix_mreg_copy) 3857 return; 3858 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 3859 flow->rix_mreg_copy); 3860 if (!mcp_res || !priv->mreg_cp_tbl) 3861 return; 3862 if (flow->copy_applied) { 3863 MLX5_ASSERT(mcp_res->appcnt); 3864 flow->copy_applied = 0; 3865 --mcp_res->appcnt; 3866 if (!mcp_res->appcnt) { 3867 struct rte_flow *mcp_flow = mlx5_ipool_get 3868 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 3869 mcp_res->rix_flow); 3870 3871 if (mcp_flow) 3872 flow_drv_remove(dev, mcp_flow); 3873 } 3874 } 3875 /* 3876 * We do not check availability of metadata registers here, 3877 * because copy resources are not allocated in this case. 3878 */ 3879 if (--mcp_res->refcnt) 3880 return; 3881 MLX5_ASSERT(mcp_res->rix_flow); 3882 flow_list_destroy(dev, NULL, mcp_res->rix_flow); 3883 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 3884 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 3885 flow->rix_mreg_copy = 0; 3886 } 3887 3888 /** 3889 * Start flow in RX_CP_TBL. 3890 * 3891 * @param dev 3892 * Pointer to Ethernet device. 3893 * @flow 3894 * Parent flow for wich copying is provided. 3895 * 3896 * @return 3897 * 0 on success, a negative errno value otherwise and rte_errno is set. 3898 */ 3899 static int 3900 flow_mreg_start_copy_action(struct rte_eth_dev *dev, 3901 struct rte_flow *flow) 3902 { 3903 struct mlx5_flow_mreg_copy_resource *mcp_res; 3904 struct mlx5_priv *priv = dev->data->dev_private; 3905 int ret; 3906 3907 if (!flow->rix_mreg_copy || flow->copy_applied) 3908 return 0; 3909 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 3910 flow->rix_mreg_copy); 3911 if (!mcp_res) 3912 return 0; 3913 if (!mcp_res->appcnt) { 3914 struct rte_flow *mcp_flow = mlx5_ipool_get 3915 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 3916 mcp_res->rix_flow); 3917 3918 if (mcp_flow) { 3919 ret = flow_drv_apply(dev, mcp_flow, NULL); 3920 if (ret) 3921 return ret; 3922 } 3923 } 3924 ++mcp_res->appcnt; 3925 flow->copy_applied = 1; 3926 return 0; 3927 } 3928 3929 /** 3930 * Stop flow in RX_CP_TBL. 3931 * 3932 * @param dev 3933 * Pointer to Ethernet device. 3934 * @flow 3935 * Parent flow for wich copying is provided. 3936 */ 3937 static void 3938 flow_mreg_stop_copy_action(struct rte_eth_dev *dev, 3939 struct rte_flow *flow) 3940 { 3941 struct mlx5_flow_mreg_copy_resource *mcp_res; 3942 struct mlx5_priv *priv = dev->data->dev_private; 3943 3944 if (!flow->rix_mreg_copy || !flow->copy_applied) 3945 return; 3946 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 3947 flow->rix_mreg_copy); 3948 if (!mcp_res) 3949 return; 3950 MLX5_ASSERT(mcp_res->appcnt); 3951 --mcp_res->appcnt; 3952 flow->copy_applied = 0; 3953 if (!mcp_res->appcnt) { 3954 struct rte_flow *mcp_flow = mlx5_ipool_get 3955 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 3956 mcp_res->rix_flow); 3957 3958 if (mcp_flow) 3959 flow_drv_remove(dev, mcp_flow); 3960 } 3961 } 3962 3963 /** 3964 * Remove the default copy action from RX_CP_TBL. 3965 * 3966 * @param dev 3967 * Pointer to Ethernet device. 3968 */ 3969 static void 3970 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 3971 { 3972 struct mlx5_flow_mreg_copy_resource *mcp_res; 3973 struct mlx5_priv *priv = dev->data->dev_private; 3974 3975 /* Check if default flow is registered. */ 3976 if (!priv->mreg_cp_tbl) 3977 return; 3978 mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, 3979 MLX5_DEFAULT_COPY_ID); 3980 if (!mcp_res) 3981 return; 3982 MLX5_ASSERT(mcp_res->rix_flow); 3983 flow_list_destroy(dev, NULL, mcp_res->rix_flow); 3984 mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 3985 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 3986 } 3987 3988 /** 3989 * Add the default copy action in in RX_CP_TBL. 3990 * 3991 * @param dev 3992 * Pointer to Ethernet device. 3993 * @param[out] error 3994 * Perform verbose error reporting if not NULL. 3995 * 3996 * @return 3997 * 0 for success, negative value otherwise and rte_errno is set. 3998 */ 3999 static int 4000 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 4001 struct rte_flow_error *error) 4002 { 4003 struct mlx5_priv *priv = dev->data->dev_private; 4004 struct mlx5_flow_mreg_copy_resource *mcp_res; 4005 4006 /* Check whether extensive metadata feature is engaged. */ 4007 if (!priv->config.dv_flow_en || 4008 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4009 !mlx5_flow_ext_mreg_supported(dev) || 4010 !priv->sh->dv_regc0_mask) 4011 return 0; 4012 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error); 4013 if (!mcp_res) 4014 return -rte_errno; 4015 return 0; 4016 } 4017 4018 /** 4019 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4020 * 4021 * All the flow having Q/RSS action should be split by 4022 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 4023 * performs the following, 4024 * - CQE->flow_tag := reg_c[1] (MARK) 4025 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4026 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 4027 * but there should be a flow per each MARK ID set by MARK action. 4028 * 4029 * For the aforementioned reason, if there's a MARK action in flow's action 4030 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 4031 * the MARK ID to CQE's flow_tag like, 4032 * - If reg_c[1] is mark_id, 4033 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4034 * 4035 * For SET_META action which stores value in reg_c[0], as the destination is 4036 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 4037 * MARK ID means the default flow. The default flow looks like, 4038 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4039 * 4040 * @param dev 4041 * Pointer to Ethernet device. 4042 * @param flow 4043 * Pointer to flow structure. 4044 * @param[in] actions 4045 * Pointer to the list of actions. 4046 * @param[out] error 4047 * Perform verbose error reporting if not NULL. 4048 * 4049 * @return 4050 * 0 on success, negative value otherwise and rte_errno is set. 4051 */ 4052 static int 4053 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 4054 struct rte_flow *flow, 4055 const struct rte_flow_action *actions, 4056 struct rte_flow_error *error) 4057 { 4058 struct mlx5_priv *priv = dev->data->dev_private; 4059 struct mlx5_dev_config *config = &priv->config; 4060 struct mlx5_flow_mreg_copy_resource *mcp_res; 4061 const struct rte_flow_action_mark *mark; 4062 4063 /* Check whether extensive metadata feature is engaged. */ 4064 if (!config->dv_flow_en || 4065 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4066 !mlx5_flow_ext_mreg_supported(dev) || 4067 !priv->sh->dv_regc0_mask) 4068 return 0; 4069 /* Find MARK action. */ 4070 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4071 switch (actions->type) { 4072 case RTE_FLOW_ACTION_TYPE_FLAG: 4073 mcp_res = flow_mreg_add_copy_action 4074 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4075 if (!mcp_res) 4076 return -rte_errno; 4077 flow->rix_mreg_copy = mcp_res->idx; 4078 if (dev->data->dev_started) { 4079 mcp_res->appcnt++; 4080 flow->copy_applied = 1; 4081 } 4082 return 0; 4083 case RTE_FLOW_ACTION_TYPE_MARK: 4084 mark = (const struct rte_flow_action_mark *) 4085 actions->conf; 4086 mcp_res = 4087 flow_mreg_add_copy_action(dev, mark->id, error); 4088 if (!mcp_res) 4089 return -rte_errno; 4090 flow->rix_mreg_copy = mcp_res->idx; 4091 if (dev->data->dev_started) { 4092 mcp_res->appcnt++; 4093 flow->copy_applied = 1; 4094 } 4095 return 0; 4096 default: 4097 break; 4098 } 4099 } 4100 return 0; 4101 } 4102 4103 #define MLX5_MAX_SPLIT_ACTIONS 24 4104 #define MLX5_MAX_SPLIT_ITEMS 24 4105 4106 /** 4107 * Split the hairpin flow. 4108 * Since HW can't support encap and push-vlan on Rx, we move these 4109 * actions to Tx. 4110 * If the count action is after the encap then we also 4111 * move the count action. in this case the count will also measure 4112 * the outer bytes. 4113 * 4114 * @param dev 4115 * Pointer to Ethernet device. 4116 * @param[in] actions 4117 * Associated actions (list terminated by the END action). 4118 * @param[out] actions_rx 4119 * Rx flow actions. 4120 * @param[out] actions_tx 4121 * Tx flow actions.. 4122 * @param[out] pattern_tx 4123 * The pattern items for the Tx flow. 4124 * @param[out] flow_id 4125 * The flow ID connected to this flow. 4126 * 4127 * @return 4128 * 0 on success. 4129 */ 4130 static int 4131 flow_hairpin_split(struct rte_eth_dev *dev, 4132 const struct rte_flow_action actions[], 4133 struct rte_flow_action actions_rx[], 4134 struct rte_flow_action actions_tx[], 4135 struct rte_flow_item pattern_tx[], 4136 uint32_t *flow_id) 4137 { 4138 struct mlx5_priv *priv = dev->data->dev_private; 4139 const struct rte_flow_action_raw_encap *raw_encap; 4140 const struct rte_flow_action_raw_decap *raw_decap; 4141 struct mlx5_rte_flow_action_set_tag *set_tag; 4142 struct rte_flow_action *tag_action; 4143 struct mlx5_rte_flow_item_tag *tag_item; 4144 struct rte_flow_item *item; 4145 char *addr; 4146 int encap = 0; 4147 4148 mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id); 4149 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4150 switch (actions->type) { 4151 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4152 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4153 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4154 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4155 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4156 rte_memcpy(actions_tx, actions, 4157 sizeof(struct rte_flow_action)); 4158 actions_tx++; 4159 break; 4160 case RTE_FLOW_ACTION_TYPE_COUNT: 4161 if (encap) { 4162 rte_memcpy(actions_tx, actions, 4163 sizeof(struct rte_flow_action)); 4164 actions_tx++; 4165 } else { 4166 rte_memcpy(actions_rx, actions, 4167 sizeof(struct rte_flow_action)); 4168 actions_rx++; 4169 } 4170 break; 4171 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4172 raw_encap = actions->conf; 4173 if (raw_encap->size > 4174 (sizeof(struct rte_flow_item_eth) + 4175 sizeof(struct rte_flow_item_ipv4))) { 4176 memcpy(actions_tx, actions, 4177 sizeof(struct rte_flow_action)); 4178 actions_tx++; 4179 encap = 1; 4180 } else { 4181 rte_memcpy(actions_rx, actions, 4182 sizeof(struct rte_flow_action)); 4183 actions_rx++; 4184 } 4185 break; 4186 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4187 raw_decap = actions->conf; 4188 if (raw_decap->size < 4189 (sizeof(struct rte_flow_item_eth) + 4190 sizeof(struct rte_flow_item_ipv4))) { 4191 memcpy(actions_tx, actions, 4192 sizeof(struct rte_flow_action)); 4193 actions_tx++; 4194 } else { 4195 rte_memcpy(actions_rx, actions, 4196 sizeof(struct rte_flow_action)); 4197 actions_rx++; 4198 } 4199 break; 4200 default: 4201 rte_memcpy(actions_rx, actions, 4202 sizeof(struct rte_flow_action)); 4203 actions_rx++; 4204 break; 4205 } 4206 } 4207 /* Add set meta action and end action for the Rx flow. */ 4208 tag_action = actions_rx; 4209 tag_action->type = (enum rte_flow_action_type) 4210 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4211 actions_rx++; 4212 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4213 actions_rx++; 4214 set_tag = (void *)actions_rx; 4215 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL); 4216 MLX5_ASSERT(set_tag->id > REG_NON); 4217 set_tag->data = *flow_id; 4218 tag_action->conf = set_tag; 4219 /* Create Tx item list. */ 4220 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4221 addr = (void *)&pattern_tx[2]; 4222 item = pattern_tx; 4223 item->type = (enum rte_flow_item_type) 4224 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4225 tag_item = (void *)addr; 4226 tag_item->data = *flow_id; 4227 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4228 MLX5_ASSERT(set_tag->id > REG_NON); 4229 item->spec = tag_item; 4230 addr += sizeof(struct mlx5_rte_flow_item_tag); 4231 tag_item = (void *)addr; 4232 tag_item->data = UINT32_MAX; 4233 tag_item->id = UINT16_MAX; 4234 item->mask = tag_item; 4235 item->last = NULL; 4236 item++; 4237 item->type = RTE_FLOW_ITEM_TYPE_END; 4238 return 0; 4239 } 4240 4241 __extension__ 4242 union tunnel_offload_mark { 4243 uint32_t val; 4244 struct { 4245 uint32_t app_reserve:8; 4246 uint32_t table_id:15; 4247 uint32_t transfer:1; 4248 uint32_t _unused_:8; 4249 }; 4250 }; 4251 4252 struct tunnel_default_miss_ctx { 4253 uint16_t *queue; 4254 __extension__ 4255 union { 4256 struct rte_flow_action_rss action_rss; 4257 struct rte_flow_action_queue miss_queue; 4258 struct rte_flow_action_jump miss_jump; 4259 uint8_t raw[0]; 4260 }; 4261 }; 4262 4263 static int 4264 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 4265 struct rte_flow *flow, 4266 const struct rte_flow_attr *attr, 4267 const struct rte_flow_action *app_actions, 4268 uint32_t flow_idx, 4269 struct tunnel_default_miss_ctx *ctx, 4270 struct rte_flow_error *error) 4271 { 4272 struct mlx5_priv *priv = dev->data->dev_private; 4273 struct mlx5_flow *dev_flow; 4274 struct rte_flow_attr miss_attr = *attr; 4275 const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf; 4276 const struct rte_flow_item miss_items[2] = { 4277 { 4278 .type = RTE_FLOW_ITEM_TYPE_ETH, 4279 .spec = NULL, 4280 .last = NULL, 4281 .mask = NULL 4282 }, 4283 { 4284 .type = RTE_FLOW_ITEM_TYPE_END, 4285 .spec = NULL, 4286 .last = NULL, 4287 .mask = NULL 4288 } 4289 }; 4290 union tunnel_offload_mark mark_id; 4291 struct rte_flow_action_mark miss_mark; 4292 struct rte_flow_action miss_actions[3] = { 4293 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 4294 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 4295 }; 4296 const struct rte_flow_action_jump *jump_data; 4297 uint32_t i, flow_table = 0; /* prevent compilation warning */ 4298 struct flow_grp_info grp_info = { 4299 .external = 1, 4300 .transfer = attr->transfer, 4301 .fdb_def_rule = !!priv->fdb_def_rule, 4302 .std_tbl_fix = 0, 4303 }; 4304 int ret; 4305 4306 if (!attr->transfer) { 4307 uint32_t q_size; 4308 4309 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 4310 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 4311 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 4312 0, SOCKET_ID_ANY); 4313 if (!ctx->queue) 4314 return rte_flow_error_set 4315 (error, ENOMEM, 4316 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 4317 NULL, "invalid default miss RSS"); 4318 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 4319 ctx->action_rss.level = 0, 4320 ctx->action_rss.types = priv->rss_conf.rss_hf, 4321 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 4322 ctx->action_rss.queue_num = priv->reta_idx_n, 4323 ctx->action_rss.key = priv->rss_conf.rss_key, 4324 ctx->action_rss.queue = ctx->queue; 4325 if (!priv->reta_idx_n || !priv->rxqs_n) 4326 return rte_flow_error_set 4327 (error, EINVAL, 4328 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 4329 NULL, "invalid port configuration"); 4330 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 4331 ctx->action_rss.types = 0; 4332 for (i = 0; i != priv->reta_idx_n; ++i) 4333 ctx->queue[i] = (*priv->reta_idx)[i]; 4334 } else { 4335 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 4336 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 4337 } 4338 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 4339 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 4340 jump_data = app_actions->conf; 4341 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 4342 miss_attr.group = jump_data->group; 4343 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 4344 &flow_table, grp_info, error); 4345 if (ret) 4346 return rte_flow_error_set(error, EINVAL, 4347 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 4348 NULL, "invalid tunnel id"); 4349 mark_id.app_reserve = 0; 4350 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 4351 mark_id.transfer = !!attr->transfer; 4352 mark_id._unused_ = 0; 4353 miss_mark.id = mark_id.val; 4354 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 4355 miss_items, miss_actions, flow_idx, error); 4356 if (!dev_flow) 4357 return -rte_errno; 4358 dev_flow->flow = flow; 4359 dev_flow->external = true; 4360 dev_flow->tunnel = tunnel; 4361 /* Subflow object was created, we must include one in the list. */ 4362 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4363 dev_flow->handle, next); 4364 DRV_LOG(DEBUG, 4365 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 4366 dev->data->port_id, tunnel->app_tunnel.type, 4367 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 4368 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 4369 miss_actions, error); 4370 if (!ret) 4371 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 4372 error); 4373 4374 return ret; 4375 } 4376 4377 /** 4378 * The last stage of splitting chain, just creates the subflow 4379 * without any modification. 4380 * 4381 * @param[in] dev 4382 * Pointer to Ethernet device. 4383 * @param[in] flow 4384 * Parent flow structure pointer. 4385 * @param[in, out] sub_flow 4386 * Pointer to return the created subflow, may be NULL. 4387 * @param[in] prefix_layers 4388 * Prefix subflow layers, may be 0. 4389 * @param[in] prefix_mark 4390 * Prefix subflow mark flag, may be 0. 4391 * @param[in] attr 4392 * Flow rule attributes. 4393 * @param[in] items 4394 * Pattern specification (list terminated by the END pattern item). 4395 * @param[in] actions 4396 * Associated actions (list terminated by the END action). 4397 * @param[in] external 4398 * This flow rule is created by request external to PMD. 4399 * @param[in] flow_idx 4400 * This memory pool index to the flow. 4401 * @param[out] error 4402 * Perform verbose error reporting if not NULL. 4403 * @return 4404 * 0 on success, negative value otherwise 4405 */ 4406 static int 4407 flow_create_split_inner(struct rte_eth_dev *dev, 4408 struct rte_flow *flow, 4409 struct mlx5_flow **sub_flow, 4410 uint64_t prefix_layers, 4411 uint32_t prefix_mark, 4412 const struct rte_flow_attr *attr, 4413 const struct rte_flow_item items[], 4414 const struct rte_flow_action actions[], 4415 bool external, uint32_t flow_idx, 4416 struct rte_flow_error *error) 4417 { 4418 struct mlx5_flow *dev_flow; 4419 4420 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4421 flow_idx, error); 4422 if (!dev_flow) 4423 return -rte_errno; 4424 dev_flow->flow = flow; 4425 dev_flow->external = external; 4426 /* Subflow object was created, we must include one in the list. */ 4427 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4428 dev_flow->handle, next); 4429 /* 4430 * If dev_flow is as one of the suffix flow, some actions in suffix 4431 * flow may need some user defined item layer flags, and pass the 4432 * Metadate rxq mark flag to suffix flow as well. 4433 */ 4434 if (prefix_layers) 4435 dev_flow->handle->layers = prefix_layers; 4436 if (prefix_mark) 4437 dev_flow->handle->mark = 1; 4438 if (sub_flow) 4439 *sub_flow = dev_flow; 4440 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4441 } 4442 4443 /** 4444 * Split the meter flow. 4445 * 4446 * As meter flow will split to three sub flow, other than meter 4447 * action, the other actions make sense to only meter accepts 4448 * the packet. If it need to be dropped, no other additional 4449 * actions should be take. 4450 * 4451 * One kind of special action which decapsulates the L3 tunnel 4452 * header will be in the prefix sub flow, as not to take the 4453 * L3 tunnel header into account. 4454 * 4455 * @param dev 4456 * Pointer to Ethernet device. 4457 * @param[in] items 4458 * Pattern specification (list terminated by the END pattern item). 4459 * @param[out] sfx_items 4460 * Suffix flow match items (list terminated by the END pattern item). 4461 * @param[in] actions 4462 * Associated actions (list terminated by the END action). 4463 * @param[out] actions_sfx 4464 * Suffix flow actions. 4465 * @param[out] actions_pre 4466 * Prefix flow actions. 4467 * @param[out] pattern_sfx 4468 * The pattern items for the suffix flow. 4469 * @param[out] tag_sfx 4470 * Pointer to suffix flow tag. 4471 * 4472 * @return 4473 * 0 on success. 4474 */ 4475 static int 4476 flow_meter_split_prep(struct rte_eth_dev *dev, 4477 const struct rte_flow_item items[], 4478 struct rte_flow_item sfx_items[], 4479 const struct rte_flow_action actions[], 4480 struct rte_flow_action actions_sfx[], 4481 struct rte_flow_action actions_pre[]) 4482 { 4483 struct rte_flow_action *tag_action = NULL; 4484 struct rte_flow_item *tag_item; 4485 struct mlx5_rte_flow_action_set_tag *set_tag; 4486 struct rte_flow_error error; 4487 const struct rte_flow_action_raw_encap *raw_encap; 4488 const struct rte_flow_action_raw_decap *raw_decap; 4489 struct mlx5_rte_flow_item_tag *tag_spec; 4490 struct mlx5_rte_flow_item_tag *tag_mask; 4491 uint32_t tag_id; 4492 bool copy_vlan = false; 4493 4494 /* Prepare the actions for prefix and suffix flow. */ 4495 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4496 struct rte_flow_action **action_cur = NULL; 4497 4498 switch (actions->type) { 4499 case RTE_FLOW_ACTION_TYPE_METER: 4500 /* Add the extra tag action first. */ 4501 tag_action = actions_pre; 4502 tag_action->type = (enum rte_flow_action_type) 4503 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4504 actions_pre++; 4505 action_cur = &actions_pre; 4506 break; 4507 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4508 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4509 action_cur = &actions_pre; 4510 break; 4511 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4512 raw_encap = actions->conf; 4513 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 4514 action_cur = &actions_pre; 4515 break; 4516 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4517 raw_decap = actions->conf; 4518 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4519 action_cur = &actions_pre; 4520 break; 4521 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4522 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4523 copy_vlan = true; 4524 break; 4525 default: 4526 break; 4527 } 4528 if (!action_cur) 4529 action_cur = &actions_sfx; 4530 memcpy(*action_cur, actions, sizeof(struct rte_flow_action)); 4531 (*action_cur)++; 4532 } 4533 /* Add end action to the actions. */ 4534 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 4535 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 4536 actions_pre++; 4537 /* Set the tag. */ 4538 set_tag = (void *)actions_pre; 4539 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error); 4540 /* 4541 * Get the id from the qrss_pool to make qrss share the id with meter. 4542 */ 4543 tag_id = flow_qrss_get_id(dev); 4544 set_tag->data = tag_id << MLX5_MTR_COLOR_BITS; 4545 assert(tag_action); 4546 tag_action->conf = set_tag; 4547 /* Prepare the suffix subflow items. */ 4548 tag_item = sfx_items++; 4549 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 4550 int item_type = items->type; 4551 4552 switch (item_type) { 4553 case RTE_FLOW_ITEM_TYPE_PORT_ID: 4554 memcpy(sfx_items, items, sizeof(*sfx_items)); 4555 sfx_items++; 4556 break; 4557 case RTE_FLOW_ITEM_TYPE_VLAN: 4558 if (copy_vlan) { 4559 memcpy(sfx_items, items, sizeof(*sfx_items)); 4560 /* 4561 * Convert to internal match item, it is used 4562 * for vlan push and set vid. 4563 */ 4564 sfx_items->type = (enum rte_flow_item_type) 4565 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 4566 sfx_items++; 4567 } 4568 break; 4569 default: 4570 break; 4571 } 4572 } 4573 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 4574 sfx_items++; 4575 tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 4576 tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS; 4577 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error); 4578 tag_mask = tag_spec + 1; 4579 tag_mask->data = 0xffffff00; 4580 tag_item->type = (enum rte_flow_item_type) 4581 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4582 tag_item->spec = tag_spec; 4583 tag_item->last = NULL; 4584 tag_item->mask = tag_mask; 4585 return tag_id; 4586 } 4587 4588 /** 4589 * Split action list having QUEUE/RSS for metadata register copy. 4590 * 4591 * Once Q/RSS action is detected in user's action list, the flow action 4592 * should be split in order to copy metadata registers, which will happen in 4593 * RX_CP_TBL like, 4594 * - CQE->flow_tag := reg_c[1] (MARK) 4595 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4596 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 4597 * This is because the last action of each flow must be a terminal action 4598 * (QUEUE, RSS or DROP). 4599 * 4600 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 4601 * stored and kept in the mlx5_flow structure per each sub_flow. 4602 * 4603 * The Q/RSS action is replaced with, 4604 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 4605 * And the following JUMP action is added at the end, 4606 * - JUMP, to RX_CP_TBL. 4607 * 4608 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 4609 * flow_create_split_metadata() routine. The flow will look like, 4610 * - If flow ID matches (reg_c[2]), perform Q/RSS. 4611 * 4612 * @param dev 4613 * Pointer to Ethernet device. 4614 * @param[out] split_actions 4615 * Pointer to store split actions to jump to CP_TBL. 4616 * @param[in] actions 4617 * Pointer to the list of original flow actions. 4618 * @param[in] qrss 4619 * Pointer to the Q/RSS action. 4620 * @param[in] actions_n 4621 * Number of original actions. 4622 * @param[out] error 4623 * Perform verbose error reporting if not NULL. 4624 * 4625 * @return 4626 * non-zero unique flow_id on success, otherwise 0 and 4627 * error/rte_error are set. 4628 */ 4629 static uint32_t 4630 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 4631 struct rte_flow_action *split_actions, 4632 const struct rte_flow_action *actions, 4633 const struct rte_flow_action *qrss, 4634 int actions_n, struct rte_flow_error *error) 4635 { 4636 struct mlx5_rte_flow_action_set_tag *set_tag; 4637 struct rte_flow_action_jump *jump; 4638 const int qrss_idx = qrss - actions; 4639 uint32_t flow_id = 0; 4640 int ret = 0; 4641 4642 /* 4643 * Given actions will be split 4644 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 4645 * - Add jump to mreg CP_TBL. 4646 * As a result, there will be one more action. 4647 */ 4648 ++actions_n; 4649 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 4650 set_tag = (void *)(split_actions + actions_n); 4651 /* 4652 * If tag action is not set to void(it means we are not the meter 4653 * suffix flow), add the tag action. Since meter suffix flow already 4654 * has the tag added. 4655 */ 4656 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 4657 /* 4658 * Allocate the new subflow ID. This one is unique within 4659 * device and not shared with representors. Otherwise, 4660 * we would have to resolve multi-thread access synch 4661 * issue. Each flow on the shared device is appended 4662 * with source vport identifier, so the resulting 4663 * flows will be unique in the shared (by master and 4664 * representors) domain even if they have coinciding 4665 * IDs. 4666 */ 4667 flow_id = flow_qrss_get_id(dev); 4668 if (!flow_id) 4669 return rte_flow_error_set(error, ENOMEM, 4670 RTE_FLOW_ERROR_TYPE_ACTION, 4671 NULL, "can't allocate id " 4672 "for split Q/RSS subflow"); 4673 /* Internal SET_TAG action to set flow ID. */ 4674 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 4675 .data = flow_id, 4676 }; 4677 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 4678 if (ret < 0) 4679 return ret; 4680 set_tag->id = ret; 4681 /* Construct new actions array. */ 4682 /* Replace QUEUE/RSS action. */ 4683 split_actions[qrss_idx] = (struct rte_flow_action){ 4684 .type = (enum rte_flow_action_type) 4685 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 4686 .conf = set_tag, 4687 }; 4688 } 4689 /* JUMP action to jump to mreg copy table (CP_TBL). */ 4690 jump = (void *)(set_tag + 1); 4691 *jump = (struct rte_flow_action_jump){ 4692 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4693 }; 4694 split_actions[actions_n - 2] = (struct rte_flow_action){ 4695 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4696 .conf = jump, 4697 }; 4698 split_actions[actions_n - 1] = (struct rte_flow_action){ 4699 .type = RTE_FLOW_ACTION_TYPE_END, 4700 }; 4701 return flow_id; 4702 } 4703 4704 /** 4705 * Extend the given action list for Tx metadata copy. 4706 * 4707 * Copy the given action list to the ext_actions and add flow metadata register 4708 * copy action in order to copy reg_a set by WQE to reg_c[0]. 4709 * 4710 * @param[out] ext_actions 4711 * Pointer to the extended action list. 4712 * @param[in] actions 4713 * Pointer to the list of actions. 4714 * @param[in] actions_n 4715 * Number of actions in the list. 4716 * @param[out] error 4717 * Perform verbose error reporting if not NULL. 4718 * @param[in] encap_idx 4719 * The encap action inndex. 4720 * 4721 * @return 4722 * 0 on success, negative value otherwise 4723 */ 4724 static int 4725 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 4726 struct rte_flow_action *ext_actions, 4727 const struct rte_flow_action *actions, 4728 int actions_n, struct rte_flow_error *error, 4729 int encap_idx) 4730 { 4731 struct mlx5_flow_action_copy_mreg *cp_mreg = 4732 (struct mlx5_flow_action_copy_mreg *) 4733 (ext_actions + actions_n + 1); 4734 int ret; 4735 4736 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4737 if (ret < 0) 4738 return ret; 4739 cp_mreg->dst = ret; 4740 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 4741 if (ret < 0) 4742 return ret; 4743 cp_mreg->src = ret; 4744 if (encap_idx != 0) 4745 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 4746 if (encap_idx == actions_n - 1) { 4747 ext_actions[actions_n - 1] = (struct rte_flow_action){ 4748 .type = (enum rte_flow_action_type) 4749 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4750 .conf = cp_mreg, 4751 }; 4752 ext_actions[actions_n] = (struct rte_flow_action){ 4753 .type = RTE_FLOW_ACTION_TYPE_END, 4754 }; 4755 } else { 4756 ext_actions[encap_idx] = (struct rte_flow_action){ 4757 .type = (enum rte_flow_action_type) 4758 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4759 .conf = cp_mreg, 4760 }; 4761 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 4762 sizeof(*ext_actions) * (actions_n - encap_idx)); 4763 } 4764 return 0; 4765 } 4766 4767 /** 4768 * Check the match action from the action list. 4769 * 4770 * @param[in] actions 4771 * Pointer to the list of actions. 4772 * @param[in] attr 4773 * Flow rule attributes. 4774 * @param[in] action 4775 * The action to be check if exist. 4776 * @param[out] match_action_pos 4777 * Pointer to the position of the matched action if exists, otherwise is -1. 4778 * @param[out] qrss_action_pos 4779 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 4780 * 4781 * @return 4782 * > 0 the total number of actions. 4783 * 0 if not found match action in action list. 4784 */ 4785 static int 4786 flow_check_match_action(const struct rte_flow_action actions[], 4787 const struct rte_flow_attr *attr, 4788 enum rte_flow_action_type action, 4789 int *match_action_pos, int *qrss_action_pos) 4790 { 4791 const struct rte_flow_action_sample *sample; 4792 int actions_n = 0; 4793 int jump_flag = 0; 4794 uint32_t ratio = 0; 4795 int sub_type = 0; 4796 int flag = 0; 4797 4798 *match_action_pos = -1; 4799 *qrss_action_pos = -1; 4800 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4801 if (actions->type == action) { 4802 flag = 1; 4803 *match_action_pos = actions_n; 4804 } 4805 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE || 4806 actions->type == RTE_FLOW_ACTION_TYPE_RSS) 4807 *qrss_action_pos = actions_n; 4808 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP) 4809 jump_flag = 1; 4810 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) { 4811 sample = actions->conf; 4812 ratio = sample->ratio; 4813 sub_type = ((const struct rte_flow_action *) 4814 (sample->actions))->type; 4815 } 4816 actions_n++; 4817 } 4818 if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) { 4819 if (ratio == 1) { 4820 /* JUMP Action not support for Mirroring; 4821 * Mirroring support multi-destination; 4822 */ 4823 if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END) 4824 flag = 0; 4825 } 4826 } 4827 /* Count RTE_FLOW_ACTION_TYPE_END. */ 4828 return flag ? actions_n + 1 : 0; 4829 } 4830 4831 #define SAMPLE_SUFFIX_ITEM 2 4832 4833 /** 4834 * Split the sample flow. 4835 * 4836 * As sample flow will split to two sub flow, sample flow with 4837 * sample action, the other actions will move to new suffix flow. 4838 * 4839 * Also add unique tag id with tag action in the sample flow, 4840 * the same tag id will be as match in the suffix flow. 4841 * 4842 * @param dev 4843 * Pointer to Ethernet device. 4844 * @param[in] fdb_tx 4845 * FDB egress flow flag. 4846 * @param[out] sfx_items 4847 * Suffix flow match items (list terminated by the END pattern item). 4848 * @param[in] actions 4849 * Associated actions (list terminated by the END action). 4850 * @param[out] actions_sfx 4851 * Suffix flow actions. 4852 * @param[out] actions_pre 4853 * Prefix flow actions. 4854 * @param[in] actions_n 4855 * The total number of actions. 4856 * @param[in] sample_action_pos 4857 * The sample action position. 4858 * @param[in] qrss_action_pos 4859 * The Queue/RSS action position. 4860 * @param[out] error 4861 * Perform verbose error reporting if not NULL. 4862 * 4863 * @return 4864 * 0 on success, or unique flow_id, a negative errno value 4865 * otherwise and rte_errno is set. 4866 */ 4867 static int 4868 flow_sample_split_prep(struct rte_eth_dev *dev, 4869 uint32_t fdb_tx, 4870 struct rte_flow_item sfx_items[], 4871 const struct rte_flow_action actions[], 4872 struct rte_flow_action actions_sfx[], 4873 struct rte_flow_action actions_pre[], 4874 int actions_n, 4875 int sample_action_pos, 4876 int qrss_action_pos, 4877 struct rte_flow_error *error) 4878 { 4879 struct mlx5_rte_flow_action_set_tag *set_tag; 4880 struct mlx5_rte_flow_item_tag *tag_spec; 4881 struct mlx5_rte_flow_item_tag *tag_mask; 4882 uint32_t tag_id = 0; 4883 int index; 4884 int ret; 4885 4886 if (sample_action_pos < 0) 4887 return rte_flow_error_set(error, EINVAL, 4888 RTE_FLOW_ERROR_TYPE_ACTION, 4889 NULL, "invalid position of sample " 4890 "action in list"); 4891 if (!fdb_tx) { 4892 /* Prepare the prefix tag action. */ 4893 set_tag = (void *)(actions_pre + actions_n + 1); 4894 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); 4895 if (ret < 0) 4896 return ret; 4897 set_tag->id = ret; 4898 tag_id = flow_qrss_get_id(dev); 4899 set_tag->data = tag_id; 4900 /* Prepare the suffix subflow items. */ 4901 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 4902 tag_spec->data = tag_id; 4903 tag_spec->id = set_tag->id; 4904 tag_mask = tag_spec + 1; 4905 tag_mask->data = UINT32_MAX; 4906 sfx_items[0] = (struct rte_flow_item){ 4907 .type = (enum rte_flow_item_type) 4908 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 4909 .spec = tag_spec, 4910 .last = NULL, 4911 .mask = tag_mask, 4912 }; 4913 sfx_items[1] = (struct rte_flow_item){ 4914 .type = (enum rte_flow_item_type) 4915 RTE_FLOW_ITEM_TYPE_END, 4916 }; 4917 } 4918 /* Prepare the actions for prefix and suffix flow. */ 4919 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 4920 index = qrss_action_pos; 4921 /* Put the preceding the Queue/RSS action into prefix flow. */ 4922 if (index != 0) 4923 memcpy(actions_pre, actions, 4924 sizeof(struct rte_flow_action) * index); 4925 /* Put others preceding the sample action into prefix flow. */ 4926 if (sample_action_pos > index + 1) 4927 memcpy(actions_pre + index, actions + index + 1, 4928 sizeof(struct rte_flow_action) * 4929 (sample_action_pos - index - 1)); 4930 index = sample_action_pos - 1; 4931 /* Put Queue/RSS action into Suffix flow. */ 4932 memcpy(actions_sfx, actions + qrss_action_pos, 4933 sizeof(struct rte_flow_action)); 4934 actions_sfx++; 4935 } else { 4936 index = sample_action_pos; 4937 if (index != 0) 4938 memcpy(actions_pre, actions, 4939 sizeof(struct rte_flow_action) * index); 4940 } 4941 /* Add the extra tag action for NIC-RX and E-Switch ingress. */ 4942 if (!fdb_tx) { 4943 actions_pre[index++] = 4944 (struct rte_flow_action){ 4945 .type = (enum rte_flow_action_type) 4946 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 4947 .conf = set_tag, 4948 }; 4949 } 4950 memcpy(actions_pre + index, actions + sample_action_pos, 4951 sizeof(struct rte_flow_action)); 4952 index += 1; 4953 actions_pre[index] = (struct rte_flow_action){ 4954 .type = (enum rte_flow_action_type) 4955 RTE_FLOW_ACTION_TYPE_END, 4956 }; 4957 /* Put the actions after sample into Suffix flow. */ 4958 memcpy(actions_sfx, actions + sample_action_pos + 1, 4959 sizeof(struct rte_flow_action) * 4960 (actions_n - sample_action_pos - 1)); 4961 return tag_id; 4962 } 4963 4964 /** 4965 * The splitting for metadata feature. 4966 * 4967 * - Q/RSS action on NIC Rx should be split in order to pass by 4968 * the mreg copy table (RX_CP_TBL) and then it jumps to the 4969 * action table (RX_ACT_TBL) which has the split Q/RSS action. 4970 * 4971 * - All the actions on NIC Tx should have a mreg copy action to 4972 * copy reg_a from WQE to reg_c[0]. 4973 * 4974 * @param dev 4975 * Pointer to Ethernet device. 4976 * @param[in] flow 4977 * Parent flow structure pointer. 4978 * @param[in] prefix_layers 4979 * Prefix flow layer flags. 4980 * @param[in] prefix_mark 4981 * Prefix subflow mark flag, may be 0. 4982 * @param[in] attr 4983 * Flow rule attributes. 4984 * @param[in] items 4985 * Pattern specification (list terminated by the END pattern item). 4986 * @param[in] actions 4987 * Associated actions (list terminated by the END action). 4988 * @param[in] external 4989 * This flow rule is created by request external to PMD. 4990 * @param[in] flow_idx 4991 * This memory pool index to the flow. 4992 * @param[out] error 4993 * Perform verbose error reporting if not NULL. 4994 * @return 4995 * 0 on success, negative value otherwise 4996 */ 4997 static int 4998 flow_create_split_metadata(struct rte_eth_dev *dev, 4999 struct rte_flow *flow, 5000 uint64_t prefix_layers, 5001 uint32_t prefix_mark, 5002 const struct rte_flow_attr *attr, 5003 const struct rte_flow_item items[], 5004 const struct rte_flow_action actions[], 5005 bool external, uint32_t flow_idx, 5006 struct rte_flow_error *error) 5007 { 5008 struct mlx5_priv *priv = dev->data->dev_private; 5009 struct mlx5_dev_config *config = &priv->config; 5010 const struct rte_flow_action *qrss = NULL; 5011 struct rte_flow_action *ext_actions = NULL; 5012 struct mlx5_flow *dev_flow = NULL; 5013 uint32_t qrss_id = 0; 5014 int mtr_sfx = 0; 5015 size_t act_size; 5016 int actions_n; 5017 int encap_idx; 5018 int ret; 5019 5020 /* Check whether extensive metadata feature is engaged. */ 5021 if (!config->dv_flow_en || 5022 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 5023 !mlx5_flow_ext_mreg_supported(dev)) 5024 return flow_create_split_inner(dev, flow, NULL, prefix_layers, 5025 prefix_mark, attr, items, 5026 actions, external, flow_idx, 5027 error); 5028 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 5029 &encap_idx); 5030 if (qrss) { 5031 /* Exclude hairpin flows from splitting. */ 5032 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 5033 const struct rte_flow_action_queue *queue; 5034 5035 queue = qrss->conf; 5036 if (mlx5_rxq_get_type(dev, queue->index) == 5037 MLX5_RXQ_TYPE_HAIRPIN) 5038 qrss = NULL; 5039 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 5040 const struct rte_flow_action_rss *rss; 5041 5042 rss = qrss->conf; 5043 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 5044 MLX5_RXQ_TYPE_HAIRPIN) 5045 qrss = NULL; 5046 } 5047 } 5048 if (qrss) { 5049 /* Check if it is in meter suffix table. */ 5050 mtr_sfx = attr->group == (attr->transfer ? 5051 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) : 5052 MLX5_FLOW_TABLE_LEVEL_SUFFIX); 5053 /* 5054 * Q/RSS action on NIC Rx should be split in order to pass by 5055 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5056 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5057 */ 5058 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5059 sizeof(struct rte_flow_action_set_tag) + 5060 sizeof(struct rte_flow_action_jump); 5061 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5062 SOCKET_ID_ANY); 5063 if (!ext_actions) 5064 return rte_flow_error_set(error, ENOMEM, 5065 RTE_FLOW_ERROR_TYPE_ACTION, 5066 NULL, "no memory to split " 5067 "metadata flow"); 5068 /* 5069 * If we are the suffix flow of meter, tag already exist. 5070 * Set the tag action to void. 5071 */ 5072 if (mtr_sfx) 5073 ext_actions[qrss - actions].type = 5074 RTE_FLOW_ACTION_TYPE_VOID; 5075 else 5076 ext_actions[qrss - actions].type = 5077 (enum rte_flow_action_type) 5078 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5079 /* 5080 * Create the new actions list with removed Q/RSS action 5081 * and appended set tag and jump to register copy table 5082 * (RX_CP_TBL). We should preallocate unique tag ID here 5083 * in advance, because it is needed for set tag action. 5084 */ 5085 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5086 qrss, actions_n, error); 5087 if (!mtr_sfx && !qrss_id) { 5088 ret = -rte_errno; 5089 goto exit; 5090 } 5091 } else if (attr->egress && !attr->transfer) { 5092 /* 5093 * All the actions on NIC Tx should have a metadata register 5094 * copy action to copy reg_a from WQE to reg_c[meta] 5095 */ 5096 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5097 sizeof(struct mlx5_flow_action_copy_mreg); 5098 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5099 SOCKET_ID_ANY); 5100 if (!ext_actions) 5101 return rte_flow_error_set(error, ENOMEM, 5102 RTE_FLOW_ERROR_TYPE_ACTION, 5103 NULL, "no memory to split " 5104 "metadata flow"); 5105 /* Create the action list appended with copy register. */ 5106 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5107 actions_n, error, encap_idx); 5108 if (ret < 0) 5109 goto exit; 5110 } 5111 /* Add the unmodified original or prefix subflow. */ 5112 ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers, 5113 prefix_mark, attr, 5114 items, ext_actions ? ext_actions : 5115 actions, external, flow_idx, error); 5116 if (ret < 0) 5117 goto exit; 5118 MLX5_ASSERT(dev_flow); 5119 if (qrss) { 5120 const struct rte_flow_attr q_attr = { 5121 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5122 .ingress = 1, 5123 }; 5124 /* Internal PMD action to set register. */ 5125 struct mlx5_rte_flow_item_tag q_tag_spec = { 5126 .data = qrss_id, 5127 .id = REG_NON, 5128 }; 5129 struct rte_flow_item q_items[] = { 5130 { 5131 .type = (enum rte_flow_item_type) 5132 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5133 .spec = &q_tag_spec, 5134 .last = NULL, 5135 .mask = NULL, 5136 }, 5137 { 5138 .type = RTE_FLOW_ITEM_TYPE_END, 5139 }, 5140 }; 5141 struct rte_flow_action q_actions[] = { 5142 { 5143 .type = qrss->type, 5144 .conf = qrss->conf, 5145 }, 5146 { 5147 .type = RTE_FLOW_ACTION_TYPE_END, 5148 }, 5149 }; 5150 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5151 5152 /* 5153 * Configure the tag item only if there is no meter subflow. 5154 * Since tag is already marked in the meter suffix subflow 5155 * we can just use the meter suffix items as is. 5156 */ 5157 if (qrss_id) { 5158 /* Not meter subflow. */ 5159 MLX5_ASSERT(!mtr_sfx); 5160 /* 5161 * Put unique id in prefix flow due to it is destroyed 5162 * after suffix flow and id will be freed after there 5163 * is no actual flows with this id and identifier 5164 * reallocation becomes possible (for example, for 5165 * other flows in other threads). 5166 */ 5167 dev_flow->handle->split_flow_id = qrss_id; 5168 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5169 error); 5170 if (ret < 0) 5171 goto exit; 5172 q_tag_spec.id = ret; 5173 } 5174 dev_flow = NULL; 5175 /* Add suffix subflow to execute Q/RSS. */ 5176 ret = flow_create_split_inner(dev, flow, &dev_flow, layers, 0, 5177 &q_attr, mtr_sfx ? items : 5178 q_items, q_actions, 5179 external, flow_idx, error); 5180 if (ret < 0) 5181 goto exit; 5182 /* qrss ID should be freed if failed. */ 5183 qrss_id = 0; 5184 MLX5_ASSERT(dev_flow); 5185 } 5186 5187 exit: 5188 /* 5189 * We do not destroy the partially created sub_flows in case of error. 5190 * These ones are included into parent flow list and will be destroyed 5191 * by flow_drv_destroy. 5192 */ 5193 flow_qrss_free_id(dev, qrss_id); 5194 mlx5_free(ext_actions); 5195 return ret; 5196 } 5197 5198 /** 5199 * The splitting for meter feature. 5200 * 5201 * - The meter flow will be split to two flows as prefix and 5202 * suffix flow. The packets make sense only it pass the prefix 5203 * meter action. 5204 * 5205 * - Reg_C_5 is used for the packet to match betweend prefix and 5206 * suffix flow. 5207 * 5208 * @param dev 5209 * Pointer to Ethernet device. 5210 * @param[in] flow 5211 * Parent flow structure pointer. 5212 * @param[in] prefix_layers 5213 * Prefix subflow layers, may be 0. 5214 * @param[in] prefix_mark 5215 * Prefix subflow mark flag, may be 0. 5216 * @param[in] attr 5217 * Flow rule attributes. 5218 * @param[in] items 5219 * Pattern specification (list terminated by the END pattern item). 5220 * @param[in] actions 5221 * Associated actions (list terminated by the END action). 5222 * @param[in] external 5223 * This flow rule is created by request external to PMD. 5224 * @param[in] flow_idx 5225 * This memory pool index to the flow. 5226 * @param[out] error 5227 * Perform verbose error reporting if not NULL. 5228 * @return 5229 * 0 on success, negative value otherwise 5230 */ 5231 static int 5232 flow_create_split_meter(struct rte_eth_dev *dev, 5233 struct rte_flow *flow, 5234 uint64_t prefix_layers, 5235 uint32_t prefix_mark, 5236 const struct rte_flow_attr *attr, 5237 const struct rte_flow_item items[], 5238 const struct rte_flow_action actions[], 5239 bool external, uint32_t flow_idx, 5240 struct rte_flow_error *error) 5241 { 5242 struct mlx5_priv *priv = dev->data->dev_private; 5243 struct rte_flow_action *sfx_actions = NULL; 5244 struct rte_flow_action *pre_actions = NULL; 5245 struct rte_flow_item *sfx_items = NULL; 5246 struct mlx5_flow *dev_flow = NULL; 5247 struct rte_flow_attr sfx_attr = *attr; 5248 uint32_t mtr = 0; 5249 uint32_t mtr_tag_id = 0; 5250 size_t act_size; 5251 size_t item_size; 5252 int actions_n = 0; 5253 int ret; 5254 5255 if (priv->mtr_en) 5256 actions_n = flow_check_meter_action(actions, &mtr); 5257 if (mtr) { 5258 /* The five prefix actions: meter, decap, encap, tag, end. */ 5259 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) + 5260 sizeof(struct mlx5_rte_flow_action_set_tag); 5261 /* tag, vlan, port id, end. */ 5262 #define METER_SUFFIX_ITEM 4 5263 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 5264 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5265 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 5266 0, SOCKET_ID_ANY); 5267 if (!sfx_actions) 5268 return rte_flow_error_set(error, ENOMEM, 5269 RTE_FLOW_ERROR_TYPE_ACTION, 5270 NULL, "no memory to split " 5271 "meter flow"); 5272 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 5273 act_size); 5274 pre_actions = sfx_actions + actions_n; 5275 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items, 5276 actions, sfx_actions, 5277 pre_actions); 5278 if (!mtr_tag_id) { 5279 ret = -rte_errno; 5280 goto exit; 5281 } 5282 /* Add the prefix subflow. */ 5283 ret = flow_create_split_inner(dev, flow, &dev_flow, 5284 prefix_layers, 0, 5285 attr, items, 5286 pre_actions, external, 5287 flow_idx, error); 5288 if (ret) { 5289 ret = -rte_errno; 5290 goto exit; 5291 } 5292 dev_flow->handle->split_flow_id = mtr_tag_id; 5293 /* Setting the sfx group atrr. */ 5294 sfx_attr.group = sfx_attr.transfer ? 5295 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) : 5296 MLX5_FLOW_TABLE_LEVEL_SUFFIX; 5297 } 5298 /* Add the prefix subflow. */ 5299 ret = flow_create_split_metadata(dev, flow, dev_flow ? 5300 flow_get_prefix_layer_flags(dev_flow) : 5301 prefix_layers, dev_flow ? 5302 dev_flow->handle->mark : prefix_mark, 5303 &sfx_attr, sfx_items ? 5304 sfx_items : items, 5305 sfx_actions ? sfx_actions : actions, 5306 external, flow_idx, error); 5307 exit: 5308 if (sfx_actions) 5309 mlx5_free(sfx_actions); 5310 return ret; 5311 } 5312 5313 /** 5314 * The splitting for sample feature. 5315 * 5316 * Once Sample action is detected in the action list, the flow actions should 5317 * be split into prefix sub flow and suffix sub flow. 5318 * 5319 * The original items remain in the prefix sub flow, all actions preceding the 5320 * sample action and the sample action itself will be copied to the prefix 5321 * sub flow, the actions following the sample action will be copied to the 5322 * suffix sub flow, Queue action always be located in the suffix sub flow. 5323 * 5324 * In order to make the packet from prefix sub flow matches with suffix sub 5325 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 5326 * flow uses tag item with the unique flow id. 5327 * 5328 * @param dev 5329 * Pointer to Ethernet device. 5330 * @param[in] flow 5331 * Parent flow structure pointer. 5332 * @param[in] attr 5333 * Flow rule attributes. 5334 * @param[in] items 5335 * Pattern specification (list terminated by the END pattern item). 5336 * @param[in] actions 5337 * Associated actions (list terminated by the END action). 5338 * @param[in] external 5339 * This flow rule is created by request external to PMD. 5340 * @param[in] flow_idx 5341 * This memory pool index to the flow. 5342 * @param[out] error 5343 * Perform verbose error reporting if not NULL. 5344 * @return 5345 * 0 on success, negative value otherwise 5346 */ 5347 static int 5348 flow_create_split_sample(struct rte_eth_dev *dev, 5349 struct rte_flow *flow, 5350 const struct rte_flow_attr *attr, 5351 const struct rte_flow_item items[], 5352 const struct rte_flow_action actions[], 5353 bool external, uint32_t flow_idx, 5354 struct rte_flow_error *error) 5355 { 5356 struct mlx5_priv *priv = dev->data->dev_private; 5357 struct rte_flow_action *sfx_actions = NULL; 5358 struct rte_flow_action *pre_actions = NULL; 5359 struct rte_flow_item *sfx_items = NULL; 5360 struct mlx5_flow *dev_flow = NULL; 5361 struct rte_flow_attr sfx_attr = *attr; 5362 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5363 struct mlx5_flow_dv_sample_resource *sample_res; 5364 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 5365 struct mlx5_flow_tbl_resource *sfx_tbl; 5366 union mlx5_flow_tbl_key sfx_table_key; 5367 #endif 5368 size_t act_size; 5369 size_t item_size; 5370 uint32_t fdb_tx = 0; 5371 int32_t tag_id = 0; 5372 int actions_n = 0; 5373 int sample_action_pos; 5374 int qrss_action_pos; 5375 int ret = 0; 5376 5377 if (priv->sampler_en) 5378 actions_n = flow_check_match_action(actions, attr, 5379 RTE_FLOW_ACTION_TYPE_SAMPLE, 5380 &sample_action_pos, &qrss_action_pos); 5381 if (actions_n) { 5382 /* The prefix actions must includes sample, tag, end. */ 5383 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 5384 + sizeof(struct mlx5_rte_flow_action_set_tag); 5385 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 5386 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5387 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 5388 item_size), 0, SOCKET_ID_ANY); 5389 if (!sfx_actions) 5390 return rte_flow_error_set(error, ENOMEM, 5391 RTE_FLOW_ERROR_TYPE_ACTION, 5392 NULL, "no memory to split " 5393 "sample flow"); 5394 /* The representor_id is -1 for uplink. */ 5395 fdb_tx = (attr->transfer && priv->representor_id != -1); 5396 if (!fdb_tx) 5397 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 5398 + act_size); 5399 pre_actions = sfx_actions + actions_n; 5400 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items, 5401 actions, sfx_actions, 5402 pre_actions, actions_n, 5403 sample_action_pos, 5404 qrss_action_pos, error); 5405 if (tag_id < 0 || (!fdb_tx && !tag_id)) { 5406 ret = -rte_errno; 5407 goto exit; 5408 } 5409 /* Add the prefix subflow. */ 5410 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, 0, attr, 5411 items, pre_actions, external, 5412 flow_idx, error); 5413 if (ret) { 5414 ret = -rte_errno; 5415 goto exit; 5416 } 5417 dev_flow->handle->split_flow_id = tag_id; 5418 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5419 /* Set the sfx group attr. */ 5420 sample_res = (struct mlx5_flow_dv_sample_resource *) 5421 dev_flow->dv.sample_res; 5422 sfx_tbl = (struct mlx5_flow_tbl_resource *) 5423 sample_res->normal_path_tbl; 5424 sfx_tbl_data = container_of(sfx_tbl, 5425 struct mlx5_flow_tbl_data_entry, tbl); 5426 sfx_table_key.v64 = sfx_tbl_data->entry.key; 5427 sfx_attr.group = sfx_attr.transfer ? 5428 (sfx_table_key.table_id - 1) : 5429 sfx_table_key.table_id; 5430 #endif 5431 } 5432 /* Add the suffix subflow. */ 5433 ret = flow_create_split_meter(dev, flow, dev_flow ? 5434 flow_get_prefix_layer_flags(dev_flow) : 0, 5435 dev_flow ? dev_flow->handle->mark : 0, 5436 &sfx_attr, sfx_items ? sfx_items : items, 5437 sfx_actions ? sfx_actions : actions, 5438 external, flow_idx, error); 5439 exit: 5440 if (sfx_actions) 5441 mlx5_free(sfx_actions); 5442 return ret; 5443 } 5444 5445 /** 5446 * Split the flow to subflow set. The splitters might be linked 5447 * in the chain, like this: 5448 * flow_create_split_outer() calls: 5449 * flow_create_split_meter() calls: 5450 * flow_create_split_metadata(meter_subflow_0) calls: 5451 * flow_create_split_inner(metadata_subflow_0) 5452 * flow_create_split_inner(metadata_subflow_1) 5453 * flow_create_split_inner(metadata_subflow_2) 5454 * flow_create_split_metadata(meter_subflow_1) calls: 5455 * flow_create_split_inner(metadata_subflow_0) 5456 * flow_create_split_inner(metadata_subflow_1) 5457 * flow_create_split_inner(metadata_subflow_2) 5458 * 5459 * This provide flexible way to add new levels of flow splitting. 5460 * The all of successfully created subflows are included to the 5461 * parent flow dev_flow list. 5462 * 5463 * @param dev 5464 * Pointer to Ethernet device. 5465 * @param[in] flow 5466 * Parent flow structure pointer. 5467 * @param[in] attr 5468 * Flow rule attributes. 5469 * @param[in] items 5470 * Pattern specification (list terminated by the END pattern item). 5471 * @param[in] actions 5472 * Associated actions (list terminated by the END action). 5473 * @param[in] external 5474 * This flow rule is created by request external to PMD. 5475 * @param[in] flow_idx 5476 * This memory pool index to the flow. 5477 * @param[out] error 5478 * Perform verbose error reporting if not NULL. 5479 * @return 5480 * 0 on success, negative value otherwise 5481 */ 5482 static int 5483 flow_create_split_outer(struct rte_eth_dev *dev, 5484 struct rte_flow *flow, 5485 const struct rte_flow_attr *attr, 5486 const struct rte_flow_item items[], 5487 const struct rte_flow_action actions[], 5488 bool external, uint32_t flow_idx, 5489 struct rte_flow_error *error) 5490 { 5491 int ret; 5492 5493 ret = flow_create_split_sample(dev, flow, attr, items, 5494 actions, external, flow_idx, error); 5495 MLX5_ASSERT(ret <= 0); 5496 return ret; 5497 } 5498 5499 static struct mlx5_flow_tunnel * 5500 flow_tunnel_from_rule(struct rte_eth_dev *dev, 5501 const struct rte_flow_attr *attr, 5502 const struct rte_flow_item items[], 5503 const struct rte_flow_action actions[]) 5504 { 5505 struct mlx5_flow_tunnel *tunnel; 5506 5507 #pragma GCC diagnostic push 5508 #pragma GCC diagnostic ignored "-Wcast-qual" 5509 if (is_flow_tunnel_match_rule(dev, attr, items, actions)) 5510 tunnel = (struct mlx5_flow_tunnel *)items[0].spec; 5511 else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) 5512 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf; 5513 else 5514 tunnel = NULL; 5515 #pragma GCC diagnostic pop 5516 5517 return tunnel; 5518 } 5519 5520 /** 5521 * Create a flow and add it to @p list. 5522 * 5523 * @param dev 5524 * Pointer to Ethernet device. 5525 * @param list 5526 * Pointer to a TAILQ flow list. If this parameter NULL, 5527 * no list insertion occurred, flow is just created, 5528 * this is caller's responsibility to track the 5529 * created flow. 5530 * @param[in] attr 5531 * Flow rule attributes. 5532 * @param[in] items 5533 * Pattern specification (list terminated by the END pattern item). 5534 * @param[in] actions 5535 * Associated actions (list terminated by the END action). 5536 * @param[in] external 5537 * This flow rule is created by request external to PMD. 5538 * @param[out] error 5539 * Perform verbose error reporting if not NULL. 5540 * 5541 * @return 5542 * A flow index on success, 0 otherwise and rte_errno is set. 5543 */ 5544 static uint32_t 5545 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 5546 const struct rte_flow_attr *attr, 5547 const struct rte_flow_item items[], 5548 const struct rte_flow_action original_actions[], 5549 bool external, struct rte_flow_error *error) 5550 { 5551 struct mlx5_priv *priv = dev->data->dev_private; 5552 struct rte_flow *flow = NULL; 5553 struct mlx5_flow *dev_flow; 5554 const struct rte_flow_action_rss *rss; 5555 struct mlx5_translated_shared_action 5556 shared_actions[MLX5_MAX_SHARED_ACTIONS]; 5557 int shared_actions_n = MLX5_MAX_SHARED_ACTIONS; 5558 union { 5559 struct mlx5_flow_expand_rss buf; 5560 uint8_t buffer[2048]; 5561 } expand_buffer; 5562 union { 5563 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 5564 uint8_t buffer[2048]; 5565 } actions_rx; 5566 union { 5567 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 5568 uint8_t buffer[2048]; 5569 } actions_hairpin_tx; 5570 union { 5571 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 5572 uint8_t buffer[2048]; 5573 } items_tx; 5574 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 5575 struct mlx5_flow_rss_desc *rss_desc = &((struct mlx5_flow_rss_desc *) 5576 priv->rss_desc)[!!priv->flow_idx]; 5577 const struct rte_flow_action *p_actions_rx; 5578 uint32_t i; 5579 uint32_t idx = 0; 5580 int hairpin_flow; 5581 uint32_t hairpin_id = 0; 5582 struct rte_flow_attr attr_tx = { .priority = 0 }; 5583 struct rte_flow_attr attr_factor = {0}; 5584 const struct rte_flow_action *actions; 5585 struct rte_flow_action *translated_actions = NULL; 5586 struct mlx5_flow_tunnel *tunnel; 5587 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 5588 int ret = flow_shared_actions_translate(original_actions, 5589 shared_actions, 5590 &shared_actions_n, 5591 &translated_actions, error); 5592 5593 if (ret < 0) { 5594 MLX5_ASSERT(translated_actions == NULL); 5595 return 0; 5596 } 5597 actions = translated_actions ? translated_actions : original_actions; 5598 memcpy((void *)&attr_factor, (const void *)attr, sizeof(*attr)); 5599 p_actions_rx = actions; 5600 hairpin_flow = flow_check_hairpin_split(dev, &attr_factor, actions); 5601 ret = flow_drv_validate(dev, &attr_factor, items, p_actions_rx, 5602 external, hairpin_flow, error); 5603 if (ret < 0) 5604 goto error_before_hairpin_split; 5605 if (hairpin_flow > 0) { 5606 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 5607 rte_errno = EINVAL; 5608 goto error_before_hairpin_split; 5609 } 5610 flow_hairpin_split(dev, actions, actions_rx.actions, 5611 actions_hairpin_tx.actions, items_tx.items, 5612 &hairpin_id); 5613 p_actions_rx = actions_rx.actions; 5614 } 5615 flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx); 5616 if (!flow) { 5617 rte_errno = ENOMEM; 5618 goto error_before_flow; 5619 } 5620 flow->drv_type = flow_get_drv_type(dev, &attr_factor); 5621 if (hairpin_id != 0) 5622 flow->hairpin_flow_id = hairpin_id; 5623 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 5624 flow->drv_type < MLX5_FLOW_TYPE_MAX); 5625 memset(rss_desc, 0, sizeof(*rss_desc)); 5626 rss = flow_get_rss_action(p_actions_rx); 5627 if (rss) { 5628 /* 5629 * The following information is required by 5630 * mlx5_flow_hashfields_adjust() in advance. 5631 */ 5632 rss_desc->level = rss->level; 5633 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */ 5634 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types; 5635 } 5636 flow->dev_handles = 0; 5637 if (rss && rss->types) { 5638 unsigned int graph_root; 5639 5640 graph_root = find_graph_root(items, rss->level); 5641 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 5642 items, rss->types, 5643 mlx5_support_expansion, graph_root); 5644 MLX5_ASSERT(ret > 0 && 5645 (unsigned int)ret < sizeof(expand_buffer.buffer)); 5646 } else { 5647 buf->entries = 1; 5648 buf->entry[0].pattern = (void *)(uintptr_t)items; 5649 } 5650 flow->shared_rss = flow_get_shared_rss_action(shared_actions, 5651 shared_actions_n); 5652 /* 5653 * Record the start index when there is a nested call. All sub-flows 5654 * need to be translated before another calling. 5655 * No need to use ping-pong buffer to save memory here. 5656 */ 5657 if (priv->flow_idx) { 5658 MLX5_ASSERT(!priv->flow_nested_idx); 5659 priv->flow_nested_idx = priv->flow_idx; 5660 } 5661 for (i = 0; i < buf->entries; ++i) { 5662 /* 5663 * The splitter may create multiple dev_flows, 5664 * depending on configuration. In the simplest 5665 * case it just creates unmodified original flow. 5666 */ 5667 ret = flow_create_split_outer(dev, flow, &attr_factor, 5668 buf->entry[i].pattern, 5669 p_actions_rx, external, idx, 5670 error); 5671 if (ret < 0) 5672 goto error; 5673 if (is_flow_tunnel_steer_rule(dev, attr, 5674 buf->entry[i].pattern, 5675 p_actions_rx)) { 5676 ret = flow_tunnel_add_default_miss(dev, flow, attr, 5677 p_actions_rx, 5678 idx, 5679 &default_miss_ctx, 5680 error); 5681 if (ret < 0) { 5682 mlx5_free(default_miss_ctx.queue); 5683 goto error; 5684 } 5685 } 5686 } 5687 /* Create the tx flow. */ 5688 if (hairpin_flow) { 5689 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 5690 attr_tx.ingress = 0; 5691 attr_tx.egress = 1; 5692 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 5693 actions_hairpin_tx.actions, 5694 idx, error); 5695 if (!dev_flow) 5696 goto error; 5697 dev_flow->flow = flow; 5698 dev_flow->external = 0; 5699 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 5700 dev_flow->handle, next); 5701 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 5702 items_tx.items, 5703 actions_hairpin_tx.actions, error); 5704 if (ret < 0) 5705 goto error; 5706 } 5707 /* 5708 * Update the metadata register copy table. If extensive 5709 * metadata feature is enabled and registers are supported 5710 * we might create the extra rte_flow for each unique 5711 * MARK/FLAG action ID. 5712 * 5713 * The table is updated for ingress Flows only, because 5714 * the egress Flows belong to the different device and 5715 * copy table should be updated in peer NIC Rx domain. 5716 */ 5717 if (attr_factor.ingress && 5718 (external || attr_factor.group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 5719 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 5720 if (ret) 5721 goto error; 5722 } 5723 /* 5724 * If the flow is external (from application) OR device is started, then 5725 * the flow will be applied immediately. 5726 */ 5727 if (external || dev->data->dev_started) { 5728 ret = flow_drv_apply(dev, flow, error); 5729 if (ret < 0) 5730 goto error; 5731 } 5732 if (list) 5733 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx, 5734 flow, next); 5735 flow_rxq_flags_set(dev, flow); 5736 rte_free(translated_actions); 5737 /* Nested flow creation index recovery. */ 5738 priv->flow_idx = priv->flow_nested_idx; 5739 if (priv->flow_nested_idx) 5740 priv->flow_nested_idx = 0; 5741 tunnel = flow_tunnel_from_rule(dev, attr, items, actions); 5742 if (tunnel) { 5743 flow->tunnel = 1; 5744 flow->tunnel_id = tunnel->tunnel_id; 5745 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 5746 mlx5_free(default_miss_ctx.queue); 5747 } 5748 return idx; 5749 error: 5750 MLX5_ASSERT(flow); 5751 ret = rte_errno; /* Save rte_errno before cleanup. */ 5752 flow_mreg_del_copy_action(dev, flow); 5753 flow_drv_destroy(dev, flow); 5754 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx); 5755 rte_errno = ret; /* Restore rte_errno. */ 5756 error_before_flow: 5757 ret = rte_errno; 5758 if (hairpin_id) 5759 mlx5_flow_id_release(priv->sh->flow_id_pool, 5760 hairpin_id); 5761 rte_errno = ret; 5762 priv->flow_idx = priv->flow_nested_idx; 5763 if (priv->flow_nested_idx) 5764 priv->flow_nested_idx = 0; 5765 error_before_hairpin_split: 5766 rte_free(translated_actions); 5767 return 0; 5768 } 5769 5770 /** 5771 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 5772 * incoming packets to table 1. 5773 * 5774 * Other flow rules, requested for group n, will be created in 5775 * e-switch table n+1. 5776 * Jump action to e-switch group n will be created to group n+1. 5777 * 5778 * Used when working in switchdev mode, to utilise advantages of table 1 5779 * and above. 5780 * 5781 * @param dev 5782 * Pointer to Ethernet device. 5783 * 5784 * @return 5785 * Pointer to flow on success, NULL otherwise and rte_errno is set. 5786 */ 5787 struct rte_flow * 5788 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 5789 { 5790 const struct rte_flow_attr attr = { 5791 .group = 0, 5792 .priority = 0, 5793 .ingress = 1, 5794 .egress = 0, 5795 .transfer = 1, 5796 }; 5797 const struct rte_flow_item pattern = { 5798 .type = RTE_FLOW_ITEM_TYPE_END, 5799 }; 5800 struct rte_flow_action_jump jump = { 5801 .group = 1, 5802 }; 5803 const struct rte_flow_action actions[] = { 5804 { 5805 .type = RTE_FLOW_ACTION_TYPE_JUMP, 5806 .conf = &jump, 5807 }, 5808 { 5809 .type = RTE_FLOW_ACTION_TYPE_END, 5810 }, 5811 }; 5812 struct mlx5_priv *priv = dev->data->dev_private; 5813 struct rte_flow_error error; 5814 5815 return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows, 5816 &attr, &pattern, 5817 actions, false, &error); 5818 } 5819 5820 /** 5821 * Validate a flow supported by the NIC. 5822 * 5823 * @see rte_flow_validate() 5824 * @see rte_flow_ops 5825 */ 5826 int 5827 mlx5_flow_validate(struct rte_eth_dev *dev, 5828 const struct rte_flow_attr *attr, 5829 const struct rte_flow_item items[], 5830 const struct rte_flow_action original_actions[], 5831 struct rte_flow_error *error) 5832 { 5833 int hairpin_flow; 5834 struct mlx5_translated_shared_action 5835 shared_actions[MLX5_MAX_SHARED_ACTIONS]; 5836 int shared_actions_n = MLX5_MAX_SHARED_ACTIONS; 5837 const struct rte_flow_action *actions; 5838 struct rte_flow_action *translated_actions = NULL; 5839 int ret = flow_shared_actions_translate(original_actions, 5840 shared_actions, 5841 &shared_actions_n, 5842 &translated_actions, error); 5843 5844 if (ret) 5845 return ret; 5846 actions = translated_actions ? translated_actions : original_actions; 5847 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 5848 ret = flow_drv_validate(dev, attr, items, actions, 5849 true, hairpin_flow, error); 5850 rte_free(translated_actions); 5851 return ret; 5852 } 5853 5854 /** 5855 * Create a flow. 5856 * 5857 * @see rte_flow_create() 5858 * @see rte_flow_ops 5859 */ 5860 struct rte_flow * 5861 mlx5_flow_create(struct rte_eth_dev *dev, 5862 const struct rte_flow_attr *attr, 5863 const struct rte_flow_item items[], 5864 const struct rte_flow_action actions[], 5865 struct rte_flow_error *error) 5866 { 5867 struct mlx5_priv *priv = dev->data->dev_private; 5868 5869 /* 5870 * If the device is not started yet, it is not allowed to created a 5871 * flow from application. PMD default flows and traffic control flows 5872 * are not affected. 5873 */ 5874 if (unlikely(!dev->data->dev_started)) { 5875 DRV_LOG(DEBUG, "port %u is not started when " 5876 "inserting a flow", dev->data->port_id); 5877 rte_flow_error_set(error, ENODEV, 5878 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5879 NULL, 5880 "port not started"); 5881 return NULL; 5882 } 5883 5884 return (void *)(uintptr_t)flow_list_create(dev, &priv->flows, 5885 attr, items, actions, true, error); 5886 } 5887 5888 /** 5889 * Destroy a flow in a list. 5890 * 5891 * @param dev 5892 * Pointer to Ethernet device. 5893 * @param list 5894 * Pointer to the Indexed flow list. If this parameter NULL, 5895 * there is no flow removal from the list. Be noted that as 5896 * flow is add to the indexed list, memory of the indexed 5897 * list points to maybe changed as flow destroyed. 5898 * @param[in] flow_idx 5899 * Index of flow to destroy. 5900 */ 5901 static void 5902 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 5903 uint32_t flow_idx) 5904 { 5905 struct mlx5_priv *priv = dev->data->dev_private; 5906 struct mlx5_fdir_flow *priv_fdir_flow = NULL; 5907 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 5908 [MLX5_IPOOL_RTE_FLOW], flow_idx); 5909 5910 if (!flow) 5911 return; 5912 /* 5913 * Update RX queue flags only if port is started, otherwise it is 5914 * already clean. 5915 */ 5916 if (dev->data->dev_started) 5917 flow_rxq_flags_trim(dev, flow); 5918 if (flow->hairpin_flow_id) 5919 mlx5_flow_id_release(priv->sh->flow_id_pool, 5920 flow->hairpin_flow_id); 5921 flow_drv_destroy(dev, flow); 5922 if (list) 5923 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, 5924 flow_idx, flow, next); 5925 flow_mreg_del_copy_action(dev, flow); 5926 if (flow->fdir) { 5927 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) { 5928 if (priv_fdir_flow->rix_flow == flow_idx) 5929 break; 5930 } 5931 if (priv_fdir_flow) { 5932 LIST_REMOVE(priv_fdir_flow, next); 5933 mlx5_free(priv_fdir_flow->fdir); 5934 mlx5_free(priv_fdir_flow); 5935 } 5936 } 5937 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx); 5938 if (flow->tunnel) { 5939 struct mlx5_flow_tunnel *tunnel; 5940 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 5941 RTE_VERIFY(tunnel); 5942 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 5943 mlx5_flow_tunnel_free(dev, tunnel); 5944 } 5945 } 5946 5947 /** 5948 * Destroy all flows. 5949 * 5950 * @param dev 5951 * Pointer to Ethernet device. 5952 * @param list 5953 * Pointer to the Indexed flow list. 5954 * @param active 5955 * If flushing is called avtively. 5956 */ 5957 void 5958 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active) 5959 { 5960 uint32_t num_flushed = 0; 5961 5962 while (*list) { 5963 flow_list_destroy(dev, list, *list); 5964 num_flushed++; 5965 } 5966 if (active) { 5967 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 5968 dev->data->port_id, num_flushed); 5969 } 5970 } 5971 5972 /** 5973 * Remove all flows. 5974 * 5975 * @param dev 5976 * Pointer to Ethernet device. 5977 * @param list 5978 * Pointer to the Indexed flow list. 5979 */ 5980 void 5981 mlx5_flow_stop(struct rte_eth_dev *dev, uint32_t *list) 5982 { 5983 struct mlx5_priv *priv = dev->data->dev_private; 5984 struct rte_flow *flow = NULL; 5985 uint32_t idx; 5986 5987 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx, 5988 flow, next) { 5989 flow_drv_remove(dev, flow); 5990 flow_mreg_stop_copy_action(dev, flow); 5991 } 5992 flow_mreg_del_default_copy_action(dev); 5993 flow_rxq_flags_clear(dev); 5994 } 5995 5996 /** 5997 * Add all flows. 5998 * 5999 * @param dev 6000 * Pointer to Ethernet device. 6001 * @param list 6002 * Pointer to the Indexed flow list. 6003 * 6004 * @return 6005 * 0 on success, a negative errno value otherwise and rte_errno is set. 6006 */ 6007 int 6008 mlx5_flow_start(struct rte_eth_dev *dev, uint32_t *list) 6009 { 6010 struct mlx5_priv *priv = dev->data->dev_private; 6011 struct rte_flow *flow = NULL; 6012 struct rte_flow_error error; 6013 uint32_t idx; 6014 int ret = 0; 6015 6016 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6017 ret = flow_mreg_add_default_copy_action(dev, &error); 6018 if (ret < 0) 6019 return -rte_errno; 6020 /* Apply Flows created by application. */ 6021 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx, 6022 flow, next) { 6023 ret = flow_mreg_start_copy_action(dev, flow); 6024 if (ret < 0) 6025 goto error; 6026 ret = flow_drv_apply(dev, flow, &error); 6027 if (ret < 0) 6028 goto error; 6029 flow_rxq_flags_set(dev, flow); 6030 } 6031 return 0; 6032 error: 6033 ret = rte_errno; /* Save rte_errno before cleanup. */ 6034 mlx5_flow_stop(dev, list); 6035 rte_errno = ret; /* Restore rte_errno. */ 6036 return -rte_errno; 6037 } 6038 6039 /** 6040 * Stop all default actions for flows. 6041 * 6042 * @param dev 6043 * Pointer to Ethernet device. 6044 */ 6045 void 6046 mlx5_flow_stop_default(struct rte_eth_dev *dev) 6047 { 6048 flow_mreg_del_default_copy_action(dev); 6049 flow_rxq_flags_clear(dev); 6050 } 6051 6052 /** 6053 * Start all default actions for flows. 6054 * 6055 * @param dev 6056 * Pointer to Ethernet device. 6057 * @return 6058 * 0 on success, a negative errno value otherwise and rte_errno is set. 6059 */ 6060 int 6061 mlx5_flow_start_default(struct rte_eth_dev *dev) 6062 { 6063 struct rte_flow_error error; 6064 6065 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6066 return flow_mreg_add_default_copy_action(dev, &error); 6067 } 6068 6069 /** 6070 * Allocate intermediate resources for flow creation. 6071 * 6072 * @param dev 6073 * Pointer to Ethernet device. 6074 */ 6075 void 6076 mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev) 6077 { 6078 struct mlx5_priv *priv = dev->data->dev_private; 6079 6080 if (!priv->inter_flows) { 6081 priv->inter_flows = mlx5_malloc(MLX5_MEM_ZERO, 6082 MLX5_NUM_MAX_DEV_FLOWS * 6083 sizeof(struct mlx5_flow) + 6084 (sizeof(struct mlx5_flow_rss_desc) + 6085 sizeof(uint16_t) * UINT16_MAX) * 2, 0, 6086 SOCKET_ID_ANY); 6087 if (!priv->inter_flows) { 6088 DRV_LOG(ERR, "can't allocate intermediate memory."); 6089 return; 6090 } 6091 } 6092 priv->rss_desc = &((struct mlx5_flow *)priv->inter_flows) 6093 [MLX5_NUM_MAX_DEV_FLOWS]; 6094 /* Reset the index. */ 6095 priv->flow_idx = 0; 6096 priv->flow_nested_idx = 0; 6097 } 6098 6099 /** 6100 * Free intermediate resources for flows. 6101 * 6102 * @param dev 6103 * Pointer to Ethernet device. 6104 */ 6105 void 6106 mlx5_flow_free_intermediate(struct rte_eth_dev *dev) 6107 { 6108 struct mlx5_priv *priv = dev->data->dev_private; 6109 6110 mlx5_free(priv->inter_flows); 6111 priv->inter_flows = NULL; 6112 } 6113 6114 /** 6115 * Verify the flow list is empty 6116 * 6117 * @param dev 6118 * Pointer to Ethernet device. 6119 * 6120 * @return the number of flows not released. 6121 */ 6122 int 6123 mlx5_flow_verify(struct rte_eth_dev *dev) 6124 { 6125 struct mlx5_priv *priv = dev->data->dev_private; 6126 struct rte_flow *flow; 6127 uint32_t idx; 6128 int ret = 0; 6129 6130 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx, 6131 flow, next) { 6132 DRV_LOG(DEBUG, "port %u flow %p still referenced", 6133 dev->data->port_id, (void *)flow); 6134 ++ret; 6135 } 6136 return ret; 6137 } 6138 6139 /** 6140 * Enable default hairpin egress flow. 6141 * 6142 * @param dev 6143 * Pointer to Ethernet device. 6144 * @param queue 6145 * The queue index. 6146 * 6147 * @return 6148 * 0 on success, a negative errno value otherwise and rte_errno is set. 6149 */ 6150 int 6151 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 6152 uint32_t queue) 6153 { 6154 struct mlx5_priv *priv = dev->data->dev_private; 6155 const struct rte_flow_attr attr = { 6156 .egress = 1, 6157 .priority = 0, 6158 }; 6159 struct mlx5_rte_flow_item_tx_queue queue_spec = { 6160 .queue = queue, 6161 }; 6162 struct mlx5_rte_flow_item_tx_queue queue_mask = { 6163 .queue = UINT32_MAX, 6164 }; 6165 struct rte_flow_item items[] = { 6166 { 6167 .type = (enum rte_flow_item_type) 6168 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6169 .spec = &queue_spec, 6170 .last = NULL, 6171 .mask = &queue_mask, 6172 }, 6173 { 6174 .type = RTE_FLOW_ITEM_TYPE_END, 6175 }, 6176 }; 6177 struct rte_flow_action_jump jump = { 6178 .group = MLX5_HAIRPIN_TX_TABLE, 6179 }; 6180 struct rte_flow_action actions[2]; 6181 uint32_t flow_idx; 6182 struct rte_flow_error error; 6183 6184 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 6185 actions[0].conf = &jump; 6186 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 6187 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6188 &attr, items, actions, false, &error); 6189 if (!flow_idx) { 6190 DRV_LOG(DEBUG, 6191 "Failed to create ctrl flow: rte_errno(%d)," 6192 " type(%d), message(%s)", 6193 rte_errno, error.type, 6194 error.message ? error.message : " (no stated reason)"); 6195 return -rte_errno; 6196 } 6197 return 0; 6198 } 6199 6200 /** 6201 * Enable a control flow configured from the control plane. 6202 * 6203 * @param dev 6204 * Pointer to Ethernet device. 6205 * @param eth_spec 6206 * An Ethernet flow spec to apply. 6207 * @param eth_mask 6208 * An Ethernet flow mask to apply. 6209 * @param vlan_spec 6210 * A VLAN flow spec to apply. 6211 * @param vlan_mask 6212 * A VLAN flow mask to apply. 6213 * 6214 * @return 6215 * 0 on success, a negative errno value otherwise and rte_errno is set. 6216 */ 6217 int 6218 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 6219 struct rte_flow_item_eth *eth_spec, 6220 struct rte_flow_item_eth *eth_mask, 6221 struct rte_flow_item_vlan *vlan_spec, 6222 struct rte_flow_item_vlan *vlan_mask) 6223 { 6224 struct mlx5_priv *priv = dev->data->dev_private; 6225 const struct rte_flow_attr attr = { 6226 .ingress = 1, 6227 .priority = MLX5_FLOW_PRIO_RSVD, 6228 }; 6229 struct rte_flow_item items[] = { 6230 { 6231 .type = RTE_FLOW_ITEM_TYPE_ETH, 6232 .spec = eth_spec, 6233 .last = NULL, 6234 .mask = eth_mask, 6235 }, 6236 { 6237 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 6238 RTE_FLOW_ITEM_TYPE_END, 6239 .spec = vlan_spec, 6240 .last = NULL, 6241 .mask = vlan_mask, 6242 }, 6243 { 6244 .type = RTE_FLOW_ITEM_TYPE_END, 6245 }, 6246 }; 6247 uint16_t queue[priv->reta_idx_n]; 6248 struct rte_flow_action_rss action_rss = { 6249 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 6250 .level = 0, 6251 .types = priv->rss_conf.rss_hf, 6252 .key_len = priv->rss_conf.rss_key_len, 6253 .queue_num = priv->reta_idx_n, 6254 .key = priv->rss_conf.rss_key, 6255 .queue = queue, 6256 }; 6257 struct rte_flow_action actions[] = { 6258 { 6259 .type = RTE_FLOW_ACTION_TYPE_RSS, 6260 .conf = &action_rss, 6261 }, 6262 { 6263 .type = RTE_FLOW_ACTION_TYPE_END, 6264 }, 6265 }; 6266 uint32_t flow_idx; 6267 struct rte_flow_error error; 6268 unsigned int i; 6269 6270 if (!priv->reta_idx_n || !priv->rxqs_n) { 6271 return 0; 6272 } 6273 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 6274 action_rss.types = 0; 6275 for (i = 0; i != priv->reta_idx_n; ++i) 6276 queue[i] = (*priv->reta_idx)[i]; 6277 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6278 &attr, items, actions, false, &error); 6279 if (!flow_idx) 6280 return -rte_errno; 6281 return 0; 6282 } 6283 6284 /** 6285 * Enable a flow control configured from the control plane. 6286 * 6287 * @param dev 6288 * Pointer to Ethernet device. 6289 * @param eth_spec 6290 * An Ethernet flow spec to apply. 6291 * @param eth_mask 6292 * An Ethernet flow mask to apply. 6293 * 6294 * @return 6295 * 0 on success, a negative errno value otherwise and rte_errno is set. 6296 */ 6297 int 6298 mlx5_ctrl_flow(struct rte_eth_dev *dev, 6299 struct rte_flow_item_eth *eth_spec, 6300 struct rte_flow_item_eth *eth_mask) 6301 { 6302 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 6303 } 6304 6305 /** 6306 * Create default miss flow rule matching lacp traffic 6307 * 6308 * @param dev 6309 * Pointer to Ethernet device. 6310 * @param eth_spec 6311 * An Ethernet flow spec to apply. 6312 * 6313 * @return 6314 * 0 on success, a negative errno value otherwise and rte_errno is set. 6315 */ 6316 int 6317 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 6318 { 6319 struct mlx5_priv *priv = dev->data->dev_private; 6320 /* 6321 * The LACP matching is done by only using ether type since using 6322 * a multicast dst mac causes kernel to give low priority to this flow. 6323 */ 6324 static const struct rte_flow_item_eth lacp_spec = { 6325 .type = RTE_BE16(0x8809), 6326 }; 6327 static const struct rte_flow_item_eth lacp_mask = { 6328 .type = 0xffff, 6329 }; 6330 const struct rte_flow_attr attr = { 6331 .ingress = 1, 6332 }; 6333 struct rte_flow_item items[] = { 6334 { 6335 .type = RTE_FLOW_ITEM_TYPE_ETH, 6336 .spec = &lacp_spec, 6337 .mask = &lacp_mask, 6338 }, 6339 { 6340 .type = RTE_FLOW_ITEM_TYPE_END, 6341 }, 6342 }; 6343 struct rte_flow_action actions[] = { 6344 { 6345 .type = (enum rte_flow_action_type) 6346 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 6347 }, 6348 { 6349 .type = RTE_FLOW_ACTION_TYPE_END, 6350 }, 6351 }; 6352 struct rte_flow_error error; 6353 uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6354 &attr, items, actions, false, &error); 6355 6356 if (!flow_idx) 6357 return -rte_errno; 6358 return 0; 6359 } 6360 6361 /** 6362 * Destroy a flow. 6363 * 6364 * @see rte_flow_destroy() 6365 * @see rte_flow_ops 6366 */ 6367 int 6368 mlx5_flow_destroy(struct rte_eth_dev *dev, 6369 struct rte_flow *flow, 6370 struct rte_flow_error *error __rte_unused) 6371 { 6372 struct mlx5_priv *priv = dev->data->dev_private; 6373 6374 flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow); 6375 return 0; 6376 } 6377 6378 /** 6379 * Destroy all flows. 6380 * 6381 * @see rte_flow_flush() 6382 * @see rte_flow_ops 6383 */ 6384 int 6385 mlx5_flow_flush(struct rte_eth_dev *dev, 6386 struct rte_flow_error *error __rte_unused) 6387 { 6388 struct mlx5_priv *priv = dev->data->dev_private; 6389 6390 mlx5_flow_list_flush(dev, &priv->flows, false); 6391 return 0; 6392 } 6393 6394 /** 6395 * Isolated mode. 6396 * 6397 * @see rte_flow_isolate() 6398 * @see rte_flow_ops 6399 */ 6400 int 6401 mlx5_flow_isolate(struct rte_eth_dev *dev, 6402 int enable, 6403 struct rte_flow_error *error) 6404 { 6405 struct mlx5_priv *priv = dev->data->dev_private; 6406 6407 if (dev->data->dev_started) { 6408 rte_flow_error_set(error, EBUSY, 6409 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6410 NULL, 6411 "port must be stopped first"); 6412 return -rte_errno; 6413 } 6414 priv->isolated = !!enable; 6415 if (enable) 6416 dev->dev_ops = &mlx5_os_dev_ops_isolate; 6417 else 6418 dev->dev_ops = &mlx5_os_dev_ops; 6419 6420 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 6421 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 6422 6423 return 0; 6424 } 6425 6426 /** 6427 * Query a flow. 6428 * 6429 * @see rte_flow_query() 6430 * @see rte_flow_ops 6431 */ 6432 static int 6433 flow_drv_query(struct rte_eth_dev *dev, 6434 uint32_t flow_idx, 6435 const struct rte_flow_action *actions, 6436 void *data, 6437 struct rte_flow_error *error) 6438 { 6439 struct mlx5_priv *priv = dev->data->dev_private; 6440 const struct mlx5_flow_driver_ops *fops; 6441 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 6442 [MLX5_IPOOL_RTE_FLOW], 6443 flow_idx); 6444 enum mlx5_flow_drv_type ftype; 6445 6446 if (!flow) { 6447 return rte_flow_error_set(error, ENOENT, 6448 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6449 NULL, 6450 "invalid flow handle"); 6451 } 6452 ftype = flow->drv_type; 6453 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 6454 fops = flow_get_drv_ops(ftype); 6455 6456 return fops->query(dev, flow, actions, data, error); 6457 } 6458 6459 /** 6460 * Query a flow. 6461 * 6462 * @see rte_flow_query() 6463 * @see rte_flow_ops 6464 */ 6465 int 6466 mlx5_flow_query(struct rte_eth_dev *dev, 6467 struct rte_flow *flow, 6468 const struct rte_flow_action *actions, 6469 void *data, 6470 struct rte_flow_error *error) 6471 { 6472 int ret; 6473 6474 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 6475 error); 6476 if (ret < 0) 6477 return ret; 6478 return 0; 6479 } 6480 6481 /** 6482 * Convert a flow director filter to a generic flow. 6483 * 6484 * @param dev 6485 * Pointer to Ethernet device. 6486 * @param fdir_filter 6487 * Flow director filter to add. 6488 * @param attributes 6489 * Generic flow parameters structure. 6490 * 6491 * @return 6492 * 0 on success, a negative errno value otherwise and rte_errno is set. 6493 */ 6494 static int 6495 flow_fdir_filter_convert(struct rte_eth_dev *dev, 6496 const struct rte_eth_fdir_filter *fdir_filter, 6497 struct mlx5_fdir *attributes) 6498 { 6499 struct mlx5_priv *priv = dev->data->dev_private; 6500 const struct rte_eth_fdir_input *input = &fdir_filter->input; 6501 const struct rte_eth_fdir_masks *mask = 6502 &dev->data->dev_conf.fdir_conf.mask; 6503 6504 /* Validate queue number. */ 6505 if (fdir_filter->action.rx_queue >= priv->rxqs_n) { 6506 DRV_LOG(ERR, "port %u invalid queue number %d", 6507 dev->data->port_id, fdir_filter->action.rx_queue); 6508 rte_errno = EINVAL; 6509 return -rte_errno; 6510 } 6511 attributes->attr.ingress = 1; 6512 attributes->items[0] = (struct rte_flow_item) { 6513 .type = RTE_FLOW_ITEM_TYPE_ETH, 6514 .spec = &attributes->l2, 6515 .mask = &attributes->l2_mask, 6516 }; 6517 switch (fdir_filter->action.behavior) { 6518 case RTE_ETH_FDIR_ACCEPT: 6519 attributes->actions[0] = (struct rte_flow_action){ 6520 .type = RTE_FLOW_ACTION_TYPE_QUEUE, 6521 .conf = &attributes->queue, 6522 }; 6523 break; 6524 case RTE_ETH_FDIR_REJECT: 6525 attributes->actions[0] = (struct rte_flow_action){ 6526 .type = RTE_FLOW_ACTION_TYPE_DROP, 6527 }; 6528 break; 6529 default: 6530 DRV_LOG(ERR, "port %u invalid behavior %d", 6531 dev->data->port_id, 6532 fdir_filter->action.behavior); 6533 rte_errno = ENOTSUP; 6534 return -rte_errno; 6535 } 6536 attributes->queue.index = fdir_filter->action.rx_queue; 6537 /* Handle L3. */ 6538 switch (fdir_filter->input.flow_type) { 6539 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 6540 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 6541 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 6542 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){ 6543 .src_addr = input->flow.ip4_flow.src_ip, 6544 .dst_addr = input->flow.ip4_flow.dst_ip, 6545 .time_to_live = input->flow.ip4_flow.ttl, 6546 .type_of_service = input->flow.ip4_flow.tos, 6547 }; 6548 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){ 6549 .src_addr = mask->ipv4_mask.src_ip, 6550 .dst_addr = mask->ipv4_mask.dst_ip, 6551 .time_to_live = mask->ipv4_mask.ttl, 6552 .type_of_service = mask->ipv4_mask.tos, 6553 .next_proto_id = mask->ipv4_mask.proto, 6554 }; 6555 attributes->items[1] = (struct rte_flow_item){ 6556 .type = RTE_FLOW_ITEM_TYPE_IPV4, 6557 .spec = &attributes->l3, 6558 .mask = &attributes->l3_mask, 6559 }; 6560 break; 6561 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 6562 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 6563 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 6564 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){ 6565 .hop_limits = input->flow.ipv6_flow.hop_limits, 6566 .proto = input->flow.ipv6_flow.proto, 6567 }; 6568 6569 memcpy(attributes->l3.ipv6.hdr.src_addr, 6570 input->flow.ipv6_flow.src_ip, 6571 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 6572 memcpy(attributes->l3.ipv6.hdr.dst_addr, 6573 input->flow.ipv6_flow.dst_ip, 6574 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 6575 memcpy(attributes->l3_mask.ipv6.hdr.src_addr, 6576 mask->ipv6_mask.src_ip, 6577 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 6578 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr, 6579 mask->ipv6_mask.dst_ip, 6580 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 6581 attributes->items[1] = (struct rte_flow_item){ 6582 .type = RTE_FLOW_ITEM_TYPE_IPV6, 6583 .spec = &attributes->l3, 6584 .mask = &attributes->l3_mask, 6585 }; 6586 break; 6587 default: 6588 DRV_LOG(ERR, "port %u invalid flow type%d", 6589 dev->data->port_id, fdir_filter->input.flow_type); 6590 rte_errno = ENOTSUP; 6591 return -rte_errno; 6592 } 6593 /* Handle L4. */ 6594 switch (fdir_filter->input.flow_type) { 6595 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 6596 attributes->l4.udp.hdr = (struct rte_udp_hdr){ 6597 .src_port = input->flow.udp4_flow.src_port, 6598 .dst_port = input->flow.udp4_flow.dst_port, 6599 }; 6600 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){ 6601 .src_port = mask->src_port_mask, 6602 .dst_port = mask->dst_port_mask, 6603 }; 6604 attributes->items[2] = (struct rte_flow_item){ 6605 .type = RTE_FLOW_ITEM_TYPE_UDP, 6606 .spec = &attributes->l4, 6607 .mask = &attributes->l4_mask, 6608 }; 6609 break; 6610 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 6611 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){ 6612 .src_port = input->flow.tcp4_flow.src_port, 6613 .dst_port = input->flow.tcp4_flow.dst_port, 6614 }; 6615 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){ 6616 .src_port = mask->src_port_mask, 6617 .dst_port = mask->dst_port_mask, 6618 }; 6619 attributes->items[2] = (struct rte_flow_item){ 6620 .type = RTE_FLOW_ITEM_TYPE_TCP, 6621 .spec = &attributes->l4, 6622 .mask = &attributes->l4_mask, 6623 }; 6624 break; 6625 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 6626 attributes->l4.udp.hdr = (struct rte_udp_hdr){ 6627 .src_port = input->flow.udp6_flow.src_port, 6628 .dst_port = input->flow.udp6_flow.dst_port, 6629 }; 6630 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){ 6631 .src_port = mask->src_port_mask, 6632 .dst_port = mask->dst_port_mask, 6633 }; 6634 attributes->items[2] = (struct rte_flow_item){ 6635 .type = RTE_FLOW_ITEM_TYPE_UDP, 6636 .spec = &attributes->l4, 6637 .mask = &attributes->l4_mask, 6638 }; 6639 break; 6640 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 6641 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){ 6642 .src_port = input->flow.tcp6_flow.src_port, 6643 .dst_port = input->flow.tcp6_flow.dst_port, 6644 }; 6645 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){ 6646 .src_port = mask->src_port_mask, 6647 .dst_port = mask->dst_port_mask, 6648 }; 6649 attributes->items[2] = (struct rte_flow_item){ 6650 .type = RTE_FLOW_ITEM_TYPE_TCP, 6651 .spec = &attributes->l4, 6652 .mask = &attributes->l4_mask, 6653 }; 6654 break; 6655 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 6656 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 6657 break; 6658 default: 6659 DRV_LOG(ERR, "port %u invalid flow type%d", 6660 dev->data->port_id, fdir_filter->input.flow_type); 6661 rte_errno = ENOTSUP; 6662 return -rte_errno; 6663 } 6664 return 0; 6665 } 6666 6667 #define FLOW_FDIR_CMP(f1, f2, fld) \ 6668 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld)) 6669 6670 /** 6671 * Compare two FDIR flows. If items and actions are identical, the two flows are 6672 * regarded as same. 6673 * 6674 * @param dev 6675 * Pointer to Ethernet device. 6676 * @param f1 6677 * FDIR flow to compare. 6678 * @param f2 6679 * FDIR flow to compare. 6680 * 6681 * @return 6682 * Zero on match, 1 otherwise. 6683 */ 6684 static int 6685 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2) 6686 { 6687 if (FLOW_FDIR_CMP(f1, f2, attr) || 6688 FLOW_FDIR_CMP(f1, f2, l2) || 6689 FLOW_FDIR_CMP(f1, f2, l2_mask) || 6690 FLOW_FDIR_CMP(f1, f2, l3) || 6691 FLOW_FDIR_CMP(f1, f2, l3_mask) || 6692 FLOW_FDIR_CMP(f1, f2, l4) || 6693 FLOW_FDIR_CMP(f1, f2, l4_mask) || 6694 FLOW_FDIR_CMP(f1, f2, actions[0].type)) 6695 return 1; 6696 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE && 6697 FLOW_FDIR_CMP(f1, f2, queue)) 6698 return 1; 6699 return 0; 6700 } 6701 6702 /** 6703 * Search device flow list to find out a matched FDIR flow. 6704 * 6705 * @param dev 6706 * Pointer to Ethernet device. 6707 * @param fdir_flow 6708 * FDIR flow to lookup. 6709 * 6710 * @return 6711 * Index of flow if found, 0 otherwise. 6712 */ 6713 static uint32_t 6714 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow) 6715 { 6716 struct mlx5_priv *priv = dev->data->dev_private; 6717 uint32_t flow_idx = 0; 6718 struct mlx5_fdir_flow *priv_fdir_flow = NULL; 6719 6720 MLX5_ASSERT(fdir_flow); 6721 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) { 6722 if (!flow_fdir_cmp(priv_fdir_flow->fdir, fdir_flow)) { 6723 DRV_LOG(DEBUG, "port %u found FDIR flow %u", 6724 dev->data->port_id, flow_idx); 6725 flow_idx = priv_fdir_flow->rix_flow; 6726 break; 6727 } 6728 } 6729 return flow_idx; 6730 } 6731 6732 /** 6733 * Add new flow director filter and store it in list. 6734 * 6735 * @param dev 6736 * Pointer to Ethernet device. 6737 * @param fdir_filter 6738 * Flow director filter to add. 6739 * 6740 * @return 6741 * 0 on success, a negative errno value otherwise and rte_errno is set. 6742 */ 6743 static int 6744 flow_fdir_filter_add(struct rte_eth_dev *dev, 6745 const struct rte_eth_fdir_filter *fdir_filter) 6746 { 6747 struct mlx5_priv *priv = dev->data->dev_private; 6748 struct mlx5_fdir *fdir_flow; 6749 struct rte_flow *flow; 6750 struct mlx5_fdir_flow *priv_fdir_flow = NULL; 6751 uint32_t flow_idx; 6752 int ret; 6753 6754 fdir_flow = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*fdir_flow), 0, 6755 SOCKET_ID_ANY); 6756 if (!fdir_flow) { 6757 rte_errno = ENOMEM; 6758 return -rte_errno; 6759 } 6760 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow); 6761 if (ret) 6762 goto error; 6763 flow_idx = flow_fdir_filter_lookup(dev, fdir_flow); 6764 if (flow_idx) { 6765 rte_errno = EEXIST; 6766 goto error; 6767 } 6768 priv_fdir_flow = mlx5_malloc(MLX5_MEM_ZERO, 6769 sizeof(struct mlx5_fdir_flow), 6770 0, SOCKET_ID_ANY); 6771 if (!priv_fdir_flow) { 6772 rte_errno = ENOMEM; 6773 goto error; 6774 } 6775 flow_idx = flow_list_create(dev, &priv->flows, &fdir_flow->attr, 6776 fdir_flow->items, fdir_flow->actions, true, 6777 NULL); 6778 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx); 6779 if (!flow) 6780 goto error; 6781 flow->fdir = 1; 6782 priv_fdir_flow->fdir = fdir_flow; 6783 priv_fdir_flow->rix_flow = flow_idx; 6784 LIST_INSERT_HEAD(&priv->fdir_flows, priv_fdir_flow, next); 6785 DRV_LOG(DEBUG, "port %u created FDIR flow %p", 6786 dev->data->port_id, (void *)flow); 6787 return 0; 6788 error: 6789 mlx5_free(priv_fdir_flow); 6790 mlx5_free(fdir_flow); 6791 return -rte_errno; 6792 } 6793 6794 /** 6795 * Delete specific filter. 6796 * 6797 * @param dev 6798 * Pointer to Ethernet device. 6799 * @param fdir_filter 6800 * Filter to be deleted. 6801 * 6802 * @return 6803 * 0 on success, a negative errno value otherwise and rte_errno is set. 6804 */ 6805 static int 6806 flow_fdir_filter_delete(struct rte_eth_dev *dev, 6807 const struct rte_eth_fdir_filter *fdir_filter) 6808 { 6809 struct mlx5_priv *priv = dev->data->dev_private; 6810 uint32_t flow_idx; 6811 struct mlx5_fdir fdir_flow = { 6812 .attr.group = 0, 6813 }; 6814 struct mlx5_fdir_flow *priv_fdir_flow = NULL; 6815 int ret; 6816 6817 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow); 6818 if (ret) 6819 return -rte_errno; 6820 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) { 6821 /* Find the fdir in priv list */ 6822 if (!flow_fdir_cmp(priv_fdir_flow->fdir, &fdir_flow)) 6823 break; 6824 } 6825 if (!priv_fdir_flow) 6826 return 0; 6827 LIST_REMOVE(priv_fdir_flow, next); 6828 flow_idx = priv_fdir_flow->rix_flow; 6829 flow_list_destroy(dev, &priv->flows, flow_idx); 6830 mlx5_free(priv_fdir_flow->fdir); 6831 mlx5_free(priv_fdir_flow); 6832 DRV_LOG(DEBUG, "port %u deleted FDIR flow %u", 6833 dev->data->port_id, flow_idx); 6834 return 0; 6835 } 6836 6837 /** 6838 * Update queue for specific filter. 6839 * 6840 * @param dev 6841 * Pointer to Ethernet device. 6842 * @param fdir_filter 6843 * Filter to be updated. 6844 * 6845 * @return 6846 * 0 on success, a negative errno value otherwise and rte_errno is set. 6847 */ 6848 static int 6849 flow_fdir_filter_update(struct rte_eth_dev *dev, 6850 const struct rte_eth_fdir_filter *fdir_filter) 6851 { 6852 int ret; 6853 6854 ret = flow_fdir_filter_delete(dev, fdir_filter); 6855 if (ret) 6856 return ret; 6857 return flow_fdir_filter_add(dev, fdir_filter); 6858 } 6859 6860 /** 6861 * Flush all filters. 6862 * 6863 * @param dev 6864 * Pointer to Ethernet device. 6865 */ 6866 static void 6867 flow_fdir_filter_flush(struct rte_eth_dev *dev) 6868 { 6869 struct mlx5_priv *priv = dev->data->dev_private; 6870 struct mlx5_fdir_flow *priv_fdir_flow = NULL; 6871 6872 while (!LIST_EMPTY(&priv->fdir_flows)) { 6873 priv_fdir_flow = LIST_FIRST(&priv->fdir_flows); 6874 LIST_REMOVE(priv_fdir_flow, next); 6875 flow_list_destroy(dev, &priv->flows, priv_fdir_flow->rix_flow); 6876 mlx5_free(priv_fdir_flow->fdir); 6877 mlx5_free(priv_fdir_flow); 6878 } 6879 } 6880 6881 /** 6882 * Get flow director information. 6883 * 6884 * @param dev 6885 * Pointer to Ethernet device. 6886 * @param[out] fdir_info 6887 * Resulting flow director information. 6888 */ 6889 static void 6890 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info) 6891 { 6892 struct rte_eth_fdir_masks *mask = 6893 &dev->data->dev_conf.fdir_conf.mask; 6894 6895 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode; 6896 fdir_info->guarant_spc = 0; 6897 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask)); 6898 fdir_info->max_flexpayload = 0; 6899 fdir_info->flow_types_mask[0] = 0; 6900 fdir_info->flex_payload_unit = 0; 6901 fdir_info->max_flex_payload_segment_num = 0; 6902 fdir_info->flex_payload_limit = 0; 6903 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf)); 6904 } 6905 6906 /** 6907 * Deal with flow director operations. 6908 * 6909 * @param dev 6910 * Pointer to Ethernet device. 6911 * @param filter_op 6912 * Operation to perform. 6913 * @param arg 6914 * Pointer to operation-specific structure. 6915 * 6916 * @return 6917 * 0 on success, a negative errno value otherwise and rte_errno is set. 6918 */ 6919 static int 6920 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op, 6921 void *arg) 6922 { 6923 enum rte_fdir_mode fdir_mode = 6924 dev->data->dev_conf.fdir_conf.mode; 6925 6926 if (filter_op == RTE_ETH_FILTER_NOP) 6927 return 0; 6928 if (fdir_mode != RTE_FDIR_MODE_PERFECT && 6929 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) { 6930 DRV_LOG(ERR, "port %u flow director mode %d not supported", 6931 dev->data->port_id, fdir_mode); 6932 rte_errno = EINVAL; 6933 return -rte_errno; 6934 } 6935 switch (filter_op) { 6936 case RTE_ETH_FILTER_ADD: 6937 return flow_fdir_filter_add(dev, arg); 6938 case RTE_ETH_FILTER_UPDATE: 6939 return flow_fdir_filter_update(dev, arg); 6940 case RTE_ETH_FILTER_DELETE: 6941 return flow_fdir_filter_delete(dev, arg); 6942 case RTE_ETH_FILTER_FLUSH: 6943 flow_fdir_filter_flush(dev); 6944 break; 6945 case RTE_ETH_FILTER_INFO: 6946 flow_fdir_info_get(dev, arg); 6947 break; 6948 default: 6949 DRV_LOG(DEBUG, "port %u unknown operation %u", 6950 dev->data->port_id, filter_op); 6951 rte_errno = EINVAL; 6952 return -rte_errno; 6953 } 6954 return 0; 6955 } 6956 6957 /** 6958 * Manage filter operations. 6959 * 6960 * @param dev 6961 * Pointer to Ethernet device structure. 6962 * @param filter_type 6963 * Filter type. 6964 * @param filter_op 6965 * Operation to perform. 6966 * @param arg 6967 * Pointer to operation-specific structure. 6968 * 6969 * @return 6970 * 0 on success, a negative errno value otherwise and rte_errno is set. 6971 */ 6972 int 6973 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 6974 enum rte_filter_type filter_type, 6975 enum rte_filter_op filter_op, 6976 void *arg) 6977 { 6978 switch (filter_type) { 6979 case RTE_ETH_FILTER_GENERIC: 6980 if (filter_op != RTE_ETH_FILTER_GET) { 6981 rte_errno = EINVAL; 6982 return -rte_errno; 6983 } 6984 *(const void **)arg = &mlx5_flow_ops; 6985 return 0; 6986 case RTE_ETH_FILTER_FDIR: 6987 return flow_fdir_ctrl_func(dev, filter_op, arg); 6988 default: 6989 DRV_LOG(ERR, "port %u filter type (%d) not supported", 6990 dev->data->port_id, filter_type); 6991 rte_errno = ENOTSUP; 6992 return -rte_errno; 6993 } 6994 return 0; 6995 } 6996 6997 /** 6998 * Create the needed meter and suffix tables. 6999 * 7000 * @param[in] dev 7001 * Pointer to Ethernet device. 7002 * @param[in] fm 7003 * Pointer to the flow meter. 7004 * 7005 * @return 7006 * Pointer to table set on success, NULL otherwise. 7007 */ 7008 struct mlx5_meter_domains_infos * 7009 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 7010 const struct mlx5_flow_meter *fm) 7011 { 7012 const struct mlx5_flow_driver_ops *fops; 7013 7014 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7015 return fops->create_mtr_tbls(dev, fm); 7016 } 7017 7018 /** 7019 * Destroy the meter table set. 7020 * 7021 * @param[in] dev 7022 * Pointer to Ethernet device. 7023 * @param[in] tbl 7024 * Pointer to the meter table set. 7025 * 7026 * @return 7027 * 0 on success. 7028 */ 7029 int 7030 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 7031 struct mlx5_meter_domains_infos *tbls) 7032 { 7033 const struct mlx5_flow_driver_ops *fops; 7034 7035 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7036 return fops->destroy_mtr_tbls(dev, tbls); 7037 } 7038 7039 /** 7040 * Create policer rules. 7041 * 7042 * @param[in] dev 7043 * Pointer to Ethernet device. 7044 * @param[in] fm 7045 * Pointer to flow meter structure. 7046 * @param[in] attr 7047 * Pointer to flow attributes. 7048 * 7049 * @return 7050 * 0 on success, -1 otherwise. 7051 */ 7052 int 7053 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev, 7054 struct mlx5_flow_meter *fm, 7055 const struct rte_flow_attr *attr) 7056 { 7057 const struct mlx5_flow_driver_ops *fops; 7058 7059 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7060 return fops->create_policer_rules(dev, fm, attr); 7061 } 7062 7063 /** 7064 * Destroy policer rules. 7065 * 7066 * @param[in] fm 7067 * Pointer to flow meter structure. 7068 * @param[in] attr 7069 * Pointer to flow attributes. 7070 * 7071 * @return 7072 * 0 on success, -1 otherwise. 7073 */ 7074 int 7075 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev, 7076 struct mlx5_flow_meter *fm, 7077 const struct rte_flow_attr *attr) 7078 { 7079 const struct mlx5_flow_driver_ops *fops; 7080 7081 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7082 return fops->destroy_policer_rules(dev, fm, attr); 7083 } 7084 7085 /** 7086 * Allocate a counter. 7087 * 7088 * @param[in] dev 7089 * Pointer to Ethernet device structure. 7090 * 7091 * @return 7092 * Index to allocated counter on success, 0 otherwise. 7093 */ 7094 uint32_t 7095 mlx5_counter_alloc(struct rte_eth_dev *dev) 7096 { 7097 const struct mlx5_flow_driver_ops *fops; 7098 struct rte_flow_attr attr = { .transfer = 0 }; 7099 7100 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7101 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7102 return fops->counter_alloc(dev); 7103 } 7104 DRV_LOG(ERR, 7105 "port %u counter allocate is not supported.", 7106 dev->data->port_id); 7107 return 0; 7108 } 7109 7110 /** 7111 * Free a counter. 7112 * 7113 * @param[in] dev 7114 * Pointer to Ethernet device structure. 7115 * @param[in] cnt 7116 * Index to counter to be free. 7117 */ 7118 void 7119 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 7120 { 7121 const struct mlx5_flow_driver_ops *fops; 7122 struct rte_flow_attr attr = { .transfer = 0 }; 7123 7124 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7125 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7126 fops->counter_free(dev, cnt); 7127 return; 7128 } 7129 DRV_LOG(ERR, 7130 "port %u counter free is not supported.", 7131 dev->data->port_id); 7132 } 7133 7134 /** 7135 * Query counter statistics. 7136 * 7137 * @param[in] dev 7138 * Pointer to Ethernet device structure. 7139 * @param[in] cnt 7140 * Index to counter to query. 7141 * @param[in] clear 7142 * Set to clear counter statistics. 7143 * @param[out] pkts 7144 * The counter hits packets number to save. 7145 * @param[out] bytes 7146 * The counter hits bytes number to save. 7147 * 7148 * @return 7149 * 0 on success, a negative errno value otherwise. 7150 */ 7151 int 7152 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 7153 bool clear, uint64_t *pkts, uint64_t *bytes) 7154 { 7155 const struct mlx5_flow_driver_ops *fops; 7156 struct rte_flow_attr attr = { .transfer = 0 }; 7157 7158 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7159 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7160 return fops->counter_query(dev, cnt, clear, pkts, bytes); 7161 } 7162 DRV_LOG(ERR, 7163 "port %u counter query is not supported.", 7164 dev->data->port_id); 7165 return -ENOTSUP; 7166 } 7167 7168 /** 7169 * Allocate a new memory for the counter values wrapped by all the needed 7170 * management. 7171 * 7172 * @param[in] sh 7173 * Pointer to mlx5_dev_ctx_shared object. 7174 * 7175 * @return 7176 * 0 on success, a negative errno value otherwise. 7177 */ 7178 static int 7179 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 7180 { 7181 struct mlx5_devx_mkey_attr mkey_attr; 7182 struct mlx5_counter_stats_mem_mng *mem_mng; 7183 volatile struct flow_counter_stats *raw_data; 7184 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 7185 int size = (sizeof(struct flow_counter_stats) * 7186 MLX5_COUNTERS_PER_POOL + 7187 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 7188 sizeof(struct mlx5_counter_stats_mem_mng); 7189 size_t pgsize = rte_mem_page_size(); 7190 uint8_t *mem; 7191 int i; 7192 7193 if (pgsize == (size_t)-1) { 7194 DRV_LOG(ERR, "Failed to get mem page size"); 7195 rte_errno = ENOMEM; 7196 return -ENOMEM; 7197 } 7198 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 7199 if (!mem) { 7200 rte_errno = ENOMEM; 7201 return -ENOMEM; 7202 } 7203 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 7204 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 7205 mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size, 7206 IBV_ACCESS_LOCAL_WRITE); 7207 if (!mem_mng->umem) { 7208 rte_errno = errno; 7209 mlx5_free(mem); 7210 return -rte_errno; 7211 } 7212 mkey_attr.addr = (uintptr_t)mem; 7213 mkey_attr.size = size; 7214 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem); 7215 mkey_attr.pd = sh->pdn; 7216 mkey_attr.log_entity_size = 0; 7217 mkey_attr.pg_access = 0; 7218 mkey_attr.klm_array = NULL; 7219 mkey_attr.klm_num = 0; 7220 mkey_attr.relaxed_ordering = sh->cmng.relaxed_ordering; 7221 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr); 7222 if (!mem_mng->dm) { 7223 mlx5_glue->devx_umem_dereg(mem_mng->umem); 7224 rte_errno = errno; 7225 mlx5_free(mem); 7226 return -rte_errno; 7227 } 7228 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 7229 raw_data = (volatile struct flow_counter_stats *)mem; 7230 for (i = 0; i < raws_n; ++i) { 7231 mem_mng->raws[i].mem_mng = mem_mng; 7232 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 7233 } 7234 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 7235 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 7236 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 7237 next); 7238 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 7239 sh->cmng.mem_mng = mem_mng; 7240 return 0; 7241 } 7242 7243 /** 7244 * Set the statistic memory to the new counter pool. 7245 * 7246 * @param[in] sh 7247 * Pointer to mlx5_dev_ctx_shared object. 7248 * @param[in] pool 7249 * Pointer to the pool to set the statistic memory. 7250 * 7251 * @return 7252 * 0 on success, a negative errno value otherwise. 7253 */ 7254 static int 7255 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 7256 struct mlx5_flow_counter_pool *pool) 7257 { 7258 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7259 /* Resize statistic memory once used out. */ 7260 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 7261 mlx5_flow_create_counter_stat_mem_mng(sh)) { 7262 DRV_LOG(ERR, "Cannot resize counter stat mem."); 7263 return -1; 7264 } 7265 rte_spinlock_lock(&pool->sl); 7266 pool->raw = cmng->mem_mng->raws + pool->index % 7267 MLX5_CNT_CONTAINER_RESIZE; 7268 rte_spinlock_unlock(&pool->sl); 7269 pool->raw_hw = NULL; 7270 return 0; 7271 } 7272 7273 #define MLX5_POOL_QUERY_FREQ_US 1000000 7274 7275 /** 7276 * Set the periodic procedure for triggering asynchronous batch queries for all 7277 * the counter pools. 7278 * 7279 * @param[in] sh 7280 * Pointer to mlx5_dev_ctx_shared object. 7281 */ 7282 void 7283 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 7284 { 7285 uint32_t pools_n, us; 7286 7287 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 7288 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 7289 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 7290 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 7291 sh->cmng.query_thread_on = 0; 7292 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 7293 } else { 7294 sh->cmng.query_thread_on = 1; 7295 } 7296 } 7297 7298 /** 7299 * The periodic procedure for triggering asynchronous batch queries for all the 7300 * counter pools. This function is probably called by the host thread. 7301 * 7302 * @param[in] arg 7303 * The parameter for the alarm process. 7304 */ 7305 void 7306 mlx5_flow_query_alarm(void *arg) 7307 { 7308 struct mlx5_dev_ctx_shared *sh = arg; 7309 int ret; 7310 uint16_t pool_index = sh->cmng.pool_index; 7311 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7312 struct mlx5_flow_counter_pool *pool; 7313 uint16_t n_valid; 7314 7315 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 7316 goto set_alarm; 7317 rte_spinlock_lock(&cmng->pool_update_sl); 7318 pool = cmng->pools[pool_index]; 7319 n_valid = cmng->n_valid; 7320 rte_spinlock_unlock(&cmng->pool_update_sl); 7321 /* Set the statistic memory to the new created pool. */ 7322 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 7323 goto set_alarm; 7324 if (pool->raw_hw) 7325 /* There is a pool query in progress. */ 7326 goto set_alarm; 7327 pool->raw_hw = 7328 LIST_FIRST(&sh->cmng.free_stat_raws); 7329 if (!pool->raw_hw) 7330 /* No free counter statistics raw memory. */ 7331 goto set_alarm; 7332 /* 7333 * Identify the counters released between query trigger and query 7334 * handle more efficiently. The counter released in this gap period 7335 * should wait for a new round of query as the new arrived packets 7336 * will not be taken into account. 7337 */ 7338 pool->query_gen++; 7339 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 7340 MLX5_COUNTERS_PER_POOL, 7341 NULL, NULL, 7342 pool->raw_hw->mem_mng->dm->id, 7343 (void *)(uintptr_t) 7344 pool->raw_hw->data, 7345 sh->devx_comp, 7346 (uint64_t)(uintptr_t)pool); 7347 if (ret) { 7348 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 7349 " %d", pool->min_dcs->id); 7350 pool->raw_hw = NULL; 7351 goto set_alarm; 7352 } 7353 LIST_REMOVE(pool->raw_hw, next); 7354 sh->cmng.pending_queries++; 7355 pool_index++; 7356 if (pool_index >= n_valid) 7357 pool_index = 0; 7358 set_alarm: 7359 sh->cmng.pool_index = pool_index; 7360 mlx5_set_query_alarm(sh); 7361 } 7362 7363 /** 7364 * Check and callback event for new aged flow in the counter pool 7365 * 7366 * @param[in] sh 7367 * Pointer to mlx5_dev_ctx_shared object. 7368 * @param[in] pool 7369 * Pointer to Current counter pool. 7370 */ 7371 static void 7372 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 7373 struct mlx5_flow_counter_pool *pool) 7374 { 7375 struct mlx5_priv *priv; 7376 struct mlx5_flow_counter *cnt; 7377 struct mlx5_age_info *age_info; 7378 struct mlx5_age_param *age_param; 7379 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 7380 struct mlx5_counter_stats_raw *prev = pool->raw; 7381 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 7382 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 7383 uint16_t expected = AGE_CANDIDATE; 7384 uint32_t i; 7385 7386 pool->time_of_last_age_check = curr_time; 7387 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 7388 cnt = MLX5_POOL_GET_CNT(pool, i); 7389 age_param = MLX5_CNT_TO_AGE(cnt); 7390 if (__atomic_load_n(&age_param->state, 7391 __ATOMIC_RELAXED) != AGE_CANDIDATE) 7392 continue; 7393 if (cur->data[i].hits != prev->data[i].hits) { 7394 __atomic_store_n(&age_param->sec_since_last_hit, 0, 7395 __ATOMIC_RELAXED); 7396 continue; 7397 } 7398 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 7399 time_delta, 7400 __ATOMIC_RELAXED) <= age_param->timeout) 7401 continue; 7402 /** 7403 * Hold the lock first, or if between the 7404 * state AGE_TMOUT and tailq operation the 7405 * release happened, the release procedure 7406 * may delete a non-existent tailq node. 7407 */ 7408 priv = rte_eth_devices[age_param->port_id].data->dev_private; 7409 age_info = GET_PORT_AGE_INFO(priv); 7410 rte_spinlock_lock(&age_info->aged_sl); 7411 if (__atomic_compare_exchange_n(&age_param->state, &expected, 7412 AGE_TMOUT, false, 7413 __ATOMIC_RELAXED, 7414 __ATOMIC_RELAXED)) { 7415 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 7416 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 7417 } 7418 rte_spinlock_unlock(&age_info->aged_sl); 7419 } 7420 for (i = 0; i < sh->max_port; i++) { 7421 age_info = &sh->port[i].age_info; 7422 if (!MLX5_AGE_GET(age_info, MLX5_AGE_EVENT_NEW)) 7423 continue; 7424 if (MLX5_AGE_GET(age_info, MLX5_AGE_TRIGGER)) 7425 rte_eth_dev_callback_process 7426 (&rte_eth_devices[sh->port[i].devx_ih_port_id], 7427 RTE_ETH_EVENT_FLOW_AGED, NULL); 7428 age_info->flags = 0; 7429 } 7430 } 7431 7432 /** 7433 * Handler for the HW respond about ready values from an asynchronous batch 7434 * query. This function is probably called by the host thread. 7435 * 7436 * @param[in] sh 7437 * The pointer to the shared device context. 7438 * @param[in] async_id 7439 * The Devx async ID. 7440 * @param[in] status 7441 * The status of the completion. 7442 */ 7443 void 7444 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 7445 uint64_t async_id, int status) 7446 { 7447 struct mlx5_flow_counter_pool *pool = 7448 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 7449 struct mlx5_counter_stats_raw *raw_to_free; 7450 uint8_t query_gen = pool->query_gen ^ 1; 7451 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7452 enum mlx5_counter_type cnt_type = 7453 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 7454 MLX5_COUNTER_TYPE_ORIGIN; 7455 7456 if (unlikely(status)) { 7457 raw_to_free = pool->raw_hw; 7458 } else { 7459 raw_to_free = pool->raw; 7460 if (pool->is_aged) 7461 mlx5_flow_aging_check(sh, pool); 7462 rte_spinlock_lock(&pool->sl); 7463 pool->raw = pool->raw_hw; 7464 rte_spinlock_unlock(&pool->sl); 7465 /* Be sure the new raw counters data is updated in memory. */ 7466 rte_io_wmb(); 7467 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 7468 rte_spinlock_lock(&cmng->csl[cnt_type]); 7469 TAILQ_CONCAT(&cmng->counters[cnt_type], 7470 &pool->counters[query_gen], next); 7471 rte_spinlock_unlock(&cmng->csl[cnt_type]); 7472 } 7473 } 7474 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 7475 pool->raw_hw = NULL; 7476 sh->cmng.pending_queries--; 7477 } 7478 7479 static const struct mlx5_flow_tbl_data_entry * 7480 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 7481 { 7482 struct mlx5_priv *priv = dev->data->dev_private; 7483 struct mlx5_dev_ctx_shared *sh = priv->sh; 7484 struct mlx5_hlist_entry *he; 7485 union tunnel_offload_mark mbits = { .val = mark }; 7486 union mlx5_flow_tbl_key table_key = { 7487 { 7488 .table_id = tunnel_id_to_flow_tbl(mbits.table_id), 7489 .reserved = 0, 7490 .domain = !!mbits.transfer, 7491 .direction = 0, 7492 } 7493 }; 7494 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64); 7495 return he ? 7496 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 7497 } 7498 7499 static uint32_t 7500 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 7501 const struct mlx5_flow_tunnel *tunnel, 7502 uint32_t group, uint32_t *table, 7503 struct rte_flow_error *error) 7504 { 7505 struct mlx5_hlist_entry *he; 7506 struct tunnel_tbl_entry *tte; 7507 union tunnel_tbl_key key = { 7508 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 7509 .group = group 7510 }; 7511 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 7512 struct mlx5_hlist *group_hash; 7513 7514 group_hash = tunnel ? tunnel->groups : thub->groups; 7515 he = mlx5_hlist_lookup(group_hash, key.val); 7516 if (!he) { 7517 int ret; 7518 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 7519 sizeof(*tte), 0, 7520 SOCKET_ID_ANY); 7521 if (!tte) 7522 goto err; 7523 tte->hash.key = key.val; 7524 ret = mlx5_flow_id_get(thub->table_ids, &tte->flow_table); 7525 if (ret) { 7526 mlx5_free(tte); 7527 goto err; 7528 } 7529 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 7530 mlx5_hlist_insert(group_hash, &tte->hash); 7531 } else { 7532 tte = container_of(he, typeof(*tte), hash); 7533 } 7534 *table = tte->flow_table; 7535 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 7536 dev->data->port_id, key.tunnel_id, group, *table); 7537 return 0; 7538 7539 err: 7540 return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 7541 NULL, "tunnel group index not supported"); 7542 } 7543 7544 static int 7545 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 7546 struct flow_grp_info grp_info, struct rte_flow_error *error) 7547 { 7548 if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) { 7549 if (group == UINT32_MAX) 7550 return rte_flow_error_set 7551 (error, EINVAL, 7552 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 7553 NULL, 7554 "group index not supported"); 7555 *table = group + 1; 7556 } else { 7557 *table = group; 7558 } 7559 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 7560 return 0; 7561 } 7562 7563 /** 7564 * Translate the rte_flow group index to HW table value. 7565 * 7566 * If tunnel offload is disabled, all group ids converted to flow table 7567 * id using the standard method. 7568 * If tunnel offload is enabled, group id can be converted using the 7569 * standard or tunnel conversion method. Group conversion method 7570 * selection depends on flags in `grp_info` parameter: 7571 * - Internal (grp_info.external == 0) groups conversion uses the 7572 * standard method. 7573 * - Group ids in JUMP action converted with the tunnel conversion. 7574 * - Group id in rule attribute conversion depends on a rule type and 7575 * group id value: 7576 * ** non zero group attributes converted with the tunnel method 7577 * ** zero group attribute in non-tunnel rule is converted using the 7578 * standard method - there's only one root table 7579 * ** zero group attribute in steer tunnel rule is converted with the 7580 * standard method - single root table 7581 * ** zero group attribute in match tunnel rule is a special OvS 7582 * case: that value is used for portability reasons. That group 7583 * id is converted with the tunnel conversion method. 7584 * 7585 * @param[in] dev 7586 * Port device 7587 * @param[in] tunnel 7588 * PMD tunnel offload object 7589 * @param[in] group 7590 * rte_flow group index value. 7591 * @param[out] table 7592 * HW table value. 7593 * @param[in] grp_info 7594 * flags used for conversion 7595 * @param[out] error 7596 * Pointer to error structure. 7597 * 7598 * @return 7599 * 0 on success, a negative errno value otherwise and rte_errno is set. 7600 */ 7601 int 7602 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 7603 const struct mlx5_flow_tunnel *tunnel, 7604 uint32_t group, uint32_t *table, 7605 struct flow_grp_info grp_info, 7606 struct rte_flow_error *error) 7607 { 7608 int ret; 7609 bool standard_translation; 7610 7611 if (grp_info.external && group < MLX5_MAX_TABLES_EXTERNAL) 7612 group *= MLX5_FLOW_TABLE_FACTOR; 7613 if (is_tunnel_offload_active(dev)) { 7614 standard_translation = !grp_info.external || 7615 grp_info.std_tbl_fix; 7616 } else { 7617 standard_translation = true; 7618 } 7619 DRV_LOG(DEBUG, 7620 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s", 7621 dev->data->port_id, group, grp_info.transfer, 7622 grp_info.external, grp_info.fdb_def_rule, 7623 standard_translation ? "STANDARD" : "TUNNEL"); 7624 if (standard_translation) 7625 ret = flow_group_to_table(dev->data->port_id, group, table, 7626 grp_info, error); 7627 else 7628 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 7629 table, error); 7630 7631 return ret; 7632 } 7633 7634 /** 7635 * Discover availability of metadata reg_c's. 7636 * 7637 * Iteratively use test flows to check availability. 7638 * 7639 * @param[in] dev 7640 * Pointer to the Ethernet device structure. 7641 * 7642 * @return 7643 * 0 on success, a negative errno value otherwise and rte_errno is set. 7644 */ 7645 int 7646 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 7647 { 7648 struct mlx5_priv *priv = dev->data->dev_private; 7649 struct mlx5_dev_config *config = &priv->config; 7650 enum modify_reg idx; 7651 int n = 0; 7652 7653 /* reg_c[0] and reg_c[1] are reserved. */ 7654 config->flow_mreg_c[n++] = REG_C_0; 7655 config->flow_mreg_c[n++] = REG_C_1; 7656 /* Discover availability of other reg_c's. */ 7657 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 7658 struct rte_flow_attr attr = { 7659 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 7660 .priority = MLX5_FLOW_PRIO_RSVD, 7661 .ingress = 1, 7662 }; 7663 struct rte_flow_item items[] = { 7664 [0] = { 7665 .type = RTE_FLOW_ITEM_TYPE_END, 7666 }, 7667 }; 7668 struct rte_flow_action actions[] = { 7669 [0] = { 7670 .type = (enum rte_flow_action_type) 7671 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 7672 .conf = &(struct mlx5_flow_action_copy_mreg){ 7673 .src = REG_C_1, 7674 .dst = idx, 7675 }, 7676 }, 7677 [1] = { 7678 .type = RTE_FLOW_ACTION_TYPE_JUMP, 7679 .conf = &(struct rte_flow_action_jump){ 7680 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 7681 }, 7682 }, 7683 [2] = { 7684 .type = RTE_FLOW_ACTION_TYPE_END, 7685 }, 7686 }; 7687 uint32_t flow_idx; 7688 struct rte_flow *flow; 7689 struct rte_flow_error error; 7690 7691 if (!config->dv_flow_en) 7692 break; 7693 /* Create internal flow, validation skips copy action. */ 7694 flow_idx = flow_list_create(dev, NULL, &attr, items, 7695 actions, false, &error); 7696 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 7697 flow_idx); 7698 if (!flow) 7699 continue; 7700 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL)) 7701 config->flow_mreg_c[n++] = idx; 7702 flow_list_destroy(dev, NULL, flow_idx); 7703 } 7704 for (; n < MLX5_MREG_C_NUM; ++n) 7705 config->flow_mreg_c[n] = REG_NON; 7706 return 0; 7707 } 7708 7709 /** 7710 * Dump flow raw hw data to file 7711 * 7712 * @param[in] dev 7713 * The pointer to Ethernet device. 7714 * @param[in] file 7715 * A pointer to a file for output. 7716 * @param[out] error 7717 * Perform verbose error reporting if not NULL. PMDs initialize this 7718 * structure in case of error only. 7719 * @return 7720 * 0 on success, a nagative value otherwise. 7721 */ 7722 int 7723 mlx5_flow_dev_dump(struct rte_eth_dev *dev, 7724 FILE *file, 7725 struct rte_flow_error *error __rte_unused) 7726 { 7727 struct mlx5_priv *priv = dev->data->dev_private; 7728 struct mlx5_dev_ctx_shared *sh = priv->sh; 7729 7730 if (!priv->config.dv_flow_en) { 7731 if (fputs("device dv flow disabled\n", file) <= 0) 7732 return -errno; 7733 return -ENOTSUP; 7734 } 7735 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain, 7736 sh->tx_domain, file); 7737 } 7738 7739 /** 7740 * Get aged-out flows. 7741 * 7742 * @param[in] dev 7743 * Pointer to the Ethernet device structure. 7744 * @param[in] context 7745 * The address of an array of pointers to the aged-out flows contexts. 7746 * @param[in] nb_countexts 7747 * The length of context array pointers. 7748 * @param[out] error 7749 * Perform verbose error reporting if not NULL. Initialized in case of 7750 * error only. 7751 * 7752 * @return 7753 * how many contexts get in success, otherwise negative errno value. 7754 * if nb_contexts is 0, return the amount of all aged contexts. 7755 * if nb_contexts is not 0 , return the amount of aged flows reported 7756 * in the context array. 7757 */ 7758 int 7759 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 7760 uint32_t nb_contexts, struct rte_flow_error *error) 7761 { 7762 const struct mlx5_flow_driver_ops *fops; 7763 struct rte_flow_attr attr = { .transfer = 0 }; 7764 7765 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7766 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7767 return fops->get_aged_flows(dev, contexts, nb_contexts, 7768 error); 7769 } 7770 DRV_LOG(ERR, 7771 "port %u get aged flows is not supported.", 7772 dev->data->port_id); 7773 return -ENOTSUP; 7774 } 7775 7776 /* Wrapper for driver action_validate op callback */ 7777 static int 7778 flow_drv_action_validate(struct rte_eth_dev *dev, 7779 const struct rte_flow_shared_action_conf *conf, 7780 const struct rte_flow_action *action, 7781 const struct mlx5_flow_driver_ops *fops, 7782 struct rte_flow_error *error) 7783 { 7784 static const char err_msg[] = "shared action validation unsupported"; 7785 7786 if (!fops->action_validate) { 7787 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7788 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7789 NULL, err_msg); 7790 return -rte_errno; 7791 } 7792 return fops->action_validate(dev, conf, action, error); 7793 } 7794 7795 /** 7796 * Destroys the shared action by handle. 7797 * 7798 * @param dev 7799 * Pointer to Ethernet device structure. 7800 * @param[in] action 7801 * Handle for the shared action to be destroyed. 7802 * @param[out] error 7803 * Perform verbose error reporting if not NULL. PMDs initialize this 7804 * structure in case of error only. 7805 * 7806 * @return 7807 * 0 on success, a negative errno value otherwise and rte_errno is set. 7808 * 7809 * @note: wrapper for driver action_create op callback. 7810 */ 7811 static int 7812 mlx5_shared_action_destroy(struct rte_eth_dev *dev, 7813 struct rte_flow_shared_action *action, 7814 struct rte_flow_error *error) 7815 { 7816 static const char err_msg[] = "shared action destruction unsupported"; 7817 struct rte_flow_attr attr = { .transfer = 0 }; 7818 const struct mlx5_flow_driver_ops *fops = 7819 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7820 7821 if (!fops->action_destroy) { 7822 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7823 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7824 NULL, err_msg); 7825 return -rte_errno; 7826 } 7827 return fops->action_destroy(dev, action, error); 7828 } 7829 7830 /* Wrapper for driver action_destroy op callback */ 7831 static int 7832 flow_drv_action_update(struct rte_eth_dev *dev, 7833 struct rte_flow_shared_action *action, 7834 const void *action_conf, 7835 const struct mlx5_flow_driver_ops *fops, 7836 struct rte_flow_error *error) 7837 { 7838 static const char err_msg[] = "shared action update unsupported"; 7839 7840 if (!fops->action_update) { 7841 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7842 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7843 NULL, err_msg); 7844 return -rte_errno; 7845 } 7846 return fops->action_update(dev, action, action_conf, error); 7847 } 7848 7849 /** 7850 * Create shared action for reuse in multiple flow rules. 7851 * 7852 * @param dev 7853 * Pointer to Ethernet device structure. 7854 * @param[in] action 7855 * Action configuration for shared action creation. 7856 * @param[out] error 7857 * Perform verbose error reporting if not NULL. PMDs initialize this 7858 * structure in case of error only. 7859 * @return 7860 * A valid handle in case of success, NULL otherwise and rte_errno is set. 7861 */ 7862 static struct rte_flow_shared_action * 7863 mlx5_shared_action_create(struct rte_eth_dev *dev, 7864 const struct rte_flow_shared_action_conf *conf, 7865 const struct rte_flow_action *action, 7866 struct rte_flow_error *error) 7867 { 7868 static const char err_msg[] = "shared action creation unsupported"; 7869 struct rte_flow_attr attr = { .transfer = 0 }; 7870 const struct mlx5_flow_driver_ops *fops = 7871 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7872 7873 if (flow_drv_action_validate(dev, conf, action, fops, error)) 7874 return NULL; 7875 if (!fops->action_create) { 7876 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7877 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7878 NULL, err_msg); 7879 return NULL; 7880 } 7881 return fops->action_create(dev, conf, action, error); 7882 } 7883 7884 /** 7885 * Updates inplace the shared action configuration pointed by *action* handle 7886 * with the configuration provided as *action* argument. 7887 * The update of the shared action configuration effects all flow rules reusing 7888 * the action via handle. 7889 * 7890 * @param dev 7891 * Pointer to Ethernet device structure. 7892 * @param[in] shared_action 7893 * Handle for the shared action to be updated. 7894 * @param[in] action 7895 * Action specification used to modify the action pointed by handle. 7896 * *action* should be of same type with the action pointed by the *action* 7897 * handle argument, otherwise considered as invalid. 7898 * @param[out] error 7899 * Perform verbose error reporting if not NULL. PMDs initialize this 7900 * structure in case of error only. 7901 * 7902 * @return 7903 * 0 on success, a negative errno value otherwise and rte_errno is set. 7904 */ 7905 static int 7906 mlx5_shared_action_update(struct rte_eth_dev *dev, 7907 struct rte_flow_shared_action *shared_action, 7908 const struct rte_flow_action *action, 7909 struct rte_flow_error *error) 7910 { 7911 struct rte_flow_attr attr = { .transfer = 0 }; 7912 const struct mlx5_flow_driver_ops *fops = 7913 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7914 int ret; 7915 7916 switch (shared_action->type) { 7917 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS: 7918 if (action->type != RTE_FLOW_ACTION_TYPE_RSS) { 7919 return rte_flow_error_set(error, EINVAL, 7920 RTE_FLOW_ERROR_TYPE_ACTION, 7921 NULL, 7922 "update action type invalid"); 7923 } 7924 ret = flow_drv_action_validate(dev, NULL, action, fops, error); 7925 if (ret) 7926 return ret; 7927 return flow_drv_action_update(dev, shared_action, action->conf, 7928 fops, error); 7929 default: 7930 return rte_flow_error_set(error, ENOTSUP, 7931 RTE_FLOW_ERROR_TYPE_ACTION, 7932 NULL, 7933 "action type not supported"); 7934 } 7935 } 7936 7937 /** 7938 * Query the shared action by handle. 7939 * 7940 * This function allows retrieving action-specific data such as counters. 7941 * Data is gathered by special action which may be present/referenced in 7942 * more than one flow rule definition. 7943 * 7944 * \see RTE_FLOW_ACTION_TYPE_COUNT 7945 * 7946 * @param dev 7947 * Pointer to Ethernet device structure. 7948 * @param[in] action 7949 * Handle for the shared action to query. 7950 * @param[in, out] data 7951 * Pointer to storage for the associated query data type. 7952 * @param[out] error 7953 * Perform verbose error reporting if not NULL. PMDs initialize this 7954 * structure in case of error only. 7955 * 7956 * @return 7957 * 0 on success, a negative errno value otherwise and rte_errno is set. 7958 */ 7959 static int 7960 mlx5_shared_action_query(struct rte_eth_dev *dev, 7961 const struct rte_flow_shared_action *action, 7962 void *data, 7963 struct rte_flow_error *error) 7964 { 7965 (void)dev; 7966 switch (action->type) { 7967 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS: 7968 __atomic_load(&action->refcnt, (uint32_t *)data, 7969 __ATOMIC_RELAXED); 7970 return 0; 7971 default: 7972 return rte_flow_error_set(error, ENOTSUP, 7973 RTE_FLOW_ERROR_TYPE_ACTION, 7974 NULL, 7975 "action type not supported"); 7976 } 7977 } 7978 7979 /** 7980 * Destroy all shared actions. 7981 * 7982 * @param dev 7983 * Pointer to Ethernet device. 7984 * 7985 * @return 7986 * 0 on success, a negative errno value otherwise and rte_errno is set. 7987 */ 7988 int 7989 mlx5_shared_action_flush(struct rte_eth_dev *dev) 7990 { 7991 struct rte_flow_error error; 7992 struct mlx5_priv *priv = dev->data->dev_private; 7993 struct rte_flow_shared_action *action; 7994 int ret = 0; 7995 7996 while (!LIST_EMPTY(&priv->shared_actions)) { 7997 action = LIST_FIRST(&priv->shared_actions); 7998 ret = mlx5_shared_action_destroy(dev, action, &error); 7999 } 8000 return ret; 8001 } 8002 8003 static void 8004 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 8005 struct mlx5_flow_tunnel *tunnel) 8006 { 8007 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8008 struct mlx5_flow_id_pool *id_pool = thub->tunnel_ids; 8009 8010 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 8011 dev->data->port_id, tunnel->tunnel_id); 8012 RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED)); 8013 LIST_REMOVE(tunnel, chain); 8014 mlx5_flow_id_release(id_pool, tunnel->tunnel_id); 8015 mlx5_hlist_destroy(tunnel->groups, NULL, NULL); 8016 mlx5_free(tunnel); 8017 } 8018 8019 static struct mlx5_flow_tunnel * 8020 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 8021 { 8022 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8023 struct mlx5_flow_tunnel *tun; 8024 8025 LIST_FOREACH(tun, &thub->tunnels, chain) { 8026 if (tun->tunnel_id == id) 8027 break; 8028 } 8029 8030 return tun; 8031 } 8032 8033 static struct mlx5_flow_tunnel * 8034 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 8035 const struct rte_flow_tunnel *app_tunnel) 8036 { 8037 int ret; 8038 struct mlx5_flow_tunnel *tunnel; 8039 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8040 struct mlx5_flow_id_pool *id_pool = thub->tunnel_ids; 8041 uint32_t id; 8042 8043 ret = mlx5_flow_id_get(id_pool, &id); 8044 if (ret) 8045 return NULL; 8046 /** 8047 * mlx5 flow tunnel is an auxlilary data structure 8048 * It's not part of IO. No need to allocate it from 8049 * huge pages pools dedicated for IO 8050 */ 8051 tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel), 8052 0, SOCKET_ID_ANY); 8053 if (!tunnel) { 8054 mlx5_flow_id_pool_release(id_pool); 8055 return NULL; 8056 } 8057 tunnel->groups = mlx5_hlist_create("tunnel groups", 1024); 8058 if (!tunnel->groups) { 8059 mlx5_flow_id_pool_release(id_pool); 8060 mlx5_free(tunnel); 8061 return NULL; 8062 } 8063 /* initiate new PMD tunnel */ 8064 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 8065 tunnel->tunnel_id = id; 8066 tunnel->action.type = (typeof(tunnel->action.type)) 8067 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 8068 tunnel->action.conf = tunnel; 8069 tunnel->item.type = (typeof(tunnel->item.type)) 8070 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 8071 tunnel->item.spec = tunnel; 8072 tunnel->item.last = NULL; 8073 tunnel->item.mask = NULL; 8074 8075 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 8076 dev->data->port_id, tunnel->tunnel_id); 8077 8078 return tunnel; 8079 } 8080 8081 static int 8082 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 8083 const struct rte_flow_tunnel *app_tunnel, 8084 struct mlx5_flow_tunnel **tunnel) 8085 { 8086 int ret; 8087 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8088 struct mlx5_flow_tunnel *tun; 8089 8090 LIST_FOREACH(tun, &thub->tunnels, chain) { 8091 if (!memcmp(app_tunnel, &tun->app_tunnel, 8092 sizeof(*app_tunnel))) { 8093 *tunnel = tun; 8094 ret = 0; 8095 break; 8096 } 8097 } 8098 if (!tun) { 8099 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel); 8100 if (tun) { 8101 LIST_INSERT_HEAD(&thub->tunnels, tun, chain); 8102 *tunnel = tun; 8103 } else { 8104 ret = -ENOMEM; 8105 } 8106 } 8107 if (tun) 8108 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED); 8109 8110 return ret; 8111 } 8112 8113 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 8114 { 8115 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 8116 8117 if (!thub) 8118 return; 8119 if (!LIST_EMPTY(&thub->tunnels)) 8120 DRV_LOG(WARNING, "port %u tunnels present\n", port_id); 8121 mlx5_flow_id_pool_release(thub->tunnel_ids); 8122 mlx5_flow_id_pool_release(thub->table_ids); 8123 mlx5_hlist_destroy(thub->groups, NULL, NULL); 8124 mlx5_free(thub); 8125 } 8126 8127 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 8128 { 8129 int err; 8130 struct mlx5_flow_tunnel_hub *thub; 8131 8132 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 8133 0, SOCKET_ID_ANY); 8134 if (!thub) 8135 return -ENOMEM; 8136 LIST_INIT(&thub->tunnels); 8137 thub->tunnel_ids = mlx5_flow_id_pool_alloc(MLX5_MAX_TUNNELS); 8138 if (!thub->tunnel_ids) { 8139 err = -rte_errno; 8140 goto err; 8141 } 8142 thub->table_ids = mlx5_flow_id_pool_alloc(MLX5_MAX_TABLES); 8143 if (!thub->table_ids) { 8144 err = -rte_errno; 8145 goto err; 8146 } 8147 thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES); 8148 if (!thub->groups) { 8149 err = -rte_errno; 8150 goto err; 8151 } 8152 sh->tunnel_hub = thub; 8153 8154 return 0; 8155 8156 err: 8157 if (thub->groups) 8158 mlx5_hlist_destroy(thub->groups, NULL, NULL); 8159 if (thub->table_ids) 8160 mlx5_flow_id_pool_release(thub->table_ids); 8161 if (thub->tunnel_ids) 8162 mlx5_flow_id_pool_release(thub->tunnel_ids); 8163 if (thub) 8164 mlx5_free(thub); 8165 return err; 8166 } 8167