1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 12 /* Verbs header. */ 13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 14 #ifdef PEDANTIC 15 #pragma GCC diagnostic ignored "-Wpedantic" 16 #endif 17 #include <infiniband/verbs.h> 18 #ifdef PEDANTIC 19 #pragma GCC diagnostic error "-Wpedantic" 20 #endif 21 22 #include <rte_common.h> 23 #include <rte_ether.h> 24 #include <rte_eth_ctrl.h> 25 #include <rte_ethdev_driver.h> 26 #include <rte_flow.h> 27 #include <rte_flow_driver.h> 28 #include <rte_malloc.h> 29 #include <rte_ip.h> 30 31 #include "mlx5.h" 32 #include "mlx5_defs.h" 33 #include "mlx5_prm.h" 34 #include "mlx5_glue.h" 35 #include "mlx5_flow.h" 36 37 /* Dev ops structure defined in mlx5.c */ 38 extern const struct eth_dev_ops mlx5_dev_ops; 39 extern const struct eth_dev_ops mlx5_dev_ops_isolate; 40 41 /** Device flow drivers. */ 42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops; 44 #endif 45 extern const struct mlx5_flow_driver_ops mlx5_flow_tcf_drv_ops; 46 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 47 48 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 49 50 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 51 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 52 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 53 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 54 #endif 55 [MLX5_FLOW_TYPE_TCF] = &mlx5_flow_tcf_drv_ops, 56 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 57 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 58 }; 59 60 enum mlx5_expansion { 61 MLX5_EXPANSION_ROOT, 62 MLX5_EXPANSION_ROOT_OUTER, 63 MLX5_EXPANSION_ROOT_ETH_VLAN, 64 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 65 MLX5_EXPANSION_OUTER_ETH, 66 MLX5_EXPANSION_OUTER_ETH_VLAN, 67 MLX5_EXPANSION_OUTER_VLAN, 68 MLX5_EXPANSION_OUTER_IPV4, 69 MLX5_EXPANSION_OUTER_IPV4_UDP, 70 MLX5_EXPANSION_OUTER_IPV4_TCP, 71 MLX5_EXPANSION_OUTER_IPV6, 72 MLX5_EXPANSION_OUTER_IPV6_UDP, 73 MLX5_EXPANSION_OUTER_IPV6_TCP, 74 MLX5_EXPANSION_VXLAN, 75 MLX5_EXPANSION_VXLAN_GPE, 76 MLX5_EXPANSION_GRE, 77 MLX5_EXPANSION_MPLS, 78 MLX5_EXPANSION_ETH, 79 MLX5_EXPANSION_ETH_VLAN, 80 MLX5_EXPANSION_VLAN, 81 MLX5_EXPANSION_IPV4, 82 MLX5_EXPANSION_IPV4_UDP, 83 MLX5_EXPANSION_IPV4_TCP, 84 MLX5_EXPANSION_IPV6, 85 MLX5_EXPANSION_IPV6_UDP, 86 MLX5_EXPANSION_IPV6_TCP, 87 }; 88 89 /** Supported expansion of items. */ 90 static const struct rte_flow_expand_node mlx5_support_expansion[] = { 91 [MLX5_EXPANSION_ROOT] = { 92 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 93 MLX5_EXPANSION_IPV4, 94 MLX5_EXPANSION_IPV6), 95 .type = RTE_FLOW_ITEM_TYPE_END, 96 }, 97 [MLX5_EXPANSION_ROOT_OUTER] = { 98 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 99 MLX5_EXPANSION_OUTER_IPV4, 100 MLX5_EXPANSION_OUTER_IPV6), 101 .type = RTE_FLOW_ITEM_TYPE_END, 102 }, 103 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 104 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 105 .type = RTE_FLOW_ITEM_TYPE_END, 106 }, 107 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 108 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN), 109 .type = RTE_FLOW_ITEM_TYPE_END, 110 }, 111 [MLX5_EXPANSION_OUTER_ETH] = { 112 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 113 MLX5_EXPANSION_OUTER_IPV6, 114 MLX5_EXPANSION_MPLS), 115 .type = RTE_FLOW_ITEM_TYPE_ETH, 116 .rss_types = 0, 117 }, 118 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 119 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 120 .type = RTE_FLOW_ITEM_TYPE_ETH, 121 .rss_types = 0, 122 }, 123 [MLX5_EXPANSION_OUTER_VLAN] = { 124 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 125 MLX5_EXPANSION_OUTER_IPV6), 126 .type = RTE_FLOW_ITEM_TYPE_VLAN, 127 }, 128 [MLX5_EXPANSION_OUTER_IPV4] = { 129 .next = RTE_FLOW_EXPAND_RSS_NEXT 130 (MLX5_EXPANSION_OUTER_IPV4_UDP, 131 MLX5_EXPANSION_OUTER_IPV4_TCP, 132 MLX5_EXPANSION_GRE), 133 .type = RTE_FLOW_ITEM_TYPE_IPV4, 134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 135 ETH_RSS_NONFRAG_IPV4_OTHER, 136 }, 137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 139 MLX5_EXPANSION_VXLAN_GPE), 140 .type = RTE_FLOW_ITEM_TYPE_UDP, 141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 142 }, 143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 144 .type = RTE_FLOW_ITEM_TYPE_TCP, 145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 146 }, 147 [MLX5_EXPANSION_OUTER_IPV6] = { 148 .next = RTE_FLOW_EXPAND_RSS_NEXT 149 (MLX5_EXPANSION_OUTER_IPV6_UDP, 150 MLX5_EXPANSION_OUTER_IPV6_TCP), 151 .type = RTE_FLOW_ITEM_TYPE_IPV6, 152 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 153 ETH_RSS_NONFRAG_IPV6_OTHER, 154 }, 155 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 156 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 157 MLX5_EXPANSION_VXLAN_GPE), 158 .type = RTE_FLOW_ITEM_TYPE_UDP, 159 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 160 }, 161 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 162 .type = RTE_FLOW_ITEM_TYPE_TCP, 163 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 164 }, 165 [MLX5_EXPANSION_VXLAN] = { 166 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 167 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 168 }, 169 [MLX5_EXPANSION_VXLAN_GPE] = { 170 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 171 MLX5_EXPANSION_IPV4, 172 MLX5_EXPANSION_IPV6), 173 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 174 }, 175 [MLX5_EXPANSION_GRE] = { 176 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 177 .type = RTE_FLOW_ITEM_TYPE_GRE, 178 }, 179 [MLX5_EXPANSION_MPLS] = { 180 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 181 MLX5_EXPANSION_IPV6), 182 .type = RTE_FLOW_ITEM_TYPE_MPLS, 183 }, 184 [MLX5_EXPANSION_ETH] = { 185 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 186 MLX5_EXPANSION_IPV6), 187 .type = RTE_FLOW_ITEM_TYPE_ETH, 188 }, 189 [MLX5_EXPANSION_ETH_VLAN] = { 190 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 191 .type = RTE_FLOW_ITEM_TYPE_ETH, 192 }, 193 [MLX5_EXPANSION_VLAN] = { 194 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 195 MLX5_EXPANSION_IPV6), 196 .type = RTE_FLOW_ITEM_TYPE_VLAN, 197 }, 198 [MLX5_EXPANSION_IPV4] = { 199 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 200 MLX5_EXPANSION_IPV4_TCP), 201 .type = RTE_FLOW_ITEM_TYPE_IPV4, 202 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 203 ETH_RSS_NONFRAG_IPV4_OTHER, 204 }, 205 [MLX5_EXPANSION_IPV4_UDP] = { 206 .type = RTE_FLOW_ITEM_TYPE_UDP, 207 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 208 }, 209 [MLX5_EXPANSION_IPV4_TCP] = { 210 .type = RTE_FLOW_ITEM_TYPE_TCP, 211 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 212 }, 213 [MLX5_EXPANSION_IPV6] = { 214 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 215 MLX5_EXPANSION_IPV6_TCP), 216 .type = RTE_FLOW_ITEM_TYPE_IPV6, 217 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 218 ETH_RSS_NONFRAG_IPV6_OTHER, 219 }, 220 [MLX5_EXPANSION_IPV6_UDP] = { 221 .type = RTE_FLOW_ITEM_TYPE_UDP, 222 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 223 }, 224 [MLX5_EXPANSION_IPV6_TCP] = { 225 .type = RTE_FLOW_ITEM_TYPE_TCP, 226 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 227 }, 228 }; 229 230 static const struct rte_flow_ops mlx5_flow_ops = { 231 .validate = mlx5_flow_validate, 232 .create = mlx5_flow_create, 233 .destroy = mlx5_flow_destroy, 234 .flush = mlx5_flow_flush, 235 .isolate = mlx5_flow_isolate, 236 .query = mlx5_flow_query, 237 }; 238 239 /* Convert FDIR request to Generic flow. */ 240 struct mlx5_fdir { 241 struct rte_flow_attr attr; 242 struct rte_flow_action actions[2]; 243 struct rte_flow_item items[4]; 244 struct rte_flow_item_eth l2; 245 struct rte_flow_item_eth l2_mask; 246 union { 247 struct rte_flow_item_ipv4 ipv4; 248 struct rte_flow_item_ipv6 ipv6; 249 } l3; 250 union { 251 struct rte_flow_item_ipv4 ipv4; 252 struct rte_flow_item_ipv6 ipv6; 253 } l3_mask; 254 union { 255 struct rte_flow_item_udp udp; 256 struct rte_flow_item_tcp tcp; 257 } l4; 258 union { 259 struct rte_flow_item_udp udp; 260 struct rte_flow_item_tcp tcp; 261 } l4_mask; 262 struct rte_flow_action_queue queue; 263 }; 264 265 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 266 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 267 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 268 }; 269 270 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 271 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 272 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 273 { 9, 10, 11 }, { 12, 13, 14 }, 274 }; 275 276 /* Tunnel information. */ 277 struct mlx5_flow_tunnel_info { 278 uint32_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 279 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 280 }; 281 282 static struct mlx5_flow_tunnel_info tunnels_info[] = { 283 { 284 .tunnel = MLX5_FLOW_LAYER_VXLAN, 285 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 286 }, 287 { 288 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 289 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 290 }, 291 { 292 .tunnel = MLX5_FLOW_LAYER_GRE, 293 .ptype = RTE_PTYPE_TUNNEL_GRE, 294 }, 295 { 296 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 297 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE | RTE_PTYPE_L4_UDP, 298 }, 299 { 300 .tunnel = MLX5_FLOW_LAYER_MPLS, 301 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 302 }, 303 }; 304 305 /** 306 * Discover the maximum number of priority available. 307 * 308 * @param[in] dev 309 * Pointer to the Ethernet device structure. 310 * 311 * @return 312 * number of supported flow priority on success, a negative errno 313 * value otherwise and rte_errno is set. 314 */ 315 int 316 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 317 { 318 struct { 319 struct ibv_flow_attr attr; 320 struct ibv_flow_spec_eth eth; 321 struct ibv_flow_spec_action_drop drop; 322 } flow_attr = { 323 .attr = { 324 .num_of_specs = 2, 325 }, 326 .eth = { 327 .type = IBV_FLOW_SPEC_ETH, 328 .size = sizeof(struct ibv_flow_spec_eth), 329 }, 330 .drop = { 331 .size = sizeof(struct ibv_flow_spec_action_drop), 332 .type = IBV_FLOW_SPEC_ACTION_DROP, 333 }, 334 }; 335 struct ibv_flow *flow; 336 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev); 337 uint16_t vprio[] = { 8, 16 }; 338 int i; 339 int priority = 0; 340 341 if (!drop) { 342 rte_errno = ENOTSUP; 343 return -rte_errno; 344 } 345 for (i = 0; i != RTE_DIM(vprio); i++) { 346 flow_attr.attr.priority = vprio[i] - 1; 347 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr); 348 if (!flow) 349 break; 350 claim_zero(mlx5_glue->destroy_flow(flow)); 351 priority = vprio[i]; 352 } 353 switch (priority) { 354 case 8: 355 priority = RTE_DIM(priority_map_3); 356 break; 357 case 16: 358 priority = RTE_DIM(priority_map_5); 359 break; 360 default: 361 rte_errno = ENOTSUP; 362 DRV_LOG(ERR, 363 "port %u verbs maximum priority: %d expected 8/16", 364 dev->data->port_id, vprio[i]); 365 return -rte_errno; 366 } 367 mlx5_hrxq_drop_release(dev); 368 DRV_LOG(INFO, "port %u flow maximum priority: %d", 369 dev->data->port_id, priority); 370 return priority; 371 } 372 373 /** 374 * Adjust flow priority based on the highest layer and the request priority. 375 * 376 * @param[in] dev 377 * Pointer to the Ethernet device structure. 378 * @param[in] priority 379 * The rule base priority. 380 * @param[in] subpriority 381 * The priority based on the items. 382 * 383 * @return 384 * The new priority. 385 */ 386 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 387 uint32_t subpriority) 388 { 389 uint32_t res = 0; 390 struct priv *priv = dev->data->dev_private; 391 392 switch (priv->config.flow_prio) { 393 case RTE_DIM(priority_map_3): 394 res = priority_map_3[priority][subpriority]; 395 break; 396 case RTE_DIM(priority_map_5): 397 res = priority_map_5[priority][subpriority]; 398 break; 399 } 400 return res; 401 } 402 403 /** 404 * Verify the @p item specifications (spec, last, mask) are compatible with the 405 * NIC capabilities. 406 * 407 * @param[in] item 408 * Item specification. 409 * @param[in] mask 410 * @p item->mask or flow default bit-masks. 411 * @param[in] nic_mask 412 * Bit-masks covering supported fields by the NIC to compare with user mask. 413 * @param[in] size 414 * Bit-masks size in bytes. 415 * @param[out] error 416 * Pointer to error structure. 417 * 418 * @return 419 * 0 on success, a negative errno value otherwise and rte_errno is set. 420 */ 421 static int 422 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 423 const uint8_t *mask, 424 const uint8_t *nic_mask, 425 unsigned int size, 426 struct rte_flow_error *error) 427 { 428 unsigned int i; 429 430 assert(nic_mask); 431 for (i = 0; i < size; ++i) 432 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 433 return rte_flow_error_set(error, ENOTSUP, 434 RTE_FLOW_ERROR_TYPE_ITEM, 435 item, 436 "mask enables non supported" 437 " bits"); 438 if (!item->spec && (item->mask || item->last)) 439 return rte_flow_error_set(error, EINVAL, 440 RTE_FLOW_ERROR_TYPE_ITEM, item, 441 "mask/last without a spec is not" 442 " supported"); 443 if (item->spec && item->last) { 444 uint8_t spec[size]; 445 uint8_t last[size]; 446 unsigned int i; 447 int ret; 448 449 for (i = 0; i < size; ++i) { 450 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 451 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 452 } 453 ret = memcmp(spec, last, size); 454 if (ret != 0) 455 return rte_flow_error_set(error, EINVAL, 456 RTE_FLOW_ERROR_TYPE_ITEM, 457 item, 458 "range is not valid"); 459 } 460 return 0; 461 } 462 463 /** 464 * Adjust the hash fields according to the @p flow information. 465 * 466 * @param[in] dev_flow. 467 * Pointer to the mlx5_flow. 468 * @param[in] tunnel 469 * 1 when the hash field is for a tunnel item. 470 * @param[in] layer_types 471 * ETH_RSS_* types. 472 * @param[in] hash_fields 473 * Item hash fields. 474 * 475 * @return 476 * The hash fileds that should be used. 477 */ 478 uint64_t 479 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, 480 int tunnel __rte_unused, uint32_t layer_types, 481 uint64_t hash_fields) 482 { 483 struct rte_flow *flow = dev_flow->flow; 484 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 485 int rss_request_inner = flow->rss.level >= 2; 486 487 /* Check RSS hash level for tunnel. */ 488 if (tunnel && rss_request_inner) 489 hash_fields |= IBV_RX_HASH_INNER; 490 else if (tunnel || rss_request_inner) 491 return 0; 492 #endif 493 /* Check if requested layer matches RSS hash fields. */ 494 if (!(flow->rss.types & layer_types)) 495 return 0; 496 return hash_fields; 497 } 498 499 /** 500 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 501 * if several tunnel rules are used on this queue, the tunnel ptype will be 502 * cleared. 503 * 504 * @param rxq_ctrl 505 * Rx queue to update. 506 */ 507 static void 508 mlx5_flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 509 { 510 unsigned int i; 511 uint32_t tunnel_ptype = 0; 512 513 /* Look up for the ptype to use. */ 514 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 515 if (!rxq_ctrl->flow_tunnels_n[i]) 516 continue; 517 if (!tunnel_ptype) { 518 tunnel_ptype = tunnels_info[i].ptype; 519 } else { 520 tunnel_ptype = 0; 521 break; 522 } 523 } 524 rxq_ctrl->rxq.tunnel = tunnel_ptype; 525 } 526 527 /** 528 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the flow. 529 * 530 * @param[in] dev 531 * Pointer to the Ethernet device structure. 532 * @param[in] flow 533 * Pointer to flow structure. 534 */ 535 static void 536 mlx5_flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 537 { 538 struct priv *priv = dev->data->dev_private; 539 const int mark = !!(flow->actions & 540 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 541 const int tunnel = !!(flow->layers & MLX5_FLOW_LAYER_TUNNEL); 542 unsigned int i; 543 544 for (i = 0; i != flow->rss.queue_num; ++i) { 545 int idx = (*flow->queue)[i]; 546 struct mlx5_rxq_ctrl *rxq_ctrl = 547 container_of((*priv->rxqs)[idx], 548 struct mlx5_rxq_ctrl, rxq); 549 550 if (mark) { 551 rxq_ctrl->rxq.mark = 1; 552 rxq_ctrl->flow_mark_n++; 553 } 554 if (tunnel) { 555 unsigned int j; 556 557 /* Increase the counter matching the flow. */ 558 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 559 if ((tunnels_info[j].tunnel & flow->layers) == 560 tunnels_info[j].tunnel) { 561 rxq_ctrl->flow_tunnels_n[j]++; 562 break; 563 } 564 } 565 mlx5_flow_rxq_tunnel_ptype_update(rxq_ctrl); 566 } 567 } 568 } 569 570 /** 571 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 572 * @p flow if no other flow uses it with the same kind of request. 573 * 574 * @param dev 575 * Pointer to Ethernet device. 576 * @param[in] flow 577 * Pointer to the flow. 578 */ 579 static void 580 mlx5_flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 581 { 582 struct priv *priv = dev->data->dev_private; 583 const int mark = !!(flow->actions & 584 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 585 const int tunnel = !!(flow->layers & MLX5_FLOW_LAYER_TUNNEL); 586 unsigned int i; 587 588 assert(dev->data->dev_started); 589 for (i = 0; i != flow->rss.queue_num; ++i) { 590 int idx = (*flow->queue)[i]; 591 struct mlx5_rxq_ctrl *rxq_ctrl = 592 container_of((*priv->rxqs)[idx], 593 struct mlx5_rxq_ctrl, rxq); 594 595 if (mark) { 596 rxq_ctrl->flow_mark_n--; 597 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 598 } 599 if (tunnel) { 600 unsigned int j; 601 602 /* Decrease the counter matching the flow. */ 603 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 604 if ((tunnels_info[j].tunnel & flow->layers) == 605 tunnels_info[j].tunnel) { 606 rxq_ctrl->flow_tunnels_n[j]--; 607 break; 608 } 609 } 610 mlx5_flow_rxq_tunnel_ptype_update(rxq_ctrl); 611 } 612 } 613 } 614 615 /** 616 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 617 * 618 * @param dev 619 * Pointer to Ethernet device. 620 */ 621 static void 622 mlx5_flow_rxq_flags_clear(struct rte_eth_dev *dev) 623 { 624 struct priv *priv = dev->data->dev_private; 625 unsigned int i; 626 627 for (i = 0; i != priv->rxqs_n; ++i) { 628 struct mlx5_rxq_ctrl *rxq_ctrl; 629 unsigned int j; 630 631 if (!(*priv->rxqs)[i]) 632 continue; 633 rxq_ctrl = container_of((*priv->rxqs)[i], 634 struct mlx5_rxq_ctrl, rxq); 635 rxq_ctrl->flow_mark_n = 0; 636 rxq_ctrl->rxq.mark = 0; 637 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 638 rxq_ctrl->flow_tunnels_n[j] = 0; 639 rxq_ctrl->rxq.tunnel = 0; 640 } 641 } 642 643 /* 644 * Validate the flag action. 645 * 646 * @param[in] action_flags 647 * Bit-fields that holds the actions detected until now. 648 * @param[in] attr 649 * Attributes of flow that includes this action. 650 * @param[out] error 651 * Pointer to error structure. 652 * 653 * @return 654 * 0 on success, a negative errno value otherwise and rte_errno is set. 655 */ 656 int 657 mlx5_flow_validate_action_flag(uint64_t action_flags, 658 const struct rte_flow_attr *attr, 659 struct rte_flow_error *error) 660 { 661 662 if (action_flags & MLX5_FLOW_ACTION_DROP) 663 return rte_flow_error_set(error, EINVAL, 664 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 665 "can't drop and flag in same flow"); 666 if (action_flags & MLX5_FLOW_ACTION_MARK) 667 return rte_flow_error_set(error, EINVAL, 668 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 669 "can't mark and flag in same flow"); 670 if (action_flags & MLX5_FLOW_ACTION_FLAG) 671 return rte_flow_error_set(error, EINVAL, 672 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 673 "can't have 2 flag" 674 " actions in same flow"); 675 if (attr->egress) 676 return rte_flow_error_set(error, ENOTSUP, 677 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 678 "flag action not supported for " 679 "egress"); 680 return 0; 681 } 682 683 /* 684 * Validate the mark action. 685 * 686 * @param[in] action 687 * Pointer to the queue action. 688 * @param[in] action_flags 689 * Bit-fields that holds the actions detected until now. 690 * @param[in] attr 691 * Attributes of flow that includes this action. 692 * @param[out] error 693 * Pointer to error structure. 694 * 695 * @return 696 * 0 on success, a negative errno value otherwise and rte_errno is set. 697 */ 698 int 699 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 700 uint64_t action_flags, 701 const struct rte_flow_attr *attr, 702 struct rte_flow_error *error) 703 { 704 const struct rte_flow_action_mark *mark = action->conf; 705 706 if (!mark) 707 return rte_flow_error_set(error, EINVAL, 708 RTE_FLOW_ERROR_TYPE_ACTION, 709 action, 710 "configuration cannot be null"); 711 if (mark->id >= MLX5_FLOW_MARK_MAX) 712 return rte_flow_error_set(error, EINVAL, 713 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 714 &mark->id, 715 "mark id must in 0 <= id < " 716 RTE_STR(MLX5_FLOW_MARK_MAX)); 717 if (action_flags & MLX5_FLOW_ACTION_DROP) 718 return rte_flow_error_set(error, EINVAL, 719 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 720 "can't drop and mark in same flow"); 721 if (action_flags & MLX5_FLOW_ACTION_FLAG) 722 return rte_flow_error_set(error, EINVAL, 723 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 724 "can't flag and mark in same flow"); 725 if (action_flags & MLX5_FLOW_ACTION_MARK) 726 return rte_flow_error_set(error, EINVAL, 727 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 728 "can't have 2 mark actions in same" 729 " flow"); 730 if (attr->egress) 731 return rte_flow_error_set(error, ENOTSUP, 732 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 733 "mark action not supported for " 734 "egress"); 735 return 0; 736 } 737 738 /* 739 * Validate the drop action. 740 * 741 * @param[in] action_flags 742 * Bit-fields that holds the actions detected until now. 743 * @param[in] attr 744 * Attributes of flow that includes this action. 745 * @param[out] error 746 * Pointer to error structure. 747 * 748 * @return 749 * 0 on success, a negative errno value otherwise and rte_ernno is set. 750 */ 751 int 752 mlx5_flow_validate_action_drop(uint64_t action_flags, 753 const struct rte_flow_attr *attr, 754 struct rte_flow_error *error) 755 { 756 if (action_flags & MLX5_FLOW_ACTION_FLAG) 757 return rte_flow_error_set(error, EINVAL, 758 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 759 "can't drop and flag in same flow"); 760 if (action_flags & MLX5_FLOW_ACTION_MARK) 761 return rte_flow_error_set(error, EINVAL, 762 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 763 "can't drop and mark in same flow"); 764 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 765 return rte_flow_error_set(error, EINVAL, 766 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 767 "can't have 2 fate actions in" 768 " same flow"); 769 if (attr->egress) 770 return rte_flow_error_set(error, ENOTSUP, 771 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 772 "drop action not supported for " 773 "egress"); 774 return 0; 775 } 776 777 /* 778 * Validate the queue action. 779 * 780 * @param[in] action 781 * Pointer to the queue action. 782 * @param[in] action_flags 783 * Bit-fields that holds the actions detected until now. 784 * @param[in] dev 785 * Pointer to the Ethernet device structure. 786 * @param[in] attr 787 * Attributes of flow that includes this action. 788 * @param[out] error 789 * Pointer to error structure. 790 * 791 * @return 792 * 0 on success, a negative errno value otherwise and rte_ernno is set. 793 */ 794 int 795 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 796 uint64_t action_flags, 797 struct rte_eth_dev *dev, 798 const struct rte_flow_attr *attr, 799 struct rte_flow_error *error) 800 { 801 struct priv *priv = dev->data->dev_private; 802 const struct rte_flow_action_queue *queue = action->conf; 803 804 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 805 return rte_flow_error_set(error, EINVAL, 806 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 807 "can't have 2 fate actions in" 808 " same flow"); 809 if (queue->index >= priv->rxqs_n) 810 return rte_flow_error_set(error, EINVAL, 811 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 812 &queue->index, 813 "queue index out of range"); 814 if (!(*priv->rxqs)[queue->index]) 815 return rte_flow_error_set(error, EINVAL, 816 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 817 &queue->index, 818 "queue is not configured"); 819 if (attr->egress) 820 return rte_flow_error_set(error, ENOTSUP, 821 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 822 "queue action not supported for " 823 "egress"); 824 return 0; 825 } 826 827 /* 828 * Validate the rss action. 829 * 830 * @param[in] action 831 * Pointer to the queue action. 832 * @param[in] action_flags 833 * Bit-fields that holds the actions detected until now. 834 * @param[in] dev 835 * Pointer to the Ethernet device structure. 836 * @param[in] attr 837 * Attributes of flow that includes this action. 838 * @param[out] error 839 * Pointer to error structure. 840 * 841 * @return 842 * 0 on success, a negative errno value otherwise and rte_ernno is set. 843 */ 844 int 845 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 846 uint64_t action_flags, 847 struct rte_eth_dev *dev, 848 const struct rte_flow_attr *attr, 849 struct rte_flow_error *error) 850 { 851 struct priv *priv = dev->data->dev_private; 852 const struct rte_flow_action_rss *rss = action->conf; 853 unsigned int i; 854 855 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 856 return rte_flow_error_set(error, EINVAL, 857 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 858 "can't have 2 fate actions" 859 " in same flow"); 860 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 861 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 862 return rte_flow_error_set(error, ENOTSUP, 863 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 864 &rss->func, 865 "RSS hash function not supported"); 866 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 867 if (rss->level > 2) 868 #else 869 if (rss->level > 1) 870 #endif 871 return rte_flow_error_set(error, ENOTSUP, 872 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 873 &rss->level, 874 "tunnel RSS is not supported"); 875 if (rss->key_len < MLX5_RSS_HASH_KEY_LEN) 876 return rte_flow_error_set(error, ENOTSUP, 877 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 878 &rss->key_len, 879 "RSS hash key too small"); 880 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 881 return rte_flow_error_set(error, ENOTSUP, 882 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 883 &rss->key_len, 884 "RSS hash key too large"); 885 if (rss->queue_num > priv->config.ind_table_max_size) 886 return rte_flow_error_set(error, ENOTSUP, 887 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 888 &rss->queue_num, 889 "number of queues too large"); 890 if (rss->types & MLX5_RSS_HF_MASK) 891 return rte_flow_error_set(error, ENOTSUP, 892 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 893 &rss->types, 894 "some RSS protocols are not" 895 " supported"); 896 for (i = 0; i != rss->queue_num; ++i) { 897 if (!(*priv->rxqs)[rss->queue[i]]) 898 return rte_flow_error_set 899 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 900 &rss->queue[i], "queue is not configured"); 901 } 902 if (attr->egress) 903 return rte_flow_error_set(error, ENOTSUP, 904 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 905 "rss action not supported for " 906 "egress"); 907 return 0; 908 } 909 910 /* 911 * Validate the count action. 912 * 913 * @param[in] dev 914 * Pointer to the Ethernet device structure. 915 * @param[in] attr 916 * Attributes of flow that includes this action. 917 * @param[out] error 918 * Pointer to error structure. 919 * 920 * @return 921 * 0 on success, a negative errno value otherwise and rte_ernno is set. 922 */ 923 int 924 mlx5_flow_validate_action_count(struct rte_eth_dev *dev, 925 const struct rte_flow_attr *attr, 926 struct rte_flow_error *error) 927 { 928 struct priv *priv = dev->data->dev_private; 929 930 if (!priv->config.flow_counter_en) 931 return rte_flow_error_set(error, ENOTSUP, 932 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 933 "flow counters are not supported."); 934 if (attr->egress) 935 return rte_flow_error_set(error, ENOTSUP, 936 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 937 "count action not supported for " 938 "egress"); 939 return 0; 940 } 941 942 /** 943 * Verify the @p attributes will be correctly understood by the NIC and store 944 * them in the @p flow if everything is correct. 945 * 946 * @param[in] dev 947 * Pointer to the Ethernet device structure. 948 * @param[in] attributes 949 * Pointer to flow attributes 950 * @param[out] error 951 * Pointer to error structure. 952 * 953 * @return 954 * 0 on success, a negative errno value otherwise and rte_errno is set. 955 */ 956 int 957 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 958 const struct rte_flow_attr *attributes, 959 struct rte_flow_error *error) 960 { 961 struct priv *priv = dev->data->dev_private; 962 uint32_t priority_max = priv->config.flow_prio - 1; 963 964 if (attributes->group) 965 return rte_flow_error_set(error, ENOTSUP, 966 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 967 NULL, "groups is not supported"); 968 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 969 attributes->priority >= priority_max) 970 return rte_flow_error_set(error, ENOTSUP, 971 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 972 NULL, "priority out of range"); 973 if (attributes->egress) 974 return rte_flow_error_set(error, ENOTSUP, 975 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 976 "egress is not supported"); 977 if (attributes->transfer) 978 return rte_flow_error_set(error, ENOTSUP, 979 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 980 NULL, "transfer is not supported"); 981 if (!attributes->ingress) 982 return rte_flow_error_set(error, EINVAL, 983 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 984 NULL, 985 "ingress attribute is mandatory"); 986 return 0; 987 } 988 989 /** 990 * Validate Ethernet item. 991 * 992 * @param[in] item 993 * Item specification. 994 * @param[in] item_flags 995 * Bit-fields that holds the items detected until now. 996 * @param[out] error 997 * Pointer to error structure. 998 * 999 * @return 1000 * 0 on success, a negative errno value otherwise and rte_errno is set. 1001 */ 1002 int 1003 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1004 uint64_t item_flags, 1005 struct rte_flow_error *error) 1006 { 1007 const struct rte_flow_item_eth *mask = item->mask; 1008 const struct rte_flow_item_eth nic_mask = { 1009 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1010 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1011 .type = RTE_BE16(0xffff), 1012 }; 1013 int ret; 1014 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1015 1016 if (item_flags & MLX5_FLOW_LAYER_OUTER_L2) 1017 return rte_flow_error_set(error, ENOTSUP, 1018 RTE_FLOW_ERROR_TYPE_ITEM, item, 1019 "3 levels of l2 are not supported"); 1020 if ((item_flags & MLX5_FLOW_LAYER_INNER_L2) && !tunnel) 1021 return rte_flow_error_set(error, ENOTSUP, 1022 RTE_FLOW_ERROR_TYPE_ITEM, item, 1023 "2 L2 without tunnel are not supported"); 1024 if (!mask) 1025 mask = &rte_flow_item_eth_mask; 1026 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1027 (const uint8_t *)&nic_mask, 1028 sizeof(struct rte_flow_item_eth), 1029 error); 1030 return ret; 1031 } 1032 1033 /** 1034 * Validate VLAN item. 1035 * 1036 * @param[in] item 1037 * Item specification. 1038 * @param[in] item_flags 1039 * Bit-fields that holds the items detected until now. 1040 * @param[out] error 1041 * Pointer to error structure. 1042 * 1043 * @return 1044 * 0 on success, a negative errno value otherwise and rte_errno is set. 1045 */ 1046 int 1047 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1048 int64_t item_flags, 1049 struct rte_flow_error *error) 1050 { 1051 const struct rte_flow_item_vlan *spec = item->spec; 1052 const struct rte_flow_item_vlan *mask = item->mask; 1053 const struct rte_flow_item_vlan nic_mask = { 1054 .tci = RTE_BE16(0x0fff), 1055 .inner_type = RTE_BE16(0xffff), 1056 }; 1057 uint16_t vlan_tag = 0; 1058 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1059 int ret; 1060 const uint32_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1061 MLX5_FLOW_LAYER_INNER_L4) : 1062 (MLX5_FLOW_LAYER_OUTER_L3 | 1063 MLX5_FLOW_LAYER_OUTER_L4); 1064 const uint32_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1065 MLX5_FLOW_LAYER_OUTER_VLAN; 1066 1067 if (item_flags & vlanm) 1068 return rte_flow_error_set(error, EINVAL, 1069 RTE_FLOW_ERROR_TYPE_ITEM, item, 1070 "VLAN layer already configured"); 1071 else if ((item_flags & l34m) != 0) 1072 return rte_flow_error_set(error, EINVAL, 1073 RTE_FLOW_ERROR_TYPE_ITEM, item, 1074 "L2 layer cannot follow L3/L4 layer"); 1075 if (!mask) 1076 mask = &rte_flow_item_vlan_mask; 1077 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1078 (const uint8_t *)&nic_mask, 1079 sizeof(struct rte_flow_item_vlan), 1080 error); 1081 if (ret) 1082 return ret; 1083 if (spec) { 1084 vlan_tag = spec->tci; 1085 vlan_tag &= mask->tci; 1086 } 1087 /* 1088 * From verbs perspective an empty VLAN is equivalent 1089 * to a packet without VLAN layer. 1090 */ 1091 if (!vlan_tag) 1092 return rte_flow_error_set(error, EINVAL, 1093 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1094 item->spec, 1095 "VLAN cannot be empty"); 1096 return 0; 1097 } 1098 1099 /** 1100 * Validate IPV4 item. 1101 * 1102 * @param[in] item 1103 * Item specification. 1104 * @param[in] item_flags 1105 * Bit-fields that holds the items detected until now. 1106 * @param[out] error 1107 * Pointer to error structure. 1108 * 1109 * @return 1110 * 0 on success, a negative errno value otherwise and rte_errno is set. 1111 */ 1112 int 1113 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 1114 int64_t item_flags, 1115 struct rte_flow_error *error) 1116 { 1117 const struct rte_flow_item_ipv4 *mask = item->mask; 1118 const struct rte_flow_item_ipv4 nic_mask = { 1119 .hdr = { 1120 .src_addr = RTE_BE32(0xffffffff), 1121 .dst_addr = RTE_BE32(0xffffffff), 1122 .type_of_service = 0xff, 1123 .next_proto_id = 0xff, 1124 }, 1125 }; 1126 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1127 int ret; 1128 1129 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1130 MLX5_FLOW_LAYER_OUTER_L3)) 1131 return rte_flow_error_set(error, ENOTSUP, 1132 RTE_FLOW_ERROR_TYPE_ITEM, item, 1133 "multiple L3 layers not supported"); 1134 else if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1135 MLX5_FLOW_LAYER_OUTER_L4)) 1136 return rte_flow_error_set(error, EINVAL, 1137 RTE_FLOW_ERROR_TYPE_ITEM, item, 1138 "L3 cannot follow an L4 layer."); 1139 if (!mask) 1140 mask = &rte_flow_item_ipv4_mask; 1141 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1142 (const uint8_t *)&nic_mask, 1143 sizeof(struct rte_flow_item_ipv4), 1144 error); 1145 if (ret < 0) 1146 return ret; 1147 return 0; 1148 } 1149 1150 /** 1151 * Validate IPV6 item. 1152 * 1153 * @param[in] item 1154 * Item specification. 1155 * @param[in] item_flags 1156 * Bit-fields that holds the items detected until now. 1157 * @param[out] error 1158 * Pointer to error structure. 1159 * 1160 * @return 1161 * 0 on success, a negative errno value otherwise and rte_errno is set. 1162 */ 1163 int 1164 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 1165 uint64_t item_flags, 1166 struct rte_flow_error *error) 1167 { 1168 const struct rte_flow_item_ipv6 *mask = item->mask; 1169 const struct rte_flow_item_ipv6 nic_mask = { 1170 .hdr = { 1171 .src_addr = 1172 "\xff\xff\xff\xff\xff\xff\xff\xff" 1173 "\xff\xff\xff\xff\xff\xff\xff\xff", 1174 .dst_addr = 1175 "\xff\xff\xff\xff\xff\xff\xff\xff" 1176 "\xff\xff\xff\xff\xff\xff\xff\xff", 1177 .vtc_flow = RTE_BE32(0xffffffff), 1178 .proto = 0xff, 1179 .hop_limits = 0xff, 1180 }, 1181 }; 1182 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1183 int ret; 1184 1185 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1186 MLX5_FLOW_LAYER_OUTER_L3)) 1187 return rte_flow_error_set(error, ENOTSUP, 1188 RTE_FLOW_ERROR_TYPE_ITEM, item, 1189 "multiple L3 layers not supported"); 1190 else if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1191 MLX5_FLOW_LAYER_OUTER_L4)) 1192 return rte_flow_error_set(error, EINVAL, 1193 RTE_FLOW_ERROR_TYPE_ITEM, item, 1194 "L3 cannot follow an L4 layer."); 1195 /* 1196 * IPv6 is not recognised by the NIC inside a GRE tunnel. 1197 * Such support has to be disabled as the rule will be 1198 * accepted. Issue reproduced with Mellanox OFED 4.3-3.0.2.1 and 1199 * Mellanox OFED 4.4-1.0.0.0. 1200 */ 1201 if (tunnel && item_flags & MLX5_FLOW_LAYER_GRE) 1202 return rte_flow_error_set(error, ENOTSUP, 1203 RTE_FLOW_ERROR_TYPE_ITEM, item, 1204 "IPv6 inside a GRE tunnel is" 1205 " not recognised."); 1206 if (!mask) 1207 mask = &rte_flow_item_ipv6_mask; 1208 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1209 (const uint8_t *)&nic_mask, 1210 sizeof(struct rte_flow_item_ipv6), 1211 error); 1212 if (ret < 0) 1213 return ret; 1214 return 0; 1215 } 1216 1217 /** 1218 * Validate UDP item. 1219 * 1220 * @param[in] item 1221 * Item specification. 1222 * @param[in] item_flags 1223 * Bit-fields that holds the items detected until now. 1224 * @param[in] target_protocol 1225 * The next protocol in the previous item. 1226 * @param[out] error 1227 * Pointer to error structure. 1228 * 1229 * @return 1230 * 0 on success, a negative errno value otherwise and rte_errno is set. 1231 */ 1232 int 1233 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 1234 uint64_t item_flags, 1235 uint8_t target_protocol, 1236 struct rte_flow_error *error) 1237 { 1238 const struct rte_flow_item_udp *mask = item->mask; 1239 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1240 int ret; 1241 1242 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 1243 return rte_flow_error_set(error, EINVAL, 1244 RTE_FLOW_ERROR_TYPE_ITEM, item, 1245 "protocol filtering not compatible" 1246 " with UDP layer"); 1247 if (!(item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1248 MLX5_FLOW_LAYER_OUTER_L3))) 1249 return rte_flow_error_set(error, EINVAL, 1250 RTE_FLOW_ERROR_TYPE_ITEM, item, 1251 "L3 is mandatory to filter on L4"); 1252 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1253 MLX5_FLOW_LAYER_OUTER_L4)) 1254 return rte_flow_error_set(error, EINVAL, 1255 RTE_FLOW_ERROR_TYPE_ITEM, item, 1256 "L4 layer is already present"); 1257 if (!mask) 1258 mask = &rte_flow_item_udp_mask; 1259 ret = mlx5_flow_item_acceptable 1260 (item, (const uint8_t *)mask, 1261 (const uint8_t *)&rte_flow_item_udp_mask, 1262 sizeof(struct rte_flow_item_udp), error); 1263 if (ret < 0) 1264 return ret; 1265 return 0; 1266 } 1267 1268 /** 1269 * Validate TCP item. 1270 * 1271 * @param[in] item 1272 * Item specification. 1273 * @param[in] item_flags 1274 * Bit-fields that holds the items detected until now. 1275 * @param[in] target_protocol 1276 * The next protocol in the previous item. 1277 * @param[out] error 1278 * Pointer to error structure. 1279 * 1280 * @return 1281 * 0 on success, a negative errno value otherwise and rte_errno is set. 1282 */ 1283 int 1284 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 1285 uint64_t item_flags, 1286 uint8_t target_protocol, 1287 struct rte_flow_error *error) 1288 { 1289 const struct rte_flow_item_tcp *mask = item->mask; 1290 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1291 int ret; 1292 1293 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 1294 return rte_flow_error_set(error, EINVAL, 1295 RTE_FLOW_ERROR_TYPE_ITEM, item, 1296 "protocol filtering not compatible" 1297 " with TCP layer"); 1298 if (!(item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1299 MLX5_FLOW_LAYER_OUTER_L3))) 1300 return rte_flow_error_set(error, EINVAL, 1301 RTE_FLOW_ERROR_TYPE_ITEM, item, 1302 "L3 is mandatory to filter on L4"); 1303 if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1304 MLX5_FLOW_LAYER_OUTER_L4)) 1305 return rte_flow_error_set(error, EINVAL, 1306 RTE_FLOW_ERROR_TYPE_ITEM, item, 1307 "L4 layer is already present"); 1308 if (!mask) 1309 mask = &rte_flow_item_tcp_mask; 1310 ret = mlx5_flow_item_acceptable 1311 (item, (const uint8_t *)mask, 1312 (const uint8_t *)&rte_flow_item_tcp_mask, 1313 sizeof(struct rte_flow_item_tcp), error); 1314 if (ret < 0) 1315 return ret; 1316 return 0; 1317 } 1318 1319 /** 1320 * Validate VXLAN item. 1321 * 1322 * @param[in] item 1323 * Item specification. 1324 * @param[in] item_flags 1325 * Bit-fields that holds the items detected until now. 1326 * @param[in] target_protocol 1327 * The next protocol in the previous item. 1328 * @param[out] error 1329 * Pointer to error structure. 1330 * 1331 * @return 1332 * 0 on success, a negative errno value otherwise and rte_errno is set. 1333 */ 1334 int 1335 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 1336 uint64_t item_flags, 1337 struct rte_flow_error *error) 1338 { 1339 const struct rte_flow_item_vxlan *spec = item->spec; 1340 const struct rte_flow_item_vxlan *mask = item->mask; 1341 int ret; 1342 union vni { 1343 uint32_t vlan_id; 1344 uint8_t vni[4]; 1345 } id = { .vlan_id = 0, }; 1346 uint32_t vlan_id = 0; 1347 1348 1349 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1350 return rte_flow_error_set(error, ENOTSUP, 1351 RTE_FLOW_ERROR_TYPE_ITEM, item, 1352 "a tunnel is already present"); 1353 /* 1354 * Verify only UDPv4 is present as defined in 1355 * https://tools.ietf.org/html/rfc7348 1356 */ 1357 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1358 return rte_flow_error_set(error, EINVAL, 1359 RTE_FLOW_ERROR_TYPE_ITEM, item, 1360 "no outer UDP layer found"); 1361 if (!mask) 1362 mask = &rte_flow_item_vxlan_mask; 1363 ret = mlx5_flow_item_acceptable 1364 (item, (const uint8_t *)mask, 1365 (const uint8_t *)&rte_flow_item_vxlan_mask, 1366 sizeof(struct rte_flow_item_vxlan), 1367 error); 1368 if (ret < 0) 1369 return ret; 1370 if (spec) { 1371 memcpy(&id.vni[1], spec->vni, 3); 1372 vlan_id = id.vlan_id; 1373 memcpy(&id.vni[1], mask->vni, 3); 1374 vlan_id &= id.vlan_id; 1375 } 1376 /* 1377 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if 1378 * only this layer is defined in the Verbs specification it is 1379 * interpreted as wildcard and all packets will match this 1380 * rule, if it follows a full stack layer (ex: eth / ipv4 / 1381 * udp), all packets matching the layers before will also 1382 * match this rule. To avoid such situation, VNI 0 is 1383 * currently refused. 1384 */ 1385 if (!vlan_id) 1386 return rte_flow_error_set(error, ENOTSUP, 1387 RTE_FLOW_ERROR_TYPE_ITEM, item, 1388 "VXLAN vni cannot be 0"); 1389 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1390 return rte_flow_error_set(error, ENOTSUP, 1391 RTE_FLOW_ERROR_TYPE_ITEM, item, 1392 "VXLAN tunnel must be fully defined"); 1393 return 0; 1394 } 1395 1396 /** 1397 * Validate VXLAN_GPE item. 1398 * 1399 * @param[in] item 1400 * Item specification. 1401 * @param[in] item_flags 1402 * Bit-fields that holds the items detected until now. 1403 * @param[in] priv 1404 * Pointer to the private data structure. 1405 * @param[in] target_protocol 1406 * The next protocol in the previous item. 1407 * @param[out] error 1408 * Pointer to error structure. 1409 * 1410 * @return 1411 * 0 on success, a negative errno value otherwise and rte_errno is set. 1412 */ 1413 int 1414 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 1415 uint64_t item_flags, 1416 struct rte_eth_dev *dev, 1417 struct rte_flow_error *error) 1418 { 1419 struct priv *priv = dev->data->dev_private; 1420 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 1421 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 1422 int ret; 1423 union vni { 1424 uint32_t vlan_id; 1425 uint8_t vni[4]; 1426 } id = { .vlan_id = 0, }; 1427 uint32_t vlan_id = 0; 1428 1429 if (!priv->config.l3_vxlan_en) 1430 return rte_flow_error_set(error, ENOTSUP, 1431 RTE_FLOW_ERROR_TYPE_ITEM, item, 1432 "L3 VXLAN is not enabled by device" 1433 " parameter and/or not configured in" 1434 " firmware"); 1435 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1436 return rte_flow_error_set(error, ENOTSUP, 1437 RTE_FLOW_ERROR_TYPE_ITEM, item, 1438 "a tunnel is already present"); 1439 /* 1440 * Verify only UDPv4 is present as defined in 1441 * https://tools.ietf.org/html/rfc7348 1442 */ 1443 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1444 return rte_flow_error_set(error, EINVAL, 1445 RTE_FLOW_ERROR_TYPE_ITEM, item, 1446 "no outer UDP layer found"); 1447 if (!mask) 1448 mask = &rte_flow_item_vxlan_gpe_mask; 1449 ret = mlx5_flow_item_acceptable 1450 (item, (const uint8_t *)mask, 1451 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 1452 sizeof(struct rte_flow_item_vxlan_gpe), 1453 error); 1454 if (ret < 0) 1455 return ret; 1456 if (spec) { 1457 if (spec->protocol) 1458 return rte_flow_error_set(error, ENOTSUP, 1459 RTE_FLOW_ERROR_TYPE_ITEM, 1460 item, 1461 "VxLAN-GPE protocol" 1462 " not supported"); 1463 memcpy(&id.vni[1], spec->vni, 3); 1464 vlan_id = id.vlan_id; 1465 memcpy(&id.vni[1], mask->vni, 3); 1466 vlan_id &= id.vlan_id; 1467 } 1468 /* 1469 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this 1470 * layer is defined in the Verbs specification it is interpreted as 1471 * wildcard and all packets will match this rule, if it follows a full 1472 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers 1473 * before will also match this rule. To avoid such situation, VNI 0 1474 * is currently refused. 1475 */ 1476 if (!vlan_id) 1477 return rte_flow_error_set(error, ENOTSUP, 1478 RTE_FLOW_ERROR_TYPE_ITEM, item, 1479 "VXLAN-GPE vni cannot be 0"); 1480 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1481 return rte_flow_error_set(error, ENOTSUP, 1482 RTE_FLOW_ERROR_TYPE_ITEM, item, 1483 "VXLAN-GPE tunnel must be fully" 1484 " defined"); 1485 return 0; 1486 } 1487 1488 /** 1489 * Validate GRE item. 1490 * 1491 * @param[in] item 1492 * Item specification. 1493 * @param[in] item_flags 1494 * Bit flags to mark detected items. 1495 * @param[in] target_protocol 1496 * The next protocol in the previous item. 1497 * @param[out] error 1498 * Pointer to error structure. 1499 * 1500 * @return 1501 * 0 on success, a negative errno value otherwise and rte_errno is set. 1502 */ 1503 int 1504 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 1505 uint64_t item_flags, 1506 uint8_t target_protocol, 1507 struct rte_flow_error *error) 1508 { 1509 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 1510 const struct rte_flow_item_gre *mask = item->mask; 1511 int ret; 1512 1513 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 1514 return rte_flow_error_set(error, EINVAL, 1515 RTE_FLOW_ERROR_TYPE_ITEM, item, 1516 "protocol filtering not compatible" 1517 " with this GRE layer"); 1518 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1519 return rte_flow_error_set(error, ENOTSUP, 1520 RTE_FLOW_ERROR_TYPE_ITEM, item, 1521 "a tunnel is already present"); 1522 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 1523 return rte_flow_error_set(error, ENOTSUP, 1524 RTE_FLOW_ERROR_TYPE_ITEM, item, 1525 "L3 Layer is missing"); 1526 if (!mask) 1527 mask = &rte_flow_item_gre_mask; 1528 ret = mlx5_flow_item_acceptable 1529 (item, (const uint8_t *)mask, 1530 (const uint8_t *)&rte_flow_item_gre_mask, 1531 sizeof(struct rte_flow_item_gre), error); 1532 if (ret < 0) 1533 return ret; 1534 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 1535 if (spec && (spec->protocol & mask->protocol)) 1536 return rte_flow_error_set(error, ENOTSUP, 1537 RTE_FLOW_ERROR_TYPE_ITEM, item, 1538 "without MPLS support the" 1539 " specification cannot be used for" 1540 " filtering"); 1541 #endif 1542 return 0; 1543 } 1544 1545 /** 1546 * Validate MPLS item. 1547 * 1548 * @param[in] item 1549 * Item specification. 1550 * @param[in] item_flags 1551 * Bit-fields that holds the items detected until now. 1552 * @param[in] target_protocol 1553 * The next protocol in the previous item. 1554 * @param[out] error 1555 * Pointer to error structure. 1556 * 1557 * @return 1558 * 0 on success, a negative errno value otherwise and rte_errno is set. 1559 */ 1560 int 1561 mlx5_flow_validate_item_mpls(const struct rte_flow_item *item __rte_unused, 1562 uint64_t item_flags __rte_unused, 1563 uint8_t target_protocol __rte_unused, 1564 struct rte_flow_error *error) 1565 { 1566 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 1567 const struct rte_flow_item_mpls *mask = item->mask; 1568 int ret; 1569 1570 if (target_protocol != 0xff && target_protocol != IPPROTO_MPLS) 1571 return rte_flow_error_set(error, EINVAL, 1572 RTE_FLOW_ERROR_TYPE_ITEM, item, 1573 "protocol filtering not compatible" 1574 " with MPLS layer"); 1575 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1576 return rte_flow_error_set(error, ENOTSUP, 1577 RTE_FLOW_ERROR_TYPE_ITEM, item, 1578 "a tunnel is already" 1579 " present"); 1580 if (!mask) 1581 mask = &rte_flow_item_mpls_mask; 1582 ret = mlx5_flow_item_acceptable 1583 (item, (const uint8_t *)mask, 1584 (const uint8_t *)&rte_flow_item_mpls_mask, 1585 sizeof(struct rte_flow_item_mpls), error); 1586 if (ret < 0) 1587 return ret; 1588 return 0; 1589 #endif 1590 return rte_flow_error_set(error, ENOTSUP, 1591 RTE_FLOW_ERROR_TYPE_ITEM, item, 1592 "MPLS is not supported by Verbs, please" 1593 " update."); 1594 } 1595 1596 static int 1597 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 1598 const struct rte_flow_attr *attr __rte_unused, 1599 const struct rte_flow_item items[] __rte_unused, 1600 const struct rte_flow_action actions[] __rte_unused, 1601 struct rte_flow_error *error __rte_unused) 1602 { 1603 rte_errno = ENOTSUP; 1604 return -rte_errno; 1605 } 1606 1607 static struct mlx5_flow * 1608 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused, 1609 const struct rte_flow_item items[] __rte_unused, 1610 const struct rte_flow_action actions[] __rte_unused, 1611 uint64_t *item_flags __rte_unused, 1612 uint64_t *action_flags __rte_unused, 1613 struct rte_flow_error *error __rte_unused) 1614 { 1615 rte_errno = ENOTSUP; 1616 return NULL; 1617 } 1618 1619 static int 1620 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 1621 struct mlx5_flow *dev_flow __rte_unused, 1622 const struct rte_flow_attr *attr __rte_unused, 1623 const struct rte_flow_item items[] __rte_unused, 1624 const struct rte_flow_action actions[] __rte_unused, 1625 struct rte_flow_error *error __rte_unused) 1626 { 1627 rte_errno = ENOTSUP; 1628 return -rte_errno; 1629 } 1630 1631 static int 1632 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 1633 struct rte_flow *flow __rte_unused, 1634 struct rte_flow_error *error __rte_unused) 1635 { 1636 rte_errno = ENOTSUP; 1637 return -rte_errno; 1638 } 1639 1640 static void 1641 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 1642 struct rte_flow *flow __rte_unused) 1643 { 1644 } 1645 1646 static void 1647 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 1648 struct rte_flow *flow __rte_unused) 1649 { 1650 } 1651 1652 /* Void driver to protect from null pointer reference. */ 1653 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 1654 .validate = flow_null_validate, 1655 .prepare = flow_null_prepare, 1656 .translate = flow_null_translate, 1657 .apply = flow_null_apply, 1658 .remove = flow_null_remove, 1659 .destroy = flow_null_destroy, 1660 }; 1661 1662 /** 1663 * Select flow driver type according to flow attributes and device 1664 * configuration. 1665 * 1666 * @param[in] dev 1667 * Pointer to the dev structure. 1668 * @param[in] attr 1669 * Pointer to the flow attributes. 1670 * 1671 * @return 1672 * flow driver type if supported, MLX5_FLOW_TYPE_MAX otherwise. 1673 */ 1674 static enum mlx5_flow_drv_type 1675 flow_get_drv_type(struct rte_eth_dev *dev __rte_unused, 1676 const struct rte_flow_attr *attr) 1677 { 1678 struct priv *priv __rte_unused = dev->data->dev_private; 1679 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX; 1680 1681 if (attr->transfer) { 1682 type = MLX5_FLOW_TYPE_TCF; 1683 } else { 1684 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 1685 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 1686 MLX5_FLOW_TYPE_VERBS; 1687 #else 1688 type = MLX5_FLOW_TYPE_VERBS; 1689 #endif 1690 } 1691 return type; 1692 } 1693 1694 #define flow_get_drv_ops(type) flow_drv_ops[type] 1695 1696 /** 1697 * Flow driver validation API. This abstracts calling driver specific functions. 1698 * The type of flow driver is determined according to flow attributes. 1699 * 1700 * @param[in] dev 1701 * Pointer to the dev structure. 1702 * @param[in] attr 1703 * Pointer to the flow attributes. 1704 * @param[in] items 1705 * Pointer to the list of items. 1706 * @param[in] actions 1707 * Pointer to the list of actions. 1708 * @param[out] error 1709 * Pointer to the error structure. 1710 * 1711 * @return 1712 * 0 on success, a negative errno value otherwise and rte_ernno is set. 1713 */ 1714 static inline int 1715 flow_drv_validate(struct rte_eth_dev *dev, 1716 const struct rte_flow_attr *attr, 1717 const struct rte_flow_item items[], 1718 const struct rte_flow_action actions[], 1719 struct rte_flow_error *error) 1720 { 1721 const struct mlx5_flow_driver_ops *fops; 1722 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 1723 1724 fops = flow_get_drv_ops(type); 1725 return fops->validate(dev, attr, items, actions, error); 1726 } 1727 1728 /** 1729 * Flow driver preparation API. This abstracts calling driver specific 1730 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1731 * calculates the size of memory required for device flow, allocates the memory, 1732 * initializes the device flow and returns the pointer. 1733 * 1734 * @param[in] attr 1735 * Pointer to the flow attributes. 1736 * @param[in] items 1737 * Pointer to the list of items. 1738 * @param[in] actions 1739 * Pointer to the list of actions. 1740 * @param[out] item_flags 1741 * Pointer to bit mask of all items detected. 1742 * @param[out] action_flags 1743 * Pointer to bit mask of all actions detected. 1744 * @param[out] error 1745 * Pointer to the error structure. 1746 * 1747 * @return 1748 * Pointer to device flow on success, otherwise NULL and rte_ernno is set. 1749 */ 1750 static inline struct mlx5_flow * 1751 flow_drv_prepare(struct rte_flow *flow, 1752 const struct rte_flow_attr *attr, 1753 const struct rte_flow_item items[], 1754 const struct rte_flow_action actions[], 1755 uint64_t *item_flags, 1756 uint64_t *action_flags, 1757 struct rte_flow_error *error) 1758 { 1759 const struct mlx5_flow_driver_ops *fops; 1760 enum mlx5_flow_drv_type type = flow->drv_type; 1761 1762 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1763 fops = flow_get_drv_ops(type); 1764 return fops->prepare(attr, items, actions, item_flags, action_flags, 1765 error); 1766 } 1767 1768 /** 1769 * Flow driver translation API. This abstracts calling driver specific 1770 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1771 * translates a generic flow into a driver flow. flow_drv_prepare() must 1772 * precede. 1773 * 1774 * 1775 * @param[in] dev 1776 * Pointer to the rte dev structure. 1777 * @param[in, out] dev_flow 1778 * Pointer to the mlx5 flow. 1779 * @param[in] attr 1780 * Pointer to the flow attributes. 1781 * @param[in] items 1782 * Pointer to the list of items. 1783 * @param[in] actions 1784 * Pointer to the list of actions. 1785 * @param[out] error 1786 * Pointer to the error structure. 1787 * 1788 * @return 1789 * 0 on success, a negative errno value otherwise and rte_ernno is set. 1790 */ 1791 static inline int 1792 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 1793 const struct rte_flow_attr *attr, 1794 const struct rte_flow_item items[], 1795 const struct rte_flow_action actions[], 1796 struct rte_flow_error *error) 1797 { 1798 const struct mlx5_flow_driver_ops *fops; 1799 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 1800 1801 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1802 fops = flow_get_drv_ops(type); 1803 return fops->translate(dev, dev_flow, attr, items, actions, error); 1804 } 1805 1806 /** 1807 * Flow driver apply API. This abstracts calling driver specific functions. 1808 * Parent flow (rte_flow) should have driver type (drv_type). It applies 1809 * translated driver flows on to device. flow_drv_translate() must precede. 1810 * 1811 * @param[in] dev 1812 * Pointer to Ethernet device structure. 1813 * @param[in, out] flow 1814 * Pointer to flow structure. 1815 * @param[out] error 1816 * Pointer to error structure. 1817 * 1818 * @return 1819 * 0 on success, a negative errno value otherwise and rte_errno is set. 1820 */ 1821 static inline int 1822 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 1823 struct rte_flow_error *error) 1824 { 1825 const struct mlx5_flow_driver_ops *fops; 1826 enum mlx5_flow_drv_type type = flow->drv_type; 1827 1828 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1829 fops = flow_get_drv_ops(type); 1830 return fops->apply(dev, flow, error); 1831 } 1832 1833 /** 1834 * Flow driver remove API. This abstracts calling driver specific functions. 1835 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1836 * on device. All the resources of the flow should be freed by calling 1837 * flow_dv_destroy(). 1838 * 1839 * @param[in] dev 1840 * Pointer to Ethernet device. 1841 * @param[in, out] flow 1842 * Pointer to flow structure. 1843 */ 1844 static inline void 1845 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow) 1846 { 1847 const struct mlx5_flow_driver_ops *fops; 1848 enum mlx5_flow_drv_type type = flow->drv_type; 1849 1850 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1851 fops = flow_get_drv_ops(type); 1852 fops->remove(dev, flow); 1853 } 1854 1855 /** 1856 * Flow driver destroy API. This abstracts calling driver specific functions. 1857 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1858 * on device and releases resources of the flow. 1859 * 1860 * @param[in] dev 1861 * Pointer to Ethernet device. 1862 * @param[in, out] flow 1863 * Pointer to flow structure. 1864 */ 1865 static inline void 1866 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 1867 { 1868 const struct mlx5_flow_driver_ops *fops; 1869 enum mlx5_flow_drv_type type = flow->drv_type; 1870 1871 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1872 fops = flow_get_drv_ops(type); 1873 fops->destroy(dev, flow); 1874 } 1875 1876 /** 1877 * Validate a flow supported by the NIC. 1878 * 1879 * @see rte_flow_validate() 1880 * @see rte_flow_ops 1881 */ 1882 int 1883 mlx5_flow_validate(struct rte_eth_dev *dev, 1884 const struct rte_flow_attr *attr, 1885 const struct rte_flow_item items[], 1886 const struct rte_flow_action actions[], 1887 struct rte_flow_error *error) 1888 { 1889 int ret; 1890 1891 ret = flow_drv_validate(dev, attr, items, actions, error); 1892 if (ret < 0) 1893 return ret; 1894 return 0; 1895 } 1896 1897 /** 1898 * Get RSS action from the action list. 1899 * 1900 * @param[in] actions 1901 * Pointer to the list of actions. 1902 * 1903 * @return 1904 * Pointer to the RSS action if exist, else return NULL. 1905 */ 1906 static const struct rte_flow_action_rss* 1907 mlx5_flow_get_rss_action(const struct rte_flow_action actions[]) 1908 { 1909 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 1910 switch (actions->type) { 1911 case RTE_FLOW_ACTION_TYPE_RSS: 1912 return (const struct rte_flow_action_rss *) 1913 actions->conf; 1914 default: 1915 break; 1916 } 1917 } 1918 return NULL; 1919 } 1920 1921 static unsigned int 1922 mlx5_find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 1923 { 1924 const struct rte_flow_item *item; 1925 unsigned int has_vlan = 0; 1926 1927 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 1928 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 1929 has_vlan = 1; 1930 break; 1931 } 1932 } 1933 if (has_vlan) 1934 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 1935 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 1936 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 1937 MLX5_EXPANSION_ROOT_OUTER; 1938 } 1939 1940 /** 1941 * Create a flow and add it to @p list. 1942 * 1943 * @param dev 1944 * Pointer to Ethernet device. 1945 * @param list 1946 * Pointer to a TAILQ flow list. 1947 * @param[in] attr 1948 * Flow rule attributes. 1949 * @param[in] items 1950 * Pattern specification (list terminated by the END pattern item). 1951 * @param[in] actions 1952 * Associated actions (list terminated by the END action). 1953 * @param[out] error 1954 * Perform verbose error reporting if not NULL. 1955 * 1956 * @return 1957 * A flow on success, NULL otherwise and rte_errno is set. 1958 */ 1959 static struct rte_flow * 1960 mlx5_flow_list_create(struct rte_eth_dev *dev, 1961 struct mlx5_flows *list, 1962 const struct rte_flow_attr *attr, 1963 const struct rte_flow_item items[], 1964 const struct rte_flow_action actions[], 1965 struct rte_flow_error *error) 1966 { 1967 struct rte_flow *flow = NULL; 1968 struct mlx5_flow *dev_flow; 1969 uint64_t action_flags = 0; 1970 uint64_t item_flags = 0; 1971 const struct rte_flow_action_rss *rss; 1972 union { 1973 struct rte_flow_expand_rss buf; 1974 uint8_t buffer[2048]; 1975 } expand_buffer; 1976 struct rte_flow_expand_rss *buf = &expand_buffer.buf; 1977 int ret; 1978 uint32_t i; 1979 uint32_t flow_size; 1980 1981 ret = flow_drv_validate(dev, attr, items, actions, error); 1982 if (ret < 0) 1983 return NULL; 1984 flow_size = sizeof(struct rte_flow); 1985 rss = mlx5_flow_get_rss_action(actions); 1986 if (rss) 1987 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t), 1988 sizeof(void *)); 1989 else 1990 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *)); 1991 flow = rte_calloc(__func__, 1, flow_size, 0); 1992 flow->drv_type = flow_get_drv_type(dev, attr); 1993 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && 1994 flow->drv_type < MLX5_FLOW_TYPE_MAX); 1995 flow->queue = (void *)(flow + 1); 1996 LIST_INIT(&flow->dev_flows); 1997 if (rss && rss->types) { 1998 unsigned int graph_root; 1999 2000 graph_root = mlx5_find_graph_root(items, rss->level); 2001 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 2002 items, rss->types, 2003 mlx5_support_expansion, 2004 graph_root); 2005 assert(ret > 0 && 2006 (unsigned int)ret < sizeof(expand_buffer.buffer)); 2007 } else { 2008 buf->entries = 1; 2009 buf->entry[0].pattern = (void *)(uintptr_t)items; 2010 } 2011 for (i = 0; i < buf->entries; ++i) { 2012 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern, 2013 actions, &item_flags, &action_flags, 2014 error); 2015 if (!dev_flow) 2016 goto error; 2017 dev_flow->flow = flow; 2018 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next); 2019 ret = flow_drv_translate(dev, dev_flow, attr, 2020 buf->entry[i].pattern, 2021 actions, error); 2022 if (ret < 0) 2023 goto error; 2024 } 2025 if (dev->data->dev_started) { 2026 ret = flow_drv_apply(dev, flow, error); 2027 if (ret < 0) 2028 goto error; 2029 } 2030 TAILQ_INSERT_TAIL(list, flow, next); 2031 mlx5_flow_rxq_flags_set(dev, flow); 2032 return flow; 2033 error: 2034 ret = rte_errno; /* Save rte_errno before cleanup. */ 2035 assert(flow); 2036 flow_drv_destroy(dev, flow); 2037 rte_free(flow); 2038 rte_errno = ret; /* Restore rte_errno. */ 2039 return NULL; 2040 } 2041 2042 /** 2043 * Create a flow. 2044 * 2045 * @see rte_flow_create() 2046 * @see rte_flow_ops 2047 */ 2048 struct rte_flow * 2049 mlx5_flow_create(struct rte_eth_dev *dev, 2050 const struct rte_flow_attr *attr, 2051 const struct rte_flow_item items[], 2052 const struct rte_flow_action actions[], 2053 struct rte_flow_error *error) 2054 { 2055 return mlx5_flow_list_create 2056 (dev, &((struct priv *)dev->data->dev_private)->flows, 2057 attr, items, actions, error); 2058 } 2059 2060 /** 2061 * Destroy a flow in a list. 2062 * 2063 * @param dev 2064 * Pointer to Ethernet device. 2065 * @param list 2066 * Pointer to a TAILQ flow list. 2067 * @param[in] flow 2068 * Flow to destroy. 2069 */ 2070 static void 2071 mlx5_flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list, 2072 struct rte_flow *flow) 2073 { 2074 flow_drv_destroy(dev, flow); 2075 TAILQ_REMOVE(list, flow, next); 2076 /* 2077 * Update RX queue flags only if port is started, otherwise it is 2078 * already clean. 2079 */ 2080 if (dev->data->dev_started) 2081 mlx5_flow_rxq_flags_trim(dev, flow); 2082 rte_free(flow); 2083 } 2084 2085 /** 2086 * Destroy all flows. 2087 * 2088 * @param dev 2089 * Pointer to Ethernet device. 2090 * @param list 2091 * Pointer to a TAILQ flow list. 2092 */ 2093 void 2094 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list) 2095 { 2096 while (!TAILQ_EMPTY(list)) { 2097 struct rte_flow *flow; 2098 2099 flow = TAILQ_FIRST(list); 2100 mlx5_flow_list_destroy(dev, list, flow); 2101 } 2102 } 2103 2104 /** 2105 * Remove all flows. 2106 * 2107 * @param dev 2108 * Pointer to Ethernet device. 2109 * @param list 2110 * Pointer to a TAILQ flow list. 2111 */ 2112 void 2113 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list) 2114 { 2115 struct rte_flow *flow; 2116 2117 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) 2118 flow_drv_remove(dev, flow); 2119 mlx5_flow_rxq_flags_clear(dev); 2120 } 2121 2122 /** 2123 * Add all flows. 2124 * 2125 * @param dev 2126 * Pointer to Ethernet device. 2127 * @param list 2128 * Pointer to a TAILQ flow list. 2129 * 2130 * @return 2131 * 0 on success, a negative errno value otherwise and rte_errno is set. 2132 */ 2133 int 2134 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list) 2135 { 2136 struct rte_flow *flow; 2137 struct rte_flow_error error; 2138 int ret = 0; 2139 2140 TAILQ_FOREACH(flow, list, next) { 2141 ret = flow_drv_apply(dev, flow, &error); 2142 if (ret < 0) 2143 goto error; 2144 mlx5_flow_rxq_flags_set(dev, flow); 2145 } 2146 return 0; 2147 error: 2148 ret = rte_errno; /* Save rte_errno before cleanup. */ 2149 mlx5_flow_stop(dev, list); 2150 rte_errno = ret; /* Restore rte_errno. */ 2151 return -rte_errno; 2152 } 2153 2154 /** 2155 * Verify the flow list is empty 2156 * 2157 * @param dev 2158 * Pointer to Ethernet device. 2159 * 2160 * @return the number of flows not released. 2161 */ 2162 int 2163 mlx5_flow_verify(struct rte_eth_dev *dev) 2164 { 2165 struct priv *priv = dev->data->dev_private; 2166 struct rte_flow *flow; 2167 int ret = 0; 2168 2169 TAILQ_FOREACH(flow, &priv->flows, next) { 2170 DRV_LOG(DEBUG, "port %u flow %p still referenced", 2171 dev->data->port_id, (void *)flow); 2172 ++ret; 2173 } 2174 return ret; 2175 } 2176 2177 /** 2178 * Enable a control flow configured from the control plane. 2179 * 2180 * @param dev 2181 * Pointer to Ethernet device. 2182 * @param eth_spec 2183 * An Ethernet flow spec to apply. 2184 * @param eth_mask 2185 * An Ethernet flow mask to apply. 2186 * @param vlan_spec 2187 * A VLAN flow spec to apply. 2188 * @param vlan_mask 2189 * A VLAN flow mask to apply. 2190 * 2191 * @return 2192 * 0 on success, a negative errno value otherwise and rte_errno is set. 2193 */ 2194 int 2195 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 2196 struct rte_flow_item_eth *eth_spec, 2197 struct rte_flow_item_eth *eth_mask, 2198 struct rte_flow_item_vlan *vlan_spec, 2199 struct rte_flow_item_vlan *vlan_mask) 2200 { 2201 struct priv *priv = dev->data->dev_private; 2202 const struct rte_flow_attr attr = { 2203 .ingress = 1, 2204 .priority = MLX5_FLOW_PRIO_RSVD, 2205 }; 2206 struct rte_flow_item items[] = { 2207 { 2208 .type = RTE_FLOW_ITEM_TYPE_ETH, 2209 .spec = eth_spec, 2210 .last = NULL, 2211 .mask = eth_mask, 2212 }, 2213 { 2214 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 2215 RTE_FLOW_ITEM_TYPE_END, 2216 .spec = vlan_spec, 2217 .last = NULL, 2218 .mask = vlan_mask, 2219 }, 2220 { 2221 .type = RTE_FLOW_ITEM_TYPE_END, 2222 }, 2223 }; 2224 uint16_t queue[priv->reta_idx_n]; 2225 struct rte_flow_action_rss action_rss = { 2226 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 2227 .level = 0, 2228 .types = priv->rss_conf.rss_hf, 2229 .key_len = priv->rss_conf.rss_key_len, 2230 .queue_num = priv->reta_idx_n, 2231 .key = priv->rss_conf.rss_key, 2232 .queue = queue, 2233 }; 2234 struct rte_flow_action actions[] = { 2235 { 2236 .type = RTE_FLOW_ACTION_TYPE_RSS, 2237 .conf = &action_rss, 2238 }, 2239 { 2240 .type = RTE_FLOW_ACTION_TYPE_END, 2241 }, 2242 }; 2243 struct rte_flow *flow; 2244 struct rte_flow_error error; 2245 unsigned int i; 2246 2247 if (!priv->reta_idx_n) { 2248 rte_errno = EINVAL; 2249 return -rte_errno; 2250 } 2251 for (i = 0; i != priv->reta_idx_n; ++i) 2252 queue[i] = (*priv->reta_idx)[i]; 2253 flow = mlx5_flow_list_create(dev, &priv->ctrl_flows, &attr, items, 2254 actions, &error); 2255 if (!flow) 2256 return -rte_errno; 2257 return 0; 2258 } 2259 2260 /** 2261 * Enable a flow control configured from the control plane. 2262 * 2263 * @param dev 2264 * Pointer to Ethernet device. 2265 * @param eth_spec 2266 * An Ethernet flow spec to apply. 2267 * @param eth_mask 2268 * An Ethernet flow mask to apply. 2269 * 2270 * @return 2271 * 0 on success, a negative errno value otherwise and rte_errno is set. 2272 */ 2273 int 2274 mlx5_ctrl_flow(struct rte_eth_dev *dev, 2275 struct rte_flow_item_eth *eth_spec, 2276 struct rte_flow_item_eth *eth_mask) 2277 { 2278 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 2279 } 2280 2281 /** 2282 * Destroy a flow. 2283 * 2284 * @see rte_flow_destroy() 2285 * @see rte_flow_ops 2286 */ 2287 int 2288 mlx5_flow_destroy(struct rte_eth_dev *dev, 2289 struct rte_flow *flow, 2290 struct rte_flow_error *error __rte_unused) 2291 { 2292 struct priv *priv = dev->data->dev_private; 2293 2294 mlx5_flow_list_destroy(dev, &priv->flows, flow); 2295 return 0; 2296 } 2297 2298 /** 2299 * Destroy all flows. 2300 * 2301 * @see rte_flow_flush() 2302 * @see rte_flow_ops 2303 */ 2304 int 2305 mlx5_flow_flush(struct rte_eth_dev *dev, 2306 struct rte_flow_error *error __rte_unused) 2307 { 2308 struct priv *priv = dev->data->dev_private; 2309 2310 mlx5_flow_list_flush(dev, &priv->flows); 2311 return 0; 2312 } 2313 2314 /** 2315 * Isolated mode. 2316 * 2317 * @see rte_flow_isolate() 2318 * @see rte_flow_ops 2319 */ 2320 int 2321 mlx5_flow_isolate(struct rte_eth_dev *dev, 2322 int enable, 2323 struct rte_flow_error *error) 2324 { 2325 struct priv *priv = dev->data->dev_private; 2326 2327 if (dev->data->dev_started) { 2328 rte_flow_error_set(error, EBUSY, 2329 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2330 NULL, 2331 "port must be stopped first"); 2332 return -rte_errno; 2333 } 2334 priv->isolated = !!enable; 2335 if (enable) 2336 dev->dev_ops = &mlx5_dev_ops_isolate; 2337 else 2338 dev->dev_ops = &mlx5_dev_ops; 2339 return 0; 2340 } 2341 2342 /** 2343 * Query flow counter. 2344 * 2345 * @param flow 2346 * Pointer to the flow. 2347 * 2348 * @return 2349 * 0 on success, a negative errno value otherwise and rte_errno is set. 2350 */ 2351 static int 2352 mlx5_flow_query_count(struct rte_flow *flow __rte_unused, 2353 void *data __rte_unused, 2354 struct rte_flow_error *error) 2355 { 2356 #ifdef HAVE_IBV_DEVICE_COUNTERS_SET_SUPPORT 2357 if (flow->actions & MLX5_FLOW_ACTION_COUNT) { 2358 struct rte_flow_query_count *qc = data; 2359 uint64_t counters[2] = {0, 0}; 2360 struct ibv_query_counter_set_attr query_cs_attr = { 2361 .cs = flow->counter->cs, 2362 .query_flags = IBV_COUNTER_SET_FORCE_UPDATE, 2363 }; 2364 struct ibv_counter_set_data query_out = { 2365 .out = counters, 2366 .outlen = 2 * sizeof(uint64_t), 2367 }; 2368 int err = mlx5_glue->query_counter_set(&query_cs_attr, 2369 &query_out); 2370 2371 if (err) 2372 return rte_flow_error_set 2373 (error, err, 2374 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2375 NULL, 2376 "cannot read counter"); 2377 qc->hits_set = 1; 2378 qc->bytes_set = 1; 2379 qc->hits = counters[0] - flow->counter->hits; 2380 qc->bytes = counters[1] - flow->counter->bytes; 2381 if (qc->reset) { 2382 flow->counter->hits = counters[0]; 2383 flow->counter->bytes = counters[1]; 2384 } 2385 return 0; 2386 } 2387 return rte_flow_error_set(error, EINVAL, 2388 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2389 NULL, 2390 "flow does not have counter"); 2391 #endif 2392 return rte_flow_error_set(error, ENOTSUP, 2393 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2394 NULL, 2395 "counters are not available"); 2396 } 2397 2398 /** 2399 * Query a flows. 2400 * 2401 * @see rte_flow_query() 2402 * @see rte_flow_ops 2403 */ 2404 int 2405 mlx5_flow_query(struct rte_eth_dev *dev __rte_unused, 2406 struct rte_flow *flow, 2407 const struct rte_flow_action *actions, 2408 void *data, 2409 struct rte_flow_error *error) 2410 { 2411 int ret = 0; 2412 2413 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 2414 switch (actions->type) { 2415 case RTE_FLOW_ACTION_TYPE_VOID: 2416 break; 2417 case RTE_FLOW_ACTION_TYPE_COUNT: 2418 ret = mlx5_flow_query_count(flow, data, error); 2419 break; 2420 default: 2421 return rte_flow_error_set(error, ENOTSUP, 2422 RTE_FLOW_ERROR_TYPE_ACTION, 2423 actions, 2424 "action not supported"); 2425 } 2426 if (ret < 0) 2427 return ret; 2428 } 2429 return 0; 2430 } 2431 2432 /** 2433 * Convert a flow director filter to a generic flow. 2434 * 2435 * @param dev 2436 * Pointer to Ethernet device. 2437 * @param fdir_filter 2438 * Flow director filter to add. 2439 * @param attributes 2440 * Generic flow parameters structure. 2441 * 2442 * @return 2443 * 0 on success, a negative errno value otherwise and rte_errno is set. 2444 */ 2445 static int 2446 mlx5_fdir_filter_convert(struct rte_eth_dev *dev, 2447 const struct rte_eth_fdir_filter *fdir_filter, 2448 struct mlx5_fdir *attributes) 2449 { 2450 struct priv *priv = dev->data->dev_private; 2451 const struct rte_eth_fdir_input *input = &fdir_filter->input; 2452 const struct rte_eth_fdir_masks *mask = 2453 &dev->data->dev_conf.fdir_conf.mask; 2454 2455 /* Validate queue number. */ 2456 if (fdir_filter->action.rx_queue >= priv->rxqs_n) { 2457 DRV_LOG(ERR, "port %u invalid queue number %d", 2458 dev->data->port_id, fdir_filter->action.rx_queue); 2459 rte_errno = EINVAL; 2460 return -rte_errno; 2461 } 2462 attributes->attr.ingress = 1; 2463 attributes->items[0] = (struct rte_flow_item) { 2464 .type = RTE_FLOW_ITEM_TYPE_ETH, 2465 .spec = &attributes->l2, 2466 .mask = &attributes->l2_mask, 2467 }; 2468 switch (fdir_filter->action.behavior) { 2469 case RTE_ETH_FDIR_ACCEPT: 2470 attributes->actions[0] = (struct rte_flow_action){ 2471 .type = RTE_FLOW_ACTION_TYPE_QUEUE, 2472 .conf = &attributes->queue, 2473 }; 2474 break; 2475 case RTE_ETH_FDIR_REJECT: 2476 attributes->actions[0] = (struct rte_flow_action){ 2477 .type = RTE_FLOW_ACTION_TYPE_DROP, 2478 }; 2479 break; 2480 default: 2481 DRV_LOG(ERR, "port %u invalid behavior %d", 2482 dev->data->port_id, 2483 fdir_filter->action.behavior); 2484 rte_errno = ENOTSUP; 2485 return -rte_errno; 2486 } 2487 attributes->queue.index = fdir_filter->action.rx_queue; 2488 /* Handle L3. */ 2489 switch (fdir_filter->input.flow_type) { 2490 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2491 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2492 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2493 attributes->l3.ipv4.hdr = (struct ipv4_hdr){ 2494 .src_addr = input->flow.ip4_flow.src_ip, 2495 .dst_addr = input->flow.ip4_flow.dst_ip, 2496 .time_to_live = input->flow.ip4_flow.ttl, 2497 .type_of_service = input->flow.ip4_flow.tos, 2498 }; 2499 attributes->l3_mask.ipv4.hdr = (struct ipv4_hdr){ 2500 .src_addr = mask->ipv4_mask.src_ip, 2501 .dst_addr = mask->ipv4_mask.dst_ip, 2502 .time_to_live = mask->ipv4_mask.ttl, 2503 .type_of_service = mask->ipv4_mask.tos, 2504 .next_proto_id = mask->ipv4_mask.proto, 2505 }; 2506 attributes->items[1] = (struct rte_flow_item){ 2507 .type = RTE_FLOW_ITEM_TYPE_IPV4, 2508 .spec = &attributes->l3, 2509 .mask = &attributes->l3_mask, 2510 }; 2511 break; 2512 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2513 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2514 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2515 attributes->l3.ipv6.hdr = (struct ipv6_hdr){ 2516 .hop_limits = input->flow.ipv6_flow.hop_limits, 2517 .proto = input->flow.ipv6_flow.proto, 2518 }; 2519 2520 memcpy(attributes->l3.ipv6.hdr.src_addr, 2521 input->flow.ipv6_flow.src_ip, 2522 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2523 memcpy(attributes->l3.ipv6.hdr.dst_addr, 2524 input->flow.ipv6_flow.dst_ip, 2525 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2526 memcpy(attributes->l3_mask.ipv6.hdr.src_addr, 2527 mask->ipv6_mask.src_ip, 2528 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2529 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr, 2530 mask->ipv6_mask.dst_ip, 2531 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2532 attributes->items[1] = (struct rte_flow_item){ 2533 .type = RTE_FLOW_ITEM_TYPE_IPV6, 2534 .spec = &attributes->l3, 2535 .mask = &attributes->l3_mask, 2536 }; 2537 break; 2538 default: 2539 DRV_LOG(ERR, "port %u invalid flow type%d", 2540 dev->data->port_id, fdir_filter->input.flow_type); 2541 rte_errno = ENOTSUP; 2542 return -rte_errno; 2543 } 2544 /* Handle L4. */ 2545 switch (fdir_filter->input.flow_type) { 2546 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2547 attributes->l4.udp.hdr = (struct udp_hdr){ 2548 .src_port = input->flow.udp4_flow.src_port, 2549 .dst_port = input->flow.udp4_flow.dst_port, 2550 }; 2551 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2552 .src_port = mask->src_port_mask, 2553 .dst_port = mask->dst_port_mask, 2554 }; 2555 attributes->items[2] = (struct rte_flow_item){ 2556 .type = RTE_FLOW_ITEM_TYPE_UDP, 2557 .spec = &attributes->l4, 2558 .mask = &attributes->l4_mask, 2559 }; 2560 break; 2561 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2562 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2563 .src_port = input->flow.tcp4_flow.src_port, 2564 .dst_port = input->flow.tcp4_flow.dst_port, 2565 }; 2566 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2567 .src_port = mask->src_port_mask, 2568 .dst_port = mask->dst_port_mask, 2569 }; 2570 attributes->items[2] = (struct rte_flow_item){ 2571 .type = RTE_FLOW_ITEM_TYPE_TCP, 2572 .spec = &attributes->l4, 2573 .mask = &attributes->l4_mask, 2574 }; 2575 break; 2576 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2577 attributes->l4.udp.hdr = (struct udp_hdr){ 2578 .src_port = input->flow.udp6_flow.src_port, 2579 .dst_port = input->flow.udp6_flow.dst_port, 2580 }; 2581 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2582 .src_port = mask->src_port_mask, 2583 .dst_port = mask->dst_port_mask, 2584 }; 2585 attributes->items[2] = (struct rte_flow_item){ 2586 .type = RTE_FLOW_ITEM_TYPE_UDP, 2587 .spec = &attributes->l4, 2588 .mask = &attributes->l4_mask, 2589 }; 2590 break; 2591 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2592 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2593 .src_port = input->flow.tcp6_flow.src_port, 2594 .dst_port = input->flow.tcp6_flow.dst_port, 2595 }; 2596 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2597 .src_port = mask->src_port_mask, 2598 .dst_port = mask->dst_port_mask, 2599 }; 2600 attributes->items[2] = (struct rte_flow_item){ 2601 .type = RTE_FLOW_ITEM_TYPE_TCP, 2602 .spec = &attributes->l4, 2603 .mask = &attributes->l4_mask, 2604 }; 2605 break; 2606 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2607 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2608 break; 2609 default: 2610 DRV_LOG(ERR, "port %u invalid flow type%d", 2611 dev->data->port_id, fdir_filter->input.flow_type); 2612 rte_errno = ENOTSUP; 2613 return -rte_errno; 2614 } 2615 return 0; 2616 } 2617 2618 /** 2619 * Add new flow director filter and store it in list. 2620 * 2621 * @param dev 2622 * Pointer to Ethernet device. 2623 * @param fdir_filter 2624 * Flow director filter to add. 2625 * 2626 * @return 2627 * 0 on success, a negative errno value otherwise and rte_errno is set. 2628 */ 2629 static int 2630 mlx5_fdir_filter_add(struct rte_eth_dev *dev, 2631 const struct rte_eth_fdir_filter *fdir_filter) 2632 { 2633 struct priv *priv = dev->data->dev_private; 2634 struct mlx5_fdir attributes = { 2635 .attr.group = 0, 2636 .l2_mask = { 2637 .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00", 2638 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 2639 .type = 0, 2640 }, 2641 }; 2642 struct rte_flow_error error; 2643 struct rte_flow *flow; 2644 int ret; 2645 2646 ret = mlx5_fdir_filter_convert(dev, fdir_filter, &attributes); 2647 if (ret) 2648 return ret; 2649 flow = mlx5_flow_list_create(dev, &priv->flows, &attributes.attr, 2650 attributes.items, attributes.actions, 2651 &error); 2652 if (flow) { 2653 DRV_LOG(DEBUG, "port %u FDIR created %p", dev->data->port_id, 2654 (void *)flow); 2655 return 0; 2656 } 2657 return -rte_errno; 2658 } 2659 2660 /** 2661 * Delete specific filter. 2662 * 2663 * @param dev 2664 * Pointer to Ethernet device. 2665 * @param fdir_filter 2666 * Filter to be deleted. 2667 * 2668 * @return 2669 * 0 on success, a negative errno value otherwise and rte_errno is set. 2670 */ 2671 static int 2672 mlx5_fdir_filter_delete(struct rte_eth_dev *dev __rte_unused, 2673 const struct rte_eth_fdir_filter *fdir_filter 2674 __rte_unused) 2675 { 2676 rte_errno = ENOTSUP; 2677 return -rte_errno; 2678 } 2679 2680 /** 2681 * Update queue for specific filter. 2682 * 2683 * @param dev 2684 * Pointer to Ethernet device. 2685 * @param fdir_filter 2686 * Filter to be updated. 2687 * 2688 * @return 2689 * 0 on success, a negative errno value otherwise and rte_errno is set. 2690 */ 2691 static int 2692 mlx5_fdir_filter_update(struct rte_eth_dev *dev, 2693 const struct rte_eth_fdir_filter *fdir_filter) 2694 { 2695 int ret; 2696 2697 ret = mlx5_fdir_filter_delete(dev, fdir_filter); 2698 if (ret) 2699 return ret; 2700 return mlx5_fdir_filter_add(dev, fdir_filter); 2701 } 2702 2703 /** 2704 * Flush all filters. 2705 * 2706 * @param dev 2707 * Pointer to Ethernet device. 2708 */ 2709 static void 2710 mlx5_fdir_filter_flush(struct rte_eth_dev *dev) 2711 { 2712 struct priv *priv = dev->data->dev_private; 2713 2714 mlx5_flow_list_flush(dev, &priv->flows); 2715 } 2716 2717 /** 2718 * Get flow director information. 2719 * 2720 * @param dev 2721 * Pointer to Ethernet device. 2722 * @param[out] fdir_info 2723 * Resulting flow director information. 2724 */ 2725 static void 2726 mlx5_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info) 2727 { 2728 struct rte_eth_fdir_masks *mask = 2729 &dev->data->dev_conf.fdir_conf.mask; 2730 2731 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode; 2732 fdir_info->guarant_spc = 0; 2733 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask)); 2734 fdir_info->max_flexpayload = 0; 2735 fdir_info->flow_types_mask[0] = 0; 2736 fdir_info->flex_payload_unit = 0; 2737 fdir_info->max_flex_payload_segment_num = 0; 2738 fdir_info->flex_payload_limit = 0; 2739 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf)); 2740 } 2741 2742 /** 2743 * Deal with flow director operations. 2744 * 2745 * @param dev 2746 * Pointer to Ethernet device. 2747 * @param filter_op 2748 * Operation to perform. 2749 * @param arg 2750 * Pointer to operation-specific structure. 2751 * 2752 * @return 2753 * 0 on success, a negative errno value otherwise and rte_errno is set. 2754 */ 2755 static int 2756 mlx5_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op, 2757 void *arg) 2758 { 2759 enum rte_fdir_mode fdir_mode = 2760 dev->data->dev_conf.fdir_conf.mode; 2761 2762 if (filter_op == RTE_ETH_FILTER_NOP) 2763 return 0; 2764 if (fdir_mode != RTE_FDIR_MODE_PERFECT && 2765 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) { 2766 DRV_LOG(ERR, "port %u flow director mode %d not supported", 2767 dev->data->port_id, fdir_mode); 2768 rte_errno = EINVAL; 2769 return -rte_errno; 2770 } 2771 switch (filter_op) { 2772 case RTE_ETH_FILTER_ADD: 2773 return mlx5_fdir_filter_add(dev, arg); 2774 case RTE_ETH_FILTER_UPDATE: 2775 return mlx5_fdir_filter_update(dev, arg); 2776 case RTE_ETH_FILTER_DELETE: 2777 return mlx5_fdir_filter_delete(dev, arg); 2778 case RTE_ETH_FILTER_FLUSH: 2779 mlx5_fdir_filter_flush(dev); 2780 break; 2781 case RTE_ETH_FILTER_INFO: 2782 mlx5_fdir_info_get(dev, arg); 2783 break; 2784 default: 2785 DRV_LOG(DEBUG, "port %u unknown operation %u", 2786 dev->data->port_id, filter_op); 2787 rte_errno = EINVAL; 2788 return -rte_errno; 2789 } 2790 return 0; 2791 } 2792 2793 /** 2794 * Manage filter operations. 2795 * 2796 * @param dev 2797 * Pointer to Ethernet device structure. 2798 * @param filter_type 2799 * Filter type. 2800 * @param filter_op 2801 * Operation to perform. 2802 * @param arg 2803 * Pointer to operation-specific structure. 2804 * 2805 * @return 2806 * 0 on success, a negative errno value otherwise and rte_errno is set. 2807 */ 2808 int 2809 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 2810 enum rte_filter_type filter_type, 2811 enum rte_filter_op filter_op, 2812 void *arg) 2813 { 2814 switch (filter_type) { 2815 case RTE_ETH_FILTER_GENERIC: 2816 if (filter_op != RTE_ETH_FILTER_GET) { 2817 rte_errno = EINVAL; 2818 return -rte_errno; 2819 } 2820 *(const void **)arg = &mlx5_flow_ops; 2821 return 0; 2822 case RTE_ETH_FILTER_FDIR: 2823 return mlx5_fdir_ctrl_func(dev, filter_op, arg); 2824 default: 2825 DRV_LOG(ERR, "port %u filter type (%d) not supported", 2826 dev->data->port_id, filter_type); 2827 rte_errno = ENOTSUP; 2828 return -rte_errno; 2829 } 2830 return 0; 2831 } 2832