1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <netinet/in.h> 7 #include <sys/queue.h> 8 #include <stdalign.h> 9 #include <stdint.h> 10 #include <string.h> 11 12 /* Verbs header. */ 13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 14 #ifdef PEDANTIC 15 #pragma GCC diagnostic ignored "-Wpedantic" 16 #endif 17 #include <infiniband/verbs.h> 18 #ifdef PEDANTIC 19 #pragma GCC diagnostic error "-Wpedantic" 20 #endif 21 22 #include <rte_common.h> 23 #include <rte_ether.h> 24 #include <rte_eth_ctrl.h> 25 #include <rte_ethdev_driver.h> 26 #include <rte_flow.h> 27 #include <rte_flow_driver.h> 28 #include <rte_malloc.h> 29 #include <rte_ip.h> 30 31 #include "mlx5.h" 32 #include "mlx5_defs.h" 33 #include "mlx5_prm.h" 34 #include "mlx5_glue.h" 35 #include "mlx5_flow.h" 36 37 /* Dev ops structure defined in mlx5.c */ 38 extern const struct eth_dev_ops mlx5_dev_ops; 39 extern const struct eth_dev_ops mlx5_dev_ops_isolate; 40 41 /** Device flow drivers. */ 42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops; 44 #endif 45 extern const struct mlx5_flow_driver_ops mlx5_flow_tcf_drv_ops; 46 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 47 48 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 49 50 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 51 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 52 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 53 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 54 #endif 55 [MLX5_FLOW_TYPE_TCF] = &mlx5_flow_tcf_drv_ops, 56 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 57 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 58 }; 59 60 enum mlx5_expansion { 61 MLX5_EXPANSION_ROOT, 62 MLX5_EXPANSION_ROOT_OUTER, 63 MLX5_EXPANSION_ROOT_ETH_VLAN, 64 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 65 MLX5_EXPANSION_OUTER_ETH, 66 MLX5_EXPANSION_OUTER_ETH_VLAN, 67 MLX5_EXPANSION_OUTER_VLAN, 68 MLX5_EXPANSION_OUTER_IPV4, 69 MLX5_EXPANSION_OUTER_IPV4_UDP, 70 MLX5_EXPANSION_OUTER_IPV4_TCP, 71 MLX5_EXPANSION_OUTER_IPV6, 72 MLX5_EXPANSION_OUTER_IPV6_UDP, 73 MLX5_EXPANSION_OUTER_IPV6_TCP, 74 MLX5_EXPANSION_VXLAN, 75 MLX5_EXPANSION_VXLAN_GPE, 76 MLX5_EXPANSION_GRE, 77 MLX5_EXPANSION_MPLS, 78 MLX5_EXPANSION_ETH, 79 MLX5_EXPANSION_ETH_VLAN, 80 MLX5_EXPANSION_VLAN, 81 MLX5_EXPANSION_IPV4, 82 MLX5_EXPANSION_IPV4_UDP, 83 MLX5_EXPANSION_IPV4_TCP, 84 MLX5_EXPANSION_IPV6, 85 MLX5_EXPANSION_IPV6_UDP, 86 MLX5_EXPANSION_IPV6_TCP, 87 }; 88 89 /** Supported expansion of items. */ 90 static const struct rte_flow_expand_node mlx5_support_expansion[] = { 91 [MLX5_EXPANSION_ROOT] = { 92 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 93 MLX5_EXPANSION_IPV4, 94 MLX5_EXPANSION_IPV6), 95 .type = RTE_FLOW_ITEM_TYPE_END, 96 }, 97 [MLX5_EXPANSION_ROOT_OUTER] = { 98 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 99 MLX5_EXPANSION_OUTER_IPV4, 100 MLX5_EXPANSION_OUTER_IPV6), 101 .type = RTE_FLOW_ITEM_TYPE_END, 102 }, 103 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 104 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 105 .type = RTE_FLOW_ITEM_TYPE_END, 106 }, 107 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 108 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN), 109 .type = RTE_FLOW_ITEM_TYPE_END, 110 }, 111 [MLX5_EXPANSION_OUTER_ETH] = { 112 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 113 MLX5_EXPANSION_OUTER_IPV6, 114 MLX5_EXPANSION_MPLS), 115 .type = RTE_FLOW_ITEM_TYPE_ETH, 116 .rss_types = 0, 117 }, 118 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 119 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 120 .type = RTE_FLOW_ITEM_TYPE_ETH, 121 .rss_types = 0, 122 }, 123 [MLX5_EXPANSION_OUTER_VLAN] = { 124 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 125 MLX5_EXPANSION_OUTER_IPV6), 126 .type = RTE_FLOW_ITEM_TYPE_VLAN, 127 }, 128 [MLX5_EXPANSION_OUTER_IPV4] = { 129 .next = RTE_FLOW_EXPAND_RSS_NEXT 130 (MLX5_EXPANSION_OUTER_IPV4_UDP, 131 MLX5_EXPANSION_OUTER_IPV4_TCP, 132 MLX5_EXPANSION_GRE), 133 .type = RTE_FLOW_ITEM_TYPE_IPV4, 134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 135 ETH_RSS_NONFRAG_IPV4_OTHER, 136 }, 137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 139 MLX5_EXPANSION_VXLAN_GPE), 140 .type = RTE_FLOW_ITEM_TYPE_UDP, 141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 142 }, 143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 144 .type = RTE_FLOW_ITEM_TYPE_TCP, 145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 146 }, 147 [MLX5_EXPANSION_OUTER_IPV6] = { 148 .next = RTE_FLOW_EXPAND_RSS_NEXT 149 (MLX5_EXPANSION_OUTER_IPV6_UDP, 150 MLX5_EXPANSION_OUTER_IPV6_TCP), 151 .type = RTE_FLOW_ITEM_TYPE_IPV6, 152 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 153 ETH_RSS_NONFRAG_IPV6_OTHER, 154 }, 155 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 156 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 157 MLX5_EXPANSION_VXLAN_GPE), 158 .type = RTE_FLOW_ITEM_TYPE_UDP, 159 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 160 }, 161 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 162 .type = RTE_FLOW_ITEM_TYPE_TCP, 163 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 164 }, 165 [MLX5_EXPANSION_VXLAN] = { 166 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 167 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 168 }, 169 [MLX5_EXPANSION_VXLAN_GPE] = { 170 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 171 MLX5_EXPANSION_IPV4, 172 MLX5_EXPANSION_IPV6), 173 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 174 }, 175 [MLX5_EXPANSION_GRE] = { 176 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4), 177 .type = RTE_FLOW_ITEM_TYPE_GRE, 178 }, 179 [MLX5_EXPANSION_MPLS] = { 180 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 181 MLX5_EXPANSION_IPV6), 182 .type = RTE_FLOW_ITEM_TYPE_MPLS, 183 }, 184 [MLX5_EXPANSION_ETH] = { 185 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 186 MLX5_EXPANSION_IPV6), 187 .type = RTE_FLOW_ITEM_TYPE_ETH, 188 }, 189 [MLX5_EXPANSION_ETH_VLAN] = { 190 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 191 .type = RTE_FLOW_ITEM_TYPE_ETH, 192 }, 193 [MLX5_EXPANSION_VLAN] = { 194 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 195 MLX5_EXPANSION_IPV6), 196 .type = RTE_FLOW_ITEM_TYPE_VLAN, 197 }, 198 [MLX5_EXPANSION_IPV4] = { 199 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 200 MLX5_EXPANSION_IPV4_TCP), 201 .type = RTE_FLOW_ITEM_TYPE_IPV4, 202 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 203 ETH_RSS_NONFRAG_IPV4_OTHER, 204 }, 205 [MLX5_EXPANSION_IPV4_UDP] = { 206 .type = RTE_FLOW_ITEM_TYPE_UDP, 207 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 208 }, 209 [MLX5_EXPANSION_IPV4_TCP] = { 210 .type = RTE_FLOW_ITEM_TYPE_TCP, 211 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 212 }, 213 [MLX5_EXPANSION_IPV6] = { 214 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 215 MLX5_EXPANSION_IPV6_TCP), 216 .type = RTE_FLOW_ITEM_TYPE_IPV6, 217 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 218 ETH_RSS_NONFRAG_IPV6_OTHER, 219 }, 220 [MLX5_EXPANSION_IPV6_UDP] = { 221 .type = RTE_FLOW_ITEM_TYPE_UDP, 222 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 223 }, 224 [MLX5_EXPANSION_IPV6_TCP] = { 225 .type = RTE_FLOW_ITEM_TYPE_TCP, 226 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 227 }, 228 }; 229 230 static const struct rte_flow_ops mlx5_flow_ops = { 231 .validate = mlx5_flow_validate, 232 .create = mlx5_flow_create, 233 .destroy = mlx5_flow_destroy, 234 .flush = mlx5_flow_flush, 235 .isolate = mlx5_flow_isolate, 236 .query = mlx5_flow_query, 237 }; 238 239 /* Convert FDIR request to Generic flow. */ 240 struct mlx5_fdir { 241 struct rte_flow_attr attr; 242 struct rte_flow_action actions[2]; 243 struct rte_flow_item items[4]; 244 struct rte_flow_item_eth l2; 245 struct rte_flow_item_eth l2_mask; 246 union { 247 struct rte_flow_item_ipv4 ipv4; 248 struct rte_flow_item_ipv6 ipv6; 249 } l3; 250 union { 251 struct rte_flow_item_ipv4 ipv4; 252 struct rte_flow_item_ipv6 ipv6; 253 } l3_mask; 254 union { 255 struct rte_flow_item_udp udp; 256 struct rte_flow_item_tcp tcp; 257 } l4; 258 union { 259 struct rte_flow_item_udp udp; 260 struct rte_flow_item_tcp tcp; 261 } l4_mask; 262 struct rte_flow_action_queue queue; 263 }; 264 265 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 266 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 267 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 268 }; 269 270 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 271 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 272 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 273 { 9, 10, 11 }, { 12, 13, 14 }, 274 }; 275 276 /* Tunnel information. */ 277 struct mlx5_flow_tunnel_info { 278 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 279 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 280 }; 281 282 static struct mlx5_flow_tunnel_info tunnels_info[] = { 283 { 284 .tunnel = MLX5_FLOW_LAYER_VXLAN, 285 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 286 }, 287 { 288 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 289 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 290 }, 291 { 292 .tunnel = MLX5_FLOW_LAYER_GRE, 293 .ptype = RTE_PTYPE_TUNNEL_GRE, 294 }, 295 { 296 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 297 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE | RTE_PTYPE_L4_UDP, 298 }, 299 { 300 .tunnel = MLX5_FLOW_LAYER_MPLS, 301 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 302 }, 303 }; 304 305 /** 306 * Discover the maximum number of priority available. 307 * 308 * @param[in] dev 309 * Pointer to the Ethernet device structure. 310 * 311 * @return 312 * number of supported flow priority on success, a negative errno 313 * value otherwise and rte_errno is set. 314 */ 315 int 316 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 317 { 318 struct { 319 struct ibv_flow_attr attr; 320 struct ibv_flow_spec_eth eth; 321 struct ibv_flow_spec_action_drop drop; 322 } flow_attr = { 323 .attr = { 324 .num_of_specs = 2, 325 }, 326 .eth = { 327 .type = IBV_FLOW_SPEC_ETH, 328 .size = sizeof(struct ibv_flow_spec_eth), 329 }, 330 .drop = { 331 .size = sizeof(struct ibv_flow_spec_action_drop), 332 .type = IBV_FLOW_SPEC_ACTION_DROP, 333 }, 334 }; 335 struct ibv_flow *flow; 336 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev); 337 uint16_t vprio[] = { 8, 16 }; 338 int i; 339 int priority = 0; 340 341 if (!drop) { 342 rte_errno = ENOTSUP; 343 return -rte_errno; 344 } 345 for (i = 0; i != RTE_DIM(vprio); i++) { 346 flow_attr.attr.priority = vprio[i] - 1; 347 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr); 348 if (!flow) 349 break; 350 claim_zero(mlx5_glue->destroy_flow(flow)); 351 priority = vprio[i]; 352 } 353 switch (priority) { 354 case 8: 355 priority = RTE_DIM(priority_map_3); 356 break; 357 case 16: 358 priority = RTE_DIM(priority_map_5); 359 break; 360 default: 361 rte_errno = ENOTSUP; 362 DRV_LOG(ERR, 363 "port %u verbs maximum priority: %d expected 8/16", 364 dev->data->port_id, vprio[i]); 365 return -rte_errno; 366 } 367 mlx5_hrxq_drop_release(dev); 368 DRV_LOG(INFO, "port %u flow maximum priority: %d", 369 dev->data->port_id, priority); 370 return priority; 371 } 372 373 /** 374 * Adjust flow priority based on the highest layer and the request priority. 375 * 376 * @param[in] dev 377 * Pointer to the Ethernet device structure. 378 * @param[in] priority 379 * The rule base priority. 380 * @param[in] subpriority 381 * The priority based on the items. 382 * 383 * @return 384 * The new priority. 385 */ 386 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 387 uint32_t subpriority) 388 { 389 uint32_t res = 0; 390 struct priv *priv = dev->data->dev_private; 391 392 switch (priv->config.flow_prio) { 393 case RTE_DIM(priority_map_3): 394 res = priority_map_3[priority][subpriority]; 395 break; 396 case RTE_DIM(priority_map_5): 397 res = priority_map_5[priority][subpriority]; 398 break; 399 } 400 return res; 401 } 402 403 /** 404 * Verify the @p item specifications (spec, last, mask) are compatible with the 405 * NIC capabilities. 406 * 407 * @param[in] item 408 * Item specification. 409 * @param[in] mask 410 * @p item->mask or flow default bit-masks. 411 * @param[in] nic_mask 412 * Bit-masks covering supported fields by the NIC to compare with user mask. 413 * @param[in] size 414 * Bit-masks size in bytes. 415 * @param[out] error 416 * Pointer to error structure. 417 * 418 * @return 419 * 0 on success, a negative errno value otherwise and rte_errno is set. 420 */ 421 int 422 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 423 const uint8_t *mask, 424 const uint8_t *nic_mask, 425 unsigned int size, 426 struct rte_flow_error *error) 427 { 428 unsigned int i; 429 430 assert(nic_mask); 431 for (i = 0; i < size; ++i) 432 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 433 return rte_flow_error_set(error, ENOTSUP, 434 RTE_FLOW_ERROR_TYPE_ITEM, 435 item, 436 "mask enables non supported" 437 " bits"); 438 if (!item->spec && (item->mask || item->last)) 439 return rte_flow_error_set(error, EINVAL, 440 RTE_FLOW_ERROR_TYPE_ITEM, item, 441 "mask/last without a spec is not" 442 " supported"); 443 if (item->spec && item->last) { 444 uint8_t spec[size]; 445 uint8_t last[size]; 446 unsigned int i; 447 int ret; 448 449 for (i = 0; i < size; ++i) { 450 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 451 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 452 } 453 ret = memcmp(spec, last, size); 454 if (ret != 0) 455 return rte_flow_error_set(error, EINVAL, 456 RTE_FLOW_ERROR_TYPE_ITEM, 457 item, 458 "range is not valid"); 459 } 460 return 0; 461 } 462 463 /** 464 * Adjust the hash fields according to the @p flow information. 465 * 466 * @param[in] dev_flow. 467 * Pointer to the mlx5_flow. 468 * @param[in] tunnel 469 * 1 when the hash field is for a tunnel item. 470 * @param[in] layer_types 471 * ETH_RSS_* types. 472 * @param[in] hash_fields 473 * Item hash fields. 474 * 475 * @return 476 * The hash fileds that should be used. 477 */ 478 uint64_t 479 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, 480 int tunnel __rte_unused, uint64_t layer_types, 481 uint64_t hash_fields) 482 { 483 struct rte_flow *flow = dev_flow->flow; 484 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 485 int rss_request_inner = flow->rss.level >= 2; 486 487 /* Check RSS hash level for tunnel. */ 488 if (tunnel && rss_request_inner) 489 hash_fields |= IBV_RX_HASH_INNER; 490 else if (tunnel || rss_request_inner) 491 return 0; 492 #endif 493 /* Check if requested layer matches RSS hash fields. */ 494 if (!(flow->rss.types & layer_types)) 495 return 0; 496 return hash_fields; 497 } 498 499 /** 500 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 501 * if several tunnel rules are used on this queue, the tunnel ptype will be 502 * cleared. 503 * 504 * @param rxq_ctrl 505 * Rx queue to update. 506 */ 507 static void 508 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 509 { 510 unsigned int i; 511 uint32_t tunnel_ptype = 0; 512 513 /* Look up for the ptype to use. */ 514 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 515 if (!rxq_ctrl->flow_tunnels_n[i]) 516 continue; 517 if (!tunnel_ptype) { 518 tunnel_ptype = tunnels_info[i].ptype; 519 } else { 520 tunnel_ptype = 0; 521 break; 522 } 523 } 524 rxq_ctrl->rxq.tunnel = tunnel_ptype; 525 } 526 527 /** 528 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 529 * flow. 530 * 531 * @param[in] dev 532 * Pointer to the Ethernet device structure. 533 * @param[in] dev_flow 534 * Pointer to device flow structure. 535 */ 536 static void 537 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 538 { 539 struct priv *priv = dev->data->dev_private; 540 struct rte_flow *flow = dev_flow->flow; 541 const int mark = !!(flow->actions & 542 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 543 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 544 unsigned int i; 545 546 for (i = 0; i != flow->rss.queue_num; ++i) { 547 int idx = (*flow->queue)[i]; 548 struct mlx5_rxq_ctrl *rxq_ctrl = 549 container_of((*priv->rxqs)[idx], 550 struct mlx5_rxq_ctrl, rxq); 551 552 if (mark) { 553 rxq_ctrl->rxq.mark = 1; 554 rxq_ctrl->flow_mark_n++; 555 } 556 if (tunnel) { 557 unsigned int j; 558 559 /* Increase the counter matching the flow. */ 560 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 561 if ((tunnels_info[j].tunnel & 562 dev_flow->layers) == 563 tunnels_info[j].tunnel) { 564 rxq_ctrl->flow_tunnels_n[j]++; 565 break; 566 } 567 } 568 flow_rxq_tunnel_ptype_update(rxq_ctrl); 569 } 570 } 571 } 572 573 /** 574 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 575 * 576 * @param[in] dev 577 * Pointer to the Ethernet device structure. 578 * @param[in] flow 579 * Pointer to flow structure. 580 */ 581 static void 582 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 583 { 584 struct mlx5_flow *dev_flow; 585 586 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 587 flow_drv_rxq_flags_set(dev, dev_flow); 588 } 589 590 /** 591 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 592 * device flow if no other flow uses it with the same kind of request. 593 * 594 * @param dev 595 * Pointer to Ethernet device. 596 * @param[in] dev_flow 597 * Pointer to the device flow. 598 */ 599 static void 600 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow) 601 { 602 struct priv *priv = dev->data->dev_private; 603 struct rte_flow *flow = dev_flow->flow; 604 const int mark = !!(flow->actions & 605 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK)); 606 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL); 607 unsigned int i; 608 609 assert(dev->data->dev_started); 610 for (i = 0; i != flow->rss.queue_num; ++i) { 611 int idx = (*flow->queue)[i]; 612 struct mlx5_rxq_ctrl *rxq_ctrl = 613 container_of((*priv->rxqs)[idx], 614 struct mlx5_rxq_ctrl, rxq); 615 616 if (mark) { 617 rxq_ctrl->flow_mark_n--; 618 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 619 } 620 if (tunnel) { 621 unsigned int j; 622 623 /* Decrease the counter matching the flow. */ 624 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 625 if ((tunnels_info[j].tunnel & 626 dev_flow->layers) == 627 tunnels_info[j].tunnel) { 628 rxq_ctrl->flow_tunnels_n[j]--; 629 break; 630 } 631 } 632 flow_rxq_tunnel_ptype_update(rxq_ctrl); 633 } 634 } 635 } 636 637 /** 638 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 639 * @p flow if no other flow uses it with the same kind of request. 640 * 641 * @param dev 642 * Pointer to Ethernet device. 643 * @param[in] flow 644 * Pointer to the flow. 645 */ 646 static void 647 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 648 { 649 struct mlx5_flow *dev_flow; 650 651 LIST_FOREACH(dev_flow, &flow->dev_flows, next) 652 flow_drv_rxq_flags_trim(dev, dev_flow); 653 } 654 655 /** 656 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 657 * 658 * @param dev 659 * Pointer to Ethernet device. 660 */ 661 static void 662 flow_rxq_flags_clear(struct rte_eth_dev *dev) 663 { 664 struct priv *priv = dev->data->dev_private; 665 unsigned int i; 666 667 for (i = 0; i != priv->rxqs_n; ++i) { 668 struct mlx5_rxq_ctrl *rxq_ctrl; 669 unsigned int j; 670 671 if (!(*priv->rxqs)[i]) 672 continue; 673 rxq_ctrl = container_of((*priv->rxqs)[i], 674 struct mlx5_rxq_ctrl, rxq); 675 rxq_ctrl->flow_mark_n = 0; 676 rxq_ctrl->rxq.mark = 0; 677 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 678 rxq_ctrl->flow_tunnels_n[j] = 0; 679 rxq_ctrl->rxq.tunnel = 0; 680 } 681 } 682 683 /* 684 * Validate the flag action. 685 * 686 * @param[in] action_flags 687 * Bit-fields that holds the actions detected until now. 688 * @param[in] attr 689 * Attributes of flow that includes this action. 690 * @param[out] error 691 * Pointer to error structure. 692 * 693 * @return 694 * 0 on success, a negative errno value otherwise and rte_errno is set. 695 */ 696 int 697 mlx5_flow_validate_action_flag(uint64_t action_flags, 698 const struct rte_flow_attr *attr, 699 struct rte_flow_error *error) 700 { 701 702 if (action_flags & MLX5_FLOW_ACTION_DROP) 703 return rte_flow_error_set(error, EINVAL, 704 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 705 "can't drop and flag in same flow"); 706 if (action_flags & MLX5_FLOW_ACTION_MARK) 707 return rte_flow_error_set(error, EINVAL, 708 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 709 "can't mark and flag in same flow"); 710 if (action_flags & MLX5_FLOW_ACTION_FLAG) 711 return rte_flow_error_set(error, EINVAL, 712 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 713 "can't have 2 flag" 714 " actions in same flow"); 715 if (attr->egress) 716 return rte_flow_error_set(error, ENOTSUP, 717 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 718 "flag action not supported for " 719 "egress"); 720 return 0; 721 } 722 723 /* 724 * Validate the mark action. 725 * 726 * @param[in] action 727 * Pointer to the queue action. 728 * @param[in] action_flags 729 * Bit-fields that holds the actions detected until now. 730 * @param[in] attr 731 * Attributes of flow that includes this action. 732 * @param[out] error 733 * Pointer to error structure. 734 * 735 * @return 736 * 0 on success, a negative errno value otherwise and rte_errno is set. 737 */ 738 int 739 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 740 uint64_t action_flags, 741 const struct rte_flow_attr *attr, 742 struct rte_flow_error *error) 743 { 744 const struct rte_flow_action_mark *mark = action->conf; 745 746 if (!mark) 747 return rte_flow_error_set(error, EINVAL, 748 RTE_FLOW_ERROR_TYPE_ACTION, 749 action, 750 "configuration cannot be null"); 751 if (mark->id >= MLX5_FLOW_MARK_MAX) 752 return rte_flow_error_set(error, EINVAL, 753 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 754 &mark->id, 755 "mark id must in 0 <= id < " 756 RTE_STR(MLX5_FLOW_MARK_MAX)); 757 if (action_flags & MLX5_FLOW_ACTION_DROP) 758 return rte_flow_error_set(error, EINVAL, 759 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 760 "can't drop and mark in same flow"); 761 if (action_flags & MLX5_FLOW_ACTION_FLAG) 762 return rte_flow_error_set(error, EINVAL, 763 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 764 "can't flag and mark in same flow"); 765 if (action_flags & MLX5_FLOW_ACTION_MARK) 766 return rte_flow_error_set(error, EINVAL, 767 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 768 "can't have 2 mark actions in same" 769 " flow"); 770 if (attr->egress) 771 return rte_flow_error_set(error, ENOTSUP, 772 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 773 "mark action not supported for " 774 "egress"); 775 return 0; 776 } 777 778 /* 779 * Validate the drop action. 780 * 781 * @param[in] action_flags 782 * Bit-fields that holds the actions detected until now. 783 * @param[in] attr 784 * Attributes of flow that includes this action. 785 * @param[out] error 786 * Pointer to error structure. 787 * 788 * @return 789 * 0 on success, a negative errno value otherwise and rte_ernno is set. 790 */ 791 int 792 mlx5_flow_validate_action_drop(uint64_t action_flags, 793 const struct rte_flow_attr *attr, 794 struct rte_flow_error *error) 795 { 796 if (action_flags & MLX5_FLOW_ACTION_FLAG) 797 return rte_flow_error_set(error, EINVAL, 798 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 799 "can't drop and flag in same flow"); 800 if (action_flags & MLX5_FLOW_ACTION_MARK) 801 return rte_flow_error_set(error, EINVAL, 802 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 803 "can't drop and mark in same flow"); 804 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 805 return rte_flow_error_set(error, EINVAL, 806 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 807 "can't have 2 fate actions in" 808 " same flow"); 809 if (attr->egress) 810 return rte_flow_error_set(error, ENOTSUP, 811 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 812 "drop action not supported for " 813 "egress"); 814 return 0; 815 } 816 817 /* 818 * Validate the queue action. 819 * 820 * @param[in] action 821 * Pointer to the queue action. 822 * @param[in] action_flags 823 * Bit-fields that holds the actions detected until now. 824 * @param[in] dev 825 * Pointer to the Ethernet device structure. 826 * @param[in] attr 827 * Attributes of flow that includes this action. 828 * @param[out] error 829 * Pointer to error structure. 830 * 831 * @return 832 * 0 on success, a negative errno value otherwise and rte_ernno is set. 833 */ 834 int 835 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 836 uint64_t action_flags, 837 struct rte_eth_dev *dev, 838 const struct rte_flow_attr *attr, 839 struct rte_flow_error *error) 840 { 841 struct priv *priv = dev->data->dev_private; 842 const struct rte_flow_action_queue *queue = action->conf; 843 844 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 845 return rte_flow_error_set(error, EINVAL, 846 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 847 "can't have 2 fate actions in" 848 " same flow"); 849 if (queue->index >= priv->rxqs_n) 850 return rte_flow_error_set(error, EINVAL, 851 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 852 &queue->index, 853 "queue index out of range"); 854 if (!(*priv->rxqs)[queue->index]) 855 return rte_flow_error_set(error, EINVAL, 856 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 857 &queue->index, 858 "queue is not configured"); 859 if (attr->egress) 860 return rte_flow_error_set(error, ENOTSUP, 861 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 862 "queue action not supported for " 863 "egress"); 864 return 0; 865 } 866 867 /* 868 * Validate the rss action. 869 * 870 * @param[in] action 871 * Pointer to the queue action. 872 * @param[in] action_flags 873 * Bit-fields that holds the actions detected until now. 874 * @param[in] dev 875 * Pointer to the Ethernet device structure. 876 * @param[in] attr 877 * Attributes of flow that includes this action. 878 * @param[out] error 879 * Pointer to error structure. 880 * 881 * @return 882 * 0 on success, a negative errno value otherwise and rte_ernno is set. 883 */ 884 int 885 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 886 uint64_t action_flags, 887 struct rte_eth_dev *dev, 888 const struct rte_flow_attr *attr, 889 struct rte_flow_error *error) 890 { 891 struct priv *priv = dev->data->dev_private; 892 const struct rte_flow_action_rss *rss = action->conf; 893 unsigned int i; 894 895 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 896 return rte_flow_error_set(error, EINVAL, 897 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 898 "can't have 2 fate actions" 899 " in same flow"); 900 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 901 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 902 return rte_flow_error_set(error, ENOTSUP, 903 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 904 &rss->func, 905 "RSS hash function not supported"); 906 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 907 if (rss->level > 2) 908 #else 909 if (rss->level > 1) 910 #endif 911 return rte_flow_error_set(error, ENOTSUP, 912 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 913 &rss->level, 914 "tunnel RSS is not supported"); 915 if (rss->key_len < MLX5_RSS_HASH_KEY_LEN) 916 return rte_flow_error_set(error, ENOTSUP, 917 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 918 &rss->key_len, 919 "RSS hash key too small"); 920 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 921 return rte_flow_error_set(error, ENOTSUP, 922 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 923 &rss->key_len, 924 "RSS hash key too large"); 925 if (rss->queue_num > priv->config.ind_table_max_size) 926 return rte_flow_error_set(error, ENOTSUP, 927 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 928 &rss->queue_num, 929 "number of queues too large"); 930 if (rss->types & MLX5_RSS_HF_MASK) 931 return rte_flow_error_set(error, ENOTSUP, 932 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 933 &rss->types, 934 "some RSS protocols are not" 935 " supported"); 936 for (i = 0; i != rss->queue_num; ++i) { 937 if (!(*priv->rxqs)[rss->queue[i]]) 938 return rte_flow_error_set 939 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 940 &rss->queue[i], "queue is not configured"); 941 } 942 if (attr->egress) 943 return rte_flow_error_set(error, ENOTSUP, 944 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 945 "rss action not supported for " 946 "egress"); 947 return 0; 948 } 949 950 /* 951 * Validate the count action. 952 * 953 * @param[in] dev 954 * Pointer to the Ethernet device structure. 955 * @param[in] attr 956 * Attributes of flow that includes this action. 957 * @param[out] error 958 * Pointer to error structure. 959 * 960 * @return 961 * 0 on success, a negative errno value otherwise and rte_ernno is set. 962 */ 963 int 964 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 965 const struct rte_flow_attr *attr, 966 struct rte_flow_error *error) 967 { 968 if (attr->egress) 969 return rte_flow_error_set(error, ENOTSUP, 970 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 971 "count action not supported for " 972 "egress"); 973 return 0; 974 } 975 976 /** 977 * Verify the @p attributes will be correctly understood by the NIC and store 978 * them in the @p flow if everything is correct. 979 * 980 * @param[in] dev 981 * Pointer to the Ethernet device structure. 982 * @param[in] attributes 983 * Pointer to flow attributes 984 * @param[out] error 985 * Pointer to error structure. 986 * 987 * @return 988 * 0 on success, a negative errno value otherwise and rte_errno is set. 989 */ 990 int 991 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 992 const struct rte_flow_attr *attributes, 993 struct rte_flow_error *error) 994 { 995 struct priv *priv = dev->data->dev_private; 996 uint32_t priority_max = priv->config.flow_prio - 1; 997 998 if (attributes->group) 999 return rte_flow_error_set(error, ENOTSUP, 1000 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1001 NULL, "groups is not supported"); 1002 if (attributes->priority != MLX5_FLOW_PRIO_RSVD && 1003 attributes->priority >= priority_max) 1004 return rte_flow_error_set(error, ENOTSUP, 1005 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1006 NULL, "priority out of range"); 1007 if (attributes->egress) 1008 return rte_flow_error_set(error, ENOTSUP, 1009 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1010 "egress is not supported"); 1011 if (attributes->transfer) 1012 return rte_flow_error_set(error, ENOTSUP, 1013 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1014 NULL, "transfer is not supported"); 1015 if (!attributes->ingress) 1016 return rte_flow_error_set(error, EINVAL, 1017 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1018 NULL, 1019 "ingress attribute is mandatory"); 1020 return 0; 1021 } 1022 1023 /** 1024 * Validate Ethernet item. 1025 * 1026 * @param[in] item 1027 * Item specification. 1028 * @param[in] item_flags 1029 * Bit-fields that holds the items detected until now. 1030 * @param[out] error 1031 * Pointer to error structure. 1032 * 1033 * @return 1034 * 0 on success, a negative errno value otherwise and rte_errno is set. 1035 */ 1036 int 1037 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1038 uint64_t item_flags, 1039 struct rte_flow_error *error) 1040 { 1041 const struct rte_flow_item_eth *mask = item->mask; 1042 const struct rte_flow_item_eth nic_mask = { 1043 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1044 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1045 .type = RTE_BE16(0xffff), 1046 }; 1047 int ret; 1048 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1049 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1050 MLX5_FLOW_LAYER_OUTER_L2; 1051 1052 if (item_flags & ethm) 1053 return rte_flow_error_set(error, ENOTSUP, 1054 RTE_FLOW_ERROR_TYPE_ITEM, item, 1055 "multiple L2 layers not supported"); 1056 if (!mask) 1057 mask = &rte_flow_item_eth_mask; 1058 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1059 (const uint8_t *)&nic_mask, 1060 sizeof(struct rte_flow_item_eth), 1061 error); 1062 return ret; 1063 } 1064 1065 /** 1066 * Validate VLAN item. 1067 * 1068 * @param[in] item 1069 * Item specification. 1070 * @param[in] item_flags 1071 * Bit-fields that holds the items detected until now. 1072 * @param[out] error 1073 * Pointer to error structure. 1074 * 1075 * @return 1076 * 0 on success, a negative errno value otherwise and rte_errno is set. 1077 */ 1078 int 1079 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1080 uint64_t item_flags, 1081 struct rte_flow_error *error) 1082 { 1083 const struct rte_flow_item_vlan *spec = item->spec; 1084 const struct rte_flow_item_vlan *mask = item->mask; 1085 const struct rte_flow_item_vlan nic_mask = { 1086 .tci = RTE_BE16(0x0fff), 1087 .inner_type = RTE_BE16(0xffff), 1088 }; 1089 uint16_t vlan_tag = 0; 1090 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1091 int ret; 1092 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1093 MLX5_FLOW_LAYER_INNER_L4) : 1094 (MLX5_FLOW_LAYER_OUTER_L3 | 1095 MLX5_FLOW_LAYER_OUTER_L4); 1096 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1097 MLX5_FLOW_LAYER_OUTER_VLAN; 1098 1099 if (item_flags & vlanm) 1100 return rte_flow_error_set(error, EINVAL, 1101 RTE_FLOW_ERROR_TYPE_ITEM, item, 1102 "multiple VLAN layers not supported"); 1103 else if ((item_flags & l34m) != 0) 1104 return rte_flow_error_set(error, EINVAL, 1105 RTE_FLOW_ERROR_TYPE_ITEM, item, 1106 "L2 layer cannot follow L3/L4 layer"); 1107 if (!mask) 1108 mask = &rte_flow_item_vlan_mask; 1109 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1110 (const uint8_t *)&nic_mask, 1111 sizeof(struct rte_flow_item_vlan), 1112 error); 1113 if (ret) 1114 return ret; 1115 if (spec) { 1116 vlan_tag = spec->tci; 1117 vlan_tag &= mask->tci; 1118 } 1119 /* 1120 * From verbs perspective an empty VLAN is equivalent 1121 * to a packet without VLAN layer. 1122 */ 1123 if (!vlan_tag) 1124 return rte_flow_error_set(error, EINVAL, 1125 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1126 item->spec, 1127 "VLAN cannot be empty"); 1128 return 0; 1129 } 1130 1131 /** 1132 * Validate IPV4 item. 1133 * 1134 * @param[in] item 1135 * Item specification. 1136 * @param[in] item_flags 1137 * Bit-fields that holds the items detected until now. 1138 * @param[out] error 1139 * Pointer to error structure. 1140 * 1141 * @return 1142 * 0 on success, a negative errno value otherwise and rte_errno is set. 1143 */ 1144 int 1145 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 1146 uint64_t item_flags, 1147 struct rte_flow_error *error) 1148 { 1149 const struct rte_flow_item_ipv4 *mask = item->mask; 1150 const struct rte_flow_item_ipv4 nic_mask = { 1151 .hdr = { 1152 .src_addr = RTE_BE32(0xffffffff), 1153 .dst_addr = RTE_BE32(0xffffffff), 1154 .type_of_service = 0xff, 1155 .next_proto_id = 0xff, 1156 }, 1157 }; 1158 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1159 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1160 MLX5_FLOW_LAYER_OUTER_L3; 1161 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1162 MLX5_FLOW_LAYER_OUTER_L4; 1163 int ret; 1164 1165 if (item_flags & l3m) 1166 return rte_flow_error_set(error, ENOTSUP, 1167 RTE_FLOW_ERROR_TYPE_ITEM, item, 1168 "multiple L3 layers not supported"); 1169 else if (item_flags & l4m) 1170 return rte_flow_error_set(error, EINVAL, 1171 RTE_FLOW_ERROR_TYPE_ITEM, item, 1172 "L3 cannot follow an L4 layer."); 1173 if (!mask) 1174 mask = &rte_flow_item_ipv4_mask; 1175 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1176 (const uint8_t *)&nic_mask, 1177 sizeof(struct rte_flow_item_ipv4), 1178 error); 1179 if (ret < 0) 1180 return ret; 1181 return 0; 1182 } 1183 1184 /** 1185 * Validate IPV6 item. 1186 * 1187 * @param[in] item 1188 * Item specification. 1189 * @param[in] item_flags 1190 * Bit-fields that holds the items detected until now. 1191 * @param[out] error 1192 * Pointer to error structure. 1193 * 1194 * @return 1195 * 0 on success, a negative errno value otherwise and rte_errno is set. 1196 */ 1197 int 1198 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 1199 uint64_t item_flags, 1200 struct rte_flow_error *error) 1201 { 1202 const struct rte_flow_item_ipv6 *mask = item->mask; 1203 const struct rte_flow_item_ipv6 nic_mask = { 1204 .hdr = { 1205 .src_addr = 1206 "\xff\xff\xff\xff\xff\xff\xff\xff" 1207 "\xff\xff\xff\xff\xff\xff\xff\xff", 1208 .dst_addr = 1209 "\xff\xff\xff\xff\xff\xff\xff\xff" 1210 "\xff\xff\xff\xff\xff\xff\xff\xff", 1211 .vtc_flow = RTE_BE32(0xffffffff), 1212 .proto = 0xff, 1213 .hop_limits = 0xff, 1214 }, 1215 }; 1216 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1217 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1218 MLX5_FLOW_LAYER_OUTER_L3; 1219 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1220 MLX5_FLOW_LAYER_OUTER_L4; 1221 int ret; 1222 1223 if (item_flags & l3m) 1224 return rte_flow_error_set(error, ENOTSUP, 1225 RTE_FLOW_ERROR_TYPE_ITEM, item, 1226 "multiple L3 layers not supported"); 1227 else if (item_flags & l4m) 1228 return rte_flow_error_set(error, EINVAL, 1229 RTE_FLOW_ERROR_TYPE_ITEM, item, 1230 "L3 cannot follow an L4 layer."); 1231 /* 1232 * IPv6 is not recognised by the NIC inside a GRE tunnel. 1233 * Such support has to be disabled as the rule will be 1234 * accepted. Issue reproduced with Mellanox OFED 4.3-3.0.2.1 and 1235 * Mellanox OFED 4.4-1.0.0.0. 1236 */ 1237 if (tunnel && item_flags & MLX5_FLOW_LAYER_GRE) 1238 return rte_flow_error_set(error, ENOTSUP, 1239 RTE_FLOW_ERROR_TYPE_ITEM, item, 1240 "IPv6 inside a GRE tunnel is" 1241 " not recognised."); 1242 if (!mask) 1243 mask = &rte_flow_item_ipv6_mask; 1244 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1245 (const uint8_t *)&nic_mask, 1246 sizeof(struct rte_flow_item_ipv6), 1247 error); 1248 if (ret < 0) 1249 return ret; 1250 return 0; 1251 } 1252 1253 /** 1254 * Validate UDP item. 1255 * 1256 * @param[in] item 1257 * Item specification. 1258 * @param[in] item_flags 1259 * Bit-fields that holds the items detected until now. 1260 * @param[in] target_protocol 1261 * The next protocol in the previous item. 1262 * @param[in] flow_mask 1263 * mlx5 flow-specific (TCF, DV, verbs, etc.) supported header fields mask. 1264 * @param[out] error 1265 * Pointer to error structure. 1266 * 1267 * @return 1268 * 0 on success, a negative errno value otherwise and rte_errno is set. 1269 */ 1270 int 1271 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 1272 uint64_t item_flags, 1273 uint8_t target_protocol, 1274 struct rte_flow_error *error) 1275 { 1276 const struct rte_flow_item_udp *mask = item->mask; 1277 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1278 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1279 MLX5_FLOW_LAYER_OUTER_L3; 1280 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1281 MLX5_FLOW_LAYER_OUTER_L4; 1282 int ret; 1283 1284 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 1285 return rte_flow_error_set(error, EINVAL, 1286 RTE_FLOW_ERROR_TYPE_ITEM, item, 1287 "protocol filtering not compatible" 1288 " with UDP layer"); 1289 if (!(item_flags & l3m)) 1290 return rte_flow_error_set(error, EINVAL, 1291 RTE_FLOW_ERROR_TYPE_ITEM, item, 1292 "L3 is mandatory to filter on L4"); 1293 if (item_flags & l4m) 1294 return rte_flow_error_set(error, EINVAL, 1295 RTE_FLOW_ERROR_TYPE_ITEM, item, 1296 "multiple L4 layers not supported"); 1297 if (!mask) 1298 mask = &rte_flow_item_udp_mask; 1299 ret = mlx5_flow_item_acceptable 1300 (item, (const uint8_t *)mask, 1301 (const uint8_t *)&rte_flow_item_udp_mask, 1302 sizeof(struct rte_flow_item_udp), error); 1303 if (ret < 0) 1304 return ret; 1305 return 0; 1306 } 1307 1308 /** 1309 * Validate TCP item. 1310 * 1311 * @param[in] item 1312 * Item specification. 1313 * @param[in] item_flags 1314 * Bit-fields that holds the items detected until now. 1315 * @param[in] target_protocol 1316 * The next protocol in the previous item. 1317 * @param[out] error 1318 * Pointer to error structure. 1319 * 1320 * @return 1321 * 0 on success, a negative errno value otherwise and rte_errno is set. 1322 */ 1323 int 1324 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 1325 uint64_t item_flags, 1326 uint8_t target_protocol, 1327 const struct rte_flow_item_tcp *flow_mask, 1328 struct rte_flow_error *error) 1329 { 1330 const struct rte_flow_item_tcp *mask = item->mask; 1331 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1332 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 1333 MLX5_FLOW_LAYER_OUTER_L3; 1334 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1335 MLX5_FLOW_LAYER_OUTER_L4; 1336 int ret; 1337 1338 assert(flow_mask); 1339 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 1340 return rte_flow_error_set(error, EINVAL, 1341 RTE_FLOW_ERROR_TYPE_ITEM, item, 1342 "protocol filtering not compatible" 1343 " with TCP layer"); 1344 if (!(item_flags & l3m)) 1345 return rte_flow_error_set(error, EINVAL, 1346 RTE_FLOW_ERROR_TYPE_ITEM, item, 1347 "L3 is mandatory to filter on L4"); 1348 if (item_flags & l4m) 1349 return rte_flow_error_set(error, EINVAL, 1350 RTE_FLOW_ERROR_TYPE_ITEM, item, 1351 "multiple L4 layers not supported"); 1352 if (!mask) 1353 mask = &rte_flow_item_tcp_mask; 1354 ret = mlx5_flow_item_acceptable 1355 (item, (const uint8_t *)mask, 1356 (const uint8_t *)flow_mask, 1357 sizeof(struct rte_flow_item_tcp), error); 1358 if (ret < 0) 1359 return ret; 1360 return 0; 1361 } 1362 1363 /** 1364 * Validate VXLAN item. 1365 * 1366 * @param[in] item 1367 * Item specification. 1368 * @param[in] item_flags 1369 * Bit-fields that holds the items detected until now. 1370 * @param[in] target_protocol 1371 * The next protocol in the previous item. 1372 * @param[out] error 1373 * Pointer to error structure. 1374 * 1375 * @return 1376 * 0 on success, a negative errno value otherwise and rte_errno is set. 1377 */ 1378 int 1379 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 1380 uint64_t item_flags, 1381 struct rte_flow_error *error) 1382 { 1383 const struct rte_flow_item_vxlan *spec = item->spec; 1384 const struct rte_flow_item_vxlan *mask = item->mask; 1385 int ret; 1386 union vni { 1387 uint32_t vlan_id; 1388 uint8_t vni[4]; 1389 } id = { .vlan_id = 0, }; 1390 uint32_t vlan_id = 0; 1391 1392 1393 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1394 return rte_flow_error_set(error, ENOTSUP, 1395 RTE_FLOW_ERROR_TYPE_ITEM, item, 1396 "multiple tunnel layers not" 1397 " supported"); 1398 /* 1399 * Verify only UDPv4 is present as defined in 1400 * https://tools.ietf.org/html/rfc7348 1401 */ 1402 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1403 return rte_flow_error_set(error, EINVAL, 1404 RTE_FLOW_ERROR_TYPE_ITEM, item, 1405 "no outer UDP layer found"); 1406 if (!mask) 1407 mask = &rte_flow_item_vxlan_mask; 1408 ret = mlx5_flow_item_acceptable 1409 (item, (const uint8_t *)mask, 1410 (const uint8_t *)&rte_flow_item_vxlan_mask, 1411 sizeof(struct rte_flow_item_vxlan), 1412 error); 1413 if (ret < 0) 1414 return ret; 1415 if (spec) { 1416 memcpy(&id.vni[1], spec->vni, 3); 1417 vlan_id = id.vlan_id; 1418 memcpy(&id.vni[1], mask->vni, 3); 1419 vlan_id &= id.vlan_id; 1420 } 1421 /* 1422 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if 1423 * only this layer is defined in the Verbs specification it is 1424 * interpreted as wildcard and all packets will match this 1425 * rule, if it follows a full stack layer (ex: eth / ipv4 / 1426 * udp), all packets matching the layers before will also 1427 * match this rule. To avoid such situation, VNI 0 is 1428 * currently refused. 1429 */ 1430 if (!vlan_id) 1431 return rte_flow_error_set(error, ENOTSUP, 1432 RTE_FLOW_ERROR_TYPE_ITEM, item, 1433 "VXLAN vni cannot be 0"); 1434 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1435 return rte_flow_error_set(error, ENOTSUP, 1436 RTE_FLOW_ERROR_TYPE_ITEM, item, 1437 "VXLAN tunnel must be fully defined"); 1438 return 0; 1439 } 1440 1441 /** 1442 * Validate VXLAN_GPE item. 1443 * 1444 * @param[in] item 1445 * Item specification. 1446 * @param[in] item_flags 1447 * Bit-fields that holds the items detected until now. 1448 * @param[in] priv 1449 * Pointer to the private data structure. 1450 * @param[in] target_protocol 1451 * The next protocol in the previous item. 1452 * @param[out] error 1453 * Pointer to error structure. 1454 * 1455 * @return 1456 * 0 on success, a negative errno value otherwise and rte_errno is set. 1457 */ 1458 int 1459 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 1460 uint64_t item_flags, 1461 struct rte_eth_dev *dev, 1462 struct rte_flow_error *error) 1463 { 1464 struct priv *priv = dev->data->dev_private; 1465 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 1466 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 1467 int ret; 1468 union vni { 1469 uint32_t vlan_id; 1470 uint8_t vni[4]; 1471 } id = { .vlan_id = 0, }; 1472 uint32_t vlan_id = 0; 1473 1474 if (!priv->config.l3_vxlan_en) 1475 return rte_flow_error_set(error, ENOTSUP, 1476 RTE_FLOW_ERROR_TYPE_ITEM, item, 1477 "L3 VXLAN is not enabled by device" 1478 " parameter and/or not configured in" 1479 " firmware"); 1480 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1481 return rte_flow_error_set(error, ENOTSUP, 1482 RTE_FLOW_ERROR_TYPE_ITEM, item, 1483 "multiple tunnel layers not" 1484 " supported"); 1485 /* 1486 * Verify only UDPv4 is present as defined in 1487 * https://tools.ietf.org/html/rfc7348 1488 */ 1489 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 1490 return rte_flow_error_set(error, EINVAL, 1491 RTE_FLOW_ERROR_TYPE_ITEM, item, 1492 "no outer UDP layer found"); 1493 if (!mask) 1494 mask = &rte_flow_item_vxlan_gpe_mask; 1495 ret = mlx5_flow_item_acceptable 1496 (item, (const uint8_t *)mask, 1497 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 1498 sizeof(struct rte_flow_item_vxlan_gpe), 1499 error); 1500 if (ret < 0) 1501 return ret; 1502 if (spec) { 1503 if (spec->protocol) 1504 return rte_flow_error_set(error, ENOTSUP, 1505 RTE_FLOW_ERROR_TYPE_ITEM, 1506 item, 1507 "VxLAN-GPE protocol" 1508 " not supported"); 1509 memcpy(&id.vni[1], spec->vni, 3); 1510 vlan_id = id.vlan_id; 1511 memcpy(&id.vni[1], mask->vni, 3); 1512 vlan_id &= id.vlan_id; 1513 } 1514 /* 1515 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this 1516 * layer is defined in the Verbs specification it is interpreted as 1517 * wildcard and all packets will match this rule, if it follows a full 1518 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers 1519 * before will also match this rule. To avoid such situation, VNI 0 1520 * is currently refused. 1521 */ 1522 if (!vlan_id) 1523 return rte_flow_error_set(error, ENOTSUP, 1524 RTE_FLOW_ERROR_TYPE_ITEM, item, 1525 "VXLAN-GPE vni cannot be 0"); 1526 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 1527 return rte_flow_error_set(error, ENOTSUP, 1528 RTE_FLOW_ERROR_TYPE_ITEM, item, 1529 "VXLAN-GPE tunnel must be fully" 1530 " defined"); 1531 return 0; 1532 } 1533 1534 /** 1535 * Validate GRE item. 1536 * 1537 * @param[in] item 1538 * Item specification. 1539 * @param[in] item_flags 1540 * Bit flags to mark detected items. 1541 * @param[in] target_protocol 1542 * The next protocol in the previous item. 1543 * @param[out] error 1544 * Pointer to error structure. 1545 * 1546 * @return 1547 * 0 on success, a negative errno value otherwise and rte_errno is set. 1548 */ 1549 int 1550 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 1551 uint64_t item_flags, 1552 uint8_t target_protocol, 1553 struct rte_flow_error *error) 1554 { 1555 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 1556 const struct rte_flow_item_gre *mask = item->mask; 1557 int ret; 1558 1559 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 1560 return rte_flow_error_set(error, EINVAL, 1561 RTE_FLOW_ERROR_TYPE_ITEM, item, 1562 "protocol filtering not compatible" 1563 " with this GRE layer"); 1564 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1565 return rte_flow_error_set(error, ENOTSUP, 1566 RTE_FLOW_ERROR_TYPE_ITEM, item, 1567 "multiple tunnel layers not" 1568 " supported"); 1569 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 1570 return rte_flow_error_set(error, ENOTSUP, 1571 RTE_FLOW_ERROR_TYPE_ITEM, item, 1572 "L3 Layer is missing"); 1573 if (!mask) 1574 mask = &rte_flow_item_gre_mask; 1575 ret = mlx5_flow_item_acceptable 1576 (item, (const uint8_t *)mask, 1577 (const uint8_t *)&rte_flow_item_gre_mask, 1578 sizeof(struct rte_flow_item_gre), error); 1579 if (ret < 0) 1580 return ret; 1581 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 1582 if (spec && (spec->protocol & mask->protocol)) 1583 return rte_flow_error_set(error, ENOTSUP, 1584 RTE_FLOW_ERROR_TYPE_ITEM, item, 1585 "without MPLS support the" 1586 " specification cannot be used for" 1587 " filtering"); 1588 #endif 1589 return 0; 1590 } 1591 1592 /** 1593 * Validate MPLS item. 1594 * 1595 * @param[in] item 1596 * Item specification. 1597 * @param[in] item_flags 1598 * Bit-fields that holds the items detected until now. 1599 * @param[in] target_protocol 1600 * The next protocol in the previous item. 1601 * @param[out] error 1602 * Pointer to error structure. 1603 * 1604 * @return 1605 * 0 on success, a negative errno value otherwise and rte_errno is set. 1606 */ 1607 int 1608 mlx5_flow_validate_item_mpls(const struct rte_flow_item *item __rte_unused, 1609 uint64_t item_flags __rte_unused, 1610 uint8_t target_protocol __rte_unused, 1611 struct rte_flow_error *error) 1612 { 1613 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 1614 const struct rte_flow_item_mpls *mask = item->mask; 1615 int ret; 1616 1617 if (target_protocol != 0xff && target_protocol != IPPROTO_MPLS) 1618 return rte_flow_error_set(error, EINVAL, 1619 RTE_FLOW_ERROR_TYPE_ITEM, item, 1620 "protocol filtering not compatible" 1621 " with MPLS layer"); 1622 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 1623 return rte_flow_error_set(error, ENOTSUP, 1624 RTE_FLOW_ERROR_TYPE_ITEM, item, 1625 "multiple tunnel layers not" 1626 " supported"); 1627 if (!mask) 1628 mask = &rte_flow_item_mpls_mask; 1629 ret = mlx5_flow_item_acceptable 1630 (item, (const uint8_t *)mask, 1631 (const uint8_t *)&rte_flow_item_mpls_mask, 1632 sizeof(struct rte_flow_item_mpls), error); 1633 if (ret < 0) 1634 return ret; 1635 return 0; 1636 #endif 1637 return rte_flow_error_set(error, ENOTSUP, 1638 RTE_FLOW_ERROR_TYPE_ITEM, item, 1639 "MPLS is not supported by Verbs, please" 1640 " update."); 1641 } 1642 1643 static int 1644 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 1645 const struct rte_flow_attr *attr __rte_unused, 1646 const struct rte_flow_item items[] __rte_unused, 1647 const struct rte_flow_action actions[] __rte_unused, 1648 struct rte_flow_error *error __rte_unused) 1649 { 1650 rte_errno = ENOTSUP; 1651 return -rte_errno; 1652 } 1653 1654 static struct mlx5_flow * 1655 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused, 1656 const struct rte_flow_item items[] __rte_unused, 1657 const struct rte_flow_action actions[] __rte_unused, 1658 uint64_t *item_flags __rte_unused, 1659 uint64_t *action_flags __rte_unused, 1660 struct rte_flow_error *error __rte_unused) 1661 { 1662 rte_errno = ENOTSUP; 1663 return NULL; 1664 } 1665 1666 static int 1667 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 1668 struct mlx5_flow *dev_flow __rte_unused, 1669 const struct rte_flow_attr *attr __rte_unused, 1670 const struct rte_flow_item items[] __rte_unused, 1671 const struct rte_flow_action actions[] __rte_unused, 1672 struct rte_flow_error *error __rte_unused) 1673 { 1674 rte_errno = ENOTSUP; 1675 return -rte_errno; 1676 } 1677 1678 static int 1679 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 1680 struct rte_flow *flow __rte_unused, 1681 struct rte_flow_error *error __rte_unused) 1682 { 1683 rte_errno = ENOTSUP; 1684 return -rte_errno; 1685 } 1686 1687 static void 1688 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 1689 struct rte_flow *flow __rte_unused) 1690 { 1691 } 1692 1693 static void 1694 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 1695 struct rte_flow *flow __rte_unused) 1696 { 1697 } 1698 1699 static int 1700 flow_null_query(struct rte_eth_dev *dev __rte_unused, 1701 struct rte_flow *flow __rte_unused, 1702 const struct rte_flow_action *actions __rte_unused, 1703 void *data __rte_unused, 1704 struct rte_flow_error *error __rte_unused) 1705 { 1706 rte_errno = ENOTSUP; 1707 return -rte_errno; 1708 } 1709 1710 /* Void driver to protect from null pointer reference. */ 1711 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 1712 .validate = flow_null_validate, 1713 .prepare = flow_null_prepare, 1714 .translate = flow_null_translate, 1715 .apply = flow_null_apply, 1716 .remove = flow_null_remove, 1717 .destroy = flow_null_destroy, 1718 .query = flow_null_query, 1719 }; 1720 1721 /** 1722 * Select flow driver type according to flow attributes and device 1723 * configuration. 1724 * 1725 * @param[in] dev 1726 * Pointer to the dev structure. 1727 * @param[in] attr 1728 * Pointer to the flow attributes. 1729 * 1730 * @return 1731 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 1732 */ 1733 static enum mlx5_flow_drv_type 1734 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 1735 { 1736 struct priv *priv = dev->data->dev_private; 1737 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX; 1738 1739 if (attr->transfer) 1740 type = MLX5_FLOW_TYPE_TCF; 1741 else 1742 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 1743 MLX5_FLOW_TYPE_VERBS; 1744 return type; 1745 } 1746 1747 #define flow_get_drv_ops(type) flow_drv_ops[type] 1748 1749 /** 1750 * Flow driver validation API. This abstracts calling driver specific functions. 1751 * The type of flow driver is determined according to flow attributes. 1752 * 1753 * @param[in] dev 1754 * Pointer to the dev structure. 1755 * @param[in] attr 1756 * Pointer to the flow attributes. 1757 * @param[in] items 1758 * Pointer to the list of items. 1759 * @param[in] actions 1760 * Pointer to the list of actions. 1761 * @param[out] error 1762 * Pointer to the error structure. 1763 * 1764 * @return 1765 * 0 on success, a negative errno value otherwise and rte_ernno is set. 1766 */ 1767 static inline int 1768 flow_drv_validate(struct rte_eth_dev *dev, 1769 const struct rte_flow_attr *attr, 1770 const struct rte_flow_item items[], 1771 const struct rte_flow_action actions[], 1772 struct rte_flow_error *error) 1773 { 1774 const struct mlx5_flow_driver_ops *fops; 1775 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 1776 1777 fops = flow_get_drv_ops(type); 1778 return fops->validate(dev, attr, items, actions, error); 1779 } 1780 1781 /** 1782 * Flow driver preparation API. This abstracts calling driver specific 1783 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1784 * calculates the size of memory required for device flow, allocates the memory, 1785 * initializes the device flow and returns the pointer. 1786 * 1787 * @param[in] attr 1788 * Pointer to the flow attributes. 1789 * @param[in] items 1790 * Pointer to the list of items. 1791 * @param[in] actions 1792 * Pointer to the list of actions. 1793 * @param[out] item_flags 1794 * Pointer to bit mask of all items detected. 1795 * @param[out] action_flags 1796 * Pointer to bit mask of all actions detected. 1797 * @param[out] error 1798 * Pointer to the error structure. 1799 * 1800 * @return 1801 * Pointer to device flow on success, otherwise NULL and rte_ernno is set. 1802 */ 1803 static inline struct mlx5_flow * 1804 flow_drv_prepare(struct rte_flow *flow, 1805 const struct rte_flow_attr *attr, 1806 const struct rte_flow_item items[], 1807 const struct rte_flow_action actions[], 1808 uint64_t *item_flags, 1809 uint64_t *action_flags, 1810 struct rte_flow_error *error) 1811 { 1812 const struct mlx5_flow_driver_ops *fops; 1813 enum mlx5_flow_drv_type type = flow->drv_type; 1814 1815 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1816 fops = flow_get_drv_ops(type); 1817 return fops->prepare(attr, items, actions, item_flags, action_flags, 1818 error); 1819 } 1820 1821 /** 1822 * Flow driver translation API. This abstracts calling driver specific 1823 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 1824 * translates a generic flow into a driver flow. flow_drv_prepare() must 1825 * precede. 1826 * 1827 * 1828 * @param[in] dev 1829 * Pointer to the rte dev structure. 1830 * @param[in, out] dev_flow 1831 * Pointer to the mlx5 flow. 1832 * @param[in] attr 1833 * Pointer to the flow attributes. 1834 * @param[in] items 1835 * Pointer to the list of items. 1836 * @param[in] actions 1837 * Pointer to the list of actions. 1838 * @param[out] error 1839 * Pointer to the error structure. 1840 * 1841 * @return 1842 * 0 on success, a negative errno value otherwise and rte_ernno is set. 1843 */ 1844 static inline int 1845 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 1846 const struct rte_flow_attr *attr, 1847 const struct rte_flow_item items[], 1848 const struct rte_flow_action actions[], 1849 struct rte_flow_error *error) 1850 { 1851 const struct mlx5_flow_driver_ops *fops; 1852 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 1853 1854 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1855 fops = flow_get_drv_ops(type); 1856 return fops->translate(dev, dev_flow, attr, items, actions, error); 1857 } 1858 1859 /** 1860 * Flow driver apply API. This abstracts calling driver specific functions. 1861 * Parent flow (rte_flow) should have driver type (drv_type). It applies 1862 * translated driver flows on to device. flow_drv_translate() must precede. 1863 * 1864 * @param[in] dev 1865 * Pointer to Ethernet device structure. 1866 * @param[in, out] flow 1867 * Pointer to flow structure. 1868 * @param[out] error 1869 * Pointer to error structure. 1870 * 1871 * @return 1872 * 0 on success, a negative errno value otherwise and rte_errno is set. 1873 */ 1874 static inline int 1875 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 1876 struct rte_flow_error *error) 1877 { 1878 const struct mlx5_flow_driver_ops *fops; 1879 enum mlx5_flow_drv_type type = flow->drv_type; 1880 1881 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1882 fops = flow_get_drv_ops(type); 1883 return fops->apply(dev, flow, error); 1884 } 1885 1886 /** 1887 * Flow driver remove API. This abstracts calling driver specific functions. 1888 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1889 * on device. All the resources of the flow should be freed by calling 1890 * flow_dv_destroy(). 1891 * 1892 * @param[in] dev 1893 * Pointer to Ethernet device. 1894 * @param[in, out] flow 1895 * Pointer to flow structure. 1896 */ 1897 static inline void 1898 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow) 1899 { 1900 const struct mlx5_flow_driver_ops *fops; 1901 enum mlx5_flow_drv_type type = flow->drv_type; 1902 1903 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1904 fops = flow_get_drv_ops(type); 1905 fops->remove(dev, flow); 1906 } 1907 1908 /** 1909 * Flow driver destroy API. This abstracts calling driver specific functions. 1910 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 1911 * on device and releases resources of the flow. 1912 * 1913 * @param[in] dev 1914 * Pointer to Ethernet device. 1915 * @param[in, out] flow 1916 * Pointer to flow structure. 1917 */ 1918 static inline void 1919 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 1920 { 1921 const struct mlx5_flow_driver_ops *fops; 1922 enum mlx5_flow_drv_type type = flow->drv_type; 1923 1924 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 1925 fops = flow_get_drv_ops(type); 1926 fops->destroy(dev, flow); 1927 } 1928 1929 /** 1930 * Validate a flow supported by the NIC. 1931 * 1932 * @see rte_flow_validate() 1933 * @see rte_flow_ops 1934 */ 1935 int 1936 mlx5_flow_validate(struct rte_eth_dev *dev, 1937 const struct rte_flow_attr *attr, 1938 const struct rte_flow_item items[], 1939 const struct rte_flow_action actions[], 1940 struct rte_flow_error *error) 1941 { 1942 int ret; 1943 1944 ret = flow_drv_validate(dev, attr, items, actions, error); 1945 if (ret < 0) 1946 return ret; 1947 return 0; 1948 } 1949 1950 /** 1951 * Get RSS action from the action list. 1952 * 1953 * @param[in] actions 1954 * Pointer to the list of actions. 1955 * 1956 * @return 1957 * Pointer to the RSS action if exist, else return NULL. 1958 */ 1959 static const struct rte_flow_action_rss* 1960 flow_get_rss_action(const struct rte_flow_action actions[]) 1961 { 1962 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 1963 switch (actions->type) { 1964 case RTE_FLOW_ACTION_TYPE_RSS: 1965 return (const struct rte_flow_action_rss *) 1966 actions->conf; 1967 default: 1968 break; 1969 } 1970 } 1971 return NULL; 1972 } 1973 1974 static unsigned int 1975 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 1976 { 1977 const struct rte_flow_item *item; 1978 unsigned int has_vlan = 0; 1979 1980 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 1981 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 1982 has_vlan = 1; 1983 break; 1984 } 1985 } 1986 if (has_vlan) 1987 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 1988 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 1989 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 1990 MLX5_EXPANSION_ROOT_OUTER; 1991 } 1992 1993 /** 1994 * Create a flow and add it to @p list. 1995 * 1996 * @param dev 1997 * Pointer to Ethernet device. 1998 * @param list 1999 * Pointer to a TAILQ flow list. 2000 * @param[in] attr 2001 * Flow rule attributes. 2002 * @param[in] items 2003 * Pattern specification (list terminated by the END pattern item). 2004 * @param[in] actions 2005 * Associated actions (list terminated by the END action). 2006 * @param[out] error 2007 * Perform verbose error reporting if not NULL. 2008 * 2009 * @return 2010 * A flow on success, NULL otherwise and rte_errno is set. 2011 */ 2012 static struct rte_flow * 2013 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list, 2014 const struct rte_flow_attr *attr, 2015 const struct rte_flow_item items[], 2016 const struct rte_flow_action actions[], 2017 struct rte_flow_error *error) 2018 { 2019 struct rte_flow *flow = NULL; 2020 struct mlx5_flow *dev_flow; 2021 uint64_t action_flags = 0; 2022 uint64_t item_flags = 0; 2023 const struct rte_flow_action_rss *rss; 2024 union { 2025 struct rte_flow_expand_rss buf; 2026 uint8_t buffer[2048]; 2027 } expand_buffer; 2028 struct rte_flow_expand_rss *buf = &expand_buffer.buf; 2029 int ret; 2030 uint32_t i; 2031 uint32_t flow_size; 2032 2033 ret = flow_drv_validate(dev, attr, items, actions, error); 2034 if (ret < 0) 2035 return NULL; 2036 flow_size = sizeof(struct rte_flow); 2037 rss = flow_get_rss_action(actions); 2038 if (rss) 2039 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t), 2040 sizeof(void *)); 2041 else 2042 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *)); 2043 flow = rte_calloc(__func__, 1, flow_size, 0); 2044 flow->drv_type = flow_get_drv_type(dev, attr); 2045 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN && 2046 flow->drv_type < MLX5_FLOW_TYPE_MAX); 2047 flow->queue = (void *)(flow + 1); 2048 LIST_INIT(&flow->dev_flows); 2049 if (rss && rss->types) { 2050 unsigned int graph_root; 2051 2052 graph_root = find_graph_root(items, rss->level); 2053 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 2054 items, rss->types, 2055 mlx5_support_expansion, 2056 graph_root); 2057 assert(ret > 0 && 2058 (unsigned int)ret < sizeof(expand_buffer.buffer)); 2059 } else { 2060 buf->entries = 1; 2061 buf->entry[0].pattern = (void *)(uintptr_t)items; 2062 } 2063 for (i = 0; i < buf->entries; ++i) { 2064 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern, 2065 actions, &item_flags, &action_flags, 2066 error); 2067 if (!dev_flow) 2068 goto error; 2069 dev_flow->flow = flow; 2070 dev_flow->layers = item_flags; 2071 /* Store actions once as expanded flows have same actions. */ 2072 if (i == 0) 2073 flow->actions = action_flags; 2074 assert(flow->actions == action_flags); 2075 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next); 2076 ret = flow_drv_translate(dev, dev_flow, attr, 2077 buf->entry[i].pattern, 2078 actions, error); 2079 if (ret < 0) 2080 goto error; 2081 } 2082 if (dev->data->dev_started) { 2083 ret = flow_drv_apply(dev, flow, error); 2084 if (ret < 0) 2085 goto error; 2086 } 2087 TAILQ_INSERT_TAIL(list, flow, next); 2088 flow_rxq_flags_set(dev, flow); 2089 return flow; 2090 error: 2091 ret = rte_errno; /* Save rte_errno before cleanup. */ 2092 assert(flow); 2093 flow_drv_destroy(dev, flow); 2094 rte_free(flow); 2095 rte_errno = ret; /* Restore rte_errno. */ 2096 return NULL; 2097 } 2098 2099 /** 2100 * Create a flow. 2101 * 2102 * @see rte_flow_create() 2103 * @see rte_flow_ops 2104 */ 2105 struct rte_flow * 2106 mlx5_flow_create(struct rte_eth_dev *dev, 2107 const struct rte_flow_attr *attr, 2108 const struct rte_flow_item items[], 2109 const struct rte_flow_action actions[], 2110 struct rte_flow_error *error) 2111 { 2112 return flow_list_create(dev, 2113 &((struct priv *)dev->data->dev_private)->flows, 2114 attr, items, actions, error); 2115 } 2116 2117 /** 2118 * Destroy a flow in a list. 2119 * 2120 * @param dev 2121 * Pointer to Ethernet device. 2122 * @param list 2123 * Pointer to a TAILQ flow list. 2124 * @param[in] flow 2125 * Flow to destroy. 2126 */ 2127 static void 2128 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list, 2129 struct rte_flow *flow) 2130 { 2131 flow_drv_destroy(dev, flow); 2132 TAILQ_REMOVE(list, flow, next); 2133 /* 2134 * Update RX queue flags only if port is started, otherwise it is 2135 * already clean. 2136 */ 2137 if (dev->data->dev_started) 2138 flow_rxq_flags_trim(dev, flow); 2139 rte_free(flow); 2140 } 2141 2142 /** 2143 * Destroy all flows. 2144 * 2145 * @param dev 2146 * Pointer to Ethernet device. 2147 * @param list 2148 * Pointer to a TAILQ flow list. 2149 */ 2150 void 2151 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list) 2152 { 2153 while (!TAILQ_EMPTY(list)) { 2154 struct rte_flow *flow; 2155 2156 flow = TAILQ_FIRST(list); 2157 flow_list_destroy(dev, list, flow); 2158 } 2159 } 2160 2161 /** 2162 * Remove all flows. 2163 * 2164 * @param dev 2165 * Pointer to Ethernet device. 2166 * @param list 2167 * Pointer to a TAILQ flow list. 2168 */ 2169 void 2170 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list) 2171 { 2172 struct rte_flow *flow; 2173 2174 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) 2175 flow_drv_remove(dev, flow); 2176 flow_rxq_flags_clear(dev); 2177 } 2178 2179 /** 2180 * Add all flows. 2181 * 2182 * @param dev 2183 * Pointer to Ethernet device. 2184 * @param list 2185 * Pointer to a TAILQ flow list. 2186 * 2187 * @return 2188 * 0 on success, a negative errno value otherwise and rte_errno is set. 2189 */ 2190 int 2191 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list) 2192 { 2193 struct rte_flow *flow; 2194 struct rte_flow_error error; 2195 int ret = 0; 2196 2197 TAILQ_FOREACH(flow, list, next) { 2198 ret = flow_drv_apply(dev, flow, &error); 2199 if (ret < 0) 2200 goto error; 2201 flow_rxq_flags_set(dev, flow); 2202 } 2203 return 0; 2204 error: 2205 ret = rte_errno; /* Save rte_errno before cleanup. */ 2206 mlx5_flow_stop(dev, list); 2207 rte_errno = ret; /* Restore rte_errno. */ 2208 return -rte_errno; 2209 } 2210 2211 /** 2212 * Verify the flow list is empty 2213 * 2214 * @param dev 2215 * Pointer to Ethernet device. 2216 * 2217 * @return the number of flows not released. 2218 */ 2219 int 2220 mlx5_flow_verify(struct rte_eth_dev *dev) 2221 { 2222 struct priv *priv = dev->data->dev_private; 2223 struct rte_flow *flow; 2224 int ret = 0; 2225 2226 TAILQ_FOREACH(flow, &priv->flows, next) { 2227 DRV_LOG(DEBUG, "port %u flow %p still referenced", 2228 dev->data->port_id, (void *)flow); 2229 ++ret; 2230 } 2231 return ret; 2232 } 2233 2234 /** 2235 * Enable a control flow configured from the control plane. 2236 * 2237 * @param dev 2238 * Pointer to Ethernet device. 2239 * @param eth_spec 2240 * An Ethernet flow spec to apply. 2241 * @param eth_mask 2242 * An Ethernet flow mask to apply. 2243 * @param vlan_spec 2244 * A VLAN flow spec to apply. 2245 * @param vlan_mask 2246 * A VLAN flow mask to apply. 2247 * 2248 * @return 2249 * 0 on success, a negative errno value otherwise and rte_errno is set. 2250 */ 2251 int 2252 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 2253 struct rte_flow_item_eth *eth_spec, 2254 struct rte_flow_item_eth *eth_mask, 2255 struct rte_flow_item_vlan *vlan_spec, 2256 struct rte_flow_item_vlan *vlan_mask) 2257 { 2258 struct priv *priv = dev->data->dev_private; 2259 const struct rte_flow_attr attr = { 2260 .ingress = 1, 2261 .priority = MLX5_FLOW_PRIO_RSVD, 2262 }; 2263 struct rte_flow_item items[] = { 2264 { 2265 .type = RTE_FLOW_ITEM_TYPE_ETH, 2266 .spec = eth_spec, 2267 .last = NULL, 2268 .mask = eth_mask, 2269 }, 2270 { 2271 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 2272 RTE_FLOW_ITEM_TYPE_END, 2273 .spec = vlan_spec, 2274 .last = NULL, 2275 .mask = vlan_mask, 2276 }, 2277 { 2278 .type = RTE_FLOW_ITEM_TYPE_END, 2279 }, 2280 }; 2281 uint16_t queue[priv->reta_idx_n]; 2282 struct rte_flow_action_rss action_rss = { 2283 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 2284 .level = 0, 2285 .types = priv->rss_conf.rss_hf, 2286 .key_len = priv->rss_conf.rss_key_len, 2287 .queue_num = priv->reta_idx_n, 2288 .key = priv->rss_conf.rss_key, 2289 .queue = queue, 2290 }; 2291 struct rte_flow_action actions[] = { 2292 { 2293 .type = RTE_FLOW_ACTION_TYPE_RSS, 2294 .conf = &action_rss, 2295 }, 2296 { 2297 .type = RTE_FLOW_ACTION_TYPE_END, 2298 }, 2299 }; 2300 struct rte_flow *flow; 2301 struct rte_flow_error error; 2302 unsigned int i; 2303 2304 if (!priv->reta_idx_n) { 2305 rte_errno = EINVAL; 2306 return -rte_errno; 2307 } 2308 for (i = 0; i != priv->reta_idx_n; ++i) 2309 queue[i] = (*priv->reta_idx)[i]; 2310 flow = flow_list_create(dev, &priv->ctrl_flows, 2311 &attr, items, actions, &error); 2312 if (!flow) 2313 return -rte_errno; 2314 return 0; 2315 } 2316 2317 /** 2318 * Enable a flow control configured from the control plane. 2319 * 2320 * @param dev 2321 * Pointer to Ethernet device. 2322 * @param eth_spec 2323 * An Ethernet flow spec to apply. 2324 * @param eth_mask 2325 * An Ethernet flow mask to apply. 2326 * 2327 * @return 2328 * 0 on success, a negative errno value otherwise and rte_errno is set. 2329 */ 2330 int 2331 mlx5_ctrl_flow(struct rte_eth_dev *dev, 2332 struct rte_flow_item_eth *eth_spec, 2333 struct rte_flow_item_eth *eth_mask) 2334 { 2335 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 2336 } 2337 2338 /** 2339 * Destroy a flow. 2340 * 2341 * @see rte_flow_destroy() 2342 * @see rte_flow_ops 2343 */ 2344 int 2345 mlx5_flow_destroy(struct rte_eth_dev *dev, 2346 struct rte_flow *flow, 2347 struct rte_flow_error *error __rte_unused) 2348 { 2349 struct priv *priv = dev->data->dev_private; 2350 2351 flow_list_destroy(dev, &priv->flows, flow); 2352 return 0; 2353 } 2354 2355 /** 2356 * Destroy all flows. 2357 * 2358 * @see rte_flow_flush() 2359 * @see rte_flow_ops 2360 */ 2361 int 2362 mlx5_flow_flush(struct rte_eth_dev *dev, 2363 struct rte_flow_error *error __rte_unused) 2364 { 2365 struct priv *priv = dev->data->dev_private; 2366 2367 mlx5_flow_list_flush(dev, &priv->flows); 2368 return 0; 2369 } 2370 2371 /** 2372 * Isolated mode. 2373 * 2374 * @see rte_flow_isolate() 2375 * @see rte_flow_ops 2376 */ 2377 int 2378 mlx5_flow_isolate(struct rte_eth_dev *dev, 2379 int enable, 2380 struct rte_flow_error *error) 2381 { 2382 struct priv *priv = dev->data->dev_private; 2383 2384 if (dev->data->dev_started) { 2385 rte_flow_error_set(error, EBUSY, 2386 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2387 NULL, 2388 "port must be stopped first"); 2389 return -rte_errno; 2390 } 2391 priv->isolated = !!enable; 2392 if (enable) 2393 dev->dev_ops = &mlx5_dev_ops_isolate; 2394 else 2395 dev->dev_ops = &mlx5_dev_ops; 2396 return 0; 2397 } 2398 2399 /** 2400 * Query a flow. 2401 * 2402 * @see rte_flow_query() 2403 * @see rte_flow_ops 2404 */ 2405 static int 2406 flow_drv_query(struct rte_eth_dev *dev, 2407 struct rte_flow *flow, 2408 const struct rte_flow_action *actions, 2409 void *data, 2410 struct rte_flow_error *error) 2411 { 2412 const struct mlx5_flow_driver_ops *fops; 2413 enum mlx5_flow_drv_type ftype = flow->drv_type; 2414 2415 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 2416 fops = flow_get_drv_ops(ftype); 2417 2418 return fops->query(dev, flow, actions, data, error); 2419 } 2420 2421 /** 2422 * Query a flow. 2423 * 2424 * @see rte_flow_query() 2425 * @see rte_flow_ops 2426 */ 2427 int 2428 mlx5_flow_query(struct rte_eth_dev *dev, 2429 struct rte_flow *flow, 2430 const struct rte_flow_action *actions, 2431 void *data, 2432 struct rte_flow_error *error) 2433 { 2434 int ret; 2435 2436 ret = flow_drv_query(dev, flow, actions, data, error); 2437 if (ret < 0) 2438 return ret; 2439 return 0; 2440 } 2441 2442 /** 2443 * Convert a flow director filter to a generic flow. 2444 * 2445 * @param dev 2446 * Pointer to Ethernet device. 2447 * @param fdir_filter 2448 * Flow director filter to add. 2449 * @param attributes 2450 * Generic flow parameters structure. 2451 * 2452 * @return 2453 * 0 on success, a negative errno value otherwise and rte_errno is set. 2454 */ 2455 static int 2456 mlx5_fdir_filter_convert(struct rte_eth_dev *dev, 2457 const struct rte_eth_fdir_filter *fdir_filter, 2458 struct mlx5_fdir *attributes) 2459 { 2460 struct priv *priv = dev->data->dev_private; 2461 const struct rte_eth_fdir_input *input = &fdir_filter->input; 2462 const struct rte_eth_fdir_masks *mask = 2463 &dev->data->dev_conf.fdir_conf.mask; 2464 2465 /* Validate queue number. */ 2466 if (fdir_filter->action.rx_queue >= priv->rxqs_n) { 2467 DRV_LOG(ERR, "port %u invalid queue number %d", 2468 dev->data->port_id, fdir_filter->action.rx_queue); 2469 rte_errno = EINVAL; 2470 return -rte_errno; 2471 } 2472 attributes->attr.ingress = 1; 2473 attributes->items[0] = (struct rte_flow_item) { 2474 .type = RTE_FLOW_ITEM_TYPE_ETH, 2475 .spec = &attributes->l2, 2476 .mask = &attributes->l2_mask, 2477 }; 2478 switch (fdir_filter->action.behavior) { 2479 case RTE_ETH_FDIR_ACCEPT: 2480 attributes->actions[0] = (struct rte_flow_action){ 2481 .type = RTE_FLOW_ACTION_TYPE_QUEUE, 2482 .conf = &attributes->queue, 2483 }; 2484 break; 2485 case RTE_ETH_FDIR_REJECT: 2486 attributes->actions[0] = (struct rte_flow_action){ 2487 .type = RTE_FLOW_ACTION_TYPE_DROP, 2488 }; 2489 break; 2490 default: 2491 DRV_LOG(ERR, "port %u invalid behavior %d", 2492 dev->data->port_id, 2493 fdir_filter->action.behavior); 2494 rte_errno = ENOTSUP; 2495 return -rte_errno; 2496 } 2497 attributes->queue.index = fdir_filter->action.rx_queue; 2498 /* Handle L3. */ 2499 switch (fdir_filter->input.flow_type) { 2500 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2501 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2502 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2503 attributes->l3.ipv4.hdr = (struct ipv4_hdr){ 2504 .src_addr = input->flow.ip4_flow.src_ip, 2505 .dst_addr = input->flow.ip4_flow.dst_ip, 2506 .time_to_live = input->flow.ip4_flow.ttl, 2507 .type_of_service = input->flow.ip4_flow.tos, 2508 }; 2509 attributes->l3_mask.ipv4.hdr = (struct ipv4_hdr){ 2510 .src_addr = mask->ipv4_mask.src_ip, 2511 .dst_addr = mask->ipv4_mask.dst_ip, 2512 .time_to_live = mask->ipv4_mask.ttl, 2513 .type_of_service = mask->ipv4_mask.tos, 2514 .next_proto_id = mask->ipv4_mask.proto, 2515 }; 2516 attributes->items[1] = (struct rte_flow_item){ 2517 .type = RTE_FLOW_ITEM_TYPE_IPV4, 2518 .spec = &attributes->l3, 2519 .mask = &attributes->l3_mask, 2520 }; 2521 break; 2522 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2523 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2524 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2525 attributes->l3.ipv6.hdr = (struct ipv6_hdr){ 2526 .hop_limits = input->flow.ipv6_flow.hop_limits, 2527 .proto = input->flow.ipv6_flow.proto, 2528 }; 2529 2530 memcpy(attributes->l3.ipv6.hdr.src_addr, 2531 input->flow.ipv6_flow.src_ip, 2532 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2533 memcpy(attributes->l3.ipv6.hdr.dst_addr, 2534 input->flow.ipv6_flow.dst_ip, 2535 RTE_DIM(attributes->l3.ipv6.hdr.src_addr)); 2536 memcpy(attributes->l3_mask.ipv6.hdr.src_addr, 2537 mask->ipv6_mask.src_ip, 2538 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2539 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr, 2540 mask->ipv6_mask.dst_ip, 2541 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr)); 2542 attributes->items[1] = (struct rte_flow_item){ 2543 .type = RTE_FLOW_ITEM_TYPE_IPV6, 2544 .spec = &attributes->l3, 2545 .mask = &attributes->l3_mask, 2546 }; 2547 break; 2548 default: 2549 DRV_LOG(ERR, "port %u invalid flow type%d", 2550 dev->data->port_id, fdir_filter->input.flow_type); 2551 rte_errno = ENOTSUP; 2552 return -rte_errno; 2553 } 2554 /* Handle L4. */ 2555 switch (fdir_filter->input.flow_type) { 2556 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP: 2557 attributes->l4.udp.hdr = (struct udp_hdr){ 2558 .src_port = input->flow.udp4_flow.src_port, 2559 .dst_port = input->flow.udp4_flow.dst_port, 2560 }; 2561 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2562 .src_port = mask->src_port_mask, 2563 .dst_port = mask->dst_port_mask, 2564 }; 2565 attributes->items[2] = (struct rte_flow_item){ 2566 .type = RTE_FLOW_ITEM_TYPE_UDP, 2567 .spec = &attributes->l4, 2568 .mask = &attributes->l4_mask, 2569 }; 2570 break; 2571 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP: 2572 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2573 .src_port = input->flow.tcp4_flow.src_port, 2574 .dst_port = input->flow.tcp4_flow.dst_port, 2575 }; 2576 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2577 .src_port = mask->src_port_mask, 2578 .dst_port = mask->dst_port_mask, 2579 }; 2580 attributes->items[2] = (struct rte_flow_item){ 2581 .type = RTE_FLOW_ITEM_TYPE_TCP, 2582 .spec = &attributes->l4, 2583 .mask = &attributes->l4_mask, 2584 }; 2585 break; 2586 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: 2587 attributes->l4.udp.hdr = (struct udp_hdr){ 2588 .src_port = input->flow.udp6_flow.src_port, 2589 .dst_port = input->flow.udp6_flow.dst_port, 2590 }; 2591 attributes->l4_mask.udp.hdr = (struct udp_hdr){ 2592 .src_port = mask->src_port_mask, 2593 .dst_port = mask->dst_port_mask, 2594 }; 2595 attributes->items[2] = (struct rte_flow_item){ 2596 .type = RTE_FLOW_ITEM_TYPE_UDP, 2597 .spec = &attributes->l4, 2598 .mask = &attributes->l4_mask, 2599 }; 2600 break; 2601 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: 2602 attributes->l4.tcp.hdr = (struct tcp_hdr){ 2603 .src_port = input->flow.tcp6_flow.src_port, 2604 .dst_port = input->flow.tcp6_flow.dst_port, 2605 }; 2606 attributes->l4_mask.tcp.hdr = (struct tcp_hdr){ 2607 .src_port = mask->src_port_mask, 2608 .dst_port = mask->dst_port_mask, 2609 }; 2610 attributes->items[2] = (struct rte_flow_item){ 2611 .type = RTE_FLOW_ITEM_TYPE_TCP, 2612 .spec = &attributes->l4, 2613 .mask = &attributes->l4_mask, 2614 }; 2615 break; 2616 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER: 2617 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER: 2618 break; 2619 default: 2620 DRV_LOG(ERR, "port %u invalid flow type%d", 2621 dev->data->port_id, fdir_filter->input.flow_type); 2622 rte_errno = ENOTSUP; 2623 return -rte_errno; 2624 } 2625 return 0; 2626 } 2627 2628 /** 2629 * Add new flow director filter and store it in list. 2630 * 2631 * @param dev 2632 * Pointer to Ethernet device. 2633 * @param fdir_filter 2634 * Flow director filter to add. 2635 * 2636 * @return 2637 * 0 on success, a negative errno value otherwise and rte_errno is set. 2638 */ 2639 static int 2640 mlx5_fdir_filter_add(struct rte_eth_dev *dev, 2641 const struct rte_eth_fdir_filter *fdir_filter) 2642 { 2643 struct priv *priv = dev->data->dev_private; 2644 struct mlx5_fdir attributes = { 2645 .attr.group = 0, 2646 .l2_mask = { 2647 .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00", 2648 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 2649 .type = 0, 2650 }, 2651 }; 2652 struct rte_flow_error error; 2653 struct rte_flow *flow; 2654 int ret; 2655 2656 ret = mlx5_fdir_filter_convert(dev, fdir_filter, &attributes); 2657 if (ret) 2658 return ret; 2659 flow = flow_list_create(dev, &priv->flows, &attributes.attr, 2660 attributes.items, attributes.actions, &error); 2661 if (flow) { 2662 DRV_LOG(DEBUG, "port %u FDIR created %p", dev->data->port_id, 2663 (void *)flow); 2664 return 0; 2665 } 2666 return -rte_errno; 2667 } 2668 2669 /** 2670 * Delete specific filter. 2671 * 2672 * @param dev 2673 * Pointer to Ethernet device. 2674 * @param fdir_filter 2675 * Filter to be deleted. 2676 * 2677 * @return 2678 * 0 on success, a negative errno value otherwise and rte_errno is set. 2679 */ 2680 static int 2681 mlx5_fdir_filter_delete(struct rte_eth_dev *dev __rte_unused, 2682 const struct rte_eth_fdir_filter *fdir_filter 2683 __rte_unused) 2684 { 2685 rte_errno = ENOTSUP; 2686 return -rte_errno; 2687 } 2688 2689 /** 2690 * Update queue for specific filter. 2691 * 2692 * @param dev 2693 * Pointer to Ethernet device. 2694 * @param fdir_filter 2695 * Filter to be updated. 2696 * 2697 * @return 2698 * 0 on success, a negative errno value otherwise and rte_errno is set. 2699 */ 2700 static int 2701 mlx5_fdir_filter_update(struct rte_eth_dev *dev, 2702 const struct rte_eth_fdir_filter *fdir_filter) 2703 { 2704 int ret; 2705 2706 ret = mlx5_fdir_filter_delete(dev, fdir_filter); 2707 if (ret) 2708 return ret; 2709 return mlx5_fdir_filter_add(dev, fdir_filter); 2710 } 2711 2712 /** 2713 * Flush all filters. 2714 * 2715 * @param dev 2716 * Pointer to Ethernet device. 2717 */ 2718 static void 2719 mlx5_fdir_filter_flush(struct rte_eth_dev *dev) 2720 { 2721 struct priv *priv = dev->data->dev_private; 2722 2723 mlx5_flow_list_flush(dev, &priv->flows); 2724 } 2725 2726 /** 2727 * Get flow director information. 2728 * 2729 * @param dev 2730 * Pointer to Ethernet device. 2731 * @param[out] fdir_info 2732 * Resulting flow director information. 2733 */ 2734 static void 2735 mlx5_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info) 2736 { 2737 struct rte_eth_fdir_masks *mask = 2738 &dev->data->dev_conf.fdir_conf.mask; 2739 2740 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode; 2741 fdir_info->guarant_spc = 0; 2742 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask)); 2743 fdir_info->max_flexpayload = 0; 2744 fdir_info->flow_types_mask[0] = 0; 2745 fdir_info->flex_payload_unit = 0; 2746 fdir_info->max_flex_payload_segment_num = 0; 2747 fdir_info->flex_payload_limit = 0; 2748 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf)); 2749 } 2750 2751 /** 2752 * Deal with flow director operations. 2753 * 2754 * @param dev 2755 * Pointer to Ethernet device. 2756 * @param filter_op 2757 * Operation to perform. 2758 * @param arg 2759 * Pointer to operation-specific structure. 2760 * 2761 * @return 2762 * 0 on success, a negative errno value otherwise and rte_errno is set. 2763 */ 2764 static int 2765 mlx5_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op, 2766 void *arg) 2767 { 2768 enum rte_fdir_mode fdir_mode = 2769 dev->data->dev_conf.fdir_conf.mode; 2770 2771 if (filter_op == RTE_ETH_FILTER_NOP) 2772 return 0; 2773 if (fdir_mode != RTE_FDIR_MODE_PERFECT && 2774 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) { 2775 DRV_LOG(ERR, "port %u flow director mode %d not supported", 2776 dev->data->port_id, fdir_mode); 2777 rte_errno = EINVAL; 2778 return -rte_errno; 2779 } 2780 switch (filter_op) { 2781 case RTE_ETH_FILTER_ADD: 2782 return mlx5_fdir_filter_add(dev, arg); 2783 case RTE_ETH_FILTER_UPDATE: 2784 return mlx5_fdir_filter_update(dev, arg); 2785 case RTE_ETH_FILTER_DELETE: 2786 return mlx5_fdir_filter_delete(dev, arg); 2787 case RTE_ETH_FILTER_FLUSH: 2788 mlx5_fdir_filter_flush(dev); 2789 break; 2790 case RTE_ETH_FILTER_INFO: 2791 mlx5_fdir_info_get(dev, arg); 2792 break; 2793 default: 2794 DRV_LOG(DEBUG, "port %u unknown operation %u", 2795 dev->data->port_id, filter_op); 2796 rte_errno = EINVAL; 2797 return -rte_errno; 2798 } 2799 return 0; 2800 } 2801 2802 /** 2803 * Manage filter operations. 2804 * 2805 * @param dev 2806 * Pointer to Ethernet device structure. 2807 * @param filter_type 2808 * Filter type. 2809 * @param filter_op 2810 * Operation to perform. 2811 * @param arg 2812 * Pointer to operation-specific structure. 2813 * 2814 * @return 2815 * 0 on success, a negative errno value otherwise and rte_errno is set. 2816 */ 2817 int 2818 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev, 2819 enum rte_filter_type filter_type, 2820 enum rte_filter_op filter_op, 2821 void *arg) 2822 { 2823 switch (filter_type) { 2824 case RTE_ETH_FILTER_GENERIC: 2825 if (filter_op != RTE_ETH_FILTER_GET) { 2826 rte_errno = EINVAL; 2827 return -rte_errno; 2828 } 2829 *(const void **)arg = &mlx5_flow_ops; 2830 return 0; 2831 case RTE_ETH_FILTER_FDIR: 2832 return mlx5_fdir_ctrl_func(dev, filter_op, arg); 2833 default: 2834 DRV_LOG(ERR, "port %u filter type (%d) not supported", 2835 dev->data->port_id, filter_type); 2836 rte_errno = ENOTSUP; 2837 return -rte_errno; 2838 } 2839 return 0; 2840 } 2841