1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <stdalign.h> 7 #include <stdint.h> 8 #include <string.h> 9 #include <stdbool.h> 10 #include <sys/queue.h> 11 12 #include <rte_common.h> 13 #include <rte_ether.h> 14 #include <ethdev_driver.h> 15 #include <rte_eal_paging.h> 16 #include <rte_flow.h> 17 #include <rte_cycles.h> 18 #include <rte_flow_driver.h> 19 #include <rte_malloc.h> 20 #include <rte_ip.h> 21 22 #include <mlx5_glue.h> 23 #include <mlx5_devx_cmds.h> 24 #include <mlx5_prm.h> 25 #include <mlx5_malloc.h> 26 27 #include "mlx5_defs.h" 28 #include "mlx5.h" 29 #include "mlx5_flow.h" 30 #include "mlx5_flow_os.h" 31 #include "mlx5_rx.h" 32 #include "mlx5_tx.h" 33 #include "mlx5_common_os.h" 34 #include "rte_pmd_mlx5.h" 35 36 struct tunnel_default_miss_ctx { 37 uint16_t *queue; 38 __extension__ 39 union { 40 struct rte_flow_action_rss action_rss; 41 struct rte_flow_action_queue miss_queue; 42 struct rte_flow_action_jump miss_jump; 43 uint8_t raw[0]; 44 }; 45 }; 46 47 static int 48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 49 struct rte_flow *flow, 50 const struct rte_flow_attr *attr, 51 const struct rte_flow_action *app_actions, 52 uint32_t flow_idx, 53 const struct mlx5_flow_tunnel *tunnel, 54 struct tunnel_default_miss_ctx *ctx, 55 struct rte_flow_error *error); 56 static struct mlx5_flow_tunnel * 57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 58 static void 59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 60 static uint32_t 61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 62 const struct mlx5_flow_tunnel *tunnel, 63 uint32_t group, uint32_t *table, 64 struct rte_flow_error *error); 65 66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void); 67 static void mlx5_flow_pop_thread_workspace(void); 68 69 70 /** Device flow drivers. */ 71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 72 73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 74 75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 76 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) 78 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 79 #endif 80 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 81 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 82 }; 83 84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 86 (const int []){ \ 87 __VA_ARGS__, 0, \ 88 } 89 90 /** Node object of input graph for mlx5_flow_expand_rss(). */ 91 struct mlx5_flow_expand_node { 92 const int *const next; 93 /**< 94 * List of next node indexes. Index 0 is interpreted as a terminator. 95 */ 96 const enum rte_flow_item_type type; 97 /**< Pattern item type of current node. */ 98 uint64_t rss_types; 99 /**< 100 * RSS types bit-field associated with this node 101 * (see RTE_ETH_RSS_* definitions). 102 */ 103 uint64_t node_flags; 104 /**< 105 * Bit-fields that define how the node is used in the expansion. 106 * (see MLX5_EXPANSION_NODE_* definitions). 107 */ 108 }; 109 110 /* Optional expand field. The expansion alg will not go deeper. */ 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0) 112 113 /* The node is not added implicitly as expansion to the flow pattern. 114 * If the node type does not match the flow pattern item type, the 115 * expansion alg will go deeper to its next items. 116 * In the current implementation, the list of next nodes indexes can 117 * have up to one node with this flag set and it has to be the last 118 * node index (before the list terminator). 119 */ 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1) 121 122 /** Object returned by mlx5_flow_expand_rss(). */ 123 struct mlx5_flow_expand_rss { 124 uint32_t entries; 125 /**< Number of entries @p patterns and @p priorities. */ 126 struct { 127 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 128 uint32_t priority; /**< Priority offset for each expansion. */ 129 } entry[]; 130 }; 131 132 static void 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item); 134 135 static const struct mlx5_flow_expand_node * 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern, 137 unsigned int item_idx, 138 const struct mlx5_flow_expand_node graph[], 139 const struct mlx5_flow_expand_node *node); 140 141 static bool 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item) 143 { 144 switch (item->type) { 145 case RTE_FLOW_ITEM_TYPE_ETH: 146 case RTE_FLOW_ITEM_TYPE_VLAN: 147 case RTE_FLOW_ITEM_TYPE_IPV4: 148 case RTE_FLOW_ITEM_TYPE_IPV6: 149 case RTE_FLOW_ITEM_TYPE_UDP: 150 case RTE_FLOW_ITEM_TYPE_TCP: 151 case RTE_FLOW_ITEM_TYPE_VXLAN: 152 case RTE_FLOW_ITEM_TYPE_NVGRE: 153 case RTE_FLOW_ITEM_TYPE_GRE: 154 case RTE_FLOW_ITEM_TYPE_GENEVE: 155 case RTE_FLOW_ITEM_TYPE_MPLS: 156 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE: 157 case RTE_FLOW_ITEM_TYPE_GRE_KEY: 158 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT: 159 case RTE_FLOW_ITEM_TYPE_GTP: 160 return true; 161 default: 162 break; 163 } 164 return false; 165 } 166 167 static enum rte_flow_item_type 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 169 { 170 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 171 uint16_t ether_type = 0; 172 uint16_t ether_type_m; 173 uint8_t ip_next_proto = 0; 174 uint8_t ip_next_proto_m; 175 176 if (item == NULL || item->spec == NULL) 177 return ret; 178 switch (item->type) { 179 case RTE_FLOW_ITEM_TYPE_ETH: 180 if (item->mask) 181 ether_type_m = ((const struct rte_flow_item_eth *) 182 (item->mask))->type; 183 else 184 ether_type_m = rte_flow_item_eth_mask.type; 185 if (ether_type_m != RTE_BE16(0xFFFF)) 186 break; 187 ether_type = ((const struct rte_flow_item_eth *) 188 (item->spec))->type; 189 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 190 ret = RTE_FLOW_ITEM_TYPE_IPV4; 191 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 192 ret = RTE_FLOW_ITEM_TYPE_IPV6; 193 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 194 ret = RTE_FLOW_ITEM_TYPE_VLAN; 195 else 196 ret = RTE_FLOW_ITEM_TYPE_END; 197 break; 198 case RTE_FLOW_ITEM_TYPE_VLAN: 199 if (item->mask) 200 ether_type_m = ((const struct rte_flow_item_vlan *) 201 (item->mask))->inner_type; 202 else 203 ether_type_m = rte_flow_item_vlan_mask.inner_type; 204 if (ether_type_m != RTE_BE16(0xFFFF)) 205 break; 206 ether_type = ((const struct rte_flow_item_vlan *) 207 (item->spec))->inner_type; 208 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 209 ret = RTE_FLOW_ITEM_TYPE_IPV4; 210 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 211 ret = RTE_FLOW_ITEM_TYPE_IPV6; 212 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 213 ret = RTE_FLOW_ITEM_TYPE_VLAN; 214 else 215 ret = RTE_FLOW_ITEM_TYPE_END; 216 break; 217 case RTE_FLOW_ITEM_TYPE_IPV4: 218 if (item->mask) 219 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 220 (item->mask))->hdr.next_proto_id; 221 else 222 ip_next_proto_m = 223 rte_flow_item_ipv4_mask.hdr.next_proto_id; 224 if (ip_next_proto_m != 0xFF) 225 break; 226 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 227 (item->spec))->hdr.next_proto_id; 228 if (ip_next_proto == IPPROTO_UDP) 229 ret = RTE_FLOW_ITEM_TYPE_UDP; 230 else if (ip_next_proto == IPPROTO_TCP) 231 ret = RTE_FLOW_ITEM_TYPE_TCP; 232 else if (ip_next_proto == IPPROTO_IP) 233 ret = RTE_FLOW_ITEM_TYPE_IPV4; 234 else if (ip_next_proto == IPPROTO_IPV6) 235 ret = RTE_FLOW_ITEM_TYPE_IPV6; 236 else 237 ret = RTE_FLOW_ITEM_TYPE_END; 238 break; 239 case RTE_FLOW_ITEM_TYPE_IPV6: 240 if (item->mask) 241 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 242 (item->mask))->hdr.proto; 243 else 244 ip_next_proto_m = 245 rte_flow_item_ipv6_mask.hdr.proto; 246 if (ip_next_proto_m != 0xFF) 247 break; 248 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 249 (item->spec))->hdr.proto; 250 if (ip_next_proto == IPPROTO_UDP) 251 ret = RTE_FLOW_ITEM_TYPE_UDP; 252 else if (ip_next_proto == IPPROTO_TCP) 253 ret = RTE_FLOW_ITEM_TYPE_TCP; 254 else if (ip_next_proto == IPPROTO_IP) 255 ret = RTE_FLOW_ITEM_TYPE_IPV4; 256 else if (ip_next_proto == IPPROTO_IPV6) 257 ret = RTE_FLOW_ITEM_TYPE_IPV6; 258 else 259 ret = RTE_FLOW_ITEM_TYPE_END; 260 break; 261 case RTE_FLOW_ITEM_TYPE_GENEVE: 262 ether_type_m = item->mask ? 263 ((const struct rte_flow_item_geneve *) 264 (item->mask))->protocol : 265 rte_flow_item_geneve_mask.protocol; 266 ether_type = ((const struct rte_flow_item_geneve *) 267 (item->spec))->protocol; 268 ether_type_m = rte_be_to_cpu_16(ether_type_m); 269 ether_type = rte_be_to_cpu_16(ether_type); 270 switch (ether_type_m & ether_type) { 271 case RTE_ETHER_TYPE_TEB: 272 ret = RTE_FLOW_ITEM_TYPE_ETH; 273 break; 274 case RTE_ETHER_TYPE_IPV4: 275 ret = RTE_FLOW_ITEM_TYPE_IPV4; 276 break; 277 case RTE_ETHER_TYPE_IPV6: 278 ret = RTE_FLOW_ITEM_TYPE_IPV6; 279 break; 280 default: 281 ret = RTE_FLOW_ITEM_TYPE_END; 282 } 283 break; 284 default: 285 ret = RTE_FLOW_ITEM_TYPE_VOID; 286 break; 287 } 288 return ret; 289 } 290 291 static const int * 292 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[], 293 const int *next_node) 294 { 295 const struct mlx5_flow_expand_node *node = NULL; 296 const int *next = next_node; 297 298 while (next && *next) { 299 /* 300 * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT 301 * flag set, because they were not found in the flow pattern. 302 */ 303 node = &graph[*next]; 304 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT)) 305 break; 306 next = node->next; 307 } 308 return next; 309 } 310 311 #define MLX5_RSS_EXP_ELT_N 16 312 313 /** 314 * Expand RSS flows into several possible flows according to the RSS hash 315 * fields requested and the driver capabilities. 316 * 317 * @param[out] buf 318 * Buffer to store the result expansion. 319 * @param[in] size 320 * Buffer size in bytes. If 0, @p buf can be NULL. 321 * @param[in] pattern 322 * User flow pattern. 323 * @param[in] types 324 * RSS types to expand (see RTE_ETH_RSS_* definitions). 325 * @param[in] graph 326 * Input graph to expand @p pattern according to @p types. 327 * @param[in] graph_root_index 328 * Index of root node in @p graph, typically 0. 329 * 330 * @return 331 * A positive value representing the size of @p buf in bytes regardless of 332 * @p size on success, a negative errno value otherwise and rte_errno is 333 * set, the following errors are defined: 334 * 335 * -E2BIG: graph-depth @p graph is too deep. 336 * -EINVAL: @p size has not enough space for expanded pattern. 337 */ 338 static int 339 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 340 const struct rte_flow_item *pattern, uint64_t types, 341 const struct mlx5_flow_expand_node graph[], 342 int graph_root_index) 343 { 344 const struct rte_flow_item *item; 345 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 346 const int *next_node; 347 const int *stack[MLX5_RSS_EXP_ELT_N]; 348 int stack_pos = 0; 349 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N]; 350 unsigned int i, item_idx, last_expand_item_idx = 0; 351 size_t lsize; 352 size_t user_pattern_size = 0; 353 void *addr = NULL; 354 const struct mlx5_flow_expand_node *next = NULL; 355 struct rte_flow_item missed_item; 356 int missed = 0; 357 int elt = 0; 358 const struct rte_flow_item *last_expand_item = NULL; 359 360 memset(&missed_item, 0, sizeof(missed_item)); 361 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 362 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]); 363 if (lsize > size) 364 return -EINVAL; 365 buf->entry[0].priority = 0; 366 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N]; 367 buf->entries = 0; 368 addr = buf->entry[0].pattern; 369 for (item = pattern, item_idx = 0; 370 item->type != RTE_FLOW_ITEM_TYPE_END; 371 item++, item_idx++) { 372 if (!mlx5_flow_is_rss_expandable_item(item)) { 373 user_pattern_size += sizeof(*item); 374 continue; 375 } 376 last_expand_item = item; 377 last_expand_item_idx = item_idx; 378 i = 0; 379 while (node->next && node->next[i]) { 380 next = &graph[node->next[i]]; 381 if (next->type == item->type) 382 break; 383 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) { 384 node = next; 385 i = 0; 386 } else { 387 ++i; 388 } 389 } 390 if (next) 391 node = next; 392 user_pattern_size += sizeof(*item); 393 } 394 user_pattern_size += sizeof(*item); /* Handle END item. */ 395 lsize += user_pattern_size; 396 if (lsize > size) 397 return -EINVAL; 398 /* Copy the user pattern in the first entry of the buffer. */ 399 rte_memcpy(addr, pattern, user_pattern_size); 400 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 401 buf->entries = 1; 402 /* Start expanding. */ 403 memset(flow_items, 0, sizeof(flow_items)); 404 user_pattern_size -= sizeof(*item); 405 /* 406 * Check if the last valid item has spec set, need complete pattern, 407 * and the pattern can be used for expansion. 408 */ 409 missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item); 410 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 411 /* Item type END indicates expansion is not required. */ 412 return lsize; 413 } 414 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 415 next = NULL; 416 missed = 1; 417 i = 0; 418 while (node->next && node->next[i]) { 419 next = &graph[node->next[i]]; 420 if (next->type == missed_item.type) { 421 flow_items[0].type = missed_item.type; 422 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 423 break; 424 } 425 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) { 426 node = next; 427 i = 0; 428 } else { 429 ++i; 430 } 431 next = NULL; 432 } 433 } 434 if (next && missed) { 435 elt = 2; /* missed item + item end. */ 436 node = next; 437 lsize += elt * sizeof(*item) + user_pattern_size; 438 if (lsize > size) 439 return -EINVAL; 440 if (node->rss_types & types) { 441 buf->entry[buf->entries].priority = 1; 442 buf->entry[buf->entries].pattern = addr; 443 buf->entries++; 444 rte_memcpy(addr, buf->entry[0].pattern, 445 user_pattern_size); 446 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 447 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 448 addr = (void *)(((uintptr_t)addr) + 449 elt * sizeof(*item)); 450 } 451 } else if (last_expand_item != NULL) { 452 node = mlx5_flow_expand_rss_adjust_node(pattern, 453 last_expand_item_idx, graph, node); 454 } 455 memset(flow_items, 0, sizeof(flow_items)); 456 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 457 node->next); 458 stack[stack_pos] = next_node; 459 node = next_node ? &graph[*next_node] : NULL; 460 while (node) { 461 flow_items[stack_pos].type = node->type; 462 if (node->rss_types & types) { 463 size_t n; 464 /* 465 * compute the number of items to copy from the 466 * expansion and copy it. 467 * When the stack_pos is 0, there are 1 element in it, 468 * plus the addition END item. 469 */ 470 elt = stack_pos + 2; 471 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 472 lsize += elt * sizeof(*item) + user_pattern_size; 473 if (lsize > size) 474 return -EINVAL; 475 n = elt * sizeof(*item); 476 buf->entry[buf->entries].priority = 477 stack_pos + 1 + missed; 478 buf->entry[buf->entries].pattern = addr; 479 buf->entries++; 480 rte_memcpy(addr, buf->entry[0].pattern, 481 user_pattern_size); 482 addr = (void *)(((uintptr_t)addr) + 483 user_pattern_size); 484 rte_memcpy(addr, &missed_item, 485 missed * sizeof(*item)); 486 addr = (void *)(((uintptr_t)addr) + 487 missed * sizeof(*item)); 488 rte_memcpy(addr, flow_items, n); 489 addr = (void *)(((uintptr_t)addr) + n); 490 } 491 /* Go deeper. */ 492 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) && 493 node->next) { 494 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 495 node->next); 496 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) { 497 rte_errno = E2BIG; 498 return -rte_errno; 499 } 500 stack[stack_pos] = next_node; 501 } else if (*(next_node + 1)) { 502 /* Follow up with the next possibility. */ 503 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 504 ++next_node); 505 } else if (!stack_pos) { 506 /* 507 * Completing the traverse over the different paths. 508 * The next_node is advanced to the terminator. 509 */ 510 ++next_node; 511 } else { 512 /* Move to the next path. */ 513 while (stack_pos) { 514 next_node = stack[--stack_pos]; 515 next_node++; 516 if (*next_node) 517 break; 518 } 519 next_node = mlx5_flow_expand_rss_skip_explicit(graph, 520 next_node); 521 stack[stack_pos] = next_node; 522 } 523 node = next_node && *next_node ? &graph[*next_node] : NULL; 524 }; 525 return lsize; 526 } 527 528 enum mlx5_expansion { 529 MLX5_EXPANSION_ROOT, 530 MLX5_EXPANSION_ROOT_OUTER, 531 MLX5_EXPANSION_OUTER_ETH, 532 MLX5_EXPANSION_OUTER_VLAN, 533 MLX5_EXPANSION_OUTER_IPV4, 534 MLX5_EXPANSION_OUTER_IPV4_UDP, 535 MLX5_EXPANSION_OUTER_IPV4_TCP, 536 MLX5_EXPANSION_OUTER_IPV6, 537 MLX5_EXPANSION_OUTER_IPV6_UDP, 538 MLX5_EXPANSION_OUTER_IPV6_TCP, 539 MLX5_EXPANSION_VXLAN, 540 MLX5_EXPANSION_STD_VXLAN, 541 MLX5_EXPANSION_L3_VXLAN, 542 MLX5_EXPANSION_VXLAN_GPE, 543 MLX5_EXPANSION_GRE, 544 MLX5_EXPANSION_NVGRE, 545 MLX5_EXPANSION_GRE_KEY, 546 MLX5_EXPANSION_MPLS, 547 MLX5_EXPANSION_ETH, 548 MLX5_EXPANSION_VLAN, 549 MLX5_EXPANSION_IPV4, 550 MLX5_EXPANSION_IPV4_UDP, 551 MLX5_EXPANSION_IPV4_TCP, 552 MLX5_EXPANSION_IPV6, 553 MLX5_EXPANSION_IPV6_UDP, 554 MLX5_EXPANSION_IPV6_TCP, 555 MLX5_EXPANSION_IPV6_FRAG_EXT, 556 MLX5_EXPANSION_GTP, 557 MLX5_EXPANSION_GENEVE, 558 }; 559 560 /** Supported expansion of items. */ 561 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 562 [MLX5_EXPANSION_ROOT] = { 563 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 564 MLX5_EXPANSION_IPV4, 565 MLX5_EXPANSION_IPV6), 566 .type = RTE_FLOW_ITEM_TYPE_END, 567 }, 568 [MLX5_EXPANSION_ROOT_OUTER] = { 569 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 570 MLX5_EXPANSION_OUTER_IPV4, 571 MLX5_EXPANSION_OUTER_IPV6), 572 .type = RTE_FLOW_ITEM_TYPE_END, 573 }, 574 [MLX5_EXPANSION_OUTER_ETH] = { 575 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 576 .type = RTE_FLOW_ITEM_TYPE_ETH, 577 .rss_types = 0, 578 }, 579 [MLX5_EXPANSION_OUTER_VLAN] = { 580 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 581 MLX5_EXPANSION_OUTER_IPV6), 582 .type = RTE_FLOW_ITEM_TYPE_VLAN, 583 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT, 584 }, 585 [MLX5_EXPANSION_OUTER_IPV4] = { 586 .next = MLX5_FLOW_EXPAND_RSS_NEXT 587 (MLX5_EXPANSION_OUTER_IPV4_UDP, 588 MLX5_EXPANSION_OUTER_IPV4_TCP, 589 MLX5_EXPANSION_GRE, 590 MLX5_EXPANSION_NVGRE, 591 MLX5_EXPANSION_IPV4, 592 MLX5_EXPANSION_IPV6), 593 .type = RTE_FLOW_ITEM_TYPE_IPV4, 594 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 | 595 RTE_ETH_RSS_NONFRAG_IPV4_OTHER, 596 }, 597 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 598 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 599 MLX5_EXPANSION_VXLAN_GPE, 600 MLX5_EXPANSION_MPLS, 601 MLX5_EXPANSION_GENEVE, 602 MLX5_EXPANSION_GTP), 603 .type = RTE_FLOW_ITEM_TYPE_UDP, 604 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP, 605 }, 606 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 607 .type = RTE_FLOW_ITEM_TYPE_TCP, 608 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP, 609 }, 610 [MLX5_EXPANSION_OUTER_IPV6] = { 611 .next = MLX5_FLOW_EXPAND_RSS_NEXT 612 (MLX5_EXPANSION_OUTER_IPV6_UDP, 613 MLX5_EXPANSION_OUTER_IPV6_TCP, 614 MLX5_EXPANSION_IPV4, 615 MLX5_EXPANSION_IPV6, 616 MLX5_EXPANSION_GRE, 617 MLX5_EXPANSION_NVGRE), 618 .type = RTE_FLOW_ITEM_TYPE_IPV6, 619 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 | 620 RTE_ETH_RSS_NONFRAG_IPV6_OTHER, 621 }, 622 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 623 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 624 MLX5_EXPANSION_VXLAN_GPE, 625 MLX5_EXPANSION_MPLS, 626 MLX5_EXPANSION_GENEVE, 627 MLX5_EXPANSION_GTP), 628 .type = RTE_FLOW_ITEM_TYPE_UDP, 629 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP, 630 }, 631 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 632 .type = RTE_FLOW_ITEM_TYPE_TCP, 633 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP, 634 }, 635 [MLX5_EXPANSION_VXLAN] = { 636 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 637 MLX5_EXPANSION_IPV4, 638 MLX5_EXPANSION_IPV6), 639 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 640 }, 641 [MLX5_EXPANSION_STD_VXLAN] = { 642 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 643 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 644 }, 645 [MLX5_EXPANSION_L3_VXLAN] = { 646 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 647 MLX5_EXPANSION_IPV6), 648 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 649 }, 650 [MLX5_EXPANSION_VXLAN_GPE] = { 651 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 652 MLX5_EXPANSION_IPV4, 653 MLX5_EXPANSION_IPV6), 654 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 655 }, 656 [MLX5_EXPANSION_GRE] = { 657 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 658 MLX5_EXPANSION_IPV4, 659 MLX5_EXPANSION_IPV6, 660 MLX5_EXPANSION_GRE_KEY, 661 MLX5_EXPANSION_MPLS), 662 .type = RTE_FLOW_ITEM_TYPE_GRE, 663 }, 664 [MLX5_EXPANSION_GRE_KEY] = { 665 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 666 MLX5_EXPANSION_IPV6, 667 MLX5_EXPANSION_MPLS), 668 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY, 669 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL, 670 }, 671 [MLX5_EXPANSION_NVGRE] = { 672 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 673 .type = RTE_FLOW_ITEM_TYPE_NVGRE, 674 }, 675 [MLX5_EXPANSION_MPLS] = { 676 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 677 MLX5_EXPANSION_IPV6, 678 MLX5_EXPANSION_ETH), 679 .type = RTE_FLOW_ITEM_TYPE_MPLS, 680 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL, 681 }, 682 [MLX5_EXPANSION_ETH] = { 683 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 684 .type = RTE_FLOW_ITEM_TYPE_ETH, 685 }, 686 [MLX5_EXPANSION_VLAN] = { 687 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 688 MLX5_EXPANSION_IPV6), 689 .type = RTE_FLOW_ITEM_TYPE_VLAN, 690 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT, 691 }, 692 [MLX5_EXPANSION_IPV4] = { 693 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 694 MLX5_EXPANSION_IPV4_TCP), 695 .type = RTE_FLOW_ITEM_TYPE_IPV4, 696 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 | 697 RTE_ETH_RSS_NONFRAG_IPV4_OTHER, 698 }, 699 [MLX5_EXPANSION_IPV4_UDP] = { 700 .type = RTE_FLOW_ITEM_TYPE_UDP, 701 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP, 702 }, 703 [MLX5_EXPANSION_IPV4_TCP] = { 704 .type = RTE_FLOW_ITEM_TYPE_TCP, 705 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP, 706 }, 707 [MLX5_EXPANSION_IPV6] = { 708 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 709 MLX5_EXPANSION_IPV6_TCP, 710 MLX5_EXPANSION_IPV6_FRAG_EXT), 711 .type = RTE_FLOW_ITEM_TYPE_IPV6, 712 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 | 713 RTE_ETH_RSS_NONFRAG_IPV6_OTHER, 714 }, 715 [MLX5_EXPANSION_IPV6_UDP] = { 716 .type = RTE_FLOW_ITEM_TYPE_UDP, 717 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP, 718 }, 719 [MLX5_EXPANSION_IPV6_TCP] = { 720 .type = RTE_FLOW_ITEM_TYPE_TCP, 721 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP, 722 }, 723 [MLX5_EXPANSION_IPV6_FRAG_EXT] = { 724 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT, 725 }, 726 [MLX5_EXPANSION_GTP] = { 727 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 728 MLX5_EXPANSION_IPV6), 729 .type = RTE_FLOW_ITEM_TYPE_GTP, 730 }, 731 [MLX5_EXPANSION_GENEVE] = { 732 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 733 MLX5_EXPANSION_IPV4, 734 MLX5_EXPANSION_IPV6), 735 .type = RTE_FLOW_ITEM_TYPE_GENEVE, 736 }, 737 }; 738 739 static struct rte_flow_action_handle * 740 mlx5_action_handle_create(struct rte_eth_dev *dev, 741 const struct rte_flow_indir_action_conf *conf, 742 const struct rte_flow_action *action, 743 struct rte_flow_error *error); 744 static int mlx5_action_handle_destroy 745 (struct rte_eth_dev *dev, 746 struct rte_flow_action_handle *handle, 747 struct rte_flow_error *error); 748 static int mlx5_action_handle_update 749 (struct rte_eth_dev *dev, 750 struct rte_flow_action_handle *handle, 751 const void *update, 752 struct rte_flow_error *error); 753 static int mlx5_action_handle_query 754 (struct rte_eth_dev *dev, 755 const struct rte_flow_action_handle *handle, 756 void *data, 757 struct rte_flow_error *error); 758 static int 759 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 760 struct rte_flow_tunnel *app_tunnel, 761 struct rte_flow_action **actions, 762 uint32_t *num_of_actions, 763 struct rte_flow_error *error); 764 static int 765 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 766 struct rte_flow_tunnel *app_tunnel, 767 struct rte_flow_item **items, 768 uint32_t *num_of_items, 769 struct rte_flow_error *error); 770 static int 771 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 772 struct rte_flow_item *pmd_items, 773 uint32_t num_items, struct rte_flow_error *err); 774 static int 775 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 776 struct rte_flow_action *pmd_actions, 777 uint32_t num_actions, 778 struct rte_flow_error *err); 779 static int 780 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 781 struct rte_mbuf *m, 782 struct rte_flow_restore_info *info, 783 struct rte_flow_error *err); 784 static struct rte_flow_item_flex_handle * 785 mlx5_flow_flex_item_create(struct rte_eth_dev *dev, 786 const struct rte_flow_item_flex_conf *conf, 787 struct rte_flow_error *error); 788 static int 789 mlx5_flow_flex_item_release(struct rte_eth_dev *dev, 790 const struct rte_flow_item_flex_handle *handle, 791 struct rte_flow_error *error); 792 793 static const struct rte_flow_ops mlx5_flow_ops = { 794 .validate = mlx5_flow_validate, 795 .create = mlx5_flow_create, 796 .destroy = mlx5_flow_destroy, 797 .flush = mlx5_flow_flush, 798 .isolate = mlx5_flow_isolate, 799 .query = mlx5_flow_query, 800 .dev_dump = mlx5_flow_dev_dump, 801 .get_aged_flows = mlx5_flow_get_aged_flows, 802 .action_handle_create = mlx5_action_handle_create, 803 .action_handle_destroy = mlx5_action_handle_destroy, 804 .action_handle_update = mlx5_action_handle_update, 805 .action_handle_query = mlx5_action_handle_query, 806 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 807 .tunnel_match = mlx5_flow_tunnel_match, 808 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release, 809 .tunnel_item_release = mlx5_flow_tunnel_item_release, 810 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 811 .flex_item_create = mlx5_flow_flex_item_create, 812 .flex_item_release = mlx5_flow_flex_item_release, 813 }; 814 815 /* Tunnel information. */ 816 struct mlx5_flow_tunnel_info { 817 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 818 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 819 }; 820 821 static struct mlx5_flow_tunnel_info tunnels_info[] = { 822 { 823 .tunnel = MLX5_FLOW_LAYER_VXLAN, 824 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 825 }, 826 { 827 .tunnel = MLX5_FLOW_LAYER_GENEVE, 828 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 829 }, 830 { 831 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 832 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 833 }, 834 { 835 .tunnel = MLX5_FLOW_LAYER_GRE, 836 .ptype = RTE_PTYPE_TUNNEL_GRE, 837 }, 838 { 839 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 840 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 841 }, 842 { 843 .tunnel = MLX5_FLOW_LAYER_MPLS, 844 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 845 }, 846 { 847 .tunnel = MLX5_FLOW_LAYER_NVGRE, 848 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 849 }, 850 { 851 .tunnel = MLX5_FLOW_LAYER_IPIP, 852 .ptype = RTE_PTYPE_TUNNEL_IP, 853 }, 854 { 855 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 856 .ptype = RTE_PTYPE_TUNNEL_IP, 857 }, 858 { 859 .tunnel = MLX5_FLOW_LAYER_GTP, 860 .ptype = RTE_PTYPE_TUNNEL_GTPU, 861 }, 862 }; 863 864 865 866 /** 867 * Translate tag ID to register. 868 * 869 * @param[in] dev 870 * Pointer to the Ethernet device structure. 871 * @param[in] feature 872 * The feature that request the register. 873 * @param[in] id 874 * The request register ID. 875 * @param[out] error 876 * Error description in case of any. 877 * 878 * @return 879 * The request register on success, a negative errno 880 * value otherwise and rte_errno is set. 881 */ 882 int 883 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 884 enum mlx5_feature_name feature, 885 uint32_t id, 886 struct rte_flow_error *error) 887 { 888 struct mlx5_priv *priv = dev->data->dev_private; 889 struct mlx5_dev_config *config = &priv->config; 890 enum modify_reg start_reg; 891 bool skip_mtr_reg = false; 892 893 switch (feature) { 894 case MLX5_HAIRPIN_RX: 895 return REG_B; 896 case MLX5_HAIRPIN_TX: 897 return REG_A; 898 case MLX5_METADATA_RX: 899 switch (config->dv_xmeta_en) { 900 case MLX5_XMETA_MODE_LEGACY: 901 return REG_B; 902 case MLX5_XMETA_MODE_META16: 903 return REG_C_0; 904 case MLX5_XMETA_MODE_META32: 905 return REG_C_1; 906 } 907 break; 908 case MLX5_METADATA_TX: 909 return REG_A; 910 case MLX5_METADATA_FDB: 911 switch (config->dv_xmeta_en) { 912 case MLX5_XMETA_MODE_LEGACY: 913 return REG_NON; 914 case MLX5_XMETA_MODE_META16: 915 return REG_C_0; 916 case MLX5_XMETA_MODE_META32: 917 return REG_C_1; 918 } 919 break; 920 case MLX5_FLOW_MARK: 921 switch (config->dv_xmeta_en) { 922 case MLX5_XMETA_MODE_LEGACY: 923 return REG_NON; 924 case MLX5_XMETA_MODE_META16: 925 return REG_C_1; 926 case MLX5_XMETA_MODE_META32: 927 return REG_C_0; 928 } 929 break; 930 case MLX5_MTR_ID: 931 /* 932 * If meter color and meter id share one register, flow match 933 * should use the meter color register for match. 934 */ 935 if (priv->mtr_reg_share) 936 return priv->mtr_color_reg; 937 else 938 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 939 REG_C_3; 940 case MLX5_MTR_COLOR: 941 case MLX5_ASO_FLOW_HIT: 942 case MLX5_ASO_CONNTRACK: 943 case MLX5_SAMPLE_ID: 944 /* All features use the same REG_C. */ 945 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 946 return priv->mtr_color_reg; 947 case MLX5_COPY_MARK: 948 /* 949 * Metadata COPY_MARK register using is in meter suffix sub 950 * flow while with meter. It's safe to share the same register. 951 */ 952 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 953 case MLX5_APP_TAG: 954 /* 955 * If meter is enable, it will engage the register for color 956 * match and flow match. If meter color match is not using the 957 * REG_C_2, need to skip the REG_C_x be used by meter color 958 * match. 959 * If meter is disable, free to use all available registers. 960 */ 961 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 962 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 963 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 964 if (id > (uint32_t)(REG_C_7 - start_reg)) 965 return rte_flow_error_set(error, EINVAL, 966 RTE_FLOW_ERROR_TYPE_ITEM, 967 NULL, "invalid tag id"); 968 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 969 return rte_flow_error_set(error, ENOTSUP, 970 RTE_FLOW_ERROR_TYPE_ITEM, 971 NULL, "unsupported tag id"); 972 /* 973 * This case means meter is using the REG_C_x great than 2. 974 * Take care not to conflict with meter color REG_C_x. 975 * If the available index REG_C_y >= REG_C_x, skip the 976 * color register. 977 */ 978 if (skip_mtr_reg && priv->sh->flow_mreg_c 979 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 980 if (id >= (uint32_t)(REG_C_7 - start_reg)) 981 return rte_flow_error_set(error, EINVAL, 982 RTE_FLOW_ERROR_TYPE_ITEM, 983 NULL, "invalid tag id"); 984 if (priv->sh->flow_mreg_c 985 [id + 1 + start_reg - REG_C_0] != REG_NON) 986 return priv->sh->flow_mreg_c 987 [id + 1 + start_reg - REG_C_0]; 988 return rte_flow_error_set(error, ENOTSUP, 989 RTE_FLOW_ERROR_TYPE_ITEM, 990 NULL, "unsupported tag id"); 991 } 992 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0]; 993 } 994 MLX5_ASSERT(false); 995 return rte_flow_error_set(error, EINVAL, 996 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 997 NULL, "invalid feature name"); 998 } 999 1000 /** 1001 * Check extensive flow metadata register support. 1002 * 1003 * @param dev 1004 * Pointer to rte_eth_dev structure. 1005 * 1006 * @return 1007 * True if device supports extensive flow metadata register, otherwise false. 1008 */ 1009 bool 1010 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 1011 { 1012 struct mlx5_priv *priv = dev->data->dev_private; 1013 1014 /* 1015 * Having available reg_c can be regarded inclusively as supporting 1016 * extensive flow metadata register, which could mean, 1017 * - metadata register copy action by modify header. 1018 * - 16 modify header actions is supported. 1019 * - reg_c's are preserved across different domain (FDB and NIC) on 1020 * packet loopback by flow lookup miss. 1021 */ 1022 return priv->sh->flow_mreg_c[2] != REG_NON; 1023 } 1024 1025 /** 1026 * Get the lowest priority. 1027 * 1028 * @param[in] dev 1029 * Pointer to the Ethernet device structure. 1030 * @param[in] attributes 1031 * Pointer to device flow rule attributes. 1032 * 1033 * @return 1034 * The value of lowest priority of flow. 1035 */ 1036 uint32_t 1037 mlx5_get_lowest_priority(struct rte_eth_dev *dev, 1038 const struct rte_flow_attr *attr) 1039 { 1040 struct mlx5_priv *priv = dev->data->dev_private; 1041 1042 if (!attr->group && !attr->transfer) 1043 return priv->sh->flow_max_priority - 2; 1044 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1; 1045 } 1046 1047 /** 1048 * Calculate matcher priority of the flow. 1049 * 1050 * @param[in] dev 1051 * Pointer to the Ethernet device structure. 1052 * @param[in] attr 1053 * Pointer to device flow rule attributes. 1054 * @param[in] subpriority 1055 * The priority based on the items. 1056 * @param[in] external 1057 * Flow is user flow. 1058 * @return 1059 * The matcher priority of the flow. 1060 */ 1061 uint16_t 1062 mlx5_get_matcher_priority(struct rte_eth_dev *dev, 1063 const struct rte_flow_attr *attr, 1064 uint32_t subpriority, bool external) 1065 { 1066 uint16_t priority = (uint16_t)attr->priority; 1067 struct mlx5_priv *priv = dev->data->dev_private; 1068 1069 if (!attr->group && !attr->transfer) { 1070 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 1071 priority = priv->sh->flow_max_priority - 1; 1072 return mlx5_os_flow_adjust_priority(dev, priority, subpriority); 1073 } else if (!external && attr->transfer && attr->group == 0 && 1074 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) { 1075 return (priv->sh->flow_max_priority - 1) * 3; 1076 } 1077 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 1078 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO; 1079 return priority * 3 + subpriority; 1080 } 1081 1082 /** 1083 * Verify the @p item specifications (spec, last, mask) are compatible with the 1084 * NIC capabilities. 1085 * 1086 * @param[in] item 1087 * Item specification. 1088 * @param[in] mask 1089 * @p item->mask or flow default bit-masks. 1090 * @param[in] nic_mask 1091 * Bit-masks covering supported fields by the NIC to compare with user mask. 1092 * @param[in] size 1093 * Bit-masks size in bytes. 1094 * @param[in] range_accepted 1095 * True if range of values is accepted for specific fields, false otherwise. 1096 * @param[out] error 1097 * Pointer to error structure. 1098 * 1099 * @return 1100 * 0 on success, a negative errno value otherwise and rte_errno is set. 1101 */ 1102 int 1103 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 1104 const uint8_t *mask, 1105 const uint8_t *nic_mask, 1106 unsigned int size, 1107 bool range_accepted, 1108 struct rte_flow_error *error) 1109 { 1110 unsigned int i; 1111 1112 MLX5_ASSERT(nic_mask); 1113 for (i = 0; i < size; ++i) 1114 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 1115 return rte_flow_error_set(error, ENOTSUP, 1116 RTE_FLOW_ERROR_TYPE_ITEM, 1117 item, 1118 "mask enables non supported" 1119 " bits"); 1120 if (!item->spec && (item->mask || item->last)) 1121 return rte_flow_error_set(error, EINVAL, 1122 RTE_FLOW_ERROR_TYPE_ITEM, item, 1123 "mask/last without a spec is not" 1124 " supported"); 1125 if (item->spec && item->last && !range_accepted) { 1126 uint8_t spec[size]; 1127 uint8_t last[size]; 1128 unsigned int i; 1129 int ret; 1130 1131 for (i = 0; i < size; ++i) { 1132 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 1133 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 1134 } 1135 ret = memcmp(spec, last, size); 1136 if (ret != 0) 1137 return rte_flow_error_set(error, EINVAL, 1138 RTE_FLOW_ERROR_TYPE_ITEM, 1139 item, 1140 "range is not valid"); 1141 } 1142 return 0; 1143 } 1144 1145 /** 1146 * Adjust the hash fields according to the @p flow information. 1147 * 1148 * @param[in] dev_flow. 1149 * Pointer to the mlx5_flow. 1150 * @param[in] tunnel 1151 * 1 when the hash field is for a tunnel item. 1152 * @param[in] layer_types 1153 * RTE_ETH_RSS_* types. 1154 * @param[in] hash_fields 1155 * Item hash fields. 1156 * 1157 * @return 1158 * The hash fields that should be used. 1159 */ 1160 uint64_t 1161 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 1162 int tunnel __rte_unused, uint64_t layer_types, 1163 uint64_t hash_fields) 1164 { 1165 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1166 int rss_request_inner = rss_desc->level >= 2; 1167 1168 /* Check RSS hash level for tunnel. */ 1169 if (tunnel && rss_request_inner) 1170 hash_fields |= IBV_RX_HASH_INNER; 1171 else if (tunnel || rss_request_inner) 1172 return 0; 1173 #endif 1174 /* Check if requested layer matches RSS hash fields. */ 1175 if (!(rss_desc->types & layer_types)) 1176 return 0; 1177 return hash_fields; 1178 } 1179 1180 /** 1181 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 1182 * if several tunnel rules are used on this queue, the tunnel ptype will be 1183 * cleared. 1184 * 1185 * @param rxq_ctrl 1186 * Rx queue to update. 1187 */ 1188 static void 1189 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1190 { 1191 unsigned int i; 1192 uint32_t tunnel_ptype = 0; 1193 1194 /* Look up for the ptype to use. */ 1195 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1196 if (!rxq_ctrl->flow_tunnels_n[i]) 1197 continue; 1198 if (!tunnel_ptype) { 1199 tunnel_ptype = tunnels_info[i].ptype; 1200 } else { 1201 tunnel_ptype = 0; 1202 break; 1203 } 1204 } 1205 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1206 } 1207 1208 /** 1209 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1210 * flow. 1211 * 1212 * @param[in] dev 1213 * Pointer to the Ethernet device structure. 1214 * @param[in] dev_handle 1215 * Pointer to device flow handle structure. 1216 */ 1217 void 1218 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1219 struct mlx5_flow_handle *dev_handle) 1220 { 1221 struct mlx5_priv *priv = dev->data->dev_private; 1222 const int mark = dev_handle->mark; 1223 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1224 struct mlx5_ind_table_obj *ind_tbl = NULL; 1225 unsigned int i; 1226 1227 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1228 struct mlx5_hrxq *hrxq; 1229 1230 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1231 dev_handle->rix_hrxq); 1232 if (hrxq) 1233 ind_tbl = hrxq->ind_table; 1234 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1235 struct mlx5_shared_action_rss *shared_rss; 1236 1237 shared_rss = mlx5_ipool_get 1238 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1239 dev_handle->rix_srss); 1240 if (shared_rss) 1241 ind_tbl = shared_rss->ind_tbl; 1242 } 1243 if (!ind_tbl) 1244 return; 1245 for (i = 0; i != ind_tbl->queues_n; ++i) { 1246 int idx = ind_tbl->queues[i]; 1247 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx); 1248 1249 MLX5_ASSERT(rxq_ctrl != NULL); 1250 if (rxq_ctrl == NULL) 1251 continue; 1252 /* 1253 * To support metadata register copy on Tx loopback, 1254 * this must be always enabled (metadata may arive 1255 * from other port - not from local flows only. 1256 */ 1257 if (priv->config.dv_flow_en && 1258 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1259 mlx5_flow_ext_mreg_supported(dev)) { 1260 rxq_ctrl->rxq.mark = 1; 1261 rxq_ctrl->flow_mark_n = 1; 1262 } else if (mark) { 1263 rxq_ctrl->rxq.mark = 1; 1264 rxq_ctrl->flow_mark_n++; 1265 } 1266 if (tunnel) { 1267 unsigned int j; 1268 1269 /* Increase the counter matching the flow. */ 1270 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1271 if ((tunnels_info[j].tunnel & 1272 dev_handle->layers) == 1273 tunnels_info[j].tunnel) { 1274 rxq_ctrl->flow_tunnels_n[j]++; 1275 break; 1276 } 1277 } 1278 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1279 } 1280 } 1281 } 1282 1283 /** 1284 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1285 * 1286 * @param[in] dev 1287 * Pointer to the Ethernet device structure. 1288 * @param[in] flow 1289 * Pointer to flow structure. 1290 */ 1291 static void 1292 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1293 { 1294 struct mlx5_priv *priv = dev->data->dev_private; 1295 uint32_t handle_idx; 1296 struct mlx5_flow_handle *dev_handle; 1297 1298 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1299 handle_idx, dev_handle, next) 1300 flow_drv_rxq_flags_set(dev, dev_handle); 1301 } 1302 1303 /** 1304 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1305 * device flow if no other flow uses it with the same kind of request. 1306 * 1307 * @param dev 1308 * Pointer to Ethernet device. 1309 * @param[in] dev_handle 1310 * Pointer to the device flow handle structure. 1311 */ 1312 static void 1313 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1314 struct mlx5_flow_handle *dev_handle) 1315 { 1316 struct mlx5_priv *priv = dev->data->dev_private; 1317 const int mark = dev_handle->mark; 1318 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1319 struct mlx5_ind_table_obj *ind_tbl = NULL; 1320 unsigned int i; 1321 1322 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1323 struct mlx5_hrxq *hrxq; 1324 1325 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1326 dev_handle->rix_hrxq); 1327 if (hrxq) 1328 ind_tbl = hrxq->ind_table; 1329 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1330 struct mlx5_shared_action_rss *shared_rss; 1331 1332 shared_rss = mlx5_ipool_get 1333 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1334 dev_handle->rix_srss); 1335 if (shared_rss) 1336 ind_tbl = shared_rss->ind_tbl; 1337 } 1338 if (!ind_tbl) 1339 return; 1340 MLX5_ASSERT(dev->data->dev_started); 1341 for (i = 0; i != ind_tbl->queues_n; ++i) { 1342 int idx = ind_tbl->queues[i]; 1343 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx); 1344 1345 MLX5_ASSERT(rxq_ctrl != NULL); 1346 if (rxq_ctrl == NULL) 1347 continue; 1348 if (priv->config.dv_flow_en && 1349 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1350 mlx5_flow_ext_mreg_supported(dev)) { 1351 rxq_ctrl->rxq.mark = 1; 1352 rxq_ctrl->flow_mark_n = 1; 1353 } else if (mark) { 1354 rxq_ctrl->flow_mark_n--; 1355 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1356 } 1357 if (tunnel) { 1358 unsigned int j; 1359 1360 /* Decrease the counter matching the flow. */ 1361 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1362 if ((tunnels_info[j].tunnel & 1363 dev_handle->layers) == 1364 tunnels_info[j].tunnel) { 1365 rxq_ctrl->flow_tunnels_n[j]--; 1366 break; 1367 } 1368 } 1369 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1370 } 1371 } 1372 } 1373 1374 /** 1375 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1376 * @p flow if no other flow uses it with the same kind of request. 1377 * 1378 * @param dev 1379 * Pointer to Ethernet device. 1380 * @param[in] flow 1381 * Pointer to the flow. 1382 */ 1383 static void 1384 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1385 { 1386 struct mlx5_priv *priv = dev->data->dev_private; 1387 uint32_t handle_idx; 1388 struct mlx5_flow_handle *dev_handle; 1389 1390 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1391 handle_idx, dev_handle, next) 1392 flow_drv_rxq_flags_trim(dev, dev_handle); 1393 } 1394 1395 /** 1396 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1397 * 1398 * @param dev 1399 * Pointer to Ethernet device. 1400 */ 1401 static void 1402 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1403 { 1404 struct mlx5_priv *priv = dev->data->dev_private; 1405 unsigned int i; 1406 1407 for (i = 0; i != priv->rxqs_n; ++i) { 1408 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i); 1409 unsigned int j; 1410 1411 if (rxq == NULL || rxq->ctrl == NULL) 1412 continue; 1413 rxq->ctrl->flow_mark_n = 0; 1414 rxq->ctrl->rxq.mark = 0; 1415 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1416 rxq->ctrl->flow_tunnels_n[j] = 0; 1417 rxq->ctrl->rxq.tunnel = 0; 1418 } 1419 } 1420 1421 /** 1422 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1423 * 1424 * @param[in] dev 1425 * Pointer to the Ethernet device structure. 1426 */ 1427 void 1428 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1429 { 1430 struct mlx5_priv *priv = dev->data->dev_private; 1431 unsigned int i; 1432 1433 for (i = 0; i != priv->rxqs_n; ++i) { 1434 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i); 1435 struct mlx5_rxq_data *data; 1436 1437 if (rxq == NULL || rxq->ctrl == NULL) 1438 continue; 1439 data = &rxq->ctrl->rxq; 1440 if (!rte_flow_dynf_metadata_avail()) { 1441 data->dynf_meta = 0; 1442 data->flow_meta_mask = 0; 1443 data->flow_meta_offset = -1; 1444 data->flow_meta_port_mask = 0; 1445 } else { 1446 data->dynf_meta = 1; 1447 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1448 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1449 data->flow_meta_port_mask = priv->sh->dv_meta_mask; 1450 } 1451 } 1452 } 1453 1454 /* 1455 * return a pointer to the desired action in the list of actions. 1456 * 1457 * @param[in] actions 1458 * The list of actions to search the action in. 1459 * @param[in] action 1460 * The action to find. 1461 * 1462 * @return 1463 * Pointer to the action in the list, if found. NULL otherwise. 1464 */ 1465 const struct rte_flow_action * 1466 mlx5_flow_find_action(const struct rte_flow_action *actions, 1467 enum rte_flow_action_type action) 1468 { 1469 if (actions == NULL) 1470 return NULL; 1471 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1472 if (actions->type == action) 1473 return actions; 1474 return NULL; 1475 } 1476 1477 /* 1478 * Validate the flag action. 1479 * 1480 * @param[in] action_flags 1481 * Bit-fields that holds the actions detected until now. 1482 * @param[in] attr 1483 * Attributes of flow that includes this action. 1484 * @param[out] error 1485 * Pointer to error structure. 1486 * 1487 * @return 1488 * 0 on success, a negative errno value otherwise and rte_errno is set. 1489 */ 1490 int 1491 mlx5_flow_validate_action_flag(uint64_t action_flags, 1492 const struct rte_flow_attr *attr, 1493 struct rte_flow_error *error) 1494 { 1495 if (action_flags & MLX5_FLOW_ACTION_MARK) 1496 return rte_flow_error_set(error, EINVAL, 1497 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1498 "can't mark and flag in same flow"); 1499 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1500 return rte_flow_error_set(error, EINVAL, 1501 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1502 "can't have 2 flag" 1503 " actions in same flow"); 1504 if (attr->egress) 1505 return rte_flow_error_set(error, ENOTSUP, 1506 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1507 "flag action not supported for " 1508 "egress"); 1509 return 0; 1510 } 1511 1512 /* 1513 * Validate the mark action. 1514 * 1515 * @param[in] action 1516 * Pointer to the queue action. 1517 * @param[in] action_flags 1518 * Bit-fields that holds the actions detected until now. 1519 * @param[in] attr 1520 * Attributes of flow that includes this action. 1521 * @param[out] error 1522 * Pointer to error structure. 1523 * 1524 * @return 1525 * 0 on success, a negative errno value otherwise and rte_errno is set. 1526 */ 1527 int 1528 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1529 uint64_t action_flags, 1530 const struct rte_flow_attr *attr, 1531 struct rte_flow_error *error) 1532 { 1533 const struct rte_flow_action_mark *mark = action->conf; 1534 1535 if (!mark) 1536 return rte_flow_error_set(error, EINVAL, 1537 RTE_FLOW_ERROR_TYPE_ACTION, 1538 action, 1539 "configuration cannot be null"); 1540 if (mark->id >= MLX5_FLOW_MARK_MAX) 1541 return rte_flow_error_set(error, EINVAL, 1542 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1543 &mark->id, 1544 "mark id must in 0 <= id < " 1545 RTE_STR(MLX5_FLOW_MARK_MAX)); 1546 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1547 return rte_flow_error_set(error, EINVAL, 1548 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1549 "can't flag and mark in same flow"); 1550 if (action_flags & MLX5_FLOW_ACTION_MARK) 1551 return rte_flow_error_set(error, EINVAL, 1552 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1553 "can't have 2 mark actions in same" 1554 " flow"); 1555 if (attr->egress) 1556 return rte_flow_error_set(error, ENOTSUP, 1557 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1558 "mark action not supported for " 1559 "egress"); 1560 return 0; 1561 } 1562 1563 /* 1564 * Validate the drop action. 1565 * 1566 * @param[in] action_flags 1567 * Bit-fields that holds the actions detected until now. 1568 * @param[in] attr 1569 * Attributes of flow that includes this action. 1570 * @param[out] error 1571 * Pointer to error structure. 1572 * 1573 * @return 1574 * 0 on success, a negative errno value otherwise and rte_errno is set. 1575 */ 1576 int 1577 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1578 const struct rte_flow_attr *attr, 1579 struct rte_flow_error *error) 1580 { 1581 if (attr->egress) 1582 return rte_flow_error_set(error, ENOTSUP, 1583 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1584 "drop action not supported for " 1585 "egress"); 1586 return 0; 1587 } 1588 1589 /* 1590 * Validate the queue action. 1591 * 1592 * @param[in] action 1593 * Pointer to the queue action. 1594 * @param[in] action_flags 1595 * Bit-fields that holds the actions detected until now. 1596 * @param[in] dev 1597 * Pointer to the Ethernet device structure. 1598 * @param[in] attr 1599 * Attributes of flow that includes this action. 1600 * @param[out] error 1601 * Pointer to error structure. 1602 * 1603 * @return 1604 * 0 on success, a negative errno value otherwise and rte_errno is set. 1605 */ 1606 int 1607 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1608 uint64_t action_flags, 1609 struct rte_eth_dev *dev, 1610 const struct rte_flow_attr *attr, 1611 struct rte_flow_error *error) 1612 { 1613 struct mlx5_priv *priv = dev->data->dev_private; 1614 const struct rte_flow_action_queue *queue = action->conf; 1615 1616 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1617 return rte_flow_error_set(error, EINVAL, 1618 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1619 "can't have 2 fate actions in" 1620 " same flow"); 1621 if (!priv->rxqs_n) 1622 return rte_flow_error_set(error, EINVAL, 1623 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1624 NULL, "No Rx queues configured"); 1625 if (queue->index >= priv->rxqs_n) 1626 return rte_flow_error_set(error, EINVAL, 1627 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1628 &queue->index, 1629 "queue index out of range"); 1630 if (mlx5_rxq_get(dev, queue->index) == NULL) 1631 return rte_flow_error_set(error, EINVAL, 1632 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1633 &queue->index, 1634 "queue is not configured"); 1635 if (attr->egress) 1636 return rte_flow_error_set(error, ENOTSUP, 1637 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1638 "queue action not supported for " 1639 "egress"); 1640 return 0; 1641 } 1642 1643 /** 1644 * Validate queue numbers for device RSS. 1645 * 1646 * @param[in] dev 1647 * Configured device. 1648 * @param[in] queues 1649 * Array of queue numbers. 1650 * @param[in] queues_n 1651 * Size of the @p queues array. 1652 * @param[out] error 1653 * On error, filled with a textual error description. 1654 * @param[out] queue 1655 * On error, filled with an offending queue index in @p queues array. 1656 * 1657 * @return 1658 * 0 on success, a negative errno code on error. 1659 */ 1660 static int 1661 mlx5_validate_rss_queues(struct rte_eth_dev *dev, 1662 const uint16_t *queues, uint32_t queues_n, 1663 const char **error, uint32_t *queue_idx) 1664 { 1665 const struct mlx5_priv *priv = dev->data->dev_private; 1666 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; 1667 uint32_t i; 1668 1669 for (i = 0; i != queues_n; ++i) { 1670 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, 1671 queues[i]); 1672 1673 if (queues[i] >= priv->rxqs_n) { 1674 *error = "queue index out of range"; 1675 *queue_idx = i; 1676 return -EINVAL; 1677 } 1678 if (rxq_ctrl == NULL) { 1679 *error = "queue is not configured"; 1680 *queue_idx = i; 1681 return -EINVAL; 1682 } 1683 if (i == 0) 1684 rxq_type = rxq_ctrl->type; 1685 if (rxq_type != rxq_ctrl->type) { 1686 *error = "combining hairpin and regular RSS queues is not supported"; 1687 *queue_idx = i; 1688 return -ENOTSUP; 1689 } 1690 } 1691 return 0; 1692 } 1693 1694 /* 1695 * Validate the rss action. 1696 * 1697 * @param[in] dev 1698 * Pointer to the Ethernet device structure. 1699 * @param[in] action 1700 * Pointer to the queue action. 1701 * @param[out] error 1702 * Pointer to error structure. 1703 * 1704 * @return 1705 * 0 on success, a negative errno value otherwise and rte_errno is set. 1706 */ 1707 int 1708 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1709 const struct rte_flow_action *action, 1710 struct rte_flow_error *error) 1711 { 1712 struct mlx5_priv *priv = dev->data->dev_private; 1713 const struct rte_flow_action_rss *rss = action->conf; 1714 int ret; 1715 const char *message; 1716 uint32_t queue_idx; 1717 1718 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1719 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1720 return rte_flow_error_set(error, ENOTSUP, 1721 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1722 &rss->func, 1723 "RSS hash function not supported"); 1724 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1725 if (rss->level > 2) 1726 #else 1727 if (rss->level > 1) 1728 #endif 1729 return rte_flow_error_set(error, ENOTSUP, 1730 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1731 &rss->level, 1732 "tunnel RSS is not supported"); 1733 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1734 if (rss->key_len == 0 && rss->key != NULL) 1735 return rte_flow_error_set(error, ENOTSUP, 1736 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1737 &rss->key_len, 1738 "RSS hash key length 0"); 1739 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1740 return rte_flow_error_set(error, ENOTSUP, 1741 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1742 &rss->key_len, 1743 "RSS hash key too small"); 1744 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1745 return rte_flow_error_set(error, ENOTSUP, 1746 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1747 &rss->key_len, 1748 "RSS hash key too large"); 1749 if (rss->queue_num > priv->config.ind_table_max_size) 1750 return rte_flow_error_set(error, ENOTSUP, 1751 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1752 &rss->queue_num, 1753 "number of queues too large"); 1754 if (rss->types & MLX5_RSS_HF_MASK) 1755 return rte_flow_error_set(error, ENOTSUP, 1756 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1757 &rss->types, 1758 "some RSS protocols are not" 1759 " supported"); 1760 if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) && 1761 !(rss->types & RTE_ETH_RSS_IP)) 1762 return rte_flow_error_set(error, EINVAL, 1763 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1764 "L3 partial RSS requested but L3 RSS" 1765 " type not specified"); 1766 if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) && 1767 !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP))) 1768 return rte_flow_error_set(error, EINVAL, 1769 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1770 "L4 partial RSS requested but L4 RSS" 1771 " type not specified"); 1772 if (!priv->rxqs_n) 1773 return rte_flow_error_set(error, EINVAL, 1774 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1775 NULL, "No Rx queues configured"); 1776 if (!rss->queue_num) 1777 return rte_flow_error_set(error, EINVAL, 1778 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1779 NULL, "No queues configured"); 1780 ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num, 1781 &message, &queue_idx); 1782 if (ret != 0) { 1783 return rte_flow_error_set(error, -ret, 1784 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1785 &rss->queue[queue_idx], message); 1786 } 1787 return 0; 1788 } 1789 1790 /* 1791 * Validate the rss action. 1792 * 1793 * @param[in] action 1794 * Pointer to the queue action. 1795 * @param[in] action_flags 1796 * Bit-fields that holds the actions detected until now. 1797 * @param[in] dev 1798 * Pointer to the Ethernet device structure. 1799 * @param[in] attr 1800 * Attributes of flow that includes this action. 1801 * @param[in] item_flags 1802 * Items that were detected. 1803 * @param[out] error 1804 * Pointer to error structure. 1805 * 1806 * @return 1807 * 0 on success, a negative errno value otherwise and rte_errno is set. 1808 */ 1809 int 1810 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1811 uint64_t action_flags, 1812 struct rte_eth_dev *dev, 1813 const struct rte_flow_attr *attr, 1814 uint64_t item_flags, 1815 struct rte_flow_error *error) 1816 { 1817 const struct rte_flow_action_rss *rss = action->conf; 1818 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1819 int ret; 1820 1821 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1822 return rte_flow_error_set(error, EINVAL, 1823 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1824 "can't have 2 fate actions" 1825 " in same flow"); 1826 ret = mlx5_validate_action_rss(dev, action, error); 1827 if (ret) 1828 return ret; 1829 if (attr->egress) 1830 return rte_flow_error_set(error, ENOTSUP, 1831 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1832 "rss action not supported for " 1833 "egress"); 1834 if (rss->level > 1 && !tunnel) 1835 return rte_flow_error_set(error, EINVAL, 1836 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1837 "inner RSS is not supported for " 1838 "non-tunnel flows"); 1839 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1840 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1841 return rte_flow_error_set(error, EINVAL, 1842 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1843 "RSS on eCPRI is not supported now"); 1844 } 1845 if ((item_flags & MLX5_FLOW_LAYER_MPLS) && 1846 !(item_flags & 1847 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) && 1848 rss->level > 1) 1849 return rte_flow_error_set(error, EINVAL, 1850 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1851 "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern"); 1852 return 0; 1853 } 1854 1855 /* 1856 * Validate the default miss action. 1857 * 1858 * @param[in] action_flags 1859 * Bit-fields that holds the actions detected until now. 1860 * @param[out] error 1861 * Pointer to error structure. 1862 * 1863 * @return 1864 * 0 on success, a negative errno value otherwise and rte_errno is set. 1865 */ 1866 int 1867 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1868 const struct rte_flow_attr *attr, 1869 struct rte_flow_error *error) 1870 { 1871 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1872 return rte_flow_error_set(error, EINVAL, 1873 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1874 "can't have 2 fate actions in" 1875 " same flow"); 1876 if (attr->egress) 1877 return rte_flow_error_set(error, ENOTSUP, 1878 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1879 "default miss action not supported " 1880 "for egress"); 1881 if (attr->group) 1882 return rte_flow_error_set(error, ENOTSUP, 1883 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1884 "only group 0 is supported"); 1885 if (attr->transfer) 1886 return rte_flow_error_set(error, ENOTSUP, 1887 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1888 NULL, "transfer is not supported"); 1889 return 0; 1890 } 1891 1892 /* 1893 * Validate the count action. 1894 * 1895 * @param[in] dev 1896 * Pointer to the Ethernet device structure. 1897 * @param[in] attr 1898 * Attributes of flow that includes this action. 1899 * @param[out] error 1900 * Pointer to error structure. 1901 * 1902 * @return 1903 * 0 on success, a negative errno value otherwise and rte_errno is set. 1904 */ 1905 int 1906 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1907 const struct rte_flow_attr *attr, 1908 struct rte_flow_error *error) 1909 { 1910 if (attr->egress) 1911 return rte_flow_error_set(error, ENOTSUP, 1912 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1913 "count action not supported for " 1914 "egress"); 1915 return 0; 1916 } 1917 1918 /* 1919 * Validate the ASO CT action. 1920 * 1921 * @param[in] dev 1922 * Pointer to the Ethernet device structure. 1923 * @param[in] conntrack 1924 * Pointer to the CT action profile. 1925 * @param[out] error 1926 * Pointer to error structure. 1927 * 1928 * @return 1929 * 0 on success, a negative errno value otherwise and rte_errno is set. 1930 */ 1931 int 1932 mlx5_validate_action_ct(struct rte_eth_dev *dev, 1933 const struct rte_flow_action_conntrack *conntrack, 1934 struct rte_flow_error *error) 1935 { 1936 RTE_SET_USED(dev); 1937 1938 if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT) 1939 return rte_flow_error_set(error, EINVAL, 1940 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1941 "Invalid CT state"); 1942 if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST) 1943 return rte_flow_error_set(error, EINVAL, 1944 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1945 "Invalid last TCP packet flag"); 1946 return 0; 1947 } 1948 1949 /** 1950 * Verify the @p attributes will be correctly understood by the NIC and store 1951 * them in the @p flow if everything is correct. 1952 * 1953 * @param[in] dev 1954 * Pointer to the Ethernet device structure. 1955 * @param[in] attributes 1956 * Pointer to flow attributes 1957 * @param[out] error 1958 * Pointer to error structure. 1959 * 1960 * @return 1961 * 0 on success, a negative errno value otherwise and rte_errno is set. 1962 */ 1963 int 1964 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1965 const struct rte_flow_attr *attributes, 1966 struct rte_flow_error *error) 1967 { 1968 struct mlx5_priv *priv = dev->data->dev_private; 1969 uint32_t priority_max = priv->sh->flow_max_priority - 1; 1970 1971 if (attributes->group) 1972 return rte_flow_error_set(error, ENOTSUP, 1973 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1974 NULL, "groups is not supported"); 1975 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR && 1976 attributes->priority >= priority_max) 1977 return rte_flow_error_set(error, ENOTSUP, 1978 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1979 NULL, "priority out of range"); 1980 if (attributes->egress) 1981 return rte_flow_error_set(error, ENOTSUP, 1982 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1983 "egress is not supported"); 1984 if (attributes->transfer && !priv->config.dv_esw_en) 1985 return rte_flow_error_set(error, ENOTSUP, 1986 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1987 NULL, "transfer is not supported"); 1988 if (!attributes->ingress) 1989 return rte_flow_error_set(error, EINVAL, 1990 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1991 NULL, 1992 "ingress attribute is mandatory"); 1993 return 0; 1994 } 1995 1996 /** 1997 * Validate ICMP6 item. 1998 * 1999 * @param[in] item 2000 * Item specification. 2001 * @param[in] item_flags 2002 * Bit-fields that holds the items detected until now. 2003 * @param[in] ext_vlan_sup 2004 * Whether extended VLAN features are supported or not. 2005 * @param[out] error 2006 * Pointer to error structure. 2007 * 2008 * @return 2009 * 0 on success, a negative errno value otherwise and rte_errno is set. 2010 */ 2011 int 2012 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 2013 uint64_t item_flags, 2014 uint8_t target_protocol, 2015 struct rte_flow_error *error) 2016 { 2017 const struct rte_flow_item_icmp6 *mask = item->mask; 2018 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2019 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 2020 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 2021 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2022 MLX5_FLOW_LAYER_OUTER_L4; 2023 int ret; 2024 2025 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 2026 return rte_flow_error_set(error, EINVAL, 2027 RTE_FLOW_ERROR_TYPE_ITEM, item, 2028 "protocol filtering not compatible" 2029 " with ICMP6 layer"); 2030 if (!(item_flags & l3m)) 2031 return rte_flow_error_set(error, EINVAL, 2032 RTE_FLOW_ERROR_TYPE_ITEM, item, 2033 "IPv6 is mandatory to filter on" 2034 " ICMP6"); 2035 if (item_flags & l4m) 2036 return rte_flow_error_set(error, EINVAL, 2037 RTE_FLOW_ERROR_TYPE_ITEM, item, 2038 "multiple L4 layers not supported"); 2039 if (!mask) 2040 mask = &rte_flow_item_icmp6_mask; 2041 ret = mlx5_flow_item_acceptable 2042 (item, (const uint8_t *)mask, 2043 (const uint8_t *)&rte_flow_item_icmp6_mask, 2044 sizeof(struct rte_flow_item_icmp6), 2045 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2046 if (ret < 0) 2047 return ret; 2048 return 0; 2049 } 2050 2051 /** 2052 * Validate ICMP item. 2053 * 2054 * @param[in] item 2055 * Item specification. 2056 * @param[in] item_flags 2057 * Bit-fields that holds the items detected until now. 2058 * @param[out] error 2059 * Pointer to error structure. 2060 * 2061 * @return 2062 * 0 on success, a negative errno value otherwise and rte_errno is set. 2063 */ 2064 int 2065 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 2066 uint64_t item_flags, 2067 uint8_t target_protocol, 2068 struct rte_flow_error *error) 2069 { 2070 const struct rte_flow_item_icmp *mask = item->mask; 2071 const struct rte_flow_item_icmp nic_mask = { 2072 .hdr.icmp_type = 0xff, 2073 .hdr.icmp_code = 0xff, 2074 .hdr.icmp_ident = RTE_BE16(0xffff), 2075 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 2076 }; 2077 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2078 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 2079 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 2080 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2081 MLX5_FLOW_LAYER_OUTER_L4; 2082 int ret; 2083 2084 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 2085 return rte_flow_error_set(error, EINVAL, 2086 RTE_FLOW_ERROR_TYPE_ITEM, item, 2087 "protocol filtering not compatible" 2088 " with ICMP layer"); 2089 if (!(item_flags & l3m)) 2090 return rte_flow_error_set(error, EINVAL, 2091 RTE_FLOW_ERROR_TYPE_ITEM, item, 2092 "IPv4 is mandatory to filter" 2093 " on ICMP"); 2094 if (item_flags & l4m) 2095 return rte_flow_error_set(error, EINVAL, 2096 RTE_FLOW_ERROR_TYPE_ITEM, item, 2097 "multiple L4 layers not supported"); 2098 if (!mask) 2099 mask = &nic_mask; 2100 ret = mlx5_flow_item_acceptable 2101 (item, (const uint8_t *)mask, 2102 (const uint8_t *)&nic_mask, 2103 sizeof(struct rte_flow_item_icmp), 2104 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2105 if (ret < 0) 2106 return ret; 2107 return 0; 2108 } 2109 2110 /** 2111 * Validate Ethernet item. 2112 * 2113 * @param[in] item 2114 * Item specification. 2115 * @param[in] item_flags 2116 * Bit-fields that holds the items detected until now. 2117 * @param[out] error 2118 * Pointer to error structure. 2119 * 2120 * @return 2121 * 0 on success, a negative errno value otherwise and rte_errno is set. 2122 */ 2123 int 2124 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 2125 uint64_t item_flags, bool ext_vlan_sup, 2126 struct rte_flow_error *error) 2127 { 2128 const struct rte_flow_item_eth *mask = item->mask; 2129 const struct rte_flow_item_eth nic_mask = { 2130 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 2131 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 2132 .type = RTE_BE16(0xffff), 2133 .has_vlan = ext_vlan_sup ? 1 : 0, 2134 }; 2135 int ret; 2136 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2137 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 2138 MLX5_FLOW_LAYER_OUTER_L2; 2139 2140 if (item_flags & ethm) 2141 return rte_flow_error_set(error, ENOTSUP, 2142 RTE_FLOW_ERROR_TYPE_ITEM, item, 2143 "multiple L2 layers not supported"); 2144 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 2145 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 2146 return rte_flow_error_set(error, EINVAL, 2147 RTE_FLOW_ERROR_TYPE_ITEM, item, 2148 "L2 layer should not follow " 2149 "L3 layers"); 2150 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 2151 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 2152 return rte_flow_error_set(error, EINVAL, 2153 RTE_FLOW_ERROR_TYPE_ITEM, item, 2154 "L2 layer should not follow VLAN"); 2155 if (item_flags & MLX5_FLOW_LAYER_GTP) 2156 return rte_flow_error_set(error, EINVAL, 2157 RTE_FLOW_ERROR_TYPE_ITEM, item, 2158 "L2 layer should not follow GTP"); 2159 if (!mask) 2160 mask = &rte_flow_item_eth_mask; 2161 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2162 (const uint8_t *)&nic_mask, 2163 sizeof(struct rte_flow_item_eth), 2164 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2165 return ret; 2166 } 2167 2168 /** 2169 * Validate VLAN item. 2170 * 2171 * @param[in] item 2172 * Item specification. 2173 * @param[in] item_flags 2174 * Bit-fields that holds the items detected until now. 2175 * @param[in] dev 2176 * Ethernet device flow is being created on. 2177 * @param[out] error 2178 * Pointer to error structure. 2179 * 2180 * @return 2181 * 0 on success, a negative errno value otherwise and rte_errno is set. 2182 */ 2183 int 2184 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 2185 uint64_t item_flags, 2186 struct rte_eth_dev *dev, 2187 struct rte_flow_error *error) 2188 { 2189 const struct rte_flow_item_vlan *spec = item->spec; 2190 const struct rte_flow_item_vlan *mask = item->mask; 2191 const struct rte_flow_item_vlan nic_mask = { 2192 .tci = RTE_BE16(UINT16_MAX), 2193 .inner_type = RTE_BE16(UINT16_MAX), 2194 }; 2195 uint16_t vlan_tag = 0; 2196 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2197 int ret; 2198 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 2199 MLX5_FLOW_LAYER_INNER_L4) : 2200 (MLX5_FLOW_LAYER_OUTER_L3 | 2201 MLX5_FLOW_LAYER_OUTER_L4); 2202 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 2203 MLX5_FLOW_LAYER_OUTER_VLAN; 2204 2205 if (item_flags & vlanm) 2206 return rte_flow_error_set(error, EINVAL, 2207 RTE_FLOW_ERROR_TYPE_ITEM, item, 2208 "multiple VLAN layers not supported"); 2209 else if ((item_flags & l34m) != 0) 2210 return rte_flow_error_set(error, EINVAL, 2211 RTE_FLOW_ERROR_TYPE_ITEM, item, 2212 "VLAN cannot follow L3/L4 layer"); 2213 if (!mask) 2214 mask = &rte_flow_item_vlan_mask; 2215 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2216 (const uint8_t *)&nic_mask, 2217 sizeof(struct rte_flow_item_vlan), 2218 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2219 if (ret) 2220 return ret; 2221 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 2222 struct mlx5_priv *priv = dev->data->dev_private; 2223 2224 if (priv->vmwa_context) { 2225 /* 2226 * Non-NULL context means we have a virtual machine 2227 * and SR-IOV enabled, we have to create VLAN interface 2228 * to make hypervisor to setup E-Switch vport 2229 * context correctly. We avoid creating the multiple 2230 * VLAN interfaces, so we cannot support VLAN tag mask. 2231 */ 2232 return rte_flow_error_set(error, EINVAL, 2233 RTE_FLOW_ERROR_TYPE_ITEM, 2234 item, 2235 "VLAN tag mask is not" 2236 " supported in virtual" 2237 " environment"); 2238 } 2239 } 2240 if (spec) { 2241 vlan_tag = spec->tci; 2242 vlan_tag &= mask->tci; 2243 } 2244 /* 2245 * From verbs perspective an empty VLAN is equivalent 2246 * to a packet without VLAN layer. 2247 */ 2248 if (!vlan_tag) 2249 return rte_flow_error_set(error, EINVAL, 2250 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 2251 item->spec, 2252 "VLAN cannot be empty"); 2253 return 0; 2254 } 2255 2256 /** 2257 * Validate IPV4 item. 2258 * 2259 * @param[in] item 2260 * Item specification. 2261 * @param[in] item_flags 2262 * Bit-fields that holds the items detected until now. 2263 * @param[in] last_item 2264 * Previous validated item in the pattern items. 2265 * @param[in] ether_type 2266 * Type in the ethernet layer header (including dot1q). 2267 * @param[in] acc_mask 2268 * Acceptable mask, if NULL default internal default mask 2269 * will be used to check whether item fields are supported. 2270 * @param[in] range_accepted 2271 * True if range of values is accepted for specific fields, false otherwise. 2272 * @param[out] error 2273 * Pointer to error structure. 2274 * 2275 * @return 2276 * 0 on success, a negative errno value otherwise and rte_errno is set. 2277 */ 2278 int 2279 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2280 uint64_t item_flags, 2281 uint64_t last_item, 2282 uint16_t ether_type, 2283 const struct rte_flow_item_ipv4 *acc_mask, 2284 bool range_accepted, 2285 struct rte_flow_error *error) 2286 { 2287 const struct rte_flow_item_ipv4 *mask = item->mask; 2288 const struct rte_flow_item_ipv4 *spec = item->spec; 2289 const struct rte_flow_item_ipv4 nic_mask = { 2290 .hdr = { 2291 .src_addr = RTE_BE32(0xffffffff), 2292 .dst_addr = RTE_BE32(0xffffffff), 2293 .type_of_service = 0xff, 2294 .next_proto_id = 0xff, 2295 }, 2296 }; 2297 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2298 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2299 MLX5_FLOW_LAYER_OUTER_L3; 2300 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2301 MLX5_FLOW_LAYER_OUTER_L4; 2302 int ret; 2303 uint8_t next_proto = 0xFF; 2304 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2305 MLX5_FLOW_LAYER_OUTER_VLAN | 2306 MLX5_FLOW_LAYER_INNER_VLAN); 2307 2308 if ((last_item & l2_vlan) && ether_type && 2309 ether_type != RTE_ETHER_TYPE_IPV4) 2310 return rte_flow_error_set(error, EINVAL, 2311 RTE_FLOW_ERROR_TYPE_ITEM, item, 2312 "IPv4 cannot follow L2/VLAN layer " 2313 "which ether type is not IPv4"); 2314 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2315 if (mask && spec) 2316 next_proto = mask->hdr.next_proto_id & 2317 spec->hdr.next_proto_id; 2318 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2319 return rte_flow_error_set(error, EINVAL, 2320 RTE_FLOW_ERROR_TYPE_ITEM, 2321 item, 2322 "multiple tunnel " 2323 "not supported"); 2324 } 2325 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2326 return rte_flow_error_set(error, EINVAL, 2327 RTE_FLOW_ERROR_TYPE_ITEM, item, 2328 "wrong tunnel type - IPv6 specified " 2329 "but IPv4 item provided"); 2330 if (item_flags & l3m) 2331 return rte_flow_error_set(error, ENOTSUP, 2332 RTE_FLOW_ERROR_TYPE_ITEM, item, 2333 "multiple L3 layers not supported"); 2334 else if (item_flags & l4m) 2335 return rte_flow_error_set(error, EINVAL, 2336 RTE_FLOW_ERROR_TYPE_ITEM, item, 2337 "L3 cannot follow an L4 layer."); 2338 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2339 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2340 return rte_flow_error_set(error, EINVAL, 2341 RTE_FLOW_ERROR_TYPE_ITEM, item, 2342 "L3 cannot follow an NVGRE layer."); 2343 if (!mask) 2344 mask = &rte_flow_item_ipv4_mask; 2345 else if (mask->hdr.next_proto_id != 0 && 2346 mask->hdr.next_proto_id != 0xff) 2347 return rte_flow_error_set(error, EINVAL, 2348 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2349 "partial mask is not supported" 2350 " for protocol"); 2351 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2352 acc_mask ? (const uint8_t *)acc_mask 2353 : (const uint8_t *)&nic_mask, 2354 sizeof(struct rte_flow_item_ipv4), 2355 range_accepted, error); 2356 if (ret < 0) 2357 return ret; 2358 return 0; 2359 } 2360 2361 /** 2362 * Validate IPV6 item. 2363 * 2364 * @param[in] item 2365 * Item specification. 2366 * @param[in] item_flags 2367 * Bit-fields that holds the items detected until now. 2368 * @param[in] last_item 2369 * Previous validated item in the pattern items. 2370 * @param[in] ether_type 2371 * Type in the ethernet layer header (including dot1q). 2372 * @param[in] acc_mask 2373 * Acceptable mask, if NULL default internal default mask 2374 * will be used to check whether item fields are supported. 2375 * @param[out] error 2376 * Pointer to error structure. 2377 * 2378 * @return 2379 * 0 on success, a negative errno value otherwise and rte_errno is set. 2380 */ 2381 int 2382 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2383 uint64_t item_flags, 2384 uint64_t last_item, 2385 uint16_t ether_type, 2386 const struct rte_flow_item_ipv6 *acc_mask, 2387 struct rte_flow_error *error) 2388 { 2389 const struct rte_flow_item_ipv6 *mask = item->mask; 2390 const struct rte_flow_item_ipv6 *spec = item->spec; 2391 const struct rte_flow_item_ipv6 nic_mask = { 2392 .hdr = { 2393 .src_addr = 2394 "\xff\xff\xff\xff\xff\xff\xff\xff" 2395 "\xff\xff\xff\xff\xff\xff\xff\xff", 2396 .dst_addr = 2397 "\xff\xff\xff\xff\xff\xff\xff\xff" 2398 "\xff\xff\xff\xff\xff\xff\xff\xff", 2399 .vtc_flow = RTE_BE32(0xffffffff), 2400 .proto = 0xff, 2401 }, 2402 }; 2403 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2404 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2405 MLX5_FLOW_LAYER_OUTER_L3; 2406 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2407 MLX5_FLOW_LAYER_OUTER_L4; 2408 int ret; 2409 uint8_t next_proto = 0xFF; 2410 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2411 MLX5_FLOW_LAYER_OUTER_VLAN | 2412 MLX5_FLOW_LAYER_INNER_VLAN); 2413 2414 if ((last_item & l2_vlan) && ether_type && 2415 ether_type != RTE_ETHER_TYPE_IPV6) 2416 return rte_flow_error_set(error, EINVAL, 2417 RTE_FLOW_ERROR_TYPE_ITEM, item, 2418 "IPv6 cannot follow L2/VLAN layer " 2419 "which ether type is not IPv6"); 2420 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2421 next_proto = spec->hdr.proto; 2422 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2423 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2424 return rte_flow_error_set(error, EINVAL, 2425 RTE_FLOW_ERROR_TYPE_ITEM, 2426 item, 2427 "multiple tunnel " 2428 "not supported"); 2429 } 2430 if (next_proto == IPPROTO_HOPOPTS || 2431 next_proto == IPPROTO_ROUTING || 2432 next_proto == IPPROTO_FRAGMENT || 2433 next_proto == IPPROTO_ESP || 2434 next_proto == IPPROTO_AH || 2435 next_proto == IPPROTO_DSTOPTS) 2436 return rte_flow_error_set(error, EINVAL, 2437 RTE_FLOW_ERROR_TYPE_ITEM, item, 2438 "IPv6 proto (next header) should " 2439 "not be set as extension header"); 2440 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2441 return rte_flow_error_set(error, EINVAL, 2442 RTE_FLOW_ERROR_TYPE_ITEM, item, 2443 "wrong tunnel type - IPv4 specified " 2444 "but IPv6 item provided"); 2445 if (item_flags & l3m) 2446 return rte_flow_error_set(error, ENOTSUP, 2447 RTE_FLOW_ERROR_TYPE_ITEM, item, 2448 "multiple L3 layers not supported"); 2449 else if (item_flags & l4m) 2450 return rte_flow_error_set(error, EINVAL, 2451 RTE_FLOW_ERROR_TYPE_ITEM, item, 2452 "L3 cannot follow an L4 layer."); 2453 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2454 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2455 return rte_flow_error_set(error, EINVAL, 2456 RTE_FLOW_ERROR_TYPE_ITEM, item, 2457 "L3 cannot follow an NVGRE layer."); 2458 if (!mask) 2459 mask = &rte_flow_item_ipv6_mask; 2460 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2461 acc_mask ? (const uint8_t *)acc_mask 2462 : (const uint8_t *)&nic_mask, 2463 sizeof(struct rte_flow_item_ipv6), 2464 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2465 if (ret < 0) 2466 return ret; 2467 return 0; 2468 } 2469 2470 /** 2471 * Validate UDP item. 2472 * 2473 * @param[in] item 2474 * Item specification. 2475 * @param[in] item_flags 2476 * Bit-fields that holds the items detected until now. 2477 * @param[in] target_protocol 2478 * The next protocol in the previous item. 2479 * @param[in] flow_mask 2480 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2481 * @param[out] error 2482 * Pointer to error structure. 2483 * 2484 * @return 2485 * 0 on success, a negative errno value otherwise and rte_errno is set. 2486 */ 2487 int 2488 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2489 uint64_t item_flags, 2490 uint8_t target_protocol, 2491 struct rte_flow_error *error) 2492 { 2493 const struct rte_flow_item_udp *mask = item->mask; 2494 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2495 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2496 MLX5_FLOW_LAYER_OUTER_L3; 2497 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2498 MLX5_FLOW_LAYER_OUTER_L4; 2499 int ret; 2500 2501 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2502 return rte_flow_error_set(error, EINVAL, 2503 RTE_FLOW_ERROR_TYPE_ITEM, item, 2504 "protocol filtering not compatible" 2505 " with UDP layer"); 2506 if (!(item_flags & l3m)) 2507 return rte_flow_error_set(error, EINVAL, 2508 RTE_FLOW_ERROR_TYPE_ITEM, item, 2509 "L3 is mandatory to filter on L4"); 2510 if (item_flags & l4m) 2511 return rte_flow_error_set(error, EINVAL, 2512 RTE_FLOW_ERROR_TYPE_ITEM, item, 2513 "multiple L4 layers not supported"); 2514 if (!mask) 2515 mask = &rte_flow_item_udp_mask; 2516 ret = mlx5_flow_item_acceptable 2517 (item, (const uint8_t *)mask, 2518 (const uint8_t *)&rte_flow_item_udp_mask, 2519 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2520 error); 2521 if (ret < 0) 2522 return ret; 2523 return 0; 2524 } 2525 2526 /** 2527 * Validate TCP item. 2528 * 2529 * @param[in] item 2530 * Item specification. 2531 * @param[in] item_flags 2532 * Bit-fields that holds the items detected until now. 2533 * @param[in] target_protocol 2534 * The next protocol in the previous item. 2535 * @param[out] error 2536 * Pointer to error structure. 2537 * 2538 * @return 2539 * 0 on success, a negative errno value otherwise and rte_errno is set. 2540 */ 2541 int 2542 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2543 uint64_t item_flags, 2544 uint8_t target_protocol, 2545 const struct rte_flow_item_tcp *flow_mask, 2546 struct rte_flow_error *error) 2547 { 2548 const struct rte_flow_item_tcp *mask = item->mask; 2549 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2550 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2551 MLX5_FLOW_LAYER_OUTER_L3; 2552 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2553 MLX5_FLOW_LAYER_OUTER_L4; 2554 int ret; 2555 2556 MLX5_ASSERT(flow_mask); 2557 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2558 return rte_flow_error_set(error, EINVAL, 2559 RTE_FLOW_ERROR_TYPE_ITEM, item, 2560 "protocol filtering not compatible" 2561 " with TCP layer"); 2562 if (!(item_flags & l3m)) 2563 return rte_flow_error_set(error, EINVAL, 2564 RTE_FLOW_ERROR_TYPE_ITEM, item, 2565 "L3 is mandatory to filter on L4"); 2566 if (item_flags & l4m) 2567 return rte_flow_error_set(error, EINVAL, 2568 RTE_FLOW_ERROR_TYPE_ITEM, item, 2569 "multiple L4 layers not supported"); 2570 if (!mask) 2571 mask = &rte_flow_item_tcp_mask; 2572 ret = mlx5_flow_item_acceptable 2573 (item, (const uint8_t *)mask, 2574 (const uint8_t *)flow_mask, 2575 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2576 error); 2577 if (ret < 0) 2578 return ret; 2579 return 0; 2580 } 2581 2582 /** 2583 * Validate VXLAN item. 2584 * 2585 * @param[in] dev 2586 * Pointer to the Ethernet device structure. 2587 * @param[in] udp_dport 2588 * UDP destination port 2589 * @param[in] item 2590 * Item specification. 2591 * @param[in] item_flags 2592 * Bit-fields that holds the items detected until now. 2593 * @param[in] attr 2594 * Flow rule attributes. 2595 * @param[out] error 2596 * Pointer to error structure. 2597 * 2598 * @return 2599 * 0 on success, a negative errno value otherwise and rte_errno is set. 2600 */ 2601 int 2602 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev, 2603 uint16_t udp_dport, 2604 const struct rte_flow_item *item, 2605 uint64_t item_flags, 2606 const struct rte_flow_attr *attr, 2607 struct rte_flow_error *error) 2608 { 2609 const struct rte_flow_item_vxlan *spec = item->spec; 2610 const struct rte_flow_item_vxlan *mask = item->mask; 2611 int ret; 2612 struct mlx5_priv *priv = dev->data->dev_private; 2613 union vni { 2614 uint32_t vlan_id; 2615 uint8_t vni[4]; 2616 } id = { .vlan_id = 0, }; 2617 const struct rte_flow_item_vxlan nic_mask = { 2618 .vni = "\xff\xff\xff", 2619 .rsvd1 = 0xff, 2620 }; 2621 const struct rte_flow_item_vxlan *valid_mask; 2622 2623 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2624 return rte_flow_error_set(error, ENOTSUP, 2625 RTE_FLOW_ERROR_TYPE_ITEM, item, 2626 "multiple tunnel layers not" 2627 " supported"); 2628 valid_mask = &rte_flow_item_vxlan_mask; 2629 /* 2630 * Verify only UDPv4 is present as defined in 2631 * https://tools.ietf.org/html/rfc7348 2632 */ 2633 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2634 return rte_flow_error_set(error, EINVAL, 2635 RTE_FLOW_ERROR_TYPE_ITEM, item, 2636 "no outer UDP layer found"); 2637 if (!mask) 2638 mask = &rte_flow_item_vxlan_mask; 2639 2640 if (priv->sh->steering_format_version != 2641 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 || 2642 !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) { 2643 /* FDB domain & NIC domain non-zero group */ 2644 if ((attr->transfer || attr->group) && priv->sh->misc5_cap) 2645 valid_mask = &nic_mask; 2646 /* Group zero in NIC domain */ 2647 if (!attr->group && !attr->transfer && 2648 priv->sh->tunnel_header_0_1) 2649 valid_mask = &nic_mask; 2650 } 2651 ret = mlx5_flow_item_acceptable 2652 (item, (const uint8_t *)mask, 2653 (const uint8_t *)valid_mask, 2654 sizeof(struct rte_flow_item_vxlan), 2655 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2656 if (ret < 0) 2657 return ret; 2658 if (spec) { 2659 memcpy(&id.vni[1], spec->vni, 3); 2660 memcpy(&id.vni[1], mask->vni, 3); 2661 } 2662 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2663 return rte_flow_error_set(error, ENOTSUP, 2664 RTE_FLOW_ERROR_TYPE_ITEM, item, 2665 "VXLAN tunnel must be fully defined"); 2666 return 0; 2667 } 2668 2669 /** 2670 * Validate VXLAN_GPE item. 2671 * 2672 * @param[in] item 2673 * Item specification. 2674 * @param[in] item_flags 2675 * Bit-fields that holds the items detected until now. 2676 * @param[in] priv 2677 * Pointer to the private data structure. 2678 * @param[in] target_protocol 2679 * The next protocol in the previous item. 2680 * @param[out] error 2681 * Pointer to error structure. 2682 * 2683 * @return 2684 * 0 on success, a negative errno value otherwise and rte_errno is set. 2685 */ 2686 int 2687 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2688 uint64_t item_flags, 2689 struct rte_eth_dev *dev, 2690 struct rte_flow_error *error) 2691 { 2692 struct mlx5_priv *priv = dev->data->dev_private; 2693 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2694 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2695 int ret; 2696 union vni { 2697 uint32_t vlan_id; 2698 uint8_t vni[4]; 2699 } id = { .vlan_id = 0, }; 2700 2701 if (!priv->config.l3_vxlan_en) 2702 return rte_flow_error_set(error, ENOTSUP, 2703 RTE_FLOW_ERROR_TYPE_ITEM, item, 2704 "L3 VXLAN is not enabled by device" 2705 " parameter and/or not configured in" 2706 " firmware"); 2707 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2708 return rte_flow_error_set(error, ENOTSUP, 2709 RTE_FLOW_ERROR_TYPE_ITEM, item, 2710 "multiple tunnel layers not" 2711 " supported"); 2712 /* 2713 * Verify only UDPv4 is present as defined in 2714 * https://tools.ietf.org/html/rfc7348 2715 */ 2716 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2717 return rte_flow_error_set(error, EINVAL, 2718 RTE_FLOW_ERROR_TYPE_ITEM, item, 2719 "no outer UDP layer found"); 2720 if (!mask) 2721 mask = &rte_flow_item_vxlan_gpe_mask; 2722 ret = mlx5_flow_item_acceptable 2723 (item, (const uint8_t *)mask, 2724 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2725 sizeof(struct rte_flow_item_vxlan_gpe), 2726 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2727 if (ret < 0) 2728 return ret; 2729 if (spec) { 2730 if (spec->protocol) 2731 return rte_flow_error_set(error, ENOTSUP, 2732 RTE_FLOW_ERROR_TYPE_ITEM, 2733 item, 2734 "VxLAN-GPE protocol" 2735 " not supported"); 2736 memcpy(&id.vni[1], spec->vni, 3); 2737 memcpy(&id.vni[1], mask->vni, 3); 2738 } 2739 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2740 return rte_flow_error_set(error, ENOTSUP, 2741 RTE_FLOW_ERROR_TYPE_ITEM, item, 2742 "VXLAN-GPE tunnel must be fully" 2743 " defined"); 2744 return 0; 2745 } 2746 /** 2747 * Validate GRE Key item. 2748 * 2749 * @param[in] item 2750 * Item specification. 2751 * @param[in] item_flags 2752 * Bit flags to mark detected items. 2753 * @param[in] gre_item 2754 * Pointer to gre_item 2755 * @param[out] error 2756 * Pointer to error structure. 2757 * 2758 * @return 2759 * 0 on success, a negative errno value otherwise and rte_errno is set. 2760 */ 2761 int 2762 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2763 uint64_t item_flags, 2764 const struct rte_flow_item *gre_item, 2765 struct rte_flow_error *error) 2766 { 2767 const rte_be32_t *mask = item->mask; 2768 int ret = 0; 2769 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2770 const struct rte_flow_item_gre *gre_spec; 2771 const struct rte_flow_item_gre *gre_mask; 2772 2773 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2774 return rte_flow_error_set(error, ENOTSUP, 2775 RTE_FLOW_ERROR_TYPE_ITEM, item, 2776 "Multiple GRE key not support"); 2777 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2778 return rte_flow_error_set(error, ENOTSUP, 2779 RTE_FLOW_ERROR_TYPE_ITEM, item, 2780 "No preceding GRE header"); 2781 if (item_flags & MLX5_FLOW_LAYER_INNER) 2782 return rte_flow_error_set(error, ENOTSUP, 2783 RTE_FLOW_ERROR_TYPE_ITEM, item, 2784 "GRE key following a wrong item"); 2785 gre_mask = gre_item->mask; 2786 if (!gre_mask) 2787 gre_mask = &rte_flow_item_gre_mask; 2788 gre_spec = gre_item->spec; 2789 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2790 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2791 return rte_flow_error_set(error, EINVAL, 2792 RTE_FLOW_ERROR_TYPE_ITEM, item, 2793 "Key bit must be on"); 2794 2795 if (!mask) 2796 mask = &gre_key_default_mask; 2797 ret = mlx5_flow_item_acceptable 2798 (item, (const uint8_t *)mask, 2799 (const uint8_t *)&gre_key_default_mask, 2800 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2801 return ret; 2802 } 2803 2804 /** 2805 * Validate GRE item. 2806 * 2807 * @param[in] item 2808 * Item specification. 2809 * @param[in] item_flags 2810 * Bit flags to mark detected items. 2811 * @param[in] target_protocol 2812 * The next protocol in the previous item. 2813 * @param[out] error 2814 * Pointer to error structure. 2815 * 2816 * @return 2817 * 0 on success, a negative errno value otherwise and rte_errno is set. 2818 */ 2819 int 2820 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2821 uint64_t item_flags, 2822 uint8_t target_protocol, 2823 struct rte_flow_error *error) 2824 { 2825 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2826 const struct rte_flow_item_gre *mask = item->mask; 2827 int ret; 2828 const struct rte_flow_item_gre nic_mask = { 2829 .c_rsvd0_ver = RTE_BE16(0xB000), 2830 .protocol = RTE_BE16(UINT16_MAX), 2831 }; 2832 2833 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2834 return rte_flow_error_set(error, EINVAL, 2835 RTE_FLOW_ERROR_TYPE_ITEM, item, 2836 "protocol filtering not compatible" 2837 " with this GRE layer"); 2838 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2839 return rte_flow_error_set(error, ENOTSUP, 2840 RTE_FLOW_ERROR_TYPE_ITEM, item, 2841 "multiple tunnel layers not" 2842 " supported"); 2843 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2844 return rte_flow_error_set(error, ENOTSUP, 2845 RTE_FLOW_ERROR_TYPE_ITEM, item, 2846 "L3 Layer is missing"); 2847 if (!mask) 2848 mask = &rte_flow_item_gre_mask; 2849 ret = mlx5_flow_item_acceptable 2850 (item, (const uint8_t *)mask, 2851 (const uint8_t *)&nic_mask, 2852 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2853 error); 2854 if (ret < 0) 2855 return ret; 2856 #ifndef HAVE_MLX5DV_DR 2857 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2858 if (spec && (spec->protocol & mask->protocol)) 2859 return rte_flow_error_set(error, ENOTSUP, 2860 RTE_FLOW_ERROR_TYPE_ITEM, item, 2861 "without MPLS support the" 2862 " specification cannot be used for" 2863 " filtering"); 2864 #endif 2865 #endif 2866 return 0; 2867 } 2868 2869 /** 2870 * Validate Geneve item. 2871 * 2872 * @param[in] item 2873 * Item specification. 2874 * @param[in] itemFlags 2875 * Bit-fields that holds the items detected until now. 2876 * @param[in] enPriv 2877 * Pointer to the private data structure. 2878 * @param[out] error 2879 * Pointer to error structure. 2880 * 2881 * @return 2882 * 0 on success, a negative errno value otherwise and rte_errno is set. 2883 */ 2884 2885 int 2886 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2887 uint64_t item_flags, 2888 struct rte_eth_dev *dev, 2889 struct rte_flow_error *error) 2890 { 2891 struct mlx5_priv *priv = dev->data->dev_private; 2892 const struct rte_flow_item_geneve *spec = item->spec; 2893 const struct rte_flow_item_geneve *mask = item->mask; 2894 int ret; 2895 uint16_t gbhdr; 2896 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2897 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2898 const struct rte_flow_item_geneve nic_mask = { 2899 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2900 .vni = "\xff\xff\xff", 2901 .protocol = RTE_BE16(UINT16_MAX), 2902 }; 2903 2904 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2905 return rte_flow_error_set(error, ENOTSUP, 2906 RTE_FLOW_ERROR_TYPE_ITEM, item, 2907 "L3 Geneve is not enabled by device" 2908 " parameter and/or not configured in" 2909 " firmware"); 2910 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2911 return rte_flow_error_set(error, ENOTSUP, 2912 RTE_FLOW_ERROR_TYPE_ITEM, item, 2913 "multiple tunnel layers not" 2914 " supported"); 2915 /* 2916 * Verify only UDPv4 is present as defined in 2917 * https://tools.ietf.org/html/rfc7348 2918 */ 2919 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2920 return rte_flow_error_set(error, EINVAL, 2921 RTE_FLOW_ERROR_TYPE_ITEM, item, 2922 "no outer UDP layer found"); 2923 if (!mask) 2924 mask = &rte_flow_item_geneve_mask; 2925 ret = mlx5_flow_item_acceptable 2926 (item, (const uint8_t *)mask, 2927 (const uint8_t *)&nic_mask, 2928 sizeof(struct rte_flow_item_geneve), 2929 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2930 if (ret) 2931 return ret; 2932 if (spec) { 2933 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2934 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2935 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2936 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2937 return rte_flow_error_set(error, ENOTSUP, 2938 RTE_FLOW_ERROR_TYPE_ITEM, 2939 item, 2940 "Geneve protocol unsupported" 2941 " fields are being used"); 2942 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2943 return rte_flow_error_set 2944 (error, ENOTSUP, 2945 RTE_FLOW_ERROR_TYPE_ITEM, 2946 item, 2947 "Unsupported Geneve options length"); 2948 } 2949 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2950 return rte_flow_error_set 2951 (error, ENOTSUP, 2952 RTE_FLOW_ERROR_TYPE_ITEM, item, 2953 "Geneve tunnel must be fully defined"); 2954 return 0; 2955 } 2956 2957 /** 2958 * Validate Geneve TLV option item. 2959 * 2960 * @param[in] item 2961 * Item specification. 2962 * @param[in] last_item 2963 * Previous validated item in the pattern items. 2964 * @param[in] geneve_item 2965 * Previous GENEVE item specification. 2966 * @param[in] dev 2967 * Pointer to the rte_eth_dev structure. 2968 * @param[out] error 2969 * Pointer to error structure. 2970 * 2971 * @return 2972 * 0 on success, a negative errno value otherwise and rte_errno is set. 2973 */ 2974 int 2975 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item, 2976 uint64_t last_item, 2977 const struct rte_flow_item *geneve_item, 2978 struct rte_eth_dev *dev, 2979 struct rte_flow_error *error) 2980 { 2981 struct mlx5_priv *priv = dev->data->dev_private; 2982 struct mlx5_dev_ctx_shared *sh = priv->sh; 2983 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource; 2984 struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr; 2985 uint8_t data_max_supported = 2986 hca_attr->max_geneve_tlv_option_data_len * 4; 2987 struct mlx5_dev_config *config = &priv->config; 2988 const struct rte_flow_item_geneve *geneve_spec; 2989 const struct rte_flow_item_geneve *geneve_mask; 2990 const struct rte_flow_item_geneve_opt *spec = item->spec; 2991 const struct rte_flow_item_geneve_opt *mask = item->mask; 2992 unsigned int i; 2993 unsigned int data_len; 2994 uint8_t tlv_option_len; 2995 uint16_t optlen_m, optlen_v; 2996 const struct rte_flow_item_geneve_opt full_mask = { 2997 .option_class = RTE_BE16(0xffff), 2998 .option_type = 0xff, 2999 .option_len = 0x1f, 3000 }; 3001 3002 if (!mask) 3003 mask = &rte_flow_item_geneve_opt_mask; 3004 if (!spec) 3005 return rte_flow_error_set 3006 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3007 "Geneve TLV opt class/type/length must be specified"); 3008 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK) 3009 return rte_flow_error_set 3010 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3011 "Geneve TLV opt length exceeeds the limit (31)"); 3012 /* Check if class type and length masks are full. */ 3013 if (full_mask.option_class != mask->option_class || 3014 full_mask.option_type != mask->option_type || 3015 full_mask.option_len != (mask->option_len & full_mask.option_len)) 3016 return rte_flow_error_set 3017 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3018 "Geneve TLV opt class/type/length masks must be full"); 3019 /* Check if length is supported */ 3020 if ((uint32_t)spec->option_len > 3021 config->hca_attr.max_geneve_tlv_option_data_len) 3022 return rte_flow_error_set 3023 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3024 "Geneve TLV opt length not supported"); 3025 if (config->hca_attr.max_geneve_tlv_options > 1) 3026 DRV_LOG(DEBUG, 3027 "max_geneve_tlv_options supports more than 1 option"); 3028 /* Check GENEVE item preceding. */ 3029 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE)) 3030 return rte_flow_error_set 3031 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3032 "Geneve opt item must be preceded with Geneve item"); 3033 geneve_spec = geneve_item->spec; 3034 geneve_mask = geneve_item->mask ? geneve_item->mask : 3035 &rte_flow_item_geneve_mask; 3036 /* Check if GENEVE TLV option size doesn't exceed option length */ 3037 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 || 3038 geneve_spec->ver_opt_len_o_c_rsvd0)) { 3039 tlv_option_len = spec->option_len & mask->option_len; 3040 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0); 3041 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v); 3042 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0); 3043 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m); 3044 if ((optlen_v & optlen_m) <= tlv_option_len) 3045 return rte_flow_error_set 3046 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3047 "GENEVE TLV option length exceeds optlen"); 3048 } 3049 /* Check if length is 0 or data is 0. */ 3050 if (spec->data == NULL || spec->option_len == 0) 3051 return rte_flow_error_set 3052 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3053 "Geneve TLV opt with zero data/length not supported"); 3054 /* Check not all data & mask are 0. */ 3055 data_len = spec->option_len * 4; 3056 if (mask->data == NULL) { 3057 for (i = 0; i < data_len; i++) 3058 if (spec->data[i]) 3059 break; 3060 if (i == data_len) 3061 return rte_flow_error_set(error, ENOTSUP, 3062 RTE_FLOW_ERROR_TYPE_ITEM, item, 3063 "Can't match on Geneve option data 0"); 3064 } else { 3065 for (i = 0; i < data_len; i++) 3066 if (spec->data[i] & mask->data[i]) 3067 break; 3068 if (i == data_len) 3069 return rte_flow_error_set(error, ENOTSUP, 3070 RTE_FLOW_ERROR_TYPE_ITEM, item, 3071 "Can't match on Geneve option data and mask 0"); 3072 /* Check data mask supported. */ 3073 for (i = data_max_supported; i < data_len ; i++) 3074 if (mask->data[i]) 3075 return rte_flow_error_set(error, ENOTSUP, 3076 RTE_FLOW_ERROR_TYPE_ITEM, item, 3077 "Data mask is of unsupported size"); 3078 } 3079 /* Check GENEVE option is supported in NIC. */ 3080 if (!config->hca_attr.geneve_tlv_opt) 3081 return rte_flow_error_set 3082 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 3083 "Geneve TLV opt not supported"); 3084 /* Check if we already have geneve option with different type/class. */ 3085 rte_spinlock_lock(&sh->geneve_tlv_opt_sl); 3086 geneve_opt_resource = sh->geneve_tlv_option_resource; 3087 if (geneve_opt_resource != NULL) 3088 if (geneve_opt_resource->option_class != spec->option_class || 3089 geneve_opt_resource->option_type != spec->option_type || 3090 geneve_opt_resource->length != spec->option_len) { 3091 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 3092 return rte_flow_error_set(error, ENOTSUP, 3093 RTE_FLOW_ERROR_TYPE_ITEM, item, 3094 "Only one Geneve TLV option supported"); 3095 } 3096 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 3097 return 0; 3098 } 3099 3100 /** 3101 * Validate MPLS item. 3102 * 3103 * @param[in] dev 3104 * Pointer to the rte_eth_dev structure. 3105 * @param[in] item 3106 * Item specification. 3107 * @param[in] item_flags 3108 * Bit-fields that holds the items detected until now. 3109 * @param[in] prev_layer 3110 * The protocol layer indicated in previous item. 3111 * @param[out] error 3112 * Pointer to error structure. 3113 * 3114 * @return 3115 * 0 on success, a negative errno value otherwise and rte_errno is set. 3116 */ 3117 int 3118 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 3119 const struct rte_flow_item *item __rte_unused, 3120 uint64_t item_flags __rte_unused, 3121 uint64_t prev_layer __rte_unused, 3122 struct rte_flow_error *error) 3123 { 3124 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 3125 const struct rte_flow_item_mpls *mask = item->mask; 3126 struct mlx5_priv *priv = dev->data->dev_private; 3127 int ret; 3128 3129 if (!priv->config.mpls_en) 3130 return rte_flow_error_set(error, ENOTSUP, 3131 RTE_FLOW_ERROR_TYPE_ITEM, item, 3132 "MPLS not supported or" 3133 " disabled in firmware" 3134 " configuration."); 3135 /* MPLS over UDP, GRE is allowed */ 3136 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP | 3137 MLX5_FLOW_LAYER_GRE | 3138 MLX5_FLOW_LAYER_GRE_KEY))) 3139 return rte_flow_error_set(error, EINVAL, 3140 RTE_FLOW_ERROR_TYPE_ITEM, item, 3141 "protocol filtering not compatible" 3142 " with MPLS layer"); 3143 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 3144 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 3145 !(item_flags & MLX5_FLOW_LAYER_GRE)) 3146 return rte_flow_error_set(error, ENOTSUP, 3147 RTE_FLOW_ERROR_TYPE_ITEM, item, 3148 "multiple tunnel layers not" 3149 " supported"); 3150 if (!mask) 3151 mask = &rte_flow_item_mpls_mask; 3152 ret = mlx5_flow_item_acceptable 3153 (item, (const uint8_t *)mask, 3154 (const uint8_t *)&rte_flow_item_mpls_mask, 3155 sizeof(struct rte_flow_item_mpls), 3156 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3157 if (ret < 0) 3158 return ret; 3159 return 0; 3160 #else 3161 return rte_flow_error_set(error, ENOTSUP, 3162 RTE_FLOW_ERROR_TYPE_ITEM, item, 3163 "MPLS is not supported by Verbs, please" 3164 " update."); 3165 #endif 3166 } 3167 3168 /** 3169 * Validate NVGRE item. 3170 * 3171 * @param[in] item 3172 * Item specification. 3173 * @param[in] item_flags 3174 * Bit flags to mark detected items. 3175 * @param[in] target_protocol 3176 * The next protocol in the previous item. 3177 * @param[out] error 3178 * Pointer to error structure. 3179 * 3180 * @return 3181 * 0 on success, a negative errno value otherwise and rte_errno is set. 3182 */ 3183 int 3184 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 3185 uint64_t item_flags, 3186 uint8_t target_protocol, 3187 struct rte_flow_error *error) 3188 { 3189 const struct rte_flow_item_nvgre *mask = item->mask; 3190 int ret; 3191 3192 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 3193 return rte_flow_error_set(error, EINVAL, 3194 RTE_FLOW_ERROR_TYPE_ITEM, item, 3195 "protocol filtering not compatible" 3196 " with this GRE layer"); 3197 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3198 return rte_flow_error_set(error, ENOTSUP, 3199 RTE_FLOW_ERROR_TYPE_ITEM, item, 3200 "multiple tunnel layers not" 3201 " supported"); 3202 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 3203 return rte_flow_error_set(error, ENOTSUP, 3204 RTE_FLOW_ERROR_TYPE_ITEM, item, 3205 "L3 Layer is missing"); 3206 if (!mask) 3207 mask = &rte_flow_item_nvgre_mask; 3208 ret = mlx5_flow_item_acceptable 3209 (item, (const uint8_t *)mask, 3210 (const uint8_t *)&rte_flow_item_nvgre_mask, 3211 sizeof(struct rte_flow_item_nvgre), 3212 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3213 if (ret < 0) 3214 return ret; 3215 return 0; 3216 } 3217 3218 /** 3219 * Validate eCPRI item. 3220 * 3221 * @param[in] item 3222 * Item specification. 3223 * @param[in] item_flags 3224 * Bit-fields that holds the items detected until now. 3225 * @param[in] last_item 3226 * Previous validated item in the pattern items. 3227 * @param[in] ether_type 3228 * Type in the ethernet layer header (including dot1q). 3229 * @param[in] acc_mask 3230 * Acceptable mask, if NULL default internal default mask 3231 * will be used to check whether item fields are supported. 3232 * @param[out] error 3233 * Pointer to error structure. 3234 * 3235 * @return 3236 * 0 on success, a negative errno value otherwise and rte_errno is set. 3237 */ 3238 int 3239 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 3240 uint64_t item_flags, 3241 uint64_t last_item, 3242 uint16_t ether_type, 3243 const struct rte_flow_item_ecpri *acc_mask, 3244 struct rte_flow_error *error) 3245 { 3246 const struct rte_flow_item_ecpri *mask = item->mask; 3247 const struct rte_flow_item_ecpri nic_mask = { 3248 .hdr = { 3249 .common = { 3250 .u32 = 3251 RTE_BE32(((const struct rte_ecpri_common_hdr) { 3252 .type = 0xFF, 3253 }).u32), 3254 }, 3255 .dummy[0] = 0xFFFFFFFF, 3256 }, 3257 }; 3258 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 3259 MLX5_FLOW_LAYER_OUTER_VLAN); 3260 struct rte_flow_item_ecpri mask_lo; 3261 3262 if (!(last_item & outer_l2_vlan) && 3263 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP) 3264 return rte_flow_error_set(error, EINVAL, 3265 RTE_FLOW_ERROR_TYPE_ITEM, item, 3266 "eCPRI can only follow L2/VLAN layer or UDP layer"); 3267 if ((last_item & outer_l2_vlan) && ether_type && 3268 ether_type != RTE_ETHER_TYPE_ECPRI) 3269 return rte_flow_error_set(error, EINVAL, 3270 RTE_FLOW_ERROR_TYPE_ITEM, item, 3271 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE"); 3272 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3273 return rte_flow_error_set(error, EINVAL, 3274 RTE_FLOW_ERROR_TYPE_ITEM, item, 3275 "eCPRI with tunnel is not supported right now"); 3276 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 3277 return rte_flow_error_set(error, ENOTSUP, 3278 RTE_FLOW_ERROR_TYPE_ITEM, item, 3279 "multiple L3 layers not supported"); 3280 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 3281 return rte_flow_error_set(error, EINVAL, 3282 RTE_FLOW_ERROR_TYPE_ITEM, item, 3283 "eCPRI cannot coexist with a TCP layer"); 3284 /* In specification, eCPRI could be over UDP layer. */ 3285 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 3286 return rte_flow_error_set(error, EINVAL, 3287 RTE_FLOW_ERROR_TYPE_ITEM, item, 3288 "eCPRI over UDP layer is not yet supported right now"); 3289 /* Mask for type field in common header could be zero. */ 3290 if (!mask) 3291 mask = &rte_flow_item_ecpri_mask; 3292 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 3293 /* Input mask is in big-endian format. */ 3294 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 3295 return rte_flow_error_set(error, EINVAL, 3296 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3297 "partial mask is not supported for protocol"); 3298 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 3299 return rte_flow_error_set(error, EINVAL, 3300 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3301 "message header mask must be after a type mask"); 3302 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 3303 acc_mask ? (const uint8_t *)acc_mask 3304 : (const uint8_t *)&nic_mask, 3305 sizeof(struct rte_flow_item_ecpri), 3306 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3307 } 3308 3309 static int 3310 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 3311 const struct rte_flow_attr *attr __rte_unused, 3312 const struct rte_flow_item items[] __rte_unused, 3313 const struct rte_flow_action actions[] __rte_unused, 3314 bool external __rte_unused, 3315 int hairpin __rte_unused, 3316 struct rte_flow_error *error) 3317 { 3318 return rte_flow_error_set(error, ENOTSUP, 3319 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3320 } 3321 3322 static struct mlx5_flow * 3323 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 3324 const struct rte_flow_attr *attr __rte_unused, 3325 const struct rte_flow_item items[] __rte_unused, 3326 const struct rte_flow_action actions[] __rte_unused, 3327 struct rte_flow_error *error) 3328 { 3329 rte_flow_error_set(error, ENOTSUP, 3330 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3331 return NULL; 3332 } 3333 3334 static int 3335 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 3336 struct mlx5_flow *dev_flow __rte_unused, 3337 const struct rte_flow_attr *attr __rte_unused, 3338 const struct rte_flow_item items[] __rte_unused, 3339 const struct rte_flow_action actions[] __rte_unused, 3340 struct rte_flow_error *error) 3341 { 3342 return rte_flow_error_set(error, ENOTSUP, 3343 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3344 } 3345 3346 static int 3347 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 3348 struct rte_flow *flow __rte_unused, 3349 struct rte_flow_error *error) 3350 { 3351 return rte_flow_error_set(error, ENOTSUP, 3352 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3353 } 3354 3355 static void 3356 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 3357 struct rte_flow *flow __rte_unused) 3358 { 3359 } 3360 3361 static void 3362 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 3363 struct rte_flow *flow __rte_unused) 3364 { 3365 } 3366 3367 static int 3368 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3369 struct rte_flow *flow __rte_unused, 3370 const struct rte_flow_action *actions __rte_unused, 3371 void *data __rte_unused, 3372 struct rte_flow_error *error) 3373 { 3374 return rte_flow_error_set(error, ENOTSUP, 3375 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3376 } 3377 3378 static int 3379 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused, 3380 uint32_t domains __rte_unused, 3381 uint32_t flags __rte_unused) 3382 { 3383 return 0; 3384 } 3385 3386 /* Void driver to protect from null pointer reference. */ 3387 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3388 .validate = flow_null_validate, 3389 .prepare = flow_null_prepare, 3390 .translate = flow_null_translate, 3391 .apply = flow_null_apply, 3392 .remove = flow_null_remove, 3393 .destroy = flow_null_destroy, 3394 .query = flow_null_query, 3395 .sync_domain = flow_null_sync_domain, 3396 }; 3397 3398 /** 3399 * Select flow driver type according to flow attributes and device 3400 * configuration. 3401 * 3402 * @param[in] dev 3403 * Pointer to the dev structure. 3404 * @param[in] attr 3405 * Pointer to the flow attributes. 3406 * 3407 * @return 3408 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3409 */ 3410 static enum mlx5_flow_drv_type 3411 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3412 { 3413 struct mlx5_priv *priv = dev->data->dev_private; 3414 /* The OS can determine first a specific flow type (DV, VERBS) */ 3415 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3416 3417 if (type != MLX5_FLOW_TYPE_MAX) 3418 return type; 3419 /* If no OS specific type - continue with DV/VERBS selection */ 3420 if (attr->transfer && priv->config.dv_esw_en) 3421 type = MLX5_FLOW_TYPE_DV; 3422 if (!attr->transfer) 3423 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3424 MLX5_FLOW_TYPE_VERBS; 3425 return type; 3426 } 3427 3428 #define flow_get_drv_ops(type) flow_drv_ops[type] 3429 3430 /** 3431 * Flow driver validation API. This abstracts calling driver specific functions. 3432 * The type of flow driver is determined according to flow attributes. 3433 * 3434 * @param[in] dev 3435 * Pointer to the dev structure. 3436 * @param[in] attr 3437 * Pointer to the flow attributes. 3438 * @param[in] items 3439 * Pointer to the list of items. 3440 * @param[in] actions 3441 * Pointer to the list of actions. 3442 * @param[in] external 3443 * This flow rule is created by request external to PMD. 3444 * @param[in] hairpin 3445 * Number of hairpin TX actions, 0 means classic flow. 3446 * @param[out] error 3447 * Pointer to the error structure. 3448 * 3449 * @return 3450 * 0 on success, a negative errno value otherwise and rte_errno is set. 3451 */ 3452 static inline int 3453 flow_drv_validate(struct rte_eth_dev *dev, 3454 const struct rte_flow_attr *attr, 3455 const struct rte_flow_item items[], 3456 const struct rte_flow_action actions[], 3457 bool external, int hairpin, struct rte_flow_error *error) 3458 { 3459 const struct mlx5_flow_driver_ops *fops; 3460 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3461 3462 fops = flow_get_drv_ops(type); 3463 return fops->validate(dev, attr, items, actions, external, 3464 hairpin, error); 3465 } 3466 3467 /** 3468 * Flow driver preparation API. This abstracts calling driver specific 3469 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3470 * calculates the size of memory required for device flow, allocates the memory, 3471 * initializes the device flow and returns the pointer. 3472 * 3473 * @note 3474 * This function initializes device flow structure such as dv or verbs in 3475 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3476 * rest. For example, adding returning device flow to flow->dev_flow list and 3477 * setting backward reference to the flow should be done out of this function. 3478 * layers field is not filled either. 3479 * 3480 * @param[in] dev 3481 * Pointer to the dev structure. 3482 * @param[in] attr 3483 * Pointer to the flow attributes. 3484 * @param[in] items 3485 * Pointer to the list of items. 3486 * @param[in] actions 3487 * Pointer to the list of actions. 3488 * @param[in] flow_idx 3489 * This memory pool index to the flow. 3490 * @param[out] error 3491 * Pointer to the error structure. 3492 * 3493 * @return 3494 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3495 */ 3496 static inline struct mlx5_flow * 3497 flow_drv_prepare(struct rte_eth_dev *dev, 3498 const struct rte_flow *flow, 3499 const struct rte_flow_attr *attr, 3500 const struct rte_flow_item items[], 3501 const struct rte_flow_action actions[], 3502 uint32_t flow_idx, 3503 struct rte_flow_error *error) 3504 { 3505 const struct mlx5_flow_driver_ops *fops; 3506 enum mlx5_flow_drv_type type = flow->drv_type; 3507 struct mlx5_flow *mlx5_flow = NULL; 3508 3509 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3510 fops = flow_get_drv_ops(type); 3511 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3512 if (mlx5_flow) 3513 mlx5_flow->flow_idx = flow_idx; 3514 return mlx5_flow; 3515 } 3516 3517 /** 3518 * Flow driver translation API. This abstracts calling driver specific 3519 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3520 * translates a generic flow into a driver flow. flow_drv_prepare() must 3521 * precede. 3522 * 3523 * @note 3524 * dev_flow->layers could be filled as a result of parsing during translation 3525 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3526 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3527 * flow->actions could be overwritten even though all the expanded dev_flows 3528 * have the same actions. 3529 * 3530 * @param[in] dev 3531 * Pointer to the rte dev structure. 3532 * @param[in, out] dev_flow 3533 * Pointer to the mlx5 flow. 3534 * @param[in] attr 3535 * Pointer to the flow attributes. 3536 * @param[in] items 3537 * Pointer to the list of items. 3538 * @param[in] actions 3539 * Pointer to the list of actions. 3540 * @param[out] error 3541 * Pointer to the error structure. 3542 * 3543 * @return 3544 * 0 on success, a negative errno value otherwise and rte_errno is set. 3545 */ 3546 static inline int 3547 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3548 const struct rte_flow_attr *attr, 3549 const struct rte_flow_item items[], 3550 const struct rte_flow_action actions[], 3551 struct rte_flow_error *error) 3552 { 3553 const struct mlx5_flow_driver_ops *fops; 3554 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3555 3556 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3557 fops = flow_get_drv_ops(type); 3558 return fops->translate(dev, dev_flow, attr, items, actions, error); 3559 } 3560 3561 /** 3562 * Flow driver apply API. This abstracts calling driver specific functions. 3563 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3564 * translated driver flows on to device. flow_drv_translate() must precede. 3565 * 3566 * @param[in] dev 3567 * Pointer to Ethernet device structure. 3568 * @param[in, out] flow 3569 * Pointer to flow structure. 3570 * @param[out] error 3571 * Pointer to error structure. 3572 * 3573 * @return 3574 * 0 on success, a negative errno value otherwise and rte_errno is set. 3575 */ 3576 static inline int 3577 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3578 struct rte_flow_error *error) 3579 { 3580 const struct mlx5_flow_driver_ops *fops; 3581 enum mlx5_flow_drv_type type = flow->drv_type; 3582 3583 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3584 fops = flow_get_drv_ops(type); 3585 return fops->apply(dev, flow, error); 3586 } 3587 3588 /** 3589 * Flow driver destroy API. This abstracts calling driver specific functions. 3590 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3591 * on device and releases resources of the flow. 3592 * 3593 * @param[in] dev 3594 * Pointer to Ethernet device. 3595 * @param[in, out] flow 3596 * Pointer to flow structure. 3597 */ 3598 static inline void 3599 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3600 { 3601 const struct mlx5_flow_driver_ops *fops; 3602 enum mlx5_flow_drv_type type = flow->drv_type; 3603 3604 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3605 fops = flow_get_drv_ops(type); 3606 fops->destroy(dev, flow); 3607 } 3608 3609 /** 3610 * Flow driver find RSS policy tbl API. This abstracts calling driver 3611 * specific functions. Parent flow (rte_flow) should have driver 3612 * type (drv_type). It will find the RSS policy table that has the rss_desc. 3613 * 3614 * @param[in] dev 3615 * Pointer to Ethernet device. 3616 * @param[in, out] flow 3617 * Pointer to flow structure. 3618 * @param[in] policy 3619 * Pointer to meter policy table. 3620 * @param[in] rss_desc 3621 * Pointer to rss_desc 3622 */ 3623 static struct mlx5_flow_meter_sub_policy * 3624 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev, 3625 struct rte_flow *flow, 3626 struct mlx5_flow_meter_policy *policy, 3627 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS]) 3628 { 3629 const struct mlx5_flow_driver_ops *fops; 3630 enum mlx5_flow_drv_type type = flow->drv_type; 3631 3632 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3633 fops = flow_get_drv_ops(type); 3634 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc); 3635 } 3636 3637 /** 3638 * Flow driver color tag rule API. This abstracts calling driver 3639 * specific functions. Parent flow (rte_flow) should have driver 3640 * type (drv_type). It will create the color tag rules in hierarchy meter. 3641 * 3642 * @param[in] dev 3643 * Pointer to Ethernet device. 3644 * @param[in, out] flow 3645 * Pointer to flow structure. 3646 * @param[in] fm 3647 * Pointer to flow meter structure. 3648 * @param[in] src_port 3649 * The src port this extra rule should use. 3650 * @param[in] item 3651 * The src port id match item. 3652 * @param[out] error 3653 * Pointer to error structure. 3654 */ 3655 static int 3656 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev, 3657 struct rte_flow *flow, 3658 struct mlx5_flow_meter_info *fm, 3659 int32_t src_port, 3660 const struct rte_flow_item *item, 3661 struct rte_flow_error *error) 3662 { 3663 const struct mlx5_flow_driver_ops *fops; 3664 enum mlx5_flow_drv_type type = flow->drv_type; 3665 3666 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3667 fops = flow_get_drv_ops(type); 3668 return fops->meter_hierarchy_rule_create(dev, fm, 3669 src_port, item, error); 3670 } 3671 3672 /** 3673 * Get RSS action from the action list. 3674 * 3675 * @param[in] dev 3676 * Pointer to Ethernet device. 3677 * @param[in] actions 3678 * Pointer to the list of actions. 3679 * @param[in] flow 3680 * Parent flow structure pointer. 3681 * 3682 * @return 3683 * Pointer to the RSS action if exist, else return NULL. 3684 */ 3685 static const struct rte_flow_action_rss* 3686 flow_get_rss_action(struct rte_eth_dev *dev, 3687 const struct rte_flow_action actions[]) 3688 { 3689 struct mlx5_priv *priv = dev->data->dev_private; 3690 const struct rte_flow_action_rss *rss = NULL; 3691 struct mlx5_meter_policy_action_container *acg; 3692 struct mlx5_meter_policy_action_container *acy; 3693 3694 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3695 switch (actions->type) { 3696 case RTE_FLOW_ACTION_TYPE_RSS: 3697 rss = actions->conf; 3698 break; 3699 case RTE_FLOW_ACTION_TYPE_SAMPLE: 3700 { 3701 const struct rte_flow_action_sample *sample = 3702 actions->conf; 3703 const struct rte_flow_action *act = sample->actions; 3704 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) 3705 if (act->type == RTE_FLOW_ACTION_TYPE_RSS) 3706 rss = act->conf; 3707 break; 3708 } 3709 case RTE_FLOW_ACTION_TYPE_METER: 3710 { 3711 uint32_t mtr_idx; 3712 struct mlx5_flow_meter_info *fm; 3713 struct mlx5_flow_meter_policy *policy; 3714 const struct rte_flow_action_meter *mtr = actions->conf; 3715 3716 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx); 3717 if (fm && !fm->def_policy) { 3718 policy = mlx5_flow_meter_policy_find(dev, 3719 fm->policy_id, NULL); 3720 MLX5_ASSERT(policy); 3721 if (policy->is_hierarchy) { 3722 policy = 3723 mlx5_flow_meter_hierarchy_get_final_policy(dev, 3724 policy); 3725 if (!policy) 3726 return NULL; 3727 } 3728 if (policy->is_rss) { 3729 acg = 3730 &policy->act_cnt[RTE_COLOR_GREEN]; 3731 acy = 3732 &policy->act_cnt[RTE_COLOR_YELLOW]; 3733 if (acg->fate_action == 3734 MLX5_FLOW_FATE_SHARED_RSS) 3735 rss = acg->rss->conf; 3736 else if (acy->fate_action == 3737 MLX5_FLOW_FATE_SHARED_RSS) 3738 rss = acy->rss->conf; 3739 } 3740 } 3741 break; 3742 } 3743 default: 3744 break; 3745 } 3746 } 3747 return rss; 3748 } 3749 3750 /** 3751 * Get ASO age action by index. 3752 * 3753 * @param[in] dev 3754 * Pointer to the Ethernet device structure. 3755 * @param[in] age_idx 3756 * Index to the ASO age action. 3757 * 3758 * @return 3759 * The specified ASO age action. 3760 */ 3761 struct mlx5_aso_age_action* 3762 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx) 3763 { 3764 uint16_t pool_idx = age_idx & UINT16_MAX; 3765 uint16_t offset = (age_idx >> 16) & UINT16_MAX; 3766 struct mlx5_priv *priv = dev->data->dev_private; 3767 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng; 3768 struct mlx5_aso_age_pool *pool; 3769 3770 rte_rwlock_read_lock(&mng->resize_rwl); 3771 pool = mng->pools[pool_idx]; 3772 rte_rwlock_read_unlock(&mng->resize_rwl); 3773 return &pool->actions[offset - 1]; 3774 } 3775 3776 /* maps indirect action to translated direct in some actions array */ 3777 struct mlx5_translated_action_handle { 3778 struct rte_flow_action_handle *action; /**< Indirect action handle. */ 3779 int index; /**< Index in related array of rte_flow_action. */ 3780 }; 3781 3782 /** 3783 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related 3784 * direct action if translation possible. 3785 * This functionality used to run same execution path for both direct and 3786 * indirect actions on flow create. All necessary preparations for indirect 3787 * action handling should be performed on *handle* actions list returned 3788 * from this call. 3789 * 3790 * @param[in] dev 3791 * Pointer to Ethernet device. 3792 * @param[in] actions 3793 * List of actions to translate. 3794 * @param[out] handle 3795 * List to store translated indirect action object handles. 3796 * @param[in, out] indir_n 3797 * Size of *handle* array. On return should be updated with number of 3798 * indirect actions retrieved from the *actions* list. 3799 * @param[out] translated_actions 3800 * List of actions where all indirect actions were translated to direct 3801 * if possible. NULL if no translation took place. 3802 * @param[out] error 3803 * Pointer to the error structure. 3804 * 3805 * @return 3806 * 0 on success, a negative errno value otherwise and rte_errno is set. 3807 */ 3808 static int 3809 flow_action_handles_translate(struct rte_eth_dev *dev, 3810 const struct rte_flow_action actions[], 3811 struct mlx5_translated_action_handle *handle, 3812 int *indir_n, 3813 struct rte_flow_action **translated_actions, 3814 struct rte_flow_error *error) 3815 { 3816 struct mlx5_priv *priv = dev->data->dev_private; 3817 struct rte_flow_action *translated = NULL; 3818 size_t actions_size; 3819 int n; 3820 int copied_n = 0; 3821 struct mlx5_translated_action_handle *handle_end = NULL; 3822 3823 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3824 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT) 3825 continue; 3826 if (copied_n == *indir_n) { 3827 return rte_flow_error_set 3828 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3829 NULL, "too many shared actions"); 3830 } 3831 rte_memcpy(&handle[copied_n].action, &actions[n].conf, 3832 sizeof(actions[n].conf)); 3833 handle[copied_n].index = n; 3834 copied_n++; 3835 } 3836 n++; 3837 *indir_n = copied_n; 3838 if (!copied_n) 3839 return 0; 3840 actions_size = sizeof(struct rte_flow_action) * n; 3841 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3842 if (!translated) { 3843 rte_errno = ENOMEM; 3844 return -ENOMEM; 3845 } 3846 memcpy(translated, actions, actions_size); 3847 for (handle_end = handle + copied_n; handle < handle_end; handle++) { 3848 struct mlx5_shared_action_rss *shared_rss; 3849 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3850 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3851 uint32_t idx = act_idx & 3852 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3853 3854 switch (type) { 3855 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3856 shared_rss = mlx5_ipool_get 3857 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx); 3858 translated[handle->index].type = 3859 RTE_FLOW_ACTION_TYPE_RSS; 3860 translated[handle->index].conf = 3861 &shared_rss->origin; 3862 break; 3863 case MLX5_INDIRECT_ACTION_TYPE_COUNT: 3864 translated[handle->index].type = 3865 (enum rte_flow_action_type) 3866 MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 3867 translated[handle->index].conf = (void *)(uintptr_t)idx; 3868 break; 3869 case MLX5_INDIRECT_ACTION_TYPE_AGE: 3870 if (priv->sh->flow_hit_aso_en) { 3871 translated[handle->index].type = 3872 (enum rte_flow_action_type) 3873 MLX5_RTE_FLOW_ACTION_TYPE_AGE; 3874 translated[handle->index].conf = 3875 (void *)(uintptr_t)idx; 3876 break; 3877 } 3878 /* Fall-through */ 3879 case MLX5_INDIRECT_ACTION_TYPE_CT: 3880 if (priv->sh->ct_aso_en) { 3881 translated[handle->index].type = 3882 RTE_FLOW_ACTION_TYPE_CONNTRACK; 3883 translated[handle->index].conf = 3884 (void *)(uintptr_t)idx; 3885 break; 3886 } 3887 /* Fall-through */ 3888 default: 3889 mlx5_free(translated); 3890 return rte_flow_error_set 3891 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3892 NULL, "invalid indirect action type"); 3893 } 3894 } 3895 *translated_actions = translated; 3896 return 0; 3897 } 3898 3899 /** 3900 * Get Shared RSS action from the action list. 3901 * 3902 * @param[in] dev 3903 * Pointer to Ethernet device. 3904 * @param[in] shared 3905 * Pointer to the list of actions. 3906 * @param[in] shared_n 3907 * Actions list length. 3908 * 3909 * @return 3910 * The MLX5 RSS action ID if exists, otherwise return 0. 3911 */ 3912 static uint32_t 3913 flow_get_shared_rss_action(struct rte_eth_dev *dev, 3914 struct mlx5_translated_action_handle *handle, 3915 int shared_n) 3916 { 3917 struct mlx5_translated_action_handle *handle_end; 3918 struct mlx5_priv *priv = dev->data->dev_private; 3919 struct mlx5_shared_action_rss *shared_rss; 3920 3921 3922 for (handle_end = handle + shared_n; handle < handle_end; handle++) { 3923 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3924 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3925 uint32_t idx = act_idx & 3926 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3927 switch (type) { 3928 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3929 shared_rss = mlx5_ipool_get 3930 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 3931 idx); 3932 __atomic_add_fetch(&shared_rss->refcnt, 1, 3933 __ATOMIC_RELAXED); 3934 return idx; 3935 default: 3936 break; 3937 } 3938 } 3939 return 0; 3940 } 3941 3942 static unsigned int 3943 find_graph_root(uint32_t rss_level) 3944 { 3945 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3946 MLX5_EXPANSION_ROOT_OUTER; 3947 } 3948 3949 /** 3950 * Get layer flags from the prefix flow. 3951 * 3952 * Some flows may be split to several subflows, the prefix subflow gets the 3953 * match items and the suffix sub flow gets the actions. 3954 * Some actions need the user defined match item flags to get the detail for 3955 * the action. 3956 * This function helps the suffix flow to get the item layer flags from prefix 3957 * subflow. 3958 * 3959 * @param[in] dev_flow 3960 * Pointer the created preifx subflow. 3961 * 3962 * @return 3963 * The layers get from prefix subflow. 3964 */ 3965 static inline uint64_t 3966 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3967 { 3968 uint64_t layers = 0; 3969 3970 /* 3971 * Layers bits could be localization, but usually the compiler will 3972 * help to do the optimization work for source code. 3973 * If no decap actions, use the layers directly. 3974 */ 3975 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3976 return dev_flow->handle->layers; 3977 /* Convert L3 layers with decap action. */ 3978 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3979 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3980 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3981 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3982 /* Convert L4 layers with decap action. */ 3983 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3984 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3985 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3986 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3987 return layers; 3988 } 3989 3990 /** 3991 * Get metadata split action information. 3992 * 3993 * @param[in] actions 3994 * Pointer to the list of actions. 3995 * @param[out] qrss 3996 * Pointer to the return pointer. 3997 * @param[out] qrss_type 3998 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3999 * if no QUEUE/RSS is found. 4000 * @param[out] encap_idx 4001 * Pointer to the index of the encap action if exists, otherwise the last 4002 * action index. 4003 * 4004 * @return 4005 * Total number of actions. 4006 */ 4007 static int 4008 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 4009 const struct rte_flow_action **qrss, 4010 int *encap_idx) 4011 { 4012 const struct rte_flow_action_raw_encap *raw_encap; 4013 int actions_n = 0; 4014 int raw_decap_idx = -1; 4015 4016 *encap_idx = -1; 4017 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4018 switch (actions->type) { 4019 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4020 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4021 *encap_idx = actions_n; 4022 break; 4023 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4024 raw_decap_idx = actions_n; 4025 break; 4026 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4027 raw_encap = actions->conf; 4028 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4029 *encap_idx = raw_decap_idx != -1 ? 4030 raw_decap_idx : actions_n; 4031 break; 4032 case RTE_FLOW_ACTION_TYPE_QUEUE: 4033 case RTE_FLOW_ACTION_TYPE_RSS: 4034 *qrss = actions; 4035 break; 4036 default: 4037 break; 4038 } 4039 actions_n++; 4040 } 4041 if (*encap_idx == -1) 4042 *encap_idx = actions_n; 4043 /* Count RTE_FLOW_ACTION_TYPE_END. */ 4044 return actions_n + 1; 4045 } 4046 4047 /** 4048 * Check if the action will change packet. 4049 * 4050 * @param dev 4051 * Pointer to Ethernet device. 4052 * @param[in] type 4053 * action type. 4054 * 4055 * @return 4056 * true if action will change packet, false otherwise. 4057 */ 4058 static bool flow_check_modify_action_type(struct rte_eth_dev *dev, 4059 enum rte_flow_action_type type) 4060 { 4061 struct mlx5_priv *priv = dev->data->dev_private; 4062 4063 switch (type) { 4064 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 4065 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 4066 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 4067 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 4068 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 4069 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 4070 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 4071 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 4072 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 4073 case RTE_FLOW_ACTION_TYPE_SET_TTL: 4074 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 4075 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 4076 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 4077 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 4078 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 4079 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 4080 case RTE_FLOW_ACTION_TYPE_SET_META: 4081 case RTE_FLOW_ACTION_TYPE_SET_TAG: 4082 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 4083 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4084 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4085 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4086 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4087 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4088 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4089 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4090 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4091 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4092 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 4093 return true; 4094 case RTE_FLOW_ACTION_TYPE_FLAG: 4095 case RTE_FLOW_ACTION_TYPE_MARK: 4096 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) 4097 return true; 4098 else 4099 return false; 4100 default: 4101 return false; 4102 } 4103 } 4104 4105 /** 4106 * Check meter action from the action list. 4107 * 4108 * @param dev 4109 * Pointer to Ethernet device. 4110 * @param[in] actions 4111 * Pointer to the list of actions. 4112 * @param[out] has_mtr 4113 * Pointer to the meter exist flag. 4114 * @param[out] has_modify 4115 * Pointer to the flag showing there's packet change action. 4116 * @param[out] meter_id 4117 * Pointer to the meter id. 4118 * 4119 * @return 4120 * Total number of actions. 4121 */ 4122 static int 4123 flow_check_meter_action(struct rte_eth_dev *dev, 4124 const struct rte_flow_action actions[], 4125 bool *has_mtr, bool *has_modify, uint32_t *meter_id) 4126 { 4127 const struct rte_flow_action_meter *mtr = NULL; 4128 int actions_n = 0; 4129 4130 MLX5_ASSERT(has_mtr); 4131 *has_mtr = false; 4132 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4133 switch (actions->type) { 4134 case RTE_FLOW_ACTION_TYPE_METER: 4135 mtr = actions->conf; 4136 *meter_id = mtr->mtr_id; 4137 *has_mtr = true; 4138 break; 4139 default: 4140 break; 4141 } 4142 if (!*has_mtr) 4143 *has_modify |= flow_check_modify_action_type(dev, 4144 actions->type); 4145 actions_n++; 4146 } 4147 /* Count RTE_FLOW_ACTION_TYPE_END. */ 4148 return actions_n + 1; 4149 } 4150 4151 /** 4152 * Check if the flow should be split due to hairpin. 4153 * The reason for the split is that in current HW we can't 4154 * support encap and push-vlan on Rx, so if a flow contains 4155 * these actions we move it to Tx. 4156 * 4157 * @param dev 4158 * Pointer to Ethernet device. 4159 * @param[in] attr 4160 * Flow rule attributes. 4161 * @param[in] actions 4162 * Associated actions (list terminated by the END action). 4163 * 4164 * @return 4165 * > 0 the number of actions and the flow should be split, 4166 * 0 when no split required. 4167 */ 4168 static int 4169 flow_check_hairpin_split(struct rte_eth_dev *dev, 4170 const struct rte_flow_attr *attr, 4171 const struct rte_flow_action actions[]) 4172 { 4173 int queue_action = 0; 4174 int action_n = 0; 4175 int split = 0; 4176 const struct rte_flow_action_queue *queue; 4177 const struct rte_flow_action_rss *rss; 4178 const struct rte_flow_action_raw_encap *raw_encap; 4179 const struct rte_eth_hairpin_conf *conf; 4180 4181 if (!attr->ingress) 4182 return 0; 4183 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4184 switch (actions->type) { 4185 case RTE_FLOW_ACTION_TYPE_QUEUE: 4186 queue = actions->conf; 4187 if (queue == NULL) 4188 return 0; 4189 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); 4190 if (conf == NULL || conf->tx_explicit != 0) 4191 return 0; 4192 queue_action = 1; 4193 action_n++; 4194 break; 4195 case RTE_FLOW_ACTION_TYPE_RSS: 4196 rss = actions->conf; 4197 if (rss == NULL || rss->queue_num == 0) 4198 return 0; 4199 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); 4200 if (conf == NULL || conf->tx_explicit != 0) 4201 return 0; 4202 queue_action = 1; 4203 action_n++; 4204 break; 4205 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4206 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4207 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4208 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4209 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4210 split++; 4211 action_n++; 4212 break; 4213 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4214 raw_encap = actions->conf; 4215 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4216 split++; 4217 action_n++; 4218 break; 4219 default: 4220 action_n++; 4221 break; 4222 } 4223 } 4224 if (split && queue_action) 4225 return action_n; 4226 return 0; 4227 } 4228 4229 /* Declare flow create/destroy prototype in advance. */ 4230 static uint32_t 4231 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type, 4232 const struct rte_flow_attr *attr, 4233 const struct rte_flow_item items[], 4234 const struct rte_flow_action actions[], 4235 bool external, struct rte_flow_error *error); 4236 4237 static void 4238 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type, 4239 uint32_t flow_idx); 4240 4241 int 4242 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused, 4243 struct mlx5_list_entry *entry, void *cb_ctx) 4244 { 4245 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 4246 struct mlx5_flow_mreg_copy_resource *mcp_res = 4247 container_of(entry, typeof(*mcp_res), hlist_ent); 4248 4249 return mcp_res->mark_id != *(uint32_t *)(ctx->data); 4250 } 4251 4252 struct mlx5_list_entry * 4253 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx) 4254 { 4255 struct rte_eth_dev *dev = tool_ctx; 4256 struct mlx5_priv *priv = dev->data->dev_private; 4257 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 4258 struct mlx5_flow_mreg_copy_resource *mcp_res; 4259 struct rte_flow_error *error = ctx->error; 4260 uint32_t idx = 0; 4261 int ret; 4262 uint32_t mark_id = *(uint32_t *)(ctx->data); 4263 struct rte_flow_attr attr = { 4264 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4265 .ingress = 1, 4266 }; 4267 struct mlx5_rte_flow_item_tag tag_spec = { 4268 .data = mark_id, 4269 }; 4270 struct rte_flow_item items[] = { 4271 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 4272 }; 4273 struct rte_flow_action_mark ftag = { 4274 .id = mark_id, 4275 }; 4276 struct mlx5_flow_action_copy_mreg cp_mreg = { 4277 .dst = REG_B, 4278 .src = REG_NON, 4279 }; 4280 struct rte_flow_action_jump jump = { 4281 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 4282 }; 4283 struct rte_flow_action actions[] = { 4284 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 4285 }; 4286 4287 /* Fill the register fileds in the flow. */ 4288 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 4289 if (ret < 0) 4290 return NULL; 4291 tag_spec.id = ret; 4292 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4293 if (ret < 0) 4294 return NULL; 4295 cp_mreg.src = ret; 4296 /* Provide the full width of FLAG specific value. */ 4297 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 4298 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 4299 /* Build a new flow. */ 4300 if (mark_id != MLX5_DEFAULT_COPY_ID) { 4301 items[0] = (struct rte_flow_item){ 4302 .type = (enum rte_flow_item_type) 4303 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 4304 .spec = &tag_spec, 4305 }; 4306 items[1] = (struct rte_flow_item){ 4307 .type = RTE_FLOW_ITEM_TYPE_END, 4308 }; 4309 actions[0] = (struct rte_flow_action){ 4310 .type = (enum rte_flow_action_type) 4311 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 4312 .conf = &ftag, 4313 }; 4314 actions[1] = (struct rte_flow_action){ 4315 .type = (enum rte_flow_action_type) 4316 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4317 .conf = &cp_mreg, 4318 }; 4319 actions[2] = (struct rte_flow_action){ 4320 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4321 .conf = &jump, 4322 }; 4323 actions[3] = (struct rte_flow_action){ 4324 .type = RTE_FLOW_ACTION_TYPE_END, 4325 }; 4326 } else { 4327 /* Default rule, wildcard match. */ 4328 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR; 4329 items[0] = (struct rte_flow_item){ 4330 .type = RTE_FLOW_ITEM_TYPE_END, 4331 }; 4332 actions[0] = (struct rte_flow_action){ 4333 .type = (enum rte_flow_action_type) 4334 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4335 .conf = &cp_mreg, 4336 }; 4337 actions[1] = (struct rte_flow_action){ 4338 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4339 .conf = &jump, 4340 }; 4341 actions[2] = (struct rte_flow_action){ 4342 .type = RTE_FLOW_ACTION_TYPE_END, 4343 }; 4344 } 4345 /* Build a new entry. */ 4346 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4347 if (!mcp_res) { 4348 rte_errno = ENOMEM; 4349 return NULL; 4350 } 4351 mcp_res->idx = idx; 4352 mcp_res->mark_id = mark_id; 4353 /* 4354 * The copy Flows are not included in any list. There 4355 * ones are referenced from other Flows and can not 4356 * be applied, removed, deleted in ardbitrary order 4357 * by list traversing. 4358 */ 4359 mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP, 4360 &attr, items, actions, false, error); 4361 if (!mcp_res->rix_flow) { 4362 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx); 4363 return NULL; 4364 } 4365 return &mcp_res->hlist_ent; 4366 } 4367 4368 struct mlx5_list_entry * 4369 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry, 4370 void *cb_ctx __rte_unused) 4371 { 4372 struct rte_eth_dev *dev = tool_ctx; 4373 struct mlx5_priv *priv = dev->data->dev_private; 4374 struct mlx5_flow_mreg_copy_resource *mcp_res; 4375 uint32_t idx = 0; 4376 4377 mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4378 if (!mcp_res) { 4379 rte_errno = ENOMEM; 4380 return NULL; 4381 } 4382 memcpy(mcp_res, oentry, sizeof(*mcp_res)); 4383 mcp_res->idx = idx; 4384 return &mcp_res->hlist_ent; 4385 } 4386 4387 void 4388 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry) 4389 { 4390 struct mlx5_flow_mreg_copy_resource *mcp_res = 4391 container_of(entry, typeof(*mcp_res), hlist_ent); 4392 struct rte_eth_dev *dev = tool_ctx; 4393 struct mlx5_priv *priv = dev->data->dev_private; 4394 4395 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4396 } 4397 4398 /** 4399 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4400 * 4401 * As mark_id is unique, if there's already a registered flow for the mark_id, 4402 * return by increasing the reference counter of the resource. Otherwise, create 4403 * the resource (mcp_res) and flow. 4404 * 4405 * Flow looks like, 4406 * - If ingress port is ANY and reg_c[1] is mark_id, 4407 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4408 * 4409 * For default flow (zero mark_id), flow is like, 4410 * - If ingress port is ANY, 4411 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 4412 * 4413 * @param dev 4414 * Pointer to Ethernet device. 4415 * @param mark_id 4416 * ID of MARK action, zero means default flow for META. 4417 * @param[out] error 4418 * Perform verbose error reporting if not NULL. 4419 * 4420 * @return 4421 * Associated resource on success, NULL otherwise and rte_errno is set. 4422 */ 4423 static struct mlx5_flow_mreg_copy_resource * 4424 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 4425 struct rte_flow_error *error) 4426 { 4427 struct mlx5_priv *priv = dev->data->dev_private; 4428 struct mlx5_list_entry *entry; 4429 struct mlx5_flow_cb_ctx ctx = { 4430 .dev = dev, 4431 .error = error, 4432 .data = &mark_id, 4433 }; 4434 4435 /* Check if already registered. */ 4436 MLX5_ASSERT(priv->mreg_cp_tbl); 4437 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx); 4438 if (!entry) 4439 return NULL; 4440 return container_of(entry, struct mlx5_flow_mreg_copy_resource, 4441 hlist_ent); 4442 } 4443 4444 void 4445 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry) 4446 { 4447 struct mlx5_flow_mreg_copy_resource *mcp_res = 4448 container_of(entry, typeof(*mcp_res), hlist_ent); 4449 struct rte_eth_dev *dev = tool_ctx; 4450 struct mlx5_priv *priv = dev->data->dev_private; 4451 4452 MLX5_ASSERT(mcp_res->rix_flow); 4453 flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow); 4454 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4455 } 4456 4457 /** 4458 * Release flow in RX_CP_TBL. 4459 * 4460 * @param dev 4461 * Pointer to Ethernet device. 4462 * @flow 4463 * Parent flow for wich copying is provided. 4464 */ 4465 static void 4466 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 4467 struct rte_flow *flow) 4468 { 4469 struct mlx5_flow_mreg_copy_resource *mcp_res; 4470 struct mlx5_priv *priv = dev->data->dev_private; 4471 4472 if (!flow->rix_mreg_copy) 4473 return; 4474 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 4475 flow->rix_mreg_copy); 4476 if (!mcp_res || !priv->mreg_cp_tbl) 4477 return; 4478 MLX5_ASSERT(mcp_res->rix_flow); 4479 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 4480 flow->rix_mreg_copy = 0; 4481 } 4482 4483 /** 4484 * Remove the default copy action from RX_CP_TBL. 4485 * 4486 * This functions is called in the mlx5_dev_start(). No thread safe 4487 * is guaranteed. 4488 * 4489 * @param dev 4490 * Pointer to Ethernet device. 4491 */ 4492 static void 4493 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 4494 { 4495 struct mlx5_list_entry *entry; 4496 struct mlx5_priv *priv = dev->data->dev_private; 4497 struct mlx5_flow_cb_ctx ctx; 4498 uint32_t mark_id; 4499 4500 /* Check if default flow is registered. */ 4501 if (!priv->mreg_cp_tbl) 4502 return; 4503 mark_id = MLX5_DEFAULT_COPY_ID; 4504 ctx.data = &mark_id; 4505 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx); 4506 if (!entry) 4507 return; 4508 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry); 4509 } 4510 4511 /** 4512 * Add the default copy action in in RX_CP_TBL. 4513 * 4514 * This functions is called in the mlx5_dev_start(). No thread safe 4515 * is guaranteed. 4516 * 4517 * @param dev 4518 * Pointer to Ethernet device. 4519 * @param[out] error 4520 * Perform verbose error reporting if not NULL. 4521 * 4522 * @return 4523 * 0 for success, negative value otherwise and rte_errno is set. 4524 */ 4525 static int 4526 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 4527 struct rte_flow_error *error) 4528 { 4529 struct mlx5_priv *priv = dev->data->dev_private; 4530 struct mlx5_flow_mreg_copy_resource *mcp_res; 4531 struct mlx5_flow_cb_ctx ctx; 4532 uint32_t mark_id; 4533 4534 /* Check whether extensive metadata feature is engaged. */ 4535 if (!priv->config.dv_flow_en || 4536 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4537 !mlx5_flow_ext_mreg_supported(dev) || 4538 !priv->sh->dv_regc0_mask) 4539 return 0; 4540 /* 4541 * Add default mreg copy flow may be called multiple time, but 4542 * only be called once in stop. Avoid register it twice. 4543 */ 4544 mark_id = MLX5_DEFAULT_COPY_ID; 4545 ctx.data = &mark_id; 4546 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx)) 4547 return 0; 4548 mcp_res = flow_mreg_add_copy_action(dev, mark_id, error); 4549 if (!mcp_res) 4550 return -rte_errno; 4551 return 0; 4552 } 4553 4554 /** 4555 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4556 * 4557 * All the flow having Q/RSS action should be split by 4558 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 4559 * performs the following, 4560 * - CQE->flow_tag := reg_c[1] (MARK) 4561 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4562 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 4563 * but there should be a flow per each MARK ID set by MARK action. 4564 * 4565 * For the aforementioned reason, if there's a MARK action in flow's action 4566 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 4567 * the MARK ID to CQE's flow_tag like, 4568 * - If reg_c[1] is mark_id, 4569 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4570 * 4571 * For SET_META action which stores value in reg_c[0], as the destination is 4572 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 4573 * MARK ID means the default flow. The default flow looks like, 4574 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4575 * 4576 * @param dev 4577 * Pointer to Ethernet device. 4578 * @param flow 4579 * Pointer to flow structure. 4580 * @param[in] actions 4581 * Pointer to the list of actions. 4582 * @param[out] error 4583 * Perform verbose error reporting if not NULL. 4584 * 4585 * @return 4586 * 0 on success, negative value otherwise and rte_errno is set. 4587 */ 4588 static int 4589 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 4590 struct rte_flow *flow, 4591 const struct rte_flow_action *actions, 4592 struct rte_flow_error *error) 4593 { 4594 struct mlx5_priv *priv = dev->data->dev_private; 4595 struct mlx5_dev_config *config = &priv->config; 4596 struct mlx5_flow_mreg_copy_resource *mcp_res; 4597 const struct rte_flow_action_mark *mark; 4598 4599 /* Check whether extensive metadata feature is engaged. */ 4600 if (!config->dv_flow_en || 4601 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4602 !mlx5_flow_ext_mreg_supported(dev) || 4603 !priv->sh->dv_regc0_mask) 4604 return 0; 4605 /* Find MARK action. */ 4606 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4607 switch (actions->type) { 4608 case RTE_FLOW_ACTION_TYPE_FLAG: 4609 mcp_res = flow_mreg_add_copy_action 4610 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4611 if (!mcp_res) 4612 return -rte_errno; 4613 flow->rix_mreg_copy = mcp_res->idx; 4614 return 0; 4615 case RTE_FLOW_ACTION_TYPE_MARK: 4616 mark = (const struct rte_flow_action_mark *) 4617 actions->conf; 4618 mcp_res = 4619 flow_mreg_add_copy_action(dev, mark->id, error); 4620 if (!mcp_res) 4621 return -rte_errno; 4622 flow->rix_mreg_copy = mcp_res->idx; 4623 return 0; 4624 default: 4625 break; 4626 } 4627 } 4628 return 0; 4629 } 4630 4631 #define MLX5_MAX_SPLIT_ACTIONS 24 4632 #define MLX5_MAX_SPLIT_ITEMS 24 4633 4634 /** 4635 * Split the hairpin flow. 4636 * Since HW can't support encap and push-vlan on Rx, we move these 4637 * actions to Tx. 4638 * If the count action is after the encap then we also 4639 * move the count action. in this case the count will also measure 4640 * the outer bytes. 4641 * 4642 * @param dev 4643 * Pointer to Ethernet device. 4644 * @param[in] actions 4645 * Associated actions (list terminated by the END action). 4646 * @param[out] actions_rx 4647 * Rx flow actions. 4648 * @param[out] actions_tx 4649 * Tx flow actions.. 4650 * @param[out] pattern_tx 4651 * The pattern items for the Tx flow. 4652 * @param[out] flow_id 4653 * The flow ID connected to this flow. 4654 * 4655 * @return 4656 * 0 on success. 4657 */ 4658 static int 4659 flow_hairpin_split(struct rte_eth_dev *dev, 4660 const struct rte_flow_action actions[], 4661 struct rte_flow_action actions_rx[], 4662 struct rte_flow_action actions_tx[], 4663 struct rte_flow_item pattern_tx[], 4664 uint32_t flow_id) 4665 { 4666 const struct rte_flow_action_raw_encap *raw_encap; 4667 const struct rte_flow_action_raw_decap *raw_decap; 4668 struct mlx5_rte_flow_action_set_tag *set_tag; 4669 struct rte_flow_action *tag_action; 4670 struct mlx5_rte_flow_item_tag *tag_item; 4671 struct rte_flow_item *item; 4672 char *addr; 4673 int encap = 0; 4674 4675 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4676 switch (actions->type) { 4677 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4678 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4679 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4680 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4681 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4682 rte_memcpy(actions_tx, actions, 4683 sizeof(struct rte_flow_action)); 4684 actions_tx++; 4685 break; 4686 case RTE_FLOW_ACTION_TYPE_COUNT: 4687 if (encap) { 4688 rte_memcpy(actions_tx, actions, 4689 sizeof(struct rte_flow_action)); 4690 actions_tx++; 4691 } else { 4692 rte_memcpy(actions_rx, actions, 4693 sizeof(struct rte_flow_action)); 4694 actions_rx++; 4695 } 4696 break; 4697 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4698 raw_encap = actions->conf; 4699 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) { 4700 memcpy(actions_tx, actions, 4701 sizeof(struct rte_flow_action)); 4702 actions_tx++; 4703 encap = 1; 4704 } else { 4705 rte_memcpy(actions_rx, actions, 4706 sizeof(struct rte_flow_action)); 4707 actions_rx++; 4708 } 4709 break; 4710 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4711 raw_decap = actions->conf; 4712 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) { 4713 memcpy(actions_tx, actions, 4714 sizeof(struct rte_flow_action)); 4715 actions_tx++; 4716 } else { 4717 rte_memcpy(actions_rx, actions, 4718 sizeof(struct rte_flow_action)); 4719 actions_rx++; 4720 } 4721 break; 4722 default: 4723 rte_memcpy(actions_rx, actions, 4724 sizeof(struct rte_flow_action)); 4725 actions_rx++; 4726 break; 4727 } 4728 } 4729 /* Add set meta action and end action for the Rx flow. */ 4730 tag_action = actions_rx; 4731 tag_action->type = (enum rte_flow_action_type) 4732 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4733 actions_rx++; 4734 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4735 actions_rx++; 4736 set_tag = (void *)actions_rx; 4737 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4738 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), 4739 .data = flow_id, 4740 }; 4741 MLX5_ASSERT(set_tag->id > REG_NON); 4742 tag_action->conf = set_tag; 4743 /* Create Tx item list. */ 4744 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4745 addr = (void *)&pattern_tx[2]; 4746 item = pattern_tx; 4747 item->type = (enum rte_flow_item_type) 4748 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4749 tag_item = (void *)addr; 4750 tag_item->data = flow_id; 4751 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4752 MLX5_ASSERT(set_tag->id > REG_NON); 4753 item->spec = tag_item; 4754 addr += sizeof(struct mlx5_rte_flow_item_tag); 4755 tag_item = (void *)addr; 4756 tag_item->data = UINT32_MAX; 4757 tag_item->id = UINT16_MAX; 4758 item->mask = tag_item; 4759 item->last = NULL; 4760 item++; 4761 item->type = RTE_FLOW_ITEM_TYPE_END; 4762 return 0; 4763 } 4764 4765 /** 4766 * The last stage of splitting chain, just creates the subflow 4767 * without any modification. 4768 * 4769 * @param[in] dev 4770 * Pointer to Ethernet device. 4771 * @param[in] flow 4772 * Parent flow structure pointer. 4773 * @param[in, out] sub_flow 4774 * Pointer to return the created subflow, may be NULL. 4775 * @param[in] attr 4776 * Flow rule attributes. 4777 * @param[in] items 4778 * Pattern specification (list terminated by the END pattern item). 4779 * @param[in] actions 4780 * Associated actions (list terminated by the END action). 4781 * @param[in] flow_split_info 4782 * Pointer to flow split info structure. 4783 * @param[out] error 4784 * Perform verbose error reporting if not NULL. 4785 * @return 4786 * 0 on success, negative value otherwise 4787 */ 4788 static int 4789 flow_create_split_inner(struct rte_eth_dev *dev, 4790 struct rte_flow *flow, 4791 struct mlx5_flow **sub_flow, 4792 const struct rte_flow_attr *attr, 4793 const struct rte_flow_item items[], 4794 const struct rte_flow_action actions[], 4795 struct mlx5_flow_split_info *flow_split_info, 4796 struct rte_flow_error *error) 4797 { 4798 struct mlx5_flow *dev_flow; 4799 4800 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4801 flow_split_info->flow_idx, error); 4802 if (!dev_flow) 4803 return -rte_errno; 4804 dev_flow->flow = flow; 4805 dev_flow->external = flow_split_info->external; 4806 dev_flow->skip_scale = flow_split_info->skip_scale; 4807 /* Subflow object was created, we must include one in the list. */ 4808 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4809 dev_flow->handle, next); 4810 /* 4811 * If dev_flow is as one of the suffix flow, some actions in suffix 4812 * flow may need some user defined item layer flags, and pass the 4813 * Metadate rxq mark flag to suffix flow as well. 4814 */ 4815 if (flow_split_info->prefix_layers) 4816 dev_flow->handle->layers = flow_split_info->prefix_layers; 4817 if (flow_split_info->prefix_mark) 4818 dev_flow->handle->mark = 1; 4819 if (sub_flow) 4820 *sub_flow = dev_flow; 4821 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4822 dev_flow->dv.table_id = flow_split_info->table_id; 4823 #endif 4824 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4825 } 4826 4827 /** 4828 * Get the sub policy of a meter. 4829 * 4830 * @param[in] dev 4831 * Pointer to Ethernet device. 4832 * @param[in] flow 4833 * Parent flow structure pointer. 4834 * @param wks 4835 * Pointer to thread flow work space. 4836 * @param[in] attr 4837 * Flow rule attributes. 4838 * @param[in] items 4839 * Pattern specification (list terminated by the END pattern item). 4840 * @param[out] error 4841 * Perform verbose error reporting if not NULL. 4842 * 4843 * @return 4844 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set. 4845 */ 4846 static struct mlx5_flow_meter_sub_policy * 4847 get_meter_sub_policy(struct rte_eth_dev *dev, 4848 struct rte_flow *flow, 4849 struct mlx5_flow_workspace *wks, 4850 const struct rte_flow_attr *attr, 4851 const struct rte_flow_item items[], 4852 struct rte_flow_error *error) 4853 { 4854 struct mlx5_flow_meter_policy *policy; 4855 struct mlx5_flow_meter_policy *final_policy; 4856 struct mlx5_flow_meter_sub_policy *sub_policy = NULL; 4857 4858 policy = wks->policy; 4859 final_policy = policy->is_hierarchy ? wks->final_policy : policy; 4860 if (final_policy->is_rss || final_policy->is_queue) { 4861 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS]; 4862 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0}; 4863 uint32_t i; 4864 4865 /* 4866 * This is a tmp dev_flow, 4867 * no need to register any matcher for it in translate. 4868 */ 4869 wks->skip_matcher_reg = 1; 4870 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) { 4871 struct mlx5_flow dev_flow = {0}; 4872 struct mlx5_flow_handle dev_handle = { {0} }; 4873 uint8_t fate = final_policy->act_cnt[i].fate_action; 4874 4875 if (fate == MLX5_FLOW_FATE_SHARED_RSS) { 4876 const struct rte_flow_action_rss *rss_act = 4877 final_policy->act_cnt[i].rss->conf; 4878 struct rte_flow_action rss_actions[2] = { 4879 [0] = { 4880 .type = RTE_FLOW_ACTION_TYPE_RSS, 4881 .conf = rss_act, 4882 }, 4883 [1] = { 4884 .type = RTE_FLOW_ACTION_TYPE_END, 4885 .conf = NULL, 4886 } 4887 }; 4888 4889 dev_flow.handle = &dev_handle; 4890 dev_flow.ingress = attr->ingress; 4891 dev_flow.flow = flow; 4892 dev_flow.external = 0; 4893 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4894 dev_flow.dv.transfer = attr->transfer; 4895 #endif 4896 /** 4897 * Translate RSS action to get rss hash fields. 4898 */ 4899 if (flow_drv_translate(dev, &dev_flow, attr, 4900 items, rss_actions, error)) 4901 goto exit; 4902 rss_desc_v[i] = wks->rss_desc; 4903 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN; 4904 rss_desc_v[i].hash_fields = 4905 dev_flow.hash_fields; 4906 rss_desc_v[i].queue_num = 4907 rss_desc_v[i].hash_fields ? 4908 rss_desc_v[i].queue_num : 1; 4909 rss_desc_v[i].tunnel = 4910 !!(dev_flow.handle->layers & 4911 MLX5_FLOW_LAYER_TUNNEL); 4912 /* Use the RSS queues in the containers. */ 4913 rss_desc_v[i].queue = 4914 (uint16_t *)(uintptr_t)rss_act->queue; 4915 rss_desc[i] = &rss_desc_v[i]; 4916 } else if (fate == MLX5_FLOW_FATE_QUEUE) { 4917 /* This is queue action. */ 4918 rss_desc_v[i] = wks->rss_desc; 4919 rss_desc_v[i].key_len = 0; 4920 rss_desc_v[i].hash_fields = 0; 4921 rss_desc_v[i].queue = 4922 &final_policy->act_cnt[i].queue; 4923 rss_desc_v[i].queue_num = 1; 4924 rss_desc[i] = &rss_desc_v[i]; 4925 } else { 4926 rss_desc[i] = NULL; 4927 } 4928 } 4929 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev, 4930 flow, policy, rss_desc); 4931 } else { 4932 enum mlx5_meter_domain mtr_domain = 4933 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4934 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4935 MLX5_MTR_DOMAIN_INGRESS); 4936 sub_policy = policy->sub_policys[mtr_domain][0]; 4937 } 4938 if (!sub_policy) 4939 rte_flow_error_set(error, EINVAL, 4940 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4941 "Failed to get meter sub-policy."); 4942 exit: 4943 return sub_policy; 4944 } 4945 4946 /** 4947 * Split the meter flow. 4948 * 4949 * As meter flow will split to three sub flow, other than meter 4950 * action, the other actions make sense to only meter accepts 4951 * the packet. If it need to be dropped, no other additional 4952 * actions should be take. 4953 * 4954 * One kind of special action which decapsulates the L3 tunnel 4955 * header will be in the prefix sub flow, as not to take the 4956 * L3 tunnel header into account. 4957 * 4958 * @param[in] dev 4959 * Pointer to Ethernet device. 4960 * @param[in] flow 4961 * Parent flow structure pointer. 4962 * @param wks 4963 * Pointer to thread flow work space. 4964 * @param[in] attr 4965 * Flow rule attributes. 4966 * @param[in] items 4967 * Pattern specification (list terminated by the END pattern item). 4968 * @param[out] sfx_items 4969 * Suffix flow match items (list terminated by the END pattern item). 4970 * @param[in] actions 4971 * Associated actions (list terminated by the END action). 4972 * @param[out] actions_sfx 4973 * Suffix flow actions. 4974 * @param[out] actions_pre 4975 * Prefix flow actions. 4976 * @param[out] mtr_flow_id 4977 * Pointer to meter flow id. 4978 * @param[out] error 4979 * Perform verbose error reporting if not NULL. 4980 * 4981 * @return 4982 * 0 on success, a negative errno value otherwise and rte_errno is set. 4983 */ 4984 static int 4985 flow_meter_split_prep(struct rte_eth_dev *dev, 4986 struct rte_flow *flow, 4987 struct mlx5_flow_workspace *wks, 4988 const struct rte_flow_attr *attr, 4989 const struct rte_flow_item items[], 4990 struct rte_flow_item sfx_items[], 4991 const struct rte_flow_action actions[], 4992 struct rte_flow_action actions_sfx[], 4993 struct rte_flow_action actions_pre[], 4994 uint32_t *mtr_flow_id, 4995 struct rte_flow_error *error) 4996 { 4997 struct mlx5_priv *priv = dev->data->dev_private; 4998 struct mlx5_flow_meter_info *fm = wks->fm; 4999 struct rte_flow_action *tag_action = NULL; 5000 struct rte_flow_item *tag_item; 5001 struct mlx5_rte_flow_action_set_tag *set_tag; 5002 const struct rte_flow_action_raw_encap *raw_encap; 5003 const struct rte_flow_action_raw_decap *raw_decap; 5004 struct mlx5_rte_flow_item_tag *tag_item_spec; 5005 struct mlx5_rte_flow_item_tag *tag_item_mask; 5006 uint32_t tag_id = 0; 5007 struct rte_flow_item *vlan_item_dst = NULL; 5008 const struct rte_flow_item *vlan_item_src = NULL; 5009 struct rte_flow_action *hw_mtr_action; 5010 struct rte_flow_action *action_pre_head = NULL; 5011 int32_t flow_src_port = priv->representor_id; 5012 bool mtr_first; 5013 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0; 5014 uint8_t mtr_reg_bits = priv->mtr_reg_share ? 5015 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS; 5016 uint32_t flow_id = 0; 5017 uint32_t flow_id_reversed = 0; 5018 uint8_t flow_id_bits = 0; 5019 int shift; 5020 5021 /* Prepare the suffix subflow items. */ 5022 tag_item = sfx_items++; 5023 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 5024 struct mlx5_priv *port_priv; 5025 const struct rte_flow_item_port_id *pid_v; 5026 int item_type = items->type; 5027 5028 switch (item_type) { 5029 case RTE_FLOW_ITEM_TYPE_PORT_ID: 5030 pid_v = items->spec; 5031 MLX5_ASSERT(pid_v); 5032 port_priv = mlx5_port_to_eswitch_info(pid_v->id, false); 5033 if (!port_priv) 5034 return rte_flow_error_set(error, 5035 rte_errno, 5036 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 5037 pid_v, 5038 "Failed to get port info."); 5039 flow_src_port = port_priv->representor_id; 5040 if (!fm->def_policy && wks->policy->is_hierarchy && 5041 flow_src_port != priv->representor_id) { 5042 if (flow_drv_mtr_hierarchy_rule_create(dev, 5043 flow, fm, 5044 flow_src_port, 5045 items, 5046 error)) 5047 return -rte_errno; 5048 } 5049 memcpy(sfx_items, items, sizeof(*sfx_items)); 5050 sfx_items++; 5051 break; 5052 case RTE_FLOW_ITEM_TYPE_VLAN: 5053 /* Determine if copy vlan item below. */ 5054 vlan_item_src = items; 5055 vlan_item_dst = sfx_items++; 5056 vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID; 5057 break; 5058 default: 5059 break; 5060 } 5061 } 5062 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 5063 sfx_items++; 5064 mtr_first = priv->sh->meter_aso_en && 5065 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX)); 5066 /* For ASO meter, meter must be before tag in TX direction. */ 5067 if (mtr_first) { 5068 action_pre_head = actions_pre++; 5069 /* Leave space for tag action. */ 5070 tag_action = actions_pre++; 5071 } 5072 /* Prepare the actions for prefix and suffix flow. */ 5073 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5074 struct rte_flow_action *action_cur = NULL; 5075 5076 switch (actions->type) { 5077 case RTE_FLOW_ACTION_TYPE_METER: 5078 if (mtr_first) { 5079 action_cur = action_pre_head; 5080 } else { 5081 /* Leave space for tag action. */ 5082 tag_action = actions_pre++; 5083 action_cur = actions_pre++; 5084 } 5085 break; 5086 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5087 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5088 action_cur = actions_pre++; 5089 break; 5090 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 5091 raw_encap = actions->conf; 5092 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 5093 action_cur = actions_pre++; 5094 break; 5095 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5096 raw_decap = actions->conf; 5097 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 5098 action_cur = actions_pre++; 5099 break; 5100 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5101 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5102 if (vlan_item_dst && vlan_item_src) { 5103 memcpy(vlan_item_dst, vlan_item_src, 5104 sizeof(*vlan_item_dst)); 5105 /* 5106 * Convert to internal match item, it is used 5107 * for vlan push and set vid. 5108 */ 5109 vlan_item_dst->type = (enum rte_flow_item_type) 5110 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 5111 } 5112 break; 5113 default: 5114 break; 5115 } 5116 if (!action_cur) 5117 action_cur = (fm->def_policy) ? 5118 actions_sfx++ : actions_pre++; 5119 memcpy(action_cur, actions, sizeof(struct rte_flow_action)); 5120 } 5121 /* Add end action to the actions. */ 5122 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 5123 if (priv->sh->meter_aso_en) { 5124 /** 5125 * For ASO meter, need to add an extra jump action explicitly, 5126 * to jump from meter to policer table. 5127 */ 5128 struct mlx5_flow_meter_sub_policy *sub_policy; 5129 struct mlx5_flow_tbl_data_entry *tbl_data; 5130 5131 if (!fm->def_policy) { 5132 sub_policy = get_meter_sub_policy(dev, flow, wks, 5133 attr, items, error); 5134 if (!sub_policy) 5135 return -rte_errno; 5136 } else { 5137 enum mlx5_meter_domain mtr_domain = 5138 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 5139 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 5140 MLX5_MTR_DOMAIN_INGRESS); 5141 5142 sub_policy = 5143 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy; 5144 } 5145 tbl_data = container_of(sub_policy->tbl_rsc, 5146 struct mlx5_flow_tbl_data_entry, tbl); 5147 hw_mtr_action = actions_pre++; 5148 hw_mtr_action->type = (enum rte_flow_action_type) 5149 MLX5_RTE_FLOW_ACTION_TYPE_JUMP; 5150 hw_mtr_action->conf = tbl_data->jump.action; 5151 } 5152 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 5153 actions_pre++; 5154 if (!tag_action) 5155 return rte_flow_error_set(error, ENOMEM, 5156 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5157 NULL, "No tag action space."); 5158 if (!mtr_flow_id) { 5159 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID; 5160 goto exit; 5161 } 5162 /* Only default-policy Meter creates mtr flow id. */ 5163 if (fm->def_policy) { 5164 mlx5_ipool_malloc(fm->flow_ipool, &tag_id); 5165 if (!tag_id) 5166 return rte_flow_error_set(error, ENOMEM, 5167 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 5168 "Failed to allocate meter flow id."); 5169 flow_id = tag_id - 1; 5170 flow_id_bits = (!flow_id) ? 1 : 5171 (MLX5_REG_BITS - __builtin_clz(flow_id)); 5172 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) > 5173 mtr_reg_bits) { 5174 mlx5_ipool_free(fm->flow_ipool, tag_id); 5175 return rte_flow_error_set(error, EINVAL, 5176 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 5177 "Meter flow id exceeds max limit."); 5178 } 5179 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits) 5180 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits; 5181 } 5182 /* Build tag actions and items for meter_id/meter flow_id. */ 5183 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre; 5184 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 5185 tag_item_mask = tag_item_spec + 1; 5186 /* Both flow_id and meter_id share the same register. */ 5187 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5188 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 5189 0, error), 5190 .offset = mtr_id_offset, 5191 .length = mtr_reg_bits, 5192 .data = flow->meter, 5193 }; 5194 /* 5195 * The color Reg bits used by flow_id are growing from 5196 * msb to lsb, so must do bit reverse for flow_id val in RegC. 5197 */ 5198 for (shift = 0; shift < flow_id_bits; shift++) 5199 flow_id_reversed = (flow_id_reversed << 1) | 5200 ((flow_id >> shift) & 0x1); 5201 set_tag->data |= 5202 flow_id_reversed << (mtr_reg_bits - flow_id_bits); 5203 tag_item_spec->id = set_tag->id; 5204 tag_item_spec->data = set_tag->data << mtr_id_offset; 5205 tag_item_mask->data = UINT32_MAX << mtr_id_offset; 5206 tag_action->type = (enum rte_flow_action_type) 5207 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5208 tag_action->conf = set_tag; 5209 tag_item->type = (enum rte_flow_item_type) 5210 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 5211 tag_item->spec = tag_item_spec; 5212 tag_item->last = NULL; 5213 tag_item->mask = tag_item_mask; 5214 exit: 5215 if (mtr_flow_id) 5216 *mtr_flow_id = tag_id; 5217 return 0; 5218 } 5219 5220 /** 5221 * Split action list having QUEUE/RSS for metadata register copy. 5222 * 5223 * Once Q/RSS action is detected in user's action list, the flow action 5224 * should be split in order to copy metadata registers, which will happen in 5225 * RX_CP_TBL like, 5226 * - CQE->flow_tag := reg_c[1] (MARK) 5227 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 5228 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 5229 * This is because the last action of each flow must be a terminal action 5230 * (QUEUE, RSS or DROP). 5231 * 5232 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 5233 * stored and kept in the mlx5_flow structure per each sub_flow. 5234 * 5235 * The Q/RSS action is replaced with, 5236 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 5237 * And the following JUMP action is added at the end, 5238 * - JUMP, to RX_CP_TBL. 5239 * 5240 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 5241 * flow_create_split_metadata() routine. The flow will look like, 5242 * - If flow ID matches (reg_c[2]), perform Q/RSS. 5243 * 5244 * @param dev 5245 * Pointer to Ethernet device. 5246 * @param[out] split_actions 5247 * Pointer to store split actions to jump to CP_TBL. 5248 * @param[in] actions 5249 * Pointer to the list of original flow actions. 5250 * @param[in] qrss 5251 * Pointer to the Q/RSS action. 5252 * @param[in] actions_n 5253 * Number of original actions. 5254 * @param[out] error 5255 * Perform verbose error reporting if not NULL. 5256 * 5257 * @return 5258 * non-zero unique flow_id on success, otherwise 0 and 5259 * error/rte_error are set. 5260 */ 5261 static uint32_t 5262 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 5263 struct rte_flow_action *split_actions, 5264 const struct rte_flow_action *actions, 5265 const struct rte_flow_action *qrss, 5266 int actions_n, struct rte_flow_error *error) 5267 { 5268 struct mlx5_priv *priv = dev->data->dev_private; 5269 struct mlx5_rte_flow_action_set_tag *set_tag; 5270 struct rte_flow_action_jump *jump; 5271 const int qrss_idx = qrss - actions; 5272 uint32_t flow_id = 0; 5273 int ret = 0; 5274 5275 /* 5276 * Given actions will be split 5277 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 5278 * - Add jump to mreg CP_TBL. 5279 * As a result, there will be one more action. 5280 */ 5281 ++actions_n; 5282 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 5283 set_tag = (void *)(split_actions + actions_n); 5284 /* 5285 * If tag action is not set to void(it means we are not the meter 5286 * suffix flow), add the tag action. Since meter suffix flow already 5287 * has the tag added. 5288 */ 5289 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 5290 /* 5291 * Allocate the new subflow ID. This one is unique within 5292 * device and not shared with representors. Otherwise, 5293 * we would have to resolve multi-thread access synch 5294 * issue. Each flow on the shared device is appended 5295 * with source vport identifier, so the resulting 5296 * flows will be unique in the shared (by master and 5297 * representors) domain even if they have coinciding 5298 * IDs. 5299 */ 5300 mlx5_ipool_malloc(priv->sh->ipool 5301 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); 5302 if (!flow_id) 5303 return rte_flow_error_set(error, ENOMEM, 5304 RTE_FLOW_ERROR_TYPE_ACTION, 5305 NULL, "can't allocate id " 5306 "for split Q/RSS subflow"); 5307 /* Internal SET_TAG action to set flow ID. */ 5308 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 5309 .data = flow_id, 5310 }; 5311 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 5312 if (ret < 0) 5313 return ret; 5314 set_tag->id = ret; 5315 /* Construct new actions array. */ 5316 /* Replace QUEUE/RSS action. */ 5317 split_actions[qrss_idx] = (struct rte_flow_action){ 5318 .type = (enum rte_flow_action_type) 5319 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5320 .conf = set_tag, 5321 }; 5322 } 5323 /* JUMP action to jump to mreg copy table (CP_TBL). */ 5324 jump = (void *)(set_tag + 1); 5325 *jump = (struct rte_flow_action_jump){ 5326 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 5327 }; 5328 split_actions[actions_n - 2] = (struct rte_flow_action){ 5329 .type = RTE_FLOW_ACTION_TYPE_JUMP, 5330 .conf = jump, 5331 }; 5332 split_actions[actions_n - 1] = (struct rte_flow_action){ 5333 .type = RTE_FLOW_ACTION_TYPE_END, 5334 }; 5335 return flow_id; 5336 } 5337 5338 /** 5339 * Extend the given action list for Tx metadata copy. 5340 * 5341 * Copy the given action list to the ext_actions and add flow metadata register 5342 * copy action in order to copy reg_a set by WQE to reg_c[0]. 5343 * 5344 * @param[out] ext_actions 5345 * Pointer to the extended action list. 5346 * @param[in] actions 5347 * Pointer to the list of actions. 5348 * @param[in] actions_n 5349 * Number of actions in the list. 5350 * @param[out] error 5351 * Perform verbose error reporting if not NULL. 5352 * @param[in] encap_idx 5353 * The encap action inndex. 5354 * 5355 * @return 5356 * 0 on success, negative value otherwise 5357 */ 5358 static int 5359 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 5360 struct rte_flow_action *ext_actions, 5361 const struct rte_flow_action *actions, 5362 int actions_n, struct rte_flow_error *error, 5363 int encap_idx) 5364 { 5365 struct mlx5_flow_action_copy_mreg *cp_mreg = 5366 (struct mlx5_flow_action_copy_mreg *) 5367 (ext_actions + actions_n + 1); 5368 int ret; 5369 5370 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 5371 if (ret < 0) 5372 return ret; 5373 cp_mreg->dst = ret; 5374 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 5375 if (ret < 0) 5376 return ret; 5377 cp_mreg->src = ret; 5378 if (encap_idx != 0) 5379 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 5380 if (encap_idx == actions_n - 1) { 5381 ext_actions[actions_n - 1] = (struct rte_flow_action){ 5382 .type = (enum rte_flow_action_type) 5383 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5384 .conf = cp_mreg, 5385 }; 5386 ext_actions[actions_n] = (struct rte_flow_action){ 5387 .type = RTE_FLOW_ACTION_TYPE_END, 5388 }; 5389 } else { 5390 ext_actions[encap_idx] = (struct rte_flow_action){ 5391 .type = (enum rte_flow_action_type) 5392 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5393 .conf = cp_mreg, 5394 }; 5395 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 5396 sizeof(*ext_actions) * (actions_n - encap_idx)); 5397 } 5398 return 0; 5399 } 5400 5401 /** 5402 * Check the match action from the action list. 5403 * 5404 * @param[in] actions 5405 * Pointer to the list of actions. 5406 * @param[in] attr 5407 * Flow rule attributes. 5408 * @param[in] action 5409 * The action to be check if exist. 5410 * @param[out] match_action_pos 5411 * Pointer to the position of the matched action if exists, otherwise is -1. 5412 * @param[out] qrss_action_pos 5413 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 5414 * @param[out] modify_after_mirror 5415 * Pointer to the flag of modify action after FDB mirroring. 5416 * 5417 * @return 5418 * > 0 the total number of actions. 5419 * 0 if not found match action in action list. 5420 */ 5421 static int 5422 flow_check_match_action(const struct rte_flow_action actions[], 5423 const struct rte_flow_attr *attr, 5424 enum rte_flow_action_type action, 5425 int *match_action_pos, int *qrss_action_pos, 5426 int *modify_after_mirror) 5427 { 5428 const struct rte_flow_action_sample *sample; 5429 const struct rte_flow_action_raw_decap *decap; 5430 int actions_n = 0; 5431 uint32_t ratio = 0; 5432 int sub_type = 0; 5433 int flag = 0; 5434 int fdb_mirror = 0; 5435 5436 *match_action_pos = -1; 5437 *qrss_action_pos = -1; 5438 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5439 if (actions->type == action) { 5440 flag = 1; 5441 *match_action_pos = actions_n; 5442 } 5443 switch (actions->type) { 5444 case RTE_FLOW_ACTION_TYPE_QUEUE: 5445 case RTE_FLOW_ACTION_TYPE_RSS: 5446 *qrss_action_pos = actions_n; 5447 break; 5448 case RTE_FLOW_ACTION_TYPE_SAMPLE: 5449 sample = actions->conf; 5450 ratio = sample->ratio; 5451 sub_type = ((const struct rte_flow_action *) 5452 (sample->actions))->type; 5453 if (ratio == 1 && attr->transfer) 5454 fdb_mirror = 1; 5455 break; 5456 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 5457 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 5458 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 5459 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 5460 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 5461 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 5462 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 5463 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 5464 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 5465 case RTE_FLOW_ACTION_TYPE_SET_TTL: 5466 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 5467 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 5468 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 5469 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 5470 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 5471 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 5472 case RTE_FLOW_ACTION_TYPE_FLAG: 5473 case RTE_FLOW_ACTION_TYPE_MARK: 5474 case RTE_FLOW_ACTION_TYPE_SET_META: 5475 case RTE_FLOW_ACTION_TYPE_SET_TAG: 5476 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 5477 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5478 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5479 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 5480 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5481 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5482 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 5483 case RTE_FLOW_ACTION_TYPE_METER: 5484 if (fdb_mirror) 5485 *modify_after_mirror = 1; 5486 break; 5487 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5488 decap = actions->conf; 5489 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID) 5490 ; 5491 actions_n++; 5492 if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) { 5493 const struct rte_flow_action_raw_encap *encap = 5494 actions->conf; 5495 if (decap->size <= 5496 MLX5_ENCAPSULATION_DECISION_SIZE && 5497 encap->size > 5498 MLX5_ENCAPSULATION_DECISION_SIZE) 5499 /* L3 encap. */ 5500 break; 5501 } 5502 if (fdb_mirror) 5503 *modify_after_mirror = 1; 5504 break; 5505 default: 5506 break; 5507 } 5508 actions_n++; 5509 } 5510 if (flag && fdb_mirror && !*modify_after_mirror) { 5511 /* FDB mirroring uses the destination array to implement 5512 * instead of FLOW_SAMPLER object. 5513 */ 5514 if (sub_type != RTE_FLOW_ACTION_TYPE_END) 5515 flag = 0; 5516 } 5517 /* Count RTE_FLOW_ACTION_TYPE_END. */ 5518 return flag ? actions_n + 1 : 0; 5519 } 5520 5521 #define SAMPLE_SUFFIX_ITEM 2 5522 5523 /** 5524 * Split the sample flow. 5525 * 5526 * As sample flow will split to two sub flow, sample flow with 5527 * sample action, the other actions will move to new suffix flow. 5528 * 5529 * Also add unique tag id with tag action in the sample flow, 5530 * the same tag id will be as match in the suffix flow. 5531 * 5532 * @param dev 5533 * Pointer to Ethernet device. 5534 * @param[in] add_tag 5535 * Add extra tag action flag. 5536 * @param[out] sfx_items 5537 * Suffix flow match items (list terminated by the END pattern item). 5538 * @param[in] actions 5539 * Associated actions (list terminated by the END action). 5540 * @param[out] actions_sfx 5541 * Suffix flow actions. 5542 * @param[out] actions_pre 5543 * Prefix flow actions. 5544 * @param[in] actions_n 5545 * The total number of actions. 5546 * @param[in] sample_action_pos 5547 * The sample action position. 5548 * @param[in] qrss_action_pos 5549 * The Queue/RSS action position. 5550 * @param[in] jump_table 5551 * Add extra jump action flag. 5552 * @param[out] error 5553 * Perform verbose error reporting if not NULL. 5554 * 5555 * @return 5556 * 0 on success, or unique flow_id, a negative errno value 5557 * otherwise and rte_errno is set. 5558 */ 5559 static int 5560 flow_sample_split_prep(struct rte_eth_dev *dev, 5561 int add_tag, 5562 struct rte_flow_item sfx_items[], 5563 const struct rte_flow_action actions[], 5564 struct rte_flow_action actions_sfx[], 5565 struct rte_flow_action actions_pre[], 5566 int actions_n, 5567 int sample_action_pos, 5568 int qrss_action_pos, 5569 int jump_table, 5570 struct rte_flow_error *error) 5571 { 5572 struct mlx5_priv *priv = dev->data->dev_private; 5573 struct mlx5_rte_flow_action_set_tag *set_tag; 5574 struct mlx5_rte_flow_item_tag *tag_spec; 5575 struct mlx5_rte_flow_item_tag *tag_mask; 5576 struct rte_flow_action_jump *jump_action; 5577 uint32_t tag_id = 0; 5578 int index; 5579 int append_index = 0; 5580 int ret; 5581 5582 if (sample_action_pos < 0) 5583 return rte_flow_error_set(error, EINVAL, 5584 RTE_FLOW_ERROR_TYPE_ACTION, 5585 NULL, "invalid position of sample " 5586 "action in list"); 5587 /* Prepare the actions for prefix and suffix flow. */ 5588 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 5589 index = qrss_action_pos; 5590 /* Put the preceding the Queue/RSS action into prefix flow. */ 5591 if (index != 0) 5592 memcpy(actions_pre, actions, 5593 sizeof(struct rte_flow_action) * index); 5594 /* Put others preceding the sample action into prefix flow. */ 5595 if (sample_action_pos > index + 1) 5596 memcpy(actions_pre + index, actions + index + 1, 5597 sizeof(struct rte_flow_action) * 5598 (sample_action_pos - index - 1)); 5599 index = sample_action_pos - 1; 5600 /* Put Queue/RSS action into Suffix flow. */ 5601 memcpy(actions_sfx, actions + qrss_action_pos, 5602 sizeof(struct rte_flow_action)); 5603 actions_sfx++; 5604 } else { 5605 index = sample_action_pos; 5606 if (index != 0) 5607 memcpy(actions_pre, actions, 5608 sizeof(struct rte_flow_action) * index); 5609 } 5610 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress. 5611 * For CX6DX and above, metadata registers Cx preserve their value, 5612 * add an extra tag action for NIC-RX and E-Switch Domain. 5613 */ 5614 if (add_tag) { 5615 /* Prepare the prefix tag action. */ 5616 append_index++; 5617 set_tag = (void *)(actions_pre + actions_n + append_index); 5618 ret = mlx5_flow_get_reg_id(dev, MLX5_SAMPLE_ID, 0, error); 5619 if (ret < 0) 5620 return ret; 5621 mlx5_ipool_malloc(priv->sh->ipool 5622 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); 5623 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5624 .id = ret, 5625 .data = tag_id, 5626 }; 5627 /* Prepare the suffix subflow items. */ 5628 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 5629 tag_spec->data = tag_id; 5630 tag_spec->id = set_tag->id; 5631 tag_mask = tag_spec + 1; 5632 tag_mask->data = UINT32_MAX; 5633 sfx_items[0] = (struct rte_flow_item){ 5634 .type = (enum rte_flow_item_type) 5635 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5636 .spec = tag_spec, 5637 .last = NULL, 5638 .mask = tag_mask, 5639 }; 5640 sfx_items[1] = (struct rte_flow_item){ 5641 .type = (enum rte_flow_item_type) 5642 RTE_FLOW_ITEM_TYPE_END, 5643 }; 5644 /* Prepare the tag action in prefix subflow. */ 5645 actions_pre[index++] = 5646 (struct rte_flow_action){ 5647 .type = (enum rte_flow_action_type) 5648 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5649 .conf = set_tag, 5650 }; 5651 } 5652 memcpy(actions_pre + index, actions + sample_action_pos, 5653 sizeof(struct rte_flow_action)); 5654 index += 1; 5655 /* For the modify action after the sample action in E-Switch mirroring, 5656 * Add the extra jump action in prefix subflow and jump into the next 5657 * table, then do the modify action in the new table. 5658 */ 5659 if (jump_table) { 5660 /* Prepare the prefix jump action. */ 5661 append_index++; 5662 jump_action = (void *)(actions_pre + actions_n + append_index); 5663 jump_action->group = jump_table; 5664 actions_pre[index++] = 5665 (struct rte_flow_action){ 5666 .type = (enum rte_flow_action_type) 5667 RTE_FLOW_ACTION_TYPE_JUMP, 5668 .conf = jump_action, 5669 }; 5670 } 5671 actions_pre[index] = (struct rte_flow_action){ 5672 .type = (enum rte_flow_action_type) 5673 RTE_FLOW_ACTION_TYPE_END, 5674 }; 5675 /* Put the actions after sample into Suffix flow. */ 5676 memcpy(actions_sfx, actions + sample_action_pos + 1, 5677 sizeof(struct rte_flow_action) * 5678 (actions_n - sample_action_pos - 1)); 5679 return tag_id; 5680 } 5681 5682 /** 5683 * The splitting for metadata feature. 5684 * 5685 * - Q/RSS action on NIC Rx should be split in order to pass by 5686 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5687 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5688 * 5689 * - All the actions on NIC Tx should have a mreg copy action to 5690 * copy reg_a from WQE to reg_c[0]. 5691 * 5692 * @param dev 5693 * Pointer to Ethernet device. 5694 * @param[in] flow 5695 * Parent flow structure pointer. 5696 * @param[in] attr 5697 * Flow rule attributes. 5698 * @param[in] items 5699 * Pattern specification (list terminated by the END pattern item). 5700 * @param[in] actions 5701 * Associated actions (list terminated by the END action). 5702 * @param[in] flow_split_info 5703 * Pointer to flow split info structure. 5704 * @param[out] error 5705 * Perform verbose error reporting if not NULL. 5706 * @return 5707 * 0 on success, negative value otherwise 5708 */ 5709 static int 5710 flow_create_split_metadata(struct rte_eth_dev *dev, 5711 struct rte_flow *flow, 5712 const struct rte_flow_attr *attr, 5713 const struct rte_flow_item items[], 5714 const struct rte_flow_action actions[], 5715 struct mlx5_flow_split_info *flow_split_info, 5716 struct rte_flow_error *error) 5717 { 5718 struct mlx5_priv *priv = dev->data->dev_private; 5719 struct mlx5_dev_config *config = &priv->config; 5720 const struct rte_flow_action *qrss = NULL; 5721 struct rte_flow_action *ext_actions = NULL; 5722 struct mlx5_flow *dev_flow = NULL; 5723 uint32_t qrss_id = 0; 5724 int mtr_sfx = 0; 5725 size_t act_size; 5726 int actions_n; 5727 int encap_idx; 5728 int ret; 5729 5730 /* Check whether extensive metadata feature is engaged. */ 5731 if (!config->dv_flow_en || 5732 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 5733 !mlx5_flow_ext_mreg_supported(dev)) 5734 return flow_create_split_inner(dev, flow, NULL, attr, items, 5735 actions, flow_split_info, error); 5736 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 5737 &encap_idx); 5738 if (qrss) { 5739 /* Exclude hairpin flows from splitting. */ 5740 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 5741 const struct rte_flow_action_queue *queue; 5742 5743 queue = qrss->conf; 5744 if (mlx5_rxq_get_type(dev, queue->index) == 5745 MLX5_RXQ_TYPE_HAIRPIN) 5746 qrss = NULL; 5747 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 5748 const struct rte_flow_action_rss *rss; 5749 5750 rss = qrss->conf; 5751 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 5752 MLX5_RXQ_TYPE_HAIRPIN) 5753 qrss = NULL; 5754 } 5755 } 5756 if (qrss) { 5757 /* Check if it is in meter suffix table. */ 5758 mtr_sfx = attr->group == (attr->transfer ? 5759 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5760 MLX5_FLOW_TABLE_LEVEL_METER); 5761 /* 5762 * Q/RSS action on NIC Rx should be split in order to pass by 5763 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5764 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5765 */ 5766 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5767 sizeof(struct rte_flow_action_set_tag) + 5768 sizeof(struct rte_flow_action_jump); 5769 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5770 SOCKET_ID_ANY); 5771 if (!ext_actions) 5772 return rte_flow_error_set(error, ENOMEM, 5773 RTE_FLOW_ERROR_TYPE_ACTION, 5774 NULL, "no memory to split " 5775 "metadata flow"); 5776 /* 5777 * If we are the suffix flow of meter, tag already exist. 5778 * Set the tag action to void. 5779 */ 5780 if (mtr_sfx) 5781 ext_actions[qrss - actions].type = 5782 RTE_FLOW_ACTION_TYPE_VOID; 5783 else 5784 ext_actions[qrss - actions].type = 5785 (enum rte_flow_action_type) 5786 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5787 /* 5788 * Create the new actions list with removed Q/RSS action 5789 * and appended set tag and jump to register copy table 5790 * (RX_CP_TBL). We should preallocate unique tag ID here 5791 * in advance, because it is needed for set tag action. 5792 */ 5793 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5794 qrss, actions_n, error); 5795 if (!mtr_sfx && !qrss_id) { 5796 ret = -rte_errno; 5797 goto exit; 5798 } 5799 } else if (attr->egress && !attr->transfer) { 5800 /* 5801 * All the actions on NIC Tx should have a metadata register 5802 * copy action to copy reg_a from WQE to reg_c[meta] 5803 */ 5804 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5805 sizeof(struct mlx5_flow_action_copy_mreg); 5806 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5807 SOCKET_ID_ANY); 5808 if (!ext_actions) 5809 return rte_flow_error_set(error, ENOMEM, 5810 RTE_FLOW_ERROR_TYPE_ACTION, 5811 NULL, "no memory to split " 5812 "metadata flow"); 5813 /* Create the action list appended with copy register. */ 5814 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5815 actions_n, error, encap_idx); 5816 if (ret < 0) 5817 goto exit; 5818 } 5819 /* Add the unmodified original or prefix subflow. */ 5820 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5821 items, ext_actions ? ext_actions : 5822 actions, flow_split_info, error); 5823 if (ret < 0) 5824 goto exit; 5825 MLX5_ASSERT(dev_flow); 5826 if (qrss) { 5827 const struct rte_flow_attr q_attr = { 5828 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5829 .ingress = 1, 5830 }; 5831 /* Internal PMD action to set register. */ 5832 struct mlx5_rte_flow_item_tag q_tag_spec = { 5833 .data = qrss_id, 5834 .id = REG_NON, 5835 }; 5836 struct rte_flow_item q_items[] = { 5837 { 5838 .type = (enum rte_flow_item_type) 5839 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5840 .spec = &q_tag_spec, 5841 .last = NULL, 5842 .mask = NULL, 5843 }, 5844 { 5845 .type = RTE_FLOW_ITEM_TYPE_END, 5846 }, 5847 }; 5848 struct rte_flow_action q_actions[] = { 5849 { 5850 .type = qrss->type, 5851 .conf = qrss->conf, 5852 }, 5853 { 5854 .type = RTE_FLOW_ACTION_TYPE_END, 5855 }, 5856 }; 5857 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5858 5859 /* 5860 * Configure the tag item only if there is no meter subflow. 5861 * Since tag is already marked in the meter suffix subflow 5862 * we can just use the meter suffix items as is. 5863 */ 5864 if (qrss_id) { 5865 /* Not meter subflow. */ 5866 MLX5_ASSERT(!mtr_sfx); 5867 /* 5868 * Put unique id in prefix flow due to it is destroyed 5869 * after suffix flow and id will be freed after there 5870 * is no actual flows with this id and identifier 5871 * reallocation becomes possible (for example, for 5872 * other flows in other threads). 5873 */ 5874 dev_flow->handle->split_flow_id = qrss_id; 5875 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5876 error); 5877 if (ret < 0) 5878 goto exit; 5879 q_tag_spec.id = ret; 5880 } 5881 dev_flow = NULL; 5882 /* Add suffix subflow to execute Q/RSS. */ 5883 flow_split_info->prefix_layers = layers; 5884 flow_split_info->prefix_mark = 0; 5885 ret = flow_create_split_inner(dev, flow, &dev_flow, 5886 &q_attr, mtr_sfx ? items : 5887 q_items, q_actions, 5888 flow_split_info, error); 5889 if (ret < 0) 5890 goto exit; 5891 /* qrss ID should be freed if failed. */ 5892 qrss_id = 0; 5893 MLX5_ASSERT(dev_flow); 5894 } 5895 5896 exit: 5897 /* 5898 * We do not destroy the partially created sub_flows in case of error. 5899 * These ones are included into parent flow list and will be destroyed 5900 * by flow_drv_destroy. 5901 */ 5902 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 5903 qrss_id); 5904 mlx5_free(ext_actions); 5905 return ret; 5906 } 5907 5908 /** 5909 * Create meter internal drop flow with the original pattern. 5910 * 5911 * @param dev 5912 * Pointer to Ethernet device. 5913 * @param[in] flow 5914 * Parent flow structure pointer. 5915 * @param[in] attr 5916 * Flow rule attributes. 5917 * @param[in] items 5918 * Pattern specification (list terminated by the END pattern item). 5919 * @param[in] flow_split_info 5920 * Pointer to flow split info structure. 5921 * @param[in] fm 5922 * Pointer to flow meter structure. 5923 * @param[out] error 5924 * Perform verbose error reporting if not NULL. 5925 * @return 5926 * 0 on success, negative value otherwise 5927 */ 5928 static uint32_t 5929 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev, 5930 struct rte_flow *flow, 5931 const struct rte_flow_attr *attr, 5932 const struct rte_flow_item items[], 5933 struct mlx5_flow_split_info *flow_split_info, 5934 struct mlx5_flow_meter_info *fm, 5935 struct rte_flow_error *error) 5936 { 5937 struct mlx5_flow *dev_flow = NULL; 5938 struct rte_flow_attr drop_attr = *attr; 5939 struct rte_flow_action drop_actions[3]; 5940 struct mlx5_flow_split_info drop_split_info = *flow_split_info; 5941 5942 MLX5_ASSERT(fm->drop_cnt); 5943 drop_actions[0].type = 5944 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 5945 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt; 5946 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP; 5947 drop_actions[1].conf = NULL; 5948 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END; 5949 drop_actions[2].conf = NULL; 5950 drop_split_info.external = false; 5951 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5952 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP; 5953 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER; 5954 return flow_create_split_inner(dev, flow, &dev_flow, 5955 &drop_attr, items, drop_actions, 5956 &drop_split_info, error); 5957 } 5958 5959 /** 5960 * The splitting for meter feature. 5961 * 5962 * - The meter flow will be split to two flows as prefix and 5963 * suffix flow. The packets make sense only it pass the prefix 5964 * meter action. 5965 * 5966 * - Reg_C_5 is used for the packet to match betweend prefix and 5967 * suffix flow. 5968 * 5969 * @param dev 5970 * Pointer to Ethernet device. 5971 * @param[in] flow 5972 * Parent flow structure pointer. 5973 * @param[in] attr 5974 * Flow rule attributes. 5975 * @param[in] items 5976 * Pattern specification (list terminated by the END pattern item). 5977 * @param[in] actions 5978 * Associated actions (list terminated by the END action). 5979 * @param[in] flow_split_info 5980 * Pointer to flow split info structure. 5981 * @param[out] error 5982 * Perform verbose error reporting if not NULL. 5983 * @return 5984 * 0 on success, negative value otherwise 5985 */ 5986 static int 5987 flow_create_split_meter(struct rte_eth_dev *dev, 5988 struct rte_flow *flow, 5989 const struct rte_flow_attr *attr, 5990 const struct rte_flow_item items[], 5991 const struct rte_flow_action actions[], 5992 struct mlx5_flow_split_info *flow_split_info, 5993 struct rte_flow_error *error) 5994 { 5995 struct mlx5_priv *priv = dev->data->dev_private; 5996 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); 5997 struct rte_flow_action *sfx_actions = NULL; 5998 struct rte_flow_action *pre_actions = NULL; 5999 struct rte_flow_item *sfx_items = NULL; 6000 struct mlx5_flow *dev_flow = NULL; 6001 struct rte_flow_attr sfx_attr = *attr; 6002 struct mlx5_flow_meter_info *fm = NULL; 6003 uint8_t skip_scale_restore; 6004 bool has_mtr = false; 6005 bool has_modify = false; 6006 bool set_mtr_reg = true; 6007 bool is_mtr_hierarchy = false; 6008 uint32_t meter_id = 0; 6009 uint32_t mtr_idx = 0; 6010 uint32_t mtr_flow_id = 0; 6011 size_t act_size; 6012 size_t item_size; 6013 int actions_n = 0; 6014 int ret = 0; 6015 6016 if (priv->mtr_en) 6017 actions_n = flow_check_meter_action(dev, actions, &has_mtr, 6018 &has_modify, &meter_id); 6019 if (has_mtr) { 6020 if (flow->meter) { 6021 fm = flow_dv_meter_find_by_idx(priv, flow->meter); 6022 if (!fm) 6023 return rte_flow_error_set(error, EINVAL, 6024 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6025 NULL, "Meter not found."); 6026 } else { 6027 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx); 6028 if (!fm) 6029 return rte_flow_error_set(error, EINVAL, 6030 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6031 NULL, "Meter not found."); 6032 ret = mlx5_flow_meter_attach(priv, fm, 6033 &sfx_attr, error); 6034 if (ret) 6035 return -rte_errno; 6036 flow->meter = mtr_idx; 6037 } 6038 MLX5_ASSERT(wks); 6039 wks->fm = fm; 6040 if (!fm->def_policy) { 6041 wks->policy = mlx5_flow_meter_policy_find(dev, 6042 fm->policy_id, 6043 NULL); 6044 MLX5_ASSERT(wks->policy); 6045 if (wks->policy->is_hierarchy) { 6046 wks->final_policy = 6047 mlx5_flow_meter_hierarchy_get_final_policy(dev, 6048 wks->policy); 6049 if (!wks->final_policy) 6050 return rte_flow_error_set(error, 6051 EINVAL, 6052 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 6053 "Failed to find terminal policy of hierarchy."); 6054 is_mtr_hierarchy = true; 6055 } 6056 } 6057 /* 6058 * If it isn't default-policy Meter, and 6059 * 1. There's no action in flow to change 6060 * packet (modify/encap/decap etc.), OR 6061 * 2. No drop count needed for this meter. 6062 * 3. It's not meter hierarchy. 6063 * Then no need to use regC to save meter id anymore. 6064 */ 6065 if (!fm->def_policy && !is_mtr_hierarchy && 6066 (!has_modify || !fm->drop_cnt)) 6067 set_mtr_reg = false; 6068 /* Prefix actions: meter, decap, encap, tag, jump, end. */ 6069 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) + 6070 sizeof(struct mlx5_rte_flow_action_set_tag); 6071 /* Suffix items: tag, vlan, port id, end. */ 6072 #define METER_SUFFIX_ITEM 4 6073 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 6074 sizeof(struct mlx5_rte_flow_item_tag) * 2; 6075 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 6076 0, SOCKET_ID_ANY); 6077 if (!sfx_actions) 6078 return rte_flow_error_set(error, ENOMEM, 6079 RTE_FLOW_ERROR_TYPE_ACTION, 6080 NULL, "no memory to split " 6081 "meter flow"); 6082 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 6083 act_size); 6084 /* There's no suffix flow for meter of non-default policy. */ 6085 if (!fm->def_policy) 6086 pre_actions = sfx_actions + 1; 6087 else 6088 pre_actions = sfx_actions + actions_n; 6089 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr, 6090 items, sfx_items, actions, 6091 sfx_actions, pre_actions, 6092 (set_mtr_reg ? &mtr_flow_id : NULL), 6093 error); 6094 if (ret) { 6095 ret = -rte_errno; 6096 goto exit; 6097 } 6098 /* Add the prefix subflow. */ 6099 flow_split_info->prefix_mark = 0; 6100 skip_scale_restore = flow_split_info->skip_scale; 6101 flow_split_info->skip_scale |= 6102 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 6103 ret = flow_create_split_inner(dev, flow, &dev_flow, 6104 attr, items, pre_actions, 6105 flow_split_info, error); 6106 flow_split_info->skip_scale = skip_scale_restore; 6107 if (ret) { 6108 if (mtr_flow_id) 6109 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id); 6110 ret = -rte_errno; 6111 goto exit; 6112 } 6113 if (mtr_flow_id) { 6114 dev_flow->handle->split_flow_id = mtr_flow_id; 6115 dev_flow->handle->is_meter_flow_id = 1; 6116 } 6117 if (!fm->def_policy) { 6118 if (!set_mtr_reg && fm->drop_cnt) 6119 ret = 6120 flow_meter_create_drop_flow_with_org_pattern(dev, flow, 6121 &sfx_attr, items, 6122 flow_split_info, 6123 fm, error); 6124 goto exit; 6125 } 6126 /* Setting the sfx group atrr. */ 6127 sfx_attr.group = sfx_attr.transfer ? 6128 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 6129 MLX5_FLOW_TABLE_LEVEL_METER; 6130 flow_split_info->prefix_layers = 6131 flow_get_prefix_layer_flags(dev_flow); 6132 flow_split_info->prefix_mark = dev_flow->handle->mark; 6133 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX; 6134 } 6135 /* Add the prefix subflow. */ 6136 ret = flow_create_split_metadata(dev, flow, 6137 &sfx_attr, sfx_items ? 6138 sfx_items : items, 6139 sfx_actions ? sfx_actions : actions, 6140 flow_split_info, error); 6141 exit: 6142 if (sfx_actions) 6143 mlx5_free(sfx_actions); 6144 return ret; 6145 } 6146 6147 /** 6148 * The splitting for sample feature. 6149 * 6150 * Once Sample action is detected in the action list, the flow actions should 6151 * be split into prefix sub flow and suffix sub flow. 6152 * 6153 * The original items remain in the prefix sub flow, all actions preceding the 6154 * sample action and the sample action itself will be copied to the prefix 6155 * sub flow, the actions following the sample action will be copied to the 6156 * suffix sub flow, Queue action always be located in the suffix sub flow. 6157 * 6158 * In order to make the packet from prefix sub flow matches with suffix sub 6159 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 6160 * flow uses tag item with the unique flow id. 6161 * 6162 * @param dev 6163 * Pointer to Ethernet device. 6164 * @param[in] flow 6165 * Parent flow structure pointer. 6166 * @param[in] attr 6167 * Flow rule attributes. 6168 * @param[in] items 6169 * Pattern specification (list terminated by the END pattern item). 6170 * @param[in] actions 6171 * Associated actions (list terminated by the END action). 6172 * @param[in] flow_split_info 6173 * Pointer to flow split info structure. 6174 * @param[out] error 6175 * Perform verbose error reporting if not NULL. 6176 * @return 6177 * 0 on success, negative value otherwise 6178 */ 6179 static int 6180 flow_create_split_sample(struct rte_eth_dev *dev, 6181 struct rte_flow *flow, 6182 const struct rte_flow_attr *attr, 6183 const struct rte_flow_item items[], 6184 const struct rte_flow_action actions[], 6185 struct mlx5_flow_split_info *flow_split_info, 6186 struct rte_flow_error *error) 6187 { 6188 struct mlx5_priv *priv = dev->data->dev_private; 6189 struct rte_flow_action *sfx_actions = NULL; 6190 struct rte_flow_action *pre_actions = NULL; 6191 struct rte_flow_item *sfx_items = NULL; 6192 struct mlx5_flow *dev_flow = NULL; 6193 struct rte_flow_attr sfx_attr = *attr; 6194 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 6195 struct mlx5_flow_dv_sample_resource *sample_res; 6196 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 6197 struct mlx5_flow_tbl_resource *sfx_tbl; 6198 #endif 6199 size_t act_size; 6200 size_t item_size; 6201 uint32_t fdb_tx = 0; 6202 int32_t tag_id = 0; 6203 int actions_n = 0; 6204 int sample_action_pos; 6205 int qrss_action_pos; 6206 int add_tag = 0; 6207 int modify_after_mirror = 0; 6208 uint16_t jump_table = 0; 6209 const uint32_t next_ft_step = 1; 6210 int ret = 0; 6211 6212 if (priv->sampler_en) 6213 actions_n = flow_check_match_action(actions, attr, 6214 RTE_FLOW_ACTION_TYPE_SAMPLE, 6215 &sample_action_pos, &qrss_action_pos, 6216 &modify_after_mirror); 6217 if (actions_n) { 6218 /* The prefix actions must includes sample, tag, end. */ 6219 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 6220 + sizeof(struct mlx5_rte_flow_action_set_tag); 6221 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 6222 sizeof(struct mlx5_rte_flow_item_tag) * 2; 6223 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 6224 item_size), 0, SOCKET_ID_ANY); 6225 if (!sfx_actions) 6226 return rte_flow_error_set(error, ENOMEM, 6227 RTE_FLOW_ERROR_TYPE_ACTION, 6228 NULL, "no memory to split " 6229 "sample flow"); 6230 /* The representor_id is UINT16_MAX for uplink. */ 6231 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX); 6232 /* 6233 * When reg_c_preserve is set, metadata registers Cx preserve 6234 * their value even through packet duplication. 6235 */ 6236 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve); 6237 if (add_tag) 6238 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 6239 + act_size); 6240 if (modify_after_mirror) 6241 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR + 6242 next_ft_step; 6243 pre_actions = sfx_actions + actions_n; 6244 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items, 6245 actions, sfx_actions, 6246 pre_actions, actions_n, 6247 sample_action_pos, 6248 qrss_action_pos, jump_table, 6249 error); 6250 if (tag_id < 0 || (add_tag && !tag_id)) { 6251 ret = -rte_errno; 6252 goto exit; 6253 } 6254 if (modify_after_mirror) 6255 flow_split_info->skip_scale = 6256 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 6257 /* Add the prefix subflow. */ 6258 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 6259 items, pre_actions, 6260 flow_split_info, error); 6261 if (ret) { 6262 ret = -rte_errno; 6263 goto exit; 6264 } 6265 dev_flow->handle->split_flow_id = tag_id; 6266 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 6267 if (!modify_after_mirror) { 6268 /* Set the sfx group attr. */ 6269 sample_res = (struct mlx5_flow_dv_sample_resource *) 6270 dev_flow->dv.sample_res; 6271 sfx_tbl = (struct mlx5_flow_tbl_resource *) 6272 sample_res->normal_path_tbl; 6273 sfx_tbl_data = container_of(sfx_tbl, 6274 struct mlx5_flow_tbl_data_entry, 6275 tbl); 6276 sfx_attr.group = sfx_attr.transfer ? 6277 (sfx_tbl_data->level - 1) : sfx_tbl_data->level; 6278 } else { 6279 MLX5_ASSERT(attr->transfer); 6280 sfx_attr.group = jump_table; 6281 } 6282 flow_split_info->prefix_layers = 6283 flow_get_prefix_layer_flags(dev_flow); 6284 flow_split_info->prefix_mark = dev_flow->handle->mark; 6285 /* Suffix group level already be scaled with factor, set 6286 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale 6287 * again in translation. 6288 */ 6289 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT; 6290 #endif 6291 } 6292 /* Add the suffix subflow. */ 6293 ret = flow_create_split_meter(dev, flow, &sfx_attr, 6294 sfx_items ? sfx_items : items, 6295 sfx_actions ? sfx_actions : actions, 6296 flow_split_info, error); 6297 exit: 6298 if (sfx_actions) 6299 mlx5_free(sfx_actions); 6300 return ret; 6301 } 6302 6303 /** 6304 * Split the flow to subflow set. The splitters might be linked 6305 * in the chain, like this: 6306 * flow_create_split_outer() calls: 6307 * flow_create_split_meter() calls: 6308 * flow_create_split_metadata(meter_subflow_0) calls: 6309 * flow_create_split_inner(metadata_subflow_0) 6310 * flow_create_split_inner(metadata_subflow_1) 6311 * flow_create_split_inner(metadata_subflow_2) 6312 * flow_create_split_metadata(meter_subflow_1) calls: 6313 * flow_create_split_inner(metadata_subflow_0) 6314 * flow_create_split_inner(metadata_subflow_1) 6315 * flow_create_split_inner(metadata_subflow_2) 6316 * 6317 * This provide flexible way to add new levels of flow splitting. 6318 * The all of successfully created subflows are included to the 6319 * parent flow dev_flow list. 6320 * 6321 * @param dev 6322 * Pointer to Ethernet device. 6323 * @param[in] flow 6324 * Parent flow structure pointer. 6325 * @param[in] attr 6326 * Flow rule attributes. 6327 * @param[in] items 6328 * Pattern specification (list terminated by the END pattern item). 6329 * @param[in] actions 6330 * Associated actions (list terminated by the END action). 6331 * @param[in] flow_split_info 6332 * Pointer to flow split info structure. 6333 * @param[out] error 6334 * Perform verbose error reporting if not NULL. 6335 * @return 6336 * 0 on success, negative value otherwise 6337 */ 6338 static int 6339 flow_create_split_outer(struct rte_eth_dev *dev, 6340 struct rte_flow *flow, 6341 const struct rte_flow_attr *attr, 6342 const struct rte_flow_item items[], 6343 const struct rte_flow_action actions[], 6344 struct mlx5_flow_split_info *flow_split_info, 6345 struct rte_flow_error *error) 6346 { 6347 int ret; 6348 6349 ret = flow_create_split_sample(dev, flow, attr, items, 6350 actions, flow_split_info, error); 6351 MLX5_ASSERT(ret <= 0); 6352 return ret; 6353 } 6354 6355 static inline struct mlx5_flow_tunnel * 6356 flow_tunnel_from_rule(const struct mlx5_flow *flow) 6357 { 6358 struct mlx5_flow_tunnel *tunnel; 6359 6360 #pragma GCC diagnostic push 6361 #pragma GCC diagnostic ignored "-Wcast-qual" 6362 tunnel = (typeof(tunnel))flow->tunnel; 6363 #pragma GCC diagnostic pop 6364 6365 return tunnel; 6366 } 6367 6368 /** 6369 * Adjust flow RSS workspace if needed. 6370 * 6371 * @param wks 6372 * Pointer to thread flow work space. 6373 * @param rss_desc 6374 * Pointer to RSS descriptor. 6375 * @param[in] nrssq_num 6376 * New RSS queue number. 6377 * 6378 * @return 6379 * 0 on success, -1 otherwise and rte_errno is set. 6380 */ 6381 static int 6382 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks, 6383 struct mlx5_flow_rss_desc *rss_desc, 6384 uint32_t nrssq_num) 6385 { 6386 if (likely(nrssq_num <= wks->rssq_num)) 6387 return 0; 6388 rss_desc->queue = realloc(rss_desc->queue, 6389 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2)); 6390 if (!rss_desc->queue) { 6391 rte_errno = ENOMEM; 6392 return -1; 6393 } 6394 wks->rssq_num = RTE_ALIGN(nrssq_num, 2); 6395 return 0; 6396 } 6397 6398 /** 6399 * Create a flow and add it to @p list. 6400 * 6401 * @param dev 6402 * Pointer to Ethernet device. 6403 * @param list 6404 * Pointer to a TAILQ flow list. If this parameter NULL, 6405 * no list insertion occurred, flow is just created, 6406 * this is caller's responsibility to track the 6407 * created flow. 6408 * @param[in] attr 6409 * Flow rule attributes. 6410 * @param[in] items 6411 * Pattern specification (list terminated by the END pattern item). 6412 * @param[in] actions 6413 * Associated actions (list terminated by the END action). 6414 * @param[in] external 6415 * This flow rule is created by request external to PMD. 6416 * @param[out] error 6417 * Perform verbose error reporting if not NULL. 6418 * 6419 * @return 6420 * A flow index on success, 0 otherwise and rte_errno is set. 6421 */ 6422 static uint32_t 6423 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6424 const struct rte_flow_attr *attr, 6425 const struct rte_flow_item items[], 6426 const struct rte_flow_action original_actions[], 6427 bool external, struct rte_flow_error *error) 6428 { 6429 struct mlx5_priv *priv = dev->data->dev_private; 6430 struct rte_flow *flow = NULL; 6431 struct mlx5_flow *dev_flow; 6432 const struct rte_flow_action_rss *rss = NULL; 6433 struct mlx5_translated_action_handle 6434 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6435 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6436 union { 6437 struct mlx5_flow_expand_rss buf; 6438 uint8_t buffer[4096]; 6439 } expand_buffer; 6440 union { 6441 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6442 uint8_t buffer[2048]; 6443 } actions_rx; 6444 union { 6445 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6446 uint8_t buffer[2048]; 6447 } actions_hairpin_tx; 6448 union { 6449 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 6450 uint8_t buffer[2048]; 6451 } items_tx; 6452 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 6453 struct mlx5_flow_rss_desc *rss_desc; 6454 const struct rte_flow_action *p_actions_rx; 6455 uint32_t i; 6456 uint32_t idx = 0; 6457 int hairpin_flow; 6458 struct rte_flow_attr attr_tx = { .priority = 0 }; 6459 const struct rte_flow_action *actions; 6460 struct rte_flow_action *translated_actions = NULL; 6461 struct mlx5_flow_tunnel *tunnel; 6462 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 6463 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace(); 6464 struct mlx5_flow_split_info flow_split_info = { 6465 .external = !!external, 6466 .skip_scale = 0, 6467 .flow_idx = 0, 6468 .prefix_mark = 0, 6469 .prefix_layers = 0, 6470 .table_id = 0 6471 }; 6472 int ret; 6473 6474 MLX5_ASSERT(wks); 6475 rss_desc = &wks->rss_desc; 6476 ret = flow_action_handles_translate(dev, original_actions, 6477 indir_actions, 6478 &indir_actions_n, 6479 &translated_actions, error); 6480 if (ret < 0) { 6481 MLX5_ASSERT(translated_actions == NULL); 6482 return 0; 6483 } 6484 actions = translated_actions ? translated_actions : original_actions; 6485 p_actions_rx = actions; 6486 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6487 ret = flow_drv_validate(dev, attr, items, p_actions_rx, 6488 external, hairpin_flow, error); 6489 if (ret < 0) 6490 goto error_before_hairpin_split; 6491 flow = mlx5_ipool_zmalloc(priv->flows[type], &idx); 6492 if (!flow) { 6493 rte_errno = ENOMEM; 6494 goto error_before_hairpin_split; 6495 } 6496 if (hairpin_flow > 0) { 6497 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 6498 rte_errno = EINVAL; 6499 goto error_before_hairpin_split; 6500 } 6501 flow_hairpin_split(dev, actions, actions_rx.actions, 6502 actions_hairpin_tx.actions, items_tx.items, 6503 idx); 6504 p_actions_rx = actions_rx.actions; 6505 } 6506 flow_split_info.flow_idx = idx; 6507 flow->drv_type = flow_get_drv_type(dev, attr); 6508 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 6509 flow->drv_type < MLX5_FLOW_TYPE_MAX); 6510 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue)); 6511 /* RSS Action only works on NIC RX domain */ 6512 if (attr->ingress && !attr->transfer) 6513 rss = flow_get_rss_action(dev, p_actions_rx); 6514 if (rss) { 6515 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num)) 6516 return 0; 6517 /* 6518 * The following information is required by 6519 * mlx5_flow_hashfields_adjust() in advance. 6520 */ 6521 rss_desc->level = rss->level; 6522 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */ 6523 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types; 6524 } 6525 flow->dev_handles = 0; 6526 if (rss && rss->types) { 6527 unsigned int graph_root; 6528 6529 graph_root = find_graph_root(rss->level); 6530 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 6531 items, rss->types, 6532 mlx5_support_expansion, graph_root); 6533 MLX5_ASSERT(ret > 0 && 6534 (unsigned int)ret < sizeof(expand_buffer.buffer)); 6535 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) { 6536 for (i = 0; i < buf->entries; ++i) 6537 mlx5_dbg__print_pattern(buf->entry[i].pattern); 6538 } 6539 } else { 6540 buf->entries = 1; 6541 buf->entry[0].pattern = (void *)(uintptr_t)items; 6542 } 6543 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions, 6544 indir_actions_n); 6545 for (i = 0; i < buf->entries; ++i) { 6546 /* Initialize flow split data. */ 6547 flow_split_info.prefix_layers = 0; 6548 flow_split_info.prefix_mark = 0; 6549 flow_split_info.skip_scale = 0; 6550 /* 6551 * The splitter may create multiple dev_flows, 6552 * depending on configuration. In the simplest 6553 * case it just creates unmodified original flow. 6554 */ 6555 ret = flow_create_split_outer(dev, flow, attr, 6556 buf->entry[i].pattern, 6557 p_actions_rx, &flow_split_info, 6558 error); 6559 if (ret < 0) 6560 goto error; 6561 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) { 6562 ret = flow_tunnel_add_default_miss(dev, flow, attr, 6563 p_actions_rx, 6564 idx, 6565 wks->flows[0].tunnel, 6566 &default_miss_ctx, 6567 error); 6568 if (ret < 0) { 6569 mlx5_free(default_miss_ctx.queue); 6570 goto error; 6571 } 6572 } 6573 } 6574 /* Create the tx flow. */ 6575 if (hairpin_flow) { 6576 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 6577 attr_tx.ingress = 0; 6578 attr_tx.egress = 1; 6579 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 6580 actions_hairpin_tx.actions, 6581 idx, error); 6582 if (!dev_flow) 6583 goto error; 6584 dev_flow->flow = flow; 6585 dev_flow->external = 0; 6586 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 6587 dev_flow->handle, next); 6588 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 6589 items_tx.items, 6590 actions_hairpin_tx.actions, error); 6591 if (ret < 0) 6592 goto error; 6593 } 6594 /* 6595 * Update the metadata register copy table. If extensive 6596 * metadata feature is enabled and registers are supported 6597 * we might create the extra rte_flow for each unique 6598 * MARK/FLAG action ID. 6599 * 6600 * The table is updated for ingress Flows only, because 6601 * the egress Flows belong to the different device and 6602 * copy table should be updated in peer NIC Rx domain. 6603 */ 6604 if (attr->ingress && 6605 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 6606 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 6607 if (ret) 6608 goto error; 6609 } 6610 /* 6611 * If the flow is external (from application) OR device is started, 6612 * OR mreg discover, then apply immediately. 6613 */ 6614 if (external || dev->data->dev_started || 6615 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP && 6616 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) { 6617 ret = flow_drv_apply(dev, flow, error); 6618 if (ret < 0) 6619 goto error; 6620 } 6621 flow->type = type; 6622 flow_rxq_flags_set(dev, flow); 6623 rte_free(translated_actions); 6624 tunnel = flow_tunnel_from_rule(wks->flows); 6625 if (tunnel) { 6626 flow->tunnel = 1; 6627 flow->tunnel_id = tunnel->tunnel_id; 6628 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 6629 mlx5_free(default_miss_ctx.queue); 6630 } 6631 mlx5_flow_pop_thread_workspace(); 6632 return idx; 6633 error: 6634 MLX5_ASSERT(flow); 6635 ret = rte_errno; /* Save rte_errno before cleanup. */ 6636 flow_mreg_del_copy_action(dev, flow); 6637 flow_drv_destroy(dev, flow); 6638 if (rss_desc->shared_rss) 6639 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *) 6640 mlx5_ipool_get 6641 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 6642 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED); 6643 mlx5_ipool_free(priv->flows[type], idx); 6644 rte_errno = ret; /* Restore rte_errno. */ 6645 ret = rte_errno; 6646 rte_errno = ret; 6647 mlx5_flow_pop_thread_workspace(); 6648 error_before_hairpin_split: 6649 rte_free(translated_actions); 6650 return 0; 6651 } 6652 6653 /** 6654 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 6655 * incoming packets to table 1. 6656 * 6657 * Other flow rules, requested for group n, will be created in 6658 * e-switch table n+1. 6659 * Jump action to e-switch group n will be created to group n+1. 6660 * 6661 * Used when working in switchdev mode, to utilise advantages of table 1 6662 * and above. 6663 * 6664 * @param dev 6665 * Pointer to Ethernet device. 6666 * 6667 * @return 6668 * Pointer to flow on success, NULL otherwise and rte_errno is set. 6669 */ 6670 struct rte_flow * 6671 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 6672 { 6673 const struct rte_flow_attr attr = { 6674 .group = 0, 6675 .priority = 0, 6676 .ingress = 1, 6677 .egress = 0, 6678 .transfer = 1, 6679 }; 6680 const struct rte_flow_item pattern = { 6681 .type = RTE_FLOW_ITEM_TYPE_END, 6682 }; 6683 struct rte_flow_action_jump jump = { 6684 .group = 1, 6685 }; 6686 const struct rte_flow_action actions[] = { 6687 { 6688 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6689 .conf = &jump, 6690 }, 6691 { 6692 .type = RTE_FLOW_ACTION_TYPE_END, 6693 }, 6694 }; 6695 struct rte_flow_error error; 6696 6697 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 6698 &attr, &pattern, 6699 actions, false, &error); 6700 } 6701 6702 /** 6703 * Create a dedicated flow rule on e-switch table 1, matches ESW manager 6704 * and sq number, directs all packets to peer vport. 6705 * 6706 * @param dev 6707 * Pointer to Ethernet device. 6708 * @param txq 6709 * Txq index. 6710 * 6711 * @return 6712 * Flow ID on success, 0 otherwise and rte_errno is set. 6713 */ 6714 uint32_t 6715 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq) 6716 { 6717 struct rte_flow_attr attr = { 6718 .group = 0, 6719 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 6720 .ingress = 1, 6721 .egress = 0, 6722 .transfer = 1, 6723 }; 6724 struct rte_flow_item_port_id port_spec = { 6725 .id = MLX5_PORT_ESW_MGR, 6726 }; 6727 struct mlx5_rte_flow_item_tx_queue txq_spec = { 6728 .queue = txq, 6729 }; 6730 struct rte_flow_item pattern[] = { 6731 { 6732 .type = RTE_FLOW_ITEM_TYPE_PORT_ID, 6733 .spec = &port_spec, 6734 }, 6735 { 6736 .type = (enum rte_flow_item_type) 6737 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6738 .spec = &txq_spec, 6739 }, 6740 { 6741 .type = RTE_FLOW_ITEM_TYPE_END, 6742 }, 6743 }; 6744 struct rte_flow_action_jump jump = { 6745 .group = 1, 6746 }; 6747 struct rte_flow_action_port_id port = { 6748 .id = dev->data->port_id, 6749 }; 6750 struct rte_flow_action actions[] = { 6751 { 6752 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6753 .conf = &jump, 6754 }, 6755 { 6756 .type = RTE_FLOW_ACTION_TYPE_END, 6757 }, 6758 }; 6759 struct rte_flow_error error; 6760 6761 /* 6762 * Creates group 0, highest priority jump flow. 6763 * Matches txq to bypass kernel packets. 6764 */ 6765 if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions, 6766 false, &error) == 0) 6767 return 0; 6768 /* Create group 1, lowest priority redirect flow for txq. */ 6769 attr.group = 1; 6770 actions[0].conf = &port; 6771 actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID; 6772 return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, 6773 actions, false, &error); 6774 } 6775 6776 /** 6777 * Validate a flow supported by the NIC. 6778 * 6779 * @see rte_flow_validate() 6780 * @see rte_flow_ops 6781 */ 6782 int 6783 mlx5_flow_validate(struct rte_eth_dev *dev, 6784 const struct rte_flow_attr *attr, 6785 const struct rte_flow_item items[], 6786 const struct rte_flow_action original_actions[], 6787 struct rte_flow_error *error) 6788 { 6789 int hairpin_flow; 6790 struct mlx5_translated_action_handle 6791 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6792 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6793 const struct rte_flow_action *actions; 6794 struct rte_flow_action *translated_actions = NULL; 6795 int ret = flow_action_handles_translate(dev, original_actions, 6796 indir_actions, 6797 &indir_actions_n, 6798 &translated_actions, error); 6799 6800 if (ret) 6801 return ret; 6802 actions = translated_actions ? translated_actions : original_actions; 6803 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6804 ret = flow_drv_validate(dev, attr, items, actions, 6805 true, hairpin_flow, error); 6806 rte_free(translated_actions); 6807 return ret; 6808 } 6809 6810 /** 6811 * Create a flow. 6812 * 6813 * @see rte_flow_create() 6814 * @see rte_flow_ops 6815 */ 6816 struct rte_flow * 6817 mlx5_flow_create(struct rte_eth_dev *dev, 6818 const struct rte_flow_attr *attr, 6819 const struct rte_flow_item items[], 6820 const struct rte_flow_action actions[], 6821 struct rte_flow_error *error) 6822 { 6823 /* 6824 * If the device is not started yet, it is not allowed to created a 6825 * flow from application. PMD default flows and traffic control flows 6826 * are not affected. 6827 */ 6828 if (unlikely(!dev->data->dev_started)) { 6829 DRV_LOG(DEBUG, "port %u is not started when " 6830 "inserting a flow", dev->data->port_id); 6831 rte_flow_error_set(error, ENODEV, 6832 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6833 NULL, 6834 "port not started"); 6835 return NULL; 6836 } 6837 6838 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN, 6839 attr, items, actions, 6840 true, error); 6841 } 6842 6843 /** 6844 * Destroy a flow in a list. 6845 * 6846 * @param dev 6847 * Pointer to Ethernet device. 6848 * @param[in] flow_idx 6849 * Index of flow to destroy. 6850 */ 6851 static void 6852 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6853 uint32_t flow_idx) 6854 { 6855 struct mlx5_priv *priv = dev->data->dev_private; 6856 struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx); 6857 6858 if (!flow) 6859 return; 6860 MLX5_ASSERT(flow->type == type); 6861 /* 6862 * Update RX queue flags only if port is started, otherwise it is 6863 * already clean. 6864 */ 6865 if (dev->data->dev_started) 6866 flow_rxq_flags_trim(dev, flow); 6867 flow_drv_destroy(dev, flow); 6868 if (flow->tunnel) { 6869 struct mlx5_flow_tunnel *tunnel; 6870 6871 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 6872 RTE_VERIFY(tunnel); 6873 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 6874 mlx5_flow_tunnel_free(dev, tunnel); 6875 } 6876 flow_mreg_del_copy_action(dev, flow); 6877 mlx5_ipool_free(priv->flows[type], flow_idx); 6878 } 6879 6880 /** 6881 * Destroy all flows. 6882 * 6883 * @param dev 6884 * Pointer to Ethernet device. 6885 * @param type 6886 * Flow type to be flushed. 6887 * @param active 6888 * If flushing is called avtively. 6889 */ 6890 void 6891 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6892 bool active) 6893 { 6894 struct mlx5_priv *priv = dev->data->dev_private; 6895 uint32_t num_flushed = 0, fidx = 1; 6896 struct rte_flow *flow; 6897 6898 MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) { 6899 flow_list_destroy(dev, type, fidx); 6900 num_flushed++; 6901 } 6902 if (active) { 6903 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 6904 dev->data->port_id, num_flushed); 6905 } 6906 } 6907 6908 /** 6909 * Stop all default actions for flows. 6910 * 6911 * @param dev 6912 * Pointer to Ethernet device. 6913 */ 6914 void 6915 mlx5_flow_stop_default(struct rte_eth_dev *dev) 6916 { 6917 flow_mreg_del_default_copy_action(dev); 6918 flow_rxq_flags_clear(dev); 6919 } 6920 6921 /** 6922 * Start all default actions for flows. 6923 * 6924 * @param dev 6925 * Pointer to Ethernet device. 6926 * @return 6927 * 0 on success, a negative errno value otherwise and rte_errno is set. 6928 */ 6929 int 6930 mlx5_flow_start_default(struct rte_eth_dev *dev) 6931 { 6932 struct rte_flow_error error; 6933 6934 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6935 return flow_mreg_add_default_copy_action(dev, &error); 6936 } 6937 6938 /** 6939 * Release key of thread specific flow workspace data. 6940 */ 6941 void 6942 flow_release_workspace(void *data) 6943 { 6944 struct mlx5_flow_workspace *wks = data; 6945 struct mlx5_flow_workspace *next; 6946 6947 while (wks) { 6948 next = wks->next; 6949 free(wks->rss_desc.queue); 6950 free(wks); 6951 wks = next; 6952 } 6953 } 6954 6955 /** 6956 * Get thread specific current flow workspace. 6957 * 6958 * @return pointer to thread specific flow workspace data, NULL on error. 6959 */ 6960 struct mlx5_flow_workspace* 6961 mlx5_flow_get_thread_workspace(void) 6962 { 6963 struct mlx5_flow_workspace *data; 6964 6965 data = mlx5_flow_os_get_specific_workspace(); 6966 MLX5_ASSERT(data && data->inuse); 6967 if (!data || !data->inuse) 6968 DRV_LOG(ERR, "flow workspace not initialized."); 6969 return data; 6970 } 6971 6972 /** 6973 * Allocate and init new flow workspace. 6974 * 6975 * @return pointer to flow workspace data, NULL on error. 6976 */ 6977 static struct mlx5_flow_workspace* 6978 flow_alloc_thread_workspace(void) 6979 { 6980 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data)); 6981 6982 if (!data) { 6983 DRV_LOG(ERR, "Failed to allocate flow workspace " 6984 "memory."); 6985 return NULL; 6986 } 6987 data->rss_desc.queue = calloc(1, 6988 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6989 if (!data->rss_desc.queue) 6990 goto err; 6991 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM; 6992 return data; 6993 err: 6994 if (data->rss_desc.queue) 6995 free(data->rss_desc.queue); 6996 free(data); 6997 return NULL; 6998 } 6999 7000 /** 7001 * Get new thread specific flow workspace. 7002 * 7003 * If current workspace inuse, create new one and set as current. 7004 * 7005 * @return pointer to thread specific flow workspace data, NULL on error. 7006 */ 7007 static struct mlx5_flow_workspace* 7008 mlx5_flow_push_thread_workspace(void) 7009 { 7010 struct mlx5_flow_workspace *curr; 7011 struct mlx5_flow_workspace *data; 7012 7013 curr = mlx5_flow_os_get_specific_workspace(); 7014 if (!curr) { 7015 data = flow_alloc_thread_workspace(); 7016 if (!data) 7017 return NULL; 7018 } else if (!curr->inuse) { 7019 data = curr; 7020 } else if (curr->next) { 7021 data = curr->next; 7022 } else { 7023 data = flow_alloc_thread_workspace(); 7024 if (!data) 7025 return NULL; 7026 curr->next = data; 7027 data->prev = curr; 7028 } 7029 data->inuse = 1; 7030 data->flow_idx = 0; 7031 /* Set as current workspace */ 7032 if (mlx5_flow_os_set_specific_workspace(data)) 7033 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 7034 return data; 7035 } 7036 7037 /** 7038 * Close current thread specific flow workspace. 7039 * 7040 * If previous workspace available, set it as current. 7041 * 7042 * @return pointer to thread specific flow workspace data, NULL on error. 7043 */ 7044 static void 7045 mlx5_flow_pop_thread_workspace(void) 7046 { 7047 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace(); 7048 7049 if (!data) 7050 return; 7051 if (!data->inuse) { 7052 DRV_LOG(ERR, "Failed to close unused flow workspace."); 7053 return; 7054 } 7055 data->inuse = 0; 7056 if (!data->prev) 7057 return; 7058 if (mlx5_flow_os_set_specific_workspace(data->prev)) 7059 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 7060 } 7061 7062 /** 7063 * Verify the flow list is empty 7064 * 7065 * @param dev 7066 * Pointer to Ethernet device. 7067 * 7068 * @return the number of flows not released. 7069 */ 7070 int 7071 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused) 7072 { 7073 struct mlx5_priv *priv = dev->data->dev_private; 7074 struct rte_flow *flow; 7075 uint32_t idx = 0; 7076 int ret = 0, i; 7077 7078 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 7079 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) { 7080 DRV_LOG(DEBUG, "port %u flow %p still referenced", 7081 dev->data->port_id, (void *)flow); 7082 ret++; 7083 } 7084 } 7085 return ret; 7086 } 7087 7088 /** 7089 * Enable default hairpin egress flow. 7090 * 7091 * @param dev 7092 * Pointer to Ethernet device. 7093 * @param queue 7094 * The queue index. 7095 * 7096 * @return 7097 * 0 on success, a negative errno value otherwise and rte_errno is set. 7098 */ 7099 int 7100 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 7101 uint32_t queue) 7102 { 7103 const struct rte_flow_attr attr = { 7104 .egress = 1, 7105 .priority = 0, 7106 }; 7107 struct mlx5_rte_flow_item_tx_queue queue_spec = { 7108 .queue = queue, 7109 }; 7110 struct mlx5_rte_flow_item_tx_queue queue_mask = { 7111 .queue = UINT32_MAX, 7112 }; 7113 struct rte_flow_item items[] = { 7114 { 7115 .type = (enum rte_flow_item_type) 7116 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 7117 .spec = &queue_spec, 7118 .last = NULL, 7119 .mask = &queue_mask, 7120 }, 7121 { 7122 .type = RTE_FLOW_ITEM_TYPE_END, 7123 }, 7124 }; 7125 struct rte_flow_action_jump jump = { 7126 .group = MLX5_HAIRPIN_TX_TABLE, 7127 }; 7128 struct rte_flow_action actions[2]; 7129 uint32_t flow_idx; 7130 struct rte_flow_error error; 7131 7132 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 7133 actions[0].conf = &jump; 7134 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 7135 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 7136 &attr, items, actions, false, &error); 7137 if (!flow_idx) { 7138 DRV_LOG(DEBUG, 7139 "Failed to create ctrl flow: rte_errno(%d)," 7140 " type(%d), message(%s)", 7141 rte_errno, error.type, 7142 error.message ? error.message : " (no stated reason)"); 7143 return -rte_errno; 7144 } 7145 return 0; 7146 } 7147 7148 /** 7149 * Enable a control flow configured from the control plane. 7150 * 7151 * @param dev 7152 * Pointer to Ethernet device. 7153 * @param eth_spec 7154 * An Ethernet flow spec to apply. 7155 * @param eth_mask 7156 * An Ethernet flow mask to apply. 7157 * @param vlan_spec 7158 * A VLAN flow spec to apply. 7159 * @param vlan_mask 7160 * A VLAN flow mask to apply. 7161 * 7162 * @return 7163 * 0 on success, a negative errno value otherwise and rte_errno is set. 7164 */ 7165 int 7166 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 7167 struct rte_flow_item_eth *eth_spec, 7168 struct rte_flow_item_eth *eth_mask, 7169 struct rte_flow_item_vlan *vlan_spec, 7170 struct rte_flow_item_vlan *vlan_mask) 7171 { 7172 struct mlx5_priv *priv = dev->data->dev_private; 7173 const struct rte_flow_attr attr = { 7174 .ingress = 1, 7175 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 7176 }; 7177 struct rte_flow_item items[] = { 7178 { 7179 .type = RTE_FLOW_ITEM_TYPE_ETH, 7180 .spec = eth_spec, 7181 .last = NULL, 7182 .mask = eth_mask, 7183 }, 7184 { 7185 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 7186 RTE_FLOW_ITEM_TYPE_END, 7187 .spec = vlan_spec, 7188 .last = NULL, 7189 .mask = vlan_mask, 7190 }, 7191 { 7192 .type = RTE_FLOW_ITEM_TYPE_END, 7193 }, 7194 }; 7195 uint16_t queue[priv->reta_idx_n]; 7196 struct rte_flow_action_rss action_rss = { 7197 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 7198 .level = 0, 7199 .types = priv->rss_conf.rss_hf, 7200 .key_len = priv->rss_conf.rss_key_len, 7201 .queue_num = priv->reta_idx_n, 7202 .key = priv->rss_conf.rss_key, 7203 .queue = queue, 7204 }; 7205 struct rte_flow_action actions[] = { 7206 { 7207 .type = RTE_FLOW_ACTION_TYPE_RSS, 7208 .conf = &action_rss, 7209 }, 7210 { 7211 .type = RTE_FLOW_ACTION_TYPE_END, 7212 }, 7213 }; 7214 uint32_t flow_idx; 7215 struct rte_flow_error error; 7216 unsigned int i; 7217 7218 if (!priv->reta_idx_n || !priv->rxqs_n) { 7219 return 0; 7220 } 7221 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) 7222 action_rss.types = 0; 7223 for (i = 0; i != priv->reta_idx_n; ++i) 7224 queue[i] = (*priv->reta_idx)[i]; 7225 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 7226 &attr, items, actions, false, &error); 7227 if (!flow_idx) 7228 return -rte_errno; 7229 return 0; 7230 } 7231 7232 /** 7233 * Enable a flow control configured from the control plane. 7234 * 7235 * @param dev 7236 * Pointer to Ethernet device. 7237 * @param eth_spec 7238 * An Ethernet flow spec to apply. 7239 * @param eth_mask 7240 * An Ethernet flow mask to apply. 7241 * 7242 * @return 7243 * 0 on success, a negative errno value otherwise and rte_errno is set. 7244 */ 7245 int 7246 mlx5_ctrl_flow(struct rte_eth_dev *dev, 7247 struct rte_flow_item_eth *eth_spec, 7248 struct rte_flow_item_eth *eth_mask) 7249 { 7250 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 7251 } 7252 7253 /** 7254 * Create default miss flow rule matching lacp traffic 7255 * 7256 * @param dev 7257 * Pointer to Ethernet device. 7258 * @param eth_spec 7259 * An Ethernet flow spec to apply. 7260 * 7261 * @return 7262 * 0 on success, a negative errno value otherwise and rte_errno is set. 7263 */ 7264 int 7265 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 7266 { 7267 /* 7268 * The LACP matching is done by only using ether type since using 7269 * a multicast dst mac causes kernel to give low priority to this flow. 7270 */ 7271 static const struct rte_flow_item_eth lacp_spec = { 7272 .type = RTE_BE16(0x8809), 7273 }; 7274 static const struct rte_flow_item_eth lacp_mask = { 7275 .type = 0xffff, 7276 }; 7277 const struct rte_flow_attr attr = { 7278 .ingress = 1, 7279 }; 7280 struct rte_flow_item items[] = { 7281 { 7282 .type = RTE_FLOW_ITEM_TYPE_ETH, 7283 .spec = &lacp_spec, 7284 .mask = &lacp_mask, 7285 }, 7286 { 7287 .type = RTE_FLOW_ITEM_TYPE_END, 7288 }, 7289 }; 7290 struct rte_flow_action actions[] = { 7291 { 7292 .type = (enum rte_flow_action_type) 7293 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 7294 }, 7295 { 7296 .type = RTE_FLOW_ACTION_TYPE_END, 7297 }, 7298 }; 7299 struct rte_flow_error error; 7300 uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 7301 &attr, items, actions, 7302 false, &error); 7303 7304 if (!flow_idx) 7305 return -rte_errno; 7306 return 0; 7307 } 7308 7309 /** 7310 * Destroy a flow. 7311 * 7312 * @see rte_flow_destroy() 7313 * @see rte_flow_ops 7314 */ 7315 int 7316 mlx5_flow_destroy(struct rte_eth_dev *dev, 7317 struct rte_flow *flow, 7318 struct rte_flow_error *error __rte_unused) 7319 { 7320 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, 7321 (uintptr_t)(void *)flow); 7322 return 0; 7323 } 7324 7325 /** 7326 * Destroy all flows. 7327 * 7328 * @see rte_flow_flush() 7329 * @see rte_flow_ops 7330 */ 7331 int 7332 mlx5_flow_flush(struct rte_eth_dev *dev, 7333 struct rte_flow_error *error __rte_unused) 7334 { 7335 mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false); 7336 return 0; 7337 } 7338 7339 /** 7340 * Isolated mode. 7341 * 7342 * @see rte_flow_isolate() 7343 * @see rte_flow_ops 7344 */ 7345 int 7346 mlx5_flow_isolate(struct rte_eth_dev *dev, 7347 int enable, 7348 struct rte_flow_error *error) 7349 { 7350 struct mlx5_priv *priv = dev->data->dev_private; 7351 7352 if (dev->data->dev_started) { 7353 rte_flow_error_set(error, EBUSY, 7354 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7355 NULL, 7356 "port must be stopped first"); 7357 return -rte_errno; 7358 } 7359 priv->isolated = !!enable; 7360 if (enable) 7361 dev->dev_ops = &mlx5_dev_ops_isolate; 7362 else 7363 dev->dev_ops = &mlx5_dev_ops; 7364 7365 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 7366 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 7367 7368 return 0; 7369 } 7370 7371 /** 7372 * Query a flow. 7373 * 7374 * @see rte_flow_query() 7375 * @see rte_flow_ops 7376 */ 7377 static int 7378 flow_drv_query(struct rte_eth_dev *dev, 7379 uint32_t flow_idx, 7380 const struct rte_flow_action *actions, 7381 void *data, 7382 struct rte_flow_error *error) 7383 { 7384 struct mlx5_priv *priv = dev->data->dev_private; 7385 const struct mlx5_flow_driver_ops *fops; 7386 struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 7387 flow_idx); 7388 enum mlx5_flow_drv_type ftype; 7389 7390 if (!flow) { 7391 return rte_flow_error_set(error, ENOENT, 7392 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7393 NULL, 7394 "invalid flow handle"); 7395 } 7396 ftype = flow->drv_type; 7397 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 7398 fops = flow_get_drv_ops(ftype); 7399 7400 return fops->query(dev, flow, actions, data, error); 7401 } 7402 7403 /** 7404 * Query a flow. 7405 * 7406 * @see rte_flow_query() 7407 * @see rte_flow_ops 7408 */ 7409 int 7410 mlx5_flow_query(struct rte_eth_dev *dev, 7411 struct rte_flow *flow, 7412 const struct rte_flow_action *actions, 7413 void *data, 7414 struct rte_flow_error *error) 7415 { 7416 int ret; 7417 7418 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 7419 error); 7420 if (ret < 0) 7421 return ret; 7422 return 0; 7423 } 7424 7425 /** 7426 * Get rte_flow callbacks. 7427 * 7428 * @param dev 7429 * Pointer to Ethernet device structure. 7430 * @param ops 7431 * Pointer to operation-specific structure. 7432 * 7433 * @return 0 7434 */ 7435 int 7436 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 7437 const struct rte_flow_ops **ops) 7438 { 7439 *ops = &mlx5_flow_ops; 7440 return 0; 7441 } 7442 7443 /** 7444 * Validate meter policy actions. 7445 * Dispatcher for action type specific validation. 7446 * 7447 * @param[in] dev 7448 * Pointer to the Ethernet device structure. 7449 * @param[in] action 7450 * The meter policy action object to validate. 7451 * @param[in] attr 7452 * Attributes of flow to determine steering domain. 7453 * @param[out] is_rss 7454 * Is RSS or not. 7455 * @param[out] domain_bitmap 7456 * Domain bitmap. 7457 * @param[out] is_def_policy 7458 * Is default policy or not. 7459 * @param[out] error 7460 * Perform verbose error reporting if not NULL. Initialized in case of 7461 * error only. 7462 * 7463 * @return 7464 * 0 on success, otherwise negative errno value. 7465 */ 7466 int 7467 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev, 7468 const struct rte_flow_action *actions[RTE_COLORS], 7469 struct rte_flow_attr *attr, 7470 bool *is_rss, 7471 uint8_t *domain_bitmap, 7472 uint8_t *policy_mode, 7473 struct rte_mtr_error *error) 7474 { 7475 const struct mlx5_flow_driver_ops *fops; 7476 7477 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7478 return fops->validate_mtr_acts(dev, actions, attr, is_rss, 7479 domain_bitmap, policy_mode, error); 7480 } 7481 7482 /** 7483 * Destroy the meter table set. 7484 * 7485 * @param[in] dev 7486 * Pointer to Ethernet device. 7487 * @param[in] mtr_policy 7488 * Meter policy struct. 7489 */ 7490 void 7491 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev, 7492 struct mlx5_flow_meter_policy *mtr_policy) 7493 { 7494 const struct mlx5_flow_driver_ops *fops; 7495 7496 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7497 fops->destroy_mtr_acts(dev, mtr_policy); 7498 } 7499 7500 /** 7501 * Create policy action, lock free, 7502 * (mutex should be acquired by caller). 7503 * Dispatcher for action type specific call. 7504 * 7505 * @param[in] dev 7506 * Pointer to the Ethernet device structure. 7507 * @param[in] mtr_policy 7508 * Meter policy struct. 7509 * @param[in] action 7510 * Action specification used to create meter actions. 7511 * @param[out] error 7512 * Perform verbose error reporting if not NULL. Initialized in case of 7513 * error only. 7514 * 7515 * @return 7516 * 0 on success, otherwise negative errno value. 7517 */ 7518 int 7519 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, 7520 struct mlx5_flow_meter_policy *mtr_policy, 7521 const struct rte_flow_action *actions[RTE_COLORS], 7522 struct rte_mtr_error *error) 7523 { 7524 const struct mlx5_flow_driver_ops *fops; 7525 7526 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7527 return fops->create_mtr_acts(dev, mtr_policy, actions, error); 7528 } 7529 7530 /** 7531 * Create policy rules, lock free, 7532 * (mutex should be acquired by caller). 7533 * Dispatcher for action type specific call. 7534 * 7535 * @param[in] dev 7536 * Pointer to the Ethernet device structure. 7537 * @param[in] mtr_policy 7538 * Meter policy struct. 7539 * 7540 * @return 7541 * 0 on success, -1 otherwise. 7542 */ 7543 int 7544 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev, 7545 struct mlx5_flow_meter_policy *mtr_policy) 7546 { 7547 const struct mlx5_flow_driver_ops *fops; 7548 7549 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7550 return fops->create_policy_rules(dev, mtr_policy); 7551 } 7552 7553 /** 7554 * Destroy policy rules, lock free, 7555 * (mutex should be acquired by caller). 7556 * Dispatcher for action type specific call. 7557 * 7558 * @param[in] dev 7559 * Pointer to the Ethernet device structure. 7560 * @param[in] mtr_policy 7561 * Meter policy struct. 7562 */ 7563 void 7564 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev, 7565 struct mlx5_flow_meter_policy *mtr_policy) 7566 { 7567 const struct mlx5_flow_driver_ops *fops; 7568 7569 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7570 fops->destroy_policy_rules(dev, mtr_policy); 7571 } 7572 7573 /** 7574 * Destroy the default policy table set. 7575 * 7576 * @param[in] dev 7577 * Pointer to Ethernet device. 7578 */ 7579 void 7580 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev) 7581 { 7582 const struct mlx5_flow_driver_ops *fops; 7583 7584 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7585 fops->destroy_def_policy(dev); 7586 } 7587 7588 /** 7589 * Destroy the default policy table set. 7590 * 7591 * @param[in] dev 7592 * Pointer to Ethernet device. 7593 * 7594 * @return 7595 * 0 on success, -1 otherwise. 7596 */ 7597 int 7598 mlx5_flow_create_def_policy(struct rte_eth_dev *dev) 7599 { 7600 const struct mlx5_flow_driver_ops *fops; 7601 7602 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7603 return fops->create_def_policy(dev); 7604 } 7605 7606 /** 7607 * Create the needed meter and suffix tables. 7608 * 7609 * @param[in] dev 7610 * Pointer to Ethernet device. 7611 * 7612 * @return 7613 * 0 on success, -1 otherwise. 7614 */ 7615 int 7616 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 7617 struct mlx5_flow_meter_info *fm, 7618 uint32_t mtr_idx, 7619 uint8_t domain_bitmap) 7620 { 7621 const struct mlx5_flow_driver_ops *fops; 7622 7623 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7624 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap); 7625 } 7626 7627 /** 7628 * Destroy the meter table set. 7629 * 7630 * @param[in] dev 7631 * Pointer to Ethernet device. 7632 * @param[in] tbl 7633 * Pointer to the meter table set. 7634 */ 7635 void 7636 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 7637 struct mlx5_flow_meter_info *fm) 7638 { 7639 const struct mlx5_flow_driver_ops *fops; 7640 7641 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7642 fops->destroy_mtr_tbls(dev, fm); 7643 } 7644 7645 /** 7646 * Destroy the global meter drop table. 7647 * 7648 * @param[in] dev 7649 * Pointer to Ethernet device. 7650 */ 7651 void 7652 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev) 7653 { 7654 const struct mlx5_flow_driver_ops *fops; 7655 7656 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7657 fops->destroy_mtr_drop_tbls(dev); 7658 } 7659 7660 /** 7661 * Destroy the sub policy table with RX queue. 7662 * 7663 * @param[in] dev 7664 * Pointer to Ethernet device. 7665 * @param[in] mtr_policy 7666 * Pointer to meter policy table. 7667 */ 7668 void 7669 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev, 7670 struct mlx5_flow_meter_policy *mtr_policy) 7671 { 7672 const struct mlx5_flow_driver_ops *fops; 7673 7674 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7675 fops->destroy_sub_policy_with_rxq(dev, mtr_policy); 7676 } 7677 7678 /** 7679 * Allocate the needed aso flow meter id. 7680 * 7681 * @param[in] dev 7682 * Pointer to Ethernet device. 7683 * 7684 * @return 7685 * Index to aso flow meter on success, NULL otherwise. 7686 */ 7687 uint32_t 7688 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev) 7689 { 7690 const struct mlx5_flow_driver_ops *fops; 7691 7692 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7693 return fops->create_meter(dev); 7694 } 7695 7696 /** 7697 * Free the aso flow meter id. 7698 * 7699 * @param[in] dev 7700 * Pointer to Ethernet device. 7701 * @param[in] mtr_idx 7702 * Index to aso flow meter to be free. 7703 * 7704 * @return 7705 * 0 on success. 7706 */ 7707 void 7708 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx) 7709 { 7710 const struct mlx5_flow_driver_ops *fops; 7711 7712 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7713 fops->free_meter(dev, mtr_idx); 7714 } 7715 7716 /** 7717 * Allocate a counter. 7718 * 7719 * @param[in] dev 7720 * Pointer to Ethernet device structure. 7721 * 7722 * @return 7723 * Index to allocated counter on success, 0 otherwise. 7724 */ 7725 uint32_t 7726 mlx5_counter_alloc(struct rte_eth_dev *dev) 7727 { 7728 const struct mlx5_flow_driver_ops *fops; 7729 struct rte_flow_attr attr = { .transfer = 0 }; 7730 7731 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7732 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7733 return fops->counter_alloc(dev); 7734 } 7735 DRV_LOG(ERR, 7736 "port %u counter allocate is not supported.", 7737 dev->data->port_id); 7738 return 0; 7739 } 7740 7741 /** 7742 * Free a counter. 7743 * 7744 * @param[in] dev 7745 * Pointer to Ethernet device structure. 7746 * @param[in] cnt 7747 * Index to counter to be free. 7748 */ 7749 void 7750 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 7751 { 7752 const struct mlx5_flow_driver_ops *fops; 7753 struct rte_flow_attr attr = { .transfer = 0 }; 7754 7755 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7756 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7757 fops->counter_free(dev, cnt); 7758 return; 7759 } 7760 DRV_LOG(ERR, 7761 "port %u counter free is not supported.", 7762 dev->data->port_id); 7763 } 7764 7765 /** 7766 * Query counter statistics. 7767 * 7768 * @param[in] dev 7769 * Pointer to Ethernet device structure. 7770 * @param[in] cnt 7771 * Index to counter to query. 7772 * @param[in] clear 7773 * Set to clear counter statistics. 7774 * @param[out] pkts 7775 * The counter hits packets number to save. 7776 * @param[out] bytes 7777 * The counter hits bytes number to save. 7778 * 7779 * @return 7780 * 0 on success, a negative errno value otherwise. 7781 */ 7782 int 7783 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 7784 bool clear, uint64_t *pkts, uint64_t *bytes) 7785 { 7786 const struct mlx5_flow_driver_ops *fops; 7787 struct rte_flow_attr attr = { .transfer = 0 }; 7788 7789 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7790 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7791 return fops->counter_query(dev, cnt, clear, pkts, bytes); 7792 } 7793 DRV_LOG(ERR, 7794 "port %u counter query is not supported.", 7795 dev->data->port_id); 7796 return -ENOTSUP; 7797 } 7798 7799 /** 7800 * Allocate a new memory for the counter values wrapped by all the needed 7801 * management. 7802 * 7803 * @param[in] sh 7804 * Pointer to mlx5_dev_ctx_shared object. 7805 * 7806 * @return 7807 * 0 on success, a negative errno value otherwise. 7808 */ 7809 static int 7810 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 7811 { 7812 struct mlx5_counter_stats_mem_mng *mem_mng; 7813 volatile struct flow_counter_stats *raw_data; 7814 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 7815 int size = (sizeof(struct flow_counter_stats) * 7816 MLX5_COUNTERS_PER_POOL + 7817 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 7818 sizeof(struct mlx5_counter_stats_mem_mng); 7819 size_t pgsize = rte_mem_page_size(); 7820 uint8_t *mem; 7821 int ret; 7822 int i; 7823 7824 if (pgsize == (size_t)-1) { 7825 DRV_LOG(ERR, "Failed to get mem page size"); 7826 rte_errno = ENOMEM; 7827 return -ENOMEM; 7828 } 7829 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 7830 if (!mem) { 7831 rte_errno = ENOMEM; 7832 return -ENOMEM; 7833 } 7834 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 7835 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 7836 ret = mlx5_os_wrapped_mkey_create(sh->cdev->ctx, sh->cdev->pd, 7837 sh->cdev->pdn, mem, size, 7838 &mem_mng->wm); 7839 if (ret) { 7840 rte_errno = errno; 7841 mlx5_free(mem); 7842 return -rte_errno; 7843 } 7844 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 7845 raw_data = (volatile struct flow_counter_stats *)mem; 7846 for (i = 0; i < raws_n; ++i) { 7847 mem_mng->raws[i].mem_mng = mem_mng; 7848 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 7849 } 7850 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 7851 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 7852 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 7853 next); 7854 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 7855 sh->cmng.mem_mng = mem_mng; 7856 return 0; 7857 } 7858 7859 /** 7860 * Set the statistic memory to the new counter pool. 7861 * 7862 * @param[in] sh 7863 * Pointer to mlx5_dev_ctx_shared object. 7864 * @param[in] pool 7865 * Pointer to the pool to set the statistic memory. 7866 * 7867 * @return 7868 * 0 on success, a negative errno value otherwise. 7869 */ 7870 static int 7871 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 7872 struct mlx5_flow_counter_pool *pool) 7873 { 7874 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7875 /* Resize statistic memory once used out. */ 7876 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 7877 mlx5_flow_create_counter_stat_mem_mng(sh)) { 7878 DRV_LOG(ERR, "Cannot resize counter stat mem."); 7879 return -1; 7880 } 7881 rte_spinlock_lock(&pool->sl); 7882 pool->raw = cmng->mem_mng->raws + pool->index % 7883 MLX5_CNT_CONTAINER_RESIZE; 7884 rte_spinlock_unlock(&pool->sl); 7885 pool->raw_hw = NULL; 7886 return 0; 7887 } 7888 7889 #define MLX5_POOL_QUERY_FREQ_US 1000000 7890 7891 /** 7892 * Set the periodic procedure for triggering asynchronous batch queries for all 7893 * the counter pools. 7894 * 7895 * @param[in] sh 7896 * Pointer to mlx5_dev_ctx_shared object. 7897 */ 7898 void 7899 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 7900 { 7901 uint32_t pools_n, us; 7902 7903 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 7904 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 7905 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 7906 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 7907 sh->cmng.query_thread_on = 0; 7908 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 7909 } else { 7910 sh->cmng.query_thread_on = 1; 7911 } 7912 } 7913 7914 /** 7915 * The periodic procedure for triggering asynchronous batch queries for all the 7916 * counter pools. This function is probably called by the host thread. 7917 * 7918 * @param[in] arg 7919 * The parameter for the alarm process. 7920 */ 7921 void 7922 mlx5_flow_query_alarm(void *arg) 7923 { 7924 struct mlx5_dev_ctx_shared *sh = arg; 7925 int ret; 7926 uint16_t pool_index = sh->cmng.pool_index; 7927 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7928 struct mlx5_flow_counter_pool *pool; 7929 uint16_t n_valid; 7930 7931 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 7932 goto set_alarm; 7933 rte_spinlock_lock(&cmng->pool_update_sl); 7934 pool = cmng->pools[pool_index]; 7935 n_valid = cmng->n_valid; 7936 rte_spinlock_unlock(&cmng->pool_update_sl); 7937 /* Set the statistic memory to the new created pool. */ 7938 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 7939 goto set_alarm; 7940 if (pool->raw_hw) 7941 /* There is a pool query in progress. */ 7942 goto set_alarm; 7943 pool->raw_hw = 7944 LIST_FIRST(&sh->cmng.free_stat_raws); 7945 if (!pool->raw_hw) 7946 /* No free counter statistics raw memory. */ 7947 goto set_alarm; 7948 /* 7949 * Identify the counters released between query trigger and query 7950 * handle more efficiently. The counter released in this gap period 7951 * should wait for a new round of query as the new arrived packets 7952 * will not be taken into account. 7953 */ 7954 pool->query_gen++; 7955 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 7956 MLX5_COUNTERS_PER_POOL, 7957 NULL, NULL, 7958 pool->raw_hw->mem_mng->wm.lkey, 7959 (void *)(uintptr_t) 7960 pool->raw_hw->data, 7961 sh->devx_comp, 7962 (uint64_t)(uintptr_t)pool); 7963 if (ret) { 7964 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 7965 " %d", pool->min_dcs->id); 7966 pool->raw_hw = NULL; 7967 goto set_alarm; 7968 } 7969 LIST_REMOVE(pool->raw_hw, next); 7970 sh->cmng.pending_queries++; 7971 pool_index++; 7972 if (pool_index >= n_valid) 7973 pool_index = 0; 7974 set_alarm: 7975 sh->cmng.pool_index = pool_index; 7976 mlx5_set_query_alarm(sh); 7977 } 7978 7979 /** 7980 * Check and callback event for new aged flow in the counter pool 7981 * 7982 * @param[in] sh 7983 * Pointer to mlx5_dev_ctx_shared object. 7984 * @param[in] pool 7985 * Pointer to Current counter pool. 7986 */ 7987 static void 7988 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 7989 struct mlx5_flow_counter_pool *pool) 7990 { 7991 struct mlx5_priv *priv; 7992 struct mlx5_flow_counter *cnt; 7993 struct mlx5_age_info *age_info; 7994 struct mlx5_age_param *age_param; 7995 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 7996 struct mlx5_counter_stats_raw *prev = pool->raw; 7997 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 7998 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 7999 uint16_t expected = AGE_CANDIDATE; 8000 uint32_t i; 8001 8002 pool->time_of_last_age_check = curr_time; 8003 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 8004 cnt = MLX5_POOL_GET_CNT(pool, i); 8005 age_param = MLX5_CNT_TO_AGE(cnt); 8006 if (__atomic_load_n(&age_param->state, 8007 __ATOMIC_RELAXED) != AGE_CANDIDATE) 8008 continue; 8009 if (cur->data[i].hits != prev->data[i].hits) { 8010 __atomic_store_n(&age_param->sec_since_last_hit, 0, 8011 __ATOMIC_RELAXED); 8012 continue; 8013 } 8014 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 8015 time_delta, 8016 __ATOMIC_RELAXED) <= age_param->timeout) 8017 continue; 8018 /** 8019 * Hold the lock first, or if between the 8020 * state AGE_TMOUT and tailq operation the 8021 * release happened, the release procedure 8022 * may delete a non-existent tailq node. 8023 */ 8024 priv = rte_eth_devices[age_param->port_id].data->dev_private; 8025 age_info = GET_PORT_AGE_INFO(priv); 8026 rte_spinlock_lock(&age_info->aged_sl); 8027 if (__atomic_compare_exchange_n(&age_param->state, &expected, 8028 AGE_TMOUT, false, 8029 __ATOMIC_RELAXED, 8030 __ATOMIC_RELAXED)) { 8031 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 8032 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 8033 } 8034 rte_spinlock_unlock(&age_info->aged_sl); 8035 } 8036 mlx5_age_event_prepare(sh); 8037 } 8038 8039 /** 8040 * Handler for the HW respond about ready values from an asynchronous batch 8041 * query. This function is probably called by the host thread. 8042 * 8043 * @param[in] sh 8044 * The pointer to the shared device context. 8045 * @param[in] async_id 8046 * The Devx async ID. 8047 * @param[in] status 8048 * The status of the completion. 8049 */ 8050 void 8051 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 8052 uint64_t async_id, int status) 8053 { 8054 struct mlx5_flow_counter_pool *pool = 8055 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 8056 struct mlx5_counter_stats_raw *raw_to_free; 8057 uint8_t query_gen = pool->query_gen ^ 1; 8058 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 8059 enum mlx5_counter_type cnt_type = 8060 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 8061 MLX5_COUNTER_TYPE_ORIGIN; 8062 8063 if (unlikely(status)) { 8064 raw_to_free = pool->raw_hw; 8065 } else { 8066 raw_to_free = pool->raw; 8067 if (pool->is_aged) 8068 mlx5_flow_aging_check(sh, pool); 8069 rte_spinlock_lock(&pool->sl); 8070 pool->raw = pool->raw_hw; 8071 rte_spinlock_unlock(&pool->sl); 8072 /* Be sure the new raw counters data is updated in memory. */ 8073 rte_io_wmb(); 8074 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 8075 rte_spinlock_lock(&cmng->csl[cnt_type]); 8076 TAILQ_CONCAT(&cmng->counters[cnt_type], 8077 &pool->counters[query_gen], next); 8078 rte_spinlock_unlock(&cmng->csl[cnt_type]); 8079 } 8080 } 8081 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 8082 pool->raw_hw = NULL; 8083 sh->cmng.pending_queries--; 8084 } 8085 8086 static int 8087 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 8088 const struct flow_grp_info *grp_info, 8089 struct rte_flow_error *error) 8090 { 8091 if (grp_info->transfer && grp_info->external && 8092 grp_info->fdb_def_rule) { 8093 if (group == UINT32_MAX) 8094 return rte_flow_error_set 8095 (error, EINVAL, 8096 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 8097 NULL, 8098 "group index not supported"); 8099 *table = group + 1; 8100 } else { 8101 *table = group; 8102 } 8103 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 8104 return 0; 8105 } 8106 8107 /** 8108 * Translate the rte_flow group index to HW table value. 8109 * 8110 * If tunnel offload is disabled, all group ids converted to flow table 8111 * id using the standard method. 8112 * If tunnel offload is enabled, group id can be converted using the 8113 * standard or tunnel conversion method. Group conversion method 8114 * selection depends on flags in `grp_info` parameter: 8115 * - Internal (grp_info.external == 0) groups conversion uses the 8116 * standard method. 8117 * - Group ids in JUMP action converted with the tunnel conversion. 8118 * - Group id in rule attribute conversion depends on a rule type and 8119 * group id value: 8120 * ** non zero group attributes converted with the tunnel method 8121 * ** zero group attribute in non-tunnel rule is converted using the 8122 * standard method - there's only one root table 8123 * ** zero group attribute in steer tunnel rule is converted with the 8124 * standard method - single root table 8125 * ** zero group attribute in match tunnel rule is a special OvS 8126 * case: that value is used for portability reasons. That group 8127 * id is converted with the tunnel conversion method. 8128 * 8129 * @param[in] dev 8130 * Port device 8131 * @param[in] tunnel 8132 * PMD tunnel offload object 8133 * @param[in] group 8134 * rte_flow group index value. 8135 * @param[out] table 8136 * HW table value. 8137 * @param[in] grp_info 8138 * flags used for conversion 8139 * @param[out] error 8140 * Pointer to error structure. 8141 * 8142 * @return 8143 * 0 on success, a negative errno value otherwise and rte_errno is set. 8144 */ 8145 int 8146 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 8147 const struct mlx5_flow_tunnel *tunnel, 8148 uint32_t group, uint32_t *table, 8149 const struct flow_grp_info *grp_info, 8150 struct rte_flow_error *error) 8151 { 8152 int ret; 8153 bool standard_translation; 8154 8155 if (!grp_info->skip_scale && grp_info->external && 8156 group < MLX5_MAX_TABLES_EXTERNAL) 8157 group *= MLX5_FLOW_TABLE_FACTOR; 8158 if (is_tunnel_offload_active(dev)) { 8159 standard_translation = !grp_info->external || 8160 grp_info->std_tbl_fix; 8161 } else { 8162 standard_translation = true; 8163 } 8164 DRV_LOG(DEBUG, 8165 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s", 8166 dev->data->port_id, group, grp_info->transfer, 8167 grp_info->external, grp_info->fdb_def_rule, 8168 standard_translation ? "STANDARD" : "TUNNEL"); 8169 if (standard_translation) 8170 ret = flow_group_to_table(dev->data->port_id, group, table, 8171 grp_info, error); 8172 else 8173 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 8174 table, error); 8175 8176 return ret; 8177 } 8178 8179 /** 8180 * Discover availability of metadata reg_c's. 8181 * 8182 * Iteratively use test flows to check availability. 8183 * 8184 * @param[in] dev 8185 * Pointer to the Ethernet device structure. 8186 * 8187 * @return 8188 * 0 on success, a negative errno value otherwise and rte_errno is set. 8189 */ 8190 int 8191 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 8192 { 8193 struct mlx5_priv *priv = dev->data->dev_private; 8194 enum modify_reg idx; 8195 int n = 0; 8196 8197 /* reg_c[0] and reg_c[1] are reserved. */ 8198 priv->sh->flow_mreg_c[n++] = REG_C_0; 8199 priv->sh->flow_mreg_c[n++] = REG_C_1; 8200 /* Discover availability of other reg_c's. */ 8201 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 8202 struct rte_flow_attr attr = { 8203 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 8204 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 8205 .ingress = 1, 8206 }; 8207 struct rte_flow_item items[] = { 8208 [0] = { 8209 .type = RTE_FLOW_ITEM_TYPE_END, 8210 }, 8211 }; 8212 struct rte_flow_action actions[] = { 8213 [0] = { 8214 .type = (enum rte_flow_action_type) 8215 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 8216 .conf = &(struct mlx5_flow_action_copy_mreg){ 8217 .src = REG_C_1, 8218 .dst = idx, 8219 }, 8220 }, 8221 [1] = { 8222 .type = RTE_FLOW_ACTION_TYPE_JUMP, 8223 .conf = &(struct rte_flow_action_jump){ 8224 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 8225 }, 8226 }, 8227 [2] = { 8228 .type = RTE_FLOW_ACTION_TYPE_END, 8229 }, 8230 }; 8231 uint32_t flow_idx; 8232 struct rte_flow *flow; 8233 struct rte_flow_error error; 8234 8235 if (!priv->config.dv_flow_en) 8236 break; 8237 /* Create internal flow, validation skips copy action. */ 8238 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr, 8239 items, actions, false, &error); 8240 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 8241 flow_idx); 8242 if (!flow) 8243 continue; 8244 priv->sh->flow_mreg_c[n++] = idx; 8245 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx); 8246 } 8247 for (; n < MLX5_MREG_C_NUM; ++n) 8248 priv->sh->flow_mreg_c[n] = REG_NON; 8249 priv->sh->metadata_regc_check_flag = 1; 8250 return 0; 8251 } 8252 8253 int 8254 save_dump_file(const uint8_t *data, uint32_t size, 8255 uint32_t type, uint64_t id, void *arg, FILE *file) 8256 { 8257 char line[BUF_SIZE]; 8258 uint32_t out = 0; 8259 uint32_t k; 8260 uint32_t actions_num; 8261 struct rte_flow_query_count *count; 8262 8263 memset(line, 0, BUF_SIZE); 8264 switch (type) { 8265 case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR: 8266 actions_num = *(uint32_t *)(arg); 8267 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,", 8268 type, id, actions_num); 8269 break; 8270 case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT: 8271 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",", 8272 type, id); 8273 break; 8274 case DR_DUMP_REC_TYPE_PMD_COUNTER: 8275 count = (struct rte_flow_query_count *)arg; 8276 fprintf(file, 8277 "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n", 8278 type, id, count->hits, count->bytes); 8279 return 0; 8280 default: 8281 return -1; 8282 } 8283 8284 for (k = 0; k < size; k++) { 8285 /* Make sure we do not overrun the line buffer length. */ 8286 if (out >= BUF_SIZE - 4) { 8287 line[out] = '\0'; 8288 break; 8289 } 8290 out += snprintf(line + out, BUF_SIZE - out, "%02x", 8291 (data[k]) & 0xff); 8292 } 8293 fprintf(file, "%s\n", line); 8294 return 0; 8295 } 8296 8297 int 8298 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow, 8299 struct rte_flow_query_count *count, struct rte_flow_error *error) 8300 { 8301 struct rte_flow_action action[2]; 8302 enum mlx5_flow_drv_type ftype; 8303 const struct mlx5_flow_driver_ops *fops; 8304 8305 if (!flow) { 8306 return rte_flow_error_set(error, ENOENT, 8307 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8308 NULL, 8309 "invalid flow handle"); 8310 } 8311 action[0].type = RTE_FLOW_ACTION_TYPE_COUNT; 8312 action[1].type = RTE_FLOW_ACTION_TYPE_END; 8313 if (flow->counter) { 8314 memset(count, 0, sizeof(struct rte_flow_query_count)); 8315 ftype = (enum mlx5_flow_drv_type)(flow->drv_type); 8316 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && 8317 ftype < MLX5_FLOW_TYPE_MAX); 8318 fops = flow_get_drv_ops(ftype); 8319 return fops->query(dev, flow, action, count, error); 8320 } 8321 return -1; 8322 } 8323 8324 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8325 /** 8326 * Dump flow ipool data to file 8327 * 8328 * @param[in] dev 8329 * The pointer to Ethernet device. 8330 * @param[in] file 8331 * A pointer to a file for output. 8332 * @param[out] error 8333 * Perform verbose error reporting if not NULL. PMDs initialize this 8334 * structure in case of error only. 8335 * @return 8336 * 0 on success, a negative value otherwise. 8337 */ 8338 int 8339 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev, 8340 struct rte_flow *flow, FILE *file, 8341 struct rte_flow_error *error) 8342 { 8343 struct mlx5_priv *priv = dev->data->dev_private; 8344 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; 8345 struct mlx5_flow_dv_encap_decap_resource *encap_decap; 8346 uint32_t handle_idx; 8347 struct mlx5_flow_handle *dh; 8348 struct rte_flow_query_count count; 8349 uint32_t actions_num; 8350 const uint8_t *data; 8351 size_t size; 8352 uint64_t id; 8353 uint32_t type; 8354 void *action = NULL; 8355 8356 if (!flow) { 8357 return rte_flow_error_set(error, ENOENT, 8358 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8359 NULL, 8360 "invalid flow handle"); 8361 } 8362 handle_idx = flow->dev_handles; 8363 while (handle_idx) { 8364 dh = mlx5_ipool_get(priv->sh->ipool 8365 [MLX5_IPOOL_MLX5_FLOW], handle_idx); 8366 if (!dh) 8367 continue; 8368 handle_idx = dh->next.next; 8369 8370 /* query counter */ 8371 type = DR_DUMP_REC_TYPE_PMD_COUNTER; 8372 flow_dv_query_count_ptr(dev, flow->counter, 8373 &action, error); 8374 if (action) { 8375 id = (uint64_t)(uintptr_t)action; 8376 if (!mlx5_flow_query_counter(dev, flow, &count, error)) 8377 save_dump_file(NULL, 0, type, 8378 id, (void *)&count, file); 8379 } 8380 /* Get modify_hdr and encap_decap buf from ipools. */ 8381 encap_decap = NULL; 8382 modify_hdr = dh->dvh.modify_hdr; 8383 8384 if (dh->dvh.rix_encap_decap) { 8385 encap_decap = mlx5_ipool_get(priv->sh->ipool 8386 [MLX5_IPOOL_DECAP_ENCAP], 8387 dh->dvh.rix_encap_decap); 8388 } 8389 if (modify_hdr) { 8390 data = (const uint8_t *)modify_hdr->actions; 8391 size = (size_t)(modify_hdr->actions_num) * 8; 8392 id = (uint64_t)(uintptr_t)modify_hdr->action; 8393 actions_num = modify_hdr->actions_num; 8394 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR; 8395 save_dump_file(data, size, type, id, 8396 (void *)(&actions_num), file); 8397 } 8398 if (encap_decap) { 8399 data = encap_decap->buf; 8400 size = encap_decap->size; 8401 id = (uint64_t)(uintptr_t)encap_decap->action; 8402 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT; 8403 save_dump_file(data, size, type, 8404 id, NULL, file); 8405 } 8406 } 8407 return 0; 8408 } 8409 8410 /** 8411 * Dump all flow's encap_decap/modify_hdr/counter data to file 8412 * 8413 * @param[in] dev 8414 * The pointer to Ethernet device. 8415 * @param[in] file 8416 * A pointer to a file for output. 8417 * @param[out] error 8418 * Perform verbose error reporting if not NULL. PMDs initialize this 8419 * structure in case of error only. 8420 * @return 8421 * 0 on success, a negative value otherwise. 8422 */ 8423 static int 8424 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev, 8425 FILE *file, struct rte_flow_error *error) 8426 { 8427 struct mlx5_priv *priv = dev->data->dev_private; 8428 struct mlx5_dev_ctx_shared *sh = priv->sh; 8429 struct mlx5_hlist *h; 8430 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; 8431 struct mlx5_flow_dv_encap_decap_resource *encap_decap; 8432 struct rte_flow_query_count count; 8433 uint32_t actions_num; 8434 const uint8_t *data; 8435 size_t size; 8436 uint64_t id; 8437 uint32_t type; 8438 uint32_t i; 8439 uint32_t j; 8440 struct mlx5_list_inconst *l_inconst; 8441 struct mlx5_list_entry *e; 8442 int lcore_index; 8443 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng; 8444 uint32_t max; 8445 void *action; 8446 8447 /* encap_decap hlist is lcore_share, get global core cache. */ 8448 i = MLX5_LIST_GLOBAL; 8449 h = sh->encaps_decaps; 8450 if (h) { 8451 for (j = 0; j <= h->mask; j++) { 8452 l_inconst = &h->buckets[j].l; 8453 if (!l_inconst || !l_inconst->cache[i]) 8454 continue; 8455 8456 e = LIST_FIRST(&l_inconst->cache[i]->h); 8457 while (e) { 8458 encap_decap = 8459 (struct mlx5_flow_dv_encap_decap_resource *)e; 8460 data = encap_decap->buf; 8461 size = encap_decap->size; 8462 id = (uint64_t)(uintptr_t)encap_decap->action; 8463 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT; 8464 save_dump_file(data, size, type, 8465 id, NULL, file); 8466 e = LIST_NEXT(e, next); 8467 } 8468 } 8469 } 8470 8471 /* get modify_hdr */ 8472 h = sh->modify_cmds; 8473 if (h) { 8474 lcore_index = rte_lcore_index(rte_lcore_id()); 8475 if (unlikely(lcore_index == -1)) { 8476 lcore_index = MLX5_LIST_NLCORE; 8477 rte_spinlock_lock(&h->l_const.lcore_lock); 8478 } 8479 i = lcore_index; 8480 8481 for (j = 0; j <= h->mask; j++) { 8482 l_inconst = &h->buckets[j].l; 8483 if (!l_inconst || !l_inconst->cache[i]) 8484 continue; 8485 8486 e = LIST_FIRST(&l_inconst->cache[i]->h); 8487 while (e) { 8488 modify_hdr = 8489 (struct mlx5_flow_dv_modify_hdr_resource *)e; 8490 data = (const uint8_t *)modify_hdr->actions; 8491 size = (size_t)(modify_hdr->actions_num) * 8; 8492 actions_num = modify_hdr->actions_num; 8493 id = (uint64_t)(uintptr_t)modify_hdr->action; 8494 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR; 8495 save_dump_file(data, size, type, id, 8496 (void *)(&actions_num), file); 8497 e = LIST_NEXT(e, next); 8498 } 8499 } 8500 8501 if (unlikely(lcore_index == MLX5_LIST_NLCORE)) 8502 rte_spinlock_unlock(&h->l_const.lcore_lock); 8503 } 8504 8505 /* get counter */ 8506 MLX5_ASSERT(cmng->n_valid <= cmng->n); 8507 max = MLX5_COUNTERS_PER_POOL * cmng->n_valid; 8508 for (j = 1; j <= max; j++) { 8509 action = NULL; 8510 flow_dv_query_count_ptr(dev, j, &action, error); 8511 if (action) { 8512 if (!flow_dv_query_count(dev, j, &count, error)) { 8513 type = DR_DUMP_REC_TYPE_PMD_COUNTER; 8514 id = (uint64_t)(uintptr_t)action; 8515 save_dump_file(NULL, 0, type, 8516 id, (void *)&count, file); 8517 } 8518 } 8519 } 8520 return 0; 8521 } 8522 #endif 8523 8524 /** 8525 * Dump flow raw hw data to file 8526 * 8527 * @param[in] dev 8528 * The pointer to Ethernet device. 8529 * @param[in] file 8530 * A pointer to a file for output. 8531 * @param[out] error 8532 * Perform verbose error reporting if not NULL. PMDs initialize this 8533 * structure in case of error only. 8534 * @return 8535 * 0 on success, a nagative value otherwise. 8536 */ 8537 int 8538 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx, 8539 FILE *file, 8540 struct rte_flow_error *error __rte_unused) 8541 { 8542 struct mlx5_priv *priv = dev->data->dev_private; 8543 struct mlx5_dev_ctx_shared *sh = priv->sh; 8544 uint32_t handle_idx; 8545 int ret; 8546 struct mlx5_flow_handle *dh; 8547 struct rte_flow *flow; 8548 8549 if (!priv->config.dv_flow_en) { 8550 if (fputs("device dv flow disabled\n", file) <= 0) 8551 return -errno; 8552 return -ENOTSUP; 8553 } 8554 8555 /* dump all */ 8556 if (!flow_idx) { 8557 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8558 if (mlx5_flow_dev_dump_sh_all(dev, file, error)) 8559 return -EINVAL; 8560 #endif 8561 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, 8562 sh->rx_domain, 8563 sh->tx_domain, file); 8564 } 8565 /* dump one */ 8566 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 8567 (uintptr_t)(void *)flow_idx); 8568 if (!flow) 8569 return -EINVAL; 8570 8571 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8572 mlx5_flow_dev_dump_ipool(dev, flow, file, error); 8573 #endif 8574 handle_idx = flow->dev_handles; 8575 while (handle_idx) { 8576 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], 8577 handle_idx); 8578 if (!dh) 8579 return -ENOENT; 8580 if (dh->drv_flow) { 8581 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow, 8582 file); 8583 if (ret) 8584 return -ENOENT; 8585 } 8586 handle_idx = dh->next.next; 8587 } 8588 return 0; 8589 } 8590 8591 /** 8592 * Get aged-out flows. 8593 * 8594 * @param[in] dev 8595 * Pointer to the Ethernet device structure. 8596 * @param[in] context 8597 * The address of an array of pointers to the aged-out flows contexts. 8598 * @param[in] nb_countexts 8599 * The length of context array pointers. 8600 * @param[out] error 8601 * Perform verbose error reporting if not NULL. Initialized in case of 8602 * error only. 8603 * 8604 * @return 8605 * how many contexts get in success, otherwise negative errno value. 8606 * if nb_contexts is 0, return the amount of all aged contexts. 8607 * if nb_contexts is not 0 , return the amount of aged flows reported 8608 * in the context array. 8609 */ 8610 int 8611 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 8612 uint32_t nb_contexts, struct rte_flow_error *error) 8613 { 8614 const struct mlx5_flow_driver_ops *fops; 8615 struct rte_flow_attr attr = { .transfer = 0 }; 8616 8617 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 8618 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 8619 return fops->get_aged_flows(dev, contexts, nb_contexts, 8620 error); 8621 } 8622 DRV_LOG(ERR, 8623 "port %u get aged flows is not supported.", 8624 dev->data->port_id); 8625 return -ENOTSUP; 8626 } 8627 8628 /* Wrapper for driver action_validate op callback */ 8629 static int 8630 flow_drv_action_validate(struct rte_eth_dev *dev, 8631 const struct rte_flow_indir_action_conf *conf, 8632 const struct rte_flow_action *action, 8633 const struct mlx5_flow_driver_ops *fops, 8634 struct rte_flow_error *error) 8635 { 8636 static const char err_msg[] = "indirect action validation unsupported"; 8637 8638 if (!fops->action_validate) { 8639 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8640 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8641 NULL, err_msg); 8642 return -rte_errno; 8643 } 8644 return fops->action_validate(dev, conf, action, error); 8645 } 8646 8647 /** 8648 * Destroys the shared action by handle. 8649 * 8650 * @param dev 8651 * Pointer to Ethernet device structure. 8652 * @param[in] handle 8653 * Handle for the indirect action object to be destroyed. 8654 * @param[out] error 8655 * Perform verbose error reporting if not NULL. PMDs initialize this 8656 * structure in case of error only. 8657 * 8658 * @return 8659 * 0 on success, a negative errno value otherwise and rte_errno is set. 8660 * 8661 * @note: wrapper for driver action_create op callback. 8662 */ 8663 static int 8664 mlx5_action_handle_destroy(struct rte_eth_dev *dev, 8665 struct rte_flow_action_handle *handle, 8666 struct rte_flow_error *error) 8667 { 8668 static const char err_msg[] = "indirect action destruction unsupported"; 8669 struct rte_flow_attr attr = { .transfer = 0 }; 8670 const struct mlx5_flow_driver_ops *fops = 8671 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8672 8673 if (!fops->action_destroy) { 8674 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8675 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8676 NULL, err_msg); 8677 return -rte_errno; 8678 } 8679 return fops->action_destroy(dev, handle, error); 8680 } 8681 8682 /* Wrapper for driver action_destroy op callback */ 8683 static int 8684 flow_drv_action_update(struct rte_eth_dev *dev, 8685 struct rte_flow_action_handle *handle, 8686 const void *update, 8687 const struct mlx5_flow_driver_ops *fops, 8688 struct rte_flow_error *error) 8689 { 8690 static const char err_msg[] = "indirect action update unsupported"; 8691 8692 if (!fops->action_update) { 8693 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8694 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8695 NULL, err_msg); 8696 return -rte_errno; 8697 } 8698 return fops->action_update(dev, handle, update, error); 8699 } 8700 8701 /* Wrapper for driver action_destroy op callback */ 8702 static int 8703 flow_drv_action_query(struct rte_eth_dev *dev, 8704 const struct rte_flow_action_handle *handle, 8705 void *data, 8706 const struct mlx5_flow_driver_ops *fops, 8707 struct rte_flow_error *error) 8708 { 8709 static const char err_msg[] = "indirect action query unsupported"; 8710 8711 if (!fops->action_query) { 8712 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8713 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8714 NULL, err_msg); 8715 return -rte_errno; 8716 } 8717 return fops->action_query(dev, handle, data, error); 8718 } 8719 8720 /** 8721 * Create indirect action for reuse in multiple flow rules. 8722 * 8723 * @param dev 8724 * Pointer to Ethernet device structure. 8725 * @param conf 8726 * Pointer to indirect action object configuration. 8727 * @param[in] action 8728 * Action configuration for indirect action object creation. 8729 * @param[out] error 8730 * Perform verbose error reporting if not NULL. PMDs initialize this 8731 * structure in case of error only. 8732 * @return 8733 * A valid handle in case of success, NULL otherwise and rte_errno is set. 8734 */ 8735 static struct rte_flow_action_handle * 8736 mlx5_action_handle_create(struct rte_eth_dev *dev, 8737 const struct rte_flow_indir_action_conf *conf, 8738 const struct rte_flow_action *action, 8739 struct rte_flow_error *error) 8740 { 8741 static const char err_msg[] = "indirect action creation unsupported"; 8742 struct rte_flow_attr attr = { .transfer = 0 }; 8743 const struct mlx5_flow_driver_ops *fops = 8744 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8745 8746 if (flow_drv_action_validate(dev, conf, action, fops, error)) 8747 return NULL; 8748 if (!fops->action_create) { 8749 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8750 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8751 NULL, err_msg); 8752 return NULL; 8753 } 8754 return fops->action_create(dev, conf, action, error); 8755 } 8756 8757 /** 8758 * Updates inplace the indirect action configuration pointed by *handle* 8759 * with the configuration provided as *update* argument. 8760 * The update of the indirect action configuration effects all flow rules 8761 * reusing the action via handle. 8762 * 8763 * @param dev 8764 * Pointer to Ethernet device structure. 8765 * @param[in] handle 8766 * Handle for the indirect action to be updated. 8767 * @param[in] update 8768 * Action specification used to modify the action pointed by handle. 8769 * *update* could be of same type with the action pointed by the *handle* 8770 * handle argument, or some other structures like a wrapper, depending on 8771 * the indirect action type. 8772 * @param[out] error 8773 * Perform verbose error reporting if not NULL. PMDs initialize this 8774 * structure in case of error only. 8775 * 8776 * @return 8777 * 0 on success, a negative errno value otherwise and rte_errno is set. 8778 */ 8779 static int 8780 mlx5_action_handle_update(struct rte_eth_dev *dev, 8781 struct rte_flow_action_handle *handle, 8782 const void *update, 8783 struct rte_flow_error *error) 8784 { 8785 struct rte_flow_attr attr = { .transfer = 0 }; 8786 const struct mlx5_flow_driver_ops *fops = 8787 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8788 int ret; 8789 8790 ret = flow_drv_action_validate(dev, NULL, 8791 (const struct rte_flow_action *)update, fops, error); 8792 if (ret) 8793 return ret; 8794 return flow_drv_action_update(dev, handle, update, fops, 8795 error); 8796 } 8797 8798 /** 8799 * Query the indirect action by handle. 8800 * 8801 * This function allows retrieving action-specific data such as counters. 8802 * Data is gathered by special action which may be present/referenced in 8803 * more than one flow rule definition. 8804 * 8805 * see @RTE_FLOW_ACTION_TYPE_COUNT 8806 * 8807 * @param dev 8808 * Pointer to Ethernet device structure. 8809 * @param[in] handle 8810 * Handle for the indirect action to query. 8811 * @param[in, out] data 8812 * Pointer to storage for the associated query data type. 8813 * @param[out] error 8814 * Perform verbose error reporting if not NULL. PMDs initialize this 8815 * structure in case of error only. 8816 * 8817 * @return 8818 * 0 on success, a negative errno value otherwise and rte_errno is set. 8819 */ 8820 static int 8821 mlx5_action_handle_query(struct rte_eth_dev *dev, 8822 const struct rte_flow_action_handle *handle, 8823 void *data, 8824 struct rte_flow_error *error) 8825 { 8826 struct rte_flow_attr attr = { .transfer = 0 }; 8827 const struct mlx5_flow_driver_ops *fops = 8828 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8829 8830 return flow_drv_action_query(dev, handle, data, fops, error); 8831 } 8832 8833 /** 8834 * Destroy all indirect actions (shared RSS). 8835 * 8836 * @param dev 8837 * Pointer to Ethernet device. 8838 * 8839 * @return 8840 * 0 on success, a negative errno value otherwise and rte_errno is set. 8841 */ 8842 int 8843 mlx5_action_handle_flush(struct rte_eth_dev *dev) 8844 { 8845 struct rte_flow_error error; 8846 struct mlx5_priv *priv = dev->data->dev_private; 8847 struct mlx5_shared_action_rss *shared_rss; 8848 int ret = 0; 8849 uint32_t idx; 8850 8851 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 8852 priv->rss_shared_actions, idx, shared_rss, next) { 8853 ret |= mlx5_action_handle_destroy(dev, 8854 (struct rte_flow_action_handle *)(uintptr_t)idx, &error); 8855 } 8856 return ret; 8857 } 8858 8859 /** 8860 * Validate existing indirect actions against current device configuration 8861 * and attach them to device resources. 8862 * 8863 * @param dev 8864 * Pointer to Ethernet device. 8865 * 8866 * @return 8867 * 0 on success, a negative errno value otherwise and rte_errno is set. 8868 */ 8869 int 8870 mlx5_action_handle_attach(struct rte_eth_dev *dev) 8871 { 8872 struct mlx5_priv *priv = dev->data->dev_private; 8873 struct mlx5_indexed_pool *ipool = 8874 priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS]; 8875 struct mlx5_shared_action_rss *shared_rss, *shared_rss_last; 8876 int ret = 0; 8877 uint32_t idx; 8878 8879 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8880 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8881 const char *message; 8882 uint32_t queue_idx; 8883 8884 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues, 8885 ind_tbl->queues_n, 8886 &message, &queue_idx); 8887 if (ret != 0) { 8888 DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s", 8889 dev->data->port_id, ind_tbl->queues[queue_idx], 8890 message); 8891 break; 8892 } 8893 } 8894 if (ret != 0) 8895 return ret; 8896 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8897 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8898 8899 ret = mlx5_ind_table_obj_attach(dev, ind_tbl); 8900 if (ret != 0) { 8901 DRV_LOG(ERR, "Port %u could not attach " 8902 "indirection table obj %p", 8903 dev->data->port_id, (void *)ind_tbl); 8904 goto error; 8905 } 8906 } 8907 return 0; 8908 error: 8909 shared_rss_last = shared_rss; 8910 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8911 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8912 8913 if (shared_rss == shared_rss_last) 8914 break; 8915 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0) 8916 DRV_LOG(CRIT, "Port %u could not detach " 8917 "indirection table obj %p on rollback", 8918 dev->data->port_id, (void *)ind_tbl); 8919 } 8920 return ret; 8921 } 8922 8923 /** 8924 * Detach indirect actions of the device from its resources. 8925 * 8926 * @param dev 8927 * Pointer to Ethernet device. 8928 * 8929 * @return 8930 * 0 on success, a negative errno value otherwise and rte_errno is set. 8931 */ 8932 int 8933 mlx5_action_handle_detach(struct rte_eth_dev *dev) 8934 { 8935 struct mlx5_priv *priv = dev->data->dev_private; 8936 struct mlx5_indexed_pool *ipool = 8937 priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS]; 8938 struct mlx5_shared_action_rss *shared_rss, *shared_rss_last; 8939 int ret = 0; 8940 uint32_t idx; 8941 8942 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8943 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8944 8945 ret = mlx5_ind_table_obj_detach(dev, ind_tbl); 8946 if (ret != 0) { 8947 DRV_LOG(ERR, "Port %u could not detach " 8948 "indirection table obj %p", 8949 dev->data->port_id, (void *)ind_tbl); 8950 goto error; 8951 } 8952 } 8953 return 0; 8954 error: 8955 shared_rss_last = shared_rss; 8956 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) { 8957 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl; 8958 8959 if (shared_rss == shared_rss_last) 8960 break; 8961 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0) 8962 DRV_LOG(CRIT, "Port %u could not attach " 8963 "indirection table obj %p on rollback", 8964 dev->data->port_id, (void *)ind_tbl); 8965 } 8966 return ret; 8967 } 8968 8969 #ifndef HAVE_MLX5DV_DR 8970 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) 8971 #else 8972 #define MLX5_DOMAIN_SYNC_FLOW \ 8973 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) 8974 #endif 8975 8976 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) 8977 { 8978 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 8979 const struct mlx5_flow_driver_ops *fops; 8980 int ret; 8981 struct rte_flow_attr attr = { .transfer = 0 }; 8982 8983 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8984 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); 8985 if (ret > 0) 8986 ret = -ret; 8987 return ret; 8988 } 8989 8990 const struct mlx5_flow_tunnel * 8991 mlx5_get_tof(const struct rte_flow_item *item, 8992 const struct rte_flow_action *action, 8993 enum mlx5_tof_rule_type *rule_type) 8994 { 8995 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 8996 if (item->type == (typeof(item->type)) 8997 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) { 8998 *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE; 8999 return flow_items_to_tunnel(item); 9000 } 9001 } 9002 for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) { 9003 if (action->type == (typeof(action->type)) 9004 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) { 9005 *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE; 9006 return flow_actions_to_tunnel(action); 9007 } 9008 } 9009 return NULL; 9010 } 9011 9012 /** 9013 * tunnel offload functionalilty is defined for DV environment only 9014 */ 9015 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 9016 __extension__ 9017 union tunnel_offload_mark { 9018 uint32_t val; 9019 struct { 9020 uint32_t app_reserve:8; 9021 uint32_t table_id:15; 9022 uint32_t transfer:1; 9023 uint32_t _unused_:8; 9024 }; 9025 }; 9026 9027 static bool 9028 mlx5_access_tunnel_offload_db 9029 (struct rte_eth_dev *dev, 9030 bool (*match)(struct rte_eth_dev *, 9031 struct mlx5_flow_tunnel *, const void *), 9032 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 9033 void (*miss)(struct rte_eth_dev *, void *), 9034 void *ctx, bool lock_op); 9035 9036 static int 9037 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 9038 struct rte_flow *flow, 9039 const struct rte_flow_attr *attr, 9040 const struct rte_flow_action *app_actions, 9041 uint32_t flow_idx, 9042 const struct mlx5_flow_tunnel *tunnel, 9043 struct tunnel_default_miss_ctx *ctx, 9044 struct rte_flow_error *error) 9045 { 9046 struct mlx5_priv *priv = dev->data->dev_private; 9047 struct mlx5_flow *dev_flow; 9048 struct rte_flow_attr miss_attr = *attr; 9049 const struct rte_flow_item miss_items[2] = { 9050 { 9051 .type = RTE_FLOW_ITEM_TYPE_ETH, 9052 .spec = NULL, 9053 .last = NULL, 9054 .mask = NULL 9055 }, 9056 { 9057 .type = RTE_FLOW_ITEM_TYPE_END, 9058 .spec = NULL, 9059 .last = NULL, 9060 .mask = NULL 9061 } 9062 }; 9063 union tunnel_offload_mark mark_id; 9064 struct rte_flow_action_mark miss_mark; 9065 struct rte_flow_action miss_actions[3] = { 9066 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 9067 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 9068 }; 9069 const struct rte_flow_action_jump *jump_data; 9070 uint32_t i, flow_table = 0; /* prevent compilation warning */ 9071 struct flow_grp_info grp_info = { 9072 .external = 1, 9073 .transfer = attr->transfer, 9074 .fdb_def_rule = !!priv->fdb_def_rule, 9075 .std_tbl_fix = 0, 9076 }; 9077 int ret; 9078 9079 if (!attr->transfer) { 9080 uint32_t q_size; 9081 9082 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 9083 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 9084 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 9085 0, SOCKET_ID_ANY); 9086 if (!ctx->queue) 9087 return rte_flow_error_set 9088 (error, ENOMEM, 9089 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 9090 NULL, "invalid default miss RSS"); 9091 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 9092 ctx->action_rss.level = 0, 9093 ctx->action_rss.types = priv->rss_conf.rss_hf, 9094 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 9095 ctx->action_rss.queue_num = priv->reta_idx_n, 9096 ctx->action_rss.key = priv->rss_conf.rss_key, 9097 ctx->action_rss.queue = ctx->queue; 9098 if (!priv->reta_idx_n || !priv->rxqs_n) 9099 return rte_flow_error_set 9100 (error, EINVAL, 9101 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 9102 NULL, "invalid port configuration"); 9103 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) 9104 ctx->action_rss.types = 0; 9105 for (i = 0; i != priv->reta_idx_n; ++i) 9106 ctx->queue[i] = (*priv->reta_idx)[i]; 9107 } else { 9108 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 9109 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 9110 } 9111 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 9112 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 9113 jump_data = app_actions->conf; 9114 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 9115 miss_attr.group = jump_data->group; 9116 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 9117 &flow_table, &grp_info, error); 9118 if (ret) 9119 return rte_flow_error_set(error, EINVAL, 9120 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 9121 NULL, "invalid tunnel id"); 9122 mark_id.app_reserve = 0; 9123 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 9124 mark_id.transfer = !!attr->transfer; 9125 mark_id._unused_ = 0; 9126 miss_mark.id = mark_id.val; 9127 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 9128 miss_items, miss_actions, flow_idx, error); 9129 if (!dev_flow) 9130 return -rte_errno; 9131 dev_flow->flow = flow; 9132 dev_flow->external = true; 9133 dev_flow->tunnel = tunnel; 9134 dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE; 9135 /* Subflow object was created, we must include one in the list. */ 9136 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 9137 dev_flow->handle, next); 9138 DRV_LOG(DEBUG, 9139 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 9140 dev->data->port_id, tunnel->app_tunnel.type, 9141 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 9142 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 9143 miss_actions, error); 9144 if (!ret) 9145 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 9146 error); 9147 9148 return ret; 9149 } 9150 9151 static const struct mlx5_flow_tbl_data_entry * 9152 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 9153 { 9154 struct mlx5_priv *priv = dev->data->dev_private; 9155 struct mlx5_dev_ctx_shared *sh = priv->sh; 9156 struct mlx5_list_entry *he; 9157 union tunnel_offload_mark mbits = { .val = mark }; 9158 union mlx5_flow_tbl_key table_key = { 9159 { 9160 .level = tunnel_id_to_flow_tbl(mbits.table_id), 9161 .id = 0, 9162 .reserved = 0, 9163 .dummy = 0, 9164 .is_fdb = !!mbits.transfer, 9165 .is_egress = 0, 9166 } 9167 }; 9168 struct mlx5_flow_cb_ctx ctx = { 9169 .data = &table_key.v64, 9170 }; 9171 9172 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx); 9173 return he ? 9174 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 9175 } 9176 9177 static void 9178 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx, 9179 struct mlx5_list_entry *entry) 9180 { 9181 struct mlx5_dev_ctx_shared *sh = tool_ctx; 9182 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 9183 9184 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 9185 tunnel_flow_tbl_to_id(tte->flow_table)); 9186 mlx5_free(tte); 9187 } 9188 9189 static int 9190 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused, 9191 struct mlx5_list_entry *entry, void *cb_ctx) 9192 { 9193 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 9194 union tunnel_tbl_key tbl = { 9195 .val = *(uint64_t *)(ctx->data), 9196 }; 9197 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 9198 9199 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group; 9200 } 9201 9202 static struct mlx5_list_entry * 9203 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx) 9204 { 9205 struct mlx5_dev_ctx_shared *sh = tool_ctx; 9206 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 9207 struct tunnel_tbl_entry *tte; 9208 union tunnel_tbl_key tbl = { 9209 .val = *(uint64_t *)(ctx->data), 9210 }; 9211 9212 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 9213 sizeof(*tte), 0, 9214 SOCKET_ID_ANY); 9215 if (!tte) 9216 goto err; 9217 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 9218 &tte->flow_table); 9219 if (tte->flow_table >= MLX5_MAX_TABLES) { 9220 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.", 9221 tte->flow_table); 9222 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 9223 tte->flow_table); 9224 goto err; 9225 } else if (!tte->flow_table) { 9226 goto err; 9227 } 9228 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 9229 tte->tunnel_id = tbl.tunnel_id; 9230 tte->group = tbl.group; 9231 return &tte->hash; 9232 err: 9233 if (tte) 9234 mlx5_free(tte); 9235 return NULL; 9236 } 9237 9238 static struct mlx5_list_entry * 9239 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused, 9240 struct mlx5_list_entry *oentry, 9241 void *cb_ctx __rte_unused) 9242 { 9243 struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte), 9244 0, SOCKET_ID_ANY); 9245 9246 if (!tte) 9247 return NULL; 9248 memcpy(tte, oentry, sizeof(*tte)); 9249 return &tte->hash; 9250 } 9251 9252 static void 9253 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused, 9254 struct mlx5_list_entry *entry) 9255 { 9256 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 9257 9258 mlx5_free(tte); 9259 } 9260 9261 static uint32_t 9262 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 9263 const struct mlx5_flow_tunnel *tunnel, 9264 uint32_t group, uint32_t *table, 9265 struct rte_flow_error *error) 9266 { 9267 struct mlx5_list_entry *he; 9268 struct tunnel_tbl_entry *tte; 9269 union tunnel_tbl_key key = { 9270 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 9271 .group = group 9272 }; 9273 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 9274 struct mlx5_hlist *group_hash; 9275 struct mlx5_flow_cb_ctx ctx = { 9276 .data = &key.val, 9277 }; 9278 9279 group_hash = tunnel ? tunnel->groups : thub->groups; 9280 he = mlx5_hlist_register(group_hash, key.val, &ctx); 9281 if (!he) 9282 return rte_flow_error_set(error, EINVAL, 9283 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 9284 NULL, 9285 "tunnel group index not supported"); 9286 tte = container_of(he, typeof(*tte), hash); 9287 *table = tte->flow_table; 9288 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 9289 dev->data->port_id, key.tunnel_id, group, *table); 9290 return 0; 9291 } 9292 9293 static void 9294 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 9295 struct mlx5_flow_tunnel *tunnel) 9296 { 9297 struct mlx5_priv *priv = dev->data->dev_private; 9298 struct mlx5_indexed_pool *ipool; 9299 9300 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 9301 dev->data->port_id, tunnel->tunnel_id); 9302 LIST_REMOVE(tunnel, chain); 9303 mlx5_hlist_destroy(tunnel->groups); 9304 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 9305 mlx5_ipool_free(ipool, tunnel->tunnel_id); 9306 } 9307 9308 static bool 9309 mlx5_access_tunnel_offload_db 9310 (struct rte_eth_dev *dev, 9311 bool (*match)(struct rte_eth_dev *, 9312 struct mlx5_flow_tunnel *, const void *), 9313 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 9314 void (*miss)(struct rte_eth_dev *, void *), 9315 void *ctx, bool lock_op) 9316 { 9317 bool verdict = false; 9318 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 9319 struct mlx5_flow_tunnel *tunnel; 9320 9321 rte_spinlock_lock(&thub->sl); 9322 LIST_FOREACH(tunnel, &thub->tunnels, chain) { 9323 verdict = match(dev, tunnel, (const void *)ctx); 9324 if (verdict) 9325 break; 9326 } 9327 if (!lock_op) 9328 rte_spinlock_unlock(&thub->sl); 9329 if (verdict && hit) 9330 hit(dev, tunnel, ctx); 9331 if (!verdict && miss) 9332 miss(dev, ctx); 9333 if (lock_op) 9334 rte_spinlock_unlock(&thub->sl); 9335 9336 return verdict; 9337 } 9338 9339 struct tunnel_db_find_tunnel_id_ctx { 9340 uint32_t tunnel_id; 9341 struct mlx5_flow_tunnel *tunnel; 9342 }; 9343 9344 static bool 9345 find_tunnel_id_match(struct rte_eth_dev *dev, 9346 struct mlx5_flow_tunnel *tunnel, const void *x) 9347 { 9348 const struct tunnel_db_find_tunnel_id_ctx *ctx = x; 9349 9350 RTE_SET_USED(dev); 9351 return tunnel->tunnel_id == ctx->tunnel_id; 9352 } 9353 9354 static void 9355 find_tunnel_id_hit(struct rte_eth_dev *dev, 9356 struct mlx5_flow_tunnel *tunnel, void *x) 9357 { 9358 struct tunnel_db_find_tunnel_id_ctx *ctx = x; 9359 RTE_SET_USED(dev); 9360 ctx->tunnel = tunnel; 9361 } 9362 9363 static struct mlx5_flow_tunnel * 9364 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 9365 { 9366 struct tunnel_db_find_tunnel_id_ctx ctx = { 9367 .tunnel_id = id, 9368 }; 9369 9370 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match, 9371 find_tunnel_id_hit, NULL, &ctx, true); 9372 9373 return ctx.tunnel; 9374 } 9375 9376 static struct mlx5_flow_tunnel * 9377 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 9378 const struct rte_flow_tunnel *app_tunnel) 9379 { 9380 struct mlx5_priv *priv = dev->data->dev_private; 9381 struct mlx5_indexed_pool *ipool; 9382 struct mlx5_flow_tunnel *tunnel; 9383 uint32_t id; 9384 9385 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 9386 tunnel = mlx5_ipool_zmalloc(ipool, &id); 9387 if (!tunnel) 9388 return NULL; 9389 if (id >= MLX5_MAX_TUNNELS) { 9390 mlx5_ipool_free(ipool, id); 9391 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id); 9392 return NULL; 9393 } 9394 tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true, 9395 priv->sh, 9396 mlx5_flow_tunnel_grp2tbl_create_cb, 9397 mlx5_flow_tunnel_grp2tbl_match_cb, 9398 mlx5_flow_tunnel_grp2tbl_remove_cb, 9399 mlx5_flow_tunnel_grp2tbl_clone_cb, 9400 mlx5_flow_tunnel_grp2tbl_clone_free_cb); 9401 if (!tunnel->groups) { 9402 mlx5_ipool_free(ipool, id); 9403 return NULL; 9404 } 9405 /* initiate new PMD tunnel */ 9406 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 9407 tunnel->tunnel_id = id; 9408 tunnel->action.type = (typeof(tunnel->action.type)) 9409 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 9410 tunnel->action.conf = tunnel; 9411 tunnel->item.type = (typeof(tunnel->item.type)) 9412 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 9413 tunnel->item.spec = tunnel; 9414 tunnel->item.last = NULL; 9415 tunnel->item.mask = NULL; 9416 9417 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 9418 dev->data->port_id, tunnel->tunnel_id); 9419 9420 return tunnel; 9421 } 9422 9423 struct tunnel_db_get_tunnel_ctx { 9424 const struct rte_flow_tunnel *app_tunnel; 9425 struct mlx5_flow_tunnel *tunnel; 9426 }; 9427 9428 static bool get_tunnel_match(struct rte_eth_dev *dev, 9429 struct mlx5_flow_tunnel *tunnel, const void *x) 9430 { 9431 const struct tunnel_db_get_tunnel_ctx *ctx = x; 9432 9433 RTE_SET_USED(dev); 9434 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel, 9435 sizeof(*ctx->app_tunnel)); 9436 } 9437 9438 static void get_tunnel_hit(struct rte_eth_dev *dev, 9439 struct mlx5_flow_tunnel *tunnel, void *x) 9440 { 9441 /* called under tunnel spinlock protection */ 9442 struct tunnel_db_get_tunnel_ctx *ctx = x; 9443 9444 RTE_SET_USED(dev); 9445 tunnel->refctn++; 9446 ctx->tunnel = tunnel; 9447 } 9448 9449 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x) 9450 { 9451 /* called under tunnel spinlock protection */ 9452 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 9453 struct tunnel_db_get_tunnel_ctx *ctx = x; 9454 9455 rte_spinlock_unlock(&thub->sl); 9456 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel); 9457 rte_spinlock_lock(&thub->sl); 9458 if (ctx->tunnel) { 9459 ctx->tunnel->refctn = 1; 9460 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain); 9461 } 9462 } 9463 9464 9465 static int 9466 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 9467 const struct rte_flow_tunnel *app_tunnel, 9468 struct mlx5_flow_tunnel **tunnel) 9469 { 9470 struct tunnel_db_get_tunnel_ctx ctx = { 9471 .app_tunnel = app_tunnel, 9472 }; 9473 9474 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit, 9475 get_tunnel_miss, &ctx, true); 9476 *tunnel = ctx.tunnel; 9477 return ctx.tunnel ? 0 : -ENOMEM; 9478 } 9479 9480 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 9481 { 9482 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 9483 9484 if (!thub) 9485 return; 9486 if (!LIST_EMPTY(&thub->tunnels)) 9487 DRV_LOG(WARNING, "port %u tunnels present", port_id); 9488 mlx5_hlist_destroy(thub->groups); 9489 mlx5_free(thub); 9490 } 9491 9492 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 9493 { 9494 int err; 9495 struct mlx5_flow_tunnel_hub *thub; 9496 9497 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 9498 0, SOCKET_ID_ANY); 9499 if (!thub) 9500 return -ENOMEM; 9501 LIST_INIT(&thub->tunnels); 9502 rte_spinlock_init(&thub->sl); 9503 thub->groups = mlx5_hlist_create("flow groups", 64, 9504 false, true, sh, 9505 mlx5_flow_tunnel_grp2tbl_create_cb, 9506 mlx5_flow_tunnel_grp2tbl_match_cb, 9507 mlx5_flow_tunnel_grp2tbl_remove_cb, 9508 mlx5_flow_tunnel_grp2tbl_clone_cb, 9509 mlx5_flow_tunnel_grp2tbl_clone_free_cb); 9510 if (!thub->groups) { 9511 err = -rte_errno; 9512 goto err; 9513 } 9514 sh->tunnel_hub = thub; 9515 9516 return 0; 9517 9518 err: 9519 if (thub->groups) 9520 mlx5_hlist_destroy(thub->groups); 9521 if (thub) 9522 mlx5_free(thub); 9523 return err; 9524 } 9525 9526 static inline int 9527 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 9528 struct rte_flow_tunnel *tunnel, 9529 struct rte_flow_error *error) 9530 { 9531 struct mlx5_priv *priv = dev->data->dev_private; 9532 9533 if (!priv->config.dv_flow_en) 9534 return rte_flow_error_set(error, ENOTSUP, 9535 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9536 "flow DV interface is off"); 9537 if (!is_tunnel_offload_active(dev)) 9538 return rte_flow_error_set(error, ENOTSUP, 9539 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9540 "tunnel offload was not activated"); 9541 if (!tunnel) 9542 return rte_flow_error_set(error, EINVAL, 9543 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9544 "no application tunnel"); 9545 switch (tunnel->type) { 9546 default: 9547 return rte_flow_error_set(error, EINVAL, 9548 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9549 "unsupported tunnel type"); 9550 case RTE_FLOW_ITEM_TYPE_VXLAN: 9551 case RTE_FLOW_ITEM_TYPE_GRE: 9552 case RTE_FLOW_ITEM_TYPE_NVGRE: 9553 case RTE_FLOW_ITEM_TYPE_GENEVE: 9554 break; 9555 } 9556 return 0; 9557 } 9558 9559 static int 9560 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 9561 struct rte_flow_tunnel *app_tunnel, 9562 struct rte_flow_action **actions, 9563 uint32_t *num_of_actions, 9564 struct rte_flow_error *error) 9565 { 9566 struct mlx5_flow_tunnel *tunnel; 9567 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error); 9568 9569 if (ret) 9570 return ret; 9571 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9572 if (ret < 0) { 9573 return rte_flow_error_set(error, ret, 9574 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9575 "failed to initialize pmd tunnel"); 9576 } 9577 *actions = &tunnel->action; 9578 *num_of_actions = 1; 9579 return 0; 9580 } 9581 9582 static int 9583 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 9584 struct rte_flow_tunnel *app_tunnel, 9585 struct rte_flow_item **items, 9586 uint32_t *num_of_items, 9587 struct rte_flow_error *error) 9588 { 9589 struct mlx5_flow_tunnel *tunnel; 9590 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error); 9591 9592 if (ret) 9593 return ret; 9594 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9595 if (ret < 0) { 9596 return rte_flow_error_set(error, ret, 9597 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9598 "failed to initialize pmd tunnel"); 9599 } 9600 *items = &tunnel->item; 9601 *num_of_items = 1; 9602 return 0; 9603 } 9604 9605 struct tunnel_db_element_release_ctx { 9606 struct rte_flow_item *items; 9607 struct rte_flow_action *actions; 9608 uint32_t num_elements; 9609 struct rte_flow_error *error; 9610 int ret; 9611 }; 9612 9613 static bool 9614 tunnel_element_release_match(struct rte_eth_dev *dev, 9615 struct mlx5_flow_tunnel *tunnel, const void *x) 9616 { 9617 const struct tunnel_db_element_release_ctx *ctx = x; 9618 9619 RTE_SET_USED(dev); 9620 if (ctx->num_elements != 1) 9621 return false; 9622 else if (ctx->items) 9623 return ctx->items == &tunnel->item; 9624 else if (ctx->actions) 9625 return ctx->actions == &tunnel->action; 9626 9627 return false; 9628 } 9629 9630 static void 9631 tunnel_element_release_hit(struct rte_eth_dev *dev, 9632 struct mlx5_flow_tunnel *tunnel, void *x) 9633 { 9634 struct tunnel_db_element_release_ctx *ctx = x; 9635 ctx->ret = 0; 9636 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 9637 mlx5_flow_tunnel_free(dev, tunnel); 9638 } 9639 9640 static void 9641 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x) 9642 { 9643 struct tunnel_db_element_release_ctx *ctx = x; 9644 RTE_SET_USED(dev); 9645 ctx->ret = rte_flow_error_set(ctx->error, EINVAL, 9646 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9647 "invalid argument"); 9648 } 9649 9650 static int 9651 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 9652 struct rte_flow_item *pmd_items, 9653 uint32_t num_items, struct rte_flow_error *err) 9654 { 9655 struct tunnel_db_element_release_ctx ctx = { 9656 .items = pmd_items, 9657 .actions = NULL, 9658 .num_elements = num_items, 9659 .error = err, 9660 }; 9661 9662 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9663 tunnel_element_release_hit, 9664 tunnel_element_release_miss, &ctx, false); 9665 9666 return ctx.ret; 9667 } 9668 9669 static int 9670 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 9671 struct rte_flow_action *pmd_actions, 9672 uint32_t num_actions, struct rte_flow_error *err) 9673 { 9674 struct tunnel_db_element_release_ctx ctx = { 9675 .items = NULL, 9676 .actions = pmd_actions, 9677 .num_elements = num_actions, 9678 .error = err, 9679 }; 9680 9681 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9682 tunnel_element_release_hit, 9683 tunnel_element_release_miss, &ctx, false); 9684 9685 return ctx.ret; 9686 } 9687 9688 static int 9689 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 9690 struct rte_mbuf *m, 9691 struct rte_flow_restore_info *info, 9692 struct rte_flow_error *err) 9693 { 9694 uint64_t ol_flags = m->ol_flags; 9695 const struct mlx5_flow_tbl_data_entry *tble; 9696 const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID; 9697 9698 if (!is_tunnel_offload_active(dev)) { 9699 info->flags = 0; 9700 return 0; 9701 } 9702 9703 if ((ol_flags & mask) != mask) 9704 goto err; 9705 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 9706 if (!tble) { 9707 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 9708 dev->data->port_id, m->hash.fdir.hi); 9709 goto err; 9710 } 9711 MLX5_ASSERT(tble->tunnel); 9712 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 9713 info->group_id = tble->group_id; 9714 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 9715 RTE_FLOW_RESTORE_INFO_GROUP_ID | 9716 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 9717 9718 return 0; 9719 9720 err: 9721 return rte_flow_error_set(err, EINVAL, 9722 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9723 "failed to get restore info"); 9724 } 9725 9726 #else /* HAVE_IBV_FLOW_DV_SUPPORT */ 9727 static int 9728 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev, 9729 __rte_unused struct rte_flow_tunnel *app_tunnel, 9730 __rte_unused struct rte_flow_action **actions, 9731 __rte_unused uint32_t *num_of_actions, 9732 __rte_unused struct rte_flow_error *error) 9733 { 9734 return -ENOTSUP; 9735 } 9736 9737 static int 9738 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev, 9739 __rte_unused struct rte_flow_tunnel *app_tunnel, 9740 __rte_unused struct rte_flow_item **items, 9741 __rte_unused uint32_t *num_of_items, 9742 __rte_unused struct rte_flow_error *error) 9743 { 9744 return -ENOTSUP; 9745 } 9746 9747 static int 9748 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev, 9749 __rte_unused struct rte_flow_item *pmd_items, 9750 __rte_unused uint32_t num_items, 9751 __rte_unused struct rte_flow_error *err) 9752 { 9753 return -ENOTSUP; 9754 } 9755 9756 static int 9757 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev, 9758 __rte_unused struct rte_flow_action *pmd_action, 9759 __rte_unused uint32_t num_actions, 9760 __rte_unused struct rte_flow_error *err) 9761 { 9762 return -ENOTSUP; 9763 } 9764 9765 static int 9766 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev, 9767 __rte_unused struct rte_mbuf *m, 9768 __rte_unused struct rte_flow_restore_info *i, 9769 __rte_unused struct rte_flow_error *err) 9770 { 9771 return -ENOTSUP; 9772 } 9773 9774 static int 9775 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev, 9776 __rte_unused struct rte_flow *flow, 9777 __rte_unused const struct rte_flow_attr *attr, 9778 __rte_unused const struct rte_flow_action *actions, 9779 __rte_unused uint32_t flow_idx, 9780 __rte_unused const struct mlx5_flow_tunnel *tunnel, 9781 __rte_unused struct tunnel_default_miss_ctx *ctx, 9782 __rte_unused struct rte_flow_error *error) 9783 { 9784 return -ENOTSUP; 9785 } 9786 9787 static struct mlx5_flow_tunnel * 9788 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev, 9789 __rte_unused uint32_t id) 9790 { 9791 return NULL; 9792 } 9793 9794 static void 9795 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev, 9796 __rte_unused struct mlx5_flow_tunnel *tunnel) 9797 { 9798 } 9799 9800 static uint32_t 9801 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev, 9802 __rte_unused const struct mlx5_flow_tunnel *t, 9803 __rte_unused uint32_t group, 9804 __rte_unused uint32_t *table, 9805 struct rte_flow_error *error) 9806 { 9807 return rte_flow_error_set(error, ENOTSUP, 9808 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9809 "tunnel offload requires DV support"); 9810 } 9811 9812 void 9813 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh, 9814 __rte_unused uint16_t port_id) 9815 { 9816 } 9817 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 9818 9819 /* Flex flow item API */ 9820 static struct rte_flow_item_flex_handle * 9821 mlx5_flow_flex_item_create(struct rte_eth_dev *dev, 9822 const struct rte_flow_item_flex_conf *conf, 9823 struct rte_flow_error *error) 9824 { 9825 static const char err_msg[] = "flex item creation unsupported"; 9826 struct rte_flow_attr attr = { .transfer = 0 }; 9827 const struct mlx5_flow_driver_ops *fops = 9828 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 9829 9830 if (!fops->item_create) { 9831 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 9832 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 9833 NULL, err_msg); 9834 return NULL; 9835 } 9836 return fops->item_create(dev, conf, error); 9837 } 9838 9839 static int 9840 mlx5_flow_flex_item_release(struct rte_eth_dev *dev, 9841 const struct rte_flow_item_flex_handle *handle, 9842 struct rte_flow_error *error) 9843 { 9844 static const char err_msg[] = "flex item release unsupported"; 9845 struct rte_flow_attr attr = { .transfer = 0 }; 9846 const struct mlx5_flow_driver_ops *fops = 9847 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 9848 9849 if (!fops->item_release) { 9850 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 9851 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 9852 NULL, err_msg); 9853 return -rte_errno; 9854 } 9855 return fops->item_release(dev, handle, error); 9856 } 9857 9858 static void 9859 mlx5_dbg__print_pattern(const struct rte_flow_item *item) 9860 { 9861 int ret; 9862 struct rte_flow_error error; 9863 9864 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 9865 char *item_name; 9866 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name, 9867 sizeof(item_name), 9868 (void *)(uintptr_t)item->type, &error); 9869 if (ret > 0) 9870 printf("%s ", item_name); 9871 else 9872 printf("%d\n", (int)item->type); 9873 } 9874 printf("END\n"); 9875 } 9876 9877 static int 9878 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item) 9879 { 9880 const struct rte_flow_item_udp *spec = udp_item->spec; 9881 const struct rte_flow_item_udp *mask = udp_item->mask; 9882 uint16_t udp_dport = 0; 9883 9884 if (spec != NULL) { 9885 if (!mask) 9886 mask = &rte_flow_item_udp_mask; 9887 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port & 9888 mask->hdr.dst_port); 9889 } 9890 return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN); 9891 } 9892 9893 static const struct mlx5_flow_expand_node * 9894 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern, 9895 unsigned int item_idx, 9896 const struct mlx5_flow_expand_node graph[], 9897 const struct mlx5_flow_expand_node *node) 9898 { 9899 const struct rte_flow_item *item = pattern + item_idx, *prev_item; 9900 9901 if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN && 9902 node != NULL && 9903 node->type == RTE_FLOW_ITEM_TYPE_VXLAN) { 9904 /* 9905 * The expansion node is VXLAN and it is also the last 9906 * expandable item in the pattern, so need to continue 9907 * expansion of the inner tunnel. 9908 */ 9909 MLX5_ASSERT(item_idx > 0); 9910 prev_item = pattern + item_idx - 1; 9911 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP); 9912 if (mlx5_flow_is_std_vxlan_port(prev_item)) 9913 return &graph[MLX5_EXPANSION_STD_VXLAN]; 9914 return &graph[MLX5_EXPANSION_L3_VXLAN]; 9915 } 9916 return node; 9917 } 9918 9919 /* Map of Verbs to Flow priority with 8 Verbs priorities. */ 9920 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = { 9921 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 }, 9922 }; 9923 9924 /* Map of Verbs to Flow priority with 16 Verbs priorities. */ 9925 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = { 9926 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 }, 9927 { 9, 10, 11 }, { 12, 13, 14 }, 9928 }; 9929 9930 /** 9931 * Discover the number of available flow priorities. 9932 * 9933 * @param dev 9934 * Ethernet device. 9935 * 9936 * @return 9937 * On success, number of available flow priorities. 9938 * On failure, a negative errno-style code and rte_errno is set. 9939 */ 9940 int 9941 mlx5_flow_discover_priorities(struct rte_eth_dev *dev) 9942 { 9943 static const uint16_t vprio[] = {8, 16}; 9944 const struct mlx5_priv *priv = dev->data->dev_private; 9945 const struct mlx5_flow_driver_ops *fops; 9946 enum mlx5_flow_drv_type type; 9947 int ret; 9948 9949 type = mlx5_flow_os_get_type(); 9950 if (type == MLX5_FLOW_TYPE_MAX) { 9951 type = MLX5_FLOW_TYPE_VERBS; 9952 if (priv->sh->devx && priv->config.dv_flow_en) 9953 type = MLX5_FLOW_TYPE_DV; 9954 } 9955 fops = flow_get_drv_ops(type); 9956 if (fops->discover_priorities == NULL) { 9957 DRV_LOG(ERR, "Priority discovery not supported"); 9958 rte_errno = ENOTSUP; 9959 return -rte_errno; 9960 } 9961 ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio)); 9962 if (ret < 0) 9963 return ret; 9964 switch (ret) { 9965 case 8: 9966 ret = RTE_DIM(priority_map_3); 9967 break; 9968 case 16: 9969 ret = RTE_DIM(priority_map_5); 9970 break; 9971 default: 9972 rte_errno = ENOTSUP; 9973 DRV_LOG(ERR, 9974 "port %u maximum priority: %d expected 8/16", 9975 dev->data->port_id, ret); 9976 return -rte_errno; 9977 } 9978 DRV_LOG(INFO, "port %u supported flow priorities:" 9979 " 0-%d for ingress or egress root table," 9980 " 0-%d for non-root table or transfer root table.", 9981 dev->data->port_id, ret - 2, 9982 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1); 9983 return ret; 9984 } 9985 9986 /** 9987 * Adjust flow priority based on the highest layer and the request priority. 9988 * 9989 * @param[in] dev 9990 * Pointer to the Ethernet device structure. 9991 * @param[in] priority 9992 * The rule base priority. 9993 * @param[in] subpriority 9994 * The priority based on the items. 9995 * 9996 * @return 9997 * The new priority. 9998 */ 9999 uint32_t 10000 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 10001 uint32_t subpriority) 10002 { 10003 uint32_t res = 0; 10004 struct mlx5_priv *priv = dev->data->dev_private; 10005 10006 switch (priv->sh->flow_max_priority) { 10007 case RTE_DIM(priority_map_3): 10008 res = priority_map_3[priority][subpriority]; 10009 break; 10010 case RTE_DIM(priority_map_5): 10011 res = priority_map_5[priority][subpriority]; 10012 break; 10013 } 10014 return res; 10015 } 10016