1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <stdalign.h> 7 #include <stdint.h> 8 #include <string.h> 9 #include <stdbool.h> 10 #include <sys/queue.h> 11 12 #include <rte_common.h> 13 #include <rte_ether.h> 14 #include <ethdev_driver.h> 15 #include <rte_eal_paging.h> 16 #include <rte_flow.h> 17 #include <rte_cycles.h> 18 #include <rte_flow_driver.h> 19 #include <rte_malloc.h> 20 #include <rte_ip.h> 21 22 #include <mlx5_glue.h> 23 #include <mlx5_devx_cmds.h> 24 #include <mlx5_prm.h> 25 #include <mlx5_malloc.h> 26 27 #include "mlx5_defs.h" 28 #include "mlx5.h" 29 #include "mlx5_flow.h" 30 #include "mlx5_flow_os.h" 31 #include "mlx5_rx.h" 32 #include "mlx5_tx.h" 33 #include "mlx5_common_os.h" 34 #include "rte_pmd_mlx5.h" 35 36 struct tunnel_default_miss_ctx { 37 uint16_t *queue; 38 __extension__ 39 union { 40 struct rte_flow_action_rss action_rss; 41 struct rte_flow_action_queue miss_queue; 42 struct rte_flow_action_jump miss_jump; 43 uint8_t raw[0]; 44 }; 45 }; 46 47 static int 48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 49 struct rte_flow *flow, 50 const struct rte_flow_attr *attr, 51 const struct rte_flow_action *app_actions, 52 uint32_t flow_idx, 53 const struct mlx5_flow_tunnel *tunnel, 54 struct tunnel_default_miss_ctx *ctx, 55 struct rte_flow_error *error); 56 static struct mlx5_flow_tunnel * 57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 58 static void 59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 60 static uint32_t 61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 62 const struct mlx5_flow_tunnel *tunnel, 63 uint32_t group, uint32_t *table, 64 struct rte_flow_error *error); 65 66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void); 67 static void mlx5_flow_pop_thread_workspace(void); 68 69 70 /** Device flow drivers. */ 71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 72 73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 74 75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 76 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) 78 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 79 #endif 80 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 81 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 82 }; 83 84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 86 (const int []){ \ 87 __VA_ARGS__, 0, \ 88 } 89 90 /** Node object of input graph for mlx5_flow_expand_rss(). */ 91 struct mlx5_flow_expand_node { 92 const int *const next; 93 /**< 94 * List of next node indexes. Index 0 is interpreted as a terminator. 95 */ 96 const enum rte_flow_item_type type; 97 /**< Pattern item type of current node. */ 98 uint64_t rss_types; 99 /**< 100 * RSS types bit-field associated with this node 101 * (see ETH_RSS_* definitions). 102 */ 103 uint8_t optional; 104 /**< optional expand field. Default 0 to expand, 1 not go deeper. */ 105 }; 106 107 /** Object returned by mlx5_flow_expand_rss(). */ 108 struct mlx5_flow_expand_rss { 109 uint32_t entries; 110 /**< Number of entries @p patterns and @p priorities. */ 111 struct { 112 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 113 uint32_t priority; /**< Priority offset for each expansion. */ 114 } entry[]; 115 }; 116 117 static void 118 mlx5_dbg__print_pattern(const struct rte_flow_item *item); 119 120 static bool 121 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item) 122 { 123 switch (item->type) { 124 case RTE_FLOW_ITEM_TYPE_ETH: 125 case RTE_FLOW_ITEM_TYPE_VLAN: 126 case RTE_FLOW_ITEM_TYPE_IPV4: 127 case RTE_FLOW_ITEM_TYPE_IPV6: 128 case RTE_FLOW_ITEM_TYPE_UDP: 129 case RTE_FLOW_ITEM_TYPE_TCP: 130 case RTE_FLOW_ITEM_TYPE_VXLAN: 131 case RTE_FLOW_ITEM_TYPE_NVGRE: 132 case RTE_FLOW_ITEM_TYPE_GRE: 133 case RTE_FLOW_ITEM_TYPE_GENEVE: 134 case RTE_FLOW_ITEM_TYPE_MPLS: 135 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE: 136 case RTE_FLOW_ITEM_TYPE_GRE_KEY: 137 return true; 138 default: 139 break; 140 } 141 return false; 142 } 143 144 static enum rte_flow_item_type 145 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 146 { 147 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 148 uint16_t ether_type = 0; 149 uint16_t ether_type_m; 150 uint8_t ip_next_proto = 0; 151 uint8_t ip_next_proto_m; 152 153 if (item == NULL || item->spec == NULL) 154 return ret; 155 switch (item->type) { 156 case RTE_FLOW_ITEM_TYPE_ETH: 157 if (item->mask) 158 ether_type_m = ((const struct rte_flow_item_eth *) 159 (item->mask))->type; 160 else 161 ether_type_m = rte_flow_item_eth_mask.type; 162 if (ether_type_m != RTE_BE16(0xFFFF)) 163 break; 164 ether_type = ((const struct rte_flow_item_eth *) 165 (item->spec))->type; 166 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 167 ret = RTE_FLOW_ITEM_TYPE_IPV4; 168 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 169 ret = RTE_FLOW_ITEM_TYPE_IPV6; 170 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 171 ret = RTE_FLOW_ITEM_TYPE_VLAN; 172 else 173 ret = RTE_FLOW_ITEM_TYPE_END; 174 break; 175 case RTE_FLOW_ITEM_TYPE_VLAN: 176 if (item->mask) 177 ether_type_m = ((const struct rte_flow_item_vlan *) 178 (item->mask))->inner_type; 179 else 180 ether_type_m = rte_flow_item_vlan_mask.inner_type; 181 if (ether_type_m != RTE_BE16(0xFFFF)) 182 break; 183 ether_type = ((const struct rte_flow_item_vlan *) 184 (item->spec))->inner_type; 185 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 186 ret = RTE_FLOW_ITEM_TYPE_IPV4; 187 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 188 ret = RTE_FLOW_ITEM_TYPE_IPV6; 189 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 190 ret = RTE_FLOW_ITEM_TYPE_VLAN; 191 else 192 ret = RTE_FLOW_ITEM_TYPE_END; 193 break; 194 case RTE_FLOW_ITEM_TYPE_IPV4: 195 if (item->mask) 196 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 197 (item->mask))->hdr.next_proto_id; 198 else 199 ip_next_proto_m = 200 rte_flow_item_ipv4_mask.hdr.next_proto_id; 201 if (ip_next_proto_m != 0xFF) 202 break; 203 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 204 (item->spec))->hdr.next_proto_id; 205 if (ip_next_proto == IPPROTO_UDP) 206 ret = RTE_FLOW_ITEM_TYPE_UDP; 207 else if (ip_next_proto == IPPROTO_TCP) 208 ret = RTE_FLOW_ITEM_TYPE_TCP; 209 else if (ip_next_proto == IPPROTO_IP) 210 ret = RTE_FLOW_ITEM_TYPE_IPV4; 211 else if (ip_next_proto == IPPROTO_IPV6) 212 ret = RTE_FLOW_ITEM_TYPE_IPV6; 213 else 214 ret = RTE_FLOW_ITEM_TYPE_END; 215 break; 216 case RTE_FLOW_ITEM_TYPE_IPV6: 217 if (item->mask) 218 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 219 (item->mask))->hdr.proto; 220 else 221 ip_next_proto_m = 222 rte_flow_item_ipv6_mask.hdr.proto; 223 if (ip_next_proto_m != 0xFF) 224 break; 225 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 226 (item->spec))->hdr.proto; 227 if (ip_next_proto == IPPROTO_UDP) 228 ret = RTE_FLOW_ITEM_TYPE_UDP; 229 else if (ip_next_proto == IPPROTO_TCP) 230 ret = RTE_FLOW_ITEM_TYPE_TCP; 231 else if (ip_next_proto == IPPROTO_IP) 232 ret = RTE_FLOW_ITEM_TYPE_IPV4; 233 else if (ip_next_proto == IPPROTO_IPV6) 234 ret = RTE_FLOW_ITEM_TYPE_IPV6; 235 else 236 ret = RTE_FLOW_ITEM_TYPE_END; 237 break; 238 default: 239 ret = RTE_FLOW_ITEM_TYPE_VOID; 240 break; 241 } 242 return ret; 243 } 244 245 #define MLX5_RSS_EXP_ELT_N 16 246 247 /** 248 * Expand RSS flows into several possible flows according to the RSS hash 249 * fields requested and the driver capabilities. 250 * 251 * @param[out] buf 252 * Buffer to store the result expansion. 253 * @param[in] size 254 * Buffer size in bytes. If 0, @p buf can be NULL. 255 * @param[in] pattern 256 * User flow pattern. 257 * @param[in] types 258 * RSS types to expand (see ETH_RSS_* definitions). 259 * @param[in] graph 260 * Input graph to expand @p pattern according to @p types. 261 * @param[in] graph_root_index 262 * Index of root node in @p graph, typically 0. 263 * 264 * @return 265 * A positive value representing the size of @p buf in bytes regardless of 266 * @p size on success, a negative errno value otherwise and rte_errno is 267 * set, the following errors are defined: 268 * 269 * -E2BIG: graph-depth @p graph is too deep. 270 * -EINVAL: @p size has not enough space for expanded pattern. 271 */ 272 static int 273 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 274 const struct rte_flow_item *pattern, uint64_t types, 275 const struct mlx5_flow_expand_node graph[], 276 int graph_root_index) 277 { 278 const struct rte_flow_item *item; 279 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 280 const int *next_node; 281 const int *stack[MLX5_RSS_EXP_ELT_N]; 282 int stack_pos = 0; 283 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N]; 284 unsigned int i; 285 size_t lsize; 286 size_t user_pattern_size = 0; 287 void *addr = NULL; 288 const struct mlx5_flow_expand_node *next = NULL; 289 struct rte_flow_item missed_item; 290 int missed = 0; 291 int elt = 0; 292 const struct rte_flow_item *last_item = NULL; 293 294 memset(&missed_item, 0, sizeof(missed_item)); 295 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 296 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]); 297 if (lsize > size) 298 return -EINVAL; 299 buf->entry[0].priority = 0; 300 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N]; 301 buf->entries = 0; 302 addr = buf->entry[0].pattern; 303 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 304 if (!mlx5_flow_is_rss_expandable_item(item)) { 305 user_pattern_size += sizeof(*item); 306 continue; 307 } 308 last_item = item; 309 for (i = 0; node->next && node->next[i]; ++i) { 310 next = &graph[node->next[i]]; 311 if (next->type == item->type) 312 break; 313 } 314 if (next) 315 node = next; 316 user_pattern_size += sizeof(*item); 317 } 318 user_pattern_size += sizeof(*item); /* Handle END item. */ 319 lsize += user_pattern_size; 320 if (lsize > size) 321 return -EINVAL; 322 /* Copy the user pattern in the first entry of the buffer. */ 323 rte_memcpy(addr, pattern, user_pattern_size); 324 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 325 buf->entries = 1; 326 /* Start expanding. */ 327 memset(flow_items, 0, sizeof(flow_items)); 328 user_pattern_size -= sizeof(*item); 329 /* 330 * Check if the last valid item has spec set, need complete pattern, 331 * and the pattern can be used for expansion. 332 */ 333 missed_item.type = mlx5_flow_expand_rss_item_complete(last_item); 334 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 335 /* Item type END indicates expansion is not required. */ 336 return lsize; 337 } 338 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 339 next = NULL; 340 missed = 1; 341 for (i = 0; node->next && node->next[i]; ++i) { 342 next = &graph[node->next[i]]; 343 if (next->type == missed_item.type) { 344 flow_items[0].type = missed_item.type; 345 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 346 break; 347 } 348 next = NULL; 349 } 350 } 351 if (next && missed) { 352 elt = 2; /* missed item + item end. */ 353 node = next; 354 lsize += elt * sizeof(*item) + user_pattern_size; 355 if (lsize > size) 356 return -EINVAL; 357 if (node->rss_types & types) { 358 buf->entry[buf->entries].priority = 1; 359 buf->entry[buf->entries].pattern = addr; 360 buf->entries++; 361 rte_memcpy(addr, buf->entry[0].pattern, 362 user_pattern_size); 363 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 364 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 365 addr = (void *)(((uintptr_t)addr) + 366 elt * sizeof(*item)); 367 } 368 } 369 memset(flow_items, 0, sizeof(flow_items)); 370 next_node = node->next; 371 stack[stack_pos] = next_node; 372 node = next_node ? &graph[*next_node] : NULL; 373 while (node) { 374 flow_items[stack_pos].type = node->type; 375 if (node->rss_types & types) { 376 size_t n; 377 /* 378 * compute the number of items to copy from the 379 * expansion and copy it. 380 * When the stack_pos is 0, there are 1 element in it, 381 * plus the addition END item. 382 */ 383 elt = stack_pos + 2; 384 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 385 lsize += elt * sizeof(*item) + user_pattern_size; 386 if (lsize > size) 387 return -EINVAL; 388 n = elt * sizeof(*item); 389 buf->entry[buf->entries].priority = 390 stack_pos + 1 + missed; 391 buf->entry[buf->entries].pattern = addr; 392 buf->entries++; 393 rte_memcpy(addr, buf->entry[0].pattern, 394 user_pattern_size); 395 addr = (void *)(((uintptr_t)addr) + 396 user_pattern_size); 397 rte_memcpy(addr, &missed_item, 398 missed * sizeof(*item)); 399 addr = (void *)(((uintptr_t)addr) + 400 missed * sizeof(*item)); 401 rte_memcpy(addr, flow_items, n); 402 addr = (void *)(((uintptr_t)addr) + n); 403 } 404 /* Go deeper. */ 405 if (!node->optional && node->next) { 406 next_node = node->next; 407 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) { 408 rte_errno = E2BIG; 409 return -rte_errno; 410 } 411 stack[stack_pos] = next_node; 412 } else if (*(next_node + 1)) { 413 /* Follow up with the next possibility. */ 414 ++next_node; 415 } else { 416 /* Move to the next path. */ 417 if (stack_pos) 418 next_node = stack[--stack_pos]; 419 next_node++; 420 stack[stack_pos] = next_node; 421 } 422 node = *next_node ? &graph[*next_node] : NULL; 423 }; 424 return lsize; 425 } 426 427 enum mlx5_expansion { 428 MLX5_EXPANSION_ROOT, 429 MLX5_EXPANSION_ROOT_OUTER, 430 MLX5_EXPANSION_ROOT_ETH_VLAN, 431 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 432 MLX5_EXPANSION_OUTER_ETH, 433 MLX5_EXPANSION_OUTER_ETH_VLAN, 434 MLX5_EXPANSION_OUTER_VLAN, 435 MLX5_EXPANSION_OUTER_IPV4, 436 MLX5_EXPANSION_OUTER_IPV4_UDP, 437 MLX5_EXPANSION_OUTER_IPV4_TCP, 438 MLX5_EXPANSION_OUTER_IPV6, 439 MLX5_EXPANSION_OUTER_IPV6_UDP, 440 MLX5_EXPANSION_OUTER_IPV6_TCP, 441 MLX5_EXPANSION_VXLAN, 442 MLX5_EXPANSION_VXLAN_GPE, 443 MLX5_EXPANSION_GRE, 444 MLX5_EXPANSION_NVGRE, 445 MLX5_EXPANSION_GRE_KEY, 446 MLX5_EXPANSION_MPLS, 447 MLX5_EXPANSION_ETH, 448 MLX5_EXPANSION_ETH_VLAN, 449 MLX5_EXPANSION_VLAN, 450 MLX5_EXPANSION_IPV4, 451 MLX5_EXPANSION_IPV4_UDP, 452 MLX5_EXPANSION_IPV4_TCP, 453 MLX5_EXPANSION_IPV6, 454 MLX5_EXPANSION_IPV6_UDP, 455 MLX5_EXPANSION_IPV6_TCP, 456 }; 457 458 /** Supported expansion of items. */ 459 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 460 [MLX5_EXPANSION_ROOT] = { 461 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 462 MLX5_EXPANSION_IPV4, 463 MLX5_EXPANSION_IPV6), 464 .type = RTE_FLOW_ITEM_TYPE_END, 465 }, 466 [MLX5_EXPANSION_ROOT_OUTER] = { 467 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 468 MLX5_EXPANSION_OUTER_IPV4, 469 MLX5_EXPANSION_OUTER_IPV6), 470 .type = RTE_FLOW_ITEM_TYPE_END, 471 }, 472 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 473 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 474 .type = RTE_FLOW_ITEM_TYPE_END, 475 }, 476 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 477 .next = MLX5_FLOW_EXPAND_RSS_NEXT 478 (MLX5_EXPANSION_OUTER_ETH_VLAN), 479 .type = RTE_FLOW_ITEM_TYPE_END, 480 }, 481 [MLX5_EXPANSION_OUTER_ETH] = { 482 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 483 MLX5_EXPANSION_OUTER_IPV6), 484 .type = RTE_FLOW_ITEM_TYPE_ETH, 485 .rss_types = 0, 486 }, 487 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 488 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 489 .type = RTE_FLOW_ITEM_TYPE_ETH, 490 .rss_types = 0, 491 }, 492 [MLX5_EXPANSION_OUTER_VLAN] = { 493 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 494 MLX5_EXPANSION_OUTER_IPV6), 495 .type = RTE_FLOW_ITEM_TYPE_VLAN, 496 }, 497 [MLX5_EXPANSION_OUTER_IPV4] = { 498 .next = MLX5_FLOW_EXPAND_RSS_NEXT 499 (MLX5_EXPANSION_OUTER_IPV4_UDP, 500 MLX5_EXPANSION_OUTER_IPV4_TCP, 501 MLX5_EXPANSION_GRE, 502 MLX5_EXPANSION_NVGRE, 503 MLX5_EXPANSION_IPV4, 504 MLX5_EXPANSION_IPV6), 505 .type = RTE_FLOW_ITEM_TYPE_IPV4, 506 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 507 ETH_RSS_NONFRAG_IPV4_OTHER, 508 }, 509 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 510 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 511 MLX5_EXPANSION_VXLAN_GPE, 512 MLX5_EXPANSION_MPLS), 513 .type = RTE_FLOW_ITEM_TYPE_UDP, 514 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 515 }, 516 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 517 .type = RTE_FLOW_ITEM_TYPE_TCP, 518 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 519 }, 520 [MLX5_EXPANSION_OUTER_IPV6] = { 521 .next = MLX5_FLOW_EXPAND_RSS_NEXT 522 (MLX5_EXPANSION_OUTER_IPV6_UDP, 523 MLX5_EXPANSION_OUTER_IPV6_TCP, 524 MLX5_EXPANSION_IPV4, 525 MLX5_EXPANSION_IPV6, 526 MLX5_EXPANSION_GRE, 527 MLX5_EXPANSION_NVGRE), 528 .type = RTE_FLOW_ITEM_TYPE_IPV6, 529 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 530 ETH_RSS_NONFRAG_IPV6_OTHER, 531 }, 532 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 533 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 534 MLX5_EXPANSION_VXLAN_GPE, 535 MLX5_EXPANSION_MPLS), 536 .type = RTE_FLOW_ITEM_TYPE_UDP, 537 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 538 }, 539 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 540 .type = RTE_FLOW_ITEM_TYPE_TCP, 541 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 542 }, 543 [MLX5_EXPANSION_VXLAN] = { 544 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 545 MLX5_EXPANSION_IPV4, 546 MLX5_EXPANSION_IPV6), 547 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 548 }, 549 [MLX5_EXPANSION_VXLAN_GPE] = { 550 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 551 MLX5_EXPANSION_IPV4, 552 MLX5_EXPANSION_IPV6), 553 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 554 }, 555 [MLX5_EXPANSION_GRE] = { 556 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 557 MLX5_EXPANSION_IPV6, 558 MLX5_EXPANSION_GRE_KEY, 559 MLX5_EXPANSION_MPLS), 560 .type = RTE_FLOW_ITEM_TYPE_GRE, 561 }, 562 [MLX5_EXPANSION_GRE_KEY] = { 563 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 564 MLX5_EXPANSION_IPV6, 565 MLX5_EXPANSION_MPLS), 566 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY, 567 .optional = 1, 568 }, 569 [MLX5_EXPANSION_NVGRE] = { 570 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 571 .type = RTE_FLOW_ITEM_TYPE_NVGRE, 572 }, 573 [MLX5_EXPANSION_MPLS] = { 574 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 575 MLX5_EXPANSION_IPV6, 576 MLX5_EXPANSION_ETH), 577 .type = RTE_FLOW_ITEM_TYPE_MPLS, 578 }, 579 [MLX5_EXPANSION_ETH] = { 580 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 581 MLX5_EXPANSION_IPV6), 582 .type = RTE_FLOW_ITEM_TYPE_ETH, 583 }, 584 [MLX5_EXPANSION_ETH_VLAN] = { 585 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 586 .type = RTE_FLOW_ITEM_TYPE_ETH, 587 }, 588 [MLX5_EXPANSION_VLAN] = { 589 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 590 MLX5_EXPANSION_IPV6), 591 .type = RTE_FLOW_ITEM_TYPE_VLAN, 592 }, 593 [MLX5_EXPANSION_IPV4] = { 594 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 595 MLX5_EXPANSION_IPV4_TCP), 596 .type = RTE_FLOW_ITEM_TYPE_IPV4, 597 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 598 ETH_RSS_NONFRAG_IPV4_OTHER, 599 }, 600 [MLX5_EXPANSION_IPV4_UDP] = { 601 .type = RTE_FLOW_ITEM_TYPE_UDP, 602 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 603 }, 604 [MLX5_EXPANSION_IPV4_TCP] = { 605 .type = RTE_FLOW_ITEM_TYPE_TCP, 606 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 607 }, 608 [MLX5_EXPANSION_IPV6] = { 609 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 610 MLX5_EXPANSION_IPV6_TCP), 611 .type = RTE_FLOW_ITEM_TYPE_IPV6, 612 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 613 ETH_RSS_NONFRAG_IPV6_OTHER, 614 }, 615 [MLX5_EXPANSION_IPV6_UDP] = { 616 .type = RTE_FLOW_ITEM_TYPE_UDP, 617 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 618 }, 619 [MLX5_EXPANSION_IPV6_TCP] = { 620 .type = RTE_FLOW_ITEM_TYPE_TCP, 621 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 622 }, 623 }; 624 625 static struct rte_flow_action_handle * 626 mlx5_action_handle_create(struct rte_eth_dev *dev, 627 const struct rte_flow_indir_action_conf *conf, 628 const struct rte_flow_action *action, 629 struct rte_flow_error *error); 630 static int mlx5_action_handle_destroy 631 (struct rte_eth_dev *dev, 632 struct rte_flow_action_handle *handle, 633 struct rte_flow_error *error); 634 static int mlx5_action_handle_update 635 (struct rte_eth_dev *dev, 636 struct rte_flow_action_handle *handle, 637 const void *update, 638 struct rte_flow_error *error); 639 static int mlx5_action_handle_query 640 (struct rte_eth_dev *dev, 641 const struct rte_flow_action_handle *handle, 642 void *data, 643 struct rte_flow_error *error); 644 static int 645 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 646 struct rte_flow_tunnel *app_tunnel, 647 struct rte_flow_action **actions, 648 uint32_t *num_of_actions, 649 struct rte_flow_error *error); 650 static int 651 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 652 struct rte_flow_tunnel *app_tunnel, 653 struct rte_flow_item **items, 654 uint32_t *num_of_items, 655 struct rte_flow_error *error); 656 static int 657 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 658 struct rte_flow_item *pmd_items, 659 uint32_t num_items, struct rte_flow_error *err); 660 static int 661 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 662 struct rte_flow_action *pmd_actions, 663 uint32_t num_actions, 664 struct rte_flow_error *err); 665 static int 666 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 667 struct rte_mbuf *m, 668 struct rte_flow_restore_info *info, 669 struct rte_flow_error *err); 670 671 static const struct rte_flow_ops mlx5_flow_ops = { 672 .validate = mlx5_flow_validate, 673 .create = mlx5_flow_create, 674 .destroy = mlx5_flow_destroy, 675 .flush = mlx5_flow_flush, 676 .isolate = mlx5_flow_isolate, 677 .query = mlx5_flow_query, 678 .dev_dump = mlx5_flow_dev_dump, 679 .get_aged_flows = mlx5_flow_get_aged_flows, 680 .action_handle_create = mlx5_action_handle_create, 681 .action_handle_destroy = mlx5_action_handle_destroy, 682 .action_handle_update = mlx5_action_handle_update, 683 .action_handle_query = mlx5_action_handle_query, 684 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 685 .tunnel_match = mlx5_flow_tunnel_match, 686 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release, 687 .tunnel_item_release = mlx5_flow_tunnel_item_release, 688 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 689 }; 690 691 /* Tunnel information. */ 692 struct mlx5_flow_tunnel_info { 693 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 694 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 695 }; 696 697 static struct mlx5_flow_tunnel_info tunnels_info[] = { 698 { 699 .tunnel = MLX5_FLOW_LAYER_VXLAN, 700 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 701 }, 702 { 703 .tunnel = MLX5_FLOW_LAYER_GENEVE, 704 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 705 }, 706 { 707 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 708 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 709 }, 710 { 711 .tunnel = MLX5_FLOW_LAYER_GRE, 712 .ptype = RTE_PTYPE_TUNNEL_GRE, 713 }, 714 { 715 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 716 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 717 }, 718 { 719 .tunnel = MLX5_FLOW_LAYER_MPLS, 720 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 721 }, 722 { 723 .tunnel = MLX5_FLOW_LAYER_NVGRE, 724 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 725 }, 726 { 727 .tunnel = MLX5_FLOW_LAYER_IPIP, 728 .ptype = RTE_PTYPE_TUNNEL_IP, 729 }, 730 { 731 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 732 .ptype = RTE_PTYPE_TUNNEL_IP, 733 }, 734 { 735 .tunnel = MLX5_FLOW_LAYER_GTP, 736 .ptype = RTE_PTYPE_TUNNEL_GTPU, 737 }, 738 }; 739 740 741 742 /** 743 * Translate tag ID to register. 744 * 745 * @param[in] dev 746 * Pointer to the Ethernet device structure. 747 * @param[in] feature 748 * The feature that request the register. 749 * @param[in] id 750 * The request register ID. 751 * @param[out] error 752 * Error description in case of any. 753 * 754 * @return 755 * The request register on success, a negative errno 756 * value otherwise and rte_errno is set. 757 */ 758 int 759 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 760 enum mlx5_feature_name feature, 761 uint32_t id, 762 struct rte_flow_error *error) 763 { 764 struct mlx5_priv *priv = dev->data->dev_private; 765 struct mlx5_dev_config *config = &priv->config; 766 enum modify_reg start_reg; 767 bool skip_mtr_reg = false; 768 769 switch (feature) { 770 case MLX5_HAIRPIN_RX: 771 return REG_B; 772 case MLX5_HAIRPIN_TX: 773 return REG_A; 774 case MLX5_METADATA_RX: 775 switch (config->dv_xmeta_en) { 776 case MLX5_XMETA_MODE_LEGACY: 777 return REG_B; 778 case MLX5_XMETA_MODE_META16: 779 return REG_C_0; 780 case MLX5_XMETA_MODE_META32: 781 return REG_C_1; 782 } 783 break; 784 case MLX5_METADATA_TX: 785 return REG_A; 786 case MLX5_METADATA_FDB: 787 switch (config->dv_xmeta_en) { 788 case MLX5_XMETA_MODE_LEGACY: 789 return REG_NON; 790 case MLX5_XMETA_MODE_META16: 791 return REG_C_0; 792 case MLX5_XMETA_MODE_META32: 793 return REG_C_1; 794 } 795 break; 796 case MLX5_FLOW_MARK: 797 switch (config->dv_xmeta_en) { 798 case MLX5_XMETA_MODE_LEGACY: 799 return REG_NON; 800 case MLX5_XMETA_MODE_META16: 801 return REG_C_1; 802 case MLX5_XMETA_MODE_META32: 803 return REG_C_0; 804 } 805 break; 806 case MLX5_MTR_ID: 807 /* 808 * If meter color and meter id share one register, flow match 809 * should use the meter color register for match. 810 */ 811 if (priv->mtr_reg_share) 812 return priv->mtr_color_reg; 813 else 814 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 815 REG_C_3; 816 case MLX5_MTR_COLOR: 817 case MLX5_ASO_FLOW_HIT: 818 case MLX5_ASO_CONNTRACK: 819 /* All features use the same REG_C. */ 820 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 821 return priv->mtr_color_reg; 822 case MLX5_COPY_MARK: 823 /* 824 * Metadata COPY_MARK register using is in meter suffix sub 825 * flow while with meter. It's safe to share the same register. 826 */ 827 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 828 case MLX5_APP_TAG: 829 /* 830 * If meter is enable, it will engage the register for color 831 * match and flow match. If meter color match is not using the 832 * REG_C_2, need to skip the REG_C_x be used by meter color 833 * match. 834 * If meter is disable, free to use all available registers. 835 */ 836 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 837 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 838 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 839 if (id > (uint32_t)(REG_C_7 - start_reg)) 840 return rte_flow_error_set(error, EINVAL, 841 RTE_FLOW_ERROR_TYPE_ITEM, 842 NULL, "invalid tag id"); 843 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 844 return rte_flow_error_set(error, ENOTSUP, 845 RTE_FLOW_ERROR_TYPE_ITEM, 846 NULL, "unsupported tag id"); 847 /* 848 * This case means meter is using the REG_C_x great than 2. 849 * Take care not to conflict with meter color REG_C_x. 850 * If the available index REG_C_y >= REG_C_x, skip the 851 * color register. 852 */ 853 if (skip_mtr_reg && config->flow_mreg_c 854 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 855 if (id >= (uint32_t)(REG_C_7 - start_reg)) 856 return rte_flow_error_set(error, EINVAL, 857 RTE_FLOW_ERROR_TYPE_ITEM, 858 NULL, "invalid tag id"); 859 if (config->flow_mreg_c 860 [id + 1 + start_reg - REG_C_0] != REG_NON) 861 return config->flow_mreg_c 862 [id + 1 + start_reg - REG_C_0]; 863 return rte_flow_error_set(error, ENOTSUP, 864 RTE_FLOW_ERROR_TYPE_ITEM, 865 NULL, "unsupported tag id"); 866 } 867 return config->flow_mreg_c[id + start_reg - REG_C_0]; 868 } 869 MLX5_ASSERT(false); 870 return rte_flow_error_set(error, EINVAL, 871 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 872 NULL, "invalid feature name"); 873 } 874 875 /** 876 * Check extensive flow metadata register support. 877 * 878 * @param dev 879 * Pointer to rte_eth_dev structure. 880 * 881 * @return 882 * True if device supports extensive flow metadata register, otherwise false. 883 */ 884 bool 885 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 886 { 887 struct mlx5_priv *priv = dev->data->dev_private; 888 struct mlx5_dev_config *config = &priv->config; 889 890 /* 891 * Having available reg_c can be regarded inclusively as supporting 892 * extensive flow metadata register, which could mean, 893 * - metadata register copy action by modify header. 894 * - 16 modify header actions is supported. 895 * - reg_c's are preserved across different domain (FDB and NIC) on 896 * packet loopback by flow lookup miss. 897 */ 898 return config->flow_mreg_c[2] != REG_NON; 899 } 900 901 /** 902 * Get the lowest priority. 903 * 904 * @param[in] dev 905 * Pointer to the Ethernet device structure. 906 * @param[in] attributes 907 * Pointer to device flow rule attributes. 908 * 909 * @return 910 * The value of lowest priority of flow. 911 */ 912 uint32_t 913 mlx5_get_lowest_priority(struct rte_eth_dev *dev, 914 const struct rte_flow_attr *attr) 915 { 916 struct mlx5_priv *priv = dev->data->dev_private; 917 918 if (!attr->group && !attr->transfer) 919 return priv->config.flow_prio - 2; 920 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1; 921 } 922 923 /** 924 * Calculate matcher priority of the flow. 925 * 926 * @param[in] dev 927 * Pointer to the Ethernet device structure. 928 * @param[in] attr 929 * Pointer to device flow rule attributes. 930 * @param[in] subpriority 931 * The priority based on the items. 932 * @return 933 * The matcher priority of the flow. 934 */ 935 uint16_t 936 mlx5_get_matcher_priority(struct rte_eth_dev *dev, 937 const struct rte_flow_attr *attr, 938 uint32_t subpriority) 939 { 940 uint16_t priority = (uint16_t)attr->priority; 941 struct mlx5_priv *priv = dev->data->dev_private; 942 943 if (!attr->group && !attr->transfer) { 944 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 945 priority = priv->config.flow_prio - 1; 946 return mlx5_os_flow_adjust_priority(dev, priority, subpriority); 947 } 948 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 949 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO; 950 return priority * 3 + subpriority; 951 } 952 953 /** 954 * Verify the @p item specifications (spec, last, mask) are compatible with the 955 * NIC capabilities. 956 * 957 * @param[in] item 958 * Item specification. 959 * @param[in] mask 960 * @p item->mask or flow default bit-masks. 961 * @param[in] nic_mask 962 * Bit-masks covering supported fields by the NIC to compare with user mask. 963 * @param[in] size 964 * Bit-masks size in bytes. 965 * @param[in] range_accepted 966 * True if range of values is accepted for specific fields, false otherwise. 967 * @param[out] error 968 * Pointer to error structure. 969 * 970 * @return 971 * 0 on success, a negative errno value otherwise and rte_errno is set. 972 */ 973 int 974 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 975 const uint8_t *mask, 976 const uint8_t *nic_mask, 977 unsigned int size, 978 bool range_accepted, 979 struct rte_flow_error *error) 980 { 981 unsigned int i; 982 983 MLX5_ASSERT(nic_mask); 984 for (i = 0; i < size; ++i) 985 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 986 return rte_flow_error_set(error, ENOTSUP, 987 RTE_FLOW_ERROR_TYPE_ITEM, 988 item, 989 "mask enables non supported" 990 " bits"); 991 if (!item->spec && (item->mask || item->last)) 992 return rte_flow_error_set(error, EINVAL, 993 RTE_FLOW_ERROR_TYPE_ITEM, item, 994 "mask/last without a spec is not" 995 " supported"); 996 if (item->spec && item->last && !range_accepted) { 997 uint8_t spec[size]; 998 uint8_t last[size]; 999 unsigned int i; 1000 int ret; 1001 1002 for (i = 0; i < size; ++i) { 1003 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 1004 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 1005 } 1006 ret = memcmp(spec, last, size); 1007 if (ret != 0) 1008 return rte_flow_error_set(error, EINVAL, 1009 RTE_FLOW_ERROR_TYPE_ITEM, 1010 item, 1011 "range is not valid"); 1012 } 1013 return 0; 1014 } 1015 1016 /** 1017 * Adjust the hash fields according to the @p flow information. 1018 * 1019 * @param[in] dev_flow. 1020 * Pointer to the mlx5_flow. 1021 * @param[in] tunnel 1022 * 1 when the hash field is for a tunnel item. 1023 * @param[in] layer_types 1024 * ETH_RSS_* types. 1025 * @param[in] hash_fields 1026 * Item hash fields. 1027 * 1028 * @return 1029 * The hash fields that should be used. 1030 */ 1031 uint64_t 1032 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 1033 int tunnel __rte_unused, uint64_t layer_types, 1034 uint64_t hash_fields) 1035 { 1036 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1037 int rss_request_inner = rss_desc->level >= 2; 1038 1039 /* Check RSS hash level for tunnel. */ 1040 if (tunnel && rss_request_inner) 1041 hash_fields |= IBV_RX_HASH_INNER; 1042 else if (tunnel || rss_request_inner) 1043 return 0; 1044 #endif 1045 /* Check if requested layer matches RSS hash fields. */ 1046 if (!(rss_desc->types & layer_types)) 1047 return 0; 1048 return hash_fields; 1049 } 1050 1051 /** 1052 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 1053 * if several tunnel rules are used on this queue, the tunnel ptype will be 1054 * cleared. 1055 * 1056 * @param rxq_ctrl 1057 * Rx queue to update. 1058 */ 1059 static void 1060 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1061 { 1062 unsigned int i; 1063 uint32_t tunnel_ptype = 0; 1064 1065 /* Look up for the ptype to use. */ 1066 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1067 if (!rxq_ctrl->flow_tunnels_n[i]) 1068 continue; 1069 if (!tunnel_ptype) { 1070 tunnel_ptype = tunnels_info[i].ptype; 1071 } else { 1072 tunnel_ptype = 0; 1073 break; 1074 } 1075 } 1076 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1077 } 1078 1079 /** 1080 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1081 * flow. 1082 * 1083 * @param[in] dev 1084 * Pointer to the Ethernet device structure. 1085 * @param[in] dev_handle 1086 * Pointer to device flow handle structure. 1087 */ 1088 void 1089 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1090 struct mlx5_flow_handle *dev_handle) 1091 { 1092 struct mlx5_priv *priv = dev->data->dev_private; 1093 const int mark = dev_handle->mark; 1094 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1095 struct mlx5_ind_table_obj *ind_tbl = NULL; 1096 unsigned int i; 1097 1098 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1099 struct mlx5_hrxq *hrxq; 1100 1101 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1102 dev_handle->rix_hrxq); 1103 if (hrxq) 1104 ind_tbl = hrxq->ind_table; 1105 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1106 struct mlx5_shared_action_rss *shared_rss; 1107 1108 shared_rss = mlx5_ipool_get 1109 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1110 dev_handle->rix_srss); 1111 if (shared_rss) 1112 ind_tbl = shared_rss->ind_tbl; 1113 } 1114 if (!ind_tbl) 1115 return; 1116 for (i = 0; i != ind_tbl->queues_n; ++i) { 1117 int idx = ind_tbl->queues[i]; 1118 struct mlx5_rxq_ctrl *rxq_ctrl = 1119 container_of((*priv->rxqs)[idx], 1120 struct mlx5_rxq_ctrl, rxq); 1121 1122 /* 1123 * To support metadata register copy on Tx loopback, 1124 * this must be always enabled (metadata may arive 1125 * from other port - not from local flows only. 1126 */ 1127 if (priv->config.dv_flow_en && 1128 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1129 mlx5_flow_ext_mreg_supported(dev)) { 1130 rxq_ctrl->rxq.mark = 1; 1131 rxq_ctrl->flow_mark_n = 1; 1132 } else if (mark) { 1133 rxq_ctrl->rxq.mark = 1; 1134 rxq_ctrl->flow_mark_n++; 1135 } 1136 if (tunnel) { 1137 unsigned int j; 1138 1139 /* Increase the counter matching the flow. */ 1140 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1141 if ((tunnels_info[j].tunnel & 1142 dev_handle->layers) == 1143 tunnels_info[j].tunnel) { 1144 rxq_ctrl->flow_tunnels_n[j]++; 1145 break; 1146 } 1147 } 1148 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1149 } 1150 } 1151 } 1152 1153 /** 1154 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1155 * 1156 * @param[in] dev 1157 * Pointer to the Ethernet device structure. 1158 * @param[in] flow 1159 * Pointer to flow structure. 1160 */ 1161 static void 1162 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1163 { 1164 struct mlx5_priv *priv = dev->data->dev_private; 1165 uint32_t handle_idx; 1166 struct mlx5_flow_handle *dev_handle; 1167 1168 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1169 handle_idx, dev_handle, next) 1170 flow_drv_rxq_flags_set(dev, dev_handle); 1171 } 1172 1173 /** 1174 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1175 * device flow if no other flow uses it with the same kind of request. 1176 * 1177 * @param dev 1178 * Pointer to Ethernet device. 1179 * @param[in] dev_handle 1180 * Pointer to the device flow handle structure. 1181 */ 1182 static void 1183 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1184 struct mlx5_flow_handle *dev_handle) 1185 { 1186 struct mlx5_priv *priv = dev->data->dev_private; 1187 const int mark = dev_handle->mark; 1188 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1189 struct mlx5_ind_table_obj *ind_tbl = NULL; 1190 unsigned int i; 1191 1192 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1193 struct mlx5_hrxq *hrxq; 1194 1195 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1196 dev_handle->rix_hrxq); 1197 if (hrxq) 1198 ind_tbl = hrxq->ind_table; 1199 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1200 struct mlx5_shared_action_rss *shared_rss; 1201 1202 shared_rss = mlx5_ipool_get 1203 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1204 dev_handle->rix_srss); 1205 if (shared_rss) 1206 ind_tbl = shared_rss->ind_tbl; 1207 } 1208 if (!ind_tbl) 1209 return; 1210 MLX5_ASSERT(dev->data->dev_started); 1211 for (i = 0; i != ind_tbl->queues_n; ++i) { 1212 int idx = ind_tbl->queues[i]; 1213 struct mlx5_rxq_ctrl *rxq_ctrl = 1214 container_of((*priv->rxqs)[idx], 1215 struct mlx5_rxq_ctrl, rxq); 1216 1217 if (priv->config.dv_flow_en && 1218 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1219 mlx5_flow_ext_mreg_supported(dev)) { 1220 rxq_ctrl->rxq.mark = 1; 1221 rxq_ctrl->flow_mark_n = 1; 1222 } else if (mark) { 1223 rxq_ctrl->flow_mark_n--; 1224 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1225 } 1226 if (tunnel) { 1227 unsigned int j; 1228 1229 /* Decrease the counter matching the flow. */ 1230 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1231 if ((tunnels_info[j].tunnel & 1232 dev_handle->layers) == 1233 tunnels_info[j].tunnel) { 1234 rxq_ctrl->flow_tunnels_n[j]--; 1235 break; 1236 } 1237 } 1238 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1239 } 1240 } 1241 } 1242 1243 /** 1244 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1245 * @p flow if no other flow uses it with the same kind of request. 1246 * 1247 * @param dev 1248 * Pointer to Ethernet device. 1249 * @param[in] flow 1250 * Pointer to the flow. 1251 */ 1252 static void 1253 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1254 { 1255 struct mlx5_priv *priv = dev->data->dev_private; 1256 uint32_t handle_idx; 1257 struct mlx5_flow_handle *dev_handle; 1258 1259 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1260 handle_idx, dev_handle, next) 1261 flow_drv_rxq_flags_trim(dev, dev_handle); 1262 } 1263 1264 /** 1265 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1266 * 1267 * @param dev 1268 * Pointer to Ethernet device. 1269 */ 1270 static void 1271 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1272 { 1273 struct mlx5_priv *priv = dev->data->dev_private; 1274 unsigned int i; 1275 1276 for (i = 0; i != priv->rxqs_n; ++i) { 1277 struct mlx5_rxq_ctrl *rxq_ctrl; 1278 unsigned int j; 1279 1280 if (!(*priv->rxqs)[i]) 1281 continue; 1282 rxq_ctrl = container_of((*priv->rxqs)[i], 1283 struct mlx5_rxq_ctrl, rxq); 1284 rxq_ctrl->flow_mark_n = 0; 1285 rxq_ctrl->rxq.mark = 0; 1286 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1287 rxq_ctrl->flow_tunnels_n[j] = 0; 1288 rxq_ctrl->rxq.tunnel = 0; 1289 } 1290 } 1291 1292 /** 1293 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1294 * 1295 * @param[in] dev 1296 * Pointer to the Ethernet device structure. 1297 */ 1298 void 1299 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1300 { 1301 struct mlx5_priv *priv = dev->data->dev_private; 1302 struct mlx5_rxq_data *data; 1303 unsigned int i; 1304 1305 for (i = 0; i != priv->rxqs_n; ++i) { 1306 if (!(*priv->rxqs)[i]) 1307 continue; 1308 data = (*priv->rxqs)[i]; 1309 if (!rte_flow_dynf_metadata_avail()) { 1310 data->dynf_meta = 0; 1311 data->flow_meta_mask = 0; 1312 data->flow_meta_offset = -1; 1313 data->flow_meta_port_mask = 0; 1314 } else { 1315 data->dynf_meta = 1; 1316 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1317 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1318 data->flow_meta_port_mask = (uint32_t)~0; 1319 if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16) 1320 data->flow_meta_port_mask >>= 16; 1321 } 1322 } 1323 } 1324 1325 /* 1326 * return a pointer to the desired action in the list of actions. 1327 * 1328 * @param[in] actions 1329 * The list of actions to search the action in. 1330 * @param[in] action 1331 * The action to find. 1332 * 1333 * @return 1334 * Pointer to the action in the list, if found. NULL otherwise. 1335 */ 1336 const struct rte_flow_action * 1337 mlx5_flow_find_action(const struct rte_flow_action *actions, 1338 enum rte_flow_action_type action) 1339 { 1340 if (actions == NULL) 1341 return NULL; 1342 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1343 if (actions->type == action) 1344 return actions; 1345 return NULL; 1346 } 1347 1348 /* 1349 * Validate the flag action. 1350 * 1351 * @param[in] action_flags 1352 * Bit-fields that holds the actions detected until now. 1353 * @param[in] attr 1354 * Attributes of flow that includes this action. 1355 * @param[out] error 1356 * Pointer to error structure. 1357 * 1358 * @return 1359 * 0 on success, a negative errno value otherwise and rte_errno is set. 1360 */ 1361 int 1362 mlx5_flow_validate_action_flag(uint64_t action_flags, 1363 const struct rte_flow_attr *attr, 1364 struct rte_flow_error *error) 1365 { 1366 if (action_flags & MLX5_FLOW_ACTION_MARK) 1367 return rte_flow_error_set(error, EINVAL, 1368 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1369 "can't mark and flag in same flow"); 1370 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1371 return rte_flow_error_set(error, EINVAL, 1372 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1373 "can't have 2 flag" 1374 " actions in same flow"); 1375 if (attr->egress) 1376 return rte_flow_error_set(error, ENOTSUP, 1377 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1378 "flag action not supported for " 1379 "egress"); 1380 return 0; 1381 } 1382 1383 /* 1384 * Validate the mark action. 1385 * 1386 * @param[in] action 1387 * Pointer to the queue action. 1388 * @param[in] action_flags 1389 * Bit-fields that holds the actions detected until now. 1390 * @param[in] attr 1391 * Attributes of flow that includes this action. 1392 * @param[out] error 1393 * Pointer to error structure. 1394 * 1395 * @return 1396 * 0 on success, a negative errno value otherwise and rte_errno is set. 1397 */ 1398 int 1399 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1400 uint64_t action_flags, 1401 const struct rte_flow_attr *attr, 1402 struct rte_flow_error *error) 1403 { 1404 const struct rte_flow_action_mark *mark = action->conf; 1405 1406 if (!mark) 1407 return rte_flow_error_set(error, EINVAL, 1408 RTE_FLOW_ERROR_TYPE_ACTION, 1409 action, 1410 "configuration cannot be null"); 1411 if (mark->id >= MLX5_FLOW_MARK_MAX) 1412 return rte_flow_error_set(error, EINVAL, 1413 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1414 &mark->id, 1415 "mark id must in 0 <= id < " 1416 RTE_STR(MLX5_FLOW_MARK_MAX)); 1417 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1418 return rte_flow_error_set(error, EINVAL, 1419 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1420 "can't flag and mark in same flow"); 1421 if (action_flags & MLX5_FLOW_ACTION_MARK) 1422 return rte_flow_error_set(error, EINVAL, 1423 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1424 "can't have 2 mark actions in same" 1425 " flow"); 1426 if (attr->egress) 1427 return rte_flow_error_set(error, ENOTSUP, 1428 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1429 "mark action not supported for " 1430 "egress"); 1431 return 0; 1432 } 1433 1434 /* 1435 * Validate the drop action. 1436 * 1437 * @param[in] action_flags 1438 * Bit-fields that holds the actions detected until now. 1439 * @param[in] attr 1440 * Attributes of flow that includes this action. 1441 * @param[out] error 1442 * Pointer to error structure. 1443 * 1444 * @return 1445 * 0 on success, a negative errno value otherwise and rte_errno is set. 1446 */ 1447 int 1448 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1449 const struct rte_flow_attr *attr, 1450 struct rte_flow_error *error) 1451 { 1452 if (attr->egress) 1453 return rte_flow_error_set(error, ENOTSUP, 1454 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1455 "drop action not supported for " 1456 "egress"); 1457 return 0; 1458 } 1459 1460 /* 1461 * Validate the queue action. 1462 * 1463 * @param[in] action 1464 * Pointer to the queue action. 1465 * @param[in] action_flags 1466 * Bit-fields that holds the actions detected until now. 1467 * @param[in] dev 1468 * Pointer to the Ethernet device structure. 1469 * @param[in] attr 1470 * Attributes of flow that includes this action. 1471 * @param[out] error 1472 * Pointer to error structure. 1473 * 1474 * @return 1475 * 0 on success, a negative errno value otherwise and rte_errno is set. 1476 */ 1477 int 1478 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1479 uint64_t action_flags, 1480 struct rte_eth_dev *dev, 1481 const struct rte_flow_attr *attr, 1482 struct rte_flow_error *error) 1483 { 1484 struct mlx5_priv *priv = dev->data->dev_private; 1485 const struct rte_flow_action_queue *queue = action->conf; 1486 1487 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1488 return rte_flow_error_set(error, EINVAL, 1489 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1490 "can't have 2 fate actions in" 1491 " same flow"); 1492 if (!priv->rxqs_n) 1493 return rte_flow_error_set(error, EINVAL, 1494 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1495 NULL, "No Rx queues configured"); 1496 if (queue->index >= priv->rxqs_n) 1497 return rte_flow_error_set(error, EINVAL, 1498 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1499 &queue->index, 1500 "queue index out of range"); 1501 if (!(*priv->rxqs)[queue->index]) 1502 return rte_flow_error_set(error, EINVAL, 1503 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1504 &queue->index, 1505 "queue is not configured"); 1506 if (attr->egress) 1507 return rte_flow_error_set(error, ENOTSUP, 1508 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1509 "queue action not supported for " 1510 "egress"); 1511 return 0; 1512 } 1513 1514 /* 1515 * Validate the rss action. 1516 * 1517 * @param[in] dev 1518 * Pointer to the Ethernet device structure. 1519 * @param[in] action 1520 * Pointer to the queue action. 1521 * @param[out] error 1522 * Pointer to error structure. 1523 * 1524 * @return 1525 * 0 on success, a negative errno value otherwise and rte_errno is set. 1526 */ 1527 int 1528 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1529 const struct rte_flow_action *action, 1530 struct rte_flow_error *error) 1531 { 1532 struct mlx5_priv *priv = dev->data->dev_private; 1533 const struct rte_flow_action_rss *rss = action->conf; 1534 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; 1535 unsigned int i; 1536 1537 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1538 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1539 return rte_flow_error_set(error, ENOTSUP, 1540 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1541 &rss->func, 1542 "RSS hash function not supported"); 1543 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1544 if (rss->level > 2) 1545 #else 1546 if (rss->level > 1) 1547 #endif 1548 return rte_flow_error_set(error, ENOTSUP, 1549 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1550 &rss->level, 1551 "tunnel RSS is not supported"); 1552 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1553 if (rss->key_len == 0 && rss->key != NULL) 1554 return rte_flow_error_set(error, ENOTSUP, 1555 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1556 &rss->key_len, 1557 "RSS hash key length 0"); 1558 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1559 return rte_flow_error_set(error, ENOTSUP, 1560 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1561 &rss->key_len, 1562 "RSS hash key too small"); 1563 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1564 return rte_flow_error_set(error, ENOTSUP, 1565 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1566 &rss->key_len, 1567 "RSS hash key too large"); 1568 if (rss->queue_num > priv->config.ind_table_max_size) 1569 return rte_flow_error_set(error, ENOTSUP, 1570 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1571 &rss->queue_num, 1572 "number of queues too large"); 1573 if (rss->types & MLX5_RSS_HF_MASK) 1574 return rte_flow_error_set(error, ENOTSUP, 1575 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1576 &rss->types, 1577 "some RSS protocols are not" 1578 " supported"); 1579 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) && 1580 !(rss->types & ETH_RSS_IP)) 1581 return rte_flow_error_set(error, EINVAL, 1582 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1583 "L3 partial RSS requested but L3 RSS" 1584 " type not specified"); 1585 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) && 1586 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP))) 1587 return rte_flow_error_set(error, EINVAL, 1588 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1589 "L4 partial RSS requested but L4 RSS" 1590 " type not specified"); 1591 if (!priv->rxqs_n) 1592 return rte_flow_error_set(error, EINVAL, 1593 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1594 NULL, "No Rx queues configured"); 1595 if (!rss->queue_num) 1596 return rte_flow_error_set(error, EINVAL, 1597 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1598 NULL, "No queues configured"); 1599 for (i = 0; i != rss->queue_num; ++i) { 1600 struct mlx5_rxq_ctrl *rxq_ctrl; 1601 1602 if (rss->queue[i] >= priv->rxqs_n) 1603 return rte_flow_error_set 1604 (error, EINVAL, 1605 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1606 &rss->queue[i], "queue index out of range"); 1607 if (!(*priv->rxqs)[rss->queue[i]]) 1608 return rte_flow_error_set 1609 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1610 &rss->queue[i], "queue is not configured"); 1611 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]], 1612 struct mlx5_rxq_ctrl, rxq); 1613 if (i == 0) 1614 rxq_type = rxq_ctrl->type; 1615 if (rxq_type != rxq_ctrl->type) 1616 return rte_flow_error_set 1617 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1618 &rss->queue[i], 1619 "combining hairpin and regular RSS queues is not supported"); 1620 } 1621 return 0; 1622 } 1623 1624 /* 1625 * Validate the rss action. 1626 * 1627 * @param[in] action 1628 * Pointer to the queue action. 1629 * @param[in] action_flags 1630 * Bit-fields that holds the actions detected until now. 1631 * @param[in] dev 1632 * Pointer to the Ethernet device structure. 1633 * @param[in] attr 1634 * Attributes of flow that includes this action. 1635 * @param[in] item_flags 1636 * Items that were detected. 1637 * @param[out] error 1638 * Pointer to error structure. 1639 * 1640 * @return 1641 * 0 on success, a negative errno value otherwise and rte_errno is set. 1642 */ 1643 int 1644 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1645 uint64_t action_flags, 1646 struct rte_eth_dev *dev, 1647 const struct rte_flow_attr *attr, 1648 uint64_t item_flags, 1649 struct rte_flow_error *error) 1650 { 1651 const struct rte_flow_action_rss *rss = action->conf; 1652 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1653 int ret; 1654 1655 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1656 return rte_flow_error_set(error, EINVAL, 1657 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1658 "can't have 2 fate actions" 1659 " in same flow"); 1660 ret = mlx5_validate_action_rss(dev, action, error); 1661 if (ret) 1662 return ret; 1663 if (attr->egress) 1664 return rte_flow_error_set(error, ENOTSUP, 1665 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1666 "rss action not supported for " 1667 "egress"); 1668 if (rss->level > 1 && !tunnel) 1669 return rte_flow_error_set(error, EINVAL, 1670 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1671 "inner RSS is not supported for " 1672 "non-tunnel flows"); 1673 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1674 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1675 return rte_flow_error_set(error, EINVAL, 1676 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1677 "RSS on eCPRI is not supported now"); 1678 } 1679 if ((item_flags & MLX5_FLOW_LAYER_MPLS) && 1680 !(item_flags & 1681 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) && 1682 rss->level > 1) 1683 return rte_flow_error_set(error, EINVAL, 1684 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1685 "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern"); 1686 return 0; 1687 } 1688 1689 /* 1690 * Validate the default miss action. 1691 * 1692 * @param[in] action_flags 1693 * Bit-fields that holds the actions detected until now. 1694 * @param[out] error 1695 * Pointer to error structure. 1696 * 1697 * @return 1698 * 0 on success, a negative errno value otherwise and rte_errno is set. 1699 */ 1700 int 1701 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1702 const struct rte_flow_attr *attr, 1703 struct rte_flow_error *error) 1704 { 1705 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1706 return rte_flow_error_set(error, EINVAL, 1707 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1708 "can't have 2 fate actions in" 1709 " same flow"); 1710 if (attr->egress) 1711 return rte_flow_error_set(error, ENOTSUP, 1712 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1713 "default miss action not supported " 1714 "for egress"); 1715 if (attr->group) 1716 return rte_flow_error_set(error, ENOTSUP, 1717 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1718 "only group 0 is supported"); 1719 if (attr->transfer) 1720 return rte_flow_error_set(error, ENOTSUP, 1721 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1722 NULL, "transfer is not supported"); 1723 return 0; 1724 } 1725 1726 /* 1727 * Validate the count action. 1728 * 1729 * @param[in] dev 1730 * Pointer to the Ethernet device structure. 1731 * @param[in] attr 1732 * Attributes of flow that includes this action. 1733 * @param[out] error 1734 * Pointer to error structure. 1735 * 1736 * @return 1737 * 0 on success, a negative errno value otherwise and rte_errno is set. 1738 */ 1739 int 1740 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1741 const struct rte_flow_attr *attr, 1742 struct rte_flow_error *error) 1743 { 1744 if (attr->egress) 1745 return rte_flow_error_set(error, ENOTSUP, 1746 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1747 "count action not supported for " 1748 "egress"); 1749 return 0; 1750 } 1751 1752 /* 1753 * Validate the ASO CT action. 1754 * 1755 * @param[in] dev 1756 * Pointer to the Ethernet device structure. 1757 * @param[in] conntrack 1758 * Pointer to the CT action profile. 1759 * @param[out] error 1760 * Pointer to error structure. 1761 * 1762 * @return 1763 * 0 on success, a negative errno value otherwise and rte_errno is set. 1764 */ 1765 int 1766 mlx5_validate_action_ct(struct rte_eth_dev *dev, 1767 const struct rte_flow_action_conntrack *conntrack, 1768 struct rte_flow_error *error) 1769 { 1770 RTE_SET_USED(dev); 1771 1772 if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT) 1773 return rte_flow_error_set(error, EINVAL, 1774 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1775 "Invalid CT state"); 1776 if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST) 1777 return rte_flow_error_set(error, EINVAL, 1778 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1779 "Invalid last TCP packet flag"); 1780 return 0; 1781 } 1782 1783 /** 1784 * Verify the @p attributes will be correctly understood by the NIC and store 1785 * them in the @p flow if everything is correct. 1786 * 1787 * @param[in] dev 1788 * Pointer to the Ethernet device structure. 1789 * @param[in] attributes 1790 * Pointer to flow attributes 1791 * @param[out] error 1792 * Pointer to error structure. 1793 * 1794 * @return 1795 * 0 on success, a negative errno value otherwise and rte_errno is set. 1796 */ 1797 int 1798 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1799 const struct rte_flow_attr *attributes, 1800 struct rte_flow_error *error) 1801 { 1802 struct mlx5_priv *priv = dev->data->dev_private; 1803 uint32_t priority_max = priv->config.flow_prio - 1; 1804 1805 if (attributes->group) 1806 return rte_flow_error_set(error, ENOTSUP, 1807 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1808 NULL, "groups is not supported"); 1809 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR && 1810 attributes->priority >= priority_max) 1811 return rte_flow_error_set(error, ENOTSUP, 1812 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1813 NULL, "priority out of range"); 1814 if (attributes->egress) 1815 return rte_flow_error_set(error, ENOTSUP, 1816 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1817 "egress is not supported"); 1818 if (attributes->transfer && !priv->config.dv_esw_en) 1819 return rte_flow_error_set(error, ENOTSUP, 1820 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1821 NULL, "transfer is not supported"); 1822 if (!attributes->ingress) 1823 return rte_flow_error_set(error, EINVAL, 1824 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1825 NULL, 1826 "ingress attribute is mandatory"); 1827 return 0; 1828 } 1829 1830 /** 1831 * Validate ICMP6 item. 1832 * 1833 * @param[in] item 1834 * Item specification. 1835 * @param[in] item_flags 1836 * Bit-fields that holds the items detected until now. 1837 * @param[in] ext_vlan_sup 1838 * Whether extended VLAN features are supported or not. 1839 * @param[out] error 1840 * Pointer to error structure. 1841 * 1842 * @return 1843 * 0 on success, a negative errno value otherwise and rte_errno is set. 1844 */ 1845 int 1846 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1847 uint64_t item_flags, 1848 uint8_t target_protocol, 1849 struct rte_flow_error *error) 1850 { 1851 const struct rte_flow_item_icmp6 *mask = item->mask; 1852 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1853 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1854 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1855 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1856 MLX5_FLOW_LAYER_OUTER_L4; 1857 int ret; 1858 1859 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1860 return rte_flow_error_set(error, EINVAL, 1861 RTE_FLOW_ERROR_TYPE_ITEM, item, 1862 "protocol filtering not compatible" 1863 " with ICMP6 layer"); 1864 if (!(item_flags & l3m)) 1865 return rte_flow_error_set(error, EINVAL, 1866 RTE_FLOW_ERROR_TYPE_ITEM, item, 1867 "IPv6 is mandatory to filter on" 1868 " ICMP6"); 1869 if (item_flags & l4m) 1870 return rte_flow_error_set(error, EINVAL, 1871 RTE_FLOW_ERROR_TYPE_ITEM, item, 1872 "multiple L4 layers not supported"); 1873 if (!mask) 1874 mask = &rte_flow_item_icmp6_mask; 1875 ret = mlx5_flow_item_acceptable 1876 (item, (const uint8_t *)mask, 1877 (const uint8_t *)&rte_flow_item_icmp6_mask, 1878 sizeof(struct rte_flow_item_icmp6), 1879 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1880 if (ret < 0) 1881 return ret; 1882 return 0; 1883 } 1884 1885 /** 1886 * Validate ICMP item. 1887 * 1888 * @param[in] item 1889 * Item specification. 1890 * @param[in] item_flags 1891 * Bit-fields that holds the items detected until now. 1892 * @param[out] error 1893 * Pointer to error structure. 1894 * 1895 * @return 1896 * 0 on success, a negative errno value otherwise and rte_errno is set. 1897 */ 1898 int 1899 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1900 uint64_t item_flags, 1901 uint8_t target_protocol, 1902 struct rte_flow_error *error) 1903 { 1904 const struct rte_flow_item_icmp *mask = item->mask; 1905 const struct rte_flow_item_icmp nic_mask = { 1906 .hdr.icmp_type = 0xff, 1907 .hdr.icmp_code = 0xff, 1908 .hdr.icmp_ident = RTE_BE16(0xffff), 1909 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 1910 }; 1911 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1912 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1913 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1914 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1915 MLX5_FLOW_LAYER_OUTER_L4; 1916 int ret; 1917 1918 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1919 return rte_flow_error_set(error, EINVAL, 1920 RTE_FLOW_ERROR_TYPE_ITEM, item, 1921 "protocol filtering not compatible" 1922 " with ICMP layer"); 1923 if (!(item_flags & l3m)) 1924 return rte_flow_error_set(error, EINVAL, 1925 RTE_FLOW_ERROR_TYPE_ITEM, item, 1926 "IPv4 is mandatory to filter" 1927 " on ICMP"); 1928 if (item_flags & l4m) 1929 return rte_flow_error_set(error, EINVAL, 1930 RTE_FLOW_ERROR_TYPE_ITEM, item, 1931 "multiple L4 layers not supported"); 1932 if (!mask) 1933 mask = &nic_mask; 1934 ret = mlx5_flow_item_acceptable 1935 (item, (const uint8_t *)mask, 1936 (const uint8_t *)&nic_mask, 1937 sizeof(struct rte_flow_item_icmp), 1938 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1939 if (ret < 0) 1940 return ret; 1941 return 0; 1942 } 1943 1944 /** 1945 * Validate Ethernet item. 1946 * 1947 * @param[in] item 1948 * Item specification. 1949 * @param[in] item_flags 1950 * Bit-fields that holds the items detected until now. 1951 * @param[out] error 1952 * Pointer to error structure. 1953 * 1954 * @return 1955 * 0 on success, a negative errno value otherwise and rte_errno is set. 1956 */ 1957 int 1958 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1959 uint64_t item_flags, bool ext_vlan_sup, 1960 struct rte_flow_error *error) 1961 { 1962 const struct rte_flow_item_eth *mask = item->mask; 1963 const struct rte_flow_item_eth nic_mask = { 1964 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1965 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1966 .type = RTE_BE16(0xffff), 1967 .has_vlan = ext_vlan_sup ? 1 : 0, 1968 }; 1969 int ret; 1970 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1971 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1972 MLX5_FLOW_LAYER_OUTER_L2; 1973 1974 if (item_flags & ethm) 1975 return rte_flow_error_set(error, ENOTSUP, 1976 RTE_FLOW_ERROR_TYPE_ITEM, item, 1977 "multiple L2 layers not supported"); 1978 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 1979 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 1980 return rte_flow_error_set(error, EINVAL, 1981 RTE_FLOW_ERROR_TYPE_ITEM, item, 1982 "L2 layer should not follow " 1983 "L3 layers"); 1984 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 1985 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 1986 return rte_flow_error_set(error, EINVAL, 1987 RTE_FLOW_ERROR_TYPE_ITEM, item, 1988 "L2 layer should not follow VLAN"); 1989 if (!mask) 1990 mask = &rte_flow_item_eth_mask; 1991 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1992 (const uint8_t *)&nic_mask, 1993 sizeof(struct rte_flow_item_eth), 1994 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1995 return ret; 1996 } 1997 1998 /** 1999 * Validate VLAN item. 2000 * 2001 * @param[in] item 2002 * Item specification. 2003 * @param[in] item_flags 2004 * Bit-fields that holds the items detected until now. 2005 * @param[in] dev 2006 * Ethernet device flow is being created on. 2007 * @param[out] error 2008 * Pointer to error structure. 2009 * 2010 * @return 2011 * 0 on success, a negative errno value otherwise and rte_errno is set. 2012 */ 2013 int 2014 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 2015 uint64_t item_flags, 2016 struct rte_eth_dev *dev, 2017 struct rte_flow_error *error) 2018 { 2019 const struct rte_flow_item_vlan *spec = item->spec; 2020 const struct rte_flow_item_vlan *mask = item->mask; 2021 const struct rte_flow_item_vlan nic_mask = { 2022 .tci = RTE_BE16(UINT16_MAX), 2023 .inner_type = RTE_BE16(UINT16_MAX), 2024 }; 2025 uint16_t vlan_tag = 0; 2026 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2027 int ret; 2028 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 2029 MLX5_FLOW_LAYER_INNER_L4) : 2030 (MLX5_FLOW_LAYER_OUTER_L3 | 2031 MLX5_FLOW_LAYER_OUTER_L4); 2032 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 2033 MLX5_FLOW_LAYER_OUTER_VLAN; 2034 2035 if (item_flags & vlanm) 2036 return rte_flow_error_set(error, EINVAL, 2037 RTE_FLOW_ERROR_TYPE_ITEM, item, 2038 "multiple VLAN layers not supported"); 2039 else if ((item_flags & l34m) != 0) 2040 return rte_flow_error_set(error, EINVAL, 2041 RTE_FLOW_ERROR_TYPE_ITEM, item, 2042 "VLAN cannot follow L3/L4 layer"); 2043 if (!mask) 2044 mask = &rte_flow_item_vlan_mask; 2045 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2046 (const uint8_t *)&nic_mask, 2047 sizeof(struct rte_flow_item_vlan), 2048 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2049 if (ret) 2050 return ret; 2051 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 2052 struct mlx5_priv *priv = dev->data->dev_private; 2053 2054 if (priv->vmwa_context) { 2055 /* 2056 * Non-NULL context means we have a virtual machine 2057 * and SR-IOV enabled, we have to create VLAN interface 2058 * to make hypervisor to setup E-Switch vport 2059 * context correctly. We avoid creating the multiple 2060 * VLAN interfaces, so we cannot support VLAN tag mask. 2061 */ 2062 return rte_flow_error_set(error, EINVAL, 2063 RTE_FLOW_ERROR_TYPE_ITEM, 2064 item, 2065 "VLAN tag mask is not" 2066 " supported in virtual" 2067 " environment"); 2068 } 2069 } 2070 if (spec) { 2071 vlan_tag = spec->tci; 2072 vlan_tag &= mask->tci; 2073 } 2074 /* 2075 * From verbs perspective an empty VLAN is equivalent 2076 * to a packet without VLAN layer. 2077 */ 2078 if (!vlan_tag) 2079 return rte_flow_error_set(error, EINVAL, 2080 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 2081 item->spec, 2082 "VLAN cannot be empty"); 2083 return 0; 2084 } 2085 2086 /** 2087 * Validate IPV4 item. 2088 * 2089 * @param[in] item 2090 * Item specification. 2091 * @param[in] item_flags 2092 * Bit-fields that holds the items detected until now. 2093 * @param[in] last_item 2094 * Previous validated item in the pattern items. 2095 * @param[in] ether_type 2096 * Type in the ethernet layer header (including dot1q). 2097 * @param[in] acc_mask 2098 * Acceptable mask, if NULL default internal default mask 2099 * will be used to check whether item fields are supported. 2100 * @param[in] range_accepted 2101 * True if range of values is accepted for specific fields, false otherwise. 2102 * @param[out] error 2103 * Pointer to error structure. 2104 * 2105 * @return 2106 * 0 on success, a negative errno value otherwise and rte_errno is set. 2107 */ 2108 int 2109 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2110 uint64_t item_flags, 2111 uint64_t last_item, 2112 uint16_t ether_type, 2113 const struct rte_flow_item_ipv4 *acc_mask, 2114 bool range_accepted, 2115 struct rte_flow_error *error) 2116 { 2117 const struct rte_flow_item_ipv4 *mask = item->mask; 2118 const struct rte_flow_item_ipv4 *spec = item->spec; 2119 const struct rte_flow_item_ipv4 nic_mask = { 2120 .hdr = { 2121 .src_addr = RTE_BE32(0xffffffff), 2122 .dst_addr = RTE_BE32(0xffffffff), 2123 .type_of_service = 0xff, 2124 .next_proto_id = 0xff, 2125 }, 2126 }; 2127 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2128 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2129 MLX5_FLOW_LAYER_OUTER_L3; 2130 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2131 MLX5_FLOW_LAYER_OUTER_L4; 2132 int ret; 2133 uint8_t next_proto = 0xFF; 2134 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2135 MLX5_FLOW_LAYER_OUTER_VLAN | 2136 MLX5_FLOW_LAYER_INNER_VLAN); 2137 2138 if ((last_item & l2_vlan) && ether_type && 2139 ether_type != RTE_ETHER_TYPE_IPV4) 2140 return rte_flow_error_set(error, EINVAL, 2141 RTE_FLOW_ERROR_TYPE_ITEM, item, 2142 "IPv4 cannot follow L2/VLAN layer " 2143 "which ether type is not IPv4"); 2144 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2145 if (mask && spec) 2146 next_proto = mask->hdr.next_proto_id & 2147 spec->hdr.next_proto_id; 2148 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2149 return rte_flow_error_set(error, EINVAL, 2150 RTE_FLOW_ERROR_TYPE_ITEM, 2151 item, 2152 "multiple tunnel " 2153 "not supported"); 2154 } 2155 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2156 return rte_flow_error_set(error, EINVAL, 2157 RTE_FLOW_ERROR_TYPE_ITEM, item, 2158 "wrong tunnel type - IPv6 specified " 2159 "but IPv4 item provided"); 2160 if (item_flags & l3m) 2161 return rte_flow_error_set(error, ENOTSUP, 2162 RTE_FLOW_ERROR_TYPE_ITEM, item, 2163 "multiple L3 layers not supported"); 2164 else if (item_flags & l4m) 2165 return rte_flow_error_set(error, EINVAL, 2166 RTE_FLOW_ERROR_TYPE_ITEM, item, 2167 "L3 cannot follow an L4 layer."); 2168 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2169 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2170 return rte_flow_error_set(error, EINVAL, 2171 RTE_FLOW_ERROR_TYPE_ITEM, item, 2172 "L3 cannot follow an NVGRE layer."); 2173 if (!mask) 2174 mask = &rte_flow_item_ipv4_mask; 2175 else if (mask->hdr.next_proto_id != 0 && 2176 mask->hdr.next_proto_id != 0xff) 2177 return rte_flow_error_set(error, EINVAL, 2178 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2179 "partial mask is not supported" 2180 " for protocol"); 2181 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2182 acc_mask ? (const uint8_t *)acc_mask 2183 : (const uint8_t *)&nic_mask, 2184 sizeof(struct rte_flow_item_ipv4), 2185 range_accepted, error); 2186 if (ret < 0) 2187 return ret; 2188 return 0; 2189 } 2190 2191 /** 2192 * Validate IPV6 item. 2193 * 2194 * @param[in] item 2195 * Item specification. 2196 * @param[in] item_flags 2197 * Bit-fields that holds the items detected until now. 2198 * @param[in] last_item 2199 * Previous validated item in the pattern items. 2200 * @param[in] ether_type 2201 * Type in the ethernet layer header (including dot1q). 2202 * @param[in] acc_mask 2203 * Acceptable mask, if NULL default internal default mask 2204 * will be used to check whether item fields are supported. 2205 * @param[out] error 2206 * Pointer to error structure. 2207 * 2208 * @return 2209 * 0 on success, a negative errno value otherwise and rte_errno is set. 2210 */ 2211 int 2212 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2213 uint64_t item_flags, 2214 uint64_t last_item, 2215 uint16_t ether_type, 2216 const struct rte_flow_item_ipv6 *acc_mask, 2217 struct rte_flow_error *error) 2218 { 2219 const struct rte_flow_item_ipv6 *mask = item->mask; 2220 const struct rte_flow_item_ipv6 *spec = item->spec; 2221 const struct rte_flow_item_ipv6 nic_mask = { 2222 .hdr = { 2223 .src_addr = 2224 "\xff\xff\xff\xff\xff\xff\xff\xff" 2225 "\xff\xff\xff\xff\xff\xff\xff\xff", 2226 .dst_addr = 2227 "\xff\xff\xff\xff\xff\xff\xff\xff" 2228 "\xff\xff\xff\xff\xff\xff\xff\xff", 2229 .vtc_flow = RTE_BE32(0xffffffff), 2230 .proto = 0xff, 2231 }, 2232 }; 2233 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2234 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2235 MLX5_FLOW_LAYER_OUTER_L3; 2236 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2237 MLX5_FLOW_LAYER_OUTER_L4; 2238 int ret; 2239 uint8_t next_proto = 0xFF; 2240 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2241 MLX5_FLOW_LAYER_OUTER_VLAN | 2242 MLX5_FLOW_LAYER_INNER_VLAN); 2243 2244 if ((last_item & l2_vlan) && ether_type && 2245 ether_type != RTE_ETHER_TYPE_IPV6) 2246 return rte_flow_error_set(error, EINVAL, 2247 RTE_FLOW_ERROR_TYPE_ITEM, item, 2248 "IPv6 cannot follow L2/VLAN layer " 2249 "which ether type is not IPv6"); 2250 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2251 next_proto = spec->hdr.proto; 2252 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2253 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2254 return rte_flow_error_set(error, EINVAL, 2255 RTE_FLOW_ERROR_TYPE_ITEM, 2256 item, 2257 "multiple tunnel " 2258 "not supported"); 2259 } 2260 if (next_proto == IPPROTO_HOPOPTS || 2261 next_proto == IPPROTO_ROUTING || 2262 next_proto == IPPROTO_FRAGMENT || 2263 next_proto == IPPROTO_ESP || 2264 next_proto == IPPROTO_AH || 2265 next_proto == IPPROTO_DSTOPTS) 2266 return rte_flow_error_set(error, EINVAL, 2267 RTE_FLOW_ERROR_TYPE_ITEM, item, 2268 "IPv6 proto (next header) should " 2269 "not be set as extension header"); 2270 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2271 return rte_flow_error_set(error, EINVAL, 2272 RTE_FLOW_ERROR_TYPE_ITEM, item, 2273 "wrong tunnel type - IPv4 specified " 2274 "but IPv6 item provided"); 2275 if (item_flags & l3m) 2276 return rte_flow_error_set(error, ENOTSUP, 2277 RTE_FLOW_ERROR_TYPE_ITEM, item, 2278 "multiple L3 layers not supported"); 2279 else if (item_flags & l4m) 2280 return rte_flow_error_set(error, EINVAL, 2281 RTE_FLOW_ERROR_TYPE_ITEM, item, 2282 "L3 cannot follow an L4 layer."); 2283 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2284 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2285 return rte_flow_error_set(error, EINVAL, 2286 RTE_FLOW_ERROR_TYPE_ITEM, item, 2287 "L3 cannot follow an NVGRE layer."); 2288 if (!mask) 2289 mask = &rte_flow_item_ipv6_mask; 2290 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2291 acc_mask ? (const uint8_t *)acc_mask 2292 : (const uint8_t *)&nic_mask, 2293 sizeof(struct rte_flow_item_ipv6), 2294 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2295 if (ret < 0) 2296 return ret; 2297 return 0; 2298 } 2299 2300 /** 2301 * Validate UDP item. 2302 * 2303 * @param[in] item 2304 * Item specification. 2305 * @param[in] item_flags 2306 * Bit-fields that holds the items detected until now. 2307 * @param[in] target_protocol 2308 * The next protocol in the previous item. 2309 * @param[in] flow_mask 2310 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2311 * @param[out] error 2312 * Pointer to error structure. 2313 * 2314 * @return 2315 * 0 on success, a negative errno value otherwise and rte_errno is set. 2316 */ 2317 int 2318 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2319 uint64_t item_flags, 2320 uint8_t target_protocol, 2321 struct rte_flow_error *error) 2322 { 2323 const struct rte_flow_item_udp *mask = item->mask; 2324 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2325 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2326 MLX5_FLOW_LAYER_OUTER_L3; 2327 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2328 MLX5_FLOW_LAYER_OUTER_L4; 2329 int ret; 2330 2331 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2332 return rte_flow_error_set(error, EINVAL, 2333 RTE_FLOW_ERROR_TYPE_ITEM, item, 2334 "protocol filtering not compatible" 2335 " with UDP layer"); 2336 if (!(item_flags & l3m)) 2337 return rte_flow_error_set(error, EINVAL, 2338 RTE_FLOW_ERROR_TYPE_ITEM, item, 2339 "L3 is mandatory to filter on L4"); 2340 if (item_flags & l4m) 2341 return rte_flow_error_set(error, EINVAL, 2342 RTE_FLOW_ERROR_TYPE_ITEM, item, 2343 "multiple L4 layers not supported"); 2344 if (!mask) 2345 mask = &rte_flow_item_udp_mask; 2346 ret = mlx5_flow_item_acceptable 2347 (item, (const uint8_t *)mask, 2348 (const uint8_t *)&rte_flow_item_udp_mask, 2349 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2350 error); 2351 if (ret < 0) 2352 return ret; 2353 return 0; 2354 } 2355 2356 /** 2357 * Validate TCP item. 2358 * 2359 * @param[in] item 2360 * Item specification. 2361 * @param[in] item_flags 2362 * Bit-fields that holds the items detected until now. 2363 * @param[in] target_protocol 2364 * The next protocol in the previous item. 2365 * @param[out] error 2366 * Pointer to error structure. 2367 * 2368 * @return 2369 * 0 on success, a negative errno value otherwise and rte_errno is set. 2370 */ 2371 int 2372 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2373 uint64_t item_flags, 2374 uint8_t target_protocol, 2375 const struct rte_flow_item_tcp *flow_mask, 2376 struct rte_flow_error *error) 2377 { 2378 const struct rte_flow_item_tcp *mask = item->mask; 2379 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2380 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2381 MLX5_FLOW_LAYER_OUTER_L3; 2382 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2383 MLX5_FLOW_LAYER_OUTER_L4; 2384 int ret; 2385 2386 MLX5_ASSERT(flow_mask); 2387 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2388 return rte_flow_error_set(error, EINVAL, 2389 RTE_FLOW_ERROR_TYPE_ITEM, item, 2390 "protocol filtering not compatible" 2391 " with TCP layer"); 2392 if (!(item_flags & l3m)) 2393 return rte_flow_error_set(error, EINVAL, 2394 RTE_FLOW_ERROR_TYPE_ITEM, item, 2395 "L3 is mandatory to filter on L4"); 2396 if (item_flags & l4m) 2397 return rte_flow_error_set(error, EINVAL, 2398 RTE_FLOW_ERROR_TYPE_ITEM, item, 2399 "multiple L4 layers not supported"); 2400 if (!mask) 2401 mask = &rte_flow_item_tcp_mask; 2402 ret = mlx5_flow_item_acceptable 2403 (item, (const uint8_t *)mask, 2404 (const uint8_t *)flow_mask, 2405 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2406 error); 2407 if (ret < 0) 2408 return ret; 2409 return 0; 2410 } 2411 2412 /** 2413 * Validate VXLAN item. 2414 * 2415 * @param[in] dev 2416 * Pointer to the Ethernet device structure. 2417 * @param[in] item 2418 * Item specification. 2419 * @param[in] item_flags 2420 * Bit-fields that holds the items detected until now. 2421 * @param[in] attr 2422 * Flow rule attributes. 2423 * @param[out] error 2424 * Pointer to error structure. 2425 * 2426 * @return 2427 * 0 on success, a negative errno value otherwise and rte_errno is set. 2428 */ 2429 int 2430 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev, 2431 const struct rte_flow_item *item, 2432 uint64_t item_flags, 2433 const struct rte_flow_attr *attr, 2434 struct rte_flow_error *error) 2435 { 2436 const struct rte_flow_item_vxlan *spec = item->spec; 2437 const struct rte_flow_item_vxlan *mask = item->mask; 2438 int ret; 2439 struct mlx5_priv *priv = dev->data->dev_private; 2440 union vni { 2441 uint32_t vlan_id; 2442 uint8_t vni[4]; 2443 } id = { .vlan_id = 0, }; 2444 const struct rte_flow_item_vxlan nic_mask = { 2445 .vni = "\xff\xff\xff", 2446 .rsvd1 = 0xff, 2447 }; 2448 const struct rte_flow_item_vxlan *valid_mask; 2449 2450 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2451 return rte_flow_error_set(error, ENOTSUP, 2452 RTE_FLOW_ERROR_TYPE_ITEM, item, 2453 "multiple tunnel layers not" 2454 " supported"); 2455 valid_mask = &rte_flow_item_vxlan_mask; 2456 /* 2457 * Verify only UDPv4 is present as defined in 2458 * https://tools.ietf.org/html/rfc7348 2459 */ 2460 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2461 return rte_flow_error_set(error, EINVAL, 2462 RTE_FLOW_ERROR_TYPE_ITEM, item, 2463 "no outer UDP layer found"); 2464 if (!mask) 2465 mask = &rte_flow_item_vxlan_mask; 2466 /* FDB domain & NIC domain non-zero group */ 2467 if ((attr->transfer || attr->group) && priv->sh->misc5_cap) 2468 valid_mask = &nic_mask; 2469 /* Group zero in NIC domain */ 2470 if (!attr->group && !attr->transfer && priv->sh->tunnel_header_0_1) 2471 valid_mask = &nic_mask; 2472 ret = mlx5_flow_item_acceptable 2473 (item, (const uint8_t *)mask, 2474 (const uint8_t *)valid_mask, 2475 sizeof(struct rte_flow_item_vxlan), 2476 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2477 if (ret < 0) 2478 return ret; 2479 if (spec) { 2480 memcpy(&id.vni[1], spec->vni, 3); 2481 memcpy(&id.vni[1], mask->vni, 3); 2482 } 2483 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2484 return rte_flow_error_set(error, ENOTSUP, 2485 RTE_FLOW_ERROR_TYPE_ITEM, item, 2486 "VXLAN tunnel must be fully defined"); 2487 return 0; 2488 } 2489 2490 /** 2491 * Validate VXLAN_GPE item. 2492 * 2493 * @param[in] item 2494 * Item specification. 2495 * @param[in] item_flags 2496 * Bit-fields that holds the items detected until now. 2497 * @param[in] priv 2498 * Pointer to the private data structure. 2499 * @param[in] target_protocol 2500 * The next protocol in the previous item. 2501 * @param[out] error 2502 * Pointer to error structure. 2503 * 2504 * @return 2505 * 0 on success, a negative errno value otherwise and rte_errno is set. 2506 */ 2507 int 2508 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2509 uint64_t item_flags, 2510 struct rte_eth_dev *dev, 2511 struct rte_flow_error *error) 2512 { 2513 struct mlx5_priv *priv = dev->data->dev_private; 2514 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2515 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2516 int ret; 2517 union vni { 2518 uint32_t vlan_id; 2519 uint8_t vni[4]; 2520 } id = { .vlan_id = 0, }; 2521 2522 if (!priv->config.l3_vxlan_en) 2523 return rte_flow_error_set(error, ENOTSUP, 2524 RTE_FLOW_ERROR_TYPE_ITEM, item, 2525 "L3 VXLAN is not enabled by device" 2526 " parameter and/or not configured in" 2527 " firmware"); 2528 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2529 return rte_flow_error_set(error, ENOTSUP, 2530 RTE_FLOW_ERROR_TYPE_ITEM, item, 2531 "multiple tunnel layers not" 2532 " supported"); 2533 /* 2534 * Verify only UDPv4 is present as defined in 2535 * https://tools.ietf.org/html/rfc7348 2536 */ 2537 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2538 return rte_flow_error_set(error, EINVAL, 2539 RTE_FLOW_ERROR_TYPE_ITEM, item, 2540 "no outer UDP layer found"); 2541 if (!mask) 2542 mask = &rte_flow_item_vxlan_gpe_mask; 2543 ret = mlx5_flow_item_acceptable 2544 (item, (const uint8_t *)mask, 2545 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2546 sizeof(struct rte_flow_item_vxlan_gpe), 2547 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2548 if (ret < 0) 2549 return ret; 2550 if (spec) { 2551 if (spec->protocol) 2552 return rte_flow_error_set(error, ENOTSUP, 2553 RTE_FLOW_ERROR_TYPE_ITEM, 2554 item, 2555 "VxLAN-GPE protocol" 2556 " not supported"); 2557 memcpy(&id.vni[1], spec->vni, 3); 2558 memcpy(&id.vni[1], mask->vni, 3); 2559 } 2560 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2561 return rte_flow_error_set(error, ENOTSUP, 2562 RTE_FLOW_ERROR_TYPE_ITEM, item, 2563 "VXLAN-GPE tunnel must be fully" 2564 " defined"); 2565 return 0; 2566 } 2567 /** 2568 * Validate GRE Key item. 2569 * 2570 * @param[in] item 2571 * Item specification. 2572 * @param[in] item_flags 2573 * Bit flags to mark detected items. 2574 * @param[in] gre_item 2575 * Pointer to gre_item 2576 * @param[out] error 2577 * Pointer to error structure. 2578 * 2579 * @return 2580 * 0 on success, a negative errno value otherwise and rte_errno is set. 2581 */ 2582 int 2583 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2584 uint64_t item_flags, 2585 const struct rte_flow_item *gre_item, 2586 struct rte_flow_error *error) 2587 { 2588 const rte_be32_t *mask = item->mask; 2589 int ret = 0; 2590 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2591 const struct rte_flow_item_gre *gre_spec; 2592 const struct rte_flow_item_gre *gre_mask; 2593 2594 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2595 return rte_flow_error_set(error, ENOTSUP, 2596 RTE_FLOW_ERROR_TYPE_ITEM, item, 2597 "Multiple GRE key not support"); 2598 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2599 return rte_flow_error_set(error, ENOTSUP, 2600 RTE_FLOW_ERROR_TYPE_ITEM, item, 2601 "No preceding GRE header"); 2602 if (item_flags & MLX5_FLOW_LAYER_INNER) 2603 return rte_flow_error_set(error, ENOTSUP, 2604 RTE_FLOW_ERROR_TYPE_ITEM, item, 2605 "GRE key following a wrong item"); 2606 gre_mask = gre_item->mask; 2607 if (!gre_mask) 2608 gre_mask = &rte_flow_item_gre_mask; 2609 gre_spec = gre_item->spec; 2610 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2611 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2612 return rte_flow_error_set(error, EINVAL, 2613 RTE_FLOW_ERROR_TYPE_ITEM, item, 2614 "Key bit must be on"); 2615 2616 if (!mask) 2617 mask = &gre_key_default_mask; 2618 ret = mlx5_flow_item_acceptable 2619 (item, (const uint8_t *)mask, 2620 (const uint8_t *)&gre_key_default_mask, 2621 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2622 return ret; 2623 } 2624 2625 /** 2626 * Validate GRE item. 2627 * 2628 * @param[in] item 2629 * Item specification. 2630 * @param[in] item_flags 2631 * Bit flags to mark detected items. 2632 * @param[in] target_protocol 2633 * The next protocol in the previous item. 2634 * @param[out] error 2635 * Pointer to error structure. 2636 * 2637 * @return 2638 * 0 on success, a negative errno value otherwise and rte_errno is set. 2639 */ 2640 int 2641 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2642 uint64_t item_flags, 2643 uint8_t target_protocol, 2644 struct rte_flow_error *error) 2645 { 2646 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2647 const struct rte_flow_item_gre *mask = item->mask; 2648 int ret; 2649 const struct rte_flow_item_gre nic_mask = { 2650 .c_rsvd0_ver = RTE_BE16(0xB000), 2651 .protocol = RTE_BE16(UINT16_MAX), 2652 }; 2653 2654 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2655 return rte_flow_error_set(error, EINVAL, 2656 RTE_FLOW_ERROR_TYPE_ITEM, item, 2657 "protocol filtering not compatible" 2658 " with this GRE layer"); 2659 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2660 return rte_flow_error_set(error, ENOTSUP, 2661 RTE_FLOW_ERROR_TYPE_ITEM, item, 2662 "multiple tunnel layers not" 2663 " supported"); 2664 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2665 return rte_flow_error_set(error, ENOTSUP, 2666 RTE_FLOW_ERROR_TYPE_ITEM, item, 2667 "L3 Layer is missing"); 2668 if (!mask) 2669 mask = &rte_flow_item_gre_mask; 2670 ret = mlx5_flow_item_acceptable 2671 (item, (const uint8_t *)mask, 2672 (const uint8_t *)&nic_mask, 2673 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2674 error); 2675 if (ret < 0) 2676 return ret; 2677 #ifndef HAVE_MLX5DV_DR 2678 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2679 if (spec && (spec->protocol & mask->protocol)) 2680 return rte_flow_error_set(error, ENOTSUP, 2681 RTE_FLOW_ERROR_TYPE_ITEM, item, 2682 "without MPLS support the" 2683 " specification cannot be used for" 2684 " filtering"); 2685 #endif 2686 #endif 2687 return 0; 2688 } 2689 2690 /** 2691 * Validate Geneve item. 2692 * 2693 * @param[in] item 2694 * Item specification. 2695 * @param[in] itemFlags 2696 * Bit-fields that holds the items detected until now. 2697 * @param[in] enPriv 2698 * Pointer to the private data structure. 2699 * @param[out] error 2700 * Pointer to error structure. 2701 * 2702 * @return 2703 * 0 on success, a negative errno value otherwise and rte_errno is set. 2704 */ 2705 2706 int 2707 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2708 uint64_t item_flags, 2709 struct rte_eth_dev *dev, 2710 struct rte_flow_error *error) 2711 { 2712 struct mlx5_priv *priv = dev->data->dev_private; 2713 const struct rte_flow_item_geneve *spec = item->spec; 2714 const struct rte_flow_item_geneve *mask = item->mask; 2715 int ret; 2716 uint16_t gbhdr; 2717 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2718 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2719 const struct rte_flow_item_geneve nic_mask = { 2720 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2721 .vni = "\xff\xff\xff", 2722 .protocol = RTE_BE16(UINT16_MAX), 2723 }; 2724 2725 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2726 return rte_flow_error_set(error, ENOTSUP, 2727 RTE_FLOW_ERROR_TYPE_ITEM, item, 2728 "L3 Geneve is not enabled by device" 2729 " parameter and/or not configured in" 2730 " firmware"); 2731 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2732 return rte_flow_error_set(error, ENOTSUP, 2733 RTE_FLOW_ERROR_TYPE_ITEM, item, 2734 "multiple tunnel layers not" 2735 " supported"); 2736 /* 2737 * Verify only UDPv4 is present as defined in 2738 * https://tools.ietf.org/html/rfc7348 2739 */ 2740 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2741 return rte_flow_error_set(error, EINVAL, 2742 RTE_FLOW_ERROR_TYPE_ITEM, item, 2743 "no outer UDP layer found"); 2744 if (!mask) 2745 mask = &rte_flow_item_geneve_mask; 2746 ret = mlx5_flow_item_acceptable 2747 (item, (const uint8_t *)mask, 2748 (const uint8_t *)&nic_mask, 2749 sizeof(struct rte_flow_item_geneve), 2750 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2751 if (ret) 2752 return ret; 2753 if (spec) { 2754 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2755 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2756 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2757 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2758 return rte_flow_error_set(error, ENOTSUP, 2759 RTE_FLOW_ERROR_TYPE_ITEM, 2760 item, 2761 "Geneve protocol unsupported" 2762 " fields are being used"); 2763 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2764 return rte_flow_error_set 2765 (error, ENOTSUP, 2766 RTE_FLOW_ERROR_TYPE_ITEM, 2767 item, 2768 "Unsupported Geneve options length"); 2769 } 2770 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2771 return rte_flow_error_set 2772 (error, ENOTSUP, 2773 RTE_FLOW_ERROR_TYPE_ITEM, item, 2774 "Geneve tunnel must be fully defined"); 2775 return 0; 2776 } 2777 2778 /** 2779 * Validate Geneve TLV option item. 2780 * 2781 * @param[in] item 2782 * Item specification. 2783 * @param[in] last_item 2784 * Previous validated item in the pattern items. 2785 * @param[in] geneve_item 2786 * Previous GENEVE item specification. 2787 * @param[in] dev 2788 * Pointer to the rte_eth_dev structure. 2789 * @param[out] error 2790 * Pointer to error structure. 2791 * 2792 * @return 2793 * 0 on success, a negative errno value otherwise and rte_errno is set. 2794 */ 2795 int 2796 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item, 2797 uint64_t last_item, 2798 const struct rte_flow_item *geneve_item, 2799 struct rte_eth_dev *dev, 2800 struct rte_flow_error *error) 2801 { 2802 struct mlx5_priv *priv = dev->data->dev_private; 2803 struct mlx5_dev_ctx_shared *sh = priv->sh; 2804 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource; 2805 struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr; 2806 uint8_t data_max_supported = 2807 hca_attr->max_geneve_tlv_option_data_len * 4; 2808 struct mlx5_dev_config *config = &priv->config; 2809 const struct rte_flow_item_geneve *geneve_spec; 2810 const struct rte_flow_item_geneve *geneve_mask; 2811 const struct rte_flow_item_geneve_opt *spec = item->spec; 2812 const struct rte_flow_item_geneve_opt *mask = item->mask; 2813 unsigned int i; 2814 unsigned int data_len; 2815 uint8_t tlv_option_len; 2816 uint16_t optlen_m, optlen_v; 2817 const struct rte_flow_item_geneve_opt full_mask = { 2818 .option_class = RTE_BE16(0xffff), 2819 .option_type = 0xff, 2820 .option_len = 0x1f, 2821 }; 2822 2823 if (!mask) 2824 mask = &rte_flow_item_geneve_opt_mask; 2825 if (!spec) 2826 return rte_flow_error_set 2827 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2828 "Geneve TLV opt class/type/length must be specified"); 2829 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK) 2830 return rte_flow_error_set 2831 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2832 "Geneve TLV opt length exceeeds the limit (31)"); 2833 /* Check if class type and length masks are full. */ 2834 if (full_mask.option_class != mask->option_class || 2835 full_mask.option_type != mask->option_type || 2836 full_mask.option_len != (mask->option_len & full_mask.option_len)) 2837 return rte_flow_error_set 2838 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2839 "Geneve TLV opt class/type/length masks must be full"); 2840 /* Check if length is supported */ 2841 if ((uint32_t)spec->option_len > 2842 config->hca_attr.max_geneve_tlv_option_data_len) 2843 return rte_flow_error_set 2844 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2845 "Geneve TLV opt length not supported"); 2846 if (config->hca_attr.max_geneve_tlv_options > 1) 2847 DRV_LOG(DEBUG, 2848 "max_geneve_tlv_options supports more than 1 option"); 2849 /* Check GENEVE item preceding. */ 2850 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE)) 2851 return rte_flow_error_set 2852 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2853 "Geneve opt item must be preceded with Geneve item"); 2854 geneve_spec = geneve_item->spec; 2855 geneve_mask = geneve_item->mask ? geneve_item->mask : 2856 &rte_flow_item_geneve_mask; 2857 /* Check if GENEVE TLV option size doesn't exceed option length */ 2858 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 || 2859 geneve_spec->ver_opt_len_o_c_rsvd0)) { 2860 tlv_option_len = spec->option_len & mask->option_len; 2861 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0); 2862 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v); 2863 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0); 2864 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m); 2865 if ((optlen_v & optlen_m) <= tlv_option_len) 2866 return rte_flow_error_set 2867 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2868 "GENEVE TLV option length exceeds optlen"); 2869 } 2870 /* Check if length is 0 or data is 0. */ 2871 if (spec->data == NULL || spec->option_len == 0) 2872 return rte_flow_error_set 2873 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2874 "Geneve TLV opt with zero data/length not supported"); 2875 /* Check not all data & mask are 0. */ 2876 data_len = spec->option_len * 4; 2877 if (mask->data == NULL) { 2878 for (i = 0; i < data_len; i++) 2879 if (spec->data[i]) 2880 break; 2881 if (i == data_len) 2882 return rte_flow_error_set(error, ENOTSUP, 2883 RTE_FLOW_ERROR_TYPE_ITEM, item, 2884 "Can't match on Geneve option data 0"); 2885 } else { 2886 for (i = 0; i < data_len; i++) 2887 if (spec->data[i] & mask->data[i]) 2888 break; 2889 if (i == data_len) 2890 return rte_flow_error_set(error, ENOTSUP, 2891 RTE_FLOW_ERROR_TYPE_ITEM, item, 2892 "Can't match on Geneve option data and mask 0"); 2893 /* Check data mask supported. */ 2894 for (i = data_max_supported; i < data_len ; i++) 2895 if (mask->data[i]) 2896 return rte_flow_error_set(error, ENOTSUP, 2897 RTE_FLOW_ERROR_TYPE_ITEM, item, 2898 "Data mask is of unsupported size"); 2899 } 2900 /* Check GENEVE option is supported in NIC. */ 2901 if (!config->hca_attr.geneve_tlv_opt) 2902 return rte_flow_error_set 2903 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2904 "Geneve TLV opt not supported"); 2905 /* Check if we already have geneve option with different type/class. */ 2906 rte_spinlock_lock(&sh->geneve_tlv_opt_sl); 2907 geneve_opt_resource = sh->geneve_tlv_option_resource; 2908 if (geneve_opt_resource != NULL) 2909 if (geneve_opt_resource->option_class != spec->option_class || 2910 geneve_opt_resource->option_type != spec->option_type || 2911 geneve_opt_resource->length != spec->option_len) { 2912 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2913 return rte_flow_error_set(error, ENOTSUP, 2914 RTE_FLOW_ERROR_TYPE_ITEM, item, 2915 "Only one Geneve TLV option supported"); 2916 } 2917 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2918 return 0; 2919 } 2920 2921 /** 2922 * Validate MPLS item. 2923 * 2924 * @param[in] dev 2925 * Pointer to the rte_eth_dev structure. 2926 * @param[in] item 2927 * Item specification. 2928 * @param[in] item_flags 2929 * Bit-fields that holds the items detected until now. 2930 * @param[in] prev_layer 2931 * The protocol layer indicated in previous item. 2932 * @param[out] error 2933 * Pointer to error structure. 2934 * 2935 * @return 2936 * 0 on success, a negative errno value otherwise and rte_errno is set. 2937 */ 2938 int 2939 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 2940 const struct rte_flow_item *item __rte_unused, 2941 uint64_t item_flags __rte_unused, 2942 uint64_t prev_layer __rte_unused, 2943 struct rte_flow_error *error) 2944 { 2945 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 2946 const struct rte_flow_item_mpls *mask = item->mask; 2947 struct mlx5_priv *priv = dev->data->dev_private; 2948 int ret; 2949 2950 if (!priv->config.mpls_en) 2951 return rte_flow_error_set(error, ENOTSUP, 2952 RTE_FLOW_ERROR_TYPE_ITEM, item, 2953 "MPLS not supported or" 2954 " disabled in firmware" 2955 " configuration."); 2956 /* MPLS over UDP, GRE is allowed */ 2957 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP | 2958 MLX5_FLOW_LAYER_GRE | 2959 MLX5_FLOW_LAYER_GRE_KEY))) 2960 return rte_flow_error_set(error, EINVAL, 2961 RTE_FLOW_ERROR_TYPE_ITEM, item, 2962 "protocol filtering not compatible" 2963 " with MPLS layer"); 2964 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 2965 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 2966 !(item_flags & MLX5_FLOW_LAYER_GRE)) 2967 return rte_flow_error_set(error, ENOTSUP, 2968 RTE_FLOW_ERROR_TYPE_ITEM, item, 2969 "multiple tunnel layers not" 2970 " supported"); 2971 if (!mask) 2972 mask = &rte_flow_item_mpls_mask; 2973 ret = mlx5_flow_item_acceptable 2974 (item, (const uint8_t *)mask, 2975 (const uint8_t *)&rte_flow_item_mpls_mask, 2976 sizeof(struct rte_flow_item_mpls), 2977 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2978 if (ret < 0) 2979 return ret; 2980 return 0; 2981 #else 2982 return rte_flow_error_set(error, ENOTSUP, 2983 RTE_FLOW_ERROR_TYPE_ITEM, item, 2984 "MPLS is not supported by Verbs, please" 2985 " update."); 2986 #endif 2987 } 2988 2989 /** 2990 * Validate NVGRE item. 2991 * 2992 * @param[in] item 2993 * Item specification. 2994 * @param[in] item_flags 2995 * Bit flags to mark detected items. 2996 * @param[in] target_protocol 2997 * The next protocol in the previous item. 2998 * @param[out] error 2999 * Pointer to error structure. 3000 * 3001 * @return 3002 * 0 on success, a negative errno value otherwise and rte_errno is set. 3003 */ 3004 int 3005 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 3006 uint64_t item_flags, 3007 uint8_t target_protocol, 3008 struct rte_flow_error *error) 3009 { 3010 const struct rte_flow_item_nvgre *mask = item->mask; 3011 int ret; 3012 3013 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 3014 return rte_flow_error_set(error, EINVAL, 3015 RTE_FLOW_ERROR_TYPE_ITEM, item, 3016 "protocol filtering not compatible" 3017 " with this GRE layer"); 3018 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3019 return rte_flow_error_set(error, ENOTSUP, 3020 RTE_FLOW_ERROR_TYPE_ITEM, item, 3021 "multiple tunnel layers not" 3022 " supported"); 3023 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 3024 return rte_flow_error_set(error, ENOTSUP, 3025 RTE_FLOW_ERROR_TYPE_ITEM, item, 3026 "L3 Layer is missing"); 3027 if (!mask) 3028 mask = &rte_flow_item_nvgre_mask; 3029 ret = mlx5_flow_item_acceptable 3030 (item, (const uint8_t *)mask, 3031 (const uint8_t *)&rte_flow_item_nvgre_mask, 3032 sizeof(struct rte_flow_item_nvgre), 3033 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3034 if (ret < 0) 3035 return ret; 3036 return 0; 3037 } 3038 3039 /** 3040 * Validate eCPRI item. 3041 * 3042 * @param[in] item 3043 * Item specification. 3044 * @param[in] item_flags 3045 * Bit-fields that holds the items detected until now. 3046 * @param[in] last_item 3047 * Previous validated item in the pattern items. 3048 * @param[in] ether_type 3049 * Type in the ethernet layer header (including dot1q). 3050 * @param[in] acc_mask 3051 * Acceptable mask, if NULL default internal default mask 3052 * will be used to check whether item fields are supported. 3053 * @param[out] error 3054 * Pointer to error structure. 3055 * 3056 * @return 3057 * 0 on success, a negative errno value otherwise and rte_errno is set. 3058 */ 3059 int 3060 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 3061 uint64_t item_flags, 3062 uint64_t last_item, 3063 uint16_t ether_type, 3064 const struct rte_flow_item_ecpri *acc_mask, 3065 struct rte_flow_error *error) 3066 { 3067 const struct rte_flow_item_ecpri *mask = item->mask; 3068 const struct rte_flow_item_ecpri nic_mask = { 3069 .hdr = { 3070 .common = { 3071 .u32 = 3072 RTE_BE32(((const struct rte_ecpri_common_hdr) { 3073 .type = 0xFF, 3074 }).u32), 3075 }, 3076 .dummy[0] = 0xFFFFFFFF, 3077 }, 3078 }; 3079 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 3080 MLX5_FLOW_LAYER_OUTER_VLAN); 3081 struct rte_flow_item_ecpri mask_lo; 3082 3083 if (!(last_item & outer_l2_vlan) && 3084 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP) 3085 return rte_flow_error_set(error, EINVAL, 3086 RTE_FLOW_ERROR_TYPE_ITEM, item, 3087 "eCPRI can only follow L2/VLAN layer or UDP layer"); 3088 if ((last_item & outer_l2_vlan) && ether_type && 3089 ether_type != RTE_ETHER_TYPE_ECPRI) 3090 return rte_flow_error_set(error, EINVAL, 3091 RTE_FLOW_ERROR_TYPE_ITEM, item, 3092 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE"); 3093 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3094 return rte_flow_error_set(error, EINVAL, 3095 RTE_FLOW_ERROR_TYPE_ITEM, item, 3096 "eCPRI with tunnel is not supported right now"); 3097 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 3098 return rte_flow_error_set(error, ENOTSUP, 3099 RTE_FLOW_ERROR_TYPE_ITEM, item, 3100 "multiple L3 layers not supported"); 3101 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 3102 return rte_flow_error_set(error, EINVAL, 3103 RTE_FLOW_ERROR_TYPE_ITEM, item, 3104 "eCPRI cannot coexist with a TCP layer"); 3105 /* In specification, eCPRI could be over UDP layer. */ 3106 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 3107 return rte_flow_error_set(error, EINVAL, 3108 RTE_FLOW_ERROR_TYPE_ITEM, item, 3109 "eCPRI over UDP layer is not yet supported right now"); 3110 /* Mask for type field in common header could be zero. */ 3111 if (!mask) 3112 mask = &rte_flow_item_ecpri_mask; 3113 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 3114 /* Input mask is in big-endian format. */ 3115 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 3116 return rte_flow_error_set(error, EINVAL, 3117 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3118 "partial mask is not supported for protocol"); 3119 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 3120 return rte_flow_error_set(error, EINVAL, 3121 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3122 "message header mask must be after a type mask"); 3123 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 3124 acc_mask ? (const uint8_t *)acc_mask 3125 : (const uint8_t *)&nic_mask, 3126 sizeof(struct rte_flow_item_ecpri), 3127 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3128 } 3129 3130 static int 3131 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 3132 const struct rte_flow_attr *attr __rte_unused, 3133 const struct rte_flow_item items[] __rte_unused, 3134 const struct rte_flow_action actions[] __rte_unused, 3135 bool external __rte_unused, 3136 int hairpin __rte_unused, 3137 struct rte_flow_error *error) 3138 { 3139 return rte_flow_error_set(error, ENOTSUP, 3140 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3141 } 3142 3143 static struct mlx5_flow * 3144 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 3145 const struct rte_flow_attr *attr __rte_unused, 3146 const struct rte_flow_item items[] __rte_unused, 3147 const struct rte_flow_action actions[] __rte_unused, 3148 struct rte_flow_error *error) 3149 { 3150 rte_flow_error_set(error, ENOTSUP, 3151 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3152 return NULL; 3153 } 3154 3155 static int 3156 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 3157 struct mlx5_flow *dev_flow __rte_unused, 3158 const struct rte_flow_attr *attr __rte_unused, 3159 const struct rte_flow_item items[] __rte_unused, 3160 const struct rte_flow_action actions[] __rte_unused, 3161 struct rte_flow_error *error) 3162 { 3163 return rte_flow_error_set(error, ENOTSUP, 3164 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3165 } 3166 3167 static int 3168 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 3169 struct rte_flow *flow __rte_unused, 3170 struct rte_flow_error *error) 3171 { 3172 return rte_flow_error_set(error, ENOTSUP, 3173 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3174 } 3175 3176 static void 3177 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 3178 struct rte_flow *flow __rte_unused) 3179 { 3180 } 3181 3182 static void 3183 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 3184 struct rte_flow *flow __rte_unused) 3185 { 3186 } 3187 3188 static int 3189 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3190 struct rte_flow *flow __rte_unused, 3191 const struct rte_flow_action *actions __rte_unused, 3192 void *data __rte_unused, 3193 struct rte_flow_error *error) 3194 { 3195 return rte_flow_error_set(error, ENOTSUP, 3196 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3197 } 3198 3199 static int 3200 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused, 3201 uint32_t domains __rte_unused, 3202 uint32_t flags __rte_unused) 3203 { 3204 return 0; 3205 } 3206 3207 /* Void driver to protect from null pointer reference. */ 3208 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3209 .validate = flow_null_validate, 3210 .prepare = flow_null_prepare, 3211 .translate = flow_null_translate, 3212 .apply = flow_null_apply, 3213 .remove = flow_null_remove, 3214 .destroy = flow_null_destroy, 3215 .query = flow_null_query, 3216 .sync_domain = flow_null_sync_domain, 3217 }; 3218 3219 /** 3220 * Select flow driver type according to flow attributes and device 3221 * configuration. 3222 * 3223 * @param[in] dev 3224 * Pointer to the dev structure. 3225 * @param[in] attr 3226 * Pointer to the flow attributes. 3227 * 3228 * @return 3229 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3230 */ 3231 static enum mlx5_flow_drv_type 3232 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3233 { 3234 struct mlx5_priv *priv = dev->data->dev_private; 3235 /* The OS can determine first a specific flow type (DV, VERBS) */ 3236 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3237 3238 if (type != MLX5_FLOW_TYPE_MAX) 3239 return type; 3240 /* If no OS specific type - continue with DV/VERBS selection */ 3241 if (attr->transfer && priv->config.dv_esw_en) 3242 type = MLX5_FLOW_TYPE_DV; 3243 if (!attr->transfer) 3244 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3245 MLX5_FLOW_TYPE_VERBS; 3246 return type; 3247 } 3248 3249 #define flow_get_drv_ops(type) flow_drv_ops[type] 3250 3251 /** 3252 * Flow driver validation API. This abstracts calling driver specific functions. 3253 * The type of flow driver is determined according to flow attributes. 3254 * 3255 * @param[in] dev 3256 * Pointer to the dev structure. 3257 * @param[in] attr 3258 * Pointer to the flow attributes. 3259 * @param[in] items 3260 * Pointer to the list of items. 3261 * @param[in] actions 3262 * Pointer to the list of actions. 3263 * @param[in] external 3264 * This flow rule is created by request external to PMD. 3265 * @param[in] hairpin 3266 * Number of hairpin TX actions, 0 means classic flow. 3267 * @param[out] error 3268 * Pointer to the error structure. 3269 * 3270 * @return 3271 * 0 on success, a negative errno value otherwise and rte_errno is set. 3272 */ 3273 static inline int 3274 flow_drv_validate(struct rte_eth_dev *dev, 3275 const struct rte_flow_attr *attr, 3276 const struct rte_flow_item items[], 3277 const struct rte_flow_action actions[], 3278 bool external, int hairpin, struct rte_flow_error *error) 3279 { 3280 const struct mlx5_flow_driver_ops *fops; 3281 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3282 3283 fops = flow_get_drv_ops(type); 3284 return fops->validate(dev, attr, items, actions, external, 3285 hairpin, error); 3286 } 3287 3288 /** 3289 * Flow driver preparation API. This abstracts calling driver specific 3290 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3291 * calculates the size of memory required for device flow, allocates the memory, 3292 * initializes the device flow and returns the pointer. 3293 * 3294 * @note 3295 * This function initializes device flow structure such as dv or verbs in 3296 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3297 * rest. For example, adding returning device flow to flow->dev_flow list and 3298 * setting backward reference to the flow should be done out of this function. 3299 * layers field is not filled either. 3300 * 3301 * @param[in] dev 3302 * Pointer to the dev structure. 3303 * @param[in] attr 3304 * Pointer to the flow attributes. 3305 * @param[in] items 3306 * Pointer to the list of items. 3307 * @param[in] actions 3308 * Pointer to the list of actions. 3309 * @param[in] flow_idx 3310 * This memory pool index to the flow. 3311 * @param[out] error 3312 * Pointer to the error structure. 3313 * 3314 * @return 3315 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3316 */ 3317 static inline struct mlx5_flow * 3318 flow_drv_prepare(struct rte_eth_dev *dev, 3319 const struct rte_flow *flow, 3320 const struct rte_flow_attr *attr, 3321 const struct rte_flow_item items[], 3322 const struct rte_flow_action actions[], 3323 uint32_t flow_idx, 3324 struct rte_flow_error *error) 3325 { 3326 const struct mlx5_flow_driver_ops *fops; 3327 enum mlx5_flow_drv_type type = flow->drv_type; 3328 struct mlx5_flow *mlx5_flow = NULL; 3329 3330 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3331 fops = flow_get_drv_ops(type); 3332 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3333 if (mlx5_flow) 3334 mlx5_flow->flow_idx = flow_idx; 3335 return mlx5_flow; 3336 } 3337 3338 /** 3339 * Flow driver translation API. This abstracts calling driver specific 3340 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3341 * translates a generic flow into a driver flow. flow_drv_prepare() must 3342 * precede. 3343 * 3344 * @note 3345 * dev_flow->layers could be filled as a result of parsing during translation 3346 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3347 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3348 * flow->actions could be overwritten even though all the expanded dev_flows 3349 * have the same actions. 3350 * 3351 * @param[in] dev 3352 * Pointer to the rte dev structure. 3353 * @param[in, out] dev_flow 3354 * Pointer to the mlx5 flow. 3355 * @param[in] attr 3356 * Pointer to the flow attributes. 3357 * @param[in] items 3358 * Pointer to the list of items. 3359 * @param[in] actions 3360 * Pointer to the list of actions. 3361 * @param[out] error 3362 * Pointer to the error structure. 3363 * 3364 * @return 3365 * 0 on success, a negative errno value otherwise and rte_errno is set. 3366 */ 3367 static inline int 3368 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3369 const struct rte_flow_attr *attr, 3370 const struct rte_flow_item items[], 3371 const struct rte_flow_action actions[], 3372 struct rte_flow_error *error) 3373 { 3374 const struct mlx5_flow_driver_ops *fops; 3375 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3376 3377 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3378 fops = flow_get_drv_ops(type); 3379 return fops->translate(dev, dev_flow, attr, items, actions, error); 3380 } 3381 3382 /** 3383 * Flow driver apply API. This abstracts calling driver specific functions. 3384 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3385 * translated driver flows on to device. flow_drv_translate() must precede. 3386 * 3387 * @param[in] dev 3388 * Pointer to Ethernet device structure. 3389 * @param[in, out] flow 3390 * Pointer to flow structure. 3391 * @param[out] error 3392 * Pointer to error structure. 3393 * 3394 * @return 3395 * 0 on success, a negative errno value otherwise and rte_errno is set. 3396 */ 3397 static inline int 3398 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3399 struct rte_flow_error *error) 3400 { 3401 const struct mlx5_flow_driver_ops *fops; 3402 enum mlx5_flow_drv_type type = flow->drv_type; 3403 3404 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3405 fops = flow_get_drv_ops(type); 3406 return fops->apply(dev, flow, error); 3407 } 3408 3409 /** 3410 * Flow driver destroy API. This abstracts calling driver specific functions. 3411 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3412 * on device and releases resources of the flow. 3413 * 3414 * @param[in] dev 3415 * Pointer to Ethernet device. 3416 * @param[in, out] flow 3417 * Pointer to flow structure. 3418 */ 3419 static inline void 3420 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3421 { 3422 const struct mlx5_flow_driver_ops *fops; 3423 enum mlx5_flow_drv_type type = flow->drv_type; 3424 3425 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3426 fops = flow_get_drv_ops(type); 3427 fops->destroy(dev, flow); 3428 } 3429 3430 /** 3431 * Flow driver find RSS policy tbl API. This abstracts calling driver 3432 * specific functions. Parent flow (rte_flow) should have driver 3433 * type (drv_type). It will find the RSS policy table that has the rss_desc. 3434 * 3435 * @param[in] dev 3436 * Pointer to Ethernet device. 3437 * @param[in, out] flow 3438 * Pointer to flow structure. 3439 * @param[in] policy 3440 * Pointer to meter policy table. 3441 * @param[in] rss_desc 3442 * Pointer to rss_desc 3443 */ 3444 static struct mlx5_flow_meter_sub_policy * 3445 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev, 3446 struct rte_flow *flow, 3447 struct mlx5_flow_meter_policy *policy, 3448 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS]) 3449 { 3450 const struct mlx5_flow_driver_ops *fops; 3451 enum mlx5_flow_drv_type type = flow->drv_type; 3452 3453 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3454 fops = flow_get_drv_ops(type); 3455 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc); 3456 } 3457 3458 /** 3459 * Flow driver color tag rule API. This abstracts calling driver 3460 * specific functions. Parent flow (rte_flow) should have driver 3461 * type (drv_type). It will create the color tag rules in hierarchy meter. 3462 * 3463 * @param[in] dev 3464 * Pointer to Ethernet device. 3465 * @param[in, out] flow 3466 * Pointer to flow structure. 3467 * @param[in] fm 3468 * Pointer to flow meter structure. 3469 * @param[in] src_port 3470 * The src port this extra rule should use. 3471 * @param[in] item 3472 * The src port id match item. 3473 * @param[out] error 3474 * Pointer to error structure. 3475 */ 3476 static int 3477 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev, 3478 struct rte_flow *flow, 3479 struct mlx5_flow_meter_info *fm, 3480 int32_t src_port, 3481 const struct rte_flow_item *item, 3482 struct rte_flow_error *error) 3483 { 3484 const struct mlx5_flow_driver_ops *fops; 3485 enum mlx5_flow_drv_type type = flow->drv_type; 3486 3487 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3488 fops = flow_get_drv_ops(type); 3489 return fops->meter_hierarchy_rule_create(dev, fm, 3490 src_port, item, error); 3491 } 3492 3493 /** 3494 * Get RSS action from the action list. 3495 * 3496 * @param[in] dev 3497 * Pointer to Ethernet device. 3498 * @param[in] actions 3499 * Pointer to the list of actions. 3500 * @param[in] flow 3501 * Parent flow structure pointer. 3502 * 3503 * @return 3504 * Pointer to the RSS action if exist, else return NULL. 3505 */ 3506 static const struct rte_flow_action_rss* 3507 flow_get_rss_action(struct rte_eth_dev *dev, 3508 const struct rte_flow_action actions[]) 3509 { 3510 struct mlx5_priv *priv = dev->data->dev_private; 3511 const struct rte_flow_action_rss *rss = NULL; 3512 3513 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3514 switch (actions->type) { 3515 case RTE_FLOW_ACTION_TYPE_RSS: 3516 rss = actions->conf; 3517 break; 3518 case RTE_FLOW_ACTION_TYPE_SAMPLE: 3519 { 3520 const struct rte_flow_action_sample *sample = 3521 actions->conf; 3522 const struct rte_flow_action *act = sample->actions; 3523 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) 3524 if (act->type == RTE_FLOW_ACTION_TYPE_RSS) 3525 rss = act->conf; 3526 break; 3527 } 3528 case RTE_FLOW_ACTION_TYPE_METER: 3529 { 3530 uint32_t mtr_idx; 3531 struct mlx5_flow_meter_info *fm; 3532 struct mlx5_flow_meter_policy *policy; 3533 const struct rte_flow_action_meter *mtr = actions->conf; 3534 3535 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx); 3536 if (fm && !fm->def_policy) { 3537 policy = mlx5_flow_meter_policy_find(dev, 3538 fm->policy_id, NULL); 3539 MLX5_ASSERT(policy); 3540 if (policy->is_hierarchy) { 3541 policy = 3542 mlx5_flow_meter_hierarchy_get_final_policy(dev, 3543 policy); 3544 if (!policy) 3545 return NULL; 3546 } 3547 if (policy->is_rss) 3548 rss = 3549 policy->act_cnt[RTE_COLOR_GREEN].rss->conf; 3550 } 3551 break; 3552 } 3553 default: 3554 break; 3555 } 3556 } 3557 return rss; 3558 } 3559 3560 /** 3561 * Get ASO age action by index. 3562 * 3563 * @param[in] dev 3564 * Pointer to the Ethernet device structure. 3565 * @param[in] age_idx 3566 * Index to the ASO age action. 3567 * 3568 * @return 3569 * The specified ASO age action. 3570 */ 3571 struct mlx5_aso_age_action* 3572 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx) 3573 { 3574 uint16_t pool_idx = age_idx & UINT16_MAX; 3575 uint16_t offset = (age_idx >> 16) & UINT16_MAX; 3576 struct mlx5_priv *priv = dev->data->dev_private; 3577 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng; 3578 struct mlx5_aso_age_pool *pool = mng->pools[pool_idx]; 3579 3580 return &pool->actions[offset - 1]; 3581 } 3582 3583 /* maps indirect action to translated direct in some actions array */ 3584 struct mlx5_translated_action_handle { 3585 struct rte_flow_action_handle *action; /**< Indirect action handle. */ 3586 int index; /**< Index in related array of rte_flow_action. */ 3587 }; 3588 3589 /** 3590 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related 3591 * direct action if translation possible. 3592 * This functionality used to run same execution path for both direct and 3593 * indirect actions on flow create. All necessary preparations for indirect 3594 * action handling should be performed on *handle* actions list returned 3595 * from this call. 3596 * 3597 * @param[in] dev 3598 * Pointer to Ethernet device. 3599 * @param[in] actions 3600 * List of actions to translate. 3601 * @param[out] handle 3602 * List to store translated indirect action object handles. 3603 * @param[in, out] indir_n 3604 * Size of *handle* array. On return should be updated with number of 3605 * indirect actions retrieved from the *actions* list. 3606 * @param[out] translated_actions 3607 * List of actions where all indirect actions were translated to direct 3608 * if possible. NULL if no translation took place. 3609 * @param[out] error 3610 * Pointer to the error structure. 3611 * 3612 * @return 3613 * 0 on success, a negative errno value otherwise and rte_errno is set. 3614 */ 3615 static int 3616 flow_action_handles_translate(struct rte_eth_dev *dev, 3617 const struct rte_flow_action actions[], 3618 struct mlx5_translated_action_handle *handle, 3619 int *indir_n, 3620 struct rte_flow_action **translated_actions, 3621 struct rte_flow_error *error) 3622 { 3623 struct mlx5_priv *priv = dev->data->dev_private; 3624 struct rte_flow_action *translated = NULL; 3625 size_t actions_size; 3626 int n; 3627 int copied_n = 0; 3628 struct mlx5_translated_action_handle *handle_end = NULL; 3629 3630 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3631 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT) 3632 continue; 3633 if (copied_n == *indir_n) { 3634 return rte_flow_error_set 3635 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3636 NULL, "too many shared actions"); 3637 } 3638 rte_memcpy(&handle[copied_n].action, &actions[n].conf, 3639 sizeof(actions[n].conf)); 3640 handle[copied_n].index = n; 3641 copied_n++; 3642 } 3643 n++; 3644 *indir_n = copied_n; 3645 if (!copied_n) 3646 return 0; 3647 actions_size = sizeof(struct rte_flow_action) * n; 3648 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3649 if (!translated) { 3650 rte_errno = ENOMEM; 3651 return -ENOMEM; 3652 } 3653 memcpy(translated, actions, actions_size); 3654 for (handle_end = handle + copied_n; handle < handle_end; handle++) { 3655 struct mlx5_shared_action_rss *shared_rss; 3656 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3657 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3658 uint32_t idx = act_idx & 3659 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3660 3661 switch (type) { 3662 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3663 shared_rss = mlx5_ipool_get 3664 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx); 3665 translated[handle->index].type = 3666 RTE_FLOW_ACTION_TYPE_RSS; 3667 translated[handle->index].conf = 3668 &shared_rss->origin; 3669 break; 3670 case MLX5_INDIRECT_ACTION_TYPE_COUNT: 3671 translated[handle->index].type = 3672 (enum rte_flow_action_type) 3673 MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 3674 translated[handle->index].conf = (void *)(uintptr_t)idx; 3675 break; 3676 case MLX5_INDIRECT_ACTION_TYPE_AGE: 3677 if (priv->sh->flow_hit_aso_en) { 3678 translated[handle->index].type = 3679 (enum rte_flow_action_type) 3680 MLX5_RTE_FLOW_ACTION_TYPE_AGE; 3681 translated[handle->index].conf = 3682 (void *)(uintptr_t)idx; 3683 break; 3684 } 3685 /* Fall-through */ 3686 case MLX5_INDIRECT_ACTION_TYPE_CT: 3687 if (priv->sh->ct_aso_en) { 3688 translated[handle->index].type = 3689 RTE_FLOW_ACTION_TYPE_CONNTRACK; 3690 translated[handle->index].conf = 3691 (void *)(uintptr_t)idx; 3692 break; 3693 } 3694 /* Fall-through */ 3695 default: 3696 mlx5_free(translated); 3697 return rte_flow_error_set 3698 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3699 NULL, "invalid indirect action type"); 3700 } 3701 } 3702 *translated_actions = translated; 3703 return 0; 3704 } 3705 3706 /** 3707 * Get Shared RSS action from the action list. 3708 * 3709 * @param[in] dev 3710 * Pointer to Ethernet device. 3711 * @param[in] shared 3712 * Pointer to the list of actions. 3713 * @param[in] shared_n 3714 * Actions list length. 3715 * 3716 * @return 3717 * The MLX5 RSS action ID if exists, otherwise return 0. 3718 */ 3719 static uint32_t 3720 flow_get_shared_rss_action(struct rte_eth_dev *dev, 3721 struct mlx5_translated_action_handle *handle, 3722 int shared_n) 3723 { 3724 struct mlx5_translated_action_handle *handle_end; 3725 struct mlx5_priv *priv = dev->data->dev_private; 3726 struct mlx5_shared_action_rss *shared_rss; 3727 3728 3729 for (handle_end = handle + shared_n; handle < handle_end; handle++) { 3730 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3731 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3732 uint32_t idx = act_idx & 3733 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3734 switch (type) { 3735 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3736 shared_rss = mlx5_ipool_get 3737 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 3738 idx); 3739 __atomic_add_fetch(&shared_rss->refcnt, 1, 3740 __ATOMIC_RELAXED); 3741 return idx; 3742 default: 3743 break; 3744 } 3745 } 3746 return 0; 3747 } 3748 3749 static unsigned int 3750 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 3751 { 3752 const struct rte_flow_item *item; 3753 unsigned int has_vlan = 0; 3754 3755 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3756 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 3757 has_vlan = 1; 3758 break; 3759 } 3760 } 3761 if (has_vlan) 3762 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 3763 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 3764 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3765 MLX5_EXPANSION_ROOT_OUTER; 3766 } 3767 3768 /** 3769 * Get layer flags from the prefix flow. 3770 * 3771 * Some flows may be split to several subflows, the prefix subflow gets the 3772 * match items and the suffix sub flow gets the actions. 3773 * Some actions need the user defined match item flags to get the detail for 3774 * the action. 3775 * This function helps the suffix flow to get the item layer flags from prefix 3776 * subflow. 3777 * 3778 * @param[in] dev_flow 3779 * Pointer the created preifx subflow. 3780 * 3781 * @return 3782 * The layers get from prefix subflow. 3783 */ 3784 static inline uint64_t 3785 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3786 { 3787 uint64_t layers = 0; 3788 3789 /* 3790 * Layers bits could be localization, but usually the compiler will 3791 * help to do the optimization work for source code. 3792 * If no decap actions, use the layers directly. 3793 */ 3794 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3795 return dev_flow->handle->layers; 3796 /* Convert L3 layers with decap action. */ 3797 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3798 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3799 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3800 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3801 /* Convert L4 layers with decap action. */ 3802 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3803 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3804 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3805 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3806 return layers; 3807 } 3808 3809 /** 3810 * Get metadata split action information. 3811 * 3812 * @param[in] actions 3813 * Pointer to the list of actions. 3814 * @param[out] qrss 3815 * Pointer to the return pointer. 3816 * @param[out] qrss_type 3817 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3818 * if no QUEUE/RSS is found. 3819 * @param[out] encap_idx 3820 * Pointer to the index of the encap action if exists, otherwise the last 3821 * action index. 3822 * 3823 * @return 3824 * Total number of actions. 3825 */ 3826 static int 3827 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 3828 const struct rte_flow_action **qrss, 3829 int *encap_idx) 3830 { 3831 const struct rte_flow_action_raw_encap *raw_encap; 3832 int actions_n = 0; 3833 int raw_decap_idx = -1; 3834 3835 *encap_idx = -1; 3836 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3837 switch (actions->type) { 3838 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3839 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3840 *encap_idx = actions_n; 3841 break; 3842 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3843 raw_decap_idx = actions_n; 3844 break; 3845 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3846 raw_encap = actions->conf; 3847 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3848 *encap_idx = raw_decap_idx != -1 ? 3849 raw_decap_idx : actions_n; 3850 break; 3851 case RTE_FLOW_ACTION_TYPE_QUEUE: 3852 case RTE_FLOW_ACTION_TYPE_RSS: 3853 *qrss = actions; 3854 break; 3855 default: 3856 break; 3857 } 3858 actions_n++; 3859 } 3860 if (*encap_idx == -1) 3861 *encap_idx = actions_n; 3862 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3863 return actions_n + 1; 3864 } 3865 3866 /** 3867 * Check if the action will change packet. 3868 * 3869 * @param dev 3870 * Pointer to Ethernet device. 3871 * @param[in] type 3872 * action type. 3873 * 3874 * @return 3875 * true if action will change packet, false otherwise. 3876 */ 3877 static bool flow_check_modify_action_type(struct rte_eth_dev *dev, 3878 enum rte_flow_action_type type) 3879 { 3880 struct mlx5_priv *priv = dev->data->dev_private; 3881 3882 switch (type) { 3883 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 3884 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 3885 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 3886 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 3887 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 3888 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 3889 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 3890 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 3891 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 3892 case RTE_FLOW_ACTION_TYPE_SET_TTL: 3893 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 3894 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 3895 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 3896 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 3897 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 3898 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 3899 case RTE_FLOW_ACTION_TYPE_SET_META: 3900 case RTE_FLOW_ACTION_TYPE_SET_TAG: 3901 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 3902 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3903 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3904 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3905 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3906 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 3907 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3908 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 3909 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3910 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3911 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 3912 return true; 3913 case RTE_FLOW_ACTION_TYPE_FLAG: 3914 case RTE_FLOW_ACTION_TYPE_MARK: 3915 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) 3916 return true; 3917 else 3918 return false; 3919 default: 3920 return false; 3921 } 3922 } 3923 3924 /** 3925 * Check meter action from the action list. 3926 * 3927 * @param dev 3928 * Pointer to Ethernet device. 3929 * @param[in] actions 3930 * Pointer to the list of actions. 3931 * @param[out] has_mtr 3932 * Pointer to the meter exist flag. 3933 * @param[out] has_modify 3934 * Pointer to the flag showing there's packet change action. 3935 * @param[out] meter_id 3936 * Pointer to the meter id. 3937 * 3938 * @return 3939 * Total number of actions. 3940 */ 3941 static int 3942 flow_check_meter_action(struct rte_eth_dev *dev, 3943 const struct rte_flow_action actions[], 3944 bool *has_mtr, bool *has_modify, uint32_t *meter_id) 3945 { 3946 const struct rte_flow_action_meter *mtr = NULL; 3947 int actions_n = 0; 3948 3949 MLX5_ASSERT(has_mtr); 3950 *has_mtr = false; 3951 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3952 switch (actions->type) { 3953 case RTE_FLOW_ACTION_TYPE_METER: 3954 mtr = actions->conf; 3955 *meter_id = mtr->mtr_id; 3956 *has_mtr = true; 3957 break; 3958 default: 3959 break; 3960 } 3961 if (!*has_mtr) 3962 *has_modify |= flow_check_modify_action_type(dev, 3963 actions->type); 3964 actions_n++; 3965 } 3966 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3967 return actions_n + 1; 3968 } 3969 3970 /** 3971 * Check if the flow should be split due to hairpin. 3972 * The reason for the split is that in current HW we can't 3973 * support encap and push-vlan on Rx, so if a flow contains 3974 * these actions we move it to Tx. 3975 * 3976 * @param dev 3977 * Pointer to Ethernet device. 3978 * @param[in] attr 3979 * Flow rule attributes. 3980 * @param[in] actions 3981 * Associated actions (list terminated by the END action). 3982 * 3983 * @return 3984 * > 0 the number of actions and the flow should be split, 3985 * 0 when no split required. 3986 */ 3987 static int 3988 flow_check_hairpin_split(struct rte_eth_dev *dev, 3989 const struct rte_flow_attr *attr, 3990 const struct rte_flow_action actions[]) 3991 { 3992 int queue_action = 0; 3993 int action_n = 0; 3994 int split = 0; 3995 const struct rte_flow_action_queue *queue; 3996 const struct rte_flow_action_rss *rss; 3997 const struct rte_flow_action_raw_encap *raw_encap; 3998 const struct rte_eth_hairpin_conf *conf; 3999 4000 if (!attr->ingress) 4001 return 0; 4002 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4003 switch (actions->type) { 4004 case RTE_FLOW_ACTION_TYPE_QUEUE: 4005 queue = actions->conf; 4006 if (queue == NULL) 4007 return 0; 4008 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); 4009 if (conf == NULL || conf->tx_explicit != 0) 4010 return 0; 4011 queue_action = 1; 4012 action_n++; 4013 break; 4014 case RTE_FLOW_ACTION_TYPE_RSS: 4015 rss = actions->conf; 4016 if (rss == NULL || rss->queue_num == 0) 4017 return 0; 4018 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); 4019 if (conf == NULL || conf->tx_explicit != 0) 4020 return 0; 4021 queue_action = 1; 4022 action_n++; 4023 break; 4024 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4025 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4026 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4027 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4028 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4029 split++; 4030 action_n++; 4031 break; 4032 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4033 raw_encap = actions->conf; 4034 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4035 split++; 4036 action_n++; 4037 break; 4038 default: 4039 action_n++; 4040 break; 4041 } 4042 } 4043 if (split && queue_action) 4044 return action_n; 4045 return 0; 4046 } 4047 4048 /* Declare flow create/destroy prototype in advance. */ 4049 static uint32_t 4050 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type, 4051 const struct rte_flow_attr *attr, 4052 const struct rte_flow_item items[], 4053 const struct rte_flow_action actions[], 4054 bool external, struct rte_flow_error *error); 4055 4056 static void 4057 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type, 4058 uint32_t flow_idx); 4059 4060 int 4061 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused, 4062 struct mlx5_list_entry *entry, void *cb_ctx) 4063 { 4064 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 4065 struct mlx5_flow_mreg_copy_resource *mcp_res = 4066 container_of(entry, typeof(*mcp_res), hlist_ent); 4067 4068 return mcp_res->mark_id != *(uint32_t *)(ctx->data); 4069 } 4070 4071 struct mlx5_list_entry * 4072 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx) 4073 { 4074 struct rte_eth_dev *dev = tool_ctx; 4075 struct mlx5_priv *priv = dev->data->dev_private; 4076 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 4077 struct mlx5_flow_mreg_copy_resource *mcp_res; 4078 struct rte_flow_error *error = ctx->error; 4079 uint32_t idx = 0; 4080 int ret; 4081 uint32_t mark_id = *(uint32_t *)(ctx->data); 4082 struct rte_flow_attr attr = { 4083 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4084 .ingress = 1, 4085 }; 4086 struct mlx5_rte_flow_item_tag tag_spec = { 4087 .data = mark_id, 4088 }; 4089 struct rte_flow_item items[] = { 4090 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 4091 }; 4092 struct rte_flow_action_mark ftag = { 4093 .id = mark_id, 4094 }; 4095 struct mlx5_flow_action_copy_mreg cp_mreg = { 4096 .dst = REG_B, 4097 .src = REG_NON, 4098 }; 4099 struct rte_flow_action_jump jump = { 4100 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 4101 }; 4102 struct rte_flow_action actions[] = { 4103 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 4104 }; 4105 4106 /* Fill the register fileds in the flow. */ 4107 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 4108 if (ret < 0) 4109 return NULL; 4110 tag_spec.id = ret; 4111 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4112 if (ret < 0) 4113 return NULL; 4114 cp_mreg.src = ret; 4115 /* Provide the full width of FLAG specific value. */ 4116 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 4117 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 4118 /* Build a new flow. */ 4119 if (mark_id != MLX5_DEFAULT_COPY_ID) { 4120 items[0] = (struct rte_flow_item){ 4121 .type = (enum rte_flow_item_type) 4122 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 4123 .spec = &tag_spec, 4124 }; 4125 items[1] = (struct rte_flow_item){ 4126 .type = RTE_FLOW_ITEM_TYPE_END, 4127 }; 4128 actions[0] = (struct rte_flow_action){ 4129 .type = (enum rte_flow_action_type) 4130 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 4131 .conf = &ftag, 4132 }; 4133 actions[1] = (struct rte_flow_action){ 4134 .type = (enum rte_flow_action_type) 4135 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4136 .conf = &cp_mreg, 4137 }; 4138 actions[2] = (struct rte_flow_action){ 4139 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4140 .conf = &jump, 4141 }; 4142 actions[3] = (struct rte_flow_action){ 4143 .type = RTE_FLOW_ACTION_TYPE_END, 4144 }; 4145 } else { 4146 /* Default rule, wildcard match. */ 4147 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR; 4148 items[0] = (struct rte_flow_item){ 4149 .type = RTE_FLOW_ITEM_TYPE_END, 4150 }; 4151 actions[0] = (struct rte_flow_action){ 4152 .type = (enum rte_flow_action_type) 4153 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4154 .conf = &cp_mreg, 4155 }; 4156 actions[1] = (struct rte_flow_action){ 4157 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4158 .conf = &jump, 4159 }; 4160 actions[2] = (struct rte_flow_action){ 4161 .type = RTE_FLOW_ACTION_TYPE_END, 4162 }; 4163 } 4164 /* Build a new entry. */ 4165 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4166 if (!mcp_res) { 4167 rte_errno = ENOMEM; 4168 return NULL; 4169 } 4170 mcp_res->idx = idx; 4171 mcp_res->mark_id = mark_id; 4172 /* 4173 * The copy Flows are not included in any list. There 4174 * ones are referenced from other Flows and can not 4175 * be applied, removed, deleted in ardbitrary order 4176 * by list traversing. 4177 */ 4178 mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP, 4179 &attr, items, actions, false, error); 4180 if (!mcp_res->rix_flow) { 4181 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx); 4182 return NULL; 4183 } 4184 return &mcp_res->hlist_ent; 4185 } 4186 4187 struct mlx5_list_entry * 4188 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry, 4189 void *cb_ctx __rte_unused) 4190 { 4191 struct rte_eth_dev *dev = tool_ctx; 4192 struct mlx5_priv *priv = dev->data->dev_private; 4193 struct mlx5_flow_mreg_copy_resource *mcp_res; 4194 uint32_t idx = 0; 4195 4196 mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4197 if (!mcp_res) { 4198 rte_errno = ENOMEM; 4199 return NULL; 4200 } 4201 memcpy(mcp_res, oentry, sizeof(*mcp_res)); 4202 mcp_res->idx = idx; 4203 return &mcp_res->hlist_ent; 4204 } 4205 4206 void 4207 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry) 4208 { 4209 struct mlx5_flow_mreg_copy_resource *mcp_res = 4210 container_of(entry, typeof(*mcp_res), hlist_ent); 4211 struct rte_eth_dev *dev = tool_ctx; 4212 struct mlx5_priv *priv = dev->data->dev_private; 4213 4214 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4215 } 4216 4217 /** 4218 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4219 * 4220 * As mark_id is unique, if there's already a registered flow for the mark_id, 4221 * return by increasing the reference counter of the resource. Otherwise, create 4222 * the resource (mcp_res) and flow. 4223 * 4224 * Flow looks like, 4225 * - If ingress port is ANY and reg_c[1] is mark_id, 4226 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4227 * 4228 * For default flow (zero mark_id), flow is like, 4229 * - If ingress port is ANY, 4230 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 4231 * 4232 * @param dev 4233 * Pointer to Ethernet device. 4234 * @param mark_id 4235 * ID of MARK action, zero means default flow for META. 4236 * @param[out] error 4237 * Perform verbose error reporting if not NULL. 4238 * 4239 * @return 4240 * Associated resource on success, NULL otherwise and rte_errno is set. 4241 */ 4242 static struct mlx5_flow_mreg_copy_resource * 4243 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 4244 struct rte_flow_error *error) 4245 { 4246 struct mlx5_priv *priv = dev->data->dev_private; 4247 struct mlx5_list_entry *entry; 4248 struct mlx5_flow_cb_ctx ctx = { 4249 .dev = dev, 4250 .error = error, 4251 .data = &mark_id, 4252 }; 4253 4254 /* Check if already registered. */ 4255 MLX5_ASSERT(priv->mreg_cp_tbl); 4256 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx); 4257 if (!entry) 4258 return NULL; 4259 return container_of(entry, struct mlx5_flow_mreg_copy_resource, 4260 hlist_ent); 4261 } 4262 4263 void 4264 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry) 4265 { 4266 struct mlx5_flow_mreg_copy_resource *mcp_res = 4267 container_of(entry, typeof(*mcp_res), hlist_ent); 4268 struct rte_eth_dev *dev = tool_ctx; 4269 struct mlx5_priv *priv = dev->data->dev_private; 4270 4271 MLX5_ASSERT(mcp_res->rix_flow); 4272 flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow); 4273 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4274 } 4275 4276 /** 4277 * Release flow in RX_CP_TBL. 4278 * 4279 * @param dev 4280 * Pointer to Ethernet device. 4281 * @flow 4282 * Parent flow for wich copying is provided. 4283 */ 4284 static void 4285 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 4286 struct rte_flow *flow) 4287 { 4288 struct mlx5_flow_mreg_copy_resource *mcp_res; 4289 struct mlx5_priv *priv = dev->data->dev_private; 4290 4291 if (!flow->rix_mreg_copy) 4292 return; 4293 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 4294 flow->rix_mreg_copy); 4295 if (!mcp_res || !priv->mreg_cp_tbl) 4296 return; 4297 MLX5_ASSERT(mcp_res->rix_flow); 4298 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 4299 flow->rix_mreg_copy = 0; 4300 } 4301 4302 /** 4303 * Remove the default copy action from RX_CP_TBL. 4304 * 4305 * This functions is called in the mlx5_dev_start(). No thread safe 4306 * is guaranteed. 4307 * 4308 * @param dev 4309 * Pointer to Ethernet device. 4310 */ 4311 static void 4312 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 4313 { 4314 struct mlx5_list_entry *entry; 4315 struct mlx5_priv *priv = dev->data->dev_private; 4316 struct mlx5_flow_cb_ctx ctx; 4317 uint32_t mark_id; 4318 4319 /* Check if default flow is registered. */ 4320 if (!priv->mreg_cp_tbl) 4321 return; 4322 mark_id = MLX5_DEFAULT_COPY_ID; 4323 ctx.data = &mark_id; 4324 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx); 4325 if (!entry) 4326 return; 4327 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry); 4328 } 4329 4330 /** 4331 * Add the default copy action in in RX_CP_TBL. 4332 * 4333 * This functions is called in the mlx5_dev_start(). No thread safe 4334 * is guaranteed. 4335 * 4336 * @param dev 4337 * Pointer to Ethernet device. 4338 * @param[out] error 4339 * Perform verbose error reporting if not NULL. 4340 * 4341 * @return 4342 * 0 for success, negative value otherwise and rte_errno is set. 4343 */ 4344 static int 4345 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 4346 struct rte_flow_error *error) 4347 { 4348 struct mlx5_priv *priv = dev->data->dev_private; 4349 struct mlx5_flow_mreg_copy_resource *mcp_res; 4350 struct mlx5_flow_cb_ctx ctx; 4351 uint32_t mark_id; 4352 4353 /* Check whether extensive metadata feature is engaged. */ 4354 if (!priv->config.dv_flow_en || 4355 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4356 !mlx5_flow_ext_mreg_supported(dev) || 4357 !priv->sh->dv_regc0_mask) 4358 return 0; 4359 /* 4360 * Add default mreg copy flow may be called multiple time, but 4361 * only be called once in stop. Avoid register it twice. 4362 */ 4363 mark_id = MLX5_DEFAULT_COPY_ID; 4364 ctx.data = &mark_id; 4365 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx)) 4366 return 0; 4367 mcp_res = flow_mreg_add_copy_action(dev, mark_id, error); 4368 if (!mcp_res) 4369 return -rte_errno; 4370 return 0; 4371 } 4372 4373 /** 4374 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4375 * 4376 * All the flow having Q/RSS action should be split by 4377 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 4378 * performs the following, 4379 * - CQE->flow_tag := reg_c[1] (MARK) 4380 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4381 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 4382 * but there should be a flow per each MARK ID set by MARK action. 4383 * 4384 * For the aforementioned reason, if there's a MARK action in flow's action 4385 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 4386 * the MARK ID to CQE's flow_tag like, 4387 * - If reg_c[1] is mark_id, 4388 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4389 * 4390 * For SET_META action which stores value in reg_c[0], as the destination is 4391 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 4392 * MARK ID means the default flow. The default flow looks like, 4393 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4394 * 4395 * @param dev 4396 * Pointer to Ethernet device. 4397 * @param flow 4398 * Pointer to flow structure. 4399 * @param[in] actions 4400 * Pointer to the list of actions. 4401 * @param[out] error 4402 * Perform verbose error reporting if not NULL. 4403 * 4404 * @return 4405 * 0 on success, negative value otherwise and rte_errno is set. 4406 */ 4407 static int 4408 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 4409 struct rte_flow *flow, 4410 const struct rte_flow_action *actions, 4411 struct rte_flow_error *error) 4412 { 4413 struct mlx5_priv *priv = dev->data->dev_private; 4414 struct mlx5_dev_config *config = &priv->config; 4415 struct mlx5_flow_mreg_copy_resource *mcp_res; 4416 const struct rte_flow_action_mark *mark; 4417 4418 /* Check whether extensive metadata feature is engaged. */ 4419 if (!config->dv_flow_en || 4420 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4421 !mlx5_flow_ext_mreg_supported(dev) || 4422 !priv->sh->dv_regc0_mask) 4423 return 0; 4424 /* Find MARK action. */ 4425 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4426 switch (actions->type) { 4427 case RTE_FLOW_ACTION_TYPE_FLAG: 4428 mcp_res = flow_mreg_add_copy_action 4429 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4430 if (!mcp_res) 4431 return -rte_errno; 4432 flow->rix_mreg_copy = mcp_res->idx; 4433 return 0; 4434 case RTE_FLOW_ACTION_TYPE_MARK: 4435 mark = (const struct rte_flow_action_mark *) 4436 actions->conf; 4437 mcp_res = 4438 flow_mreg_add_copy_action(dev, mark->id, error); 4439 if (!mcp_res) 4440 return -rte_errno; 4441 flow->rix_mreg_copy = mcp_res->idx; 4442 return 0; 4443 default: 4444 break; 4445 } 4446 } 4447 return 0; 4448 } 4449 4450 #define MLX5_MAX_SPLIT_ACTIONS 24 4451 #define MLX5_MAX_SPLIT_ITEMS 24 4452 4453 /** 4454 * Split the hairpin flow. 4455 * Since HW can't support encap and push-vlan on Rx, we move these 4456 * actions to Tx. 4457 * If the count action is after the encap then we also 4458 * move the count action. in this case the count will also measure 4459 * the outer bytes. 4460 * 4461 * @param dev 4462 * Pointer to Ethernet device. 4463 * @param[in] actions 4464 * Associated actions (list terminated by the END action). 4465 * @param[out] actions_rx 4466 * Rx flow actions. 4467 * @param[out] actions_tx 4468 * Tx flow actions.. 4469 * @param[out] pattern_tx 4470 * The pattern items for the Tx flow. 4471 * @param[out] flow_id 4472 * The flow ID connected to this flow. 4473 * 4474 * @return 4475 * 0 on success. 4476 */ 4477 static int 4478 flow_hairpin_split(struct rte_eth_dev *dev, 4479 const struct rte_flow_action actions[], 4480 struct rte_flow_action actions_rx[], 4481 struct rte_flow_action actions_tx[], 4482 struct rte_flow_item pattern_tx[], 4483 uint32_t flow_id) 4484 { 4485 const struct rte_flow_action_raw_encap *raw_encap; 4486 const struct rte_flow_action_raw_decap *raw_decap; 4487 struct mlx5_rte_flow_action_set_tag *set_tag; 4488 struct rte_flow_action *tag_action; 4489 struct mlx5_rte_flow_item_tag *tag_item; 4490 struct rte_flow_item *item; 4491 char *addr; 4492 int encap = 0; 4493 4494 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4495 switch (actions->type) { 4496 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4497 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4498 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4499 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4500 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4501 rte_memcpy(actions_tx, actions, 4502 sizeof(struct rte_flow_action)); 4503 actions_tx++; 4504 break; 4505 case RTE_FLOW_ACTION_TYPE_COUNT: 4506 if (encap) { 4507 rte_memcpy(actions_tx, actions, 4508 sizeof(struct rte_flow_action)); 4509 actions_tx++; 4510 } else { 4511 rte_memcpy(actions_rx, actions, 4512 sizeof(struct rte_flow_action)); 4513 actions_rx++; 4514 } 4515 break; 4516 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4517 raw_encap = actions->conf; 4518 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) { 4519 memcpy(actions_tx, actions, 4520 sizeof(struct rte_flow_action)); 4521 actions_tx++; 4522 encap = 1; 4523 } else { 4524 rte_memcpy(actions_rx, actions, 4525 sizeof(struct rte_flow_action)); 4526 actions_rx++; 4527 } 4528 break; 4529 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4530 raw_decap = actions->conf; 4531 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) { 4532 memcpy(actions_tx, actions, 4533 sizeof(struct rte_flow_action)); 4534 actions_tx++; 4535 } else { 4536 rte_memcpy(actions_rx, actions, 4537 sizeof(struct rte_flow_action)); 4538 actions_rx++; 4539 } 4540 break; 4541 default: 4542 rte_memcpy(actions_rx, actions, 4543 sizeof(struct rte_flow_action)); 4544 actions_rx++; 4545 break; 4546 } 4547 } 4548 /* Add set meta action and end action for the Rx flow. */ 4549 tag_action = actions_rx; 4550 tag_action->type = (enum rte_flow_action_type) 4551 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4552 actions_rx++; 4553 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4554 actions_rx++; 4555 set_tag = (void *)actions_rx; 4556 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4557 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), 4558 .data = flow_id, 4559 }; 4560 MLX5_ASSERT(set_tag->id > REG_NON); 4561 tag_action->conf = set_tag; 4562 /* Create Tx item list. */ 4563 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4564 addr = (void *)&pattern_tx[2]; 4565 item = pattern_tx; 4566 item->type = (enum rte_flow_item_type) 4567 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4568 tag_item = (void *)addr; 4569 tag_item->data = flow_id; 4570 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4571 MLX5_ASSERT(set_tag->id > REG_NON); 4572 item->spec = tag_item; 4573 addr += sizeof(struct mlx5_rte_flow_item_tag); 4574 tag_item = (void *)addr; 4575 tag_item->data = UINT32_MAX; 4576 tag_item->id = UINT16_MAX; 4577 item->mask = tag_item; 4578 item->last = NULL; 4579 item++; 4580 item->type = RTE_FLOW_ITEM_TYPE_END; 4581 return 0; 4582 } 4583 4584 /** 4585 * The last stage of splitting chain, just creates the subflow 4586 * without any modification. 4587 * 4588 * @param[in] dev 4589 * Pointer to Ethernet device. 4590 * @param[in] flow 4591 * Parent flow structure pointer. 4592 * @param[in, out] sub_flow 4593 * Pointer to return the created subflow, may be NULL. 4594 * @param[in] attr 4595 * Flow rule attributes. 4596 * @param[in] items 4597 * Pattern specification (list terminated by the END pattern item). 4598 * @param[in] actions 4599 * Associated actions (list terminated by the END action). 4600 * @param[in] flow_split_info 4601 * Pointer to flow split info structure. 4602 * @param[out] error 4603 * Perform verbose error reporting if not NULL. 4604 * @return 4605 * 0 on success, negative value otherwise 4606 */ 4607 static int 4608 flow_create_split_inner(struct rte_eth_dev *dev, 4609 struct rte_flow *flow, 4610 struct mlx5_flow **sub_flow, 4611 const struct rte_flow_attr *attr, 4612 const struct rte_flow_item items[], 4613 const struct rte_flow_action actions[], 4614 struct mlx5_flow_split_info *flow_split_info, 4615 struct rte_flow_error *error) 4616 { 4617 struct mlx5_flow *dev_flow; 4618 4619 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4620 flow_split_info->flow_idx, error); 4621 if (!dev_flow) 4622 return -rte_errno; 4623 dev_flow->flow = flow; 4624 dev_flow->external = flow_split_info->external; 4625 dev_flow->skip_scale = flow_split_info->skip_scale; 4626 /* Subflow object was created, we must include one in the list. */ 4627 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4628 dev_flow->handle, next); 4629 /* 4630 * If dev_flow is as one of the suffix flow, some actions in suffix 4631 * flow may need some user defined item layer flags, and pass the 4632 * Metadate rxq mark flag to suffix flow as well. 4633 */ 4634 if (flow_split_info->prefix_layers) 4635 dev_flow->handle->layers = flow_split_info->prefix_layers; 4636 if (flow_split_info->prefix_mark) 4637 dev_flow->handle->mark = 1; 4638 if (sub_flow) 4639 *sub_flow = dev_flow; 4640 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4641 dev_flow->dv.table_id = flow_split_info->table_id; 4642 #endif 4643 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4644 } 4645 4646 /** 4647 * Get the sub policy of a meter. 4648 * 4649 * @param[in] dev 4650 * Pointer to Ethernet device. 4651 * @param[in] flow 4652 * Parent flow structure pointer. 4653 * @param wks 4654 * Pointer to thread flow work space. 4655 * @param[in] attr 4656 * Flow rule attributes. 4657 * @param[in] items 4658 * Pattern specification (list terminated by the END pattern item). 4659 * @param[out] error 4660 * Perform verbose error reporting if not NULL. 4661 * 4662 * @return 4663 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set. 4664 */ 4665 static struct mlx5_flow_meter_sub_policy * 4666 get_meter_sub_policy(struct rte_eth_dev *dev, 4667 struct rte_flow *flow, 4668 struct mlx5_flow_workspace *wks, 4669 const struct rte_flow_attr *attr, 4670 const struct rte_flow_item items[], 4671 struct rte_flow_error *error) 4672 { 4673 struct mlx5_flow_meter_policy *policy; 4674 struct mlx5_flow_meter_policy *final_policy; 4675 struct mlx5_flow_meter_sub_policy *sub_policy = NULL; 4676 4677 policy = wks->policy; 4678 final_policy = policy->is_hierarchy ? wks->final_policy : policy; 4679 if (final_policy->is_rss || final_policy->is_queue) { 4680 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS]; 4681 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0}; 4682 uint32_t i; 4683 4684 /** 4685 * This is a tmp dev_flow, 4686 * no need to register any matcher for it in translate. 4687 */ 4688 wks->skip_matcher_reg = 1; 4689 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) { 4690 struct mlx5_flow dev_flow = {0}; 4691 struct mlx5_flow_handle dev_handle = { {0} }; 4692 4693 if (final_policy->is_rss) { 4694 const void *rss_act = 4695 final_policy->act_cnt[i].rss->conf; 4696 struct rte_flow_action rss_actions[2] = { 4697 [0] = { 4698 .type = RTE_FLOW_ACTION_TYPE_RSS, 4699 .conf = rss_act 4700 }, 4701 [1] = { 4702 .type = RTE_FLOW_ACTION_TYPE_END, 4703 .conf = NULL 4704 } 4705 }; 4706 4707 dev_flow.handle = &dev_handle; 4708 dev_flow.ingress = attr->ingress; 4709 dev_flow.flow = flow; 4710 dev_flow.external = 0; 4711 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4712 dev_flow.dv.transfer = attr->transfer; 4713 #endif 4714 /** 4715 * Translate RSS action to get rss hash fields. 4716 */ 4717 if (flow_drv_translate(dev, &dev_flow, attr, 4718 items, rss_actions, error)) 4719 goto exit; 4720 rss_desc_v[i] = wks->rss_desc; 4721 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN; 4722 rss_desc_v[i].hash_fields = 4723 dev_flow.hash_fields; 4724 rss_desc_v[i].queue_num = 4725 rss_desc_v[i].hash_fields ? 4726 rss_desc_v[i].queue_num : 1; 4727 rss_desc_v[i].tunnel = 4728 !!(dev_flow.handle->layers & 4729 MLX5_FLOW_LAYER_TUNNEL); 4730 } else { 4731 /* This is queue action. */ 4732 rss_desc_v[i] = wks->rss_desc; 4733 rss_desc_v[i].key_len = 0; 4734 rss_desc_v[i].hash_fields = 0; 4735 rss_desc_v[i].queue = 4736 &final_policy->act_cnt[i].queue; 4737 rss_desc_v[i].queue_num = 1; 4738 } 4739 rss_desc[i] = &rss_desc_v[i]; 4740 } 4741 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev, 4742 flow, policy, rss_desc); 4743 } else { 4744 enum mlx5_meter_domain mtr_domain = 4745 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4746 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4747 MLX5_MTR_DOMAIN_INGRESS; 4748 sub_policy = policy->sub_policys[mtr_domain][0]; 4749 } 4750 if (!sub_policy) { 4751 rte_flow_error_set(error, EINVAL, 4752 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4753 "Failed to get meter sub-policy."); 4754 goto exit; 4755 } 4756 exit: 4757 return sub_policy; 4758 } 4759 4760 /** 4761 * Split the meter flow. 4762 * 4763 * As meter flow will split to three sub flow, other than meter 4764 * action, the other actions make sense to only meter accepts 4765 * the packet. If it need to be dropped, no other additional 4766 * actions should be take. 4767 * 4768 * One kind of special action which decapsulates the L3 tunnel 4769 * header will be in the prefix sub flow, as not to take the 4770 * L3 tunnel header into account. 4771 * 4772 * @param[in] dev 4773 * Pointer to Ethernet device. 4774 * @param[in] flow 4775 * Parent flow structure pointer. 4776 * @param wks 4777 * Pointer to thread flow work space. 4778 * @param[in] attr 4779 * Flow rule attributes. 4780 * @param[in] items 4781 * Pattern specification (list terminated by the END pattern item). 4782 * @param[out] sfx_items 4783 * Suffix flow match items (list terminated by the END pattern item). 4784 * @param[in] actions 4785 * Associated actions (list terminated by the END action). 4786 * @param[out] actions_sfx 4787 * Suffix flow actions. 4788 * @param[out] actions_pre 4789 * Prefix flow actions. 4790 * @param[out] mtr_flow_id 4791 * Pointer to meter flow id. 4792 * @param[out] error 4793 * Perform verbose error reporting if not NULL. 4794 * 4795 * @return 4796 * 0 on success, a negative errno value otherwise and rte_errno is set. 4797 */ 4798 static int 4799 flow_meter_split_prep(struct rte_eth_dev *dev, 4800 struct rte_flow *flow, 4801 struct mlx5_flow_workspace *wks, 4802 const struct rte_flow_attr *attr, 4803 const struct rte_flow_item items[], 4804 struct rte_flow_item sfx_items[], 4805 const struct rte_flow_action actions[], 4806 struct rte_flow_action actions_sfx[], 4807 struct rte_flow_action actions_pre[], 4808 uint32_t *mtr_flow_id, 4809 struct rte_flow_error *error) 4810 { 4811 struct mlx5_priv *priv = dev->data->dev_private; 4812 struct mlx5_flow_meter_info *fm = wks->fm; 4813 struct rte_flow_action *tag_action = NULL; 4814 struct rte_flow_item *tag_item; 4815 struct mlx5_rte_flow_action_set_tag *set_tag; 4816 const struct rte_flow_action_raw_encap *raw_encap; 4817 const struct rte_flow_action_raw_decap *raw_decap; 4818 struct mlx5_rte_flow_item_tag *tag_item_spec; 4819 struct mlx5_rte_flow_item_tag *tag_item_mask; 4820 uint32_t tag_id = 0; 4821 struct rte_flow_item *vlan_item_dst = NULL; 4822 const struct rte_flow_item *vlan_item_src = NULL; 4823 struct rte_flow_action *hw_mtr_action; 4824 struct rte_flow_action *action_pre_head = NULL; 4825 int32_t flow_src_port = priv->representor_id; 4826 bool mtr_first; 4827 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0; 4828 uint8_t mtr_reg_bits = priv->mtr_reg_share ? 4829 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS; 4830 uint32_t flow_id = 0; 4831 uint32_t flow_id_reversed = 0; 4832 uint8_t flow_id_bits = 0; 4833 int shift; 4834 4835 /* Prepare the suffix subflow items. */ 4836 tag_item = sfx_items++; 4837 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 4838 struct mlx5_priv *port_priv; 4839 const struct rte_flow_item_port_id *pid_v; 4840 int item_type = items->type; 4841 4842 switch (item_type) { 4843 case RTE_FLOW_ITEM_TYPE_PORT_ID: 4844 pid_v = items->spec; 4845 MLX5_ASSERT(pid_v); 4846 port_priv = mlx5_port_to_eswitch_info(pid_v->id, false); 4847 if (!port_priv) 4848 return rte_flow_error_set(error, 4849 rte_errno, 4850 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 4851 pid_v, 4852 "Failed to get port info."); 4853 flow_src_port = port_priv->representor_id; 4854 if (!fm->def_policy && wks->policy->is_hierarchy && 4855 flow_src_port != priv->representor_id) { 4856 if (flow_drv_mtr_hierarchy_rule_create(dev, 4857 flow, fm, 4858 flow_src_port, 4859 items, 4860 error)) 4861 return -rte_errno; 4862 } 4863 memcpy(sfx_items, items, sizeof(*sfx_items)); 4864 sfx_items++; 4865 break; 4866 case RTE_FLOW_ITEM_TYPE_VLAN: 4867 /* Determine if copy vlan item below. */ 4868 vlan_item_src = items; 4869 vlan_item_dst = sfx_items++; 4870 vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID; 4871 break; 4872 default: 4873 break; 4874 } 4875 } 4876 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 4877 sfx_items++; 4878 mtr_first = priv->sh->meter_aso_en && 4879 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX)); 4880 /* For ASO meter, meter must be before tag in TX direction. */ 4881 if (mtr_first) { 4882 action_pre_head = actions_pre++; 4883 /* Leave space for tag action. */ 4884 tag_action = actions_pre++; 4885 } 4886 /* Prepare the actions for prefix and suffix flow. */ 4887 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4888 struct rte_flow_action *action_cur = NULL; 4889 4890 switch (actions->type) { 4891 case RTE_FLOW_ACTION_TYPE_METER: 4892 if (mtr_first) { 4893 action_cur = action_pre_head; 4894 } else { 4895 /* Leave space for tag action. */ 4896 tag_action = actions_pre++; 4897 action_cur = actions_pre++; 4898 } 4899 break; 4900 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4901 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4902 action_cur = actions_pre++; 4903 break; 4904 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4905 raw_encap = actions->conf; 4906 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 4907 action_cur = actions_pre++; 4908 break; 4909 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4910 raw_decap = actions->conf; 4911 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4912 action_cur = actions_pre++; 4913 break; 4914 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4915 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4916 if (vlan_item_dst && vlan_item_src) { 4917 memcpy(vlan_item_dst, vlan_item_src, 4918 sizeof(*vlan_item_dst)); 4919 /* 4920 * Convert to internal match item, it is used 4921 * for vlan push and set vid. 4922 */ 4923 vlan_item_dst->type = (enum rte_flow_item_type) 4924 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 4925 } 4926 break; 4927 default: 4928 break; 4929 } 4930 if (!action_cur) 4931 action_cur = (fm->def_policy) ? 4932 actions_sfx++ : actions_pre++; 4933 memcpy(action_cur, actions, sizeof(struct rte_flow_action)); 4934 } 4935 /* Add end action to the actions. */ 4936 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 4937 if (priv->sh->meter_aso_en) { 4938 /** 4939 * For ASO meter, need to add an extra jump action explicitly, 4940 * to jump from meter to policer table. 4941 */ 4942 struct mlx5_flow_meter_sub_policy *sub_policy; 4943 struct mlx5_flow_tbl_data_entry *tbl_data; 4944 4945 if (!fm->def_policy) { 4946 sub_policy = get_meter_sub_policy(dev, flow, wks, 4947 attr, items, error); 4948 if (!sub_policy) 4949 return -rte_errno; 4950 } else { 4951 enum mlx5_meter_domain mtr_domain = 4952 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4953 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4954 MLX5_MTR_DOMAIN_INGRESS; 4955 4956 sub_policy = 4957 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy; 4958 } 4959 tbl_data = container_of(sub_policy->tbl_rsc, 4960 struct mlx5_flow_tbl_data_entry, tbl); 4961 hw_mtr_action = actions_pre++; 4962 hw_mtr_action->type = (enum rte_flow_action_type) 4963 MLX5_RTE_FLOW_ACTION_TYPE_JUMP; 4964 hw_mtr_action->conf = tbl_data->jump.action; 4965 } 4966 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 4967 actions_pre++; 4968 if (!tag_action) 4969 return rte_flow_error_set(error, ENOMEM, 4970 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4971 "No tag action space."); 4972 if (!mtr_flow_id) { 4973 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID; 4974 goto exit; 4975 } 4976 /* Only default-policy Meter creates mtr flow id. */ 4977 if (fm->def_policy) { 4978 mlx5_ipool_malloc(fm->flow_ipool, &tag_id); 4979 if (!tag_id) 4980 return rte_flow_error_set(error, ENOMEM, 4981 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4982 "Failed to allocate meter flow id."); 4983 flow_id = tag_id - 1; 4984 flow_id_bits = (!flow_id) ? 1 : 4985 (MLX5_REG_BITS - __builtin_clz(flow_id)); 4986 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) > 4987 mtr_reg_bits) { 4988 mlx5_ipool_free(fm->flow_ipool, tag_id); 4989 return rte_flow_error_set(error, EINVAL, 4990 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4991 "Meter flow id exceeds max limit."); 4992 } 4993 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits) 4994 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits; 4995 } 4996 /* Build tag actions and items for meter_id/meter flow_id. */ 4997 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre; 4998 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 4999 tag_item_mask = tag_item_spec + 1; 5000 /* Both flow_id and meter_id share the same register. */ 5001 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5002 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 5003 0, error), 5004 .offset = mtr_id_offset, 5005 .length = mtr_reg_bits, 5006 .data = flow->meter, 5007 }; 5008 /* 5009 * The color Reg bits used by flow_id are growing from 5010 * msb to lsb, so must do bit reverse for flow_id val in RegC. 5011 */ 5012 for (shift = 0; shift < flow_id_bits; shift++) 5013 flow_id_reversed = (flow_id_reversed << 1) | 5014 ((flow_id >> shift) & 0x1); 5015 set_tag->data |= 5016 flow_id_reversed << (mtr_reg_bits - flow_id_bits); 5017 tag_item_spec->id = set_tag->id; 5018 tag_item_spec->data = set_tag->data << mtr_id_offset; 5019 tag_item_mask->data = UINT32_MAX << mtr_id_offset; 5020 tag_action->type = (enum rte_flow_action_type) 5021 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5022 tag_action->conf = set_tag; 5023 tag_item->type = (enum rte_flow_item_type) 5024 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 5025 tag_item->spec = tag_item_spec; 5026 tag_item->last = NULL; 5027 tag_item->mask = tag_item_mask; 5028 exit: 5029 if (mtr_flow_id) 5030 *mtr_flow_id = tag_id; 5031 return 0; 5032 } 5033 5034 /** 5035 * Split action list having QUEUE/RSS for metadata register copy. 5036 * 5037 * Once Q/RSS action is detected in user's action list, the flow action 5038 * should be split in order to copy metadata registers, which will happen in 5039 * RX_CP_TBL like, 5040 * - CQE->flow_tag := reg_c[1] (MARK) 5041 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 5042 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 5043 * This is because the last action of each flow must be a terminal action 5044 * (QUEUE, RSS or DROP). 5045 * 5046 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 5047 * stored and kept in the mlx5_flow structure per each sub_flow. 5048 * 5049 * The Q/RSS action is replaced with, 5050 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 5051 * And the following JUMP action is added at the end, 5052 * - JUMP, to RX_CP_TBL. 5053 * 5054 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 5055 * flow_create_split_metadata() routine. The flow will look like, 5056 * - If flow ID matches (reg_c[2]), perform Q/RSS. 5057 * 5058 * @param dev 5059 * Pointer to Ethernet device. 5060 * @param[out] split_actions 5061 * Pointer to store split actions to jump to CP_TBL. 5062 * @param[in] actions 5063 * Pointer to the list of original flow actions. 5064 * @param[in] qrss 5065 * Pointer to the Q/RSS action. 5066 * @param[in] actions_n 5067 * Number of original actions. 5068 * @param[out] error 5069 * Perform verbose error reporting if not NULL. 5070 * 5071 * @return 5072 * non-zero unique flow_id on success, otherwise 0 and 5073 * error/rte_error are set. 5074 */ 5075 static uint32_t 5076 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 5077 struct rte_flow_action *split_actions, 5078 const struct rte_flow_action *actions, 5079 const struct rte_flow_action *qrss, 5080 int actions_n, struct rte_flow_error *error) 5081 { 5082 struct mlx5_priv *priv = dev->data->dev_private; 5083 struct mlx5_rte_flow_action_set_tag *set_tag; 5084 struct rte_flow_action_jump *jump; 5085 const int qrss_idx = qrss - actions; 5086 uint32_t flow_id = 0; 5087 int ret = 0; 5088 5089 /* 5090 * Given actions will be split 5091 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 5092 * - Add jump to mreg CP_TBL. 5093 * As a result, there will be one more action. 5094 */ 5095 ++actions_n; 5096 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 5097 set_tag = (void *)(split_actions + actions_n); 5098 /* 5099 * If tag action is not set to void(it means we are not the meter 5100 * suffix flow), add the tag action. Since meter suffix flow already 5101 * has the tag added. 5102 */ 5103 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 5104 /* 5105 * Allocate the new subflow ID. This one is unique within 5106 * device and not shared with representors. Otherwise, 5107 * we would have to resolve multi-thread access synch 5108 * issue. Each flow on the shared device is appended 5109 * with source vport identifier, so the resulting 5110 * flows will be unique in the shared (by master and 5111 * representors) domain even if they have coinciding 5112 * IDs. 5113 */ 5114 mlx5_ipool_malloc(priv->sh->ipool 5115 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); 5116 if (!flow_id) 5117 return rte_flow_error_set(error, ENOMEM, 5118 RTE_FLOW_ERROR_TYPE_ACTION, 5119 NULL, "can't allocate id " 5120 "for split Q/RSS subflow"); 5121 /* Internal SET_TAG action to set flow ID. */ 5122 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 5123 .data = flow_id, 5124 }; 5125 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 5126 if (ret < 0) 5127 return ret; 5128 set_tag->id = ret; 5129 /* Construct new actions array. */ 5130 /* Replace QUEUE/RSS action. */ 5131 split_actions[qrss_idx] = (struct rte_flow_action){ 5132 .type = (enum rte_flow_action_type) 5133 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5134 .conf = set_tag, 5135 }; 5136 } 5137 /* JUMP action to jump to mreg copy table (CP_TBL). */ 5138 jump = (void *)(set_tag + 1); 5139 *jump = (struct rte_flow_action_jump){ 5140 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 5141 }; 5142 split_actions[actions_n - 2] = (struct rte_flow_action){ 5143 .type = RTE_FLOW_ACTION_TYPE_JUMP, 5144 .conf = jump, 5145 }; 5146 split_actions[actions_n - 1] = (struct rte_flow_action){ 5147 .type = RTE_FLOW_ACTION_TYPE_END, 5148 }; 5149 return flow_id; 5150 } 5151 5152 /** 5153 * Extend the given action list for Tx metadata copy. 5154 * 5155 * Copy the given action list to the ext_actions and add flow metadata register 5156 * copy action in order to copy reg_a set by WQE to reg_c[0]. 5157 * 5158 * @param[out] ext_actions 5159 * Pointer to the extended action list. 5160 * @param[in] actions 5161 * Pointer to the list of actions. 5162 * @param[in] actions_n 5163 * Number of actions in the list. 5164 * @param[out] error 5165 * Perform verbose error reporting if not NULL. 5166 * @param[in] encap_idx 5167 * The encap action inndex. 5168 * 5169 * @return 5170 * 0 on success, negative value otherwise 5171 */ 5172 static int 5173 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 5174 struct rte_flow_action *ext_actions, 5175 const struct rte_flow_action *actions, 5176 int actions_n, struct rte_flow_error *error, 5177 int encap_idx) 5178 { 5179 struct mlx5_flow_action_copy_mreg *cp_mreg = 5180 (struct mlx5_flow_action_copy_mreg *) 5181 (ext_actions + actions_n + 1); 5182 int ret; 5183 5184 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 5185 if (ret < 0) 5186 return ret; 5187 cp_mreg->dst = ret; 5188 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 5189 if (ret < 0) 5190 return ret; 5191 cp_mreg->src = ret; 5192 if (encap_idx != 0) 5193 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 5194 if (encap_idx == actions_n - 1) { 5195 ext_actions[actions_n - 1] = (struct rte_flow_action){ 5196 .type = (enum rte_flow_action_type) 5197 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5198 .conf = cp_mreg, 5199 }; 5200 ext_actions[actions_n] = (struct rte_flow_action){ 5201 .type = RTE_FLOW_ACTION_TYPE_END, 5202 }; 5203 } else { 5204 ext_actions[encap_idx] = (struct rte_flow_action){ 5205 .type = (enum rte_flow_action_type) 5206 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5207 .conf = cp_mreg, 5208 }; 5209 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 5210 sizeof(*ext_actions) * (actions_n - encap_idx)); 5211 } 5212 return 0; 5213 } 5214 5215 /** 5216 * Check the match action from the action list. 5217 * 5218 * @param[in] actions 5219 * Pointer to the list of actions. 5220 * @param[in] attr 5221 * Flow rule attributes. 5222 * @param[in] action 5223 * The action to be check if exist. 5224 * @param[out] match_action_pos 5225 * Pointer to the position of the matched action if exists, otherwise is -1. 5226 * @param[out] qrss_action_pos 5227 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 5228 * @param[out] modify_after_mirror 5229 * Pointer to the flag of modify action after FDB mirroring. 5230 * 5231 * @return 5232 * > 0 the total number of actions. 5233 * 0 if not found match action in action list. 5234 */ 5235 static int 5236 flow_check_match_action(const struct rte_flow_action actions[], 5237 const struct rte_flow_attr *attr, 5238 enum rte_flow_action_type action, 5239 int *match_action_pos, int *qrss_action_pos, 5240 int *modify_after_mirror) 5241 { 5242 const struct rte_flow_action_sample *sample; 5243 int actions_n = 0; 5244 uint32_t ratio = 0; 5245 int sub_type = 0; 5246 int flag = 0; 5247 int fdb_mirror = 0; 5248 5249 *match_action_pos = -1; 5250 *qrss_action_pos = -1; 5251 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5252 if (actions->type == action) { 5253 flag = 1; 5254 *match_action_pos = actions_n; 5255 } 5256 switch (actions->type) { 5257 case RTE_FLOW_ACTION_TYPE_QUEUE: 5258 case RTE_FLOW_ACTION_TYPE_RSS: 5259 *qrss_action_pos = actions_n; 5260 break; 5261 case RTE_FLOW_ACTION_TYPE_SAMPLE: 5262 sample = actions->conf; 5263 ratio = sample->ratio; 5264 sub_type = ((const struct rte_flow_action *) 5265 (sample->actions))->type; 5266 if (ratio == 1 && attr->transfer) 5267 fdb_mirror = 1; 5268 break; 5269 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 5270 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 5271 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 5272 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 5273 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 5274 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 5275 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 5276 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 5277 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 5278 case RTE_FLOW_ACTION_TYPE_SET_TTL: 5279 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 5280 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 5281 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 5282 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 5283 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 5284 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 5285 case RTE_FLOW_ACTION_TYPE_FLAG: 5286 case RTE_FLOW_ACTION_TYPE_MARK: 5287 case RTE_FLOW_ACTION_TYPE_SET_META: 5288 case RTE_FLOW_ACTION_TYPE_SET_TAG: 5289 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 5290 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5291 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5292 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 5293 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5294 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5295 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5296 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 5297 case RTE_FLOW_ACTION_TYPE_METER: 5298 if (fdb_mirror) 5299 *modify_after_mirror = 1; 5300 break; 5301 default: 5302 break; 5303 } 5304 actions_n++; 5305 } 5306 if (flag && fdb_mirror && !*modify_after_mirror) { 5307 /* FDB mirroring uses the destination array to implement 5308 * instead of FLOW_SAMPLER object. 5309 */ 5310 if (sub_type != RTE_FLOW_ACTION_TYPE_END) 5311 flag = 0; 5312 } 5313 /* Count RTE_FLOW_ACTION_TYPE_END. */ 5314 return flag ? actions_n + 1 : 0; 5315 } 5316 5317 #define SAMPLE_SUFFIX_ITEM 2 5318 5319 /** 5320 * Split the sample flow. 5321 * 5322 * As sample flow will split to two sub flow, sample flow with 5323 * sample action, the other actions will move to new suffix flow. 5324 * 5325 * Also add unique tag id with tag action in the sample flow, 5326 * the same tag id will be as match in the suffix flow. 5327 * 5328 * @param dev 5329 * Pointer to Ethernet device. 5330 * @param[in] add_tag 5331 * Add extra tag action flag. 5332 * @param[out] sfx_items 5333 * Suffix flow match items (list terminated by the END pattern item). 5334 * @param[in] actions 5335 * Associated actions (list terminated by the END action). 5336 * @param[out] actions_sfx 5337 * Suffix flow actions. 5338 * @param[out] actions_pre 5339 * Prefix flow actions. 5340 * @param[in] actions_n 5341 * The total number of actions. 5342 * @param[in] sample_action_pos 5343 * The sample action position. 5344 * @param[in] qrss_action_pos 5345 * The Queue/RSS action position. 5346 * @param[in] jump_table 5347 * Add extra jump action flag. 5348 * @param[out] error 5349 * Perform verbose error reporting if not NULL. 5350 * 5351 * @return 5352 * 0 on success, or unique flow_id, a negative errno value 5353 * otherwise and rte_errno is set. 5354 */ 5355 static int 5356 flow_sample_split_prep(struct rte_eth_dev *dev, 5357 int add_tag, 5358 struct rte_flow_item sfx_items[], 5359 const struct rte_flow_action actions[], 5360 struct rte_flow_action actions_sfx[], 5361 struct rte_flow_action actions_pre[], 5362 int actions_n, 5363 int sample_action_pos, 5364 int qrss_action_pos, 5365 int jump_table, 5366 struct rte_flow_error *error) 5367 { 5368 struct mlx5_priv *priv = dev->data->dev_private; 5369 struct mlx5_rte_flow_action_set_tag *set_tag; 5370 struct mlx5_rte_flow_item_tag *tag_spec; 5371 struct mlx5_rte_flow_item_tag *tag_mask; 5372 struct rte_flow_action_jump *jump_action; 5373 uint32_t tag_id = 0; 5374 int index; 5375 int append_index = 0; 5376 int ret; 5377 5378 if (sample_action_pos < 0) 5379 return rte_flow_error_set(error, EINVAL, 5380 RTE_FLOW_ERROR_TYPE_ACTION, 5381 NULL, "invalid position of sample " 5382 "action in list"); 5383 /* Prepare the actions for prefix and suffix flow. */ 5384 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 5385 index = qrss_action_pos; 5386 /* Put the preceding the Queue/RSS action into prefix flow. */ 5387 if (index != 0) 5388 memcpy(actions_pre, actions, 5389 sizeof(struct rte_flow_action) * index); 5390 /* Put others preceding the sample action into prefix flow. */ 5391 if (sample_action_pos > index + 1) 5392 memcpy(actions_pre + index, actions + index + 1, 5393 sizeof(struct rte_flow_action) * 5394 (sample_action_pos - index - 1)); 5395 index = sample_action_pos - 1; 5396 /* Put Queue/RSS action into Suffix flow. */ 5397 memcpy(actions_sfx, actions + qrss_action_pos, 5398 sizeof(struct rte_flow_action)); 5399 actions_sfx++; 5400 } else { 5401 index = sample_action_pos; 5402 if (index != 0) 5403 memcpy(actions_pre, actions, 5404 sizeof(struct rte_flow_action) * index); 5405 } 5406 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress. 5407 * For CX6DX and above, metadata registers Cx preserve their value, 5408 * add an extra tag action for NIC-RX and E-Switch Domain. 5409 */ 5410 if (add_tag) { 5411 /* Prepare the prefix tag action. */ 5412 append_index++; 5413 set_tag = (void *)(actions_pre + actions_n + append_index); 5414 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); 5415 if (ret < 0) 5416 return ret; 5417 mlx5_ipool_malloc(priv->sh->ipool 5418 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); 5419 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5420 .id = ret, 5421 .data = tag_id, 5422 }; 5423 /* Prepare the suffix subflow items. */ 5424 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 5425 tag_spec->data = tag_id; 5426 tag_spec->id = set_tag->id; 5427 tag_mask = tag_spec + 1; 5428 tag_mask->data = UINT32_MAX; 5429 sfx_items[0] = (struct rte_flow_item){ 5430 .type = (enum rte_flow_item_type) 5431 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5432 .spec = tag_spec, 5433 .last = NULL, 5434 .mask = tag_mask, 5435 }; 5436 sfx_items[1] = (struct rte_flow_item){ 5437 .type = (enum rte_flow_item_type) 5438 RTE_FLOW_ITEM_TYPE_END, 5439 }; 5440 /* Prepare the tag action in prefix subflow. */ 5441 actions_pre[index++] = 5442 (struct rte_flow_action){ 5443 .type = (enum rte_flow_action_type) 5444 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5445 .conf = set_tag, 5446 }; 5447 } 5448 memcpy(actions_pre + index, actions + sample_action_pos, 5449 sizeof(struct rte_flow_action)); 5450 index += 1; 5451 /* For the modify action after the sample action in E-Switch mirroring, 5452 * Add the extra jump action in prefix subflow and jump into the next 5453 * table, then do the modify action in the new table. 5454 */ 5455 if (jump_table) { 5456 /* Prepare the prefix jump action. */ 5457 append_index++; 5458 jump_action = (void *)(actions_pre + actions_n + append_index); 5459 jump_action->group = jump_table; 5460 actions_pre[index++] = 5461 (struct rte_flow_action){ 5462 .type = (enum rte_flow_action_type) 5463 RTE_FLOW_ACTION_TYPE_JUMP, 5464 .conf = jump_action, 5465 }; 5466 } 5467 actions_pre[index] = (struct rte_flow_action){ 5468 .type = (enum rte_flow_action_type) 5469 RTE_FLOW_ACTION_TYPE_END, 5470 }; 5471 /* Put the actions after sample into Suffix flow. */ 5472 memcpy(actions_sfx, actions + sample_action_pos + 1, 5473 sizeof(struct rte_flow_action) * 5474 (actions_n - sample_action_pos - 1)); 5475 return tag_id; 5476 } 5477 5478 /** 5479 * The splitting for metadata feature. 5480 * 5481 * - Q/RSS action on NIC Rx should be split in order to pass by 5482 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5483 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5484 * 5485 * - All the actions on NIC Tx should have a mreg copy action to 5486 * copy reg_a from WQE to reg_c[0]. 5487 * 5488 * @param dev 5489 * Pointer to Ethernet device. 5490 * @param[in] flow 5491 * Parent flow structure pointer. 5492 * @param[in] attr 5493 * Flow rule attributes. 5494 * @param[in] items 5495 * Pattern specification (list terminated by the END pattern item). 5496 * @param[in] actions 5497 * Associated actions (list terminated by the END action). 5498 * @param[in] flow_split_info 5499 * Pointer to flow split info structure. 5500 * @param[out] error 5501 * Perform verbose error reporting if not NULL. 5502 * @return 5503 * 0 on success, negative value otherwise 5504 */ 5505 static int 5506 flow_create_split_metadata(struct rte_eth_dev *dev, 5507 struct rte_flow *flow, 5508 const struct rte_flow_attr *attr, 5509 const struct rte_flow_item items[], 5510 const struct rte_flow_action actions[], 5511 struct mlx5_flow_split_info *flow_split_info, 5512 struct rte_flow_error *error) 5513 { 5514 struct mlx5_priv *priv = dev->data->dev_private; 5515 struct mlx5_dev_config *config = &priv->config; 5516 const struct rte_flow_action *qrss = NULL; 5517 struct rte_flow_action *ext_actions = NULL; 5518 struct mlx5_flow *dev_flow = NULL; 5519 uint32_t qrss_id = 0; 5520 int mtr_sfx = 0; 5521 size_t act_size; 5522 int actions_n; 5523 int encap_idx; 5524 int ret; 5525 5526 /* Check whether extensive metadata feature is engaged. */ 5527 if (!config->dv_flow_en || 5528 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 5529 !mlx5_flow_ext_mreg_supported(dev)) 5530 return flow_create_split_inner(dev, flow, NULL, attr, items, 5531 actions, flow_split_info, error); 5532 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 5533 &encap_idx); 5534 if (qrss) { 5535 /* Exclude hairpin flows from splitting. */ 5536 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 5537 const struct rte_flow_action_queue *queue; 5538 5539 queue = qrss->conf; 5540 if (mlx5_rxq_get_type(dev, queue->index) == 5541 MLX5_RXQ_TYPE_HAIRPIN) 5542 qrss = NULL; 5543 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 5544 const struct rte_flow_action_rss *rss; 5545 5546 rss = qrss->conf; 5547 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 5548 MLX5_RXQ_TYPE_HAIRPIN) 5549 qrss = NULL; 5550 } 5551 } 5552 if (qrss) { 5553 /* Check if it is in meter suffix table. */ 5554 mtr_sfx = attr->group == (attr->transfer ? 5555 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5556 MLX5_FLOW_TABLE_LEVEL_METER); 5557 /* 5558 * Q/RSS action on NIC Rx should be split in order to pass by 5559 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5560 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5561 */ 5562 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5563 sizeof(struct rte_flow_action_set_tag) + 5564 sizeof(struct rte_flow_action_jump); 5565 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5566 SOCKET_ID_ANY); 5567 if (!ext_actions) 5568 return rte_flow_error_set(error, ENOMEM, 5569 RTE_FLOW_ERROR_TYPE_ACTION, 5570 NULL, "no memory to split " 5571 "metadata flow"); 5572 /* 5573 * If we are the suffix flow of meter, tag already exist. 5574 * Set the tag action to void. 5575 */ 5576 if (mtr_sfx) 5577 ext_actions[qrss - actions].type = 5578 RTE_FLOW_ACTION_TYPE_VOID; 5579 else 5580 ext_actions[qrss - actions].type = 5581 (enum rte_flow_action_type) 5582 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5583 /* 5584 * Create the new actions list with removed Q/RSS action 5585 * and appended set tag and jump to register copy table 5586 * (RX_CP_TBL). We should preallocate unique tag ID here 5587 * in advance, because it is needed for set tag action. 5588 */ 5589 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5590 qrss, actions_n, error); 5591 if (!mtr_sfx && !qrss_id) { 5592 ret = -rte_errno; 5593 goto exit; 5594 } 5595 } else if (attr->egress && !attr->transfer) { 5596 /* 5597 * All the actions on NIC Tx should have a metadata register 5598 * copy action to copy reg_a from WQE to reg_c[meta] 5599 */ 5600 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5601 sizeof(struct mlx5_flow_action_copy_mreg); 5602 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5603 SOCKET_ID_ANY); 5604 if (!ext_actions) 5605 return rte_flow_error_set(error, ENOMEM, 5606 RTE_FLOW_ERROR_TYPE_ACTION, 5607 NULL, "no memory to split " 5608 "metadata flow"); 5609 /* Create the action list appended with copy register. */ 5610 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5611 actions_n, error, encap_idx); 5612 if (ret < 0) 5613 goto exit; 5614 } 5615 /* Add the unmodified original or prefix subflow. */ 5616 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5617 items, ext_actions ? ext_actions : 5618 actions, flow_split_info, error); 5619 if (ret < 0) 5620 goto exit; 5621 MLX5_ASSERT(dev_flow); 5622 if (qrss) { 5623 const struct rte_flow_attr q_attr = { 5624 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5625 .ingress = 1, 5626 }; 5627 /* Internal PMD action to set register. */ 5628 struct mlx5_rte_flow_item_tag q_tag_spec = { 5629 .data = qrss_id, 5630 .id = REG_NON, 5631 }; 5632 struct rte_flow_item q_items[] = { 5633 { 5634 .type = (enum rte_flow_item_type) 5635 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5636 .spec = &q_tag_spec, 5637 .last = NULL, 5638 .mask = NULL, 5639 }, 5640 { 5641 .type = RTE_FLOW_ITEM_TYPE_END, 5642 }, 5643 }; 5644 struct rte_flow_action q_actions[] = { 5645 { 5646 .type = qrss->type, 5647 .conf = qrss->conf, 5648 }, 5649 { 5650 .type = RTE_FLOW_ACTION_TYPE_END, 5651 }, 5652 }; 5653 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5654 5655 /* 5656 * Configure the tag item only if there is no meter subflow. 5657 * Since tag is already marked in the meter suffix subflow 5658 * we can just use the meter suffix items as is. 5659 */ 5660 if (qrss_id) { 5661 /* Not meter subflow. */ 5662 MLX5_ASSERT(!mtr_sfx); 5663 /* 5664 * Put unique id in prefix flow due to it is destroyed 5665 * after suffix flow and id will be freed after there 5666 * is no actual flows with this id and identifier 5667 * reallocation becomes possible (for example, for 5668 * other flows in other threads). 5669 */ 5670 dev_flow->handle->split_flow_id = qrss_id; 5671 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5672 error); 5673 if (ret < 0) 5674 goto exit; 5675 q_tag_spec.id = ret; 5676 } 5677 dev_flow = NULL; 5678 /* Add suffix subflow to execute Q/RSS. */ 5679 flow_split_info->prefix_layers = layers; 5680 flow_split_info->prefix_mark = 0; 5681 ret = flow_create_split_inner(dev, flow, &dev_flow, 5682 &q_attr, mtr_sfx ? items : 5683 q_items, q_actions, 5684 flow_split_info, error); 5685 if (ret < 0) 5686 goto exit; 5687 /* qrss ID should be freed if failed. */ 5688 qrss_id = 0; 5689 MLX5_ASSERT(dev_flow); 5690 } 5691 5692 exit: 5693 /* 5694 * We do not destroy the partially created sub_flows in case of error. 5695 * These ones are included into parent flow list and will be destroyed 5696 * by flow_drv_destroy. 5697 */ 5698 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 5699 qrss_id); 5700 mlx5_free(ext_actions); 5701 return ret; 5702 } 5703 5704 /** 5705 * Create meter internal drop flow with the original pattern. 5706 * 5707 * @param dev 5708 * Pointer to Ethernet device. 5709 * @param[in] flow 5710 * Parent flow structure pointer. 5711 * @param[in] attr 5712 * Flow rule attributes. 5713 * @param[in] items 5714 * Pattern specification (list terminated by the END pattern item). 5715 * @param[in] flow_split_info 5716 * Pointer to flow split info structure. 5717 * @param[in] fm 5718 * Pointer to flow meter structure. 5719 * @param[out] error 5720 * Perform verbose error reporting if not NULL. 5721 * @return 5722 * 0 on success, negative value otherwise 5723 */ 5724 static uint32_t 5725 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev, 5726 struct rte_flow *flow, 5727 const struct rte_flow_attr *attr, 5728 const struct rte_flow_item items[], 5729 struct mlx5_flow_split_info *flow_split_info, 5730 struct mlx5_flow_meter_info *fm, 5731 struct rte_flow_error *error) 5732 { 5733 struct mlx5_flow *dev_flow = NULL; 5734 struct rte_flow_attr drop_attr = *attr; 5735 struct rte_flow_action drop_actions[3]; 5736 struct mlx5_flow_split_info drop_split_info = *flow_split_info; 5737 5738 MLX5_ASSERT(fm->drop_cnt); 5739 drop_actions[0].type = 5740 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 5741 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt; 5742 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP; 5743 drop_actions[1].conf = NULL; 5744 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END; 5745 drop_actions[2].conf = NULL; 5746 drop_split_info.external = false; 5747 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5748 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP; 5749 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER; 5750 return flow_create_split_inner(dev, flow, &dev_flow, 5751 &drop_attr, items, drop_actions, 5752 &drop_split_info, error); 5753 } 5754 5755 /** 5756 * The splitting for meter feature. 5757 * 5758 * - The meter flow will be split to two flows as prefix and 5759 * suffix flow. The packets make sense only it pass the prefix 5760 * meter action. 5761 * 5762 * - Reg_C_5 is used for the packet to match betweend prefix and 5763 * suffix flow. 5764 * 5765 * @param dev 5766 * Pointer to Ethernet device. 5767 * @param[in] flow 5768 * Parent flow structure pointer. 5769 * @param[in] attr 5770 * Flow rule attributes. 5771 * @param[in] items 5772 * Pattern specification (list terminated by the END pattern item). 5773 * @param[in] actions 5774 * Associated actions (list terminated by the END action). 5775 * @param[in] flow_split_info 5776 * Pointer to flow split info structure. 5777 * @param[out] error 5778 * Perform verbose error reporting if not NULL. 5779 * @return 5780 * 0 on success, negative value otherwise 5781 */ 5782 static int 5783 flow_create_split_meter(struct rte_eth_dev *dev, 5784 struct rte_flow *flow, 5785 const struct rte_flow_attr *attr, 5786 const struct rte_flow_item items[], 5787 const struct rte_flow_action actions[], 5788 struct mlx5_flow_split_info *flow_split_info, 5789 struct rte_flow_error *error) 5790 { 5791 struct mlx5_priv *priv = dev->data->dev_private; 5792 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); 5793 struct rte_flow_action *sfx_actions = NULL; 5794 struct rte_flow_action *pre_actions = NULL; 5795 struct rte_flow_item *sfx_items = NULL; 5796 struct mlx5_flow *dev_flow = NULL; 5797 struct rte_flow_attr sfx_attr = *attr; 5798 struct mlx5_flow_meter_info *fm = NULL; 5799 uint8_t skip_scale_restore; 5800 bool has_mtr = false; 5801 bool has_modify = false; 5802 bool set_mtr_reg = true; 5803 bool is_mtr_hierarchy = false; 5804 uint32_t meter_id = 0; 5805 uint32_t mtr_idx = 0; 5806 uint32_t mtr_flow_id = 0; 5807 size_t act_size; 5808 size_t item_size; 5809 int actions_n = 0; 5810 int ret = 0; 5811 5812 if (priv->mtr_en) 5813 actions_n = flow_check_meter_action(dev, actions, &has_mtr, 5814 &has_modify, &meter_id); 5815 if (has_mtr) { 5816 if (flow->meter) { 5817 fm = flow_dv_meter_find_by_idx(priv, flow->meter); 5818 if (!fm) 5819 return rte_flow_error_set(error, EINVAL, 5820 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5821 NULL, "Meter not found."); 5822 } else { 5823 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx); 5824 if (!fm) 5825 return rte_flow_error_set(error, EINVAL, 5826 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5827 NULL, "Meter not found."); 5828 ret = mlx5_flow_meter_attach(priv, fm, 5829 &sfx_attr, error); 5830 if (ret) 5831 return -rte_errno; 5832 flow->meter = mtr_idx; 5833 } 5834 MLX5_ASSERT(wks); 5835 wks->fm = fm; 5836 if (!fm->def_policy) { 5837 wks->policy = mlx5_flow_meter_policy_find(dev, 5838 fm->policy_id, 5839 NULL); 5840 MLX5_ASSERT(wks->policy); 5841 if (wks->policy->is_hierarchy) { 5842 wks->final_policy = 5843 mlx5_flow_meter_hierarchy_get_final_policy(dev, 5844 wks->policy); 5845 if (!wks->final_policy) 5846 return rte_flow_error_set(error, 5847 EINVAL, 5848 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 5849 "Failed to find terminal policy of hierarchy."); 5850 is_mtr_hierarchy = true; 5851 } 5852 } 5853 /* 5854 * If it isn't default-policy Meter, and 5855 * 1. There's no action in flow to change 5856 * packet (modify/encap/decap etc.), OR 5857 * 2. No drop count needed for this meter. 5858 * 3. It's not meter hierarchy. 5859 * Then no need to use regC to save meter id anymore. 5860 */ 5861 if (!fm->def_policy && !is_mtr_hierarchy && 5862 (!has_modify || !fm->drop_cnt)) 5863 set_mtr_reg = false; 5864 /* Prefix actions: meter, decap, encap, tag, jump, end. */ 5865 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) + 5866 sizeof(struct mlx5_rte_flow_action_set_tag); 5867 /* Suffix items: tag, vlan, port id, end. */ 5868 #define METER_SUFFIX_ITEM 4 5869 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 5870 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5871 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 5872 0, SOCKET_ID_ANY); 5873 if (!sfx_actions) 5874 return rte_flow_error_set(error, ENOMEM, 5875 RTE_FLOW_ERROR_TYPE_ACTION, 5876 NULL, "no memory to split " 5877 "meter flow"); 5878 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 5879 act_size); 5880 /* There's no suffix flow for meter of non-default policy. */ 5881 if (!fm->def_policy) 5882 pre_actions = sfx_actions + 1; 5883 else 5884 pre_actions = sfx_actions + actions_n; 5885 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr, 5886 items, sfx_items, actions, 5887 sfx_actions, pre_actions, 5888 (set_mtr_reg ? &mtr_flow_id : NULL), 5889 error); 5890 if (ret) { 5891 ret = -rte_errno; 5892 goto exit; 5893 } 5894 /* Add the prefix subflow. */ 5895 flow_split_info->prefix_mark = 0; 5896 skip_scale_restore = flow_split_info->skip_scale; 5897 flow_split_info->skip_scale |= 5898 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 5899 ret = flow_create_split_inner(dev, flow, &dev_flow, 5900 attr, items, pre_actions, 5901 flow_split_info, error); 5902 flow_split_info->skip_scale = skip_scale_restore; 5903 if (ret) { 5904 if (mtr_flow_id) 5905 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id); 5906 ret = -rte_errno; 5907 goto exit; 5908 } 5909 if (mtr_flow_id) { 5910 dev_flow->handle->split_flow_id = mtr_flow_id; 5911 dev_flow->handle->is_meter_flow_id = 1; 5912 } 5913 if (!fm->def_policy) { 5914 if (!set_mtr_reg && fm->drop_cnt) 5915 ret = 5916 flow_meter_create_drop_flow_with_org_pattern(dev, flow, 5917 &sfx_attr, items, 5918 flow_split_info, 5919 fm, error); 5920 goto exit; 5921 } 5922 /* Setting the sfx group atrr. */ 5923 sfx_attr.group = sfx_attr.transfer ? 5924 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5925 MLX5_FLOW_TABLE_LEVEL_METER; 5926 flow_split_info->prefix_layers = 5927 flow_get_prefix_layer_flags(dev_flow); 5928 flow_split_info->prefix_mark = dev_flow->handle->mark; 5929 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX; 5930 } 5931 /* Add the prefix subflow. */ 5932 ret = flow_create_split_metadata(dev, flow, 5933 &sfx_attr, sfx_items ? 5934 sfx_items : items, 5935 sfx_actions ? sfx_actions : actions, 5936 flow_split_info, error); 5937 exit: 5938 if (sfx_actions) 5939 mlx5_free(sfx_actions); 5940 return ret; 5941 } 5942 5943 /** 5944 * The splitting for sample feature. 5945 * 5946 * Once Sample action is detected in the action list, the flow actions should 5947 * be split into prefix sub flow and suffix sub flow. 5948 * 5949 * The original items remain in the prefix sub flow, all actions preceding the 5950 * sample action and the sample action itself will be copied to the prefix 5951 * sub flow, the actions following the sample action will be copied to the 5952 * suffix sub flow, Queue action always be located in the suffix sub flow. 5953 * 5954 * In order to make the packet from prefix sub flow matches with suffix sub 5955 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 5956 * flow uses tag item with the unique flow id. 5957 * 5958 * @param dev 5959 * Pointer to Ethernet device. 5960 * @param[in] flow 5961 * Parent flow structure pointer. 5962 * @param[in] attr 5963 * Flow rule attributes. 5964 * @param[in] items 5965 * Pattern specification (list terminated by the END pattern item). 5966 * @param[in] actions 5967 * Associated actions (list terminated by the END action). 5968 * @param[in] flow_split_info 5969 * Pointer to flow split info structure. 5970 * @param[out] error 5971 * Perform verbose error reporting if not NULL. 5972 * @return 5973 * 0 on success, negative value otherwise 5974 */ 5975 static int 5976 flow_create_split_sample(struct rte_eth_dev *dev, 5977 struct rte_flow *flow, 5978 const struct rte_flow_attr *attr, 5979 const struct rte_flow_item items[], 5980 const struct rte_flow_action actions[], 5981 struct mlx5_flow_split_info *flow_split_info, 5982 struct rte_flow_error *error) 5983 { 5984 struct mlx5_priv *priv = dev->data->dev_private; 5985 struct rte_flow_action *sfx_actions = NULL; 5986 struct rte_flow_action *pre_actions = NULL; 5987 struct rte_flow_item *sfx_items = NULL; 5988 struct mlx5_flow *dev_flow = NULL; 5989 struct rte_flow_attr sfx_attr = *attr; 5990 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5991 struct mlx5_flow_dv_sample_resource *sample_res; 5992 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 5993 struct mlx5_flow_tbl_resource *sfx_tbl; 5994 #endif 5995 size_t act_size; 5996 size_t item_size; 5997 uint32_t fdb_tx = 0; 5998 int32_t tag_id = 0; 5999 int actions_n = 0; 6000 int sample_action_pos; 6001 int qrss_action_pos; 6002 int add_tag = 0; 6003 int modify_after_mirror = 0; 6004 uint16_t jump_table = 0; 6005 const uint32_t next_ft_step = 1; 6006 int ret = 0; 6007 6008 if (priv->sampler_en) 6009 actions_n = flow_check_match_action(actions, attr, 6010 RTE_FLOW_ACTION_TYPE_SAMPLE, 6011 &sample_action_pos, &qrss_action_pos, 6012 &modify_after_mirror); 6013 if (actions_n) { 6014 /* The prefix actions must includes sample, tag, end. */ 6015 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 6016 + sizeof(struct mlx5_rte_flow_action_set_tag); 6017 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 6018 sizeof(struct mlx5_rte_flow_item_tag) * 2; 6019 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 6020 item_size), 0, SOCKET_ID_ANY); 6021 if (!sfx_actions) 6022 return rte_flow_error_set(error, ENOMEM, 6023 RTE_FLOW_ERROR_TYPE_ACTION, 6024 NULL, "no memory to split " 6025 "sample flow"); 6026 /* The representor_id is UINT16_MAX for uplink. */ 6027 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX); 6028 /* 6029 * When reg_c_preserve is set, metadata registers Cx preserve 6030 * their value even through packet duplication. 6031 */ 6032 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve); 6033 if (add_tag) 6034 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 6035 + act_size); 6036 if (modify_after_mirror) 6037 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR + 6038 next_ft_step; 6039 pre_actions = sfx_actions + actions_n; 6040 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items, 6041 actions, sfx_actions, 6042 pre_actions, actions_n, 6043 sample_action_pos, 6044 qrss_action_pos, jump_table, 6045 error); 6046 if (tag_id < 0 || (add_tag && !tag_id)) { 6047 ret = -rte_errno; 6048 goto exit; 6049 } 6050 if (modify_after_mirror) 6051 flow_split_info->skip_scale = 6052 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 6053 /* Add the prefix subflow. */ 6054 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 6055 items, pre_actions, 6056 flow_split_info, error); 6057 if (ret) { 6058 ret = -rte_errno; 6059 goto exit; 6060 } 6061 dev_flow->handle->split_flow_id = tag_id; 6062 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 6063 if (!modify_after_mirror) { 6064 /* Set the sfx group attr. */ 6065 sample_res = (struct mlx5_flow_dv_sample_resource *) 6066 dev_flow->dv.sample_res; 6067 sfx_tbl = (struct mlx5_flow_tbl_resource *) 6068 sample_res->normal_path_tbl; 6069 sfx_tbl_data = container_of(sfx_tbl, 6070 struct mlx5_flow_tbl_data_entry, 6071 tbl); 6072 sfx_attr.group = sfx_attr.transfer ? 6073 (sfx_tbl_data->level - 1) : sfx_tbl_data->level; 6074 } else { 6075 MLX5_ASSERT(attr->transfer); 6076 sfx_attr.group = jump_table; 6077 } 6078 flow_split_info->prefix_layers = 6079 flow_get_prefix_layer_flags(dev_flow); 6080 flow_split_info->prefix_mark = dev_flow->handle->mark; 6081 /* Suffix group level already be scaled with factor, set 6082 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale 6083 * again in translation. 6084 */ 6085 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT; 6086 #endif 6087 } 6088 /* Add the suffix subflow. */ 6089 ret = flow_create_split_meter(dev, flow, &sfx_attr, 6090 sfx_items ? sfx_items : items, 6091 sfx_actions ? sfx_actions : actions, 6092 flow_split_info, error); 6093 exit: 6094 if (sfx_actions) 6095 mlx5_free(sfx_actions); 6096 return ret; 6097 } 6098 6099 /** 6100 * Split the flow to subflow set. The splitters might be linked 6101 * in the chain, like this: 6102 * flow_create_split_outer() calls: 6103 * flow_create_split_meter() calls: 6104 * flow_create_split_metadata(meter_subflow_0) calls: 6105 * flow_create_split_inner(metadata_subflow_0) 6106 * flow_create_split_inner(metadata_subflow_1) 6107 * flow_create_split_inner(metadata_subflow_2) 6108 * flow_create_split_metadata(meter_subflow_1) calls: 6109 * flow_create_split_inner(metadata_subflow_0) 6110 * flow_create_split_inner(metadata_subflow_1) 6111 * flow_create_split_inner(metadata_subflow_2) 6112 * 6113 * This provide flexible way to add new levels of flow splitting. 6114 * The all of successfully created subflows are included to the 6115 * parent flow dev_flow list. 6116 * 6117 * @param dev 6118 * Pointer to Ethernet device. 6119 * @param[in] flow 6120 * Parent flow structure pointer. 6121 * @param[in] attr 6122 * Flow rule attributes. 6123 * @param[in] items 6124 * Pattern specification (list terminated by the END pattern item). 6125 * @param[in] actions 6126 * Associated actions (list terminated by the END action). 6127 * @param[in] flow_split_info 6128 * Pointer to flow split info structure. 6129 * @param[out] error 6130 * Perform verbose error reporting if not NULL. 6131 * @return 6132 * 0 on success, negative value otherwise 6133 */ 6134 static int 6135 flow_create_split_outer(struct rte_eth_dev *dev, 6136 struct rte_flow *flow, 6137 const struct rte_flow_attr *attr, 6138 const struct rte_flow_item items[], 6139 const struct rte_flow_action actions[], 6140 struct mlx5_flow_split_info *flow_split_info, 6141 struct rte_flow_error *error) 6142 { 6143 int ret; 6144 6145 ret = flow_create_split_sample(dev, flow, attr, items, 6146 actions, flow_split_info, error); 6147 MLX5_ASSERT(ret <= 0); 6148 return ret; 6149 } 6150 6151 static inline struct mlx5_flow_tunnel * 6152 flow_tunnel_from_rule(const struct mlx5_flow *flow) 6153 { 6154 struct mlx5_flow_tunnel *tunnel; 6155 6156 #pragma GCC diagnostic push 6157 #pragma GCC diagnostic ignored "-Wcast-qual" 6158 tunnel = (typeof(tunnel))flow->tunnel; 6159 #pragma GCC diagnostic pop 6160 6161 return tunnel; 6162 } 6163 6164 /** 6165 * Adjust flow RSS workspace if needed. 6166 * 6167 * @param wks 6168 * Pointer to thread flow work space. 6169 * @param rss_desc 6170 * Pointer to RSS descriptor. 6171 * @param[in] nrssq_num 6172 * New RSS queue number. 6173 * 6174 * @return 6175 * 0 on success, -1 otherwise and rte_errno is set. 6176 */ 6177 static int 6178 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks, 6179 struct mlx5_flow_rss_desc *rss_desc, 6180 uint32_t nrssq_num) 6181 { 6182 if (likely(nrssq_num <= wks->rssq_num)) 6183 return 0; 6184 rss_desc->queue = realloc(rss_desc->queue, 6185 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2)); 6186 if (!rss_desc->queue) { 6187 rte_errno = ENOMEM; 6188 return -1; 6189 } 6190 wks->rssq_num = RTE_ALIGN(nrssq_num, 2); 6191 return 0; 6192 } 6193 6194 /** 6195 * Create a flow and add it to @p list. 6196 * 6197 * @param dev 6198 * Pointer to Ethernet device. 6199 * @param list 6200 * Pointer to a TAILQ flow list. If this parameter NULL, 6201 * no list insertion occurred, flow is just created, 6202 * this is caller's responsibility to track the 6203 * created flow. 6204 * @param[in] attr 6205 * Flow rule attributes. 6206 * @param[in] items 6207 * Pattern specification (list terminated by the END pattern item). 6208 * @param[in] actions 6209 * Associated actions (list terminated by the END action). 6210 * @param[in] external 6211 * This flow rule is created by request external to PMD. 6212 * @param[out] error 6213 * Perform verbose error reporting if not NULL. 6214 * 6215 * @return 6216 * A flow index on success, 0 otherwise and rte_errno is set. 6217 */ 6218 static uint32_t 6219 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6220 const struct rte_flow_attr *attr, 6221 const struct rte_flow_item items[], 6222 const struct rte_flow_action original_actions[], 6223 bool external, struct rte_flow_error *error) 6224 { 6225 struct mlx5_priv *priv = dev->data->dev_private; 6226 struct rte_flow *flow = NULL; 6227 struct mlx5_flow *dev_flow; 6228 const struct rte_flow_action_rss *rss = NULL; 6229 struct mlx5_translated_action_handle 6230 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6231 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6232 union { 6233 struct mlx5_flow_expand_rss buf; 6234 uint8_t buffer[2048]; 6235 } expand_buffer; 6236 union { 6237 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6238 uint8_t buffer[2048]; 6239 } actions_rx; 6240 union { 6241 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6242 uint8_t buffer[2048]; 6243 } actions_hairpin_tx; 6244 union { 6245 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 6246 uint8_t buffer[2048]; 6247 } items_tx; 6248 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 6249 struct mlx5_flow_rss_desc *rss_desc; 6250 const struct rte_flow_action *p_actions_rx; 6251 uint32_t i; 6252 uint32_t idx = 0; 6253 int hairpin_flow; 6254 struct rte_flow_attr attr_tx = { .priority = 0 }; 6255 const struct rte_flow_action *actions; 6256 struct rte_flow_action *translated_actions = NULL; 6257 struct mlx5_flow_tunnel *tunnel; 6258 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 6259 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace(); 6260 struct mlx5_flow_split_info flow_split_info = { 6261 .external = !!external, 6262 .skip_scale = 0, 6263 .flow_idx = 0, 6264 .prefix_mark = 0, 6265 .prefix_layers = 0, 6266 .table_id = 0 6267 }; 6268 int ret; 6269 6270 MLX5_ASSERT(wks); 6271 rss_desc = &wks->rss_desc; 6272 ret = flow_action_handles_translate(dev, original_actions, 6273 indir_actions, 6274 &indir_actions_n, 6275 &translated_actions, error); 6276 if (ret < 0) { 6277 MLX5_ASSERT(translated_actions == NULL); 6278 return 0; 6279 } 6280 actions = translated_actions ? translated_actions : original_actions; 6281 p_actions_rx = actions; 6282 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6283 ret = flow_drv_validate(dev, attr, items, p_actions_rx, 6284 external, hairpin_flow, error); 6285 if (ret < 0) 6286 goto error_before_hairpin_split; 6287 flow = mlx5_ipool_zmalloc(priv->flows[type], &idx); 6288 if (!flow) { 6289 rte_errno = ENOMEM; 6290 goto error_before_hairpin_split; 6291 } 6292 if (hairpin_flow > 0) { 6293 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 6294 rte_errno = EINVAL; 6295 goto error_before_hairpin_split; 6296 } 6297 flow_hairpin_split(dev, actions, actions_rx.actions, 6298 actions_hairpin_tx.actions, items_tx.items, 6299 idx); 6300 p_actions_rx = actions_rx.actions; 6301 } 6302 flow_split_info.flow_idx = idx; 6303 flow->drv_type = flow_get_drv_type(dev, attr); 6304 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 6305 flow->drv_type < MLX5_FLOW_TYPE_MAX); 6306 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue)); 6307 /* RSS Action only works on NIC RX domain */ 6308 if (attr->ingress && !attr->transfer) 6309 rss = flow_get_rss_action(dev, p_actions_rx); 6310 if (rss) { 6311 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num)) 6312 return 0; 6313 /* 6314 * The following information is required by 6315 * mlx5_flow_hashfields_adjust() in advance. 6316 */ 6317 rss_desc->level = rss->level; 6318 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */ 6319 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types; 6320 } 6321 flow->dev_handles = 0; 6322 if (rss && rss->types) { 6323 unsigned int graph_root; 6324 6325 graph_root = find_graph_root(items, rss->level); 6326 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 6327 items, rss->types, 6328 mlx5_support_expansion, graph_root); 6329 MLX5_ASSERT(ret > 0 && 6330 (unsigned int)ret < sizeof(expand_buffer.buffer)); 6331 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) { 6332 for (i = 0; i < buf->entries; ++i) 6333 mlx5_dbg__print_pattern(buf->entry[i].pattern); 6334 } 6335 } else { 6336 buf->entries = 1; 6337 buf->entry[0].pattern = (void *)(uintptr_t)items; 6338 } 6339 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions, 6340 indir_actions_n); 6341 for (i = 0; i < buf->entries; ++i) { 6342 /* Initialize flow split data. */ 6343 flow_split_info.prefix_layers = 0; 6344 flow_split_info.prefix_mark = 0; 6345 flow_split_info.skip_scale = 0; 6346 /* 6347 * The splitter may create multiple dev_flows, 6348 * depending on configuration. In the simplest 6349 * case it just creates unmodified original flow. 6350 */ 6351 ret = flow_create_split_outer(dev, flow, attr, 6352 buf->entry[i].pattern, 6353 p_actions_rx, &flow_split_info, 6354 error); 6355 if (ret < 0) 6356 goto error; 6357 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) { 6358 ret = flow_tunnel_add_default_miss(dev, flow, attr, 6359 p_actions_rx, 6360 idx, 6361 wks->flows[0].tunnel, 6362 &default_miss_ctx, 6363 error); 6364 if (ret < 0) { 6365 mlx5_free(default_miss_ctx.queue); 6366 goto error; 6367 } 6368 } 6369 } 6370 /* Create the tx flow. */ 6371 if (hairpin_flow) { 6372 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 6373 attr_tx.ingress = 0; 6374 attr_tx.egress = 1; 6375 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 6376 actions_hairpin_tx.actions, 6377 idx, error); 6378 if (!dev_flow) 6379 goto error; 6380 dev_flow->flow = flow; 6381 dev_flow->external = 0; 6382 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 6383 dev_flow->handle, next); 6384 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 6385 items_tx.items, 6386 actions_hairpin_tx.actions, error); 6387 if (ret < 0) 6388 goto error; 6389 } 6390 /* 6391 * Update the metadata register copy table. If extensive 6392 * metadata feature is enabled and registers are supported 6393 * we might create the extra rte_flow for each unique 6394 * MARK/FLAG action ID. 6395 * 6396 * The table is updated for ingress Flows only, because 6397 * the egress Flows belong to the different device and 6398 * copy table should be updated in peer NIC Rx domain. 6399 */ 6400 if (attr->ingress && 6401 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 6402 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 6403 if (ret) 6404 goto error; 6405 } 6406 /* 6407 * If the flow is external (from application) OR device is started, 6408 * OR mreg discover, then apply immediately. 6409 */ 6410 if (external || dev->data->dev_started || 6411 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP && 6412 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) { 6413 ret = flow_drv_apply(dev, flow, error); 6414 if (ret < 0) 6415 goto error; 6416 } 6417 flow->type = type; 6418 flow_rxq_flags_set(dev, flow); 6419 rte_free(translated_actions); 6420 tunnel = flow_tunnel_from_rule(wks->flows); 6421 if (tunnel) { 6422 flow->tunnel = 1; 6423 flow->tunnel_id = tunnel->tunnel_id; 6424 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 6425 mlx5_free(default_miss_ctx.queue); 6426 } 6427 mlx5_flow_pop_thread_workspace(); 6428 return idx; 6429 error: 6430 MLX5_ASSERT(flow); 6431 ret = rte_errno; /* Save rte_errno before cleanup. */ 6432 flow_mreg_del_copy_action(dev, flow); 6433 flow_drv_destroy(dev, flow); 6434 if (rss_desc->shared_rss) 6435 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *) 6436 mlx5_ipool_get 6437 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 6438 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED); 6439 mlx5_ipool_free(priv->flows[type], idx); 6440 rte_errno = ret; /* Restore rte_errno. */ 6441 ret = rte_errno; 6442 rte_errno = ret; 6443 mlx5_flow_pop_thread_workspace(); 6444 error_before_hairpin_split: 6445 rte_free(translated_actions); 6446 return 0; 6447 } 6448 6449 /** 6450 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 6451 * incoming packets to table 1. 6452 * 6453 * Other flow rules, requested for group n, will be created in 6454 * e-switch table n+1. 6455 * Jump action to e-switch group n will be created to group n+1. 6456 * 6457 * Used when working in switchdev mode, to utilise advantages of table 1 6458 * and above. 6459 * 6460 * @param dev 6461 * Pointer to Ethernet device. 6462 * 6463 * @return 6464 * Pointer to flow on success, NULL otherwise and rte_errno is set. 6465 */ 6466 struct rte_flow * 6467 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 6468 { 6469 const struct rte_flow_attr attr = { 6470 .group = 0, 6471 .priority = 0, 6472 .ingress = 1, 6473 .egress = 0, 6474 .transfer = 1, 6475 }; 6476 const struct rte_flow_item pattern = { 6477 .type = RTE_FLOW_ITEM_TYPE_END, 6478 }; 6479 struct rte_flow_action_jump jump = { 6480 .group = 1, 6481 }; 6482 const struct rte_flow_action actions[] = { 6483 { 6484 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6485 .conf = &jump, 6486 }, 6487 { 6488 .type = RTE_FLOW_ACTION_TYPE_END, 6489 }, 6490 }; 6491 struct rte_flow_error error; 6492 6493 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 6494 &attr, &pattern, 6495 actions, false, &error); 6496 } 6497 6498 /** 6499 * Validate a flow supported by the NIC. 6500 * 6501 * @see rte_flow_validate() 6502 * @see rte_flow_ops 6503 */ 6504 int 6505 mlx5_flow_validate(struct rte_eth_dev *dev, 6506 const struct rte_flow_attr *attr, 6507 const struct rte_flow_item items[], 6508 const struct rte_flow_action original_actions[], 6509 struct rte_flow_error *error) 6510 { 6511 int hairpin_flow; 6512 struct mlx5_translated_action_handle 6513 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6514 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6515 const struct rte_flow_action *actions; 6516 struct rte_flow_action *translated_actions = NULL; 6517 int ret = flow_action_handles_translate(dev, original_actions, 6518 indir_actions, 6519 &indir_actions_n, 6520 &translated_actions, error); 6521 6522 if (ret) 6523 return ret; 6524 actions = translated_actions ? translated_actions : original_actions; 6525 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6526 ret = flow_drv_validate(dev, attr, items, actions, 6527 true, hairpin_flow, error); 6528 rte_free(translated_actions); 6529 return ret; 6530 } 6531 6532 /** 6533 * Create a flow. 6534 * 6535 * @see rte_flow_create() 6536 * @see rte_flow_ops 6537 */ 6538 struct rte_flow * 6539 mlx5_flow_create(struct rte_eth_dev *dev, 6540 const struct rte_flow_attr *attr, 6541 const struct rte_flow_item items[], 6542 const struct rte_flow_action actions[], 6543 struct rte_flow_error *error) 6544 { 6545 /* 6546 * If the device is not started yet, it is not allowed to created a 6547 * flow from application. PMD default flows and traffic control flows 6548 * are not affected. 6549 */ 6550 if (unlikely(!dev->data->dev_started)) { 6551 DRV_LOG(DEBUG, "port %u is not started when " 6552 "inserting a flow", dev->data->port_id); 6553 rte_flow_error_set(error, ENODEV, 6554 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6555 NULL, 6556 "port not started"); 6557 return NULL; 6558 } 6559 6560 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN, 6561 attr, items, actions, 6562 true, error); 6563 } 6564 6565 /** 6566 * Destroy a flow in a list. 6567 * 6568 * @param dev 6569 * Pointer to Ethernet device. 6570 * @param[in] flow_idx 6571 * Index of flow to destroy. 6572 */ 6573 static void 6574 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6575 uint32_t flow_idx) 6576 { 6577 struct mlx5_priv *priv = dev->data->dev_private; 6578 struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx); 6579 6580 if (!flow) 6581 return; 6582 MLX5_ASSERT(flow->type == type); 6583 /* 6584 * Update RX queue flags only if port is started, otherwise it is 6585 * already clean. 6586 */ 6587 if (dev->data->dev_started) 6588 flow_rxq_flags_trim(dev, flow); 6589 flow_drv_destroy(dev, flow); 6590 if (flow->tunnel) { 6591 struct mlx5_flow_tunnel *tunnel; 6592 6593 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 6594 RTE_VERIFY(tunnel); 6595 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 6596 mlx5_flow_tunnel_free(dev, tunnel); 6597 } 6598 flow_mreg_del_copy_action(dev, flow); 6599 mlx5_ipool_free(priv->flows[type], flow_idx); 6600 } 6601 6602 /** 6603 * Destroy all flows. 6604 * 6605 * @param dev 6606 * Pointer to Ethernet device. 6607 * @param type 6608 * Flow type to be flushed. 6609 * @param active 6610 * If flushing is called avtively. 6611 */ 6612 void 6613 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type, 6614 bool active) 6615 { 6616 struct mlx5_priv *priv = dev->data->dev_private; 6617 uint32_t num_flushed = 0, fidx = 1; 6618 struct rte_flow *flow; 6619 6620 MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) { 6621 flow_list_destroy(dev, type, fidx); 6622 num_flushed++; 6623 } 6624 if (active) { 6625 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 6626 dev->data->port_id, num_flushed); 6627 } 6628 } 6629 6630 /** 6631 * Stop all default actions for flows. 6632 * 6633 * @param dev 6634 * Pointer to Ethernet device. 6635 */ 6636 void 6637 mlx5_flow_stop_default(struct rte_eth_dev *dev) 6638 { 6639 flow_mreg_del_default_copy_action(dev); 6640 flow_rxq_flags_clear(dev); 6641 } 6642 6643 /** 6644 * Start all default actions for flows. 6645 * 6646 * @param dev 6647 * Pointer to Ethernet device. 6648 * @return 6649 * 0 on success, a negative errno value otherwise and rte_errno is set. 6650 */ 6651 int 6652 mlx5_flow_start_default(struct rte_eth_dev *dev) 6653 { 6654 struct rte_flow_error error; 6655 6656 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6657 return flow_mreg_add_default_copy_action(dev, &error); 6658 } 6659 6660 /** 6661 * Release key of thread specific flow workspace data. 6662 */ 6663 void 6664 flow_release_workspace(void *data) 6665 { 6666 struct mlx5_flow_workspace *wks = data; 6667 struct mlx5_flow_workspace *next; 6668 6669 while (wks) { 6670 next = wks->next; 6671 free(wks->rss_desc.queue); 6672 free(wks); 6673 wks = next; 6674 } 6675 } 6676 6677 /** 6678 * Get thread specific current flow workspace. 6679 * 6680 * @return pointer to thread specific flow workspace data, NULL on error. 6681 */ 6682 struct mlx5_flow_workspace* 6683 mlx5_flow_get_thread_workspace(void) 6684 { 6685 struct mlx5_flow_workspace *data; 6686 6687 data = mlx5_flow_os_get_specific_workspace(); 6688 MLX5_ASSERT(data && data->inuse); 6689 if (!data || !data->inuse) 6690 DRV_LOG(ERR, "flow workspace not initialized."); 6691 return data; 6692 } 6693 6694 /** 6695 * Allocate and init new flow workspace. 6696 * 6697 * @return pointer to flow workspace data, NULL on error. 6698 */ 6699 static struct mlx5_flow_workspace* 6700 flow_alloc_thread_workspace(void) 6701 { 6702 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data)); 6703 6704 if (!data) { 6705 DRV_LOG(ERR, "Failed to allocate flow workspace " 6706 "memory."); 6707 return NULL; 6708 } 6709 data->rss_desc.queue = calloc(1, 6710 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6711 if (!data->rss_desc.queue) 6712 goto err; 6713 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM; 6714 return data; 6715 err: 6716 if (data->rss_desc.queue) 6717 free(data->rss_desc.queue); 6718 free(data); 6719 return NULL; 6720 } 6721 6722 /** 6723 * Get new thread specific flow workspace. 6724 * 6725 * If current workspace inuse, create new one and set as current. 6726 * 6727 * @return pointer to thread specific flow workspace data, NULL on error. 6728 */ 6729 static struct mlx5_flow_workspace* 6730 mlx5_flow_push_thread_workspace(void) 6731 { 6732 struct mlx5_flow_workspace *curr; 6733 struct mlx5_flow_workspace *data; 6734 6735 curr = mlx5_flow_os_get_specific_workspace(); 6736 if (!curr) { 6737 data = flow_alloc_thread_workspace(); 6738 if (!data) 6739 return NULL; 6740 } else if (!curr->inuse) { 6741 data = curr; 6742 } else if (curr->next) { 6743 data = curr->next; 6744 } else { 6745 data = flow_alloc_thread_workspace(); 6746 if (!data) 6747 return NULL; 6748 curr->next = data; 6749 data->prev = curr; 6750 } 6751 data->inuse = 1; 6752 data->flow_idx = 0; 6753 /* Set as current workspace */ 6754 if (mlx5_flow_os_set_specific_workspace(data)) 6755 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6756 return data; 6757 } 6758 6759 /** 6760 * Close current thread specific flow workspace. 6761 * 6762 * If previous workspace available, set it as current. 6763 * 6764 * @return pointer to thread specific flow workspace data, NULL on error. 6765 */ 6766 static void 6767 mlx5_flow_pop_thread_workspace(void) 6768 { 6769 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace(); 6770 6771 if (!data) 6772 return; 6773 if (!data->inuse) { 6774 DRV_LOG(ERR, "Failed to close unused flow workspace."); 6775 return; 6776 } 6777 data->inuse = 0; 6778 if (!data->prev) 6779 return; 6780 if (mlx5_flow_os_set_specific_workspace(data->prev)) 6781 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6782 } 6783 6784 /** 6785 * Verify the flow list is empty 6786 * 6787 * @param dev 6788 * Pointer to Ethernet device. 6789 * 6790 * @return the number of flows not released. 6791 */ 6792 int 6793 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused) 6794 { 6795 struct mlx5_priv *priv = dev->data->dev_private; 6796 struct rte_flow *flow; 6797 uint32_t idx = 0; 6798 int ret = 0, i; 6799 6800 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 6801 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) { 6802 DRV_LOG(DEBUG, "port %u flow %p still referenced", 6803 dev->data->port_id, (void *)flow); 6804 ret++; 6805 } 6806 } 6807 return ret; 6808 } 6809 6810 /** 6811 * Enable default hairpin egress flow. 6812 * 6813 * @param dev 6814 * Pointer to Ethernet device. 6815 * @param queue 6816 * The queue index. 6817 * 6818 * @return 6819 * 0 on success, a negative errno value otherwise and rte_errno is set. 6820 */ 6821 int 6822 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 6823 uint32_t queue) 6824 { 6825 const struct rte_flow_attr attr = { 6826 .egress = 1, 6827 .priority = 0, 6828 }; 6829 struct mlx5_rte_flow_item_tx_queue queue_spec = { 6830 .queue = queue, 6831 }; 6832 struct mlx5_rte_flow_item_tx_queue queue_mask = { 6833 .queue = UINT32_MAX, 6834 }; 6835 struct rte_flow_item items[] = { 6836 { 6837 .type = (enum rte_flow_item_type) 6838 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6839 .spec = &queue_spec, 6840 .last = NULL, 6841 .mask = &queue_mask, 6842 }, 6843 { 6844 .type = RTE_FLOW_ITEM_TYPE_END, 6845 }, 6846 }; 6847 struct rte_flow_action_jump jump = { 6848 .group = MLX5_HAIRPIN_TX_TABLE, 6849 }; 6850 struct rte_flow_action actions[2]; 6851 uint32_t flow_idx; 6852 struct rte_flow_error error; 6853 6854 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 6855 actions[0].conf = &jump; 6856 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 6857 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 6858 &attr, items, actions, false, &error); 6859 if (!flow_idx) { 6860 DRV_LOG(DEBUG, 6861 "Failed to create ctrl flow: rte_errno(%d)," 6862 " type(%d), message(%s)", 6863 rte_errno, error.type, 6864 error.message ? error.message : " (no stated reason)"); 6865 return -rte_errno; 6866 } 6867 return 0; 6868 } 6869 6870 /** 6871 * Enable a control flow configured from the control plane. 6872 * 6873 * @param dev 6874 * Pointer to Ethernet device. 6875 * @param eth_spec 6876 * An Ethernet flow spec to apply. 6877 * @param eth_mask 6878 * An Ethernet flow mask to apply. 6879 * @param vlan_spec 6880 * A VLAN flow spec to apply. 6881 * @param vlan_mask 6882 * A VLAN flow mask to apply. 6883 * 6884 * @return 6885 * 0 on success, a negative errno value otherwise and rte_errno is set. 6886 */ 6887 int 6888 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 6889 struct rte_flow_item_eth *eth_spec, 6890 struct rte_flow_item_eth *eth_mask, 6891 struct rte_flow_item_vlan *vlan_spec, 6892 struct rte_flow_item_vlan *vlan_mask) 6893 { 6894 struct mlx5_priv *priv = dev->data->dev_private; 6895 const struct rte_flow_attr attr = { 6896 .ingress = 1, 6897 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 6898 }; 6899 struct rte_flow_item items[] = { 6900 { 6901 .type = RTE_FLOW_ITEM_TYPE_ETH, 6902 .spec = eth_spec, 6903 .last = NULL, 6904 .mask = eth_mask, 6905 }, 6906 { 6907 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 6908 RTE_FLOW_ITEM_TYPE_END, 6909 .spec = vlan_spec, 6910 .last = NULL, 6911 .mask = vlan_mask, 6912 }, 6913 { 6914 .type = RTE_FLOW_ITEM_TYPE_END, 6915 }, 6916 }; 6917 uint16_t queue[priv->reta_idx_n]; 6918 struct rte_flow_action_rss action_rss = { 6919 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 6920 .level = 0, 6921 .types = priv->rss_conf.rss_hf, 6922 .key_len = priv->rss_conf.rss_key_len, 6923 .queue_num = priv->reta_idx_n, 6924 .key = priv->rss_conf.rss_key, 6925 .queue = queue, 6926 }; 6927 struct rte_flow_action actions[] = { 6928 { 6929 .type = RTE_FLOW_ACTION_TYPE_RSS, 6930 .conf = &action_rss, 6931 }, 6932 { 6933 .type = RTE_FLOW_ACTION_TYPE_END, 6934 }, 6935 }; 6936 uint32_t flow_idx; 6937 struct rte_flow_error error; 6938 unsigned int i; 6939 6940 if (!priv->reta_idx_n || !priv->rxqs_n) { 6941 return 0; 6942 } 6943 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 6944 action_rss.types = 0; 6945 for (i = 0; i != priv->reta_idx_n; ++i) 6946 queue[i] = (*priv->reta_idx)[i]; 6947 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 6948 &attr, items, actions, false, &error); 6949 if (!flow_idx) 6950 return -rte_errno; 6951 return 0; 6952 } 6953 6954 /** 6955 * Enable a flow control configured from the control plane. 6956 * 6957 * @param dev 6958 * Pointer to Ethernet device. 6959 * @param eth_spec 6960 * An Ethernet flow spec to apply. 6961 * @param eth_mask 6962 * An Ethernet flow mask to apply. 6963 * 6964 * @return 6965 * 0 on success, a negative errno value otherwise and rte_errno is set. 6966 */ 6967 int 6968 mlx5_ctrl_flow(struct rte_eth_dev *dev, 6969 struct rte_flow_item_eth *eth_spec, 6970 struct rte_flow_item_eth *eth_mask) 6971 { 6972 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 6973 } 6974 6975 /** 6976 * Create default miss flow rule matching lacp traffic 6977 * 6978 * @param dev 6979 * Pointer to Ethernet device. 6980 * @param eth_spec 6981 * An Ethernet flow spec to apply. 6982 * 6983 * @return 6984 * 0 on success, a negative errno value otherwise and rte_errno is set. 6985 */ 6986 int 6987 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 6988 { 6989 /* 6990 * The LACP matching is done by only using ether type since using 6991 * a multicast dst mac causes kernel to give low priority to this flow. 6992 */ 6993 static const struct rte_flow_item_eth lacp_spec = { 6994 .type = RTE_BE16(0x8809), 6995 }; 6996 static const struct rte_flow_item_eth lacp_mask = { 6997 .type = 0xffff, 6998 }; 6999 const struct rte_flow_attr attr = { 7000 .ingress = 1, 7001 }; 7002 struct rte_flow_item items[] = { 7003 { 7004 .type = RTE_FLOW_ITEM_TYPE_ETH, 7005 .spec = &lacp_spec, 7006 .mask = &lacp_mask, 7007 }, 7008 { 7009 .type = RTE_FLOW_ITEM_TYPE_END, 7010 }, 7011 }; 7012 struct rte_flow_action actions[] = { 7013 { 7014 .type = (enum rte_flow_action_type) 7015 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 7016 }, 7017 { 7018 .type = RTE_FLOW_ACTION_TYPE_END, 7019 }, 7020 }; 7021 struct rte_flow_error error; 7022 uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL, 7023 &attr, items, actions, 7024 false, &error); 7025 7026 if (!flow_idx) 7027 return -rte_errno; 7028 return 0; 7029 } 7030 7031 /** 7032 * Destroy a flow. 7033 * 7034 * @see rte_flow_destroy() 7035 * @see rte_flow_ops 7036 */ 7037 int 7038 mlx5_flow_destroy(struct rte_eth_dev *dev, 7039 struct rte_flow *flow, 7040 struct rte_flow_error *error __rte_unused) 7041 { 7042 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, 7043 (uintptr_t)(void *)flow); 7044 return 0; 7045 } 7046 7047 /** 7048 * Destroy all flows. 7049 * 7050 * @see rte_flow_flush() 7051 * @see rte_flow_ops 7052 */ 7053 int 7054 mlx5_flow_flush(struct rte_eth_dev *dev, 7055 struct rte_flow_error *error __rte_unused) 7056 { 7057 mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false); 7058 return 0; 7059 } 7060 7061 /** 7062 * Isolated mode. 7063 * 7064 * @see rte_flow_isolate() 7065 * @see rte_flow_ops 7066 */ 7067 int 7068 mlx5_flow_isolate(struct rte_eth_dev *dev, 7069 int enable, 7070 struct rte_flow_error *error) 7071 { 7072 struct mlx5_priv *priv = dev->data->dev_private; 7073 7074 if (dev->data->dev_started) { 7075 rte_flow_error_set(error, EBUSY, 7076 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7077 NULL, 7078 "port must be stopped first"); 7079 return -rte_errno; 7080 } 7081 priv->isolated = !!enable; 7082 if (enable) 7083 dev->dev_ops = &mlx5_dev_ops_isolate; 7084 else 7085 dev->dev_ops = &mlx5_dev_ops; 7086 7087 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 7088 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 7089 7090 return 0; 7091 } 7092 7093 /** 7094 * Query a flow. 7095 * 7096 * @see rte_flow_query() 7097 * @see rte_flow_ops 7098 */ 7099 static int 7100 flow_drv_query(struct rte_eth_dev *dev, 7101 uint32_t flow_idx, 7102 const struct rte_flow_action *actions, 7103 void *data, 7104 struct rte_flow_error *error) 7105 { 7106 struct mlx5_priv *priv = dev->data->dev_private; 7107 const struct mlx5_flow_driver_ops *fops; 7108 struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 7109 flow_idx); 7110 enum mlx5_flow_drv_type ftype; 7111 7112 if (!flow) { 7113 return rte_flow_error_set(error, ENOENT, 7114 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7115 NULL, 7116 "invalid flow handle"); 7117 } 7118 ftype = flow->drv_type; 7119 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 7120 fops = flow_get_drv_ops(ftype); 7121 7122 return fops->query(dev, flow, actions, data, error); 7123 } 7124 7125 /** 7126 * Query a flow. 7127 * 7128 * @see rte_flow_query() 7129 * @see rte_flow_ops 7130 */ 7131 int 7132 mlx5_flow_query(struct rte_eth_dev *dev, 7133 struct rte_flow *flow, 7134 const struct rte_flow_action *actions, 7135 void *data, 7136 struct rte_flow_error *error) 7137 { 7138 int ret; 7139 7140 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 7141 error); 7142 if (ret < 0) 7143 return ret; 7144 return 0; 7145 } 7146 7147 /** 7148 * Get rte_flow callbacks. 7149 * 7150 * @param dev 7151 * Pointer to Ethernet device structure. 7152 * @param ops 7153 * Pointer to operation-specific structure. 7154 * 7155 * @return 0 7156 */ 7157 int 7158 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 7159 const struct rte_flow_ops **ops) 7160 { 7161 *ops = &mlx5_flow_ops; 7162 return 0; 7163 } 7164 7165 /** 7166 * Validate meter policy actions. 7167 * Dispatcher for action type specific validation. 7168 * 7169 * @param[in] dev 7170 * Pointer to the Ethernet device structure. 7171 * @param[in] action 7172 * The meter policy action object to validate. 7173 * @param[in] attr 7174 * Attributes of flow to determine steering domain. 7175 * @param[out] is_rss 7176 * Is RSS or not. 7177 * @param[out] domain_bitmap 7178 * Domain bitmap. 7179 * @param[out] is_def_policy 7180 * Is default policy or not. 7181 * @param[out] error 7182 * Perform verbose error reporting if not NULL. Initialized in case of 7183 * error only. 7184 * 7185 * @return 7186 * 0 on success, otherwise negative errno value. 7187 */ 7188 int 7189 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev, 7190 const struct rte_flow_action *actions[RTE_COLORS], 7191 struct rte_flow_attr *attr, 7192 bool *is_rss, 7193 uint8_t *domain_bitmap, 7194 bool *is_def_policy, 7195 struct rte_mtr_error *error) 7196 { 7197 const struct mlx5_flow_driver_ops *fops; 7198 7199 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7200 return fops->validate_mtr_acts(dev, actions, attr, 7201 is_rss, domain_bitmap, is_def_policy, error); 7202 } 7203 7204 /** 7205 * Destroy the meter table set. 7206 * 7207 * @param[in] dev 7208 * Pointer to Ethernet device. 7209 * @param[in] mtr_policy 7210 * Meter policy struct. 7211 */ 7212 void 7213 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev, 7214 struct mlx5_flow_meter_policy *mtr_policy) 7215 { 7216 const struct mlx5_flow_driver_ops *fops; 7217 7218 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7219 fops->destroy_mtr_acts(dev, mtr_policy); 7220 } 7221 7222 /** 7223 * Create policy action, lock free, 7224 * (mutex should be acquired by caller). 7225 * Dispatcher for action type specific call. 7226 * 7227 * @param[in] dev 7228 * Pointer to the Ethernet device structure. 7229 * @param[in] mtr_policy 7230 * Meter policy struct. 7231 * @param[in] action 7232 * Action specification used to create meter actions. 7233 * @param[out] error 7234 * Perform verbose error reporting if not NULL. Initialized in case of 7235 * error only. 7236 * 7237 * @return 7238 * 0 on success, otherwise negative errno value. 7239 */ 7240 int 7241 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, 7242 struct mlx5_flow_meter_policy *mtr_policy, 7243 const struct rte_flow_action *actions[RTE_COLORS], 7244 struct rte_mtr_error *error) 7245 { 7246 const struct mlx5_flow_driver_ops *fops; 7247 7248 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7249 return fops->create_mtr_acts(dev, mtr_policy, actions, error); 7250 } 7251 7252 /** 7253 * Create policy rules, lock free, 7254 * (mutex should be acquired by caller). 7255 * Dispatcher for action type specific call. 7256 * 7257 * @param[in] dev 7258 * Pointer to the Ethernet device structure. 7259 * @param[in] mtr_policy 7260 * Meter policy struct. 7261 * 7262 * @return 7263 * 0 on success, -1 otherwise. 7264 */ 7265 int 7266 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev, 7267 struct mlx5_flow_meter_policy *mtr_policy) 7268 { 7269 const struct mlx5_flow_driver_ops *fops; 7270 7271 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7272 return fops->create_policy_rules(dev, mtr_policy); 7273 } 7274 7275 /** 7276 * Destroy policy rules, lock free, 7277 * (mutex should be acquired by caller). 7278 * Dispatcher for action type specific call. 7279 * 7280 * @param[in] dev 7281 * Pointer to the Ethernet device structure. 7282 * @param[in] mtr_policy 7283 * Meter policy struct. 7284 */ 7285 void 7286 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev, 7287 struct mlx5_flow_meter_policy *mtr_policy) 7288 { 7289 const struct mlx5_flow_driver_ops *fops; 7290 7291 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7292 fops->destroy_policy_rules(dev, mtr_policy); 7293 } 7294 7295 /** 7296 * Destroy the default policy table set. 7297 * 7298 * @param[in] dev 7299 * Pointer to Ethernet device. 7300 */ 7301 void 7302 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev) 7303 { 7304 const struct mlx5_flow_driver_ops *fops; 7305 7306 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7307 fops->destroy_def_policy(dev); 7308 } 7309 7310 /** 7311 * Destroy the default policy table set. 7312 * 7313 * @param[in] dev 7314 * Pointer to Ethernet device. 7315 * 7316 * @return 7317 * 0 on success, -1 otherwise. 7318 */ 7319 int 7320 mlx5_flow_create_def_policy(struct rte_eth_dev *dev) 7321 { 7322 const struct mlx5_flow_driver_ops *fops; 7323 7324 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7325 return fops->create_def_policy(dev); 7326 } 7327 7328 /** 7329 * Create the needed meter and suffix tables. 7330 * 7331 * @param[in] dev 7332 * Pointer to Ethernet device. 7333 * 7334 * @return 7335 * 0 on success, -1 otherwise. 7336 */ 7337 int 7338 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 7339 struct mlx5_flow_meter_info *fm, 7340 uint32_t mtr_idx, 7341 uint8_t domain_bitmap) 7342 { 7343 const struct mlx5_flow_driver_ops *fops; 7344 7345 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7346 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap); 7347 } 7348 7349 /** 7350 * Destroy the meter table set. 7351 * 7352 * @param[in] dev 7353 * Pointer to Ethernet device. 7354 * @param[in] tbl 7355 * Pointer to the meter table set. 7356 */ 7357 void 7358 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 7359 struct mlx5_flow_meter_info *fm) 7360 { 7361 const struct mlx5_flow_driver_ops *fops; 7362 7363 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7364 fops->destroy_mtr_tbls(dev, fm); 7365 } 7366 7367 /** 7368 * Destroy the global meter drop table. 7369 * 7370 * @param[in] dev 7371 * Pointer to Ethernet device. 7372 */ 7373 void 7374 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev) 7375 { 7376 const struct mlx5_flow_driver_ops *fops; 7377 7378 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7379 fops->destroy_mtr_drop_tbls(dev); 7380 } 7381 7382 /** 7383 * Destroy the sub policy table with RX queue. 7384 * 7385 * @param[in] dev 7386 * Pointer to Ethernet device. 7387 * @param[in] mtr_policy 7388 * Pointer to meter policy table. 7389 */ 7390 void 7391 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev, 7392 struct mlx5_flow_meter_policy *mtr_policy) 7393 { 7394 const struct mlx5_flow_driver_ops *fops; 7395 7396 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7397 fops->destroy_sub_policy_with_rxq(dev, mtr_policy); 7398 } 7399 7400 /** 7401 * Allocate the needed aso flow meter id. 7402 * 7403 * @param[in] dev 7404 * Pointer to Ethernet device. 7405 * 7406 * @return 7407 * Index to aso flow meter on success, NULL otherwise. 7408 */ 7409 uint32_t 7410 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev) 7411 { 7412 const struct mlx5_flow_driver_ops *fops; 7413 7414 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7415 return fops->create_meter(dev); 7416 } 7417 7418 /** 7419 * Free the aso flow meter id. 7420 * 7421 * @param[in] dev 7422 * Pointer to Ethernet device. 7423 * @param[in] mtr_idx 7424 * Index to aso flow meter to be free. 7425 * 7426 * @return 7427 * 0 on success. 7428 */ 7429 void 7430 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx) 7431 { 7432 const struct mlx5_flow_driver_ops *fops; 7433 7434 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7435 fops->free_meter(dev, mtr_idx); 7436 } 7437 7438 /** 7439 * Allocate a counter. 7440 * 7441 * @param[in] dev 7442 * Pointer to Ethernet device structure. 7443 * 7444 * @return 7445 * Index to allocated counter on success, 0 otherwise. 7446 */ 7447 uint32_t 7448 mlx5_counter_alloc(struct rte_eth_dev *dev) 7449 { 7450 const struct mlx5_flow_driver_ops *fops; 7451 struct rte_flow_attr attr = { .transfer = 0 }; 7452 7453 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7454 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7455 return fops->counter_alloc(dev); 7456 } 7457 DRV_LOG(ERR, 7458 "port %u counter allocate is not supported.", 7459 dev->data->port_id); 7460 return 0; 7461 } 7462 7463 /** 7464 * Free a counter. 7465 * 7466 * @param[in] dev 7467 * Pointer to Ethernet device structure. 7468 * @param[in] cnt 7469 * Index to counter to be free. 7470 */ 7471 void 7472 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 7473 { 7474 const struct mlx5_flow_driver_ops *fops; 7475 struct rte_flow_attr attr = { .transfer = 0 }; 7476 7477 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7478 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7479 fops->counter_free(dev, cnt); 7480 return; 7481 } 7482 DRV_LOG(ERR, 7483 "port %u counter free is not supported.", 7484 dev->data->port_id); 7485 } 7486 7487 /** 7488 * Query counter statistics. 7489 * 7490 * @param[in] dev 7491 * Pointer to Ethernet device structure. 7492 * @param[in] cnt 7493 * Index to counter to query. 7494 * @param[in] clear 7495 * Set to clear counter statistics. 7496 * @param[out] pkts 7497 * The counter hits packets number to save. 7498 * @param[out] bytes 7499 * The counter hits bytes number to save. 7500 * 7501 * @return 7502 * 0 on success, a negative errno value otherwise. 7503 */ 7504 int 7505 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 7506 bool clear, uint64_t *pkts, uint64_t *bytes) 7507 { 7508 const struct mlx5_flow_driver_ops *fops; 7509 struct rte_flow_attr attr = { .transfer = 0 }; 7510 7511 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7512 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7513 return fops->counter_query(dev, cnt, clear, pkts, bytes); 7514 } 7515 DRV_LOG(ERR, 7516 "port %u counter query is not supported.", 7517 dev->data->port_id); 7518 return -ENOTSUP; 7519 } 7520 7521 /** 7522 * Allocate a new memory for the counter values wrapped by all the needed 7523 * management. 7524 * 7525 * @param[in] sh 7526 * Pointer to mlx5_dev_ctx_shared object. 7527 * 7528 * @return 7529 * 0 on success, a negative errno value otherwise. 7530 */ 7531 static int 7532 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 7533 { 7534 struct mlx5_devx_mkey_attr mkey_attr; 7535 struct mlx5_counter_stats_mem_mng *mem_mng; 7536 volatile struct flow_counter_stats *raw_data; 7537 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 7538 int size = (sizeof(struct flow_counter_stats) * 7539 MLX5_COUNTERS_PER_POOL + 7540 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 7541 sizeof(struct mlx5_counter_stats_mem_mng); 7542 size_t pgsize = rte_mem_page_size(); 7543 uint8_t *mem; 7544 int i; 7545 7546 if (pgsize == (size_t)-1) { 7547 DRV_LOG(ERR, "Failed to get mem page size"); 7548 rte_errno = ENOMEM; 7549 return -ENOMEM; 7550 } 7551 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 7552 if (!mem) { 7553 rte_errno = ENOMEM; 7554 return -ENOMEM; 7555 } 7556 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 7557 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 7558 mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size, 7559 IBV_ACCESS_LOCAL_WRITE); 7560 if (!mem_mng->umem) { 7561 rte_errno = errno; 7562 mlx5_free(mem); 7563 return -rte_errno; 7564 } 7565 memset(&mkey_attr, 0, sizeof(mkey_attr)); 7566 mkey_attr.addr = (uintptr_t)mem; 7567 mkey_attr.size = size; 7568 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem); 7569 mkey_attr.pd = sh->pdn; 7570 mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write; 7571 mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read; 7572 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr); 7573 if (!mem_mng->dm) { 7574 mlx5_os_umem_dereg(mem_mng->umem); 7575 rte_errno = errno; 7576 mlx5_free(mem); 7577 return -rte_errno; 7578 } 7579 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 7580 raw_data = (volatile struct flow_counter_stats *)mem; 7581 for (i = 0; i < raws_n; ++i) { 7582 mem_mng->raws[i].mem_mng = mem_mng; 7583 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 7584 } 7585 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 7586 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 7587 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 7588 next); 7589 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 7590 sh->cmng.mem_mng = mem_mng; 7591 return 0; 7592 } 7593 7594 /** 7595 * Set the statistic memory to the new counter pool. 7596 * 7597 * @param[in] sh 7598 * Pointer to mlx5_dev_ctx_shared object. 7599 * @param[in] pool 7600 * Pointer to the pool to set the statistic memory. 7601 * 7602 * @return 7603 * 0 on success, a negative errno value otherwise. 7604 */ 7605 static int 7606 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 7607 struct mlx5_flow_counter_pool *pool) 7608 { 7609 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7610 /* Resize statistic memory once used out. */ 7611 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 7612 mlx5_flow_create_counter_stat_mem_mng(sh)) { 7613 DRV_LOG(ERR, "Cannot resize counter stat mem."); 7614 return -1; 7615 } 7616 rte_spinlock_lock(&pool->sl); 7617 pool->raw = cmng->mem_mng->raws + pool->index % 7618 MLX5_CNT_CONTAINER_RESIZE; 7619 rte_spinlock_unlock(&pool->sl); 7620 pool->raw_hw = NULL; 7621 return 0; 7622 } 7623 7624 #define MLX5_POOL_QUERY_FREQ_US 1000000 7625 7626 /** 7627 * Set the periodic procedure for triggering asynchronous batch queries for all 7628 * the counter pools. 7629 * 7630 * @param[in] sh 7631 * Pointer to mlx5_dev_ctx_shared object. 7632 */ 7633 void 7634 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 7635 { 7636 uint32_t pools_n, us; 7637 7638 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 7639 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 7640 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 7641 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 7642 sh->cmng.query_thread_on = 0; 7643 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 7644 } else { 7645 sh->cmng.query_thread_on = 1; 7646 } 7647 } 7648 7649 /** 7650 * The periodic procedure for triggering asynchronous batch queries for all the 7651 * counter pools. This function is probably called by the host thread. 7652 * 7653 * @param[in] arg 7654 * The parameter for the alarm process. 7655 */ 7656 void 7657 mlx5_flow_query_alarm(void *arg) 7658 { 7659 struct mlx5_dev_ctx_shared *sh = arg; 7660 int ret; 7661 uint16_t pool_index = sh->cmng.pool_index; 7662 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7663 struct mlx5_flow_counter_pool *pool; 7664 uint16_t n_valid; 7665 7666 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 7667 goto set_alarm; 7668 rte_spinlock_lock(&cmng->pool_update_sl); 7669 pool = cmng->pools[pool_index]; 7670 n_valid = cmng->n_valid; 7671 rte_spinlock_unlock(&cmng->pool_update_sl); 7672 /* Set the statistic memory to the new created pool. */ 7673 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 7674 goto set_alarm; 7675 if (pool->raw_hw) 7676 /* There is a pool query in progress. */ 7677 goto set_alarm; 7678 pool->raw_hw = 7679 LIST_FIRST(&sh->cmng.free_stat_raws); 7680 if (!pool->raw_hw) 7681 /* No free counter statistics raw memory. */ 7682 goto set_alarm; 7683 /* 7684 * Identify the counters released between query trigger and query 7685 * handle more efficiently. The counter released in this gap period 7686 * should wait for a new round of query as the new arrived packets 7687 * will not be taken into account. 7688 */ 7689 pool->query_gen++; 7690 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 7691 MLX5_COUNTERS_PER_POOL, 7692 NULL, NULL, 7693 pool->raw_hw->mem_mng->dm->id, 7694 (void *)(uintptr_t) 7695 pool->raw_hw->data, 7696 sh->devx_comp, 7697 (uint64_t)(uintptr_t)pool); 7698 if (ret) { 7699 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 7700 " %d", pool->min_dcs->id); 7701 pool->raw_hw = NULL; 7702 goto set_alarm; 7703 } 7704 LIST_REMOVE(pool->raw_hw, next); 7705 sh->cmng.pending_queries++; 7706 pool_index++; 7707 if (pool_index >= n_valid) 7708 pool_index = 0; 7709 set_alarm: 7710 sh->cmng.pool_index = pool_index; 7711 mlx5_set_query_alarm(sh); 7712 } 7713 7714 /** 7715 * Check and callback event for new aged flow in the counter pool 7716 * 7717 * @param[in] sh 7718 * Pointer to mlx5_dev_ctx_shared object. 7719 * @param[in] pool 7720 * Pointer to Current counter pool. 7721 */ 7722 static void 7723 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 7724 struct mlx5_flow_counter_pool *pool) 7725 { 7726 struct mlx5_priv *priv; 7727 struct mlx5_flow_counter *cnt; 7728 struct mlx5_age_info *age_info; 7729 struct mlx5_age_param *age_param; 7730 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 7731 struct mlx5_counter_stats_raw *prev = pool->raw; 7732 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 7733 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 7734 uint16_t expected = AGE_CANDIDATE; 7735 uint32_t i; 7736 7737 pool->time_of_last_age_check = curr_time; 7738 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 7739 cnt = MLX5_POOL_GET_CNT(pool, i); 7740 age_param = MLX5_CNT_TO_AGE(cnt); 7741 if (__atomic_load_n(&age_param->state, 7742 __ATOMIC_RELAXED) != AGE_CANDIDATE) 7743 continue; 7744 if (cur->data[i].hits != prev->data[i].hits) { 7745 __atomic_store_n(&age_param->sec_since_last_hit, 0, 7746 __ATOMIC_RELAXED); 7747 continue; 7748 } 7749 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 7750 time_delta, 7751 __ATOMIC_RELAXED) <= age_param->timeout) 7752 continue; 7753 /** 7754 * Hold the lock first, or if between the 7755 * state AGE_TMOUT and tailq operation the 7756 * release happened, the release procedure 7757 * may delete a non-existent tailq node. 7758 */ 7759 priv = rte_eth_devices[age_param->port_id].data->dev_private; 7760 age_info = GET_PORT_AGE_INFO(priv); 7761 rte_spinlock_lock(&age_info->aged_sl); 7762 if (__atomic_compare_exchange_n(&age_param->state, &expected, 7763 AGE_TMOUT, false, 7764 __ATOMIC_RELAXED, 7765 __ATOMIC_RELAXED)) { 7766 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 7767 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 7768 } 7769 rte_spinlock_unlock(&age_info->aged_sl); 7770 } 7771 mlx5_age_event_prepare(sh); 7772 } 7773 7774 /** 7775 * Handler for the HW respond about ready values from an asynchronous batch 7776 * query. This function is probably called by the host thread. 7777 * 7778 * @param[in] sh 7779 * The pointer to the shared device context. 7780 * @param[in] async_id 7781 * The Devx async ID. 7782 * @param[in] status 7783 * The status of the completion. 7784 */ 7785 void 7786 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 7787 uint64_t async_id, int status) 7788 { 7789 struct mlx5_flow_counter_pool *pool = 7790 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 7791 struct mlx5_counter_stats_raw *raw_to_free; 7792 uint8_t query_gen = pool->query_gen ^ 1; 7793 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7794 enum mlx5_counter_type cnt_type = 7795 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 7796 MLX5_COUNTER_TYPE_ORIGIN; 7797 7798 if (unlikely(status)) { 7799 raw_to_free = pool->raw_hw; 7800 } else { 7801 raw_to_free = pool->raw; 7802 if (pool->is_aged) 7803 mlx5_flow_aging_check(sh, pool); 7804 rte_spinlock_lock(&pool->sl); 7805 pool->raw = pool->raw_hw; 7806 rte_spinlock_unlock(&pool->sl); 7807 /* Be sure the new raw counters data is updated in memory. */ 7808 rte_io_wmb(); 7809 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 7810 rte_spinlock_lock(&cmng->csl[cnt_type]); 7811 TAILQ_CONCAT(&cmng->counters[cnt_type], 7812 &pool->counters[query_gen], next); 7813 rte_spinlock_unlock(&cmng->csl[cnt_type]); 7814 } 7815 } 7816 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 7817 pool->raw_hw = NULL; 7818 sh->cmng.pending_queries--; 7819 } 7820 7821 static int 7822 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 7823 const struct flow_grp_info *grp_info, 7824 struct rte_flow_error *error) 7825 { 7826 if (grp_info->transfer && grp_info->external && 7827 grp_info->fdb_def_rule) { 7828 if (group == UINT32_MAX) 7829 return rte_flow_error_set 7830 (error, EINVAL, 7831 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 7832 NULL, 7833 "group index not supported"); 7834 *table = group + 1; 7835 } else { 7836 *table = group; 7837 } 7838 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 7839 return 0; 7840 } 7841 7842 /** 7843 * Translate the rte_flow group index to HW table value. 7844 * 7845 * If tunnel offload is disabled, all group ids converted to flow table 7846 * id using the standard method. 7847 * If tunnel offload is enabled, group id can be converted using the 7848 * standard or tunnel conversion method. Group conversion method 7849 * selection depends on flags in `grp_info` parameter: 7850 * - Internal (grp_info.external == 0) groups conversion uses the 7851 * standard method. 7852 * - Group ids in JUMP action converted with the tunnel conversion. 7853 * - Group id in rule attribute conversion depends on a rule type and 7854 * group id value: 7855 * ** non zero group attributes converted with the tunnel method 7856 * ** zero group attribute in non-tunnel rule is converted using the 7857 * standard method - there's only one root table 7858 * ** zero group attribute in steer tunnel rule is converted with the 7859 * standard method - single root table 7860 * ** zero group attribute in match tunnel rule is a special OvS 7861 * case: that value is used for portability reasons. That group 7862 * id is converted with the tunnel conversion method. 7863 * 7864 * @param[in] dev 7865 * Port device 7866 * @param[in] tunnel 7867 * PMD tunnel offload object 7868 * @param[in] group 7869 * rte_flow group index value. 7870 * @param[out] table 7871 * HW table value. 7872 * @param[in] grp_info 7873 * flags used for conversion 7874 * @param[out] error 7875 * Pointer to error structure. 7876 * 7877 * @return 7878 * 0 on success, a negative errno value otherwise and rte_errno is set. 7879 */ 7880 int 7881 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 7882 const struct mlx5_flow_tunnel *tunnel, 7883 uint32_t group, uint32_t *table, 7884 const struct flow_grp_info *grp_info, 7885 struct rte_flow_error *error) 7886 { 7887 int ret; 7888 bool standard_translation; 7889 7890 if (!grp_info->skip_scale && grp_info->external && 7891 group < MLX5_MAX_TABLES_EXTERNAL) 7892 group *= MLX5_FLOW_TABLE_FACTOR; 7893 if (is_tunnel_offload_active(dev)) { 7894 standard_translation = !grp_info->external || 7895 grp_info->std_tbl_fix; 7896 } else { 7897 standard_translation = true; 7898 } 7899 DRV_LOG(DEBUG, 7900 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s", 7901 dev->data->port_id, group, grp_info->transfer, 7902 grp_info->external, grp_info->fdb_def_rule, 7903 standard_translation ? "STANDARD" : "TUNNEL"); 7904 if (standard_translation) 7905 ret = flow_group_to_table(dev->data->port_id, group, table, 7906 grp_info, error); 7907 else 7908 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 7909 table, error); 7910 7911 return ret; 7912 } 7913 7914 /** 7915 * Discover availability of metadata reg_c's. 7916 * 7917 * Iteratively use test flows to check availability. 7918 * 7919 * @param[in] dev 7920 * Pointer to the Ethernet device structure. 7921 * 7922 * @return 7923 * 0 on success, a negative errno value otherwise and rte_errno is set. 7924 */ 7925 int 7926 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 7927 { 7928 struct mlx5_priv *priv = dev->data->dev_private; 7929 struct mlx5_dev_config *config = &priv->config; 7930 enum modify_reg idx; 7931 int n = 0; 7932 7933 /* reg_c[0] and reg_c[1] are reserved. */ 7934 config->flow_mreg_c[n++] = REG_C_0; 7935 config->flow_mreg_c[n++] = REG_C_1; 7936 /* Discover availability of other reg_c's. */ 7937 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 7938 struct rte_flow_attr attr = { 7939 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 7940 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 7941 .ingress = 1, 7942 }; 7943 struct rte_flow_item items[] = { 7944 [0] = { 7945 .type = RTE_FLOW_ITEM_TYPE_END, 7946 }, 7947 }; 7948 struct rte_flow_action actions[] = { 7949 [0] = { 7950 .type = (enum rte_flow_action_type) 7951 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 7952 .conf = &(struct mlx5_flow_action_copy_mreg){ 7953 .src = REG_C_1, 7954 .dst = idx, 7955 }, 7956 }, 7957 [1] = { 7958 .type = RTE_FLOW_ACTION_TYPE_JUMP, 7959 .conf = &(struct rte_flow_action_jump){ 7960 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 7961 }, 7962 }, 7963 [2] = { 7964 .type = RTE_FLOW_ACTION_TYPE_END, 7965 }, 7966 }; 7967 uint32_t flow_idx; 7968 struct rte_flow *flow; 7969 struct rte_flow_error error; 7970 7971 if (!config->dv_flow_en) 7972 break; 7973 /* Create internal flow, validation skips copy action. */ 7974 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr, 7975 items, actions, false, &error); 7976 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 7977 flow_idx); 7978 if (!flow) 7979 continue; 7980 config->flow_mreg_c[n++] = idx; 7981 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx); 7982 } 7983 for (; n < MLX5_MREG_C_NUM; ++n) 7984 config->flow_mreg_c[n] = REG_NON; 7985 return 0; 7986 } 7987 7988 int 7989 save_dump_file(const uint8_t *data, uint32_t size, 7990 uint32_t type, uint32_t id, void *arg, FILE *file) 7991 { 7992 char line[BUF_SIZE]; 7993 uint32_t out = 0; 7994 uint32_t k; 7995 uint32_t actions_num; 7996 struct rte_flow_query_count *count; 7997 7998 memset(line, 0, BUF_SIZE); 7999 switch (type) { 8000 case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR: 8001 actions_num = *(uint32_t *)(arg); 8002 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,", 8003 type, id, actions_num); 8004 break; 8005 case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT: 8006 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,", 8007 type, id); 8008 break; 8009 case DR_DUMP_REC_TYPE_PMD_COUNTER: 8010 count = (struct rte_flow_query_count *)arg; 8011 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type, 8012 id, count->hits, count->bytes); 8013 return 0; 8014 default: 8015 return -1; 8016 } 8017 8018 for (k = 0; k < size; k++) { 8019 /* Make sure we do not overrun the line buffer length. */ 8020 if (out >= BUF_SIZE - 4) { 8021 line[out] = '\0'; 8022 break; 8023 } 8024 out += snprintf(line + out, BUF_SIZE - out, "%02x", 8025 (data[k]) & 0xff); 8026 } 8027 fprintf(file, "%s\n", line); 8028 return 0; 8029 } 8030 8031 int 8032 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow, 8033 struct rte_flow_query_count *count, struct rte_flow_error *error) 8034 { 8035 struct rte_flow_action action[2]; 8036 enum mlx5_flow_drv_type ftype; 8037 const struct mlx5_flow_driver_ops *fops; 8038 8039 if (!flow) { 8040 return rte_flow_error_set(error, ENOENT, 8041 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8042 NULL, 8043 "invalid flow handle"); 8044 } 8045 action[0].type = RTE_FLOW_ACTION_TYPE_COUNT; 8046 action[1].type = RTE_FLOW_ACTION_TYPE_END; 8047 if (flow->counter) { 8048 memset(count, 0, sizeof(struct rte_flow_query_count)); 8049 ftype = (enum mlx5_flow_drv_type)(flow->drv_type); 8050 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && 8051 ftype < MLX5_FLOW_TYPE_MAX); 8052 fops = flow_get_drv_ops(ftype); 8053 return fops->query(dev, flow, action, count, error); 8054 } 8055 return -1; 8056 } 8057 8058 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8059 /** 8060 * Dump flow ipool data to file 8061 * 8062 * @param[in] dev 8063 * The pointer to Ethernet device. 8064 * @param[in] file 8065 * A pointer to a file for output. 8066 * @param[out] error 8067 * Perform verbose error reporting if not NULL. PMDs initialize this 8068 * structure in case of error only. 8069 * @return 8070 * 0 on success, a negative value otherwise. 8071 */ 8072 int 8073 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev, 8074 struct rte_flow *flow, FILE *file, 8075 struct rte_flow_error *error) 8076 { 8077 struct mlx5_priv *priv = dev->data->dev_private; 8078 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; 8079 struct mlx5_flow_dv_encap_decap_resource *encap_decap; 8080 uint32_t handle_idx; 8081 struct mlx5_flow_handle *dh; 8082 struct rte_flow_query_count count; 8083 uint32_t actions_num; 8084 const uint8_t *data; 8085 size_t size; 8086 uint32_t id; 8087 uint32_t type; 8088 8089 if (!flow) { 8090 return rte_flow_error_set(error, ENOENT, 8091 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8092 NULL, 8093 "invalid flow handle"); 8094 } 8095 handle_idx = flow->dev_handles; 8096 while (handle_idx) { 8097 dh = mlx5_ipool_get(priv->sh->ipool 8098 [MLX5_IPOOL_MLX5_FLOW], handle_idx); 8099 if (!dh) 8100 continue; 8101 handle_idx = dh->next.next; 8102 id = (uint32_t)(uintptr_t)dh->drv_flow; 8103 8104 /* query counter */ 8105 type = DR_DUMP_REC_TYPE_PMD_COUNTER; 8106 if (!mlx5_flow_query_counter(dev, flow, &count, error)) 8107 save_dump_file(NULL, 0, type, 8108 id, (void *)&count, file); 8109 8110 /* Get modify_hdr and encap_decap buf from ipools. */ 8111 encap_decap = NULL; 8112 modify_hdr = dh->dvh.modify_hdr; 8113 8114 if (dh->dvh.rix_encap_decap) { 8115 encap_decap = mlx5_ipool_get(priv->sh->ipool 8116 [MLX5_IPOOL_DECAP_ENCAP], 8117 dh->dvh.rix_encap_decap); 8118 } 8119 if (modify_hdr) { 8120 data = (const uint8_t *)modify_hdr->actions; 8121 size = (size_t)(modify_hdr->actions_num) * 8; 8122 actions_num = modify_hdr->actions_num; 8123 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR; 8124 save_dump_file(data, size, type, id, 8125 (void *)(&actions_num), file); 8126 } 8127 if (encap_decap) { 8128 data = encap_decap->buf; 8129 size = encap_decap->size; 8130 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT; 8131 save_dump_file(data, size, type, 8132 id, NULL, file); 8133 } 8134 } 8135 return 0; 8136 } 8137 #endif 8138 8139 /** 8140 * Dump flow raw hw data to file 8141 * 8142 * @param[in] dev 8143 * The pointer to Ethernet device. 8144 * @param[in] file 8145 * A pointer to a file for output. 8146 * @param[out] error 8147 * Perform verbose error reporting if not NULL. PMDs initialize this 8148 * structure in case of error only. 8149 * @return 8150 * 0 on success, a nagative value otherwise. 8151 */ 8152 int 8153 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx, 8154 FILE *file, 8155 struct rte_flow_error *error __rte_unused) 8156 { 8157 struct mlx5_priv *priv = dev->data->dev_private; 8158 struct mlx5_dev_ctx_shared *sh = priv->sh; 8159 uint32_t handle_idx; 8160 int ret; 8161 struct mlx5_flow_handle *dh; 8162 struct rte_flow *flow; 8163 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8164 uint32_t idx; 8165 #endif 8166 8167 if (!priv->config.dv_flow_en) { 8168 if (fputs("device dv flow disabled\n", file) <= 0) 8169 return -errno; 8170 return -ENOTSUP; 8171 } 8172 8173 /* dump all */ 8174 if (!flow_idx) { 8175 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8176 MLX5_IPOOL_FOREACH(priv->flows[MLX5_FLOW_TYPE_GEN], idx, flow) 8177 mlx5_flow_dev_dump_ipool(dev, flow, file, error); 8178 #endif 8179 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, 8180 sh->rx_domain, 8181 sh->tx_domain, file); 8182 } 8183 /* dump one */ 8184 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN], 8185 (uintptr_t)(void *)flow_idx); 8186 if (!flow) 8187 return -ENOENT; 8188 8189 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8190 mlx5_flow_dev_dump_ipool(dev, flow, file, error); 8191 #endif 8192 handle_idx = flow->dev_handles; 8193 while (handle_idx) { 8194 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], 8195 handle_idx); 8196 if (!dh) 8197 return -ENOENT; 8198 if (dh->drv_flow) { 8199 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow, 8200 file); 8201 if (ret) 8202 return -ENOENT; 8203 } 8204 handle_idx = dh->next.next; 8205 } 8206 return 0; 8207 } 8208 8209 /** 8210 * Get aged-out flows. 8211 * 8212 * @param[in] dev 8213 * Pointer to the Ethernet device structure. 8214 * @param[in] context 8215 * The address of an array of pointers to the aged-out flows contexts. 8216 * @param[in] nb_countexts 8217 * The length of context array pointers. 8218 * @param[out] error 8219 * Perform verbose error reporting if not NULL. Initialized in case of 8220 * error only. 8221 * 8222 * @return 8223 * how many contexts get in success, otherwise negative errno value. 8224 * if nb_contexts is 0, return the amount of all aged contexts. 8225 * if nb_contexts is not 0 , return the amount of aged flows reported 8226 * in the context array. 8227 */ 8228 int 8229 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 8230 uint32_t nb_contexts, struct rte_flow_error *error) 8231 { 8232 const struct mlx5_flow_driver_ops *fops; 8233 struct rte_flow_attr attr = { .transfer = 0 }; 8234 8235 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 8236 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 8237 return fops->get_aged_flows(dev, contexts, nb_contexts, 8238 error); 8239 } 8240 DRV_LOG(ERR, 8241 "port %u get aged flows is not supported.", 8242 dev->data->port_id); 8243 return -ENOTSUP; 8244 } 8245 8246 /* Wrapper for driver action_validate op callback */ 8247 static int 8248 flow_drv_action_validate(struct rte_eth_dev *dev, 8249 const struct rte_flow_indir_action_conf *conf, 8250 const struct rte_flow_action *action, 8251 const struct mlx5_flow_driver_ops *fops, 8252 struct rte_flow_error *error) 8253 { 8254 static const char err_msg[] = "indirect action validation unsupported"; 8255 8256 if (!fops->action_validate) { 8257 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8258 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8259 NULL, err_msg); 8260 return -rte_errno; 8261 } 8262 return fops->action_validate(dev, conf, action, error); 8263 } 8264 8265 /** 8266 * Destroys the shared action by handle. 8267 * 8268 * @param dev 8269 * Pointer to Ethernet device structure. 8270 * @param[in] handle 8271 * Handle for the indirect action object to be destroyed. 8272 * @param[out] error 8273 * Perform verbose error reporting if not NULL. PMDs initialize this 8274 * structure in case of error only. 8275 * 8276 * @return 8277 * 0 on success, a negative errno value otherwise and rte_errno is set. 8278 * 8279 * @note: wrapper for driver action_create op callback. 8280 */ 8281 static int 8282 mlx5_action_handle_destroy(struct rte_eth_dev *dev, 8283 struct rte_flow_action_handle *handle, 8284 struct rte_flow_error *error) 8285 { 8286 static const char err_msg[] = "indirect action destruction unsupported"; 8287 struct rte_flow_attr attr = { .transfer = 0 }; 8288 const struct mlx5_flow_driver_ops *fops = 8289 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8290 8291 if (!fops->action_destroy) { 8292 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8293 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8294 NULL, err_msg); 8295 return -rte_errno; 8296 } 8297 return fops->action_destroy(dev, handle, error); 8298 } 8299 8300 /* Wrapper for driver action_destroy op callback */ 8301 static int 8302 flow_drv_action_update(struct rte_eth_dev *dev, 8303 struct rte_flow_action_handle *handle, 8304 const void *update, 8305 const struct mlx5_flow_driver_ops *fops, 8306 struct rte_flow_error *error) 8307 { 8308 static const char err_msg[] = "indirect action update unsupported"; 8309 8310 if (!fops->action_update) { 8311 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8312 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8313 NULL, err_msg); 8314 return -rte_errno; 8315 } 8316 return fops->action_update(dev, handle, update, error); 8317 } 8318 8319 /* Wrapper for driver action_destroy op callback */ 8320 static int 8321 flow_drv_action_query(struct rte_eth_dev *dev, 8322 const struct rte_flow_action_handle *handle, 8323 void *data, 8324 const struct mlx5_flow_driver_ops *fops, 8325 struct rte_flow_error *error) 8326 { 8327 static const char err_msg[] = "indirect action query unsupported"; 8328 8329 if (!fops->action_query) { 8330 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8331 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8332 NULL, err_msg); 8333 return -rte_errno; 8334 } 8335 return fops->action_query(dev, handle, data, error); 8336 } 8337 8338 /** 8339 * Create indirect action for reuse in multiple flow rules. 8340 * 8341 * @param dev 8342 * Pointer to Ethernet device structure. 8343 * @param conf 8344 * Pointer to indirect action object configuration. 8345 * @param[in] action 8346 * Action configuration for indirect action object creation. 8347 * @param[out] error 8348 * Perform verbose error reporting if not NULL. PMDs initialize this 8349 * structure in case of error only. 8350 * @return 8351 * A valid handle in case of success, NULL otherwise and rte_errno is set. 8352 */ 8353 static struct rte_flow_action_handle * 8354 mlx5_action_handle_create(struct rte_eth_dev *dev, 8355 const struct rte_flow_indir_action_conf *conf, 8356 const struct rte_flow_action *action, 8357 struct rte_flow_error *error) 8358 { 8359 static const char err_msg[] = "indirect action creation unsupported"; 8360 struct rte_flow_attr attr = { .transfer = 0 }; 8361 const struct mlx5_flow_driver_ops *fops = 8362 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8363 8364 if (flow_drv_action_validate(dev, conf, action, fops, error)) 8365 return NULL; 8366 if (!fops->action_create) { 8367 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8368 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8369 NULL, err_msg); 8370 return NULL; 8371 } 8372 return fops->action_create(dev, conf, action, error); 8373 } 8374 8375 /** 8376 * Updates inplace the indirect action configuration pointed by *handle* 8377 * with the configuration provided as *update* argument. 8378 * The update of the indirect action configuration effects all flow rules 8379 * reusing the action via handle. 8380 * 8381 * @param dev 8382 * Pointer to Ethernet device structure. 8383 * @param[in] handle 8384 * Handle for the indirect action to be updated. 8385 * @param[in] update 8386 * Action specification used to modify the action pointed by handle. 8387 * *update* could be of same type with the action pointed by the *handle* 8388 * handle argument, or some other structures like a wrapper, depending on 8389 * the indirect action type. 8390 * @param[out] error 8391 * Perform verbose error reporting if not NULL. PMDs initialize this 8392 * structure in case of error only. 8393 * 8394 * @return 8395 * 0 on success, a negative errno value otherwise and rte_errno is set. 8396 */ 8397 static int 8398 mlx5_action_handle_update(struct rte_eth_dev *dev, 8399 struct rte_flow_action_handle *handle, 8400 const void *update, 8401 struct rte_flow_error *error) 8402 { 8403 struct rte_flow_attr attr = { .transfer = 0 }; 8404 const struct mlx5_flow_driver_ops *fops = 8405 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8406 int ret; 8407 8408 ret = flow_drv_action_validate(dev, NULL, 8409 (const struct rte_flow_action *)update, fops, error); 8410 if (ret) 8411 return ret; 8412 return flow_drv_action_update(dev, handle, update, fops, 8413 error); 8414 } 8415 8416 /** 8417 * Query the indirect action by handle. 8418 * 8419 * This function allows retrieving action-specific data such as counters. 8420 * Data is gathered by special action which may be present/referenced in 8421 * more than one flow rule definition. 8422 * 8423 * see @RTE_FLOW_ACTION_TYPE_COUNT 8424 * 8425 * @param dev 8426 * Pointer to Ethernet device structure. 8427 * @param[in] handle 8428 * Handle for the indirect action to query. 8429 * @param[in, out] data 8430 * Pointer to storage for the associated query data type. 8431 * @param[out] error 8432 * Perform verbose error reporting if not NULL. PMDs initialize this 8433 * structure in case of error only. 8434 * 8435 * @return 8436 * 0 on success, a negative errno value otherwise and rte_errno is set. 8437 */ 8438 static int 8439 mlx5_action_handle_query(struct rte_eth_dev *dev, 8440 const struct rte_flow_action_handle *handle, 8441 void *data, 8442 struct rte_flow_error *error) 8443 { 8444 struct rte_flow_attr attr = { .transfer = 0 }; 8445 const struct mlx5_flow_driver_ops *fops = 8446 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8447 8448 return flow_drv_action_query(dev, handle, data, fops, error); 8449 } 8450 8451 /** 8452 * Destroy all indirect actions (shared RSS). 8453 * 8454 * @param dev 8455 * Pointer to Ethernet device. 8456 * 8457 * @return 8458 * 0 on success, a negative errno value otherwise and rte_errno is set. 8459 */ 8460 int 8461 mlx5_action_handle_flush(struct rte_eth_dev *dev) 8462 { 8463 struct rte_flow_error error; 8464 struct mlx5_priv *priv = dev->data->dev_private; 8465 struct mlx5_shared_action_rss *shared_rss; 8466 int ret = 0; 8467 uint32_t idx; 8468 8469 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 8470 priv->rss_shared_actions, idx, shared_rss, next) { 8471 ret |= mlx5_action_handle_destroy(dev, 8472 (struct rte_flow_action_handle *)(uintptr_t)idx, &error); 8473 } 8474 return ret; 8475 } 8476 8477 #ifndef HAVE_MLX5DV_DR 8478 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) 8479 #else 8480 #define MLX5_DOMAIN_SYNC_FLOW \ 8481 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) 8482 #endif 8483 8484 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) 8485 { 8486 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 8487 const struct mlx5_flow_driver_ops *fops; 8488 int ret; 8489 struct rte_flow_attr attr = { .transfer = 0 }; 8490 8491 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8492 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); 8493 if (ret > 0) 8494 ret = -ret; 8495 return ret; 8496 } 8497 8498 const struct mlx5_flow_tunnel * 8499 mlx5_get_tof(const struct rte_flow_item *item, 8500 const struct rte_flow_action *action, 8501 enum mlx5_tof_rule_type *rule_type) 8502 { 8503 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 8504 if (item->type == (typeof(item->type)) 8505 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) { 8506 *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE; 8507 return flow_items_to_tunnel(item); 8508 } 8509 } 8510 for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) { 8511 if (action->type == (typeof(action->type)) 8512 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) { 8513 *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE; 8514 return flow_actions_to_tunnel(action); 8515 } 8516 } 8517 return NULL; 8518 } 8519 8520 /** 8521 * tunnel offload functionalilty is defined for DV environment only 8522 */ 8523 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8524 __extension__ 8525 union tunnel_offload_mark { 8526 uint32_t val; 8527 struct { 8528 uint32_t app_reserve:8; 8529 uint32_t table_id:15; 8530 uint32_t transfer:1; 8531 uint32_t _unused_:8; 8532 }; 8533 }; 8534 8535 static bool 8536 mlx5_access_tunnel_offload_db 8537 (struct rte_eth_dev *dev, 8538 bool (*match)(struct rte_eth_dev *, 8539 struct mlx5_flow_tunnel *, const void *), 8540 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8541 void (*miss)(struct rte_eth_dev *, void *), 8542 void *ctx, bool lock_op); 8543 8544 static int 8545 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 8546 struct rte_flow *flow, 8547 const struct rte_flow_attr *attr, 8548 const struct rte_flow_action *app_actions, 8549 uint32_t flow_idx, 8550 const struct mlx5_flow_tunnel *tunnel, 8551 struct tunnel_default_miss_ctx *ctx, 8552 struct rte_flow_error *error) 8553 { 8554 struct mlx5_priv *priv = dev->data->dev_private; 8555 struct mlx5_flow *dev_flow; 8556 struct rte_flow_attr miss_attr = *attr; 8557 const struct rte_flow_item miss_items[2] = { 8558 { 8559 .type = RTE_FLOW_ITEM_TYPE_ETH, 8560 .spec = NULL, 8561 .last = NULL, 8562 .mask = NULL 8563 }, 8564 { 8565 .type = RTE_FLOW_ITEM_TYPE_END, 8566 .spec = NULL, 8567 .last = NULL, 8568 .mask = NULL 8569 } 8570 }; 8571 union tunnel_offload_mark mark_id; 8572 struct rte_flow_action_mark miss_mark; 8573 struct rte_flow_action miss_actions[3] = { 8574 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 8575 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 8576 }; 8577 const struct rte_flow_action_jump *jump_data; 8578 uint32_t i, flow_table = 0; /* prevent compilation warning */ 8579 struct flow_grp_info grp_info = { 8580 .external = 1, 8581 .transfer = attr->transfer, 8582 .fdb_def_rule = !!priv->fdb_def_rule, 8583 .std_tbl_fix = 0, 8584 }; 8585 int ret; 8586 8587 if (!attr->transfer) { 8588 uint32_t q_size; 8589 8590 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 8591 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 8592 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 8593 0, SOCKET_ID_ANY); 8594 if (!ctx->queue) 8595 return rte_flow_error_set 8596 (error, ENOMEM, 8597 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8598 NULL, "invalid default miss RSS"); 8599 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 8600 ctx->action_rss.level = 0, 8601 ctx->action_rss.types = priv->rss_conf.rss_hf, 8602 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 8603 ctx->action_rss.queue_num = priv->reta_idx_n, 8604 ctx->action_rss.key = priv->rss_conf.rss_key, 8605 ctx->action_rss.queue = ctx->queue; 8606 if (!priv->reta_idx_n || !priv->rxqs_n) 8607 return rte_flow_error_set 8608 (error, EINVAL, 8609 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8610 NULL, "invalid port configuration"); 8611 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 8612 ctx->action_rss.types = 0; 8613 for (i = 0; i != priv->reta_idx_n; ++i) 8614 ctx->queue[i] = (*priv->reta_idx)[i]; 8615 } else { 8616 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 8617 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 8618 } 8619 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 8620 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 8621 jump_data = app_actions->conf; 8622 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 8623 miss_attr.group = jump_data->group; 8624 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 8625 &flow_table, &grp_info, error); 8626 if (ret) 8627 return rte_flow_error_set(error, EINVAL, 8628 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8629 NULL, "invalid tunnel id"); 8630 mark_id.app_reserve = 0; 8631 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 8632 mark_id.transfer = !!attr->transfer; 8633 mark_id._unused_ = 0; 8634 miss_mark.id = mark_id.val; 8635 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 8636 miss_items, miss_actions, flow_idx, error); 8637 if (!dev_flow) 8638 return -rte_errno; 8639 dev_flow->flow = flow; 8640 dev_flow->external = true; 8641 dev_flow->tunnel = tunnel; 8642 dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE; 8643 /* Subflow object was created, we must include one in the list. */ 8644 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 8645 dev_flow->handle, next); 8646 DRV_LOG(DEBUG, 8647 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 8648 dev->data->port_id, tunnel->app_tunnel.type, 8649 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 8650 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 8651 miss_actions, error); 8652 if (!ret) 8653 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 8654 error); 8655 8656 return ret; 8657 } 8658 8659 static const struct mlx5_flow_tbl_data_entry * 8660 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 8661 { 8662 struct mlx5_priv *priv = dev->data->dev_private; 8663 struct mlx5_dev_ctx_shared *sh = priv->sh; 8664 struct mlx5_list_entry *he; 8665 union tunnel_offload_mark mbits = { .val = mark }; 8666 union mlx5_flow_tbl_key table_key = { 8667 { 8668 .level = tunnel_id_to_flow_tbl(mbits.table_id), 8669 .id = 0, 8670 .reserved = 0, 8671 .dummy = 0, 8672 .is_fdb = !!mbits.transfer, 8673 .is_egress = 0, 8674 } 8675 }; 8676 struct mlx5_flow_cb_ctx ctx = { 8677 .data = &table_key.v64, 8678 }; 8679 8680 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx); 8681 return he ? 8682 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 8683 } 8684 8685 static void 8686 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx, 8687 struct mlx5_list_entry *entry) 8688 { 8689 struct mlx5_dev_ctx_shared *sh = tool_ctx; 8690 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8691 8692 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8693 tunnel_flow_tbl_to_id(tte->flow_table)); 8694 mlx5_free(tte); 8695 } 8696 8697 static int 8698 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused, 8699 struct mlx5_list_entry *entry, void *cb_ctx) 8700 { 8701 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 8702 union tunnel_tbl_key tbl = { 8703 .val = *(uint64_t *)(ctx->data), 8704 }; 8705 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8706 8707 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group; 8708 } 8709 8710 static struct mlx5_list_entry * 8711 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx) 8712 { 8713 struct mlx5_dev_ctx_shared *sh = tool_ctx; 8714 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 8715 struct tunnel_tbl_entry *tte; 8716 union tunnel_tbl_key tbl = { 8717 .val = *(uint64_t *)(ctx->data), 8718 }; 8719 8720 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 8721 sizeof(*tte), 0, 8722 SOCKET_ID_ANY); 8723 if (!tte) 8724 goto err; 8725 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8726 &tte->flow_table); 8727 if (tte->flow_table >= MLX5_MAX_TABLES) { 8728 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.", 8729 tte->flow_table); 8730 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8731 tte->flow_table); 8732 goto err; 8733 } else if (!tte->flow_table) { 8734 goto err; 8735 } 8736 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 8737 tte->tunnel_id = tbl.tunnel_id; 8738 tte->group = tbl.group; 8739 return &tte->hash; 8740 err: 8741 if (tte) 8742 mlx5_free(tte); 8743 return NULL; 8744 } 8745 8746 static struct mlx5_list_entry * 8747 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused, 8748 struct mlx5_list_entry *oentry, 8749 void *cb_ctx __rte_unused) 8750 { 8751 struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte), 8752 0, SOCKET_ID_ANY); 8753 8754 if (!tte) 8755 return NULL; 8756 memcpy(tte, oentry, sizeof(*tte)); 8757 return &tte->hash; 8758 } 8759 8760 static void 8761 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused, 8762 struct mlx5_list_entry *entry) 8763 { 8764 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8765 8766 mlx5_free(tte); 8767 } 8768 8769 static uint32_t 8770 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 8771 const struct mlx5_flow_tunnel *tunnel, 8772 uint32_t group, uint32_t *table, 8773 struct rte_flow_error *error) 8774 { 8775 struct mlx5_list_entry *he; 8776 struct tunnel_tbl_entry *tte; 8777 union tunnel_tbl_key key = { 8778 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 8779 .group = group 8780 }; 8781 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8782 struct mlx5_hlist *group_hash; 8783 struct mlx5_flow_cb_ctx ctx = { 8784 .data = &key.val, 8785 }; 8786 8787 group_hash = tunnel ? tunnel->groups : thub->groups; 8788 he = mlx5_hlist_register(group_hash, key.val, &ctx); 8789 if (!he) 8790 return rte_flow_error_set(error, EINVAL, 8791 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 8792 NULL, 8793 "tunnel group index not supported"); 8794 tte = container_of(he, typeof(*tte), hash); 8795 *table = tte->flow_table; 8796 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 8797 dev->data->port_id, key.tunnel_id, group, *table); 8798 return 0; 8799 } 8800 8801 static void 8802 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 8803 struct mlx5_flow_tunnel *tunnel) 8804 { 8805 struct mlx5_priv *priv = dev->data->dev_private; 8806 struct mlx5_indexed_pool *ipool; 8807 8808 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 8809 dev->data->port_id, tunnel->tunnel_id); 8810 LIST_REMOVE(tunnel, chain); 8811 mlx5_hlist_destroy(tunnel->groups); 8812 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8813 mlx5_ipool_free(ipool, tunnel->tunnel_id); 8814 } 8815 8816 static bool 8817 mlx5_access_tunnel_offload_db 8818 (struct rte_eth_dev *dev, 8819 bool (*match)(struct rte_eth_dev *, 8820 struct mlx5_flow_tunnel *, const void *), 8821 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8822 void (*miss)(struct rte_eth_dev *, void *), 8823 void *ctx, bool lock_op) 8824 { 8825 bool verdict = false; 8826 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8827 struct mlx5_flow_tunnel *tunnel; 8828 8829 rte_spinlock_lock(&thub->sl); 8830 LIST_FOREACH(tunnel, &thub->tunnels, chain) { 8831 verdict = match(dev, tunnel, (const void *)ctx); 8832 if (verdict) 8833 break; 8834 } 8835 if (!lock_op) 8836 rte_spinlock_unlock(&thub->sl); 8837 if (verdict && hit) 8838 hit(dev, tunnel, ctx); 8839 if (!verdict && miss) 8840 miss(dev, ctx); 8841 if (lock_op) 8842 rte_spinlock_unlock(&thub->sl); 8843 8844 return verdict; 8845 } 8846 8847 struct tunnel_db_find_tunnel_id_ctx { 8848 uint32_t tunnel_id; 8849 struct mlx5_flow_tunnel *tunnel; 8850 }; 8851 8852 static bool 8853 find_tunnel_id_match(struct rte_eth_dev *dev, 8854 struct mlx5_flow_tunnel *tunnel, const void *x) 8855 { 8856 const struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8857 8858 RTE_SET_USED(dev); 8859 return tunnel->tunnel_id == ctx->tunnel_id; 8860 } 8861 8862 static void 8863 find_tunnel_id_hit(struct rte_eth_dev *dev, 8864 struct mlx5_flow_tunnel *tunnel, void *x) 8865 { 8866 struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8867 RTE_SET_USED(dev); 8868 ctx->tunnel = tunnel; 8869 } 8870 8871 static struct mlx5_flow_tunnel * 8872 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 8873 { 8874 struct tunnel_db_find_tunnel_id_ctx ctx = { 8875 .tunnel_id = id, 8876 }; 8877 8878 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match, 8879 find_tunnel_id_hit, NULL, &ctx, true); 8880 8881 return ctx.tunnel; 8882 } 8883 8884 static struct mlx5_flow_tunnel * 8885 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 8886 const struct rte_flow_tunnel *app_tunnel) 8887 { 8888 struct mlx5_priv *priv = dev->data->dev_private; 8889 struct mlx5_indexed_pool *ipool; 8890 struct mlx5_flow_tunnel *tunnel; 8891 uint32_t id; 8892 8893 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8894 tunnel = mlx5_ipool_zmalloc(ipool, &id); 8895 if (!tunnel) 8896 return NULL; 8897 if (id >= MLX5_MAX_TUNNELS) { 8898 mlx5_ipool_free(ipool, id); 8899 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id); 8900 return NULL; 8901 } 8902 tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true, 8903 priv->sh, 8904 mlx5_flow_tunnel_grp2tbl_create_cb, 8905 mlx5_flow_tunnel_grp2tbl_match_cb, 8906 mlx5_flow_tunnel_grp2tbl_remove_cb, 8907 mlx5_flow_tunnel_grp2tbl_clone_cb, 8908 mlx5_flow_tunnel_grp2tbl_clone_free_cb); 8909 if (!tunnel->groups) { 8910 mlx5_ipool_free(ipool, id); 8911 return NULL; 8912 } 8913 /* initiate new PMD tunnel */ 8914 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 8915 tunnel->tunnel_id = id; 8916 tunnel->action.type = (typeof(tunnel->action.type)) 8917 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 8918 tunnel->action.conf = tunnel; 8919 tunnel->item.type = (typeof(tunnel->item.type)) 8920 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 8921 tunnel->item.spec = tunnel; 8922 tunnel->item.last = NULL; 8923 tunnel->item.mask = NULL; 8924 8925 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 8926 dev->data->port_id, tunnel->tunnel_id); 8927 8928 return tunnel; 8929 } 8930 8931 struct tunnel_db_get_tunnel_ctx { 8932 const struct rte_flow_tunnel *app_tunnel; 8933 struct mlx5_flow_tunnel *tunnel; 8934 }; 8935 8936 static bool get_tunnel_match(struct rte_eth_dev *dev, 8937 struct mlx5_flow_tunnel *tunnel, const void *x) 8938 { 8939 const struct tunnel_db_get_tunnel_ctx *ctx = x; 8940 8941 RTE_SET_USED(dev); 8942 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel, 8943 sizeof(*ctx->app_tunnel)); 8944 } 8945 8946 static void get_tunnel_hit(struct rte_eth_dev *dev, 8947 struct mlx5_flow_tunnel *tunnel, void *x) 8948 { 8949 /* called under tunnel spinlock protection */ 8950 struct tunnel_db_get_tunnel_ctx *ctx = x; 8951 8952 RTE_SET_USED(dev); 8953 tunnel->refctn++; 8954 ctx->tunnel = tunnel; 8955 } 8956 8957 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x) 8958 { 8959 /* called under tunnel spinlock protection */ 8960 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8961 struct tunnel_db_get_tunnel_ctx *ctx = x; 8962 8963 rte_spinlock_unlock(&thub->sl); 8964 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel); 8965 rte_spinlock_lock(&thub->sl); 8966 if (ctx->tunnel) { 8967 ctx->tunnel->refctn = 1; 8968 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain); 8969 } 8970 } 8971 8972 8973 static int 8974 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 8975 const struct rte_flow_tunnel *app_tunnel, 8976 struct mlx5_flow_tunnel **tunnel) 8977 { 8978 struct tunnel_db_get_tunnel_ctx ctx = { 8979 .app_tunnel = app_tunnel, 8980 }; 8981 8982 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit, 8983 get_tunnel_miss, &ctx, true); 8984 *tunnel = ctx.tunnel; 8985 return ctx.tunnel ? 0 : -ENOMEM; 8986 } 8987 8988 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 8989 { 8990 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 8991 8992 if (!thub) 8993 return; 8994 if (!LIST_EMPTY(&thub->tunnels)) 8995 DRV_LOG(WARNING, "port %u tunnels present", port_id); 8996 mlx5_hlist_destroy(thub->groups); 8997 mlx5_free(thub); 8998 } 8999 9000 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 9001 { 9002 int err; 9003 struct mlx5_flow_tunnel_hub *thub; 9004 9005 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 9006 0, SOCKET_ID_ANY); 9007 if (!thub) 9008 return -ENOMEM; 9009 LIST_INIT(&thub->tunnels); 9010 rte_spinlock_init(&thub->sl); 9011 thub->groups = mlx5_hlist_create("flow groups", 64, 9012 false, true, sh, 9013 mlx5_flow_tunnel_grp2tbl_create_cb, 9014 mlx5_flow_tunnel_grp2tbl_match_cb, 9015 mlx5_flow_tunnel_grp2tbl_remove_cb, 9016 mlx5_flow_tunnel_grp2tbl_clone_cb, 9017 mlx5_flow_tunnel_grp2tbl_clone_free_cb); 9018 if (!thub->groups) { 9019 err = -rte_errno; 9020 goto err; 9021 } 9022 sh->tunnel_hub = thub; 9023 9024 return 0; 9025 9026 err: 9027 if (thub->groups) 9028 mlx5_hlist_destroy(thub->groups); 9029 if (thub) 9030 mlx5_free(thub); 9031 return err; 9032 } 9033 9034 static inline bool 9035 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 9036 struct rte_flow_tunnel *tunnel, 9037 const char *err_msg) 9038 { 9039 err_msg = NULL; 9040 if (!is_tunnel_offload_active(dev)) { 9041 err_msg = "tunnel offload was not activated"; 9042 goto out; 9043 } else if (!tunnel) { 9044 err_msg = "no application tunnel"; 9045 goto out; 9046 } 9047 9048 switch (tunnel->type) { 9049 default: 9050 err_msg = "unsupported tunnel type"; 9051 goto out; 9052 case RTE_FLOW_ITEM_TYPE_VXLAN: 9053 break; 9054 } 9055 9056 out: 9057 return !err_msg; 9058 } 9059 9060 static int 9061 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 9062 struct rte_flow_tunnel *app_tunnel, 9063 struct rte_flow_action **actions, 9064 uint32_t *num_of_actions, 9065 struct rte_flow_error *error) 9066 { 9067 int ret; 9068 struct mlx5_flow_tunnel *tunnel; 9069 const char *err_msg = NULL; 9070 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 9071 9072 if (!verdict) 9073 return rte_flow_error_set(error, EINVAL, 9074 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9075 err_msg); 9076 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9077 if (ret < 0) { 9078 return rte_flow_error_set(error, ret, 9079 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9080 "failed to initialize pmd tunnel"); 9081 } 9082 *actions = &tunnel->action; 9083 *num_of_actions = 1; 9084 return 0; 9085 } 9086 9087 static int 9088 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 9089 struct rte_flow_tunnel *app_tunnel, 9090 struct rte_flow_item **items, 9091 uint32_t *num_of_items, 9092 struct rte_flow_error *error) 9093 { 9094 int ret; 9095 struct mlx5_flow_tunnel *tunnel; 9096 const char *err_msg = NULL; 9097 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 9098 9099 if (!verdict) 9100 return rte_flow_error_set(error, EINVAL, 9101 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9102 err_msg); 9103 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9104 if (ret < 0) { 9105 return rte_flow_error_set(error, ret, 9106 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9107 "failed to initialize pmd tunnel"); 9108 } 9109 *items = &tunnel->item; 9110 *num_of_items = 1; 9111 return 0; 9112 } 9113 9114 struct tunnel_db_element_release_ctx { 9115 struct rte_flow_item *items; 9116 struct rte_flow_action *actions; 9117 uint32_t num_elements; 9118 struct rte_flow_error *error; 9119 int ret; 9120 }; 9121 9122 static bool 9123 tunnel_element_release_match(struct rte_eth_dev *dev, 9124 struct mlx5_flow_tunnel *tunnel, const void *x) 9125 { 9126 const struct tunnel_db_element_release_ctx *ctx = x; 9127 9128 RTE_SET_USED(dev); 9129 if (ctx->num_elements != 1) 9130 return false; 9131 else if (ctx->items) 9132 return ctx->items == &tunnel->item; 9133 else if (ctx->actions) 9134 return ctx->actions == &tunnel->action; 9135 9136 return false; 9137 } 9138 9139 static void 9140 tunnel_element_release_hit(struct rte_eth_dev *dev, 9141 struct mlx5_flow_tunnel *tunnel, void *x) 9142 { 9143 struct tunnel_db_element_release_ctx *ctx = x; 9144 ctx->ret = 0; 9145 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 9146 mlx5_flow_tunnel_free(dev, tunnel); 9147 } 9148 9149 static void 9150 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x) 9151 { 9152 struct tunnel_db_element_release_ctx *ctx = x; 9153 RTE_SET_USED(dev); 9154 ctx->ret = rte_flow_error_set(ctx->error, EINVAL, 9155 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9156 "invalid argument"); 9157 } 9158 9159 static int 9160 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 9161 struct rte_flow_item *pmd_items, 9162 uint32_t num_items, struct rte_flow_error *err) 9163 { 9164 struct tunnel_db_element_release_ctx ctx = { 9165 .items = pmd_items, 9166 .actions = NULL, 9167 .num_elements = num_items, 9168 .error = err, 9169 }; 9170 9171 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9172 tunnel_element_release_hit, 9173 tunnel_element_release_miss, &ctx, false); 9174 9175 return ctx.ret; 9176 } 9177 9178 static int 9179 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 9180 struct rte_flow_action *pmd_actions, 9181 uint32_t num_actions, struct rte_flow_error *err) 9182 { 9183 struct tunnel_db_element_release_ctx ctx = { 9184 .items = NULL, 9185 .actions = pmd_actions, 9186 .num_elements = num_actions, 9187 .error = err, 9188 }; 9189 9190 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9191 tunnel_element_release_hit, 9192 tunnel_element_release_miss, &ctx, false); 9193 9194 return ctx.ret; 9195 } 9196 9197 static int 9198 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 9199 struct rte_mbuf *m, 9200 struct rte_flow_restore_info *info, 9201 struct rte_flow_error *err) 9202 { 9203 uint64_t ol_flags = m->ol_flags; 9204 const struct mlx5_flow_tbl_data_entry *tble; 9205 const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID; 9206 9207 if (!is_tunnel_offload_active(dev)) { 9208 info->flags = 0; 9209 return 0; 9210 } 9211 9212 if ((ol_flags & mask) != mask) 9213 goto err; 9214 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 9215 if (!tble) { 9216 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 9217 dev->data->port_id, m->hash.fdir.hi); 9218 goto err; 9219 } 9220 MLX5_ASSERT(tble->tunnel); 9221 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 9222 info->group_id = tble->group_id; 9223 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 9224 RTE_FLOW_RESTORE_INFO_GROUP_ID | 9225 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 9226 9227 return 0; 9228 9229 err: 9230 return rte_flow_error_set(err, EINVAL, 9231 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9232 "failed to get restore info"); 9233 } 9234 9235 #else /* HAVE_IBV_FLOW_DV_SUPPORT */ 9236 static int 9237 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev, 9238 __rte_unused struct rte_flow_tunnel *app_tunnel, 9239 __rte_unused struct rte_flow_action **actions, 9240 __rte_unused uint32_t *num_of_actions, 9241 __rte_unused struct rte_flow_error *error) 9242 { 9243 return -ENOTSUP; 9244 } 9245 9246 static int 9247 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev, 9248 __rte_unused struct rte_flow_tunnel *app_tunnel, 9249 __rte_unused struct rte_flow_item **items, 9250 __rte_unused uint32_t *num_of_items, 9251 __rte_unused struct rte_flow_error *error) 9252 { 9253 return -ENOTSUP; 9254 } 9255 9256 static int 9257 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev, 9258 __rte_unused struct rte_flow_item *pmd_items, 9259 __rte_unused uint32_t num_items, 9260 __rte_unused struct rte_flow_error *err) 9261 { 9262 return -ENOTSUP; 9263 } 9264 9265 static int 9266 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev, 9267 __rte_unused struct rte_flow_action *pmd_action, 9268 __rte_unused uint32_t num_actions, 9269 __rte_unused struct rte_flow_error *err) 9270 { 9271 return -ENOTSUP; 9272 } 9273 9274 static int 9275 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev, 9276 __rte_unused struct rte_mbuf *m, 9277 __rte_unused struct rte_flow_restore_info *i, 9278 __rte_unused struct rte_flow_error *err) 9279 { 9280 return -ENOTSUP; 9281 } 9282 9283 static int 9284 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev, 9285 __rte_unused struct rte_flow *flow, 9286 __rte_unused const struct rte_flow_attr *attr, 9287 __rte_unused const struct rte_flow_action *actions, 9288 __rte_unused uint32_t flow_idx, 9289 __rte_unused const struct mlx5_flow_tunnel *tunnel, 9290 __rte_unused struct tunnel_default_miss_ctx *ctx, 9291 __rte_unused struct rte_flow_error *error) 9292 { 9293 return -ENOTSUP; 9294 } 9295 9296 static struct mlx5_flow_tunnel * 9297 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev, 9298 __rte_unused uint32_t id) 9299 { 9300 return NULL; 9301 } 9302 9303 static void 9304 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev, 9305 __rte_unused struct mlx5_flow_tunnel *tunnel) 9306 { 9307 } 9308 9309 static uint32_t 9310 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev, 9311 __rte_unused const struct mlx5_flow_tunnel *t, 9312 __rte_unused uint32_t group, 9313 __rte_unused uint32_t *table, 9314 struct rte_flow_error *error) 9315 { 9316 return rte_flow_error_set(error, ENOTSUP, 9317 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9318 "tunnel offload requires DV support"); 9319 } 9320 9321 void 9322 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh, 9323 __rte_unused uint16_t port_id) 9324 { 9325 } 9326 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 9327 9328 static void 9329 mlx5_dbg__print_pattern(const struct rte_flow_item *item) 9330 { 9331 int ret; 9332 struct rte_flow_error error; 9333 9334 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 9335 char *item_name; 9336 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name, 9337 sizeof(item_name), 9338 (void *)(uintptr_t)item->type, &error); 9339 if (ret > 0) 9340 printf("%s ", item_name); 9341 else 9342 printf("%d\n", (int)item->type); 9343 } 9344 printf("END\n"); 9345 } 9346