1 /*- 2 * BSD LICENSE 3 * 4 * Copyright 2015 6WIND S.A. 5 * Copyright 2015 Mellanox. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of 6WIND S.A. nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef RTE_PMD_MLX5_H_ 35 #define RTE_PMD_MLX5_H_ 36 37 #include <stddef.h> 38 #include <stdint.h> 39 #include <limits.h> 40 #include <net/if.h> 41 #include <netinet/in.h> 42 43 /* Verbs header. */ 44 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 45 #ifdef PEDANTIC 46 #pragma GCC diagnostic ignored "-Wpedantic" 47 #endif 48 #include <infiniband/verbs.h> 49 #ifdef PEDANTIC 50 #pragma GCC diagnostic error "-Wpedantic" 51 #endif 52 53 /* DPDK headers don't like -pedantic. */ 54 #ifdef PEDANTIC 55 #pragma GCC diagnostic ignored "-Wpedantic" 56 #endif 57 #include <rte_ether.h> 58 #include <rte_ethdev.h> 59 #include <rte_spinlock.h> 60 #include <rte_interrupts.h> 61 #include <rte_errno.h> 62 #include <rte_flow.h> 63 #ifdef PEDANTIC 64 #pragma GCC diagnostic error "-Wpedantic" 65 #endif 66 67 #include "mlx5_utils.h" 68 #include "mlx5_rxtx.h" 69 #include "mlx5_autoconf.h" 70 #include "mlx5_defs.h" 71 72 #if !defined(HAVE_VERBS_IBV_EXP_CQ_COMPRESSED_CQE) || \ 73 !defined(HAVE_VERBS_MLX5_ETH_VLAN_INLINE_HEADER_SIZE) 74 #error Mellanox OFED >= 3.3 is required, please refer to the documentation. 75 #endif 76 77 enum { 78 PCI_VENDOR_ID_MELLANOX = 0x15b3, 79 }; 80 81 enum { 82 PCI_DEVICE_ID_MELLANOX_CONNECTX4 = 0x1013, 83 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF = 0x1014, 84 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX = 0x1015, 85 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF = 0x1016, 86 PCI_DEVICE_ID_MELLANOX_CONNECTX5 = 0x1017, 87 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF = 0x1018, 88 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX = 0x1019, 89 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF = 0x101a, 90 }; 91 92 struct mlx5_xstats_ctrl { 93 /* Number of device stats. */ 94 uint16_t stats_n; 95 /* Index in the device counters table. */ 96 uint16_t dev_table_idx[MLX5_MAX_XSTATS]; 97 uint64_t base[MLX5_MAX_XSTATS]; 98 }; 99 100 struct priv { 101 struct rte_eth_dev *dev; /* Ethernet device. */ 102 struct ibv_context *ctx; /* Verbs context. */ 103 struct ibv_device_attr device_attr; /* Device properties. */ 104 struct ibv_pd *pd; /* Protection Domain. */ 105 /* 106 * MAC addresses array and configuration bit-field. 107 * An extra entry that cannot be modified by the DPDK is reserved 108 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff). 109 */ 110 struct ether_addr mac[MLX5_MAX_MAC_ADDRESSES]; 111 BITFIELD_DECLARE(mac_configured, uint32_t, MLX5_MAX_MAC_ADDRESSES); 112 uint16_t vlan_filter[MLX5_MAX_VLAN_IDS]; /* VLAN filters table. */ 113 unsigned int vlan_filter_n; /* Number of configured VLAN filters. */ 114 /* Device properties. */ 115 uint16_t mtu; /* Configured MTU. */ 116 uint8_t port; /* Physical port number. */ 117 unsigned int started:1; /* Device started, flows enabled. */ 118 unsigned int promisc_req:1; /* Promiscuous mode requested. */ 119 unsigned int allmulti_req:1; /* All multicast mode requested. */ 120 unsigned int hw_csum:1; /* Checksum offload is supported. */ 121 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */ 122 unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */ 123 unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */ 124 unsigned int hw_padding:1; /* End alignment padding is supported. */ 125 unsigned int sriov:1; /* This is a VF or PF with VF devices. */ 126 unsigned int mps:2; /* Multi-packet send mode (0: disabled). */ 127 unsigned int mpw_hdr_dseg:1; /* Enable DSEGs in the title WQEBB. */ 128 unsigned int cqe_comp:1; /* Whether CQE compression is enabled. */ 129 unsigned int pending_alarm:1; /* An alarm is pending. */ 130 unsigned int tso:1; /* Whether TSO is supported. */ 131 unsigned int tunnel_en:1; 132 /* Whether Tx offloads for tunneled packets are supported. */ 133 unsigned int max_tso_payload_sz; /* Maximum TCP payload for TSO. */ 134 unsigned int txq_inline; /* Maximum packet size for inlining. */ 135 unsigned int txqs_inline; /* Queue number threshold for inlining. */ 136 unsigned int inline_max_packet_sz; /* Max packet size for inlining. */ 137 /* RX/TX queues. */ 138 unsigned int rxqs_n; /* RX queues array size. */ 139 unsigned int txqs_n; /* TX queues array size. */ 140 struct rxq *(*rxqs)[]; /* RX queues. */ 141 struct txq *(*txqs)[]; /* TX queues. */ 142 /* Indirection tables referencing all RX WQs. */ 143 struct ibv_exp_rwq_ind_table *(*ind_tables)[]; 144 unsigned int ind_tables_n; /* Number of indirection tables. */ 145 unsigned int ind_table_max_size; /* Maximum indirection table size. */ 146 /* Hash RX QPs feeding the indirection table. */ 147 struct hash_rxq (*hash_rxqs)[]; 148 unsigned int hash_rxqs_n; /* Hash RX QPs array size. */ 149 /* RSS configuration array indexed by hash RX queue type. */ 150 struct rte_eth_rss_conf *(*rss_conf)[]; 151 uint64_t rss_hf; /* RSS DPDK bit field of active RSS. */ 152 struct rte_intr_handle intr_handle; /* Interrupt handler. */ 153 unsigned int (*reta_idx)[]; /* RETA index table. */ 154 unsigned int reta_idx_n; /* RETA index size. */ 155 struct fdir_filter_list *fdir_filter_list; /* Flow director rules. */ 156 struct fdir_queue *fdir_drop_queue; /* Flow director drop queue. */ 157 struct rte_flow_drop *flow_drop_queue; /* Flow drop queue. */ 158 LIST_HEAD(mlx5_flows, rte_flow) flows; /* RTE Flow rules. */ 159 uint32_t link_speed_capa; /* Link speed capabilities. */ 160 struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */ 161 rte_spinlock_t lock; /* Lock for control functions. */ 162 }; 163 164 /* Local storage for secondary process data. */ 165 struct mlx5_secondary_data { 166 struct rte_eth_dev_data data; /* Local device data. */ 167 struct priv *primary_priv; /* Private structure from primary. */ 168 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */ 169 rte_spinlock_t lock; /* Port configuration lock. */ 170 } mlx5_secondary_data[RTE_MAX_ETHPORTS]; 171 172 /** 173 * Lock private structure to protect it from concurrent access in the 174 * control path. 175 * 176 * @param priv 177 * Pointer to private structure. 178 */ 179 static inline void 180 priv_lock(struct priv *priv) 181 { 182 rte_spinlock_lock(&priv->lock); 183 } 184 185 /** 186 * Unlock private structure. 187 * 188 * @param priv 189 * Pointer to private structure. 190 */ 191 static inline void 192 priv_unlock(struct priv *priv) 193 { 194 rte_spinlock_unlock(&priv->lock); 195 } 196 197 /* mlx5.c */ 198 199 int mlx5_getenv_int(const char *); 200 201 /* mlx5_ethdev.c */ 202 203 struct priv *mlx5_get_priv(struct rte_eth_dev *dev); 204 int mlx5_is_secondary(void); 205 int priv_get_ifname(const struct priv *, char (*)[IF_NAMESIZE]); 206 int priv_ifreq(const struct priv *, int req, struct ifreq *); 207 int priv_is_ib_cntr(const char *); 208 int priv_get_cntr_sysfs(struct priv *, const char *, uint64_t *); 209 int priv_get_num_vfs(struct priv *, uint16_t *); 210 int priv_get_mtu(struct priv *, uint16_t *); 211 int priv_set_flags(struct priv *, unsigned int, unsigned int); 212 int mlx5_dev_configure(struct rte_eth_dev *); 213 void mlx5_dev_infos_get(struct rte_eth_dev *, struct rte_eth_dev_info *); 214 const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev); 215 int mlx5_link_update(struct rte_eth_dev *, int); 216 int mlx5_dev_set_mtu(struct rte_eth_dev *, uint16_t); 217 int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *); 218 int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *); 219 int mlx5_ibv_device_to_pci_addr(const struct ibv_device *, 220 struct rte_pci_addr *); 221 void mlx5_dev_link_status_handler(void *); 222 void mlx5_dev_interrupt_handler(struct rte_intr_handle *, void *); 223 void priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *); 224 void priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *); 225 int mlx5_set_link_down(struct rte_eth_dev *dev); 226 int mlx5_set_link_up(struct rte_eth_dev *dev); 227 struct priv *mlx5_secondary_data_setup(struct priv *priv); 228 void priv_select_tx_function(struct priv *); 229 void priv_select_rx_function(struct priv *); 230 231 /* mlx5_mac.c */ 232 233 int priv_get_mac(struct priv *, uint8_t (*)[ETHER_ADDR_LEN]); 234 void hash_rxq_mac_addrs_del(struct hash_rxq *); 235 void priv_mac_addrs_disable(struct priv *); 236 void mlx5_mac_addr_remove(struct rte_eth_dev *, uint32_t); 237 int hash_rxq_mac_addrs_add(struct hash_rxq *); 238 int priv_mac_addr_add(struct priv *, unsigned int, 239 const uint8_t (*)[ETHER_ADDR_LEN]); 240 int priv_mac_addrs_enable(struct priv *); 241 void mlx5_mac_addr_add(struct rte_eth_dev *, struct ether_addr *, uint32_t, 242 uint32_t); 243 void mlx5_mac_addr_set(struct rte_eth_dev *, struct ether_addr *); 244 245 /* mlx5_rss.c */ 246 247 int rss_hash_rss_conf_new_key(struct priv *, const uint8_t *, unsigned int, 248 uint64_t); 249 int mlx5_rss_hash_update(struct rte_eth_dev *, struct rte_eth_rss_conf *); 250 int mlx5_rss_hash_conf_get(struct rte_eth_dev *, struct rte_eth_rss_conf *); 251 int priv_rss_reta_index_resize(struct priv *, unsigned int); 252 int mlx5_dev_rss_reta_query(struct rte_eth_dev *, 253 struct rte_eth_rss_reta_entry64 *, uint16_t); 254 int mlx5_dev_rss_reta_update(struct rte_eth_dev *, 255 struct rte_eth_rss_reta_entry64 *, uint16_t); 256 257 /* mlx5_rxmode.c */ 258 259 int priv_special_flow_enable(struct priv *, enum hash_rxq_flow_type); 260 void priv_special_flow_disable(struct priv *, enum hash_rxq_flow_type); 261 int priv_special_flow_enable_all(struct priv *); 262 void priv_special_flow_disable_all(struct priv *); 263 void mlx5_promiscuous_enable(struct rte_eth_dev *); 264 void mlx5_promiscuous_disable(struct rte_eth_dev *); 265 void mlx5_allmulticast_enable(struct rte_eth_dev *); 266 void mlx5_allmulticast_disable(struct rte_eth_dev *); 267 268 /* mlx5_stats.c */ 269 270 void priv_xstats_init(struct priv *); 271 void mlx5_stats_get(struct rte_eth_dev *, struct rte_eth_stats *); 272 void mlx5_stats_reset(struct rte_eth_dev *); 273 int mlx5_xstats_get(struct rte_eth_dev *, 274 struct rte_eth_xstat *, unsigned int); 275 void mlx5_xstats_reset(struct rte_eth_dev *); 276 int mlx5_xstats_get_names(struct rte_eth_dev *, 277 struct rte_eth_xstat_name *, unsigned int); 278 279 /* mlx5_vlan.c */ 280 281 int mlx5_vlan_filter_set(struct rte_eth_dev *, uint16_t, int); 282 void mlx5_vlan_offload_set(struct rte_eth_dev *, int); 283 void mlx5_vlan_strip_queue_set(struct rte_eth_dev *, uint16_t, int); 284 285 /* mlx5_trigger.c */ 286 287 int mlx5_dev_start(struct rte_eth_dev *); 288 void mlx5_dev_stop(struct rte_eth_dev *); 289 290 /* mlx5_fdir.c */ 291 292 void priv_fdir_queue_destroy(struct priv *, struct fdir_queue *); 293 int fdir_init_filters_list(struct priv *); 294 void priv_fdir_delete_filters_list(struct priv *); 295 void priv_fdir_disable(struct priv *); 296 void priv_fdir_enable(struct priv *); 297 int mlx5_dev_filter_ctrl(struct rte_eth_dev *, enum rte_filter_type, 298 enum rte_filter_op, void *); 299 300 /* mlx5_flow.c */ 301 302 int mlx5_flow_validate(struct rte_eth_dev *, const struct rte_flow_attr *, 303 const struct rte_flow_item [], 304 const struct rte_flow_action [], 305 struct rte_flow_error *); 306 struct rte_flow *mlx5_flow_create(struct rte_eth_dev *, 307 const struct rte_flow_attr *, 308 const struct rte_flow_item [], 309 const struct rte_flow_action [], 310 struct rte_flow_error *); 311 int mlx5_flow_destroy(struct rte_eth_dev *, struct rte_flow *, 312 struct rte_flow_error *); 313 int mlx5_flow_flush(struct rte_eth_dev *, struct rte_flow_error *); 314 int priv_flow_start(struct priv *); 315 void priv_flow_stop(struct priv *); 316 317 #endif /* RTE_PMD_MLX5_H_ */ 318