xref: /dpdk/drivers/net/mlx5/mlx5.c (revision d82ee2cc02bb619e6dd5c345a5b986afc6f8936a)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2015 6WIND S.A.
3  * Copyright 2015 Mellanox Technologies, Ltd
4  */
5 
6 #include <stddef.h>
7 #include <unistd.h>
8 #include <string.h>
9 #include <assert.h>
10 #include <dlfcn.h>
11 #include <stdint.h>
12 #include <stdlib.h>
13 #include <errno.h>
14 #include <net/if.h>
15 #include <sys/mman.h>
16 #include <linux/rtnetlink.h>
17 
18 /* Verbs header. */
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
20 #ifdef PEDANTIC
21 #pragma GCC diagnostic ignored "-Wpedantic"
22 #endif
23 #include <infiniband/verbs.h>
24 #ifdef PEDANTIC
25 #pragma GCC diagnostic error "-Wpedantic"
26 #endif
27 
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
31 #include <rte_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
40 
41 #include "mlx5.h"
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
47 #include "mlx5_mr.h"
48 #include "mlx5_flow.h"
49 
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
52 
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
55 
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
58 
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
61 
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
64 
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
67 
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
70 
71 /* Device parameter to configure inline send. */
72 #define MLX5_TXQ_INLINE "txq_inline"
73 
74 /*
75  * Device parameter to configure the number of TX queues threshold for
76  * enabling inline send.
77  */
78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
79 
80 /*
81  * Device parameter to configure the number of TX queues threshold for
82  * enabling vectorized Tx.
83  */
84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
85 
86 /* Device parameter to enable multi-packet send WQEs. */
87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
88 
89 /* Device parameter to include 2 dsegs in the title WQEBB. */
90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
91 
92 /* Device parameter to limit the size of inlining packet. */
93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
94 
95 /* Device parameter to enable hardware Tx vector. */
96 #define MLX5_TX_VEC_EN "tx_vec_en"
97 
98 /* Device parameter to enable hardware Rx vector. */
99 #define MLX5_RX_VEC_EN "rx_vec_en"
100 
101 /* Allow L3 VXLAN flow creation. */
102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
103 
104 /* Activate DV E-Switch flow steering. */
105 #define MLX5_DV_ESW_EN "dv_esw_en"
106 
107 /* Activate DV flow steering. */
108 #define MLX5_DV_FLOW_EN "dv_flow_en"
109 
110 /* Activate Netlink support in VF mode. */
111 #define MLX5_VF_NL_EN "vf_nl_en"
112 
113 /* Enable extending memsegs when creating a MR. */
114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
115 
116 /* Select port representors to instantiate. */
117 #define MLX5_REPRESENTOR "representor"
118 
119 #ifndef HAVE_IBV_MLX5_MOD_MPW
120 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
121 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
122 #endif
123 
124 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
125 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
126 #endif
127 
128 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
129 
130 /* Shared memory between primary and secondary processes. */
131 struct mlx5_shared_data *mlx5_shared_data;
132 
133 /* Spinlock for mlx5_shared_data allocation. */
134 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
135 
136 /* Process local data for secondary processes. */
137 static struct mlx5_local_data mlx5_local_data;
138 
139 /** Driver-specific log messages type. */
140 int mlx5_logtype;
141 
142 /** Data associated with devices to spawn. */
143 struct mlx5_dev_spawn_data {
144 	uint32_t ifindex; /**< Network interface index. */
145 	uint32_t max_port; /**< IB device maximal port index. */
146 	uint32_t ibv_port; /**< IB device physical port index. */
147 	struct mlx5_switch_info info; /**< Switch information. */
148 	struct ibv_device *ibv_dev; /**< Associated IB device. */
149 	struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
150 };
151 
152 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
153 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
154 
155 /**
156  * Allocate shared IB device context. If there is multiport device the
157  * master and representors will share this context, if there is single
158  * port dedicated IB device, the context will be used by only given
159  * port due to unification.
160  *
161  * Routine first searches the context for the specified IB device name,
162  * if found the shared context assumed and reference counter is incremented.
163  * If no context found the new one is created and initialized with specified
164  * IB device context and parameters.
165  *
166  * @param[in] spawn
167  *   Pointer to the IB device attributes (name, port, etc).
168  *
169  * @return
170  *   Pointer to mlx5_ibv_shared object on success,
171  *   otherwise NULL and rte_errno is set.
172  */
173 static struct mlx5_ibv_shared *
174 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
175 {
176 	struct mlx5_ibv_shared *sh;
177 	int err = 0;
178 	uint32_t i;
179 
180 	assert(spawn);
181 	/* Secondary process should not create the shared context. */
182 	assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
183 	pthread_mutex_lock(&mlx5_ibv_list_mutex);
184 	/* Search for IB context by device name. */
185 	LIST_FOREACH(sh, &mlx5_ibv_list, next) {
186 		if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
187 			sh->refcnt++;
188 			goto exit;
189 		}
190 	}
191 	/* No device found, we have to create new shared context. */
192 	assert(spawn->max_port);
193 	sh = rte_zmalloc("ethdev shared ib context",
194 			 sizeof(struct mlx5_ibv_shared) +
195 			 spawn->max_port *
196 			 sizeof(struct mlx5_ibv_shared_port),
197 			 RTE_CACHE_LINE_SIZE);
198 	if (!sh) {
199 		DRV_LOG(ERR, "shared context allocation failure");
200 		rte_errno  = ENOMEM;
201 		goto exit;
202 	}
203 	/* Try to open IB device with DV first, then usual Verbs. */
204 	errno = 0;
205 	sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
206 	if (sh->ctx) {
207 		sh->devx = 1;
208 		DRV_LOG(DEBUG, "DevX is supported");
209 	} else {
210 		sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
211 		if (!sh->ctx) {
212 			err = errno ? errno : ENODEV;
213 			goto error;
214 		}
215 		DRV_LOG(DEBUG, "DevX is NOT supported");
216 	}
217 	err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
218 	if (err) {
219 		DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
220 		goto error;
221 	}
222 	sh->refcnt = 1;
223 	sh->max_port = spawn->max_port;
224 	strncpy(sh->ibdev_name, sh->ctx->device->name,
225 		sizeof(sh->ibdev_name));
226 	strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
227 		sizeof(sh->ibdev_path));
228 	pthread_mutex_init(&sh->intr_mutex, NULL);
229 	/*
230 	 * Setting port_id to max unallowed value means
231 	 * there is no interrupt subhandler installed for
232 	 * the given port index i.
233 	 */
234 	for (i = 0; i < sh->max_port; i++)
235 		sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
236 	sh->pd = mlx5_glue->alloc_pd(sh->ctx);
237 	if (sh->pd == NULL) {
238 		DRV_LOG(ERR, "PD allocation failure");
239 		err = ENOMEM;
240 		goto error;
241 	}
242 	LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
243 exit:
244 	pthread_mutex_unlock(&mlx5_ibv_list_mutex);
245 	return sh;
246 error:
247 	pthread_mutex_unlock(&mlx5_ibv_list_mutex);
248 	assert(sh);
249 	if (sh->pd)
250 		claim_zero(mlx5_glue->dealloc_pd(sh->pd));
251 	if (sh->ctx)
252 		claim_zero(mlx5_glue->close_device(sh->ctx));
253 	rte_free(sh);
254 	assert(err > 0);
255 	rte_errno = err;
256 	return NULL;
257 }
258 
259 /**
260  * Free shared IB device context. Decrement counter and if zero free
261  * all allocated resources and close handles.
262  *
263  * @param[in] sh
264  *   Pointer to mlx5_ibv_shared object to free
265  */
266 static void
267 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
268 {
269 	pthread_mutex_lock(&mlx5_ibv_list_mutex);
270 #ifndef NDEBUG
271 	/* Check the object presence in the list. */
272 	struct mlx5_ibv_shared *lctx;
273 
274 	LIST_FOREACH(lctx, &mlx5_ibv_list, next)
275 		if (lctx == sh)
276 			break;
277 	assert(lctx);
278 	if (lctx != sh) {
279 		DRV_LOG(ERR, "Freeing non-existing shared IB context");
280 		goto exit;
281 	}
282 #endif
283 	assert(sh);
284 	assert(sh->refcnt);
285 	/* Secondary process should not free the shared context. */
286 	assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
287 	if (--sh->refcnt)
288 		goto exit;
289 	LIST_REMOVE(sh, next);
290 	/*
291 	 *  Ensure there is no async event handler installed.
292 	 *  Only primary process handles async device events.
293 	 **/
294 	assert(!sh->intr_cnt);
295 	if (sh->intr_cnt)
296 		rte_intr_callback_unregister
297 			(&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
298 	pthread_mutex_destroy(&sh->intr_mutex);
299 	if (sh->pd)
300 		claim_zero(mlx5_glue->dealloc_pd(sh->pd));
301 	if (sh->ctx)
302 		claim_zero(mlx5_glue->close_device(sh->ctx));
303 	rte_free(sh);
304 exit:
305 	pthread_mutex_unlock(&mlx5_ibv_list_mutex);
306 }
307 
308 /**
309  * Initialize DR related data within private structure.
310  * Routine checks the reference counter and does actual
311  * resources creation/initialization only if counter is zero.
312  *
313  * @param[in] priv
314  *   Pointer to the private device data structure.
315  *
316  * @return
317  *   Zero on success, positive error code otherwise.
318  */
319 static int
320 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
321 {
322 #ifdef HAVE_MLX5DV_DR
323 	struct mlx5_ibv_shared *sh = priv->sh;
324 	int err = 0;
325 	void *ns;
326 
327 	assert(sh);
328 	if (sh->dv_refcnt) {
329 		/* Shared DV/DR structures is already initialized. */
330 		sh->dv_refcnt++;
331 		priv->dr_shared = 1;
332 		return 0;
333 	}
334 	/* Reference counter is zero, we should initialize structures. */
335 	ns = mlx5_glue->dr_create_ns(sh->ctx,
336 				     MLX5DV_DR_NS_DOMAIN_INGRESS_BYPASS);
337 	if (!ns) {
338 		DRV_LOG(ERR, "ingress mlx5dv_dr_create_ns failed");
339 		err = errno;
340 		goto error;
341 	}
342 	sh->rx_ns = ns;
343 	ns = mlx5_glue->dr_create_ns(sh->ctx,
344 				     MLX5DV_DR_NS_DOMAIN_EGRESS_BYPASS);
345 	if (!ns) {
346 		DRV_LOG(ERR, "egress mlx5dv_dr_create_ns failed");
347 		err = errno;
348 		goto error;
349 	}
350 	pthread_mutex_init(&sh->dv_mutex, NULL);
351 	sh->tx_ns = ns;
352 #ifdef HAVE_MLX5DV_DR_ESWITCH
353 	if (priv->config.dv_esw_en) {
354 		ns  = mlx5_glue->dr_create_ns(sh->ctx,
355 					      MLX5DV_DR_NS_DOMAIN_FDB_BYPASS);
356 		if (!ns) {
357 			DRV_LOG(ERR, "FDB mlx5dv_dr_create_ns failed");
358 			err = errno;
359 			goto error;
360 		}
361 		sh->fdb_ns = ns;
362 		sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
363 	}
364 #endif
365 	sh->dv_refcnt++;
366 	priv->dr_shared = 1;
367 	return 0;
368 
369 error:
370        /* Rollback the created objects. */
371 	if (sh->rx_ns) {
372 		mlx5_glue->dr_destroy_ns(sh->rx_ns);
373 		sh->rx_ns = NULL;
374 	}
375 	if (sh->tx_ns) {
376 		mlx5_glue->dr_destroy_ns(sh->tx_ns);
377 		sh->tx_ns = NULL;
378 	}
379 	if (sh->fdb_ns) {
380 		mlx5_glue->dr_destroy_ns(sh->fdb_ns);
381 		sh->fdb_ns = NULL;
382 	}
383 	if (sh->esw_drop_action) {
384 		mlx5_glue->destroy_flow_action(sh->esw_drop_action);
385 		sh->esw_drop_action = NULL;
386 	}
387 	return err;
388 #else
389 	(void)priv;
390 	return 0;
391 #endif
392 }
393 
394 /**
395  * Destroy DR related data within private structure.
396  *
397  * @param[in] priv
398  *   Pointer to the private device data structure.
399  */
400 static void
401 mlx5_free_shared_dr(struct mlx5_priv *priv)
402 {
403 #ifdef HAVE_MLX5DV_DR
404 	struct mlx5_ibv_shared *sh;
405 
406 	if (!priv->dr_shared)
407 		return;
408 	priv->dr_shared = 0;
409 	sh = priv->sh;
410 	assert(sh);
411 	assert(sh->dv_refcnt);
412 	if (sh->dv_refcnt && --sh->dv_refcnt)
413 		return;
414 	if (sh->rx_ns) {
415 		mlx5_glue->dr_destroy_ns(sh->rx_ns);
416 		sh->rx_ns = NULL;
417 	}
418 	if (sh->tx_ns) {
419 		mlx5_glue->dr_destroy_ns(sh->tx_ns);
420 		sh->tx_ns = NULL;
421 	}
422 #ifdef HAVE_MLX5DV_DR_ESWITCH
423 	if (sh->fdb_ns) {
424 		mlx5_glue->dr_destroy_ns(sh->fdb_ns);
425 		sh->fdb_ns = NULL;
426 	}
427 	if (sh->esw_drop_action) {
428 		mlx5_glue->destroy_flow_action(sh->esw_drop_action);
429 		sh->esw_drop_action = NULL;
430 	}
431 #endif
432 	pthread_mutex_destroy(&sh->dv_mutex);
433 #else
434 	(void)priv;
435 #endif
436 }
437 
438 /**
439  * Initialize shared data between primary and secondary process.
440  *
441  * A memzone is reserved by primary process and secondary processes attach to
442  * the memzone.
443  *
444  * @return
445  *   0 on success, a negative errno value otherwise and rte_errno is set.
446  */
447 static int
448 mlx5_init_shared_data(void)
449 {
450 	const struct rte_memzone *mz;
451 	int ret = 0;
452 
453 	rte_spinlock_lock(&mlx5_shared_data_lock);
454 	if (mlx5_shared_data == NULL) {
455 		if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
456 			/* Allocate shared memory. */
457 			mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
458 						 sizeof(*mlx5_shared_data),
459 						 SOCKET_ID_ANY, 0);
460 			if (mz == NULL) {
461 				DRV_LOG(ERR,
462 					"Cannot allocate mlx5 shared data\n");
463 				ret = -rte_errno;
464 				goto error;
465 			}
466 			mlx5_shared_data = mz->addr;
467 			memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
468 			rte_spinlock_init(&mlx5_shared_data->lock);
469 		} else {
470 			/* Lookup allocated shared memory. */
471 			mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
472 			if (mz == NULL) {
473 				DRV_LOG(ERR,
474 					"Cannot attach mlx5 shared data\n");
475 				ret = -rte_errno;
476 				goto error;
477 			}
478 			mlx5_shared_data = mz->addr;
479 			memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
480 		}
481 	}
482 error:
483 	rte_spinlock_unlock(&mlx5_shared_data_lock);
484 	return ret;
485 }
486 
487 /**
488  * Retrieve integer value from environment variable.
489  *
490  * @param[in] name
491  *   Environment variable name.
492  *
493  * @return
494  *   Integer value, 0 if the variable is not set.
495  */
496 int
497 mlx5_getenv_int(const char *name)
498 {
499 	const char *val = getenv(name);
500 
501 	if (val == NULL)
502 		return 0;
503 	return atoi(val);
504 }
505 
506 /**
507  * Verbs callback to allocate a memory. This function should allocate the space
508  * according to the size provided residing inside a huge page.
509  * Please note that all allocation must respect the alignment from libmlx5
510  * (i.e. currently sysconf(_SC_PAGESIZE)).
511  *
512  * @param[in] size
513  *   The size in bytes of the memory to allocate.
514  * @param[in] data
515  *   A pointer to the callback data.
516  *
517  * @return
518  *   Allocated buffer, NULL otherwise and rte_errno is set.
519  */
520 static void *
521 mlx5_alloc_verbs_buf(size_t size, void *data)
522 {
523 	struct mlx5_priv *priv = data;
524 	void *ret;
525 	size_t alignment = sysconf(_SC_PAGESIZE);
526 	unsigned int socket = SOCKET_ID_ANY;
527 
528 	if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
529 		const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
530 
531 		socket = ctrl->socket;
532 	} else if (priv->verbs_alloc_ctx.type ==
533 		   MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
534 		const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
535 
536 		socket = ctrl->socket;
537 	}
538 	assert(data != NULL);
539 	ret = rte_malloc_socket(__func__, size, alignment, socket);
540 	if (!ret && size)
541 		rte_errno = ENOMEM;
542 	return ret;
543 }
544 
545 /**
546  * Verbs callback to free a memory.
547  *
548  * @param[in] ptr
549  *   A pointer to the memory to free.
550  * @param[in] data
551  *   A pointer to the callback data.
552  */
553 static void
554 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
555 {
556 	assert(data != NULL);
557 	rte_free(ptr);
558 }
559 
560 /**
561  * Initialize process private data structure.
562  *
563  * @param dev
564  *   Pointer to Ethernet device structure.
565  *
566  * @return
567  *   0 on success, a negative errno value otherwise and rte_errno is set.
568  */
569 int
570 mlx5_proc_priv_init(struct rte_eth_dev *dev)
571 {
572 	struct mlx5_priv *priv = dev->data->dev_private;
573 	struct mlx5_proc_priv *ppriv;
574 	size_t ppriv_size;
575 
576 	/*
577 	 * UAR register table follows the process private structure. BlueFlame
578 	 * registers for Tx queues are stored in the table.
579 	 */
580 	ppriv_size =
581 		sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
582 	ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
583 				  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
584 	if (!ppriv) {
585 		rte_errno = ENOMEM;
586 		return -rte_errno;
587 	}
588 	ppriv->uar_table_sz = ppriv_size;
589 	dev->process_private = ppriv;
590 	return 0;
591 }
592 
593 /**
594  * Un-initialize process private data structure.
595  *
596  * @param dev
597  *   Pointer to Ethernet device structure.
598  */
599 static void
600 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
601 {
602 	if (!dev->process_private)
603 		return;
604 	rte_free(dev->process_private);
605 	dev->process_private = NULL;
606 }
607 
608 /**
609  * DPDK callback to close the device.
610  *
611  * Destroy all queues and objects, free memory.
612  *
613  * @param dev
614  *   Pointer to Ethernet device structure.
615  */
616 static void
617 mlx5_dev_close(struct rte_eth_dev *dev)
618 {
619 	struct mlx5_priv *priv = dev->data->dev_private;
620 	unsigned int i;
621 	int ret;
622 
623 	DRV_LOG(DEBUG, "port %u closing device \"%s\"",
624 		dev->data->port_id,
625 		((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
626 	/* In case mlx5_dev_stop() has not been called. */
627 	mlx5_dev_interrupt_handler_uninstall(dev);
628 	mlx5_traffic_disable(dev);
629 	mlx5_flow_flush(dev, NULL);
630 	/* Prevent crashes when queues are still in use. */
631 	dev->rx_pkt_burst = removed_rx_burst;
632 	dev->tx_pkt_burst = removed_tx_burst;
633 	rte_wmb();
634 	/* Disable datapath on secondary process. */
635 	mlx5_mp_req_stop_rxtx(dev);
636 	if (priv->rxqs != NULL) {
637 		/* XXX race condition if mlx5_rx_burst() is still running. */
638 		usleep(1000);
639 		for (i = 0; (i != priv->rxqs_n); ++i)
640 			mlx5_rxq_release(dev, i);
641 		priv->rxqs_n = 0;
642 		priv->rxqs = NULL;
643 	}
644 	if (priv->txqs != NULL) {
645 		/* XXX race condition if mlx5_tx_burst() is still running. */
646 		usleep(1000);
647 		for (i = 0; (i != priv->txqs_n); ++i)
648 			mlx5_txq_release(dev, i);
649 		priv->txqs_n = 0;
650 		priv->txqs = NULL;
651 	}
652 	mlx5_proc_priv_uninit(dev);
653 	mlx5_mprq_free_mp(dev);
654 	mlx5_mr_release(dev);
655 	assert(priv->sh);
656 	mlx5_free_shared_dr(priv);
657 	if (priv->rss_conf.rss_key != NULL)
658 		rte_free(priv->rss_conf.rss_key);
659 	if (priv->reta_idx != NULL)
660 		rte_free(priv->reta_idx);
661 	if (priv->config.vf)
662 		mlx5_nl_mac_addr_flush(dev);
663 	if (priv->nl_socket_route >= 0)
664 		close(priv->nl_socket_route);
665 	if (priv->nl_socket_rdma >= 0)
666 		close(priv->nl_socket_rdma);
667 	if (priv->tcf_context)
668 		mlx5_flow_tcf_context_destroy(priv->tcf_context);
669 	if (priv->sh) {
670 		/*
671 		 * Free the shared context in last turn, because the cleanup
672 		 * routines above may use some shared fields, like
673 		 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
674 		 * ifindex if Netlink fails.
675 		 */
676 		mlx5_free_shared_ibctx(priv->sh);
677 		priv->sh = NULL;
678 	}
679 	ret = mlx5_hrxq_ibv_verify(dev);
680 	if (ret)
681 		DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
682 			dev->data->port_id);
683 	ret = mlx5_ind_table_ibv_verify(dev);
684 	if (ret)
685 		DRV_LOG(WARNING, "port %u some indirection table still remain",
686 			dev->data->port_id);
687 	ret = mlx5_rxq_ibv_verify(dev);
688 	if (ret)
689 		DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
690 			dev->data->port_id);
691 	ret = mlx5_rxq_verify(dev);
692 	if (ret)
693 		DRV_LOG(WARNING, "port %u some Rx queues still remain",
694 			dev->data->port_id);
695 	ret = mlx5_txq_ibv_verify(dev);
696 	if (ret)
697 		DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
698 			dev->data->port_id);
699 	ret = mlx5_txq_verify(dev);
700 	if (ret)
701 		DRV_LOG(WARNING, "port %u some Tx queues still remain",
702 			dev->data->port_id);
703 	ret = mlx5_flow_verify(dev);
704 	if (ret)
705 		DRV_LOG(WARNING, "port %u some flows still remain",
706 			dev->data->port_id);
707 	if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
708 		unsigned int c = 0;
709 		uint16_t port_id;
710 
711 		RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
712 			struct mlx5_priv *opriv =
713 				rte_eth_devices[port_id].data->dev_private;
714 
715 			if (!opriv ||
716 			    opriv->domain_id != priv->domain_id ||
717 			    &rte_eth_devices[port_id] == dev)
718 				continue;
719 			++c;
720 		}
721 		if (!c)
722 			claim_zero(rte_eth_switch_domain_free(priv->domain_id));
723 	}
724 	memset(priv, 0, sizeof(*priv));
725 	priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
726 	/*
727 	 * Reset mac_addrs to NULL such that it is not freed as part of
728 	 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
729 	 * it is freed when dev_private is freed.
730 	 */
731 	dev->data->mac_addrs = NULL;
732 }
733 
734 const struct eth_dev_ops mlx5_dev_ops = {
735 	.dev_configure = mlx5_dev_configure,
736 	.dev_start = mlx5_dev_start,
737 	.dev_stop = mlx5_dev_stop,
738 	.dev_set_link_down = mlx5_set_link_down,
739 	.dev_set_link_up = mlx5_set_link_up,
740 	.dev_close = mlx5_dev_close,
741 	.promiscuous_enable = mlx5_promiscuous_enable,
742 	.promiscuous_disable = mlx5_promiscuous_disable,
743 	.allmulticast_enable = mlx5_allmulticast_enable,
744 	.allmulticast_disable = mlx5_allmulticast_disable,
745 	.link_update = mlx5_link_update,
746 	.stats_get = mlx5_stats_get,
747 	.stats_reset = mlx5_stats_reset,
748 	.xstats_get = mlx5_xstats_get,
749 	.xstats_reset = mlx5_xstats_reset,
750 	.xstats_get_names = mlx5_xstats_get_names,
751 	.fw_version_get = mlx5_fw_version_get,
752 	.dev_infos_get = mlx5_dev_infos_get,
753 	.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
754 	.vlan_filter_set = mlx5_vlan_filter_set,
755 	.rx_queue_setup = mlx5_rx_queue_setup,
756 	.tx_queue_setup = mlx5_tx_queue_setup,
757 	.rx_queue_release = mlx5_rx_queue_release,
758 	.tx_queue_release = mlx5_tx_queue_release,
759 	.flow_ctrl_get = mlx5_dev_get_flow_ctrl,
760 	.flow_ctrl_set = mlx5_dev_set_flow_ctrl,
761 	.mac_addr_remove = mlx5_mac_addr_remove,
762 	.mac_addr_add = mlx5_mac_addr_add,
763 	.mac_addr_set = mlx5_mac_addr_set,
764 	.set_mc_addr_list = mlx5_set_mc_addr_list,
765 	.mtu_set = mlx5_dev_set_mtu,
766 	.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
767 	.vlan_offload_set = mlx5_vlan_offload_set,
768 	.reta_update = mlx5_dev_rss_reta_update,
769 	.reta_query = mlx5_dev_rss_reta_query,
770 	.rss_hash_update = mlx5_rss_hash_update,
771 	.rss_hash_conf_get = mlx5_rss_hash_conf_get,
772 	.filter_ctrl = mlx5_dev_filter_ctrl,
773 	.rx_descriptor_status = mlx5_rx_descriptor_status,
774 	.tx_descriptor_status = mlx5_tx_descriptor_status,
775 	.rx_queue_count = mlx5_rx_queue_count,
776 	.rx_queue_intr_enable = mlx5_rx_intr_enable,
777 	.rx_queue_intr_disable = mlx5_rx_intr_disable,
778 	.is_removed = mlx5_is_removed,
779 };
780 
781 /* Available operations from secondary process. */
782 static const struct eth_dev_ops mlx5_dev_sec_ops = {
783 	.stats_get = mlx5_stats_get,
784 	.stats_reset = mlx5_stats_reset,
785 	.xstats_get = mlx5_xstats_get,
786 	.xstats_reset = mlx5_xstats_reset,
787 	.xstats_get_names = mlx5_xstats_get_names,
788 	.fw_version_get = mlx5_fw_version_get,
789 	.dev_infos_get = mlx5_dev_infos_get,
790 	.rx_descriptor_status = mlx5_rx_descriptor_status,
791 	.tx_descriptor_status = mlx5_tx_descriptor_status,
792 };
793 
794 /* Available operations in flow isolated mode. */
795 const struct eth_dev_ops mlx5_dev_ops_isolate = {
796 	.dev_configure = mlx5_dev_configure,
797 	.dev_start = mlx5_dev_start,
798 	.dev_stop = mlx5_dev_stop,
799 	.dev_set_link_down = mlx5_set_link_down,
800 	.dev_set_link_up = mlx5_set_link_up,
801 	.dev_close = mlx5_dev_close,
802 	.promiscuous_enable = mlx5_promiscuous_enable,
803 	.promiscuous_disable = mlx5_promiscuous_disable,
804 	.allmulticast_enable = mlx5_allmulticast_enable,
805 	.allmulticast_disable = mlx5_allmulticast_disable,
806 	.link_update = mlx5_link_update,
807 	.stats_get = mlx5_stats_get,
808 	.stats_reset = mlx5_stats_reset,
809 	.xstats_get = mlx5_xstats_get,
810 	.xstats_reset = mlx5_xstats_reset,
811 	.xstats_get_names = mlx5_xstats_get_names,
812 	.fw_version_get = mlx5_fw_version_get,
813 	.dev_infos_get = mlx5_dev_infos_get,
814 	.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
815 	.vlan_filter_set = mlx5_vlan_filter_set,
816 	.rx_queue_setup = mlx5_rx_queue_setup,
817 	.tx_queue_setup = mlx5_tx_queue_setup,
818 	.rx_queue_release = mlx5_rx_queue_release,
819 	.tx_queue_release = mlx5_tx_queue_release,
820 	.flow_ctrl_get = mlx5_dev_get_flow_ctrl,
821 	.flow_ctrl_set = mlx5_dev_set_flow_ctrl,
822 	.mac_addr_remove = mlx5_mac_addr_remove,
823 	.mac_addr_add = mlx5_mac_addr_add,
824 	.mac_addr_set = mlx5_mac_addr_set,
825 	.set_mc_addr_list = mlx5_set_mc_addr_list,
826 	.mtu_set = mlx5_dev_set_mtu,
827 	.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
828 	.vlan_offload_set = mlx5_vlan_offload_set,
829 	.filter_ctrl = mlx5_dev_filter_ctrl,
830 	.rx_descriptor_status = mlx5_rx_descriptor_status,
831 	.tx_descriptor_status = mlx5_tx_descriptor_status,
832 	.rx_queue_intr_enable = mlx5_rx_intr_enable,
833 	.rx_queue_intr_disable = mlx5_rx_intr_disable,
834 	.is_removed = mlx5_is_removed,
835 };
836 
837 /**
838  * Verify and store value for device argument.
839  *
840  * @param[in] key
841  *   Key argument to verify.
842  * @param[in] val
843  *   Value associated with key.
844  * @param opaque
845  *   User data.
846  *
847  * @return
848  *   0 on success, a negative errno value otherwise and rte_errno is set.
849  */
850 static int
851 mlx5_args_check(const char *key, const char *val, void *opaque)
852 {
853 	struct mlx5_dev_config *config = opaque;
854 	unsigned long tmp;
855 
856 	/* No-op, port representors are processed in mlx5_dev_spawn(). */
857 	if (!strcmp(MLX5_REPRESENTOR, key))
858 		return 0;
859 	errno = 0;
860 	tmp = strtoul(val, NULL, 0);
861 	if (errno) {
862 		rte_errno = errno;
863 		DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
864 		return -rte_errno;
865 	}
866 	if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
867 		config->cqe_comp = !!tmp;
868 	} else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
869 		config->cqe_pad = !!tmp;
870 	} else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
871 		config->hw_padding = !!tmp;
872 	} else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
873 		config->mprq.enabled = !!tmp;
874 	} else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
875 		config->mprq.stride_num_n = tmp;
876 	} else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
877 		config->mprq.max_memcpy_len = tmp;
878 	} else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
879 		config->mprq.min_rxqs_num = tmp;
880 	} else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
881 		config->txq_inline = tmp;
882 	} else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
883 		config->txqs_inline = tmp;
884 	} else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
885 		config->txqs_vec = tmp;
886 	} else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
887 		config->mps = !!tmp;
888 	} else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
889 		config->mpw_hdr_dseg = !!tmp;
890 	} else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
891 		config->inline_max_packet_sz = tmp;
892 	} else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
893 		config->tx_vec_en = !!tmp;
894 	} else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
895 		config->rx_vec_en = !!tmp;
896 	} else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
897 		config->l3_vxlan_en = !!tmp;
898 	} else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
899 		config->vf_nl_en = !!tmp;
900 	} else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
901 		config->dv_esw_en = !!tmp;
902 	} else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
903 		config->dv_flow_en = !!tmp;
904 	} else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
905 		config->mr_ext_memseg_en = !!tmp;
906 	} else {
907 		DRV_LOG(WARNING, "%s: unknown parameter", key);
908 		rte_errno = EINVAL;
909 		return -rte_errno;
910 	}
911 	return 0;
912 }
913 
914 /**
915  * Parse device parameters.
916  *
917  * @param config
918  *   Pointer to device configuration structure.
919  * @param devargs
920  *   Device arguments structure.
921  *
922  * @return
923  *   0 on success, a negative errno value otherwise and rte_errno is set.
924  */
925 static int
926 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
927 {
928 	const char **params = (const char *[]){
929 		MLX5_RXQ_CQE_COMP_EN,
930 		MLX5_RXQ_CQE_PAD_EN,
931 		MLX5_RXQ_PKT_PAD_EN,
932 		MLX5_RX_MPRQ_EN,
933 		MLX5_RX_MPRQ_LOG_STRIDE_NUM,
934 		MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
935 		MLX5_RXQS_MIN_MPRQ,
936 		MLX5_TXQ_INLINE,
937 		MLX5_TXQS_MIN_INLINE,
938 		MLX5_TXQS_MAX_VEC,
939 		MLX5_TXQ_MPW_EN,
940 		MLX5_TXQ_MPW_HDR_DSEG_EN,
941 		MLX5_TXQ_MAX_INLINE_LEN,
942 		MLX5_TX_VEC_EN,
943 		MLX5_RX_VEC_EN,
944 		MLX5_L3_VXLAN_EN,
945 		MLX5_VF_NL_EN,
946 		MLX5_DV_ESW_EN,
947 		MLX5_DV_FLOW_EN,
948 		MLX5_MR_EXT_MEMSEG_EN,
949 		MLX5_REPRESENTOR,
950 		NULL,
951 	};
952 	struct rte_kvargs *kvlist;
953 	int ret = 0;
954 	int i;
955 
956 	if (devargs == NULL)
957 		return 0;
958 	/* Following UGLY cast is done to pass checkpatch. */
959 	kvlist = rte_kvargs_parse(devargs->args, params);
960 	if (kvlist == NULL)
961 		return 0;
962 	/* Process parameters. */
963 	for (i = 0; (params[i] != NULL); ++i) {
964 		if (rte_kvargs_count(kvlist, params[i])) {
965 			ret = rte_kvargs_process(kvlist, params[i],
966 						 mlx5_args_check, config);
967 			if (ret) {
968 				rte_errno = EINVAL;
969 				rte_kvargs_free(kvlist);
970 				return -rte_errno;
971 			}
972 		}
973 	}
974 	rte_kvargs_free(kvlist);
975 	return 0;
976 }
977 
978 static struct rte_pci_driver mlx5_driver;
979 
980 /**
981  * PMD global initialization.
982  *
983  * Independent from individual device, this function initializes global
984  * per-PMD data structures distinguishing primary and secondary processes.
985  * Hence, each initialization is called once per a process.
986  *
987  * @return
988  *   0 on success, a negative errno value otherwise and rte_errno is set.
989  */
990 static int
991 mlx5_init_once(void)
992 {
993 	struct mlx5_shared_data *sd;
994 	struct mlx5_local_data *ld = &mlx5_local_data;
995 
996 	if (mlx5_init_shared_data())
997 		return -rte_errno;
998 	sd = mlx5_shared_data;
999 	assert(sd);
1000 	rte_spinlock_lock(&sd->lock);
1001 	switch (rte_eal_process_type()) {
1002 	case RTE_PROC_PRIMARY:
1003 		if (sd->init_done)
1004 			break;
1005 		LIST_INIT(&sd->mem_event_cb_list);
1006 		rte_rwlock_init(&sd->mem_event_rwlock);
1007 		rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1008 						mlx5_mr_mem_event_cb, NULL);
1009 		mlx5_mp_init_primary();
1010 		sd->init_done = true;
1011 		break;
1012 	case RTE_PROC_SECONDARY:
1013 		if (ld->init_done)
1014 			break;
1015 		mlx5_mp_init_secondary();
1016 		++sd->secondary_cnt;
1017 		ld->init_done = true;
1018 		break;
1019 	default:
1020 		break;
1021 	}
1022 	rte_spinlock_unlock(&sd->lock);
1023 	return 0;
1024 }
1025 
1026 /**
1027  * Spawn an Ethernet device from Verbs information.
1028  *
1029  * @param dpdk_dev
1030  *   Backing DPDK device.
1031  * @param spawn
1032  *   Verbs device parameters (name, port, switch_info) to spawn.
1033  * @param config
1034  *   Device configuration parameters.
1035  *
1036  * @return
1037  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1038  *   is set. The following errors are defined:
1039  *
1040  *   EBUSY: device is not supposed to be spawned.
1041  *   EEXIST: device is already spawned
1042  */
1043 static struct rte_eth_dev *
1044 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1045 	       struct mlx5_dev_spawn_data *spawn,
1046 	       struct mlx5_dev_config config)
1047 {
1048 	const struct mlx5_switch_info *switch_info = &spawn->info;
1049 	struct mlx5_ibv_shared *sh = NULL;
1050 	struct ibv_port_attr port_attr;
1051 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1052 	struct rte_eth_dev *eth_dev = NULL;
1053 	struct mlx5_priv *priv = NULL;
1054 	int err = 0;
1055 	unsigned int hw_padding = 0;
1056 	unsigned int mps;
1057 	unsigned int cqe_comp;
1058 	unsigned int cqe_pad = 0;
1059 	unsigned int tunnel_en = 0;
1060 	unsigned int mpls_en = 0;
1061 	unsigned int swp = 0;
1062 	unsigned int mprq = 0;
1063 	unsigned int mprq_min_stride_size_n = 0;
1064 	unsigned int mprq_max_stride_size_n = 0;
1065 	unsigned int mprq_min_stride_num_n = 0;
1066 	unsigned int mprq_max_stride_num_n = 0;
1067 	struct ether_addr mac;
1068 	char name[RTE_ETH_NAME_MAX_LEN];
1069 	int own_domain_id = 0;
1070 	uint16_t port_id;
1071 	unsigned int i;
1072 
1073 	/* Determine if this port representor is supposed to be spawned. */
1074 	if (switch_info->representor && dpdk_dev->devargs) {
1075 		struct rte_eth_devargs eth_da;
1076 
1077 		err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1078 		if (err) {
1079 			rte_errno = -err;
1080 			DRV_LOG(ERR, "failed to process device arguments: %s",
1081 				strerror(rte_errno));
1082 			return NULL;
1083 		}
1084 		for (i = 0; i < eth_da.nb_representor_ports; ++i)
1085 			if (eth_da.representor_ports[i] ==
1086 			    (uint16_t)switch_info->port_name)
1087 				break;
1088 		if (i == eth_da.nb_representor_ports) {
1089 			rte_errno = EBUSY;
1090 			return NULL;
1091 		}
1092 	}
1093 	/* Build device name. */
1094 	if (!switch_info->representor)
1095 		strlcpy(name, dpdk_dev->name, sizeof(name));
1096 	else
1097 		snprintf(name, sizeof(name), "%s_representor_%u",
1098 			 dpdk_dev->name, switch_info->port_name);
1099 	/* check if the device is already spawned */
1100 	if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1101 		rte_errno = EEXIST;
1102 		return NULL;
1103 	}
1104 	DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1105 	if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1106 		eth_dev = rte_eth_dev_attach_secondary(name);
1107 		if (eth_dev == NULL) {
1108 			DRV_LOG(ERR, "can not attach rte ethdev");
1109 			rte_errno = ENOMEM;
1110 			return NULL;
1111 		}
1112 		eth_dev->device = dpdk_dev;
1113 		eth_dev->dev_ops = &mlx5_dev_sec_ops;
1114 		err = mlx5_proc_priv_init(eth_dev);
1115 		if (err)
1116 			return NULL;
1117 		/* Receive command fd from primary process */
1118 		err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1119 		if (err < 0)
1120 			return NULL;
1121 		/* Remap UAR for Tx queues. */
1122 		err = mlx5_tx_uar_init_secondary(eth_dev, err);
1123 		if (err)
1124 			return NULL;
1125 		/*
1126 		 * Ethdev pointer is still required as input since
1127 		 * the primary device is not accessible from the
1128 		 * secondary process.
1129 		 */
1130 		eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1131 		eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1132 		return eth_dev;
1133 	}
1134 	sh = mlx5_alloc_shared_ibctx(spawn);
1135 	if (!sh)
1136 		return NULL;
1137 	config.devx = sh->devx;
1138 #ifdef HAVE_IBV_MLX5_MOD_SWP
1139 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1140 #endif
1141 	/*
1142 	 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1143 	 * as all ConnectX-5 devices.
1144 	 */
1145 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1146 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1147 #endif
1148 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1149 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1150 #endif
1151 	mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1152 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1153 		if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1154 			DRV_LOG(DEBUG, "enhanced MPW is supported");
1155 			mps = MLX5_MPW_ENHANCED;
1156 		} else {
1157 			DRV_LOG(DEBUG, "MPW is supported");
1158 			mps = MLX5_MPW;
1159 		}
1160 	} else {
1161 		DRV_LOG(DEBUG, "MPW isn't supported");
1162 		mps = MLX5_MPW_DISABLED;
1163 	}
1164 #ifdef HAVE_IBV_MLX5_MOD_SWP
1165 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1166 		swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1167 	DRV_LOG(DEBUG, "SWP support: %u", swp);
1168 #endif
1169 	config.swp = !!swp;
1170 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1171 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1172 		struct mlx5dv_striding_rq_caps mprq_caps =
1173 			dv_attr.striding_rq_caps;
1174 
1175 		DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1176 			mprq_caps.min_single_stride_log_num_of_bytes);
1177 		DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1178 			mprq_caps.max_single_stride_log_num_of_bytes);
1179 		DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1180 			mprq_caps.min_single_wqe_log_num_of_strides);
1181 		DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1182 			mprq_caps.max_single_wqe_log_num_of_strides);
1183 		DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1184 			mprq_caps.supported_qpts);
1185 		DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1186 		mprq = 1;
1187 		mprq_min_stride_size_n =
1188 			mprq_caps.min_single_stride_log_num_of_bytes;
1189 		mprq_max_stride_size_n =
1190 			mprq_caps.max_single_stride_log_num_of_bytes;
1191 		mprq_min_stride_num_n =
1192 			mprq_caps.min_single_wqe_log_num_of_strides;
1193 		mprq_max_stride_num_n =
1194 			mprq_caps.max_single_wqe_log_num_of_strides;
1195 		config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1196 						   mprq_min_stride_num_n);
1197 	}
1198 #endif
1199 	if (RTE_CACHE_LINE_SIZE == 128 &&
1200 	    !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1201 		cqe_comp = 0;
1202 	else
1203 		cqe_comp = 1;
1204 	config.cqe_comp = cqe_comp;
1205 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1206 	/* Whether device supports 128B Rx CQE padding. */
1207 	cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1208 		  (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1209 #endif
1210 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1211 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1212 		tunnel_en = ((dv_attr.tunnel_offloads_caps &
1213 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1214 			     (dv_attr.tunnel_offloads_caps &
1215 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1216 	}
1217 	DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1218 		tunnel_en ? "" : "not ");
1219 #else
1220 	DRV_LOG(WARNING,
1221 		"tunnel offloading disabled due to old OFED/rdma-core version");
1222 #endif
1223 	config.tunnel_en = tunnel_en;
1224 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1225 	mpls_en = ((dv_attr.tunnel_offloads_caps &
1226 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1227 		   (dv_attr.tunnel_offloads_caps &
1228 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1229 	DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1230 		mpls_en ? "" : "not ");
1231 #else
1232 	DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1233 		" old OFED/rdma-core version or firmware configuration");
1234 #endif
1235 	config.mpls_en = mpls_en;
1236 	/* Check port status. */
1237 	err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1238 	if (err) {
1239 		DRV_LOG(ERR, "port query failed: %s", strerror(err));
1240 		goto error;
1241 	}
1242 	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1243 		DRV_LOG(ERR, "port is not configured in Ethernet mode");
1244 		err = EINVAL;
1245 		goto error;
1246 	}
1247 	if (port_attr.state != IBV_PORT_ACTIVE)
1248 		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1249 			mlx5_glue->port_state_str(port_attr.state),
1250 			port_attr.state);
1251 	/* Allocate private eth device data. */
1252 	priv = rte_zmalloc("ethdev private structure",
1253 			   sizeof(*priv),
1254 			   RTE_CACHE_LINE_SIZE);
1255 	if (priv == NULL) {
1256 		DRV_LOG(ERR, "priv allocation failure");
1257 		err = ENOMEM;
1258 		goto error;
1259 	}
1260 	priv->sh = sh;
1261 	priv->ibv_port = spawn->ibv_port;
1262 	priv->mtu = ETHER_MTU;
1263 #ifndef RTE_ARCH_64
1264 	/* Initialize UAR access locks for 32bit implementations. */
1265 	rte_spinlock_init(&priv->uar_lock_cq);
1266 	for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1267 		rte_spinlock_init(&priv->uar_lock[i]);
1268 #endif
1269 	/* Some internal functions rely on Netlink sockets, open them now. */
1270 	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1271 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
1272 	priv->nl_sn = 0;
1273 	priv->representor = !!switch_info->representor;
1274 	priv->master = !!switch_info->master;
1275 	priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1276 	/*
1277 	 * Currently we support single E-Switch per PF configurations
1278 	 * only and vport_id field contains the vport index for
1279 	 * associated VF, which is deduced from representor port name.
1280 	 * For example, let's have the IB device port 10, it has
1281 	 * attached network device eth0, which has port name attribute
1282 	 * pf0vf2, we can deduce the VF number as 2, and set vport index
1283 	 * as 3 (2+1). This assigning schema should be changed if the
1284 	 * multiple E-Switch instances per PF configurations or/and PCI
1285 	 * subfunctions are added.
1286 	 */
1287 	priv->vport_id = switch_info->representor ?
1288 			 switch_info->port_name + 1 : -1;
1289 	/* representor_id field keeps the unmodified port/VF index. */
1290 	priv->representor_id = switch_info->representor ?
1291 			       switch_info->port_name : -1;
1292 	/*
1293 	 * Look for sibling devices in order to reuse their switch domain
1294 	 * if any, otherwise allocate one.
1295 	 */
1296 	RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1297 		const struct mlx5_priv *opriv =
1298 			rte_eth_devices[port_id].data->dev_private;
1299 
1300 		if (!opriv ||
1301 			opriv->domain_id ==
1302 			RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1303 			continue;
1304 		priv->domain_id = opriv->domain_id;
1305 		break;
1306 	}
1307 	if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1308 		err = rte_eth_switch_domain_alloc(&priv->domain_id);
1309 		if (err) {
1310 			err = rte_errno;
1311 			DRV_LOG(ERR, "unable to allocate switch domain: %s",
1312 				strerror(rte_errno));
1313 			goto error;
1314 		}
1315 		own_domain_id = 1;
1316 	}
1317 	err = mlx5_args(&config, dpdk_dev->devargs);
1318 	if (err) {
1319 		err = rte_errno;
1320 		DRV_LOG(ERR, "failed to process device arguments: %s",
1321 			strerror(rte_errno));
1322 		goto error;
1323 	}
1324 	config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1325 			    IBV_DEVICE_RAW_IP_CSUM);
1326 	DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1327 		(config.hw_csum ? "" : "not "));
1328 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1329 	!defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1330 	DRV_LOG(DEBUG, "counters are not supported");
1331 #endif
1332 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1333 	if (config.dv_flow_en) {
1334 		DRV_LOG(WARNING, "DV flow is not supported");
1335 		config.dv_flow_en = 0;
1336 	}
1337 #endif
1338 	config.ind_table_max_size =
1339 		sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1340 	/*
1341 	 * Remove this check once DPDK supports larger/variable
1342 	 * indirection tables.
1343 	 */
1344 	if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1345 		config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1346 	DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1347 		config.ind_table_max_size);
1348 	config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1349 				  IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1350 	DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1351 		(config.hw_vlan_strip ? "" : "not "));
1352 	config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1353 				 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1354 	DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1355 		(config.hw_fcs_strip ? "" : "not "));
1356 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1357 	hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1358 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1359 	hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1360 			IBV_DEVICE_PCI_WRITE_END_PADDING);
1361 #endif
1362 	if (config.hw_padding && !hw_padding) {
1363 		DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1364 		config.hw_padding = 0;
1365 	} else if (config.hw_padding) {
1366 		DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1367 	}
1368 	config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1369 		      (sh->device_attr.tso_caps.supported_qpts &
1370 		       (1 << IBV_QPT_RAW_PACKET)));
1371 	if (config.tso)
1372 		config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1373 	/*
1374 	 * MPW is disabled by default, while the Enhanced MPW is enabled
1375 	 * by default.
1376 	 */
1377 	if (config.mps == MLX5_ARG_UNSET)
1378 		config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1379 							  MLX5_MPW_DISABLED;
1380 	else
1381 		config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1382 	DRV_LOG(INFO, "%sMPS is %s",
1383 		config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1384 		config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1385 	if (config.cqe_comp && !cqe_comp) {
1386 		DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1387 		config.cqe_comp = 0;
1388 	}
1389 	if (config.cqe_pad && !cqe_pad) {
1390 		DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1391 		config.cqe_pad = 0;
1392 	} else if (config.cqe_pad) {
1393 		DRV_LOG(INFO, "Rx CQE padding is enabled");
1394 	}
1395 	if (config.mprq.enabled && mprq) {
1396 		if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1397 		    config.mprq.stride_num_n < mprq_min_stride_num_n) {
1398 			config.mprq.stride_num_n =
1399 				RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1400 					mprq_min_stride_num_n);
1401 			DRV_LOG(WARNING,
1402 				"the number of strides"
1403 				" for Multi-Packet RQ is out of range,"
1404 				" setting default value (%u)",
1405 				1 << config.mprq.stride_num_n);
1406 		}
1407 		config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1408 		config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1409 	} else if (config.mprq.enabled && !mprq) {
1410 		DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1411 		config.mprq.enabled = 0;
1412 	}
1413 	eth_dev = rte_eth_dev_allocate(name);
1414 	if (eth_dev == NULL) {
1415 		DRV_LOG(ERR, "can not allocate rte ethdev");
1416 		err = ENOMEM;
1417 		goto error;
1418 	}
1419 	/* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1420 	eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1421 	if (priv->representor) {
1422 		eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1423 		eth_dev->data->representor_id = priv->representor_id;
1424 	}
1425 	eth_dev->data->dev_private = priv;
1426 	priv->dev_data = eth_dev->data;
1427 	eth_dev->data->mac_addrs = priv->mac;
1428 	eth_dev->device = dpdk_dev;
1429 	/* Configure the first MAC address by default. */
1430 	if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1431 		DRV_LOG(ERR,
1432 			"port %u cannot get MAC address, is mlx5_en"
1433 			" loaded? (errno: %s)",
1434 			eth_dev->data->port_id, strerror(rte_errno));
1435 		err = ENODEV;
1436 		goto error;
1437 	}
1438 	DRV_LOG(INFO,
1439 		"port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1440 		eth_dev->data->port_id,
1441 		mac.addr_bytes[0], mac.addr_bytes[1],
1442 		mac.addr_bytes[2], mac.addr_bytes[3],
1443 		mac.addr_bytes[4], mac.addr_bytes[5]);
1444 #ifndef NDEBUG
1445 	{
1446 		char ifname[IF_NAMESIZE];
1447 
1448 		if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1449 			DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1450 				eth_dev->data->port_id, ifname);
1451 		else
1452 			DRV_LOG(DEBUG, "port %u ifname is unknown",
1453 				eth_dev->data->port_id);
1454 	}
1455 #endif
1456 	/* Get actual MTU if possible. */
1457 	err = mlx5_get_mtu(eth_dev, &priv->mtu);
1458 	if (err) {
1459 		err = rte_errno;
1460 		goto error;
1461 	}
1462 	DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1463 		priv->mtu);
1464 	/* Initialize burst functions to prevent crashes before link-up. */
1465 	eth_dev->rx_pkt_burst = removed_rx_burst;
1466 	eth_dev->tx_pkt_burst = removed_tx_burst;
1467 	eth_dev->dev_ops = &mlx5_dev_ops;
1468 	/* Register MAC address. */
1469 	claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1470 	if (config.vf && config.vf_nl_en)
1471 		mlx5_nl_mac_addr_sync(eth_dev);
1472 	priv->tcf_context = mlx5_flow_tcf_context_create();
1473 	if (!priv->tcf_context) {
1474 		err = -rte_errno;
1475 		DRV_LOG(WARNING,
1476 			"flow rules relying on switch offloads will not be"
1477 			" supported: cannot open libmnl socket: %s",
1478 			strerror(rte_errno));
1479 	} else {
1480 		struct rte_flow_error error;
1481 		unsigned int ifindex = mlx5_ifindex(eth_dev);
1482 
1483 		if (!ifindex) {
1484 			err = -rte_errno;
1485 			error.message =
1486 				"cannot retrieve network interface index";
1487 		} else {
1488 			err = mlx5_flow_tcf_init(priv->tcf_context,
1489 						 ifindex, &error);
1490 		}
1491 		if (err) {
1492 			DRV_LOG(WARNING,
1493 				"flow rules relying on switch offloads will"
1494 				" not be supported: %s: %s",
1495 				error.message, strerror(rte_errno));
1496 			mlx5_flow_tcf_context_destroy(priv->tcf_context);
1497 			priv->tcf_context = NULL;
1498 		}
1499 	}
1500 	TAILQ_INIT(&priv->flows);
1501 	TAILQ_INIT(&priv->ctrl_flows);
1502 	/* Hint libmlx5 to use PMD allocator for data plane resources */
1503 	struct mlx5dv_ctx_allocators alctr = {
1504 		.alloc = &mlx5_alloc_verbs_buf,
1505 		.free = &mlx5_free_verbs_buf,
1506 		.data = priv,
1507 	};
1508 	mlx5_glue->dv_set_context_attr(sh->ctx,
1509 				       MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1510 				       (void *)((uintptr_t)&alctr));
1511 	/* Bring Ethernet device up. */
1512 	DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1513 		eth_dev->data->port_id);
1514 	mlx5_set_link_up(eth_dev);
1515 	/*
1516 	 * Even though the interrupt handler is not installed yet,
1517 	 * interrupts will still trigger on the async_fd from
1518 	 * Verbs context returned by ibv_open_device().
1519 	 */
1520 	mlx5_link_update(eth_dev, 0);
1521 #ifdef HAVE_IBV_DEVX_OBJ
1522 	if (config.devx) {
1523 		err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1524 		if (err) {
1525 			err = -err;
1526 			goto error;
1527 		}
1528 	}
1529 #endif
1530 #ifdef HAVE_MLX5DV_DR_ESWITCH
1531 	if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1532 	      (switch_info->representor || switch_info->master)))
1533 		config.dv_esw_en = 0;
1534 #else
1535 	config.dv_esw_en = 0;
1536 #endif
1537 	/* Store device configuration on private structure. */
1538 	priv->config = config;
1539 	if (config.dv_flow_en) {
1540 		err = mlx5_alloc_shared_dr(priv);
1541 		if (err)
1542 			goto error;
1543 	}
1544 	/* Supported Verbs flow priority number detection. */
1545 	err = mlx5_flow_discover_priorities(eth_dev);
1546 	if (err < 0) {
1547 		err = -err;
1548 		goto error;
1549 	}
1550 	priv->config.flow_prio = err;
1551 	/*
1552 	 * Once the device is added to the list of memory event
1553 	 * callback, its global MR cache table cannot be expanded
1554 	 * on the fly because of deadlock. If it overflows, lookup
1555 	 * should be done by searching MR list linearly, which is slow.
1556 	 */
1557 	err = mlx5_mr_btree_init(&priv->mr.cache,
1558 				 MLX5_MR_BTREE_CACHE_N * 2,
1559 				 eth_dev->device->numa_node);
1560 	if (err) {
1561 		err = rte_errno;
1562 		goto error;
1563 	}
1564 	/* Add device to memory callback list. */
1565 	rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1566 	LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1567 			 priv, mem_event_cb);
1568 	rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1569 	return eth_dev;
1570 error:
1571 	if (priv) {
1572 		if (priv->sh)
1573 			mlx5_free_shared_dr(priv);
1574 		if (priv->nl_socket_route >= 0)
1575 			close(priv->nl_socket_route);
1576 		if (priv->nl_socket_rdma >= 0)
1577 			close(priv->nl_socket_rdma);
1578 		if (priv->tcf_context)
1579 			mlx5_flow_tcf_context_destroy(priv->tcf_context);
1580 		if (own_domain_id)
1581 			claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1582 		rte_free(priv);
1583 		if (eth_dev != NULL)
1584 			eth_dev->data->dev_private = NULL;
1585 	}
1586 	if (eth_dev != NULL) {
1587 		/* mac_addrs must not be freed alone because part of dev_private */
1588 		eth_dev->data->mac_addrs = NULL;
1589 		rte_eth_dev_release_port(eth_dev);
1590 	}
1591 	if (sh)
1592 		mlx5_free_shared_ibctx(sh);
1593 	assert(err > 0);
1594 	rte_errno = err;
1595 	return NULL;
1596 }
1597 
1598 /**
1599  * Comparison callback to sort device data.
1600  *
1601  * This is meant to be used with qsort().
1602  *
1603  * @param a[in]
1604  *   Pointer to pointer to first data object.
1605  * @param b[in]
1606  *   Pointer to pointer to second data object.
1607  *
1608  * @return
1609  *   0 if both objects are equal, less than 0 if the first argument is less
1610  *   than the second, greater than 0 otherwise.
1611  */
1612 static int
1613 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1614 {
1615 	const struct mlx5_switch_info *si_a =
1616 		&((const struct mlx5_dev_spawn_data *)a)->info;
1617 	const struct mlx5_switch_info *si_b =
1618 		&((const struct mlx5_dev_spawn_data *)b)->info;
1619 	int ret;
1620 
1621 	/* Master device first. */
1622 	ret = si_b->master - si_a->master;
1623 	if (ret)
1624 		return ret;
1625 	/* Then representor devices. */
1626 	ret = si_b->representor - si_a->representor;
1627 	if (ret)
1628 		return ret;
1629 	/* Unidentified devices come last in no specific order. */
1630 	if (!si_a->representor)
1631 		return 0;
1632 	/* Order representors by name. */
1633 	return si_a->port_name - si_b->port_name;
1634 }
1635 
1636 /**
1637  * DPDK callback to register a PCI device.
1638  *
1639  * This function spawns Ethernet devices out of a given PCI device.
1640  *
1641  * @param[in] pci_drv
1642  *   PCI driver structure (mlx5_driver).
1643  * @param[in] pci_dev
1644  *   PCI device information.
1645  *
1646  * @return
1647  *   0 on success, a negative errno value otherwise and rte_errno is set.
1648  */
1649 static int
1650 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1651 	       struct rte_pci_device *pci_dev)
1652 {
1653 	struct ibv_device **ibv_list;
1654 	/*
1655 	 * Number of found IB Devices matching with requested PCI BDF.
1656 	 * nd != 1 means there are multiple IB devices over the same
1657 	 * PCI device and we have representors and master.
1658 	 */
1659 	unsigned int nd = 0;
1660 	/*
1661 	 * Number of found IB device Ports. nd = 1 and np = 1..n means
1662 	 * we have the single multiport IB device, and there may be
1663 	 * representors attached to some of found ports.
1664 	 */
1665 	unsigned int np = 0;
1666 	/*
1667 	 * Number of DPDK ethernet devices to Spawn - either over
1668 	 * multiple IB devices or multiple ports of single IB device.
1669 	 * Actually this is the number of iterations to spawn.
1670 	 */
1671 	unsigned int ns = 0;
1672 	struct mlx5_dev_config dev_config;
1673 	int ret;
1674 
1675 	ret = mlx5_init_once();
1676 	if (ret) {
1677 		DRV_LOG(ERR, "unable to init PMD global data: %s",
1678 			strerror(rte_errno));
1679 		return -rte_errno;
1680 	}
1681 	assert(pci_drv == &mlx5_driver);
1682 	errno = 0;
1683 	ibv_list = mlx5_glue->get_device_list(&ret);
1684 	if (!ibv_list) {
1685 		rte_errno = errno ? errno : ENOSYS;
1686 		DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1687 		return -rte_errno;
1688 	}
1689 	/*
1690 	 * First scan the list of all Infiniband devices to find
1691 	 * matching ones, gathering into the list.
1692 	 */
1693 	struct ibv_device *ibv_match[ret + 1];
1694 	int nl_route = -1;
1695 	int nl_rdma = -1;
1696 	unsigned int i;
1697 
1698 	while (ret-- > 0) {
1699 		struct rte_pci_addr pci_addr;
1700 
1701 		DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1702 		if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1703 			continue;
1704 		if (pci_dev->addr.domain != pci_addr.domain ||
1705 		    pci_dev->addr.bus != pci_addr.bus ||
1706 		    pci_dev->addr.devid != pci_addr.devid ||
1707 		    pci_dev->addr.function != pci_addr.function)
1708 			continue;
1709 		DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1710 			ibv_list[ret]->name);
1711 		ibv_match[nd++] = ibv_list[ret];
1712 	}
1713 	ibv_match[nd] = NULL;
1714 	if (!nd) {
1715 		/* No device matches, just complain and bail out. */
1716 		mlx5_glue->free_device_list(ibv_list);
1717 		DRV_LOG(WARNING,
1718 			"no Verbs device matches PCI device " PCI_PRI_FMT ","
1719 			" are kernel drivers loaded?",
1720 			pci_dev->addr.domain, pci_dev->addr.bus,
1721 			pci_dev->addr.devid, pci_dev->addr.function);
1722 		rte_errno = ENOENT;
1723 		ret = -rte_errno;
1724 		return ret;
1725 	}
1726 	nl_route = mlx5_nl_init(NETLINK_ROUTE);
1727 	nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1728 	if (nd == 1) {
1729 		/*
1730 		 * Found single matching device may have multiple ports.
1731 		 * Each port may be representor, we have to check the port
1732 		 * number and check the representors existence.
1733 		 */
1734 		if (nl_rdma >= 0)
1735 			np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1736 		if (!np)
1737 			DRV_LOG(WARNING, "can not get IB device \"%s\""
1738 					 " ports number", ibv_match[0]->name);
1739 	}
1740 	/*
1741 	 * Now we can determine the maximal
1742 	 * amount of devices to be spawned.
1743 	 */
1744 	struct mlx5_dev_spawn_data list[np ? np : nd];
1745 
1746 	if (np > 1) {
1747 		/*
1748 		 * Single IB device with multiple ports found,
1749 		 * it may be E-Switch master device and representors.
1750 		 * We have to perform identification trough the ports.
1751 		 */
1752 		assert(nl_rdma >= 0);
1753 		assert(ns == 0);
1754 		assert(nd == 1);
1755 		for (i = 1; i <= np; ++i) {
1756 			list[ns].max_port = np;
1757 			list[ns].ibv_port = i;
1758 			list[ns].ibv_dev = ibv_match[0];
1759 			list[ns].eth_dev = NULL;
1760 			list[ns].ifindex = mlx5_nl_ifindex
1761 					(nl_rdma, list[ns].ibv_dev->name, i);
1762 			if (!list[ns].ifindex) {
1763 				/*
1764 				 * No network interface index found for the
1765 				 * specified port, it means there is no
1766 				 * representor on this port. It's OK,
1767 				 * there can be disabled ports, for example
1768 				 * if sriov_numvfs < sriov_totalvfs.
1769 				 */
1770 				continue;
1771 			}
1772 			ret = -1;
1773 			if (nl_route >= 0)
1774 				ret = mlx5_nl_switch_info
1775 					       (nl_route,
1776 						list[ns].ifindex,
1777 						&list[ns].info);
1778 			if (ret || (!list[ns].info.representor &&
1779 				    !list[ns].info.master)) {
1780 				/*
1781 				 * We failed to recognize representors with
1782 				 * Netlink, let's try to perform the task
1783 				 * with sysfs.
1784 				 */
1785 				ret =  mlx5_sysfs_switch_info
1786 						(list[ns].ifindex,
1787 						 &list[ns].info);
1788 			}
1789 			if (!ret && (list[ns].info.representor ^
1790 				     list[ns].info.master))
1791 				ns++;
1792 		}
1793 		if (!ns) {
1794 			DRV_LOG(ERR,
1795 				"unable to recognize master/representors"
1796 				" on the IB device with multiple ports");
1797 			rte_errno = ENOENT;
1798 			ret = -rte_errno;
1799 			goto exit;
1800 		}
1801 	} else {
1802 		/*
1803 		 * The existence of several matching entries (nd > 1) means
1804 		 * port representors have been instantiated. No existing Verbs
1805 		 * call nor sysfs entries can tell them apart, this can only
1806 		 * be done through Netlink calls assuming kernel drivers are
1807 		 * recent enough to support them.
1808 		 *
1809 		 * In the event of identification failure through Netlink,
1810 		 * try again through sysfs, then:
1811 		 *
1812 		 * 1. A single IB device matches (nd == 1) with single
1813 		 *    port (np=0/1) and is not a representor, assume
1814 		 *    no switch support.
1815 		 *
1816 		 * 2. Otherwise no safe assumptions can be made;
1817 		 *    complain louder and bail out.
1818 		 */
1819 		np = 1;
1820 		for (i = 0; i != nd; ++i) {
1821 			memset(&list[ns].info, 0, sizeof(list[ns].info));
1822 			list[ns].max_port = 1;
1823 			list[ns].ibv_port = 1;
1824 			list[ns].ibv_dev = ibv_match[i];
1825 			list[ns].eth_dev = NULL;
1826 			list[ns].ifindex = 0;
1827 			if (nl_rdma >= 0)
1828 				list[ns].ifindex = mlx5_nl_ifindex
1829 					(nl_rdma, list[ns].ibv_dev->name, 1);
1830 			if (!list[ns].ifindex) {
1831 				char ifname[IF_NAMESIZE];
1832 
1833 				/*
1834 				 * Netlink failed, it may happen with old
1835 				 * ib_core kernel driver (before 4.16).
1836 				 * We can assume there is old driver because
1837 				 * here we are processing single ports IB
1838 				 * devices. Let's try sysfs to retrieve
1839 				 * the ifindex. The method works for
1840 				 * master device only.
1841 				 */
1842 				if (nd > 1) {
1843 					/*
1844 					 * Multiple devices found, assume
1845 					 * representors, can not distinguish
1846 					 * master/representor and retrieve
1847 					 * ifindex via sysfs.
1848 					 */
1849 					continue;
1850 				}
1851 				ret = mlx5_get_master_ifname
1852 					(ibv_match[i]->ibdev_path, &ifname);
1853 				if (!ret)
1854 					list[ns].ifindex =
1855 						if_nametoindex(ifname);
1856 				if (!list[ns].ifindex) {
1857 					/*
1858 					 * No network interface index found
1859 					 * for the specified device, it means
1860 					 * there it is neither representor
1861 					 * nor master.
1862 					 */
1863 					continue;
1864 				}
1865 			}
1866 			ret = -1;
1867 			if (nl_route >= 0)
1868 				ret = mlx5_nl_switch_info
1869 					       (nl_route,
1870 						list[ns].ifindex,
1871 						&list[ns].info);
1872 			if (ret || (!list[ns].info.representor &&
1873 				    !list[ns].info.master)) {
1874 				/*
1875 				 * We failed to recognize representors with
1876 				 * Netlink, let's try to perform the task
1877 				 * with sysfs.
1878 				 */
1879 				ret =  mlx5_sysfs_switch_info
1880 						(list[ns].ifindex,
1881 						 &list[ns].info);
1882 			}
1883 			if (!ret && (list[ns].info.representor ^
1884 				     list[ns].info.master)) {
1885 				ns++;
1886 			} else if ((nd == 1) &&
1887 				   !list[ns].info.representor &&
1888 				   !list[ns].info.master) {
1889 				/*
1890 				 * Single IB device with
1891 				 * one physical port and
1892 				 * attached network device.
1893 				 * May be SRIOV is not enabled
1894 				 * or there is no representors.
1895 				 */
1896 				DRV_LOG(INFO, "no E-Switch support detected");
1897 				ns++;
1898 				break;
1899 			}
1900 		}
1901 		if (!ns) {
1902 			DRV_LOG(ERR,
1903 				"unable to recognize master/representors"
1904 				" on the multiple IB devices");
1905 			rte_errno = ENOENT;
1906 			ret = -rte_errno;
1907 			goto exit;
1908 		}
1909 	}
1910 	assert(ns);
1911 	/*
1912 	 * Sort list to probe devices in natural order for users convenience
1913 	 * (i.e. master first, then representors from lowest to highest ID).
1914 	 */
1915 	qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1916 	/* Default configuration. */
1917 	dev_config = (struct mlx5_dev_config){
1918 		.hw_padding = 0,
1919 		.mps = MLX5_ARG_UNSET,
1920 		.tx_vec_en = 1,
1921 		.rx_vec_en = 1,
1922 		.txq_inline = MLX5_ARG_UNSET,
1923 		.txqs_inline = MLX5_ARG_UNSET,
1924 		.txqs_vec = MLX5_ARG_UNSET,
1925 		.inline_max_packet_sz = MLX5_ARG_UNSET,
1926 		.vf_nl_en = 1,
1927 		.mr_ext_memseg_en = 1,
1928 		.mprq = {
1929 			.enabled = 0, /* Disabled by default. */
1930 			.stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1931 			.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1932 			.min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1933 		},
1934 		.dv_esw_en = 1,
1935 	};
1936 	/* Device specific configuration. */
1937 	switch (pci_dev->id.device_id) {
1938 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1939 		dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1940 		break;
1941 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1942 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1943 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1944 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1945 		dev_config.vf = 1;
1946 		break;
1947 	default:
1948 		break;
1949 	}
1950 	/* Set architecture-dependent default value if unset. */
1951 	if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1952 		dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1953 	for (i = 0; i != ns; ++i) {
1954 		uint32_t restore;
1955 
1956 		list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1957 						 &list[i],
1958 						 dev_config);
1959 		if (!list[i].eth_dev) {
1960 			if (rte_errno != EBUSY && rte_errno != EEXIST)
1961 				break;
1962 			/* Device is disabled or already spawned. Ignore it. */
1963 			continue;
1964 		}
1965 		restore = list[i].eth_dev->data->dev_flags;
1966 		rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1967 		/* Restore non-PCI flags cleared by the above call. */
1968 		list[i].eth_dev->data->dev_flags |= restore;
1969 		rte_eth_dev_probing_finish(list[i].eth_dev);
1970 	}
1971 	if (i != ns) {
1972 		DRV_LOG(ERR,
1973 			"probe of PCI device " PCI_PRI_FMT " aborted after"
1974 			" encountering an error: %s",
1975 			pci_dev->addr.domain, pci_dev->addr.bus,
1976 			pci_dev->addr.devid, pci_dev->addr.function,
1977 			strerror(rte_errno));
1978 		ret = -rte_errno;
1979 		/* Roll back. */
1980 		while (i--) {
1981 			if (!list[i].eth_dev)
1982 				continue;
1983 			mlx5_dev_close(list[i].eth_dev);
1984 			/* mac_addrs must not be freed because in dev_private */
1985 			list[i].eth_dev->data->mac_addrs = NULL;
1986 			claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1987 		}
1988 		/* Restore original error. */
1989 		rte_errno = -ret;
1990 	} else {
1991 		ret = 0;
1992 	}
1993 exit:
1994 	/*
1995 	 * Do the routine cleanup:
1996 	 * - close opened Netlink sockets
1997 	 * - free the Infiniband device list
1998 	 */
1999 	if (nl_rdma >= 0)
2000 		close(nl_rdma);
2001 	if (nl_route >= 0)
2002 		close(nl_route);
2003 	assert(ibv_list);
2004 	mlx5_glue->free_device_list(ibv_list);
2005 	return ret;
2006 }
2007 
2008 /**
2009  * DPDK callback to remove a PCI device.
2010  *
2011  * This function removes all Ethernet devices belong to a given PCI device.
2012  *
2013  * @param[in] pci_dev
2014  *   Pointer to the PCI device.
2015  *
2016  * @return
2017  *   0 on success, the function cannot fail.
2018  */
2019 static int
2020 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2021 {
2022 	uint16_t port_id;
2023 
2024 	RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2025 		rte_eth_dev_close(port_id);
2026 	return 0;
2027 }
2028 
2029 static const struct rte_pci_id mlx5_pci_id_map[] = {
2030 	{
2031 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2032 			       PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2033 	},
2034 	{
2035 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2036 			       PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2037 	},
2038 	{
2039 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2040 			       PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2041 	},
2042 	{
2043 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2044 			       PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2045 	},
2046 	{
2047 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2048 			       PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2049 	},
2050 	{
2051 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2052 			       PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2053 	},
2054 	{
2055 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2056 			       PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2057 	},
2058 	{
2059 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2060 			       PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2061 	},
2062 	{
2063 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2064 			       PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2065 	},
2066 	{
2067 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2068 			       PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2069 	},
2070 	{
2071 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2072 				PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2073 	},
2074 	{
2075 		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2076 				PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2077 	},
2078 	{
2079 		.vendor_id = 0
2080 	}
2081 };
2082 
2083 static struct rte_pci_driver mlx5_driver = {
2084 	.driver = {
2085 		.name = MLX5_DRIVER_NAME
2086 	},
2087 	.id_table = mlx5_pci_id_map,
2088 	.probe = mlx5_pci_probe,
2089 	.remove = mlx5_pci_remove,
2090 	.dma_map = mlx5_dma_map,
2091 	.dma_unmap = mlx5_dma_unmap,
2092 	.drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2093 		      RTE_PCI_DRV_PROBE_AGAIN),
2094 };
2095 
2096 #ifdef RTE_IBVERBS_LINK_DLOPEN
2097 
2098 /**
2099  * Suffix RTE_EAL_PMD_PATH with "-glue".
2100  *
2101  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2102  * suffixing its last component.
2103  *
2104  * @param buf[out]
2105  *   Output buffer, should be large enough otherwise NULL is returned.
2106  * @param size
2107  *   Size of @p out.
2108  *
2109  * @return
2110  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2111  */
2112 static char *
2113 mlx5_glue_path(char *buf, size_t size)
2114 {
2115 	static const char *const bad[] = { "/", ".", "..", NULL };
2116 	const char *path = RTE_EAL_PMD_PATH;
2117 	size_t len = strlen(path);
2118 	size_t off;
2119 	int i;
2120 
2121 	while (len && path[len - 1] == '/')
2122 		--len;
2123 	for (off = len; off && path[off - 1] != '/'; --off)
2124 		;
2125 	for (i = 0; bad[i]; ++i)
2126 		if (!strncmp(path + off, bad[i], (int)(len - off)))
2127 			goto error;
2128 	i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2129 	if (i == -1 || (size_t)i >= size)
2130 		goto error;
2131 	return buf;
2132 error:
2133 	DRV_LOG(ERR,
2134 		"unable to append \"-glue\" to last component of"
2135 		" RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2136 		" please re-configure DPDK");
2137 	return NULL;
2138 }
2139 
2140 /**
2141  * Initialization routine for run-time dependency on rdma-core.
2142  */
2143 static int
2144 mlx5_glue_init(void)
2145 {
2146 	char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2147 	const char *path[] = {
2148 		/*
2149 		 * A basic security check is necessary before trusting
2150 		 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2151 		 */
2152 		(geteuid() == getuid() && getegid() == getgid() ?
2153 		 getenv("MLX5_GLUE_PATH") : NULL),
2154 		/*
2155 		 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2156 		 * variant, otherwise let dlopen() look up libraries on its
2157 		 * own.
2158 		 */
2159 		(*RTE_EAL_PMD_PATH ?
2160 		 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2161 	};
2162 	unsigned int i = 0;
2163 	void *handle = NULL;
2164 	void **sym;
2165 	const char *dlmsg;
2166 
2167 	while (!handle && i != RTE_DIM(path)) {
2168 		const char *end;
2169 		size_t len;
2170 		int ret;
2171 
2172 		if (!path[i]) {
2173 			++i;
2174 			continue;
2175 		}
2176 		end = strpbrk(path[i], ":;");
2177 		if (!end)
2178 			end = path[i] + strlen(path[i]);
2179 		len = end - path[i];
2180 		ret = 0;
2181 		do {
2182 			char name[ret + 1];
2183 
2184 			ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2185 				       (int)len, path[i],
2186 				       (!len || *(end - 1) == '/') ? "" : "/");
2187 			if (ret == -1)
2188 				break;
2189 			if (sizeof(name) != (size_t)ret + 1)
2190 				continue;
2191 			DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2192 				name);
2193 			handle = dlopen(name, RTLD_LAZY);
2194 			break;
2195 		} while (1);
2196 		path[i] = end + 1;
2197 		if (!*end)
2198 			++i;
2199 	}
2200 	if (!handle) {
2201 		rte_errno = EINVAL;
2202 		dlmsg = dlerror();
2203 		if (dlmsg)
2204 			DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2205 		goto glue_error;
2206 	}
2207 	sym = dlsym(handle, "mlx5_glue");
2208 	if (!sym || !*sym) {
2209 		rte_errno = EINVAL;
2210 		dlmsg = dlerror();
2211 		if (dlmsg)
2212 			DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2213 		goto glue_error;
2214 	}
2215 	mlx5_glue = *sym;
2216 	return 0;
2217 glue_error:
2218 	if (handle)
2219 		dlclose(handle);
2220 	DRV_LOG(WARNING,
2221 		"cannot initialize PMD due to missing run-time dependency on"
2222 		" rdma-core libraries (libibverbs, libmlx5)");
2223 	return -rte_errno;
2224 }
2225 
2226 #endif
2227 
2228 /**
2229  * Driver initialization routine.
2230  */
2231 RTE_INIT(rte_mlx5_pmd_init)
2232 {
2233 	/* Initialize driver log type. */
2234 	mlx5_logtype = rte_log_register("pmd.net.mlx5");
2235 	if (mlx5_logtype >= 0)
2236 		rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2237 
2238 	/* Build the static tables for Verbs conversion. */
2239 	mlx5_set_ptype_table();
2240 	mlx5_set_cksum_table();
2241 	mlx5_set_swp_types_table();
2242 	/*
2243 	 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2244 	 * huge pages. Calling ibv_fork_init() during init allows
2245 	 * applications to use fork() safely for purposes other than
2246 	 * using this PMD, which is not supported in forked processes.
2247 	 */
2248 	setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2249 	/* Match the size of Rx completion entry to the size of a cacheline. */
2250 	if (RTE_CACHE_LINE_SIZE == 128)
2251 		setenv("MLX5_CQE_SIZE", "128", 0);
2252 	/*
2253 	 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2254 	 * cleanup all the Verbs resources even when the device was removed.
2255 	 */
2256 	setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2257 #ifdef RTE_IBVERBS_LINK_DLOPEN
2258 	if (mlx5_glue_init())
2259 		return;
2260 	assert(mlx5_glue);
2261 #endif
2262 #ifndef NDEBUG
2263 	/* Glue structure must not contain any NULL pointers. */
2264 	{
2265 		unsigned int i;
2266 
2267 		for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2268 			assert(((const void *const *)mlx5_glue)[i]);
2269 	}
2270 #endif
2271 	if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2272 		DRV_LOG(ERR,
2273 			"rdma-core glue \"%s\" mismatch: \"%s\" is required",
2274 			mlx5_glue->version, MLX5_GLUE_VERSION);
2275 		return;
2276 	}
2277 	mlx5_glue->fork_init();
2278 	rte_pci_register(&mlx5_driver);
2279 }
2280 
2281 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2282 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2283 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");
2284