1771fa900SAdrien Mazarguil /*- 2771fa900SAdrien Mazarguil * BSD LICENSE 3771fa900SAdrien Mazarguil * 4771fa900SAdrien Mazarguil * Copyright 2015 6WIND S.A. 5771fa900SAdrien Mazarguil * Copyright 2015 Mellanox. 6771fa900SAdrien Mazarguil * 7771fa900SAdrien Mazarguil * Redistribution and use in source and binary forms, with or without 8771fa900SAdrien Mazarguil * modification, are permitted provided that the following conditions 9771fa900SAdrien Mazarguil * are met: 10771fa900SAdrien Mazarguil * 11771fa900SAdrien Mazarguil * * Redistributions of source code must retain the above copyright 12771fa900SAdrien Mazarguil * notice, this list of conditions and the following disclaimer. 13771fa900SAdrien Mazarguil * * Redistributions in binary form must reproduce the above copyright 14771fa900SAdrien Mazarguil * notice, this list of conditions and the following disclaimer in 15771fa900SAdrien Mazarguil * the documentation and/or other materials provided with the 16771fa900SAdrien Mazarguil * distribution. 17771fa900SAdrien Mazarguil * * Neither the name of 6WIND S.A. nor the names of its 18771fa900SAdrien Mazarguil * contributors may be used to endorse or promote products derived 19771fa900SAdrien Mazarguil * from this software without specific prior written permission. 20771fa900SAdrien Mazarguil * 21771fa900SAdrien Mazarguil * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22771fa900SAdrien Mazarguil * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23771fa900SAdrien Mazarguil * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24771fa900SAdrien Mazarguil * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25771fa900SAdrien Mazarguil * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26771fa900SAdrien Mazarguil * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27771fa900SAdrien Mazarguil * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28771fa900SAdrien Mazarguil * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29771fa900SAdrien Mazarguil * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30771fa900SAdrien Mazarguil * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31771fa900SAdrien Mazarguil * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32771fa900SAdrien Mazarguil */ 33771fa900SAdrien Mazarguil 34771fa900SAdrien Mazarguil #include <stddef.h> 35771fa900SAdrien Mazarguil #include <unistd.h> 36771fa900SAdrien Mazarguil #include <string.h> 37771fa900SAdrien Mazarguil #include <assert.h> 38771fa900SAdrien Mazarguil #include <stdint.h> 39771fa900SAdrien Mazarguil #include <stdlib.h> 40771fa900SAdrien Mazarguil #include <net/if.h> 41771fa900SAdrien Mazarguil 42771fa900SAdrien Mazarguil /* Verbs header. */ 43771fa900SAdrien Mazarguil /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 44771fa900SAdrien Mazarguil #ifdef PEDANTIC 45771fa900SAdrien Mazarguil #pragma GCC diagnostic ignored "-pedantic" 46771fa900SAdrien Mazarguil #endif 47771fa900SAdrien Mazarguil #include <infiniband/verbs.h> 48771fa900SAdrien Mazarguil #ifdef PEDANTIC 49771fa900SAdrien Mazarguil #pragma GCC diagnostic error "-pedantic" 50771fa900SAdrien Mazarguil #endif 51771fa900SAdrien Mazarguil 52771fa900SAdrien Mazarguil /* DPDK headers don't like -pedantic. */ 53771fa900SAdrien Mazarguil #ifdef PEDANTIC 54771fa900SAdrien Mazarguil #pragma GCC diagnostic ignored "-pedantic" 55771fa900SAdrien Mazarguil #endif 56771fa900SAdrien Mazarguil #include <rte_malloc.h> 57771fa900SAdrien Mazarguil #include <rte_ethdev.h> 58771fa900SAdrien Mazarguil #include <rte_pci.h> 59771fa900SAdrien Mazarguil #include <rte_common.h> 60771fa900SAdrien Mazarguil #ifdef PEDANTIC 61771fa900SAdrien Mazarguil #pragma GCC diagnostic error "-pedantic" 62771fa900SAdrien Mazarguil #endif 63771fa900SAdrien Mazarguil 64771fa900SAdrien Mazarguil #include "mlx5.h" 65771fa900SAdrien Mazarguil #include "mlx5_utils.h" 662e22920bSAdrien Mazarguil #include "mlx5_rxtx.h" 67771fa900SAdrien Mazarguil #include "mlx5_autoconf.h" 6813d57bd5SAdrien Mazarguil #include "mlx5_defs.h" 69771fa900SAdrien Mazarguil 70771fa900SAdrien Mazarguil /** 71771fa900SAdrien Mazarguil * DPDK callback to close the device. 72771fa900SAdrien Mazarguil * 73771fa900SAdrien Mazarguil * Destroy all queues and objects, free memory. 74771fa900SAdrien Mazarguil * 75771fa900SAdrien Mazarguil * @param dev 76771fa900SAdrien Mazarguil * Pointer to Ethernet device structure. 77771fa900SAdrien Mazarguil */ 78771fa900SAdrien Mazarguil static void 79771fa900SAdrien Mazarguil mlx5_dev_close(struct rte_eth_dev *dev) 80771fa900SAdrien Mazarguil { 81771fa900SAdrien Mazarguil struct priv *priv = dev->data->dev_private; 822e22920bSAdrien Mazarguil void *tmp; 832e22920bSAdrien Mazarguil unsigned int i; 84771fa900SAdrien Mazarguil 85771fa900SAdrien Mazarguil priv_lock(priv); 86771fa900SAdrien Mazarguil DEBUG("%p: closing device \"%s\"", 87771fa900SAdrien Mazarguil (void *)dev, 88771fa900SAdrien Mazarguil ((priv->ctx != NULL) ? priv->ctx->device->name : "")); 89ecc1c29dSAdrien Mazarguil /* In case mlx5_dev_stop() has not been called. */ 90198a3c33SNelio Laranjeiro priv_dev_interrupt_handler_uninstall(priv, dev); 91083c2dd3SYaacov Hazan priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_ALLMULTI); 92083c2dd3SYaacov Hazan priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_PROMISC); 930497ddaaSYaacov Hazan priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_BROADCAST); 940497ddaaSYaacov Hazan priv_special_flow_disable(priv, HASH_RXQ_FLOW_TYPE_IPV6MULTI); 95ecc1c29dSAdrien Mazarguil priv_mac_addrs_disable(priv); 96ecc1c29dSAdrien Mazarguil priv_destroy_hash_rxqs(priv); 97*76f5c99eSYaacov Hazan 98*76f5c99eSYaacov Hazan /* Remove flow director elements. */ 99*76f5c99eSYaacov Hazan priv_fdir_disable(priv); 100*76f5c99eSYaacov Hazan priv_fdir_delete_filters_list(priv); 101*76f5c99eSYaacov Hazan 1022e22920bSAdrien Mazarguil /* Prevent crashes when queues are still in use. */ 1032e22920bSAdrien Mazarguil dev->rx_pkt_burst = removed_rx_burst; 1042e22920bSAdrien Mazarguil dev->tx_pkt_burst = removed_tx_burst; 1052e22920bSAdrien Mazarguil if (priv->rxqs != NULL) { 1062e22920bSAdrien Mazarguil /* XXX race condition if mlx5_rx_burst() is still running. */ 1072e22920bSAdrien Mazarguil usleep(1000); 1082e22920bSAdrien Mazarguil for (i = 0; (i != priv->rxqs_n); ++i) { 1092e22920bSAdrien Mazarguil tmp = (*priv->rxqs)[i]; 1102e22920bSAdrien Mazarguil if (tmp == NULL) 1112e22920bSAdrien Mazarguil continue; 1122e22920bSAdrien Mazarguil (*priv->rxqs)[i] = NULL; 1132e22920bSAdrien Mazarguil rxq_cleanup(tmp); 1142e22920bSAdrien Mazarguil rte_free(tmp); 1152e22920bSAdrien Mazarguil } 1162e22920bSAdrien Mazarguil priv->rxqs_n = 0; 1172e22920bSAdrien Mazarguil priv->rxqs = NULL; 1182e22920bSAdrien Mazarguil } 1192e22920bSAdrien Mazarguil if (priv->txqs != NULL) { 1202e22920bSAdrien Mazarguil /* XXX race condition if mlx5_tx_burst() is still running. */ 1212e22920bSAdrien Mazarguil usleep(1000); 1222e22920bSAdrien Mazarguil for (i = 0; (i != priv->txqs_n); ++i) { 1232e22920bSAdrien Mazarguil tmp = (*priv->txqs)[i]; 1242e22920bSAdrien Mazarguil if (tmp == NULL) 1252e22920bSAdrien Mazarguil continue; 1262e22920bSAdrien Mazarguil (*priv->txqs)[i] = NULL; 1272e22920bSAdrien Mazarguil txq_cleanup(tmp); 1282e22920bSAdrien Mazarguil rte_free(tmp); 1292e22920bSAdrien Mazarguil } 1302e22920bSAdrien Mazarguil priv->txqs_n = 0; 1312e22920bSAdrien Mazarguil priv->txqs = NULL; 1322e22920bSAdrien Mazarguil } 133771fa900SAdrien Mazarguil if (priv->pd != NULL) { 134771fa900SAdrien Mazarguil assert(priv->ctx != NULL); 135771fa900SAdrien Mazarguil claim_zero(ibv_dealloc_pd(priv->pd)); 136771fa900SAdrien Mazarguil claim_zero(ibv_close_device(priv->ctx)); 137771fa900SAdrien Mazarguil } else 138771fa900SAdrien Mazarguil assert(priv->ctx == NULL); 1390573873dSNelio Laranjeiro if (priv->rss_conf != NULL) { 1400573873dSNelio Laranjeiro for (i = 0; (i != hash_rxq_init_n); ++i) 1410573873dSNelio Laranjeiro rte_free((*priv->rss_conf)[i]); 1422f97422eSNelio Laranjeiro rte_free(priv->rss_conf); 1430573873dSNelio Laranjeiro } 144634efbc2SNelio Laranjeiro if (priv->reta_idx != NULL) 145634efbc2SNelio Laranjeiro rte_free(priv->reta_idx); 146771fa900SAdrien Mazarguil priv_unlock(priv); 147771fa900SAdrien Mazarguil memset(priv, 0, sizeof(*priv)); 148771fa900SAdrien Mazarguil } 149771fa900SAdrien Mazarguil 150771fa900SAdrien Mazarguil static const struct eth_dev_ops mlx5_dev_ops = { 151e60fbd5bSAdrien Mazarguil .dev_configure = mlx5_dev_configure, 152e60fbd5bSAdrien Mazarguil .dev_start = mlx5_dev_start, 153e60fbd5bSAdrien Mazarguil .dev_stop = mlx5_dev_stop, 154771fa900SAdrien Mazarguil .dev_close = mlx5_dev_close, 1551bdbe1afSAdrien Mazarguil .promiscuous_enable = mlx5_promiscuous_enable, 1561bdbe1afSAdrien Mazarguil .promiscuous_disable = mlx5_promiscuous_disable, 1571bdbe1afSAdrien Mazarguil .allmulticast_enable = mlx5_allmulticast_enable, 1581bdbe1afSAdrien Mazarguil .allmulticast_disable = mlx5_allmulticast_disable, 159cb8faed7SAdrien Mazarguil .link_update = mlx5_link_update, 16087011737SAdrien Mazarguil .stats_get = mlx5_stats_get, 16187011737SAdrien Mazarguil .stats_reset = mlx5_stats_reset, 162e60fbd5bSAdrien Mazarguil .dev_infos_get = mlx5_dev_infos_get, 163e9086978SAdrien Mazarguil .vlan_filter_set = mlx5_vlan_filter_set, 1642e22920bSAdrien Mazarguil .rx_queue_setup = mlx5_rx_queue_setup, 1652e22920bSAdrien Mazarguil .tx_queue_setup = mlx5_tx_queue_setup, 1662e22920bSAdrien Mazarguil .rx_queue_release = mlx5_rx_queue_release, 1672e22920bSAdrien Mazarguil .tx_queue_release = mlx5_tx_queue_release, 16802d75430SAdrien Mazarguil .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 16902d75430SAdrien Mazarguil .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 1703318aef7SAdrien Mazarguil .mac_addr_remove = mlx5_mac_addr_remove, 1713318aef7SAdrien Mazarguil .mac_addr_add = mlx5_mac_addr_add, 17286977fccSDavid Marchand .mac_addr_set = mlx5_mac_addr_set, 173cf37ca95SAdrien Mazarguil .mtu_set = mlx5_dev_set_mtu, 174634efbc2SNelio Laranjeiro .reta_update = mlx5_dev_rss_reta_update, 175634efbc2SNelio Laranjeiro .reta_query = mlx5_dev_rss_reta_query, 1762f97422eSNelio Laranjeiro .rss_hash_update = mlx5_rss_hash_update, 1772f97422eSNelio Laranjeiro .rss_hash_conf_get = mlx5_rss_hash_conf_get, 178*76f5c99eSYaacov Hazan #ifdef MLX5_FDIR_SUPPORT 179*76f5c99eSYaacov Hazan .filter_ctrl = mlx5_dev_filter_ctrl, 180*76f5c99eSYaacov Hazan #endif /* MLX5_FDIR_SUPPORT */ 181771fa900SAdrien Mazarguil }; 182771fa900SAdrien Mazarguil 183771fa900SAdrien Mazarguil static struct { 184771fa900SAdrien Mazarguil struct rte_pci_addr pci_addr; /* associated PCI address */ 185771fa900SAdrien Mazarguil uint32_t ports; /* physical ports bitfield. */ 186771fa900SAdrien Mazarguil } mlx5_dev[32]; 187771fa900SAdrien Mazarguil 188771fa900SAdrien Mazarguil /** 189771fa900SAdrien Mazarguil * Get device index in mlx5_dev[] from PCI bus address. 190771fa900SAdrien Mazarguil * 191771fa900SAdrien Mazarguil * @param[in] pci_addr 192771fa900SAdrien Mazarguil * PCI bus address to look for. 193771fa900SAdrien Mazarguil * 194771fa900SAdrien Mazarguil * @return 195771fa900SAdrien Mazarguil * mlx5_dev[] index on success, -1 on failure. 196771fa900SAdrien Mazarguil */ 197771fa900SAdrien Mazarguil static int 198771fa900SAdrien Mazarguil mlx5_dev_idx(struct rte_pci_addr *pci_addr) 199771fa900SAdrien Mazarguil { 200771fa900SAdrien Mazarguil unsigned int i; 201771fa900SAdrien Mazarguil int ret = -1; 202771fa900SAdrien Mazarguil 203771fa900SAdrien Mazarguil assert(pci_addr != NULL); 204771fa900SAdrien Mazarguil for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) { 205771fa900SAdrien Mazarguil if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) && 206771fa900SAdrien Mazarguil (mlx5_dev[i].pci_addr.bus == pci_addr->bus) && 207771fa900SAdrien Mazarguil (mlx5_dev[i].pci_addr.devid == pci_addr->devid) && 208771fa900SAdrien Mazarguil (mlx5_dev[i].pci_addr.function == pci_addr->function)) 209771fa900SAdrien Mazarguil return i; 210771fa900SAdrien Mazarguil if ((mlx5_dev[i].ports == 0) && (ret == -1)) 211771fa900SAdrien Mazarguil ret = i; 212771fa900SAdrien Mazarguil } 213771fa900SAdrien Mazarguil return ret; 214771fa900SAdrien Mazarguil } 215771fa900SAdrien Mazarguil 216771fa900SAdrien Mazarguil static struct eth_driver mlx5_driver; 217771fa900SAdrien Mazarguil 218771fa900SAdrien Mazarguil /** 219771fa900SAdrien Mazarguil * DPDK callback to register a PCI device. 220771fa900SAdrien Mazarguil * 221771fa900SAdrien Mazarguil * This function creates an Ethernet device for each port of a given 222771fa900SAdrien Mazarguil * PCI device. 223771fa900SAdrien Mazarguil * 224771fa900SAdrien Mazarguil * @param[in] pci_drv 225771fa900SAdrien Mazarguil * PCI driver structure (mlx5_driver). 226771fa900SAdrien Mazarguil * @param[in] pci_dev 227771fa900SAdrien Mazarguil * PCI device information. 228771fa900SAdrien Mazarguil * 229771fa900SAdrien Mazarguil * @return 230771fa900SAdrien Mazarguil * 0 on success, negative errno value on failure. 231771fa900SAdrien Mazarguil */ 232771fa900SAdrien Mazarguil static int 233771fa900SAdrien Mazarguil mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) 234771fa900SAdrien Mazarguil { 235771fa900SAdrien Mazarguil struct ibv_device **list; 236771fa900SAdrien Mazarguil struct ibv_device *ibv_dev; 237771fa900SAdrien Mazarguil int err = 0; 238771fa900SAdrien Mazarguil struct ibv_context *attr_ctx = NULL; 239771fa900SAdrien Mazarguil struct ibv_device_attr device_attr; 240771fa900SAdrien Mazarguil unsigned int vf; 241771fa900SAdrien Mazarguil int idx; 242771fa900SAdrien Mazarguil int i; 243771fa900SAdrien Mazarguil 244771fa900SAdrien Mazarguil (void)pci_drv; 245771fa900SAdrien Mazarguil assert(pci_drv == &mlx5_driver.pci_drv); 246771fa900SAdrien Mazarguil /* Get mlx5_dev[] index. */ 247771fa900SAdrien Mazarguil idx = mlx5_dev_idx(&pci_dev->addr); 248771fa900SAdrien Mazarguil if (idx == -1) { 249771fa900SAdrien Mazarguil ERROR("this driver cannot support any more adapters"); 250771fa900SAdrien Mazarguil return -ENOMEM; 251771fa900SAdrien Mazarguil } 252771fa900SAdrien Mazarguil DEBUG("using driver device index %d", idx); 253771fa900SAdrien Mazarguil 254771fa900SAdrien Mazarguil /* Save PCI address. */ 255771fa900SAdrien Mazarguil mlx5_dev[idx].pci_addr = pci_dev->addr; 256771fa900SAdrien Mazarguil list = ibv_get_device_list(&i); 257771fa900SAdrien Mazarguil if (list == NULL) { 258771fa900SAdrien Mazarguil assert(errno); 259771fa900SAdrien Mazarguil if (errno == ENOSYS) { 260771fa900SAdrien Mazarguil WARN("cannot list devices, is ib_uverbs loaded?"); 261771fa900SAdrien Mazarguil return 0; 262771fa900SAdrien Mazarguil } 263771fa900SAdrien Mazarguil return -errno; 264771fa900SAdrien Mazarguil } 265771fa900SAdrien Mazarguil assert(i >= 0); 266771fa900SAdrien Mazarguil /* 267771fa900SAdrien Mazarguil * For each listed device, check related sysfs entry against 268771fa900SAdrien Mazarguil * the provided PCI ID. 269771fa900SAdrien Mazarguil */ 270771fa900SAdrien Mazarguil while (i != 0) { 271771fa900SAdrien Mazarguil struct rte_pci_addr pci_addr; 272771fa900SAdrien Mazarguil 273771fa900SAdrien Mazarguil --i; 274771fa900SAdrien Mazarguil DEBUG("checking device \"%s\"", list[i]->name); 275771fa900SAdrien Mazarguil if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr)) 276771fa900SAdrien Mazarguil continue; 277771fa900SAdrien Mazarguil if ((pci_dev->addr.domain != pci_addr.domain) || 278771fa900SAdrien Mazarguil (pci_dev->addr.bus != pci_addr.bus) || 279771fa900SAdrien Mazarguil (pci_dev->addr.devid != pci_addr.devid) || 280771fa900SAdrien Mazarguil (pci_dev->addr.function != pci_addr.function)) 281771fa900SAdrien Mazarguil continue; 282771fa900SAdrien Mazarguil vf = ((pci_dev->id.device_id == 283771fa900SAdrien Mazarguil PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) || 284771fa900SAdrien Mazarguil (pci_dev->id.device_id == 285771fa900SAdrien Mazarguil PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)); 286771fa900SAdrien Mazarguil INFO("PCI information matches, using device \"%s\" (VF: %s)", 287771fa900SAdrien Mazarguil list[i]->name, (vf ? "true" : "false")); 288771fa900SAdrien Mazarguil attr_ctx = ibv_open_device(list[i]); 289771fa900SAdrien Mazarguil err = errno; 290771fa900SAdrien Mazarguil break; 291771fa900SAdrien Mazarguil } 292771fa900SAdrien Mazarguil if (attr_ctx == NULL) { 293771fa900SAdrien Mazarguil ibv_free_device_list(list); 294771fa900SAdrien Mazarguil switch (err) { 295771fa900SAdrien Mazarguil case 0: 296771fa900SAdrien Mazarguil WARN("cannot access device, is mlx5_ib loaded?"); 297771fa900SAdrien Mazarguil return 0; 298771fa900SAdrien Mazarguil case EINVAL: 299771fa900SAdrien Mazarguil WARN("cannot use device, are drivers up to date?"); 300771fa900SAdrien Mazarguil return 0; 301771fa900SAdrien Mazarguil } 302771fa900SAdrien Mazarguil assert(err > 0); 303771fa900SAdrien Mazarguil return -err; 304771fa900SAdrien Mazarguil } 305771fa900SAdrien Mazarguil ibv_dev = list[i]; 306771fa900SAdrien Mazarguil 307771fa900SAdrien Mazarguil DEBUG("device opened"); 308771fa900SAdrien Mazarguil if (ibv_query_device(attr_ctx, &device_attr)) 309771fa900SAdrien Mazarguil goto error; 310771fa900SAdrien Mazarguil INFO("%u port(s) detected", device_attr.phys_port_cnt); 311771fa900SAdrien Mazarguil 312771fa900SAdrien Mazarguil for (i = 0; i < device_attr.phys_port_cnt; i++) { 313771fa900SAdrien Mazarguil uint32_t port = i + 1; /* ports are indexed from one */ 314771fa900SAdrien Mazarguil uint32_t test = (1 << i); 315771fa900SAdrien Mazarguil struct ibv_context *ctx = NULL; 316771fa900SAdrien Mazarguil struct ibv_port_attr port_attr; 317771fa900SAdrien Mazarguil struct ibv_pd *pd = NULL; 318771fa900SAdrien Mazarguil struct priv *priv = NULL; 319771fa900SAdrien Mazarguil struct rte_eth_dev *eth_dev; 320771fa900SAdrien Mazarguil #ifdef HAVE_EXP_QUERY_DEVICE 321771fa900SAdrien Mazarguil struct ibv_exp_device_attr exp_device_attr; 322771fa900SAdrien Mazarguil #endif /* HAVE_EXP_QUERY_DEVICE */ 323771fa900SAdrien Mazarguil struct ether_addr mac; 324771fa900SAdrien Mazarguil 325771fa900SAdrien Mazarguil #ifdef HAVE_EXP_QUERY_DEVICE 32695e16ef3SNelio Laranjeiro exp_device_attr.comp_mask = 32795e16ef3SNelio Laranjeiro IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS | 32895e16ef3SNelio Laranjeiro IBV_EXP_DEVICE_ATTR_RX_HASH; 329771fa900SAdrien Mazarguil #endif /* HAVE_EXP_QUERY_DEVICE */ 330771fa900SAdrien Mazarguil 331771fa900SAdrien Mazarguil DEBUG("using port %u (%08" PRIx32 ")", port, test); 332771fa900SAdrien Mazarguil 333771fa900SAdrien Mazarguil ctx = ibv_open_device(ibv_dev); 334771fa900SAdrien Mazarguil if (ctx == NULL) 335771fa900SAdrien Mazarguil goto port_error; 336771fa900SAdrien Mazarguil 337771fa900SAdrien Mazarguil /* Check port status. */ 338771fa900SAdrien Mazarguil err = ibv_query_port(ctx, port, &port_attr); 339771fa900SAdrien Mazarguil if (err) { 340771fa900SAdrien Mazarguil ERROR("port query failed: %s", strerror(err)); 341771fa900SAdrien Mazarguil goto port_error; 342771fa900SAdrien Mazarguil } 343771fa900SAdrien Mazarguil if (port_attr.state != IBV_PORT_ACTIVE) 344771fa900SAdrien Mazarguil DEBUG("port %d is not active: \"%s\" (%d)", 345771fa900SAdrien Mazarguil port, ibv_port_state_str(port_attr.state), 346771fa900SAdrien Mazarguil port_attr.state); 347771fa900SAdrien Mazarguil 348771fa900SAdrien Mazarguil /* Allocate protection domain. */ 349771fa900SAdrien Mazarguil pd = ibv_alloc_pd(ctx); 350771fa900SAdrien Mazarguil if (pd == NULL) { 351771fa900SAdrien Mazarguil ERROR("PD allocation failure"); 352771fa900SAdrien Mazarguil err = ENOMEM; 353771fa900SAdrien Mazarguil goto port_error; 354771fa900SAdrien Mazarguil } 355771fa900SAdrien Mazarguil 356771fa900SAdrien Mazarguil mlx5_dev[idx].ports |= test; 357771fa900SAdrien Mazarguil 358771fa900SAdrien Mazarguil /* from rte_ethdev.c */ 359771fa900SAdrien Mazarguil priv = rte_zmalloc("ethdev private structure", 360771fa900SAdrien Mazarguil sizeof(*priv), 361771fa900SAdrien Mazarguil RTE_CACHE_LINE_SIZE); 362771fa900SAdrien Mazarguil if (priv == NULL) { 363771fa900SAdrien Mazarguil ERROR("priv allocation failure"); 364771fa900SAdrien Mazarguil err = ENOMEM; 365771fa900SAdrien Mazarguil goto port_error; 366771fa900SAdrien Mazarguil } 367771fa900SAdrien Mazarguil 368771fa900SAdrien Mazarguil priv->ctx = ctx; 369771fa900SAdrien Mazarguil priv->device_attr = device_attr; 370771fa900SAdrien Mazarguil priv->port = port; 371771fa900SAdrien Mazarguil priv->pd = pd; 372771fa900SAdrien Mazarguil priv->mtu = ETHER_MTU; 373771fa900SAdrien Mazarguil #ifdef HAVE_EXP_QUERY_DEVICE 374771fa900SAdrien Mazarguil if (ibv_exp_query_device(ctx, &exp_device_attr)) { 375771fa900SAdrien Mazarguil ERROR("ibv_exp_query_device() failed"); 376771fa900SAdrien Mazarguil goto port_error; 377771fa900SAdrien Mazarguil } 378771fa900SAdrien Mazarguil 379771fa900SAdrien Mazarguil priv->hw_csum = 380771fa900SAdrien Mazarguil ((exp_device_attr.exp_device_cap_flags & 381771fa900SAdrien Mazarguil IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) && 382771fa900SAdrien Mazarguil (exp_device_attr.exp_device_cap_flags & 383771fa900SAdrien Mazarguil IBV_EXP_DEVICE_RX_CSUM_IP_PKT)); 384771fa900SAdrien Mazarguil DEBUG("checksum offloading is %ssupported", 385771fa900SAdrien Mazarguil (priv->hw_csum ? "" : "not ")); 386771fa900SAdrien Mazarguil 387771fa900SAdrien Mazarguil priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags & 388771fa900SAdrien Mazarguil IBV_EXP_DEVICE_VXLAN_SUPPORT); 389771fa900SAdrien Mazarguil DEBUG("L2 tunnel checksum offloads are %ssupported", 390771fa900SAdrien Mazarguil (priv->hw_csum_l2tun ? "" : "not ")); 391771fa900SAdrien Mazarguil 39213d57bd5SAdrien Mazarguil priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size; 39313d57bd5SAdrien Mazarguil /* Remove this check once DPDK supports larger/variable 39413d57bd5SAdrien Mazarguil * indirection tables. */ 39513d57bd5SAdrien Mazarguil if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE) 39613d57bd5SAdrien Mazarguil priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE; 39795e16ef3SNelio Laranjeiro DEBUG("maximum RX indirection table size is %u", 39895e16ef3SNelio Laranjeiro priv->ind_table_max_size); 39995e16ef3SNelio Laranjeiro 40095e16ef3SNelio Laranjeiro #else /* HAVE_EXP_QUERY_DEVICE */ 40195e16ef3SNelio Laranjeiro priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE; 402771fa900SAdrien Mazarguil #endif /* HAVE_EXP_QUERY_DEVICE */ 403771fa900SAdrien Mazarguil 404771fa900SAdrien Mazarguil priv->vf = vf; 4050573873dSNelio Laranjeiro /* Allocate and register default RSS hash keys. */ 4060573873dSNelio Laranjeiro priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n, 4070573873dSNelio Laranjeiro sizeof((*priv->rss_conf)[0]), 0); 4080573873dSNelio Laranjeiro if (priv->rss_conf == NULL) { 4090573873dSNelio Laranjeiro err = ENOMEM; 4100573873dSNelio Laranjeiro goto port_error; 4110573873dSNelio Laranjeiro } 4122f97422eSNelio Laranjeiro err = rss_hash_rss_conf_new_key(priv, 4132f97422eSNelio Laranjeiro rss_hash_default_key, 4140573873dSNelio Laranjeiro rss_hash_default_key_len, 4150573873dSNelio Laranjeiro ETH_RSS_PROTO_MASK); 4162f97422eSNelio Laranjeiro if (err) 4172f97422eSNelio Laranjeiro goto port_error; 418771fa900SAdrien Mazarguil /* Configure the first MAC address by default. */ 419771fa900SAdrien Mazarguil if (priv_get_mac(priv, &mac.addr_bytes)) { 420771fa900SAdrien Mazarguil ERROR("cannot get MAC address, is mlx5_en loaded?" 421771fa900SAdrien Mazarguil " (errno: %s)", strerror(errno)); 422771fa900SAdrien Mazarguil goto port_error; 423771fa900SAdrien Mazarguil } 424771fa900SAdrien Mazarguil INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 425771fa900SAdrien Mazarguil priv->port, 426771fa900SAdrien Mazarguil mac.addr_bytes[0], mac.addr_bytes[1], 427771fa900SAdrien Mazarguil mac.addr_bytes[2], mac.addr_bytes[3], 428771fa900SAdrien Mazarguil mac.addr_bytes[4], mac.addr_bytes[5]); 4290497ddaaSYaacov Hazan /* Register MAC address. */ 430771fa900SAdrien Mazarguil claim_zero(priv_mac_addr_add(priv, 0, 431771fa900SAdrien Mazarguil (const uint8_t (*)[ETHER_ADDR_LEN]) 432771fa900SAdrien Mazarguil mac.addr_bytes)); 433*76f5c99eSYaacov Hazan /* Initialize FD filters list. */ 434*76f5c99eSYaacov Hazan err = fdir_init_filters_list(priv); 435*76f5c99eSYaacov Hazan if (err) 436*76f5c99eSYaacov Hazan goto port_error; 437771fa900SAdrien Mazarguil #ifndef NDEBUG 438771fa900SAdrien Mazarguil { 439771fa900SAdrien Mazarguil char ifname[IF_NAMESIZE]; 440771fa900SAdrien Mazarguil 441771fa900SAdrien Mazarguil if (priv_get_ifname(priv, &ifname) == 0) 442771fa900SAdrien Mazarguil DEBUG("port %u ifname is \"%s\"", 443771fa900SAdrien Mazarguil priv->port, ifname); 444771fa900SAdrien Mazarguil else 445771fa900SAdrien Mazarguil DEBUG("port %u ifname is unknown", priv->port); 446771fa900SAdrien Mazarguil } 447771fa900SAdrien Mazarguil #endif 448771fa900SAdrien Mazarguil /* Get actual MTU if possible. */ 449771fa900SAdrien Mazarguil priv_get_mtu(priv, &priv->mtu); 450771fa900SAdrien Mazarguil DEBUG("port %u MTU is %u", priv->port, priv->mtu); 451771fa900SAdrien Mazarguil 452771fa900SAdrien Mazarguil /* from rte_ethdev.c */ 453771fa900SAdrien Mazarguil { 454771fa900SAdrien Mazarguil char name[RTE_ETH_NAME_MAX_LEN]; 455771fa900SAdrien Mazarguil 456771fa900SAdrien Mazarguil snprintf(name, sizeof(name), "%s port %u", 457771fa900SAdrien Mazarguil ibv_get_device_name(ibv_dev), port); 458771fa900SAdrien Mazarguil eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI); 459771fa900SAdrien Mazarguil } 460771fa900SAdrien Mazarguil if (eth_dev == NULL) { 461771fa900SAdrien Mazarguil ERROR("can not allocate rte ethdev"); 462771fa900SAdrien Mazarguil err = ENOMEM; 463771fa900SAdrien Mazarguil goto port_error; 464771fa900SAdrien Mazarguil } 465771fa900SAdrien Mazarguil 466771fa900SAdrien Mazarguil eth_dev->data->dev_private = priv; 467771fa900SAdrien Mazarguil eth_dev->pci_dev = pci_dev; 468eeefe73fSBernard Iremonger 469eeefe73fSBernard Iremonger rte_eth_copy_pci_info(eth_dev, pci_dev); 470eeefe73fSBernard Iremonger 471771fa900SAdrien Mazarguil eth_dev->driver = &mlx5_driver; 472771fa900SAdrien Mazarguil eth_dev->data->rx_mbuf_alloc_failed = 0; 473771fa900SAdrien Mazarguil eth_dev->data->mtu = ETHER_MTU; 474771fa900SAdrien Mazarguil 475771fa900SAdrien Mazarguil priv->dev = eth_dev; 476771fa900SAdrien Mazarguil eth_dev->dev_ops = &mlx5_dev_ops; 477771fa900SAdrien Mazarguil eth_dev->data->mac_addrs = priv->mac; 478198a3c33SNelio Laranjeiro TAILQ_INIT(ð_dev->link_intr_cbs); 479771fa900SAdrien Mazarguil 480771fa900SAdrien Mazarguil /* Bring Ethernet device up. */ 481771fa900SAdrien Mazarguil DEBUG("forcing Ethernet interface up"); 482771fa900SAdrien Mazarguil priv_set_flags(priv, ~IFF_UP, IFF_UP); 483771fa900SAdrien Mazarguil continue; 484771fa900SAdrien Mazarguil 485771fa900SAdrien Mazarguil port_error: 4862f97422eSNelio Laranjeiro rte_free(priv->rss_conf); 487771fa900SAdrien Mazarguil rte_free(priv); 488771fa900SAdrien Mazarguil if (pd) 489771fa900SAdrien Mazarguil claim_zero(ibv_dealloc_pd(pd)); 490771fa900SAdrien Mazarguil if (ctx) 491771fa900SAdrien Mazarguil claim_zero(ibv_close_device(ctx)); 492771fa900SAdrien Mazarguil break; 493771fa900SAdrien Mazarguil } 494771fa900SAdrien Mazarguil 495771fa900SAdrien Mazarguil /* 496771fa900SAdrien Mazarguil * XXX if something went wrong in the loop above, there is a resource 497771fa900SAdrien Mazarguil * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as 498771fa900SAdrien Mazarguil * long as the dpdk does not provide a way to deallocate a ethdev and a 499771fa900SAdrien Mazarguil * way to enumerate the registered ethdevs to free the previous ones. 500771fa900SAdrien Mazarguil */ 501771fa900SAdrien Mazarguil 502771fa900SAdrien Mazarguil /* no port found, complain */ 503771fa900SAdrien Mazarguil if (!mlx5_dev[idx].ports) { 504771fa900SAdrien Mazarguil err = ENODEV; 505771fa900SAdrien Mazarguil goto error; 506771fa900SAdrien Mazarguil } 507771fa900SAdrien Mazarguil 508771fa900SAdrien Mazarguil error: 509771fa900SAdrien Mazarguil if (attr_ctx) 510771fa900SAdrien Mazarguil claim_zero(ibv_close_device(attr_ctx)); 511771fa900SAdrien Mazarguil if (list) 512771fa900SAdrien Mazarguil ibv_free_device_list(list); 513771fa900SAdrien Mazarguil assert(err >= 0); 514771fa900SAdrien Mazarguil return -err; 515771fa900SAdrien Mazarguil } 516771fa900SAdrien Mazarguil 517771fa900SAdrien Mazarguil static const struct rte_pci_id mlx5_pci_id_map[] = { 518771fa900SAdrien Mazarguil { 519771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 520771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4, 521771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 522771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 523771fa900SAdrien Mazarguil }, 524771fa900SAdrien Mazarguil { 525771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 526771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4VF, 527771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 528771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 529771fa900SAdrien Mazarguil }, 530771fa900SAdrien Mazarguil { 531771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 532771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LX, 533771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 534771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 535771fa900SAdrien Mazarguil }, 536771fa900SAdrien Mazarguil { 537771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 538771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF, 539771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 540771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 541771fa900SAdrien Mazarguil }, 542771fa900SAdrien Mazarguil { 543771fa900SAdrien Mazarguil .vendor_id = 0 544771fa900SAdrien Mazarguil } 545771fa900SAdrien Mazarguil }; 546771fa900SAdrien Mazarguil 547771fa900SAdrien Mazarguil static struct eth_driver mlx5_driver = { 548771fa900SAdrien Mazarguil .pci_drv = { 549771fa900SAdrien Mazarguil .name = MLX5_DRIVER_NAME, 550771fa900SAdrien Mazarguil .id_table = mlx5_pci_id_map, 551771fa900SAdrien Mazarguil .devinit = mlx5_pci_devinit, 552198a3c33SNelio Laranjeiro .drv_flags = RTE_PCI_DRV_INTR_LSC, 553771fa900SAdrien Mazarguil }, 554771fa900SAdrien Mazarguil .dev_private_size = sizeof(struct priv) 555771fa900SAdrien Mazarguil }; 556771fa900SAdrien Mazarguil 557771fa900SAdrien Mazarguil /** 558771fa900SAdrien Mazarguil * Driver initialization routine. 559771fa900SAdrien Mazarguil */ 560771fa900SAdrien Mazarguil static int 561771fa900SAdrien Mazarguil rte_mlx5_pmd_init(const char *name, const char *args) 562771fa900SAdrien Mazarguil { 563771fa900SAdrien Mazarguil (void)name; 564771fa900SAdrien Mazarguil (void)args; 565771fa900SAdrien Mazarguil /* 566771fa900SAdrien Mazarguil * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use 567771fa900SAdrien Mazarguil * huge pages. Calling ibv_fork_init() during init allows 568771fa900SAdrien Mazarguil * applications to use fork() safely for purposes other than 569771fa900SAdrien Mazarguil * using this PMD, which is not supported in forked processes. 570771fa900SAdrien Mazarguil */ 571771fa900SAdrien Mazarguil setenv("RDMAV_HUGEPAGES_SAFE", "1", 1); 572771fa900SAdrien Mazarguil ibv_fork_init(); 573771fa900SAdrien Mazarguil rte_eal_pci_register(&mlx5_driver.pci_drv); 574771fa900SAdrien Mazarguil return 0; 575771fa900SAdrien Mazarguil } 576771fa900SAdrien Mazarguil 577771fa900SAdrien Mazarguil static struct rte_driver rte_mlx5_driver = { 578771fa900SAdrien Mazarguil .type = PMD_PDEV, 579771fa900SAdrien Mazarguil .name = MLX5_DRIVER_NAME, 580771fa900SAdrien Mazarguil .init = rte_mlx5_pmd_init, 581771fa900SAdrien Mazarguil }; 582771fa900SAdrien Mazarguil 583771fa900SAdrien Mazarguil PMD_REGISTER_DRIVER(rte_mlx5_driver) 584