1771fa900SAdrien Mazarguil /*- 2771fa900SAdrien Mazarguil * BSD LICENSE 3771fa900SAdrien Mazarguil * 4771fa900SAdrien Mazarguil * Copyright 2015 6WIND S.A. 5771fa900SAdrien Mazarguil * Copyright 2015 Mellanox. 6771fa900SAdrien Mazarguil * 7771fa900SAdrien Mazarguil * Redistribution and use in source and binary forms, with or without 8771fa900SAdrien Mazarguil * modification, are permitted provided that the following conditions 9771fa900SAdrien Mazarguil * are met: 10771fa900SAdrien Mazarguil * 11771fa900SAdrien Mazarguil * * Redistributions of source code must retain the above copyright 12771fa900SAdrien Mazarguil * notice, this list of conditions and the following disclaimer. 13771fa900SAdrien Mazarguil * * Redistributions in binary form must reproduce the above copyright 14771fa900SAdrien Mazarguil * notice, this list of conditions and the following disclaimer in 15771fa900SAdrien Mazarguil * the documentation and/or other materials provided with the 16771fa900SAdrien Mazarguil * distribution. 17771fa900SAdrien Mazarguil * * Neither the name of 6WIND S.A. nor the names of its 18771fa900SAdrien Mazarguil * contributors may be used to endorse or promote products derived 19771fa900SAdrien Mazarguil * from this software without specific prior written permission. 20771fa900SAdrien Mazarguil * 21771fa900SAdrien Mazarguil * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22771fa900SAdrien Mazarguil * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23771fa900SAdrien Mazarguil * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24771fa900SAdrien Mazarguil * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25771fa900SAdrien Mazarguil * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26771fa900SAdrien Mazarguil * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27771fa900SAdrien Mazarguil * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28771fa900SAdrien Mazarguil * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29771fa900SAdrien Mazarguil * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30771fa900SAdrien Mazarguil * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31771fa900SAdrien Mazarguil * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32771fa900SAdrien Mazarguil */ 33771fa900SAdrien Mazarguil 34771fa900SAdrien Mazarguil #include <stddef.h> 35771fa900SAdrien Mazarguil #include <unistd.h> 36771fa900SAdrien Mazarguil #include <string.h> 37771fa900SAdrien Mazarguil #include <assert.h> 38771fa900SAdrien Mazarguil #include <stdint.h> 39771fa900SAdrien Mazarguil #include <stdlib.h> 40771fa900SAdrien Mazarguil #include <net/if.h> 41771fa900SAdrien Mazarguil 42771fa900SAdrien Mazarguil /* Verbs header. */ 43771fa900SAdrien Mazarguil /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 44771fa900SAdrien Mazarguil #ifdef PEDANTIC 45771fa900SAdrien Mazarguil #pragma GCC diagnostic ignored "-pedantic" 46771fa900SAdrien Mazarguil #endif 47771fa900SAdrien Mazarguil #include <infiniband/verbs.h> 48771fa900SAdrien Mazarguil #ifdef PEDANTIC 49771fa900SAdrien Mazarguil #pragma GCC diagnostic error "-pedantic" 50771fa900SAdrien Mazarguil #endif 51771fa900SAdrien Mazarguil 52771fa900SAdrien Mazarguil /* DPDK headers don't like -pedantic. */ 53771fa900SAdrien Mazarguil #ifdef PEDANTIC 54771fa900SAdrien Mazarguil #pragma GCC diagnostic ignored "-pedantic" 55771fa900SAdrien Mazarguil #endif 56771fa900SAdrien Mazarguil #include <rte_malloc.h> 57771fa900SAdrien Mazarguil #include <rte_ethdev.h> 58771fa900SAdrien Mazarguil #include <rte_pci.h> 59771fa900SAdrien Mazarguil #include <rte_common.h> 60771fa900SAdrien Mazarguil #ifdef PEDANTIC 61771fa900SAdrien Mazarguil #pragma GCC diagnostic error "-pedantic" 62771fa900SAdrien Mazarguil #endif 63771fa900SAdrien Mazarguil 64771fa900SAdrien Mazarguil #include "mlx5.h" 65771fa900SAdrien Mazarguil #include "mlx5_utils.h" 662e22920bSAdrien Mazarguil #include "mlx5_rxtx.h" 67771fa900SAdrien Mazarguil #include "mlx5_autoconf.h" 68771fa900SAdrien Mazarguil 69771fa900SAdrien Mazarguil /** 70771fa900SAdrien Mazarguil * DPDK callback to close the device. 71771fa900SAdrien Mazarguil * 72771fa900SAdrien Mazarguil * Destroy all queues and objects, free memory. 73771fa900SAdrien Mazarguil * 74771fa900SAdrien Mazarguil * @param dev 75771fa900SAdrien Mazarguil * Pointer to Ethernet device structure. 76771fa900SAdrien Mazarguil */ 77771fa900SAdrien Mazarguil static void 78771fa900SAdrien Mazarguil mlx5_dev_close(struct rte_eth_dev *dev) 79771fa900SAdrien Mazarguil { 80771fa900SAdrien Mazarguil struct priv *priv = dev->data->dev_private; 812e22920bSAdrien Mazarguil void *tmp; 822e22920bSAdrien Mazarguil unsigned int i; 83771fa900SAdrien Mazarguil 84771fa900SAdrien Mazarguil priv_lock(priv); 85771fa900SAdrien Mazarguil DEBUG("%p: closing device \"%s\"", 86771fa900SAdrien Mazarguil (void *)dev, 87771fa900SAdrien Mazarguil ((priv->ctx != NULL) ? priv->ctx->device->name : "")); 882e22920bSAdrien Mazarguil /* Prevent crashes when queues are still in use. */ 892e22920bSAdrien Mazarguil dev->rx_pkt_burst = removed_rx_burst; 902e22920bSAdrien Mazarguil dev->tx_pkt_burst = removed_tx_burst; 912e22920bSAdrien Mazarguil if (priv->rxqs != NULL) { 922e22920bSAdrien Mazarguil /* XXX race condition if mlx5_rx_burst() is still running. */ 932e22920bSAdrien Mazarguil usleep(1000); 942e22920bSAdrien Mazarguil for (i = 0; (i != priv->rxqs_n); ++i) { 952e22920bSAdrien Mazarguil tmp = (*priv->rxqs)[i]; 962e22920bSAdrien Mazarguil if (tmp == NULL) 972e22920bSAdrien Mazarguil continue; 982e22920bSAdrien Mazarguil (*priv->rxqs)[i] = NULL; 992e22920bSAdrien Mazarguil rxq_cleanup(tmp); 1002e22920bSAdrien Mazarguil rte_free(tmp); 1012e22920bSAdrien Mazarguil } 1022e22920bSAdrien Mazarguil priv->rxqs_n = 0; 1032e22920bSAdrien Mazarguil priv->rxqs = NULL; 1042e22920bSAdrien Mazarguil } 1052e22920bSAdrien Mazarguil if (priv->txqs != NULL) { 1062e22920bSAdrien Mazarguil /* XXX race condition if mlx5_tx_burst() is still running. */ 1072e22920bSAdrien Mazarguil usleep(1000); 1082e22920bSAdrien Mazarguil for (i = 0; (i != priv->txqs_n); ++i) { 1092e22920bSAdrien Mazarguil tmp = (*priv->txqs)[i]; 1102e22920bSAdrien Mazarguil if (tmp == NULL) 1112e22920bSAdrien Mazarguil continue; 1122e22920bSAdrien Mazarguil (*priv->txqs)[i] = NULL; 1132e22920bSAdrien Mazarguil txq_cleanup(tmp); 1142e22920bSAdrien Mazarguil rte_free(tmp); 1152e22920bSAdrien Mazarguil } 1162e22920bSAdrien Mazarguil priv->txqs_n = 0; 1172e22920bSAdrien Mazarguil priv->txqs = NULL; 1182e22920bSAdrien Mazarguil } 1192e22920bSAdrien Mazarguil if (priv->rss) 1202e22920bSAdrien Mazarguil rxq_cleanup(&priv->rxq_parent); 121771fa900SAdrien Mazarguil if (priv->pd != NULL) { 122771fa900SAdrien Mazarguil assert(priv->ctx != NULL); 123771fa900SAdrien Mazarguil claim_zero(ibv_dealloc_pd(priv->pd)); 124771fa900SAdrien Mazarguil claim_zero(ibv_close_device(priv->ctx)); 125771fa900SAdrien Mazarguil } else 126771fa900SAdrien Mazarguil assert(priv->ctx == NULL); 127771fa900SAdrien Mazarguil priv_unlock(priv); 128771fa900SAdrien Mazarguil memset(priv, 0, sizeof(*priv)); 129771fa900SAdrien Mazarguil } 130771fa900SAdrien Mazarguil 131771fa900SAdrien Mazarguil static const struct eth_dev_ops mlx5_dev_ops = { 132e60fbd5bSAdrien Mazarguil .dev_configure = mlx5_dev_configure, 133e60fbd5bSAdrien Mazarguil .dev_start = mlx5_dev_start, 134e60fbd5bSAdrien Mazarguil .dev_stop = mlx5_dev_stop, 135771fa900SAdrien Mazarguil .dev_close = mlx5_dev_close, 136*1bdbe1afSAdrien Mazarguil .promiscuous_enable = mlx5_promiscuous_enable, 137*1bdbe1afSAdrien Mazarguil .promiscuous_disable = mlx5_promiscuous_disable, 138*1bdbe1afSAdrien Mazarguil .allmulticast_enable = mlx5_allmulticast_enable, 139*1bdbe1afSAdrien Mazarguil .allmulticast_disable = mlx5_allmulticast_disable, 14087011737SAdrien Mazarguil .stats_get = mlx5_stats_get, 14187011737SAdrien Mazarguil .stats_reset = mlx5_stats_reset, 142e60fbd5bSAdrien Mazarguil .dev_infos_get = mlx5_dev_infos_get, 1432e22920bSAdrien Mazarguil .rx_queue_setup = mlx5_rx_queue_setup, 1442e22920bSAdrien Mazarguil .tx_queue_setup = mlx5_tx_queue_setup, 1452e22920bSAdrien Mazarguil .rx_queue_release = mlx5_rx_queue_release, 1462e22920bSAdrien Mazarguil .tx_queue_release = mlx5_tx_queue_release, 1473318aef7SAdrien Mazarguil .mac_addr_remove = mlx5_mac_addr_remove, 1483318aef7SAdrien Mazarguil .mac_addr_add = mlx5_mac_addr_add, 149cf37ca95SAdrien Mazarguil .mtu_set = mlx5_dev_set_mtu, 150771fa900SAdrien Mazarguil }; 151771fa900SAdrien Mazarguil 152771fa900SAdrien Mazarguil static struct { 153771fa900SAdrien Mazarguil struct rte_pci_addr pci_addr; /* associated PCI address */ 154771fa900SAdrien Mazarguil uint32_t ports; /* physical ports bitfield. */ 155771fa900SAdrien Mazarguil } mlx5_dev[32]; 156771fa900SAdrien Mazarguil 157771fa900SAdrien Mazarguil /** 158771fa900SAdrien Mazarguil * Get device index in mlx5_dev[] from PCI bus address. 159771fa900SAdrien Mazarguil * 160771fa900SAdrien Mazarguil * @param[in] pci_addr 161771fa900SAdrien Mazarguil * PCI bus address to look for. 162771fa900SAdrien Mazarguil * 163771fa900SAdrien Mazarguil * @return 164771fa900SAdrien Mazarguil * mlx5_dev[] index on success, -1 on failure. 165771fa900SAdrien Mazarguil */ 166771fa900SAdrien Mazarguil static int 167771fa900SAdrien Mazarguil mlx5_dev_idx(struct rte_pci_addr *pci_addr) 168771fa900SAdrien Mazarguil { 169771fa900SAdrien Mazarguil unsigned int i; 170771fa900SAdrien Mazarguil int ret = -1; 171771fa900SAdrien Mazarguil 172771fa900SAdrien Mazarguil assert(pci_addr != NULL); 173771fa900SAdrien Mazarguil for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) { 174771fa900SAdrien Mazarguil if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) && 175771fa900SAdrien Mazarguil (mlx5_dev[i].pci_addr.bus == pci_addr->bus) && 176771fa900SAdrien Mazarguil (mlx5_dev[i].pci_addr.devid == pci_addr->devid) && 177771fa900SAdrien Mazarguil (mlx5_dev[i].pci_addr.function == pci_addr->function)) 178771fa900SAdrien Mazarguil return i; 179771fa900SAdrien Mazarguil if ((mlx5_dev[i].ports == 0) && (ret == -1)) 180771fa900SAdrien Mazarguil ret = i; 181771fa900SAdrien Mazarguil } 182771fa900SAdrien Mazarguil return ret; 183771fa900SAdrien Mazarguil } 184771fa900SAdrien Mazarguil 185771fa900SAdrien Mazarguil static struct eth_driver mlx5_driver; 186771fa900SAdrien Mazarguil 187771fa900SAdrien Mazarguil /** 188771fa900SAdrien Mazarguil * DPDK callback to register a PCI device. 189771fa900SAdrien Mazarguil * 190771fa900SAdrien Mazarguil * This function creates an Ethernet device for each port of a given 191771fa900SAdrien Mazarguil * PCI device. 192771fa900SAdrien Mazarguil * 193771fa900SAdrien Mazarguil * @param[in] pci_drv 194771fa900SAdrien Mazarguil * PCI driver structure (mlx5_driver). 195771fa900SAdrien Mazarguil * @param[in] pci_dev 196771fa900SAdrien Mazarguil * PCI device information. 197771fa900SAdrien Mazarguil * 198771fa900SAdrien Mazarguil * @return 199771fa900SAdrien Mazarguil * 0 on success, negative errno value on failure. 200771fa900SAdrien Mazarguil */ 201771fa900SAdrien Mazarguil static int 202771fa900SAdrien Mazarguil mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) 203771fa900SAdrien Mazarguil { 204771fa900SAdrien Mazarguil struct ibv_device **list; 205771fa900SAdrien Mazarguil struct ibv_device *ibv_dev; 206771fa900SAdrien Mazarguil int err = 0; 207771fa900SAdrien Mazarguil struct ibv_context *attr_ctx = NULL; 208771fa900SAdrien Mazarguil struct ibv_device_attr device_attr; 209771fa900SAdrien Mazarguil unsigned int vf; 210771fa900SAdrien Mazarguil int idx; 211771fa900SAdrien Mazarguil int i; 212771fa900SAdrien Mazarguil 213771fa900SAdrien Mazarguil (void)pci_drv; 214771fa900SAdrien Mazarguil assert(pci_drv == &mlx5_driver.pci_drv); 215771fa900SAdrien Mazarguil /* Get mlx5_dev[] index. */ 216771fa900SAdrien Mazarguil idx = mlx5_dev_idx(&pci_dev->addr); 217771fa900SAdrien Mazarguil if (idx == -1) { 218771fa900SAdrien Mazarguil ERROR("this driver cannot support any more adapters"); 219771fa900SAdrien Mazarguil return -ENOMEM; 220771fa900SAdrien Mazarguil } 221771fa900SAdrien Mazarguil DEBUG("using driver device index %d", idx); 222771fa900SAdrien Mazarguil 223771fa900SAdrien Mazarguil /* Save PCI address. */ 224771fa900SAdrien Mazarguil mlx5_dev[idx].pci_addr = pci_dev->addr; 225771fa900SAdrien Mazarguil list = ibv_get_device_list(&i); 226771fa900SAdrien Mazarguil if (list == NULL) { 227771fa900SAdrien Mazarguil assert(errno); 228771fa900SAdrien Mazarguil if (errno == ENOSYS) { 229771fa900SAdrien Mazarguil WARN("cannot list devices, is ib_uverbs loaded?"); 230771fa900SAdrien Mazarguil return 0; 231771fa900SAdrien Mazarguil } 232771fa900SAdrien Mazarguil return -errno; 233771fa900SAdrien Mazarguil } 234771fa900SAdrien Mazarguil assert(i >= 0); 235771fa900SAdrien Mazarguil /* 236771fa900SAdrien Mazarguil * For each listed device, check related sysfs entry against 237771fa900SAdrien Mazarguil * the provided PCI ID. 238771fa900SAdrien Mazarguil */ 239771fa900SAdrien Mazarguil while (i != 0) { 240771fa900SAdrien Mazarguil struct rte_pci_addr pci_addr; 241771fa900SAdrien Mazarguil 242771fa900SAdrien Mazarguil --i; 243771fa900SAdrien Mazarguil DEBUG("checking device \"%s\"", list[i]->name); 244771fa900SAdrien Mazarguil if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr)) 245771fa900SAdrien Mazarguil continue; 246771fa900SAdrien Mazarguil if ((pci_dev->addr.domain != pci_addr.domain) || 247771fa900SAdrien Mazarguil (pci_dev->addr.bus != pci_addr.bus) || 248771fa900SAdrien Mazarguil (pci_dev->addr.devid != pci_addr.devid) || 249771fa900SAdrien Mazarguil (pci_dev->addr.function != pci_addr.function)) 250771fa900SAdrien Mazarguil continue; 251771fa900SAdrien Mazarguil vf = ((pci_dev->id.device_id == 252771fa900SAdrien Mazarguil PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) || 253771fa900SAdrien Mazarguil (pci_dev->id.device_id == 254771fa900SAdrien Mazarguil PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)); 255771fa900SAdrien Mazarguil INFO("PCI information matches, using device \"%s\" (VF: %s)", 256771fa900SAdrien Mazarguil list[i]->name, (vf ? "true" : "false")); 257771fa900SAdrien Mazarguil attr_ctx = ibv_open_device(list[i]); 258771fa900SAdrien Mazarguil err = errno; 259771fa900SAdrien Mazarguil break; 260771fa900SAdrien Mazarguil } 261771fa900SAdrien Mazarguil if (attr_ctx == NULL) { 262771fa900SAdrien Mazarguil ibv_free_device_list(list); 263771fa900SAdrien Mazarguil switch (err) { 264771fa900SAdrien Mazarguil case 0: 265771fa900SAdrien Mazarguil WARN("cannot access device, is mlx5_ib loaded?"); 266771fa900SAdrien Mazarguil return 0; 267771fa900SAdrien Mazarguil case EINVAL: 268771fa900SAdrien Mazarguil WARN("cannot use device, are drivers up to date?"); 269771fa900SAdrien Mazarguil return 0; 270771fa900SAdrien Mazarguil } 271771fa900SAdrien Mazarguil assert(err > 0); 272771fa900SAdrien Mazarguil return -err; 273771fa900SAdrien Mazarguil } 274771fa900SAdrien Mazarguil ibv_dev = list[i]; 275771fa900SAdrien Mazarguil 276771fa900SAdrien Mazarguil DEBUG("device opened"); 277771fa900SAdrien Mazarguil if (ibv_query_device(attr_ctx, &device_attr)) 278771fa900SAdrien Mazarguil goto error; 279771fa900SAdrien Mazarguil INFO("%u port(s) detected", device_attr.phys_port_cnt); 280771fa900SAdrien Mazarguil 281771fa900SAdrien Mazarguil for (i = 0; i < device_attr.phys_port_cnt; i++) { 282771fa900SAdrien Mazarguil uint32_t port = i + 1; /* ports are indexed from one */ 283771fa900SAdrien Mazarguil uint32_t test = (1 << i); 284771fa900SAdrien Mazarguil struct ibv_context *ctx = NULL; 285771fa900SAdrien Mazarguil struct ibv_port_attr port_attr; 286771fa900SAdrien Mazarguil struct ibv_pd *pd = NULL; 287771fa900SAdrien Mazarguil struct priv *priv = NULL; 288771fa900SAdrien Mazarguil struct rte_eth_dev *eth_dev; 289771fa900SAdrien Mazarguil #ifdef HAVE_EXP_QUERY_DEVICE 290771fa900SAdrien Mazarguil struct ibv_exp_device_attr exp_device_attr; 291771fa900SAdrien Mazarguil #endif /* HAVE_EXP_QUERY_DEVICE */ 292771fa900SAdrien Mazarguil struct ether_addr mac; 293771fa900SAdrien Mazarguil 294771fa900SAdrien Mazarguil #ifdef HAVE_EXP_QUERY_DEVICE 295771fa900SAdrien Mazarguil exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS; 296771fa900SAdrien Mazarguil #ifdef RSS_SUPPORT 297771fa900SAdrien Mazarguil exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ; 298771fa900SAdrien Mazarguil #endif /* RSS_SUPPORT */ 299771fa900SAdrien Mazarguil #endif /* HAVE_EXP_QUERY_DEVICE */ 300771fa900SAdrien Mazarguil 301771fa900SAdrien Mazarguil DEBUG("using port %u (%08" PRIx32 ")", port, test); 302771fa900SAdrien Mazarguil 303771fa900SAdrien Mazarguil ctx = ibv_open_device(ibv_dev); 304771fa900SAdrien Mazarguil if (ctx == NULL) 305771fa900SAdrien Mazarguil goto port_error; 306771fa900SAdrien Mazarguil 307771fa900SAdrien Mazarguil /* Check port status. */ 308771fa900SAdrien Mazarguil err = ibv_query_port(ctx, port, &port_attr); 309771fa900SAdrien Mazarguil if (err) { 310771fa900SAdrien Mazarguil ERROR("port query failed: %s", strerror(err)); 311771fa900SAdrien Mazarguil goto port_error; 312771fa900SAdrien Mazarguil } 313771fa900SAdrien Mazarguil if (port_attr.state != IBV_PORT_ACTIVE) 314771fa900SAdrien Mazarguil DEBUG("port %d is not active: \"%s\" (%d)", 315771fa900SAdrien Mazarguil port, ibv_port_state_str(port_attr.state), 316771fa900SAdrien Mazarguil port_attr.state); 317771fa900SAdrien Mazarguil 318771fa900SAdrien Mazarguil /* Allocate protection domain. */ 319771fa900SAdrien Mazarguil pd = ibv_alloc_pd(ctx); 320771fa900SAdrien Mazarguil if (pd == NULL) { 321771fa900SAdrien Mazarguil ERROR("PD allocation failure"); 322771fa900SAdrien Mazarguil err = ENOMEM; 323771fa900SAdrien Mazarguil goto port_error; 324771fa900SAdrien Mazarguil } 325771fa900SAdrien Mazarguil 326771fa900SAdrien Mazarguil mlx5_dev[idx].ports |= test; 327771fa900SAdrien Mazarguil 328771fa900SAdrien Mazarguil /* from rte_ethdev.c */ 329771fa900SAdrien Mazarguil priv = rte_zmalloc("ethdev private structure", 330771fa900SAdrien Mazarguil sizeof(*priv), 331771fa900SAdrien Mazarguil RTE_CACHE_LINE_SIZE); 332771fa900SAdrien Mazarguil if (priv == NULL) { 333771fa900SAdrien Mazarguil ERROR("priv allocation failure"); 334771fa900SAdrien Mazarguil err = ENOMEM; 335771fa900SAdrien Mazarguil goto port_error; 336771fa900SAdrien Mazarguil } 337771fa900SAdrien Mazarguil 338771fa900SAdrien Mazarguil priv->ctx = ctx; 339771fa900SAdrien Mazarguil priv->device_attr = device_attr; 340771fa900SAdrien Mazarguil priv->port = port; 341771fa900SAdrien Mazarguil priv->pd = pd; 342771fa900SAdrien Mazarguil priv->mtu = ETHER_MTU; 343771fa900SAdrien Mazarguil #ifdef HAVE_EXP_QUERY_DEVICE 344771fa900SAdrien Mazarguil if (ibv_exp_query_device(ctx, &exp_device_attr)) { 345771fa900SAdrien Mazarguil ERROR("ibv_exp_query_device() failed"); 346771fa900SAdrien Mazarguil goto port_error; 347771fa900SAdrien Mazarguil } 348771fa900SAdrien Mazarguil #ifdef RSS_SUPPORT 349771fa900SAdrien Mazarguil if ((exp_device_attr.exp_device_cap_flags & 350771fa900SAdrien Mazarguil IBV_EXP_DEVICE_QPG) && 351771fa900SAdrien Mazarguil (exp_device_attr.exp_device_cap_flags & 352771fa900SAdrien Mazarguil IBV_EXP_DEVICE_UD_RSS) && 353771fa900SAdrien Mazarguil (exp_device_attr.comp_mask & 354771fa900SAdrien Mazarguil IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) && 355771fa900SAdrien Mazarguil (exp_device_attr.max_rss_tbl_sz > 0)) { 356771fa900SAdrien Mazarguil priv->hw_qpg = 1; 357771fa900SAdrien Mazarguil priv->hw_rss = 1; 358771fa900SAdrien Mazarguil priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz; 359771fa900SAdrien Mazarguil } else { 360771fa900SAdrien Mazarguil priv->hw_qpg = 0; 361771fa900SAdrien Mazarguil priv->hw_rss = 0; 362771fa900SAdrien Mazarguil priv->max_rss_tbl_sz = 0; 363771fa900SAdrien Mazarguil } 364771fa900SAdrien Mazarguil priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags & 365771fa900SAdrien Mazarguil IBV_EXP_DEVICE_UD_TSS); 366771fa900SAdrien Mazarguil DEBUG("device flags: %s%s%s", 367771fa900SAdrien Mazarguil (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""), 368771fa900SAdrien Mazarguil (priv->hw_tss ? "IBV_DEVICE_TSS " : ""), 369771fa900SAdrien Mazarguil (priv->hw_rss ? "IBV_DEVICE_RSS " : "")); 370771fa900SAdrien Mazarguil if (priv->hw_rss) 371771fa900SAdrien Mazarguil DEBUG("maximum RSS indirection table size: %u", 372771fa900SAdrien Mazarguil exp_device_attr.max_rss_tbl_sz); 373771fa900SAdrien Mazarguil #endif /* RSS_SUPPORT */ 374771fa900SAdrien Mazarguil 375771fa900SAdrien Mazarguil priv->hw_csum = 376771fa900SAdrien Mazarguil ((exp_device_attr.exp_device_cap_flags & 377771fa900SAdrien Mazarguil IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) && 378771fa900SAdrien Mazarguil (exp_device_attr.exp_device_cap_flags & 379771fa900SAdrien Mazarguil IBV_EXP_DEVICE_RX_CSUM_IP_PKT)); 380771fa900SAdrien Mazarguil DEBUG("checksum offloading is %ssupported", 381771fa900SAdrien Mazarguil (priv->hw_csum ? "" : "not ")); 382771fa900SAdrien Mazarguil 383771fa900SAdrien Mazarguil priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags & 384771fa900SAdrien Mazarguil IBV_EXP_DEVICE_VXLAN_SUPPORT); 385771fa900SAdrien Mazarguil DEBUG("L2 tunnel checksum offloads are %ssupported", 386771fa900SAdrien Mazarguil (priv->hw_csum_l2tun ? "" : "not ")); 387771fa900SAdrien Mazarguil 388771fa900SAdrien Mazarguil #endif /* HAVE_EXP_QUERY_DEVICE */ 389771fa900SAdrien Mazarguil 390771fa900SAdrien Mazarguil priv->vf = vf; 391771fa900SAdrien Mazarguil /* Configure the first MAC address by default. */ 392771fa900SAdrien Mazarguil if (priv_get_mac(priv, &mac.addr_bytes)) { 393771fa900SAdrien Mazarguil ERROR("cannot get MAC address, is mlx5_en loaded?" 394771fa900SAdrien Mazarguil " (errno: %s)", strerror(errno)); 395771fa900SAdrien Mazarguil goto port_error; 396771fa900SAdrien Mazarguil } 397771fa900SAdrien Mazarguil INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 398771fa900SAdrien Mazarguil priv->port, 399771fa900SAdrien Mazarguil mac.addr_bytes[0], mac.addr_bytes[1], 400771fa900SAdrien Mazarguil mac.addr_bytes[2], mac.addr_bytes[3], 401771fa900SAdrien Mazarguil mac.addr_bytes[4], mac.addr_bytes[5]); 402771fa900SAdrien Mazarguil /* Register MAC and broadcast addresses. */ 403771fa900SAdrien Mazarguil claim_zero(priv_mac_addr_add(priv, 0, 404771fa900SAdrien Mazarguil (const uint8_t (*)[ETHER_ADDR_LEN]) 405771fa900SAdrien Mazarguil mac.addr_bytes)); 4063318aef7SAdrien Mazarguil claim_zero(priv_mac_addr_add(priv, (RTE_DIM(priv->mac) - 1), 407771fa900SAdrien Mazarguil &(const uint8_t [ETHER_ADDR_LEN]) 408771fa900SAdrien Mazarguil { "\xff\xff\xff\xff\xff\xff" })); 409771fa900SAdrien Mazarguil #ifndef NDEBUG 410771fa900SAdrien Mazarguil { 411771fa900SAdrien Mazarguil char ifname[IF_NAMESIZE]; 412771fa900SAdrien Mazarguil 413771fa900SAdrien Mazarguil if (priv_get_ifname(priv, &ifname) == 0) 414771fa900SAdrien Mazarguil DEBUG("port %u ifname is \"%s\"", 415771fa900SAdrien Mazarguil priv->port, ifname); 416771fa900SAdrien Mazarguil else 417771fa900SAdrien Mazarguil DEBUG("port %u ifname is unknown", priv->port); 418771fa900SAdrien Mazarguil } 419771fa900SAdrien Mazarguil #endif 420771fa900SAdrien Mazarguil /* Get actual MTU if possible. */ 421771fa900SAdrien Mazarguil priv_get_mtu(priv, &priv->mtu); 422771fa900SAdrien Mazarguil DEBUG("port %u MTU is %u", priv->port, priv->mtu); 423771fa900SAdrien Mazarguil 424771fa900SAdrien Mazarguil /* from rte_ethdev.c */ 425771fa900SAdrien Mazarguil { 426771fa900SAdrien Mazarguil char name[RTE_ETH_NAME_MAX_LEN]; 427771fa900SAdrien Mazarguil 428771fa900SAdrien Mazarguil snprintf(name, sizeof(name), "%s port %u", 429771fa900SAdrien Mazarguil ibv_get_device_name(ibv_dev), port); 430771fa900SAdrien Mazarguil eth_dev = rte_eth_dev_allocate(name, RTE_ETH_DEV_PCI); 431771fa900SAdrien Mazarguil } 432771fa900SAdrien Mazarguil if (eth_dev == NULL) { 433771fa900SAdrien Mazarguil ERROR("can not allocate rte ethdev"); 434771fa900SAdrien Mazarguil err = ENOMEM; 435771fa900SAdrien Mazarguil goto port_error; 436771fa900SAdrien Mazarguil } 437771fa900SAdrien Mazarguil 438771fa900SAdrien Mazarguil eth_dev->data->dev_private = priv; 439771fa900SAdrien Mazarguil eth_dev->pci_dev = pci_dev; 440771fa900SAdrien Mazarguil eth_dev->driver = &mlx5_driver; 441771fa900SAdrien Mazarguil eth_dev->data->rx_mbuf_alloc_failed = 0; 442771fa900SAdrien Mazarguil eth_dev->data->mtu = ETHER_MTU; 443771fa900SAdrien Mazarguil 444771fa900SAdrien Mazarguil priv->dev = eth_dev; 445771fa900SAdrien Mazarguil eth_dev->dev_ops = &mlx5_dev_ops; 446771fa900SAdrien Mazarguil eth_dev->data->mac_addrs = priv->mac; 447771fa900SAdrien Mazarguil 448771fa900SAdrien Mazarguil /* Bring Ethernet device up. */ 449771fa900SAdrien Mazarguil DEBUG("forcing Ethernet interface up"); 450771fa900SAdrien Mazarguil priv_set_flags(priv, ~IFF_UP, IFF_UP); 451771fa900SAdrien Mazarguil continue; 452771fa900SAdrien Mazarguil 453771fa900SAdrien Mazarguil port_error: 454771fa900SAdrien Mazarguil rte_free(priv); 455771fa900SAdrien Mazarguil if (pd) 456771fa900SAdrien Mazarguil claim_zero(ibv_dealloc_pd(pd)); 457771fa900SAdrien Mazarguil if (ctx) 458771fa900SAdrien Mazarguil claim_zero(ibv_close_device(ctx)); 459771fa900SAdrien Mazarguil break; 460771fa900SAdrien Mazarguil } 461771fa900SAdrien Mazarguil 462771fa900SAdrien Mazarguil /* 463771fa900SAdrien Mazarguil * XXX if something went wrong in the loop above, there is a resource 464771fa900SAdrien Mazarguil * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as 465771fa900SAdrien Mazarguil * long as the dpdk does not provide a way to deallocate a ethdev and a 466771fa900SAdrien Mazarguil * way to enumerate the registered ethdevs to free the previous ones. 467771fa900SAdrien Mazarguil */ 468771fa900SAdrien Mazarguil 469771fa900SAdrien Mazarguil /* no port found, complain */ 470771fa900SAdrien Mazarguil if (!mlx5_dev[idx].ports) { 471771fa900SAdrien Mazarguil err = ENODEV; 472771fa900SAdrien Mazarguil goto error; 473771fa900SAdrien Mazarguil } 474771fa900SAdrien Mazarguil 475771fa900SAdrien Mazarguil error: 476771fa900SAdrien Mazarguil if (attr_ctx) 477771fa900SAdrien Mazarguil claim_zero(ibv_close_device(attr_ctx)); 478771fa900SAdrien Mazarguil if (list) 479771fa900SAdrien Mazarguil ibv_free_device_list(list); 480771fa900SAdrien Mazarguil assert(err >= 0); 481771fa900SAdrien Mazarguil return -err; 482771fa900SAdrien Mazarguil } 483771fa900SAdrien Mazarguil 484771fa900SAdrien Mazarguil static const struct rte_pci_id mlx5_pci_id_map[] = { 485771fa900SAdrien Mazarguil { 486771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 487771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4, 488771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 489771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 490771fa900SAdrien Mazarguil }, 491771fa900SAdrien Mazarguil { 492771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 493771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4VF, 494771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 495771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 496771fa900SAdrien Mazarguil }, 497771fa900SAdrien Mazarguil { 498771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 499771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LX, 500771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 501771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 502771fa900SAdrien Mazarguil }, 503771fa900SAdrien Mazarguil { 504771fa900SAdrien Mazarguil .vendor_id = PCI_VENDOR_ID_MELLANOX, 505771fa900SAdrien Mazarguil .device_id = PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF, 506771fa900SAdrien Mazarguil .subsystem_vendor_id = PCI_ANY_ID, 507771fa900SAdrien Mazarguil .subsystem_device_id = PCI_ANY_ID 508771fa900SAdrien Mazarguil }, 509771fa900SAdrien Mazarguil { 510771fa900SAdrien Mazarguil .vendor_id = 0 511771fa900SAdrien Mazarguil } 512771fa900SAdrien Mazarguil }; 513771fa900SAdrien Mazarguil 514771fa900SAdrien Mazarguil static struct eth_driver mlx5_driver = { 515771fa900SAdrien Mazarguil .pci_drv = { 516771fa900SAdrien Mazarguil .name = MLX5_DRIVER_NAME, 517771fa900SAdrien Mazarguil .id_table = mlx5_pci_id_map, 518771fa900SAdrien Mazarguil .devinit = mlx5_pci_devinit, 519771fa900SAdrien Mazarguil }, 520771fa900SAdrien Mazarguil .dev_private_size = sizeof(struct priv) 521771fa900SAdrien Mazarguil }; 522771fa900SAdrien Mazarguil 523771fa900SAdrien Mazarguil /** 524771fa900SAdrien Mazarguil * Driver initialization routine. 525771fa900SAdrien Mazarguil */ 526771fa900SAdrien Mazarguil static int 527771fa900SAdrien Mazarguil rte_mlx5_pmd_init(const char *name, const char *args) 528771fa900SAdrien Mazarguil { 529771fa900SAdrien Mazarguil (void)name; 530771fa900SAdrien Mazarguil (void)args; 531771fa900SAdrien Mazarguil /* 532771fa900SAdrien Mazarguil * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use 533771fa900SAdrien Mazarguil * huge pages. Calling ibv_fork_init() during init allows 534771fa900SAdrien Mazarguil * applications to use fork() safely for purposes other than 535771fa900SAdrien Mazarguil * using this PMD, which is not supported in forked processes. 536771fa900SAdrien Mazarguil */ 537771fa900SAdrien Mazarguil setenv("RDMAV_HUGEPAGES_SAFE", "1", 1); 538771fa900SAdrien Mazarguil ibv_fork_init(); 539771fa900SAdrien Mazarguil rte_eal_pci_register(&mlx5_driver.pci_drv); 540771fa900SAdrien Mazarguil return 0; 541771fa900SAdrien Mazarguil } 542771fa900SAdrien Mazarguil 543771fa900SAdrien Mazarguil static struct rte_driver rte_mlx5_driver = { 544771fa900SAdrien Mazarguil .type = PMD_PDEV, 545771fa900SAdrien Mazarguil .name = MLX5_DRIVER_NAME, 546771fa900SAdrien Mazarguil .init = rte_mlx5_pmd_init, 547771fa900SAdrien Mazarguil }; 548771fa900SAdrien Mazarguil 549771fa900SAdrien Mazarguil PMD_REGISTER_DRIVER(rte_mlx5_driver) 550