1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <stddef.h> 6 #include <errno.h> 7 #include <stdbool.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <unistd.h> 11 #include <inttypes.h> 12 #include <sys/queue.h> 13 14 #include "mlx5_autoconf.h" 15 16 #include <rte_mbuf.h> 17 #include <rte_malloc.h> 18 #include <rte_ethdev_driver.h> 19 #include <rte_common.h> 20 21 #include <mlx5_glue.h> 22 #include <mlx5_common.h> 23 #include <mlx5_common_mr.h> 24 #include <mlx5_rxtx.h> 25 #include <mlx5_verbs.h> 26 #include <mlx5_utils.h> 27 #include <mlx5_malloc.h> 28 29 /** 30 * Register mr. Given protection domain pointer, pointer to addr and length 31 * register the memory region. 32 * 33 * @param[in] pd 34 * Pointer to protection domain context. 35 * @param[in] addr 36 * Pointer to memory start address. 37 * @param[in] length 38 * Length of the memory to register. 39 * @param[out] pmd_mr 40 * pmd_mr struct set with lkey, address, length and pointer to mr object 41 * 42 * @return 43 * 0 on successful registration, -1 otherwise 44 */ 45 static int 46 mlx5_reg_mr(void *pd, void *addr, size_t length, 47 struct mlx5_pmd_mr *pmd_mr) 48 { 49 return mlx5_common_verbs_reg_mr(pd, addr, length, pmd_mr); 50 } 51 52 /** 53 * Deregister mr. Given the mlx5 pmd MR - deregister the MR 54 * 55 * @param[in] pmd_mr 56 * pmd_mr struct set with lkey, address, length and pointer to mr object 57 * 58 */ 59 static void 60 mlx5_dereg_mr(struct mlx5_pmd_mr *pmd_mr) 61 { 62 mlx5_common_verbs_dereg_mr(pmd_mr); 63 } 64 65 /* verbs operations. */ 66 const struct mlx5_verbs_ops mlx5_verbs_ops = { 67 .reg_mr = mlx5_reg_mr, 68 .dereg_mr = mlx5_dereg_mr, 69 }; 70 71 /** 72 * Modify Rx WQ vlan stripping offload 73 * 74 * @param rxq_obj 75 * Rx queue object. 76 * 77 * @return 0 on success, non-0 otherwise 78 */ 79 static int 80 mlx5_rxq_obj_modify_wq_vlan_strip(struct mlx5_rxq_obj *rxq_obj, int on) 81 { 82 uint16_t vlan_offloads = 83 (on ? IBV_WQ_FLAGS_CVLAN_STRIPPING : 0) | 84 0; 85 struct ibv_wq_attr mod; 86 mod = (struct ibv_wq_attr){ 87 .attr_mask = IBV_WQ_ATTR_FLAGS, 88 .flags_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING, 89 .flags = vlan_offloads, 90 }; 91 92 return mlx5_glue->modify_wq(rxq_obj->wq, &mod); 93 } 94 95 /** 96 * Modifies the attributes for the specified WQ. 97 * 98 * @param rxq_obj 99 * Verbs Rx queue object. 100 * 101 * @return 102 * 0 on success, a negative errno value otherwise and rte_errno is set. 103 */ 104 static int 105 mlx5_ibv_modify_wq(struct mlx5_rxq_obj *rxq_obj, bool is_start) 106 { 107 struct ibv_wq_attr mod = { 108 .attr_mask = IBV_WQ_ATTR_STATE, 109 .wq_state = is_start ? IBV_WQS_RDY : IBV_WQS_RESET, 110 }; 111 112 return mlx5_glue->modify_wq(rxq_obj->wq, &mod); 113 } 114 115 /** 116 * Create a CQ Verbs object. 117 * 118 * @param dev 119 * Pointer to Ethernet device. 120 * @param idx 121 * Queue index in DPDK Rx queue array. 122 * 123 * @return 124 * The Verbs CQ object initialized, NULL otherwise and rte_errno is set. 125 */ 126 static struct ibv_cq * 127 mlx5_rxq_ibv_cq_create(struct rte_eth_dev *dev, uint16_t idx) 128 { 129 struct mlx5_priv *priv = dev->data->dev_private; 130 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx]; 131 struct mlx5_rxq_ctrl *rxq_ctrl = 132 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); 133 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl->obj; 134 unsigned int cqe_n = mlx5_rxq_cqe_num(rxq_data); 135 struct { 136 struct ibv_cq_init_attr_ex ibv; 137 struct mlx5dv_cq_init_attr mlx5; 138 } cq_attr; 139 140 cq_attr.ibv = (struct ibv_cq_init_attr_ex){ 141 .cqe = cqe_n, 142 .channel = rxq_obj->ibv_channel, 143 .comp_mask = 0, 144 }; 145 cq_attr.mlx5 = (struct mlx5dv_cq_init_attr){ 146 .comp_mask = 0, 147 }; 148 if (priv->config.cqe_comp && !rxq_data->hw_timestamp) { 149 cq_attr.mlx5.comp_mask |= 150 MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE; 151 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 152 cq_attr.mlx5.cqe_comp_res_format = 153 mlx5_rxq_mprq_enabled(rxq_data) ? 154 MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX : 155 MLX5DV_CQE_RES_FORMAT_HASH; 156 #else 157 cq_attr.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH; 158 #endif 159 /* 160 * For vectorized Rx, it must not be doubled in order to 161 * make cq_ci and rq_ci aligned. 162 */ 163 if (mlx5_rxq_check_vec_support(rxq_data) < 0) 164 cq_attr.ibv.cqe *= 2; 165 } else if (priv->config.cqe_comp && rxq_data->hw_timestamp) { 166 DRV_LOG(DEBUG, 167 "Port %u Rx CQE compression is disabled for HW" 168 " timestamp.", 169 dev->data->port_id); 170 } 171 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD 172 if (priv->config.cqe_pad) { 173 cq_attr.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS; 174 cq_attr.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD; 175 } 176 #endif 177 return mlx5_glue->cq_ex_to_cq(mlx5_glue->dv_create_cq(priv->sh->ctx, 178 &cq_attr.ibv, 179 &cq_attr.mlx5)); 180 } 181 182 /** 183 * Create a WQ Verbs object. 184 * 185 * @param dev 186 * Pointer to Ethernet device. 187 * @param idx 188 * Queue index in DPDK Rx queue array. 189 * 190 * @return 191 * The Verbs WQ object initialized, NULL otherwise and rte_errno is set. 192 */ 193 static struct ibv_wq * 194 mlx5_rxq_ibv_wq_create(struct rte_eth_dev *dev, uint16_t idx) 195 { 196 struct mlx5_priv *priv = dev->data->dev_private; 197 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx]; 198 struct mlx5_rxq_ctrl *rxq_ctrl = 199 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); 200 struct mlx5_rxq_obj *rxq_obj = rxq_ctrl->obj; 201 unsigned int wqe_n = 1 << rxq_data->elts_n; 202 struct { 203 struct ibv_wq_init_attr ibv; 204 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 205 struct mlx5dv_wq_init_attr mlx5; 206 #endif 207 } wq_attr; 208 209 wq_attr.ibv = (struct ibv_wq_init_attr){ 210 .wq_context = NULL, /* Could be useful in the future. */ 211 .wq_type = IBV_WQT_RQ, 212 /* Max number of outstanding WRs. */ 213 .max_wr = wqe_n >> rxq_data->sges_n, 214 /* Max number of scatter/gather elements in a WR. */ 215 .max_sge = 1 << rxq_data->sges_n, 216 .pd = priv->sh->pd, 217 .cq = rxq_obj->ibv_cq, 218 .comp_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING | 0, 219 .create_flags = (rxq_data->vlan_strip ? 220 IBV_WQ_FLAGS_CVLAN_STRIPPING : 0), 221 }; 222 /* By default, FCS (CRC) is stripped by hardware. */ 223 if (rxq_data->crc_present) { 224 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS; 225 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS; 226 } 227 if (priv->config.hw_padding) { 228 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 229 wq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING; 230 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS; 231 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 232 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING; 233 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS; 234 #endif 235 } 236 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 237 wq_attr.mlx5 = (struct mlx5dv_wq_init_attr){ 238 .comp_mask = 0, 239 }; 240 if (mlx5_rxq_mprq_enabled(rxq_data)) { 241 struct mlx5dv_striding_rq_init_attr *mprq_attr = 242 &wq_attr.mlx5.striding_rq_attrs; 243 244 wq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ; 245 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){ 246 .single_stride_log_num_of_bytes = rxq_data->strd_sz_n, 247 .single_wqe_log_num_of_strides = rxq_data->strd_num_n, 248 .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT, 249 }; 250 } 251 rxq_obj->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv, 252 &wq_attr.mlx5); 253 #else 254 rxq_obj->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv); 255 #endif 256 if (rxq_obj->wq) { 257 /* 258 * Make sure number of WRs*SGEs match expectations since a queue 259 * cannot allocate more than "desc" buffers. 260 */ 261 if (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) || 262 wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) { 263 DRV_LOG(ERR, 264 "Port %u Rx queue %u requested %u*%u but got" 265 " %u*%u WRs*SGEs.", 266 dev->data->port_id, idx, 267 wqe_n >> rxq_data->sges_n, 268 (1 << rxq_data->sges_n), 269 wq_attr.ibv.max_wr, wq_attr.ibv.max_sge); 270 claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq)); 271 rxq_obj->wq = NULL; 272 rte_errno = EINVAL; 273 } 274 } 275 return rxq_obj->wq; 276 } 277 278 /** 279 * Create the Rx queue Verbs object. 280 * 281 * @param dev 282 * Pointer to Ethernet device. 283 * @param idx 284 * Queue index in DPDK Rx queue array. 285 * 286 * @return 287 * 0 on success, a negative errno value otherwise and rte_errno is set. 288 */ 289 static int 290 mlx5_rxq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx) 291 { 292 struct mlx5_priv *priv = dev->data->dev_private; 293 struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx]; 294 struct mlx5_rxq_ctrl *rxq_ctrl = 295 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); 296 struct mlx5_rxq_obj *tmpl = rxq_ctrl->obj; 297 struct mlx5dv_cq cq_info; 298 struct mlx5dv_rwq rwq; 299 int ret = 0; 300 struct mlx5dv_obj obj; 301 302 MLX5_ASSERT(rxq_data); 303 MLX5_ASSERT(tmpl); 304 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE; 305 priv->verbs_alloc_ctx.obj = rxq_ctrl; 306 tmpl->type = MLX5_RXQ_OBJ_TYPE_IBV; 307 tmpl->rxq_ctrl = rxq_ctrl; 308 if (rxq_ctrl->irq) { 309 tmpl->ibv_channel = 310 mlx5_glue->create_comp_channel(priv->sh->ctx); 311 if (!tmpl->ibv_channel) { 312 DRV_LOG(ERR, "Port %u: comp channel creation failure.", 313 dev->data->port_id); 314 rte_errno = ENOMEM; 315 goto error; 316 } 317 tmpl->fd = ((struct ibv_comp_channel *)(tmpl->ibv_channel))->fd; 318 } 319 /* Create CQ using Verbs API. */ 320 tmpl->ibv_cq = mlx5_rxq_ibv_cq_create(dev, idx); 321 if (!tmpl->ibv_cq) { 322 DRV_LOG(ERR, "Port %u Rx queue %u CQ creation failure.", 323 dev->data->port_id, idx); 324 rte_errno = ENOMEM; 325 goto error; 326 } 327 obj.cq.in = tmpl->ibv_cq; 328 obj.cq.out = &cq_info; 329 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ); 330 if (ret) { 331 rte_errno = ret; 332 goto error; 333 } 334 if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) { 335 DRV_LOG(ERR, 336 "Port %u wrong MLX5_CQE_SIZE environment " 337 "variable value: it should be set to %u.", 338 dev->data->port_id, RTE_CACHE_LINE_SIZE); 339 rte_errno = EINVAL; 340 goto error; 341 } 342 /* Fill the rings. */ 343 rxq_data->cqe_n = log2above(cq_info.cqe_cnt); 344 rxq_data->cq_db = cq_info.dbrec; 345 rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf; 346 rxq_data->cq_uar = cq_info.cq_uar; 347 rxq_data->cqn = cq_info.cqn; 348 /* Create WQ (RQ) using Verbs API. */ 349 tmpl->wq = mlx5_rxq_ibv_wq_create(dev, idx); 350 if (!tmpl->wq) { 351 DRV_LOG(ERR, "Port %u Rx queue %u WQ creation failure.", 352 dev->data->port_id, idx); 353 rte_errno = ENOMEM; 354 goto error; 355 } 356 /* Change queue state to ready. */ 357 ret = mlx5_ibv_modify_wq(tmpl, true); 358 if (ret) { 359 DRV_LOG(ERR, 360 "Port %u Rx queue %u WQ state to IBV_WQS_RDY failed.", 361 dev->data->port_id, idx); 362 rte_errno = ret; 363 goto error; 364 } 365 obj.rwq.in = tmpl->wq; 366 obj.rwq.out = &rwq; 367 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_RWQ); 368 if (ret) { 369 rte_errno = ret; 370 goto error; 371 } 372 rxq_data->wqes = rwq.buf; 373 rxq_data->rq_db = rwq.dbrec; 374 rxq_data->cq_arm_sn = 0; 375 mlx5_rxq_initialize(rxq_data); 376 rxq_data->cq_ci = 0; 377 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE; 378 dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED; 379 rxq_ctrl->wqn = ((struct ibv_wq *)(tmpl->wq))->wq_num; 380 return 0; 381 error: 382 ret = rte_errno; /* Save rte_errno before cleanup. */ 383 if (tmpl->wq) 384 claim_zero(mlx5_glue->destroy_wq(tmpl->wq)); 385 if (tmpl->ibv_cq) 386 claim_zero(mlx5_glue->destroy_cq(tmpl->ibv_cq)); 387 if (tmpl->ibv_channel) 388 claim_zero(mlx5_glue->destroy_comp_channel(tmpl->ibv_channel)); 389 rte_errno = ret; /* Restore rte_errno. */ 390 priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE; 391 return -rte_errno; 392 } 393 394 /** 395 * Release an Rx verbs queue object. 396 * 397 * @param rxq_obj 398 * Verbs Rx queue object. 399 */ 400 static void 401 mlx5_rxq_ibv_obj_release(struct mlx5_rxq_obj *rxq_obj) 402 { 403 MLX5_ASSERT(rxq_obj); 404 MLX5_ASSERT(rxq_obj->wq); 405 MLX5_ASSERT(rxq_obj->ibv_cq); 406 claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq)); 407 claim_zero(mlx5_glue->destroy_cq(rxq_obj->ibv_cq)); 408 if (rxq_obj->ibv_channel) 409 claim_zero(mlx5_glue->destroy_comp_channel 410 (rxq_obj->ibv_channel)); 411 } 412 413 /** 414 * Get event for an Rx verbs queue object. 415 * 416 * @param rxq_obj 417 * Verbs Rx queue object. 418 * 419 * @return 420 * 0 on success, a negative errno value otherwise and rte_errno is set. 421 */ 422 static int 423 mlx5_rx_ibv_get_event(struct mlx5_rxq_obj *rxq_obj) 424 { 425 struct ibv_cq *ev_cq; 426 void *ev_ctx; 427 int ret = mlx5_glue->get_cq_event(rxq_obj->ibv_channel, 428 &ev_cq, &ev_ctx); 429 430 if (ret < 0 || ev_cq != rxq_obj->ibv_cq) 431 goto exit; 432 mlx5_glue->ack_cq_events(rxq_obj->ibv_cq, 1); 433 return 0; 434 exit: 435 if (ret < 0) 436 rte_errno = errno; 437 else 438 rte_errno = EINVAL; 439 return -rte_errno; 440 } 441 442 /** 443 * Creates a receive work queue as a filed of indirection table. 444 * 445 * @param dev 446 * Pointer to Ethernet device. 447 * @param log_n 448 * Log of number of queues in the array. 449 * @param ind_tbl 450 * Verbs indirection table object. 451 * 452 * @return 453 * 0 on success, a negative errno value otherwise and rte_errno is set. 454 */ 455 static int 456 mlx5_ibv_ind_table_new(struct rte_eth_dev *dev, const unsigned int log_n, 457 struct mlx5_ind_table_obj *ind_tbl) 458 { 459 struct mlx5_priv *priv = dev->data->dev_private; 460 struct ibv_wq *wq[1 << log_n]; 461 unsigned int i, j; 462 463 MLX5_ASSERT(ind_tbl); 464 for (i = 0; i != ind_tbl->queues_n; ++i) { 465 struct mlx5_rxq_data *rxq = (*priv->rxqs)[ind_tbl->queues[i]]; 466 struct mlx5_rxq_ctrl *rxq_ctrl = 467 container_of(rxq, struct mlx5_rxq_ctrl, rxq); 468 469 wq[i] = rxq_ctrl->obj->wq; 470 } 471 MLX5_ASSERT(i > 0); 472 /* Finalise indirection table. */ 473 for (j = 0; i != (unsigned int)(1 << log_n); ++j, ++i) 474 wq[i] = wq[j]; 475 ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table(priv->sh->ctx, 476 &(struct ibv_rwq_ind_table_init_attr){ 477 .log_ind_tbl_size = log_n, 478 .ind_tbl = wq, 479 .comp_mask = 0, 480 }); 481 if (!ind_tbl->ind_table) { 482 rte_errno = errno; 483 return -rte_errno; 484 } 485 return 0; 486 } 487 488 /** 489 * Destroys the specified Indirection Table. 490 * 491 * @param ind_table 492 * Indirection table to release. 493 */ 494 static void 495 mlx5_ibv_ind_table_destroy(struct mlx5_ind_table_obj *ind_tbl) 496 { 497 claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table)); 498 } 499 500 /** 501 * Create an Rx Hash queue. 502 * 503 * @param dev 504 * Pointer to Ethernet device. 505 * @param rss_key 506 * RSS key for the Rx hash queue. 507 * @param rss_key_len 508 * RSS key length. 509 * @param hash_fields 510 * Verbs protocol hash field to make the RSS on. 511 * @param queues 512 * Queues entering in hash queue. In case of empty hash_fields only the 513 * first queue index will be taken for the indirection table. 514 * @param queues_n 515 * Number of queues. 516 * @param tunnel 517 * Tunnel type. 518 * 519 * @return 520 * The Verbs object initialized index, 0 otherwise and rte_errno is set. 521 */ 522 static uint32_t 523 mlx5_ibv_hrxq_new(struct rte_eth_dev *dev, 524 const uint8_t *rss_key, uint32_t rss_key_len, 525 uint64_t hash_fields, 526 const uint16_t *queues, uint32_t queues_n, 527 int tunnel __rte_unused) 528 { 529 struct mlx5_priv *priv = dev->data->dev_private; 530 struct mlx5_hrxq *hrxq = NULL; 531 uint32_t hrxq_idx = 0; 532 struct ibv_qp *qp = NULL; 533 struct mlx5_ind_table_obj *ind_tbl; 534 int err; 535 536 queues_n = hash_fields ? queues_n : 1; 537 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n); 538 if (!ind_tbl) 539 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n); 540 if (!ind_tbl) { 541 rte_errno = ENOMEM; 542 return 0; 543 } 544 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 545 struct mlx5dv_qp_init_attr qp_init_attr; 546 547 memset(&qp_init_attr, 0, sizeof(qp_init_attr)); 548 if (tunnel) { 549 qp_init_attr.comp_mask = 550 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS; 551 qp_init_attr.create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS; 552 } 553 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 554 if (dev->data->dev_conf.lpbk_mode) { 555 /* Allow packet sent from NIC loop back w/o source MAC check. */ 556 qp_init_attr.comp_mask |= 557 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS; 558 qp_init_attr.create_flags |= 559 MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC; 560 } 561 #endif 562 qp = mlx5_glue->dv_create_qp 563 (priv->sh->ctx, 564 &(struct ibv_qp_init_attr_ex){ 565 .qp_type = IBV_QPT_RAW_PACKET, 566 .comp_mask = 567 IBV_QP_INIT_ATTR_PD | 568 IBV_QP_INIT_ATTR_IND_TABLE | 569 IBV_QP_INIT_ATTR_RX_HASH, 570 .rx_hash_conf = (struct ibv_rx_hash_conf){ 571 .rx_hash_function = 572 IBV_RX_HASH_FUNC_TOEPLITZ, 573 .rx_hash_key_len = rss_key_len, 574 .rx_hash_key = 575 (void *)(uintptr_t)rss_key, 576 .rx_hash_fields_mask = hash_fields, 577 }, 578 .rwq_ind_tbl = ind_tbl->ind_table, 579 .pd = priv->sh->pd, 580 }, 581 &qp_init_attr); 582 #else 583 qp = mlx5_glue->create_qp_ex 584 (priv->sh->ctx, 585 &(struct ibv_qp_init_attr_ex){ 586 .qp_type = IBV_QPT_RAW_PACKET, 587 .comp_mask = 588 IBV_QP_INIT_ATTR_PD | 589 IBV_QP_INIT_ATTR_IND_TABLE | 590 IBV_QP_INIT_ATTR_RX_HASH, 591 .rx_hash_conf = (struct ibv_rx_hash_conf){ 592 .rx_hash_function = 593 IBV_RX_HASH_FUNC_TOEPLITZ, 594 .rx_hash_key_len = rss_key_len, 595 .rx_hash_key = 596 (void *)(uintptr_t)rss_key, 597 .rx_hash_fields_mask = hash_fields, 598 }, 599 .rwq_ind_tbl = ind_tbl->ind_table, 600 .pd = priv->sh->pd, 601 }); 602 #endif 603 if (!qp) { 604 rte_errno = errno; 605 goto error; 606 } 607 hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx); 608 if (!hrxq) 609 goto error; 610 hrxq->ind_table = ind_tbl; 611 hrxq->qp = qp; 612 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 613 hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp); 614 if (!hrxq->action) { 615 rte_errno = errno; 616 goto error; 617 } 618 #endif 619 hrxq->rss_key_len = rss_key_len; 620 hrxq->hash_fields = hash_fields; 621 memcpy(hrxq->rss_key, rss_key, rss_key_len); 622 rte_atomic32_inc(&hrxq->refcnt); 623 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_HRXQ], &priv->hrxqs, hrxq_idx, 624 hrxq, next); 625 return hrxq_idx; 626 error: 627 err = rte_errno; /* Save rte_errno before cleanup. */ 628 mlx5_ind_table_obj_release(dev, ind_tbl); 629 if (qp) 630 claim_zero(mlx5_glue->destroy_qp(qp)); 631 if (hrxq) 632 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx); 633 rte_errno = err; /* Restore rte_errno. */ 634 return 0; 635 } 636 637 /** 638 * Destroy a Verbs queue pair. 639 * 640 * @param hrxq 641 * Hash Rx queue to release its qp. 642 */ 643 static void 644 mlx5_ibv_qp_destroy(struct mlx5_hrxq *hrxq) 645 { 646 claim_zero(mlx5_glue->destroy_qp(hrxq->qp)); 647 } 648 649 struct mlx5_obj_ops ibv_obj_ops = { 650 .rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_wq_vlan_strip, 651 .rxq_obj_new = mlx5_rxq_ibv_obj_new, 652 .rxq_event_get = mlx5_rx_ibv_get_event, 653 .rxq_obj_modify = mlx5_ibv_modify_wq, 654 .rxq_obj_release = mlx5_rxq_ibv_obj_release, 655 .ind_table_new = mlx5_ibv_ind_table_new, 656 .ind_table_destroy = mlx5_ibv_ind_table_destroy, 657 .hrxq_new = mlx5_ibv_hrxq_new, 658 .hrxq_destroy = mlx5_ibv_qp_destroy, 659 }; 660