1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <bus_driver.h> 23 #include <bus_pci_driver.h> 24 #include <bus_auxiliary_driver.h> 25 #include <rte_common.h> 26 #include <rte_kvargs.h> 27 #include <rte_rwlock.h> 28 #include <rte_spinlock.h> 29 #include <rte_string_fns.h> 30 #include <rte_alarm.h> 31 #include <rte_eal_paging.h> 32 33 #include <mlx5_glue.h> 34 #include <mlx5_devx_cmds.h> 35 #include <mlx5_common.h> 36 #include <mlx5_common_mp.h> 37 #include <mlx5_common_mr.h> 38 #include <mlx5_malloc.h> 39 40 #include "mlx5_defs.h" 41 #include "mlx5.h" 42 #include "mlx5_common_os.h" 43 #include "mlx5_utils.h" 44 #include "mlx5_rxtx.h" 45 #include "mlx5_rx.h" 46 #include "mlx5_tx.h" 47 #include "mlx5_autoconf.h" 48 #include "mlx5_flow.h" 49 #include "rte_pmd_mlx5.h" 50 #include "mlx5_verbs.h" 51 #include "mlx5_nl.h" 52 #include "mlx5_devx.h" 53 54 #ifndef HAVE_IBV_MLX5_MOD_MPW 55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 57 #endif 58 59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 61 #endif 62 63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 64 65 /* Spinlock for mlx5_shared_data allocation. */ 66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 67 68 /* Process local data for secondary processes. */ 69 static struct mlx5_local_data mlx5_local_data; 70 71 /* rte flow indexed pool configuration. */ 72 static struct mlx5_indexed_pool_config icfg[] = { 73 { 74 .size = sizeof(struct rte_flow), 75 .trunk_size = 64, 76 .need_lock = 1, 77 .release_mem_en = 0, 78 .malloc = mlx5_malloc, 79 .free = mlx5_free, 80 .per_core_cache = 0, 81 .type = "ctl_flow_ipool", 82 }, 83 { 84 .size = sizeof(struct rte_flow), 85 .trunk_size = 64, 86 .grow_trunk = 3, 87 .grow_shift = 2, 88 .need_lock = 1, 89 .release_mem_en = 0, 90 .malloc = mlx5_malloc, 91 .free = mlx5_free, 92 .per_core_cache = 1 << 14, 93 .type = "rte_flow_ipool", 94 }, 95 { 96 .size = sizeof(struct rte_flow), 97 .trunk_size = 64, 98 .grow_trunk = 3, 99 .grow_shift = 2, 100 .need_lock = 1, 101 .release_mem_en = 0, 102 .malloc = mlx5_malloc, 103 .free = mlx5_free, 104 .per_core_cache = 0, 105 .type = "mcp_flow_ipool", 106 }, 107 }; 108 109 /** 110 * Set the completion channel file descriptor interrupt as non-blocking. 111 * 112 * @param[in] rxq_obj 113 * Pointer to RQ channel object, which includes the channel fd 114 * 115 * @param[out] fd 116 * The file descriptor (representing the interrupt) used in this channel. 117 * 118 * @return 119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 120 */ 121 int 122 mlx5_os_set_nonblock_channel_fd(int fd) 123 { 124 int flags; 125 126 flags = fcntl(fd, F_GETFL); 127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 128 } 129 130 /** 131 * Get mlx5 device attributes. The glue function query_device_ex() is called 132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 133 * device attributes from the glue out parameter. 134 * 135 * @param sh 136 * Pointer to shared device context. 137 * 138 * @return 139 * 0 on success, a negative errno value otherwise and rte_errno is set. 140 */ 141 int 142 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 143 { 144 int err; 145 struct mlx5_common_device *cdev = sh->cdev; 146 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 147 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 148 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 149 150 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 151 if (err) { 152 rte_errno = errno; 153 return -rte_errno; 154 } 155 #ifdef HAVE_IBV_MLX5_MOD_SWP 156 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 157 #endif 158 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 159 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 160 #endif 161 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 162 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 163 #endif 164 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 165 if (err) { 166 rte_errno = errno; 167 return -rte_errno; 168 } 169 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 170 if (mlx5_dev_is_pci(cdev->dev)) 171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 172 else 173 sh->dev_cap.sf = 1; 174 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 175 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 176 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 177 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 178 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 179 sh->dev_cap.dest_tir = 1; 180 #endif 181 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 182 DRV_LOG(DEBUG, "DV flow is supported."); 183 sh->dev_cap.dv_flow_en = 1; 184 #endif 185 #ifdef HAVE_MLX5DV_DR_ESWITCH 186 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 187 sh->dev_cap.dv_esw_en = 1; 188 #endif 189 /* 190 * Multi-packet send is supported by ConnectX-4 Lx PF as well 191 * as all ConnectX-5 devices. 192 */ 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 194 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 195 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 196 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 197 } else { 198 DRV_LOG(DEBUG, "MPW is supported."); 199 sh->dev_cap.mps = MLX5_MPW; 200 } 201 } else { 202 DRV_LOG(DEBUG, "MPW isn't supported."); 203 sh->dev_cap.mps = MLX5_MPW_DISABLED; 204 } 205 #if (RTE_CACHE_LINE_SIZE == 128) 206 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 207 sh->dev_cap.cqe_comp = 1; 208 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 209 sh->dev_cap.cqe_comp ? "" : "not "); 210 #else 211 sh->dev_cap.cqe_comp = 1; 212 #endif 213 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 214 sh->dev_cap.mpls_en = 215 ((dv_attr.tunnel_offloads_caps & 216 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 217 (dv_attr.tunnel_offloads_caps & 218 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 219 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 220 sh->dev_cap.mpls_en ? "" : "not "); 221 #else 222 DRV_LOG(WARNING, 223 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 224 #endif 225 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 226 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 227 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 228 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 229 IBV_DEVICE_PCI_WRITE_END_PADDING); 230 #endif 231 sh->dev_cap.hw_csum = 232 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 233 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 234 sh->dev_cap.hw_csum ? "" : "not "); 235 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 236 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 237 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 238 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 239 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 240 IBV_RAW_PACKET_CAP_SCATTER_FCS); 241 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 242 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 243 DRV_LOG(DEBUG, "Counters are not supported."); 244 #endif 245 /* 246 * DPDK doesn't support larger/variable indirection tables. 247 * Once DPDK supports it, take max size from device attr. 248 */ 249 sh->dev_cap.ind_table_max_size = 250 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 251 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 252 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 253 sh->dev_cap.ind_table_max_size); 254 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 255 (attr_ex.tso_caps.supported_qpts & 256 (1 << IBV_QPT_RAW_PACKET))); 257 if (sh->dev_cap.tso) 258 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 259 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 260 sizeof(sh->dev_cap.fw_ver)); 261 #ifdef HAVE_IBV_MLX5_MOD_SWP 262 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 263 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 264 (MLX5_SW_PARSING_CAP | 265 MLX5_SW_PARSING_CSUM_CAP | 266 MLX5_SW_PARSING_TSO_CAP); 267 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 268 #endif 269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 270 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 271 struct mlx5dv_striding_rq_caps *strd_rq_caps = 272 &dv_attr.striding_rq_caps; 273 274 sh->dev_cap.mprq.enabled = 1; 275 sh->dev_cap.mprq.log_min_stride_size = 276 strd_rq_caps->min_single_stride_log_num_of_bytes; 277 sh->dev_cap.mprq.log_max_stride_size = 278 strd_rq_caps->max_single_stride_log_num_of_bytes; 279 sh->dev_cap.mprq.log_min_stride_num = 280 strd_rq_caps->min_single_wqe_log_num_of_strides; 281 sh->dev_cap.mprq.log_max_stride_num = 282 strd_rq_caps->max_single_wqe_log_num_of_strides; 283 sh->dev_cap.mprq.log_min_stride_wqe_size = 284 cdev->config.devx ? 285 hca_attr->log_min_stride_wqe_sz : 286 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 287 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 288 sh->dev_cap.mprq.log_min_stride_size); 289 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 290 sh->dev_cap.mprq.log_max_stride_size); 291 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 292 sh->dev_cap.mprq.log_min_stride_num); 293 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 294 sh->dev_cap.mprq.log_max_stride_num); 295 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 296 sh->dev_cap.mprq.log_min_stride_wqe_size); 297 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 298 strd_rq_caps->supported_qpts); 299 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 300 } 301 #endif 302 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 303 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 304 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 305 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 306 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 307 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 308 } 309 if (sh->dev_cap.tunnel_en) { 310 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 311 sh->dev_cap.tunnel_en & 312 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 313 sh->dev_cap.tunnel_en & 314 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 315 sh->dev_cap.tunnel_en & 316 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 317 } else { 318 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 319 } 320 #else 321 DRV_LOG(WARNING, 322 "Tunnel offloading disabled due to old OFED/rdma-core version"); 323 #endif 324 if (!sh->cdev->config.devx) 325 return 0; 326 /* Check capabilities for Packet Pacing. */ 327 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 328 hca_attr->dev_freq_khz); 329 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 330 hca_attr->qos.packet_pacing ? "" : "not "); 331 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 332 hca_attr->cross_channel ? "" : "not "); 333 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 334 hca_attr->wqe_index_ignore ? "" : "not "); 335 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 336 hca_attr->non_wire_sq ? "" : "not "); 337 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 338 hca_attr->log_max_static_sq_wq ? "" : "not ", 339 hca_attr->log_max_static_sq_wq); 340 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 341 hca_attr->qos.wqe_rate_pp ? "" : "not "); 342 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 343 if (!hca_attr->cross_channel) { 344 DRV_LOG(DEBUG, 345 "Cross channel operations are required for packet pacing."); 346 sh->dev_cap.txpp_en = 0; 347 } 348 if (!hca_attr->wqe_index_ignore) { 349 DRV_LOG(DEBUG, 350 "WQE index ignore feature is required for packet pacing."); 351 sh->dev_cap.txpp_en = 0; 352 } 353 if (!hca_attr->non_wire_sq) { 354 DRV_LOG(DEBUG, 355 "Non-wire SQ feature is required for packet pacing."); 356 sh->dev_cap.txpp_en = 0; 357 } 358 if (!hca_attr->log_max_static_sq_wq) { 359 DRV_LOG(DEBUG, 360 "Static WQE SQ feature is required for packet pacing."); 361 sh->dev_cap.txpp_en = 0; 362 } 363 if (!hca_attr->qos.wqe_rate_pp) { 364 DRV_LOG(DEBUG, 365 "WQE rate mode is required for packet pacing."); 366 sh->dev_cap.txpp_en = 0; 367 } 368 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 369 DRV_LOG(DEBUG, 370 "DevX does not provide UAR offset, can't create queues for packet pacing."); 371 sh->dev_cap.txpp_en = 0; 372 #endif 373 sh->dev_cap.scatter_fcs_w_decap_disable = 374 hca_attr->scatter_fcs_w_decap_disable; 375 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 376 mlx5_rt_timestamp_config(sh, hca_attr); 377 return 0; 378 } 379 380 /** 381 * Detect misc5 support or not 382 * 383 * @param[in] priv 384 * Device private data pointer 385 */ 386 #ifdef HAVE_MLX5DV_DR 387 static void 388 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 389 { 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 391 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 392 * Case: IPv4--->UDP--->VxLAN--->vni 393 */ 394 void *tbl; 395 struct mlx5_flow_dv_match_params matcher_mask; 396 void *match_m; 397 void *matcher; 398 void *headers_m; 399 void *misc5_m; 400 uint32_t *tunnel_header_m; 401 struct mlx5dv_flow_matcher_attr dv_attr; 402 403 memset(&matcher_mask, 0, sizeof(matcher_mask)); 404 matcher_mask.size = sizeof(matcher_mask.buf); 405 match_m = matcher_mask.buf; 406 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 407 misc5_m = MLX5_ADDR_OF(fte_match_param, 408 match_m, misc_parameters_5); 409 tunnel_header_m = (uint32_t *) 410 MLX5_ADDR_OF(fte_match_set_misc5, 411 misc5_m, tunnel_header_1); 412 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 413 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 414 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 415 *tunnel_header_m = 0xffffff; 416 417 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 418 if (!tbl) { 419 DRV_LOG(INFO, "No SW steering support"); 420 return; 421 } 422 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 423 dv_attr.match_mask = (void *)&matcher_mask, 424 dv_attr.match_criteria_enable = 425 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 426 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 427 dv_attr.priority = 3; 428 #ifdef HAVE_MLX5DV_DR_ESWITCH 429 void *misc2_m; 430 if (priv->sh->config.dv_esw_en) { 431 /* FDB enabled reg_c_0 */ 432 dv_attr.match_criteria_enable |= 433 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 434 misc2_m = MLX5_ADDR_OF(fte_match_param, 435 match_m, misc_parameters_2); 436 MLX5_SET(fte_match_set_misc2, misc2_m, 437 metadata_reg_c_0, 0xffff); 438 } 439 #endif 440 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 441 &dv_attr, tbl); 442 if (matcher) { 443 priv->sh->misc5_cap = 1; 444 mlx5_glue->dv_destroy_flow_matcher(matcher); 445 } 446 mlx5_glue->dr_destroy_flow_tbl(tbl); 447 #else 448 RTE_SET_USED(priv); 449 #endif 450 } 451 #endif 452 453 /** 454 * Initialize DR related data within private structure. 455 * Routine checks the reference counter and does actual 456 * resources creation/initialization only if counter is zero. 457 * 458 * @param[in] priv 459 * Pointer to the private device data structure. 460 * 461 * @return 462 * Zero on success, positive error code otherwise. 463 */ 464 static int 465 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 466 { 467 struct mlx5_dev_ctx_shared *sh = priv->sh; 468 char s[MLX5_NAME_SIZE] __rte_unused; 469 int err; 470 471 MLX5_ASSERT(sh && sh->refcnt); 472 if (sh->refcnt > 1) 473 return 0; 474 err = mlx5_alloc_table_hash_list(priv); 475 if (err) 476 goto error; 477 if (priv->sh->config.dv_flow_en == 2) 478 return 0; 479 /* The resources below are only valid with DV support. */ 480 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 481 /* Init port id action list. */ 482 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 483 sh->port_id_action_list = mlx5_list_create(s, sh, true, 484 flow_dv_port_id_create_cb, 485 flow_dv_port_id_match_cb, 486 flow_dv_port_id_remove_cb, 487 flow_dv_port_id_clone_cb, 488 flow_dv_port_id_clone_free_cb); 489 if (!sh->port_id_action_list) 490 goto error; 491 /* Init push vlan action list. */ 492 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 493 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 494 flow_dv_push_vlan_create_cb, 495 flow_dv_push_vlan_match_cb, 496 flow_dv_push_vlan_remove_cb, 497 flow_dv_push_vlan_clone_cb, 498 flow_dv_push_vlan_clone_free_cb); 499 if (!sh->push_vlan_action_list) 500 goto error; 501 /* Init sample action list. */ 502 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 503 sh->sample_action_list = mlx5_list_create(s, sh, true, 504 flow_dv_sample_create_cb, 505 flow_dv_sample_match_cb, 506 flow_dv_sample_remove_cb, 507 flow_dv_sample_clone_cb, 508 flow_dv_sample_clone_free_cb); 509 if (!sh->sample_action_list) 510 goto error; 511 /* Init dest array action list. */ 512 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 513 sh->dest_array_list = mlx5_list_create(s, sh, true, 514 flow_dv_dest_array_create_cb, 515 flow_dv_dest_array_match_cb, 516 flow_dv_dest_array_remove_cb, 517 flow_dv_dest_array_clone_cb, 518 flow_dv_dest_array_clone_free_cb); 519 if (!sh->dest_array_list) 520 goto error; 521 /* Init shared flex parsers list, no need lcore_share */ 522 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 523 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 524 mlx5_flex_parser_create_cb, 525 mlx5_flex_parser_match_cb, 526 mlx5_flex_parser_remove_cb, 527 mlx5_flex_parser_clone_cb, 528 mlx5_flex_parser_clone_free_cb); 529 if (!sh->flex_parsers_dv) 530 goto error; 531 #endif 532 #ifdef HAVE_MLX5DV_DR 533 void *domain; 534 535 /* Reference counter is zero, we should initialize structures. */ 536 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 537 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 538 if (!domain) { 539 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 540 err = errno; 541 goto error; 542 } 543 sh->rx_domain = domain; 544 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 545 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 546 if (!domain) { 547 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 548 err = errno; 549 goto error; 550 } 551 sh->tx_domain = domain; 552 #ifdef HAVE_MLX5DV_DR_ESWITCH 553 if (sh->config.dv_esw_en) { 554 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 555 MLX5DV_DR_DOMAIN_TYPE_FDB); 556 if (!domain) { 557 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 558 err = errno; 559 goto error; 560 } 561 sh->fdb_domain = domain; 562 } 563 /* 564 * The drop action is just some dummy placeholder in rdma-core. It 565 * does not belong to domains and has no any attributes, and, can be 566 * shared by the entire device. 567 */ 568 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 569 if (!sh->dr_drop_action) { 570 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 571 err = errno; 572 goto error; 573 } 574 #endif 575 if (!sh->tunnel_hub && sh->config.dv_miss_info) 576 err = mlx5_alloc_tunnel_hub(sh); 577 if (err) { 578 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 579 goto error; 580 } 581 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 582 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 583 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 584 if (sh->fdb_domain) 585 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 586 } 587 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 588 if (!sh->config.allow_duplicate_pattern) { 589 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 590 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 591 #endif 592 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 593 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 594 if (sh->fdb_domain) 595 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 596 } 597 598 __mlx5_discovery_misc5_cap(priv); 599 #endif /* HAVE_MLX5DV_DR */ 600 sh->default_miss_action = 601 mlx5_glue->dr_create_flow_action_default_miss(); 602 if (!sh->default_miss_action) 603 DRV_LOG(WARNING, "Default miss action is not supported."); 604 LIST_INIT(&sh->shared_rxqs); 605 return 0; 606 error: 607 /* Rollback the created objects. */ 608 if (sh->rx_domain) { 609 mlx5_glue->dr_destroy_domain(sh->rx_domain); 610 sh->rx_domain = NULL; 611 } 612 if (sh->tx_domain) { 613 mlx5_glue->dr_destroy_domain(sh->tx_domain); 614 sh->tx_domain = NULL; 615 } 616 if (sh->fdb_domain) { 617 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 618 sh->fdb_domain = NULL; 619 } 620 if (sh->dr_drop_action) { 621 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 622 sh->dr_drop_action = NULL; 623 } 624 if (sh->pop_vlan_action) { 625 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 626 sh->pop_vlan_action = NULL; 627 } 628 if (sh->encaps_decaps) { 629 mlx5_hlist_destroy(sh->encaps_decaps); 630 sh->encaps_decaps = NULL; 631 } 632 if (sh->modify_cmds) { 633 mlx5_hlist_destroy(sh->modify_cmds); 634 sh->modify_cmds = NULL; 635 } 636 if (sh->tag_table) { 637 /* tags should be destroyed with flow before. */ 638 mlx5_hlist_destroy(sh->tag_table); 639 sh->tag_table = NULL; 640 } 641 if (sh->tunnel_hub) { 642 mlx5_release_tunnel_hub(sh, priv->dev_port); 643 sh->tunnel_hub = NULL; 644 } 645 mlx5_free_table_hash_list(priv); 646 if (sh->port_id_action_list) { 647 mlx5_list_destroy(sh->port_id_action_list); 648 sh->port_id_action_list = NULL; 649 } 650 if (sh->push_vlan_action_list) { 651 mlx5_list_destroy(sh->push_vlan_action_list); 652 sh->push_vlan_action_list = NULL; 653 } 654 if (sh->sample_action_list) { 655 mlx5_list_destroy(sh->sample_action_list); 656 sh->sample_action_list = NULL; 657 } 658 if (sh->dest_array_list) { 659 mlx5_list_destroy(sh->dest_array_list); 660 sh->dest_array_list = NULL; 661 } 662 return err; 663 } 664 665 /** 666 * Destroy DR related data within private structure. 667 * 668 * @param[in] priv 669 * Pointer to the private device data structure. 670 */ 671 void 672 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 673 { 674 struct mlx5_dev_ctx_shared *sh = priv->sh; 675 676 MLX5_ASSERT(sh && sh->refcnt); 677 if (sh->refcnt > 1) 678 return; 679 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 680 #ifdef HAVE_MLX5DV_DR 681 if (sh->rx_domain) { 682 mlx5_glue->dr_destroy_domain(sh->rx_domain); 683 sh->rx_domain = NULL; 684 } 685 if (sh->tx_domain) { 686 mlx5_glue->dr_destroy_domain(sh->tx_domain); 687 sh->tx_domain = NULL; 688 } 689 #ifdef HAVE_MLX5DV_DR_ESWITCH 690 if (sh->fdb_domain) { 691 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 692 sh->fdb_domain = NULL; 693 } 694 if (sh->dr_drop_action) { 695 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 696 sh->dr_drop_action = NULL; 697 } 698 #endif 699 if (sh->pop_vlan_action) { 700 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 701 sh->pop_vlan_action = NULL; 702 } 703 if (sh->send_to_kernel_action.action) { 704 void *action = sh->send_to_kernel_action.action; 705 706 mlx5_glue->destroy_flow_action(action); 707 sh->send_to_kernel_action.action = NULL; 708 } 709 if (sh->send_to_kernel_action.tbl) { 710 struct mlx5_flow_tbl_resource *tbl = 711 sh->send_to_kernel_action.tbl; 712 713 flow_dv_tbl_resource_release(sh, tbl); 714 sh->send_to_kernel_action.tbl = NULL; 715 } 716 #endif /* HAVE_MLX5DV_DR */ 717 if (sh->default_miss_action) 718 mlx5_glue->destroy_flow_action 719 (sh->default_miss_action); 720 if (sh->encaps_decaps) { 721 mlx5_hlist_destroy(sh->encaps_decaps); 722 sh->encaps_decaps = NULL; 723 } 724 if (sh->modify_cmds) { 725 mlx5_hlist_destroy(sh->modify_cmds); 726 sh->modify_cmds = NULL; 727 } 728 if (sh->tag_table) { 729 /* tags should be destroyed with flow before. */ 730 mlx5_hlist_destroy(sh->tag_table); 731 sh->tag_table = NULL; 732 } 733 if (sh->tunnel_hub) { 734 mlx5_release_tunnel_hub(sh, priv->dev_port); 735 sh->tunnel_hub = NULL; 736 } 737 mlx5_free_table_hash_list(priv); 738 if (sh->port_id_action_list) { 739 mlx5_list_destroy(sh->port_id_action_list); 740 sh->port_id_action_list = NULL; 741 } 742 if (sh->push_vlan_action_list) { 743 mlx5_list_destroy(sh->push_vlan_action_list); 744 sh->push_vlan_action_list = NULL; 745 } 746 if (sh->sample_action_list) { 747 mlx5_list_destroy(sh->sample_action_list); 748 sh->sample_action_list = NULL; 749 } 750 if (sh->dest_array_list) { 751 mlx5_list_destroy(sh->dest_array_list); 752 sh->dest_array_list = NULL; 753 } 754 } 755 756 /** 757 * Initialize shared data between primary and secondary process. 758 * 759 * A memzone is reserved by primary process and secondary processes attach to 760 * the memzone. 761 * 762 * @return 763 * 0 on success, a negative errno value otherwise and rte_errno is set. 764 */ 765 static int 766 mlx5_init_shared_data(void) 767 { 768 const struct rte_memzone *mz; 769 int ret = 0; 770 771 rte_spinlock_lock(&mlx5_shared_data_lock); 772 if (mlx5_shared_data == NULL) { 773 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 774 /* Allocate shared memory. */ 775 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 776 sizeof(*mlx5_shared_data), 777 SOCKET_ID_ANY, 0); 778 if (mz == NULL) { 779 DRV_LOG(ERR, 780 "Cannot allocate mlx5 shared data"); 781 ret = -rte_errno; 782 goto error; 783 } 784 mlx5_shared_data = mz->addr; 785 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 786 rte_spinlock_init(&mlx5_shared_data->lock); 787 } else { 788 /* Lookup allocated shared memory. */ 789 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 790 if (mz == NULL) { 791 DRV_LOG(ERR, 792 "Cannot attach mlx5 shared data"); 793 ret = -rte_errno; 794 goto error; 795 } 796 mlx5_shared_data = mz->addr; 797 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 798 } 799 } 800 error: 801 rte_spinlock_unlock(&mlx5_shared_data_lock); 802 return ret; 803 } 804 805 /** 806 * PMD global initialization. 807 * 808 * Independent from individual device, this function initializes global 809 * per-PMD data structures distinguishing primary and secondary processes. 810 * Hence, each initialization is called once per a process. 811 * 812 * @return 813 * 0 on success, a negative errno value otherwise and rte_errno is set. 814 */ 815 static int 816 mlx5_init_once(void) 817 { 818 struct mlx5_shared_data *sd; 819 struct mlx5_local_data *ld = &mlx5_local_data; 820 int ret = 0; 821 822 if (mlx5_init_shared_data()) 823 return -rte_errno; 824 sd = mlx5_shared_data; 825 MLX5_ASSERT(sd); 826 rte_spinlock_lock(&sd->lock); 827 switch (rte_eal_process_type()) { 828 case RTE_PROC_PRIMARY: 829 if (sd->init_done) 830 break; 831 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 832 mlx5_mp_os_primary_handle); 833 if (ret) 834 goto out; 835 sd->init_done = true; 836 break; 837 case RTE_PROC_SECONDARY: 838 if (ld->init_done) 839 break; 840 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 841 mlx5_mp_os_secondary_handle); 842 if (ret) 843 goto out; 844 ++sd->secondary_cnt; 845 ld->init_done = true; 846 break; 847 default: 848 break; 849 } 850 out: 851 rte_spinlock_unlock(&sd->lock); 852 return ret; 853 } 854 855 /** 856 * DR flow drop action support detect. 857 * 858 * @param dev 859 * Pointer to rte_eth_dev structure. 860 * 861 */ 862 static void 863 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 864 { 865 #ifdef HAVE_MLX5DV_DR 866 struct mlx5_priv *priv = dev->data->dev_private; 867 868 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 869 return; 870 /** 871 * DR supports drop action placeholder when it is supported; 872 * otherwise, use the queue drop action. 873 */ 874 if (!priv->sh->drop_action_check_flag) { 875 if (!mlx5_flow_discover_dr_action_support(dev)) 876 priv->sh->dr_drop_action_en = 1; 877 priv->sh->drop_action_check_flag = 1; 878 } 879 if (priv->sh->dr_drop_action_en) 880 priv->root_drop_action = priv->sh->dr_drop_action; 881 else 882 priv->root_drop_action = priv->drop_queue.hrxq->action; 883 #endif 884 } 885 886 static void 887 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 888 { 889 struct mlx5_priv *priv = dev->data->dev_private; 890 void *ctx = priv->sh->cdev->ctx; 891 892 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 893 if (!priv->q_counters) { 894 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 895 struct ibv_wq *wq; 896 897 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 898 "by DevX - fall-back to use the kernel driver global " 899 "queue counter.", dev->data->port_id); 900 /* Create WQ by kernel and query its queue counter ID. */ 901 if (cq) { 902 wq = mlx5_glue->create_wq(ctx, 903 &(struct ibv_wq_init_attr){ 904 .wq_type = IBV_WQT_RQ, 905 .max_wr = 1, 906 .max_sge = 1, 907 .pd = priv->sh->cdev->pd, 908 .cq = cq, 909 }); 910 if (wq) { 911 /* Counter is assigned only on RDY state. */ 912 int ret = mlx5_glue->modify_wq(wq, 913 &(struct ibv_wq_attr){ 914 .attr_mask = IBV_WQ_ATTR_STATE, 915 .wq_state = IBV_WQS_RDY, 916 }); 917 918 if (ret == 0) 919 mlx5_devx_cmd_wq_query(wq, 920 &priv->counter_set_id); 921 claim_zero(mlx5_glue->destroy_wq(wq)); 922 } 923 claim_zero(mlx5_glue->destroy_cq(cq)); 924 } 925 } else { 926 priv->counter_set_id = priv->q_counters->id; 927 } 928 if (priv->counter_set_id == 0) 929 DRV_LOG(INFO, "Part of the port %d statistics will not be " 930 "available.", dev->data->port_id); 931 } 932 933 /** 934 * Check if representor spawn info match devargs. 935 * 936 * @param spawn 937 * Verbs device parameters (name, port, switch_info) to spawn. 938 * @param eth_da 939 * Device devargs to probe. 940 * 941 * @return 942 * Match result. 943 */ 944 static bool 945 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 946 struct rte_eth_devargs *eth_da) 947 { 948 struct mlx5_switch_info *switch_info = &spawn->info; 949 unsigned int p, f; 950 uint16_t id; 951 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 952 eth_da->type); 953 954 switch (eth_da->type) { 955 case RTE_ETH_REPRESENTOR_SF: 956 if (!(spawn->info.port_name == -1 && 957 switch_info->name_type == 958 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 959 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 960 rte_errno = EBUSY; 961 return false; 962 } 963 break; 964 case RTE_ETH_REPRESENTOR_VF: 965 /* Allows HPF representor index -1 as exception. */ 966 if (!(spawn->info.port_name == -1 && 967 switch_info->name_type == 968 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 969 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 970 rte_errno = EBUSY; 971 return false; 972 } 973 break; 974 case RTE_ETH_REPRESENTOR_NONE: 975 rte_errno = EBUSY; 976 return false; 977 default: 978 rte_errno = ENOTSUP; 979 DRV_LOG(ERR, "unsupported representor type"); 980 return false; 981 } 982 /* Check representor ID: */ 983 for (p = 0; p < eth_da->nb_ports; ++p) { 984 if (spawn->pf_bond < 0) { 985 /* For non-LAG mode, allow and ignore pf. */ 986 switch_info->pf_num = eth_da->ports[p]; 987 repr_id = mlx5_representor_id_encode(switch_info, 988 eth_da->type); 989 } 990 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 991 id = MLX5_REPRESENTOR_ID 992 (eth_da->ports[p], eth_da->type, 993 eth_da->representor_ports[f]); 994 if (repr_id == id) 995 return true; 996 } 997 } 998 rte_errno = EBUSY; 999 return false; 1000 } 1001 1002 /** 1003 * Spawn an Ethernet device from Verbs information. 1004 * 1005 * @param dpdk_dev 1006 * Backing DPDK device. 1007 * @param spawn 1008 * Verbs device parameters (name, port, switch_info) to spawn. 1009 * @param eth_da 1010 * Device arguments. 1011 * @param mkvlist 1012 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1013 * 1014 * @return 1015 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1016 * is set. The following errors are defined: 1017 * 1018 * EBUSY: device is not supposed to be spawned. 1019 * EEXIST: device is already spawned 1020 */ 1021 static struct rte_eth_dev * 1022 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1023 struct mlx5_dev_spawn_data *spawn, 1024 struct rte_eth_devargs *eth_da, 1025 struct mlx5_kvargs_ctrl *mkvlist) 1026 { 1027 const struct mlx5_switch_info *switch_info = &spawn->info; 1028 struct mlx5_dev_ctx_shared *sh = NULL; 1029 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1030 struct rte_eth_dev *eth_dev = NULL; 1031 struct mlx5_priv *priv = NULL; 1032 int err = 0; 1033 struct rte_ether_addr mac; 1034 char name[RTE_ETH_NAME_MAX_LEN]; 1035 int own_domain_id = 0; 1036 uint16_t port_id; 1037 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1038 int nl_rdma; 1039 int i; 1040 1041 /* Determine if this port representor is supposed to be spawned. */ 1042 if (switch_info->representor && dpdk_dev->devargs && 1043 !mlx5_representor_match(spawn, eth_da)) 1044 return NULL; 1045 /* Build device name. */ 1046 if (spawn->pf_bond < 0) { 1047 /* Single device. */ 1048 if (!switch_info->representor) 1049 strlcpy(name, dpdk_dev->name, sizeof(name)); 1050 else 1051 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1052 dpdk_dev->name, 1053 switch_info->name_type == 1054 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1055 switch_info->port_name); 1056 } else { 1057 /* Bonding device. */ 1058 if (!switch_info->representor) { 1059 err = snprintf(name, sizeof(name), "%s_%s", 1060 dpdk_dev->name, spawn->phys_dev_name); 1061 } else { 1062 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1063 dpdk_dev->name, spawn->phys_dev_name, 1064 switch_info->ctrl_num, 1065 switch_info->pf_num, 1066 switch_info->name_type == 1067 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1068 switch_info->port_name); 1069 } 1070 } 1071 if (err >= (int)sizeof(name)) 1072 DRV_LOG(WARNING, "device name overflow %s", name); 1073 /* check if the device is already spawned */ 1074 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1075 /* 1076 * When device is already spawned, its devargs should be set 1077 * as used. otherwise, mlx5_kvargs_validate() will fail. 1078 */ 1079 if (mkvlist) 1080 mlx5_port_args_set_used(name, port_id, mkvlist); 1081 rte_errno = EEXIST; 1082 return NULL; 1083 } 1084 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1085 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1086 struct mlx5_mp_id mp_id; 1087 int fd; 1088 1089 eth_dev = rte_eth_dev_attach_secondary(name); 1090 if (eth_dev == NULL) { 1091 DRV_LOG(ERR, "can not attach rte ethdev"); 1092 rte_errno = ENOMEM; 1093 return NULL; 1094 } 1095 eth_dev->device = dpdk_dev; 1096 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1097 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1098 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1099 err = mlx5_proc_priv_init(eth_dev); 1100 if (err) 1101 return NULL; 1102 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1103 /* Receive command fd from primary process */ 1104 fd = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1105 if (fd < 0) 1106 goto err_secondary; 1107 /* Remap UAR for Tx queues. */ 1108 err = mlx5_tx_uar_init_secondary(eth_dev, fd); 1109 close(fd); 1110 if (err) 1111 goto err_secondary; 1112 /* 1113 * Ethdev pointer is still required as input since 1114 * the primary device is not accessible from the 1115 * secondary process. 1116 */ 1117 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1118 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1119 return eth_dev; 1120 err_secondary: 1121 mlx5_dev_close(eth_dev); 1122 return NULL; 1123 } 1124 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1125 if (!sh) 1126 return NULL; 1127 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1128 /* Check port status. */ 1129 if (spawn->phys_port <= UINT8_MAX) { 1130 /* Legacy Verbs api only support u8 port number. */ 1131 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1132 &port_attr); 1133 if (err) { 1134 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1135 goto error; 1136 } 1137 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1138 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1139 err = EINVAL; 1140 goto error; 1141 } 1142 } else if (nl_rdma >= 0) { 1143 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1144 err = mlx5_nl_port_state(nl_rdma, 1145 spawn->phys_dev_name, 1146 spawn->phys_port); 1147 if (err < 0) { 1148 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1149 strerror(rte_errno)); 1150 err = -rte_errno; 1151 goto error; 1152 } 1153 port_attr.state = (enum ibv_port_state)err; 1154 } 1155 if (port_attr.state != IBV_PORT_ACTIVE) 1156 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1157 mlx5_glue->port_state_str(port_attr.state), 1158 port_attr.state); 1159 /* Allocate private eth device data. */ 1160 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1161 sizeof(*priv), 1162 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1163 if (priv == NULL) { 1164 DRV_LOG(ERR, "priv allocation failure"); 1165 err = ENOMEM; 1166 goto error; 1167 } 1168 /* 1169 * When user configures remote PD and CTX and device creates RxQ by 1170 * DevX, external RxQ is both supported and requested. 1171 */ 1172 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1173 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1174 sizeof(struct mlx5_external_rxq) * 1175 MLX5_MAX_EXT_RX_QUEUES, 0, 1176 SOCKET_ID_ANY); 1177 if (priv->ext_rxqs == NULL) { 1178 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1179 err = ENOMEM; 1180 goto error; 1181 } 1182 DRV_LOG(DEBUG, "External RxQ is supported."); 1183 } 1184 priv->sh = sh; 1185 priv->dev_port = spawn->phys_port; 1186 priv->pci_dev = spawn->pci_dev; 1187 priv->mtu = RTE_ETHER_MTU; 1188 /* Some internal functions rely on Netlink sockets, open them now. */ 1189 priv->nl_socket_rdma = nl_rdma; 1190 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1191 priv->representor = !!switch_info->representor; 1192 priv->master = !!switch_info->master; 1193 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1194 priv->vport_meta_tag = 0; 1195 priv->vport_meta_mask = 0; 1196 priv->pf_bond = spawn->pf_bond; 1197 1198 DRV_LOG(DEBUG, 1199 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1200 priv->dev_port, dpdk_dev->bus->name, 1201 priv->pci_dev ? priv->pci_dev->name : "NONE", 1202 priv->master, priv->representor, priv->pf_bond); 1203 1204 /* 1205 * If we have E-Switch we should determine the vport attributes. 1206 * E-Switch may use either source vport field or reg_c[0] metadata 1207 * register to match on vport index. The engaged part of metadata 1208 * register is defined by mask. 1209 */ 1210 if (sh->esw_mode) { 1211 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1212 spawn->phys_port, 1213 &vport_info); 1214 if (err) { 1215 DRV_LOG(WARNING, 1216 "Cannot query devx port %d on device %s", 1217 spawn->phys_port, spawn->phys_dev_name); 1218 vport_info.query_flags = 0; 1219 } 1220 } 1221 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1222 priv->vport_meta_tag = vport_info.vport_meta_tag; 1223 priv->vport_meta_mask = vport_info.vport_meta_mask; 1224 if (!priv->vport_meta_mask) { 1225 DRV_LOG(ERR, 1226 "vport zero mask for port %d on bonding device %s", 1227 spawn->phys_port, spawn->phys_dev_name); 1228 err = ENOTSUP; 1229 goto error; 1230 } 1231 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1232 DRV_LOG(ERR, 1233 "Invalid vport tag for port %d on bonding device %s", 1234 spawn->phys_port, spawn->phys_dev_name); 1235 err = ENOTSUP; 1236 goto error; 1237 } 1238 } 1239 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1240 priv->vport_id = vport_info.vport_id; 1241 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1242 DRV_LOG(ERR, 1243 "Cannot deduce vport index for port %d on bonding device %s", 1244 spawn->phys_port, spawn->phys_dev_name); 1245 err = ENOTSUP; 1246 goto error; 1247 } else { 1248 /* 1249 * Suppose vport index in compatible way. Kernel/rdma_core 1250 * support single E-Switch per PF configurations only and 1251 * vport_id field contains the vport index for associated VF, 1252 * which is deduced from representor port name. 1253 * For example, let's have the IB device port 10, it has 1254 * attached network device eth0, which has port name attribute 1255 * pf0vf2, we can deduce the VF number as 2, and set vport index 1256 * as 3 (2+1). This assigning schema should be changed if the 1257 * multiple E-Switch instances per PF configurations or/and PCI 1258 * subfunctions are added. 1259 */ 1260 priv->vport_id = switch_info->representor ? 1261 switch_info->port_name + 1 : -1; 1262 } 1263 priv->representor_id = mlx5_representor_id_encode(switch_info, 1264 eth_da->type); 1265 /* 1266 * Look for sibling devices in order to reuse their switch domain 1267 * if any, otherwise allocate one. 1268 */ 1269 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1270 const struct mlx5_priv *opriv = 1271 rte_eth_devices[port_id].data->dev_private; 1272 1273 if (!opriv || 1274 opriv->sh != priv->sh || 1275 opriv->domain_id == 1276 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1277 continue; 1278 priv->domain_id = opriv->domain_id; 1279 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1280 priv->dev_port, priv->domain_id); 1281 break; 1282 } 1283 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1284 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1285 if (err) { 1286 err = rte_errno; 1287 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1288 strerror(rte_errno)); 1289 goto error; 1290 } 1291 own_domain_id = 1; 1292 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1293 priv->dev_port, priv->domain_id); 1294 } 1295 if (sh->cdev->config.devx) { 1296 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1297 1298 sh->steering_format_version = hca_attr->steering_format_version; 1299 #if defined(HAVE_MLX5DV_DR) && \ 1300 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ 1301 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) 1302 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1303 sh->config.dv_flow_en) { 1304 uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; 1305 /* 1306 * Meter needs two REG_C's for color match and pre-sfx 1307 * flow match. Here get the REG_C for color match. 1308 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1309 */ 1310 reg_c_mask &= 0xfc; 1311 if (__builtin_popcount(reg_c_mask) < 1) { 1312 priv->mtr_en = 0; 1313 DRV_LOG(WARNING, "No available register for" 1314 " meter."); 1315 } else { 1316 /* 1317 * The meter color register is used by the 1318 * flow-hit feature as well. 1319 * The flow-hit feature must use REG_C_3 1320 * Prefer REG_C_3 if it is available. 1321 */ 1322 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 1323 priv->mtr_color_reg = REG_C_3; 1324 else 1325 priv->mtr_color_reg = ffs(reg_c_mask) 1326 - 1 + REG_C_0; 1327 priv->mtr_en = 1; 1328 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1329 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1330 priv->mtr_color_reg); 1331 } 1332 } 1333 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1334 uint32_t log_obj_size = 1335 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1336 if (log_obj_size >= 1337 hca_attr->qos.log_meter_aso_granularity && 1338 log_obj_size <= 1339 hca_attr->qos.log_meter_aso_max_alloc) 1340 sh->meter_aso_en = 1; 1341 } 1342 if (priv->mtr_en) { 1343 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1344 if (err) { 1345 err = -err; 1346 goto error; 1347 } 1348 } 1349 if (hca_attr->flow.tunnel_header_0_1) 1350 sh->tunnel_header_0_1 = 1; 1351 if (hca_attr->flow.tunnel_header_2_3) 1352 sh->tunnel_header_2_3 = 1; 1353 #endif 1354 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1355 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { 1356 sh->flow_hit_aso_en = 1; 1357 err = mlx5_flow_aso_age_mng_init(sh); 1358 if (err) { 1359 err = -err; 1360 goto error; 1361 } 1362 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1363 } 1364 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1365 #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1366 defined (HAVE_MLX5_DR_ACTION_ASO_CT) 1367 /* HWS create CT ASO SQ based on HWS configure queue number. */ 1368 if (sh->config.dv_flow_en != 2 && 1369 hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { 1370 err = mlx5_flow_aso_ct_mng_init(sh); 1371 if (err) { 1372 err = -err; 1373 goto error; 1374 } 1375 DRV_LOG(DEBUG, "CT ASO is supported."); 1376 sh->ct_aso_en = 1; 1377 } 1378 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1379 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1380 if (hca_attr->log_max_ft_sampler_num > 0 && 1381 sh->config.dv_flow_en) { 1382 priv->sampler_en = 1; 1383 DRV_LOG(DEBUG, "Sampler enabled!"); 1384 } else { 1385 priv->sampler_en = 0; 1386 if (!hca_attr->log_max_ft_sampler_num) 1387 DRV_LOG(WARNING, 1388 "No available register for sampler."); 1389 else 1390 DRV_LOG(DEBUG, "DV flow is not supported!"); 1391 } 1392 #endif 1393 } 1394 /* Process parameters and store port configuration on priv structure. */ 1395 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1396 if (err) { 1397 err = rte_errno; 1398 DRV_LOG(ERR, "Failed to process port configure: %s", 1399 strerror(rte_errno)); 1400 goto error; 1401 } 1402 eth_dev = rte_eth_dev_allocate(name); 1403 if (eth_dev == NULL) { 1404 DRV_LOG(ERR, "can not allocate rte ethdev"); 1405 err = ENOMEM; 1406 goto error; 1407 } 1408 if (priv->representor) { 1409 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1410 eth_dev->data->representor_id = priv->representor_id; 1411 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1412 struct mlx5_priv *opriv = 1413 rte_eth_devices[port_id].data->dev_private; 1414 if (opriv && 1415 opriv->master && 1416 opriv->domain_id == priv->domain_id && 1417 opriv->sh == priv->sh) { 1418 eth_dev->data->backer_port_id = port_id; 1419 break; 1420 } 1421 } 1422 if (port_id >= RTE_MAX_ETHPORTS) 1423 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1424 } 1425 priv->mp_id.port_id = eth_dev->data->port_id; 1426 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1427 /* 1428 * Store associated network device interface index. This index 1429 * is permanent throughout the lifetime of device. So, we may store 1430 * the ifindex here and use the cached value further. 1431 */ 1432 MLX5_ASSERT(spawn->ifindex); 1433 priv->if_index = spawn->ifindex; 1434 priv->lag_affinity_idx = sh->refcnt - 1; 1435 eth_dev->data->dev_private = priv; 1436 priv->dev_data = eth_dev->data; 1437 eth_dev->data->mac_addrs = priv->mac; 1438 eth_dev->device = dpdk_dev; 1439 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1440 /* Configure the first MAC address by default. */ 1441 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1442 DRV_LOG(ERR, 1443 "port %u cannot get MAC address, is mlx5_en" 1444 " loaded? (errno: %s)", 1445 eth_dev->data->port_id, strerror(rte_errno)); 1446 err = ENODEV; 1447 goto error; 1448 } 1449 DRV_LOG(INFO, 1450 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1451 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1452 #ifdef RTE_LIBRTE_MLX5_DEBUG 1453 { 1454 char ifname[MLX5_NAMESIZE]; 1455 1456 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1457 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1458 eth_dev->data->port_id, ifname); 1459 else 1460 DRV_LOG(DEBUG, "port %u ifname is unknown", 1461 eth_dev->data->port_id); 1462 } 1463 #endif 1464 /* Get actual MTU if possible. */ 1465 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1466 if (err) { 1467 err = rte_errno; 1468 goto error; 1469 } 1470 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1471 priv->mtu); 1472 /* Initialize burst functions to prevent crashes before link-up. */ 1473 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1474 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1475 eth_dev->dev_ops = &mlx5_dev_ops; 1476 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1477 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1478 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1479 /* Register MAC address. */ 1480 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1481 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1482 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1483 mlx5_ifindex(eth_dev), 1484 eth_dev->data->mac_addrs, 1485 MLX5_MAX_MAC_ADDRESSES); 1486 priv->ctrl_flows = 0; 1487 rte_spinlock_init(&priv->flow_list_lock); 1488 TAILQ_INIT(&priv->flow_meters); 1489 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1490 if (!priv->mtr_profile_tbl) 1491 goto error; 1492 /* Bring Ethernet device up. */ 1493 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1494 eth_dev->data->port_id); 1495 /* Read link status in case it is up and there will be no event. */ 1496 mlx5_link_update(eth_dev, 0); 1497 /* Watch LSC interrupts between port probe and port start. */ 1498 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1499 eth_dev->data->port_id; 1500 mlx5_set_link_up(eth_dev); 1501 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1502 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1503 if (sh->config.reclaim_mode) 1504 icfg[i].per_core_cache = 0; 1505 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1506 if (!priv->flows[i]) 1507 goto error; 1508 } 1509 /* Create context for virtual machine VLAN workaround. */ 1510 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1511 if (sh->config.dv_flow_en) { 1512 err = mlx5_alloc_shared_dr(priv); 1513 if (err) 1514 goto error; 1515 if (mlx5_flex_item_port_init(eth_dev) < 0) 1516 goto error; 1517 } 1518 if (mlx5_devx_obj_ops_en(sh)) { 1519 priv->obj_ops = devx_obj_ops; 1520 mlx5_queue_counter_id_prepare(eth_dev); 1521 priv->obj_ops.lb_dummy_queue_create = 1522 mlx5_rxq_ibv_obj_dummy_lb_create; 1523 priv->obj_ops.lb_dummy_queue_release = 1524 mlx5_rxq_ibv_obj_dummy_lb_release; 1525 } else if (spawn->max_port > UINT8_MAX) { 1526 /* Verbs can't support ports larger than 255 by design. */ 1527 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1528 err = ENOTSUP; 1529 goto error; 1530 } else { 1531 priv->obj_ops = ibv_obj_ops; 1532 } 1533 if (sh->config.tx_pp && 1534 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1535 /* 1536 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1537 * packet pacing and already checked above. 1538 * Hence, we should only make sure the SQs will be created 1539 * with DevX, not with Verbs. 1540 * Verbs allocates the SQ UAR on its own and it can't be shared 1541 * with Clock Queue UAR as required for Tx scheduling. 1542 */ 1543 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1544 err = ENODEV; 1545 goto error; 1546 } 1547 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1548 if (!priv->drop_queue.hrxq) 1549 goto error; 1550 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1551 mlx5_hrxq_create_cb, 1552 mlx5_hrxq_match_cb, 1553 mlx5_hrxq_remove_cb, 1554 mlx5_hrxq_clone_cb, 1555 mlx5_hrxq_clone_free_cb); 1556 if (!priv->hrxqs) 1557 goto error; 1558 mlx5_set_metadata_mask(eth_dev); 1559 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1560 !priv->sh->dv_regc0_mask) { 1561 DRV_LOG(ERR, "metadata mode %u is not supported " 1562 "(no metadata reg_c[0] is available)", 1563 sh->config.dv_xmeta_en); 1564 err = ENOTSUP; 1565 goto error; 1566 } 1567 rte_rwlock_init(&priv->ind_tbls_lock); 1568 if (priv->sh->config.dv_flow_en == 2) { 1569 #ifdef HAVE_MLX5_HWS_SUPPORT 1570 if (priv->sh->config.dv_esw_en) { 1571 uint32_t usable_bits; 1572 uint32_t required_bits; 1573 1574 if (priv->sh->dv_regc0_mask == UINT32_MAX) { 1575 DRV_LOG(ERR, "E-Switch port metadata is required when using HWS " 1576 "but it is disabled (configure it through devlink)"); 1577 err = ENOTSUP; 1578 goto error; 1579 } 1580 if (priv->sh->dv_regc0_mask == 0) { 1581 DRV_LOG(ERR, "E-Switch with HWS is not supported " 1582 "(no available bits in reg_c[0])"); 1583 err = ENOTSUP; 1584 goto error; 1585 } 1586 usable_bits = __builtin_popcount(priv->sh->dv_regc0_mask); 1587 required_bits = __builtin_popcount(priv->vport_meta_mask); 1588 if (usable_bits < required_bits) { 1589 DRV_LOG(ERR, "Not enough bits available in reg_c[0] to provide " 1590 "representor matching."); 1591 err = ENOTSUP; 1592 goto error; 1593 } 1594 } 1595 if (priv->vport_meta_mask) 1596 flow_hw_set_port_info(eth_dev); 1597 if (priv->sh->config.dv_esw_en && 1598 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1599 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) { 1600 DRV_LOG(ERR, 1601 "metadata mode %u is not supported in HWS eswitch mode", 1602 priv->sh->config.dv_xmeta_en); 1603 err = ENOTSUP; 1604 goto error; 1605 } 1606 /* Only HWS requires this information. */ 1607 flow_hw_init_tags_set(eth_dev); 1608 flow_hw_init_flow_metadata_config(eth_dev); 1609 if (priv->sh->config.dv_esw_en && 1610 flow_hw_create_vport_action(eth_dev)) { 1611 DRV_LOG(ERR, "port %u failed to create vport action", 1612 eth_dev->data->port_id); 1613 err = EINVAL; 1614 goto error; 1615 } 1616 return eth_dev; 1617 #else 1618 DRV_LOG(ERR, "DV support is missing for HWS."); 1619 goto error; 1620 #endif 1621 } 1622 if (!priv->sh->flow_priority_check_flag) { 1623 /* Supported Verbs flow priority number detection. */ 1624 err = mlx5_flow_discover_priorities(eth_dev); 1625 priv->sh->flow_max_priority = err; 1626 priv->sh->flow_priority_check_flag = 1; 1627 } else { 1628 err = priv->sh->flow_max_priority; 1629 } 1630 if (err < 0) { 1631 err = -err; 1632 goto error; 1633 } 1634 /* Query availability of metadata reg_c's. */ 1635 if (!priv->sh->metadata_regc_check_flag) { 1636 err = mlx5_flow_discover_mreg_c(eth_dev); 1637 if (err < 0) { 1638 err = -err; 1639 goto error; 1640 } 1641 } 1642 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1643 DRV_LOG(DEBUG, 1644 "port %u extensive metadata register is not supported", 1645 eth_dev->data->port_id); 1646 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1647 DRV_LOG(ERR, "metadata mode %u is not supported " 1648 "(no metadata registers available)", 1649 sh->config.dv_xmeta_en); 1650 err = ENOTSUP; 1651 goto error; 1652 } 1653 } 1654 if (sh->config.dv_flow_en && 1655 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1656 mlx5_flow_ext_mreg_supported(eth_dev) && 1657 priv->sh->dv_regc0_mask) { 1658 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1659 MLX5_FLOW_MREG_HTABLE_SZ, 1660 false, true, eth_dev, 1661 flow_dv_mreg_create_cb, 1662 flow_dv_mreg_match_cb, 1663 flow_dv_mreg_remove_cb, 1664 flow_dv_mreg_clone_cb, 1665 flow_dv_mreg_clone_free_cb); 1666 if (!priv->mreg_cp_tbl) { 1667 err = ENOMEM; 1668 goto error; 1669 } 1670 } 1671 rte_spinlock_init(&priv->shared_act_sl); 1672 mlx5_flow_counter_mode_config(eth_dev); 1673 mlx5_flow_drop_action_config(eth_dev); 1674 if (sh->config.dv_flow_en) 1675 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1676 return eth_dev; 1677 error: 1678 if (priv) { 1679 #ifdef HAVE_MLX5_HWS_SUPPORT 1680 if (eth_dev && 1681 priv->sh && 1682 priv->sh->config.dv_flow_en == 2 && 1683 priv->sh->config.dv_esw_en) 1684 flow_hw_destroy_vport_action(eth_dev); 1685 #endif 1686 if (priv->mreg_cp_tbl) 1687 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1688 if (priv->sh) 1689 mlx5_os_free_shared_dr(priv); 1690 if (priv->nl_socket_route >= 0) 1691 close(priv->nl_socket_route); 1692 if (priv->vmwa_context) 1693 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1694 if (eth_dev && priv->drop_queue.hrxq) 1695 mlx5_drop_action_destroy(eth_dev); 1696 if (priv->mtr_profile_tbl) 1697 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1698 if (own_domain_id) 1699 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1700 if (priv->hrxqs) 1701 mlx5_list_destroy(priv->hrxqs); 1702 if (eth_dev && priv->flex_item_map) 1703 mlx5_flex_item_port_cleanup(eth_dev); 1704 mlx5_free(priv->ext_rxqs); 1705 mlx5_free(priv); 1706 if (eth_dev != NULL) 1707 eth_dev->data->dev_private = NULL; 1708 } 1709 if (eth_dev != NULL) { 1710 /* mac_addrs must not be freed alone because part of 1711 * dev_private 1712 **/ 1713 eth_dev->data->mac_addrs = NULL; 1714 rte_eth_dev_release_port(eth_dev); 1715 } 1716 if (sh) 1717 mlx5_free_shared_dev_ctx(sh); 1718 if (nl_rdma >= 0) 1719 close(nl_rdma); 1720 MLX5_ASSERT(err > 0); 1721 rte_errno = err; 1722 return NULL; 1723 } 1724 1725 /** 1726 * Comparison callback to sort device data. 1727 * 1728 * This is meant to be used with qsort(). 1729 * 1730 * @param a[in] 1731 * Pointer to pointer to first data object. 1732 * @param b[in] 1733 * Pointer to pointer to second data object. 1734 * 1735 * @return 1736 * 0 if both objects are equal, less than 0 if the first argument is less 1737 * than the second, greater than 0 otherwise. 1738 */ 1739 static int 1740 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1741 { 1742 const struct mlx5_switch_info *si_a = 1743 &((const struct mlx5_dev_spawn_data *)a)->info; 1744 const struct mlx5_switch_info *si_b = 1745 &((const struct mlx5_dev_spawn_data *)b)->info; 1746 int ret; 1747 1748 /* Master device first. */ 1749 ret = si_b->master - si_a->master; 1750 if (ret) 1751 return ret; 1752 /* Then representor devices. */ 1753 ret = si_b->representor - si_a->representor; 1754 if (ret) 1755 return ret; 1756 /* Unidentified devices come last in no specific order. */ 1757 if (!si_a->representor) 1758 return 0; 1759 /* Order representors by name. */ 1760 return si_a->port_name - si_b->port_name; 1761 } 1762 1763 /** 1764 * Match PCI information for possible slaves of bonding device. 1765 * 1766 * @param[in] ibdev_name 1767 * Name of Infiniband device. 1768 * @param[in] pci_dev 1769 * Pointer to primary PCI address structure to match. 1770 * @param[in] nl_rdma 1771 * Netlink RDMA group socket handle. 1772 * @param[in] owner 1773 * Representor owner PF index. 1774 * @param[out] bond_info 1775 * Pointer to bonding information. 1776 * 1777 * @return 1778 * negative value if no bonding device found, otherwise 1779 * positive index of slave PF in bonding. 1780 */ 1781 static int 1782 mlx5_device_bond_pci_match(const char *ibdev_name, 1783 const struct rte_pci_addr *pci_dev, 1784 int nl_rdma, uint16_t owner, 1785 struct mlx5_bond_info *bond_info) 1786 { 1787 char ifname[IF_NAMESIZE + 1]; 1788 unsigned int ifindex; 1789 unsigned int np, i; 1790 FILE *bond_file = NULL, *file; 1791 int pf = -1; 1792 int ret; 1793 uint8_t cur_guid[32] = {0}; 1794 uint8_t guid[32] = {0}; 1795 1796 /* 1797 * Try to get master device name. If something goes wrong suppose 1798 * the lack of kernel support and no bonding devices. 1799 */ 1800 memset(bond_info, 0, sizeof(*bond_info)); 1801 if (nl_rdma < 0) 1802 return -1; 1803 if (!strstr(ibdev_name, "bond")) 1804 return -1; 1805 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1806 if (!np) 1807 return -1; 1808 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1809 return -1; 1810 /* 1811 * The master device might not be on the predefined port(not on port 1812 * index 1, it is not guaranteed), we have to scan all Infiniband 1813 * device ports and find master. 1814 */ 1815 for (i = 1; i <= np; ++i) { 1816 /* Check whether Infiniband port is populated. */ 1817 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1818 if (!ifindex) 1819 continue; 1820 if (!if_indextoname(ifindex, ifname)) 1821 continue; 1822 /* Try to read bonding slave names from sysfs. */ 1823 MKSTR(slaves, 1824 "/sys/class/net/%s/master/bonding/slaves", ifname); 1825 bond_file = fopen(slaves, "r"); 1826 if (bond_file) 1827 break; 1828 } 1829 if (!bond_file) 1830 return -1; 1831 /* Use safe format to check maximal buffer length. */ 1832 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1833 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1834 char tmp_str[IF_NAMESIZE + 32]; 1835 struct rte_pci_addr pci_addr; 1836 struct mlx5_switch_info info; 1837 int ret; 1838 1839 /* Process slave interface names in the loop. */ 1840 snprintf(tmp_str, sizeof(tmp_str), 1841 "/sys/class/net/%s", ifname); 1842 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1843 DRV_LOG(WARNING, 1844 "Cannot get PCI address for netdev \"%s\".", 1845 ifname); 1846 continue; 1847 } 1848 /* Slave interface PCI address match found. */ 1849 snprintf(tmp_str, sizeof(tmp_str), 1850 "/sys/class/net/%s/phys_port_name", ifname); 1851 file = fopen(tmp_str, "rb"); 1852 if (!file) 1853 break; 1854 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1855 if (fscanf(file, "%32s", tmp_str) == 1) 1856 mlx5_translate_port_name(tmp_str, &info); 1857 fclose(file); 1858 /* Only process PF ports. */ 1859 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1860 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1861 continue; 1862 /* Check max bonding member. */ 1863 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1864 DRV_LOG(WARNING, "bonding index out of range, " 1865 "please increase MLX5_BOND_MAX_PORTS: %s", 1866 tmp_str); 1867 break; 1868 } 1869 /* Get ifindex. */ 1870 snprintf(tmp_str, sizeof(tmp_str), 1871 "/sys/class/net/%s/ifindex", ifname); 1872 file = fopen(tmp_str, "rb"); 1873 if (!file) 1874 break; 1875 ret = fscanf(file, "%u", &ifindex); 1876 fclose(file); 1877 if (ret != 1) 1878 break; 1879 /* Save bonding info. */ 1880 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1881 sizeof(bond_info->ports[0].ifname)); 1882 bond_info->ports[info.port_name].pci_addr = pci_addr; 1883 bond_info->ports[info.port_name].ifindex = ifindex; 1884 bond_info->n_port++; 1885 /* 1886 * Under socket direct mode, bonding will use 1887 * system_image_guid as identification. 1888 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1889 * All bonding members should have the same guid even if driver 1890 * is using PCIe BDF. 1891 */ 1892 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1893 if (ret < 0) 1894 break; 1895 else if (ret > 0) { 1896 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1897 owner == info.port_name && 1898 (owner != 0 || (owner == 0 && 1899 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1900 pf = info.port_name; 1901 } else if (pci_dev->domain == pci_addr.domain && 1902 pci_dev->bus == pci_addr.bus && 1903 pci_dev->devid == pci_addr.devid && 1904 ((pci_dev->function == 0 && 1905 pci_dev->function + owner == pci_addr.function) || 1906 (pci_dev->function == owner && 1907 pci_addr.function == owner))) 1908 pf = info.port_name; 1909 } 1910 if (pf >= 0) { 1911 /* Get bond interface info */ 1912 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1913 bond_info->ifname); 1914 if (ret) 1915 DRV_LOG(ERR, "unable to get bond info: %s", 1916 strerror(rte_errno)); 1917 else 1918 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1919 ifindex, bond_info->ifindex, bond_info->ifname); 1920 } 1921 if (owner == 0 && pf != 0) { 1922 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", 1923 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1924 pci_dev->function); 1925 } 1926 return pf; 1927 } 1928 1929 /** 1930 * Register a PCI device within bonding. 1931 * 1932 * This function spawns Ethernet devices out of a given PCI device and 1933 * bonding owner PF index. 1934 * 1935 * @param[in] cdev 1936 * Pointer to common mlx5 device structure. 1937 * @param[in] req_eth_da 1938 * Requested ethdev device argument. 1939 * @param[in] owner_id 1940 * Requested owner PF port ID within bonding device, default to 0. 1941 * @param[in, out] mkvlist 1942 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1943 * 1944 * @return 1945 * 0 on success, a negative errno value otherwise and rte_errno is set. 1946 */ 1947 static int 1948 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 1949 struct rte_eth_devargs *req_eth_da, 1950 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 1951 { 1952 struct ibv_device **ibv_list; 1953 /* 1954 * Number of found IB Devices matching with requested PCI BDF. 1955 * nd != 1 means there are multiple IB devices over the same 1956 * PCI device and we have representors and master. 1957 */ 1958 unsigned int nd = 0; 1959 /* 1960 * Number of found IB device Ports. nd = 1 and np = 1..n means 1961 * we have the single multiport IB device, and there may be 1962 * representors attached to some of found ports. 1963 */ 1964 unsigned int np = 0; 1965 /* 1966 * Number of DPDK ethernet devices to Spawn - either over 1967 * multiple IB devices or multiple ports of single IB device. 1968 * Actually this is the number of iterations to spawn. 1969 */ 1970 unsigned int ns = 0; 1971 /* 1972 * Bonding device 1973 * < 0 - no bonding device (single one) 1974 * >= 0 - bonding device (value is slave PF index) 1975 */ 1976 int bd = -1; 1977 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 1978 struct mlx5_dev_spawn_data *list = NULL; 1979 struct rte_eth_devargs eth_da = *req_eth_da; 1980 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 1981 struct mlx5_bond_info bond_info; 1982 int ret = -1; 1983 1984 errno = 0; 1985 ibv_list = mlx5_glue->get_device_list(&ret); 1986 if (!ibv_list) { 1987 rte_errno = errno ? errno : ENOSYS; 1988 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 1989 return -rte_errno; 1990 } 1991 /* 1992 * First scan the list of all Infiniband devices to find 1993 * matching ones, gathering into the list. 1994 */ 1995 struct ibv_device *ibv_match[ret + 1]; 1996 int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1997 int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1998 unsigned int i; 1999 2000 while (ret-- > 0) { 2001 struct rte_pci_addr pci_addr; 2002 2003 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 2004 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 2005 nl_rdma, owner_id, &bond_info); 2006 if (bd >= 0) { 2007 /* 2008 * Bonding device detected. Only one match is allowed, 2009 * the bonding is supported over multi-port IB device, 2010 * there should be no matches on representor PCI 2011 * functions or non VF LAG bonding devices with 2012 * specified address. 2013 */ 2014 if (nd) { 2015 DRV_LOG(ERR, 2016 "multiple PCI match on bonding device" 2017 "\"%s\" found", ibv_list[ret]->name); 2018 rte_errno = ENOENT; 2019 ret = -rte_errno; 2020 goto exit; 2021 } 2022 /* Amend owner pci address if owner PF ID specified. */ 2023 if (eth_da.nb_representor_ports) 2024 owner_pci.function += owner_id; 2025 DRV_LOG(INFO, 2026 "PCI information matches for slave %d bonding device \"%s\"", 2027 bd, ibv_list[ret]->name); 2028 ibv_match[nd++] = ibv_list[ret]; 2029 break; 2030 } else { 2031 /* Bonding device not found. */ 2032 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 2033 &pci_addr)) 2034 continue; 2035 if (owner_pci.domain != pci_addr.domain || 2036 owner_pci.bus != pci_addr.bus || 2037 owner_pci.devid != pci_addr.devid || 2038 owner_pci.function != pci_addr.function) 2039 continue; 2040 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 2041 ibv_list[ret]->name); 2042 ibv_match[nd++] = ibv_list[ret]; 2043 } 2044 } 2045 ibv_match[nd] = NULL; 2046 if (!nd) { 2047 /* No device matches, just complain and bail out. */ 2048 DRV_LOG(WARNING, 2049 "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT "," 2050 " are kernel drivers loaded?", 2051 owner_id, owner_pci.domain, owner_pci.bus, 2052 owner_pci.devid, owner_pci.function); 2053 rte_errno = ENOENT; 2054 ret = -rte_errno; 2055 goto exit; 2056 } 2057 if (nd == 1) { 2058 /* 2059 * Found single matching device may have multiple ports. 2060 * Each port may be representor, we have to check the port 2061 * number and check the representors existence. 2062 */ 2063 if (nl_rdma >= 0) 2064 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 2065 if (!np) 2066 DRV_LOG(WARNING, 2067 "Cannot get IB device \"%s\" ports number.", 2068 ibv_match[0]->name); 2069 if (bd >= 0 && !np) { 2070 DRV_LOG(ERR, "Cannot get ports for bonding device."); 2071 rte_errno = ENOENT; 2072 ret = -rte_errno; 2073 goto exit; 2074 } 2075 } 2076 /* Now we can determine the maximal amount of devices to be spawned. */ 2077 list = mlx5_malloc(MLX5_MEM_ZERO, 2078 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2079 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2080 if (!list) { 2081 DRV_LOG(ERR, "Spawn data array allocation failure."); 2082 rte_errno = ENOMEM; 2083 ret = -rte_errno; 2084 goto exit; 2085 } 2086 if (bd >= 0 || np > 1) { 2087 /* 2088 * Single IB device with multiple ports found, 2089 * it may be E-Switch master device and representors. 2090 * We have to perform identification through the ports. 2091 */ 2092 MLX5_ASSERT(nl_rdma >= 0); 2093 MLX5_ASSERT(ns == 0); 2094 MLX5_ASSERT(nd == 1); 2095 MLX5_ASSERT(np); 2096 for (i = 1; i <= np; ++i) { 2097 list[ns].bond_info = &bond_info; 2098 list[ns].max_port = np; 2099 list[ns].phys_port = i; 2100 list[ns].phys_dev_name = ibv_match[0]->name; 2101 list[ns].eth_dev = NULL; 2102 list[ns].pci_dev = pci_dev; 2103 list[ns].cdev = cdev; 2104 list[ns].pf_bond = bd; 2105 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2106 ibv_match[0]->name, 2107 i); 2108 if (!list[ns].ifindex) { 2109 /* 2110 * No network interface index found for the 2111 * specified port, it means there is no 2112 * representor on this port. It's OK, 2113 * there can be disabled ports, for example 2114 * if sriov_numvfs < sriov_totalvfs. 2115 */ 2116 continue; 2117 } 2118 ret = -1; 2119 if (nl_route >= 0) 2120 ret = mlx5_nl_switch_info(nl_route, 2121 list[ns].ifindex, 2122 &list[ns].info); 2123 if (ret || (!list[ns].info.representor && 2124 !list[ns].info.master)) { 2125 /* 2126 * We failed to recognize representors with 2127 * Netlink, let's try to perform the task 2128 * with sysfs. 2129 */ 2130 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2131 &list[ns].info); 2132 } 2133 if (!ret && bd >= 0) { 2134 switch (list[ns].info.name_type) { 2135 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2136 if (np == 1) { 2137 /* 2138 * Force standalone bonding 2139 * device for ROCE LAG 2140 * configurations. 2141 */ 2142 list[ns].info.master = 0; 2143 list[ns].info.representor = 0; 2144 } 2145 if (list[ns].info.port_name == bd) 2146 ns++; 2147 break; 2148 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2149 /* Fallthrough */ 2150 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2151 /* Fallthrough */ 2152 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2153 if (list[ns].info.pf_num == bd) 2154 ns++; 2155 break; 2156 default: 2157 break; 2158 } 2159 continue; 2160 } 2161 if (!ret && (list[ns].info.representor ^ 2162 list[ns].info.master)) 2163 ns++; 2164 } 2165 if (!ns) { 2166 DRV_LOG(ERR, 2167 "Unable to recognize master/representors on the IB device with multiple ports."); 2168 rte_errno = ENOENT; 2169 ret = -rte_errno; 2170 goto exit; 2171 } 2172 } else { 2173 /* 2174 * The existence of several matching entries (nd > 1) means 2175 * port representors have been instantiated. No existing Verbs 2176 * call nor sysfs entries can tell them apart, this can only 2177 * be done through Netlink calls assuming kernel drivers are 2178 * recent enough to support them. 2179 * 2180 * In the event of identification failure through Netlink, 2181 * try again through sysfs, then: 2182 * 2183 * 1. A single IB device matches (nd == 1) with single 2184 * port (np=0/1) and is not a representor, assume 2185 * no switch support. 2186 * 2187 * 2. Otherwise no safe assumptions can be made; 2188 * complain louder and bail out. 2189 */ 2190 for (i = 0; i != nd; ++i) { 2191 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2192 list[ns].bond_info = NULL; 2193 list[ns].max_port = 1; 2194 list[ns].phys_port = 1; 2195 list[ns].phys_dev_name = ibv_match[i]->name; 2196 list[ns].eth_dev = NULL; 2197 list[ns].pci_dev = pci_dev; 2198 list[ns].cdev = cdev; 2199 list[ns].pf_bond = -1; 2200 list[ns].ifindex = 0; 2201 if (nl_rdma >= 0) 2202 list[ns].ifindex = mlx5_nl_ifindex 2203 (nl_rdma, 2204 ibv_match[i]->name, 2205 1); 2206 if (!list[ns].ifindex) { 2207 char ifname[IF_NAMESIZE]; 2208 2209 /* 2210 * Netlink failed, it may happen with old 2211 * ib_core kernel driver (before 4.16). 2212 * We can assume there is old driver because 2213 * here we are processing single ports IB 2214 * devices. Let's try sysfs to retrieve 2215 * the ifindex. The method works for 2216 * master device only. 2217 */ 2218 if (nd > 1) { 2219 /* 2220 * Multiple devices found, assume 2221 * representors, can not distinguish 2222 * master/representor and retrieve 2223 * ifindex via sysfs. 2224 */ 2225 continue; 2226 } 2227 ret = mlx5_get_ifname_sysfs 2228 (ibv_match[i]->ibdev_path, ifname); 2229 if (!ret) 2230 list[ns].ifindex = 2231 if_nametoindex(ifname); 2232 if (!list[ns].ifindex) { 2233 /* 2234 * No network interface index found 2235 * for the specified device, it means 2236 * there it is neither representor 2237 * nor master. 2238 */ 2239 continue; 2240 } 2241 } 2242 ret = -1; 2243 if (nl_route >= 0) 2244 ret = mlx5_nl_switch_info(nl_route, 2245 list[ns].ifindex, 2246 &list[ns].info); 2247 if (ret || (!list[ns].info.representor && 2248 !list[ns].info.master)) { 2249 /* 2250 * We failed to recognize representors with 2251 * Netlink, let's try to perform the task 2252 * with sysfs. 2253 */ 2254 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2255 &list[ns].info); 2256 } 2257 if (!ret && (list[ns].info.representor ^ 2258 list[ns].info.master)) { 2259 ns++; 2260 } else if ((nd == 1) && 2261 !list[ns].info.representor && 2262 !list[ns].info.master) { 2263 /* 2264 * Single IB device with one physical port and 2265 * attached network device. 2266 * May be SRIOV is not enabled or there is no 2267 * representors. 2268 */ 2269 DRV_LOG(INFO, "No E-Switch support detected."); 2270 ns++; 2271 break; 2272 } 2273 } 2274 if (!ns) { 2275 DRV_LOG(ERR, 2276 "Unable to recognize master/representors on the multiple IB devices."); 2277 rte_errno = ENOENT; 2278 ret = -rte_errno; 2279 goto exit; 2280 } 2281 /* 2282 * New kernels may add the switch_id attribute for the case 2283 * there is no E-Switch and we wrongly recognized the only 2284 * device as master. Override this if there is the single 2285 * device with single port and new device name format present. 2286 */ 2287 if (nd == 1 && 2288 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2289 list[0].info.master = 0; 2290 list[0].info.representor = 0; 2291 } 2292 } 2293 MLX5_ASSERT(ns); 2294 /* 2295 * Sort list to probe devices in natural order for users convenience 2296 * (i.e. master first, then representors from lowest to highest ID). 2297 */ 2298 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2299 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2300 /* Set devargs default values. */ 2301 if (eth_da.nb_mh_controllers == 0) { 2302 eth_da.nb_mh_controllers = 1; 2303 eth_da.mh_controllers[0] = 0; 2304 } 2305 if (eth_da.nb_ports == 0 && ns > 0) { 2306 if (list[0].pf_bond >= 0 && list[0].info.representor) 2307 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2308 pci_dev->device.devargs->args); 2309 eth_da.nb_ports = 1; 2310 eth_da.ports[0] = list[0].info.pf_num; 2311 } 2312 if (eth_da.nb_representor_ports == 0) { 2313 eth_da.nb_representor_ports = 1; 2314 eth_da.representor_ports[0] = 0; 2315 } 2316 } 2317 for (i = 0; i != ns; ++i) { 2318 uint32_t restore; 2319 2320 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2321 mkvlist); 2322 if (!list[i].eth_dev) { 2323 if (rte_errno != EBUSY && rte_errno != EEXIST) 2324 break; 2325 /* Device is disabled or already spawned. Ignore it. */ 2326 continue; 2327 } 2328 restore = list[i].eth_dev->data->dev_flags; 2329 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2330 /** 2331 * Each representor has a dedicated interrupts vector. 2332 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2333 * representor eth_dev object because representor and PF 2334 * share the same PCI address. 2335 * Override representor device with a dedicated 2336 * interrupts handle here. 2337 * Representor interrupts handle is released in mlx5_dev_stop(). 2338 */ 2339 if (list[i].info.representor) { 2340 struct rte_intr_handle *intr_handle = 2341 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2342 if (intr_handle == NULL) { 2343 DRV_LOG(ERR, 2344 "port %u failed to allocate memory for interrupt handler " 2345 "Rx interrupts will not be supported", 2346 i); 2347 rte_errno = ENOMEM; 2348 ret = -rte_errno; 2349 goto exit; 2350 } 2351 list[i].eth_dev->intr_handle = intr_handle; 2352 } 2353 /* Restore non-PCI flags cleared by the above call. */ 2354 list[i].eth_dev->data->dev_flags |= restore; 2355 rte_eth_dev_probing_finish(list[i].eth_dev); 2356 } 2357 if (i != ns) { 2358 DRV_LOG(ERR, 2359 "probe of PCI device " PCI_PRI_FMT " aborted after" 2360 " encountering an error: %s", 2361 owner_pci.domain, owner_pci.bus, 2362 owner_pci.devid, owner_pci.function, 2363 strerror(rte_errno)); 2364 ret = -rte_errno; 2365 /* Roll back. */ 2366 while (i--) { 2367 if (!list[i].eth_dev) 2368 continue; 2369 mlx5_dev_close(list[i].eth_dev); 2370 /* mac_addrs must not be freed because in dev_private */ 2371 list[i].eth_dev->data->mac_addrs = NULL; 2372 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2373 } 2374 /* Restore original error. */ 2375 rte_errno = -ret; 2376 } else { 2377 ret = 0; 2378 } 2379 exit: 2380 /* 2381 * Do the routine cleanup: 2382 * - close opened Netlink sockets 2383 * - free allocated spawn data array 2384 * - free the Infiniband device list 2385 */ 2386 if (nl_rdma >= 0) 2387 close(nl_rdma); 2388 if (nl_route >= 0) 2389 close(nl_route); 2390 if (list) 2391 mlx5_free(list); 2392 MLX5_ASSERT(ibv_list); 2393 mlx5_glue->free_device_list(ibv_list); 2394 return ret; 2395 } 2396 2397 static int 2398 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2399 struct rte_eth_devargs *eth_da) 2400 { 2401 int ret = 0; 2402 2403 if (dev->devargs == NULL) 2404 return 0; 2405 memset(eth_da, 0, sizeof(*eth_da)); 2406 /* Parse representor information first from class argument. */ 2407 if (dev->devargs->cls_str) 2408 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2409 if (ret != 0) { 2410 DRV_LOG(ERR, "failed to parse device arguments: %s", 2411 dev->devargs->cls_str); 2412 return -rte_errno; 2413 } 2414 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) { 2415 /* Parse legacy device argument */ 2416 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2417 if (ret) { 2418 DRV_LOG(ERR, "failed to parse device arguments: %s", 2419 dev->devargs->args); 2420 return -rte_errno; 2421 } 2422 } 2423 return 0; 2424 } 2425 2426 /** 2427 * Callback to register a PCI device. 2428 * 2429 * This function spawns Ethernet devices out of a given PCI device. 2430 * 2431 * @param[in] cdev 2432 * Pointer to common mlx5 device structure. 2433 * @param[in, out] mkvlist 2434 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2435 * 2436 * @return 2437 * 0 on success, a negative errno value otherwise and rte_errno is set. 2438 */ 2439 static int 2440 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2441 struct mlx5_kvargs_ctrl *mkvlist) 2442 { 2443 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2444 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2445 int ret = 0; 2446 uint16_t p; 2447 2448 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2449 if (ret != 0) 2450 return ret; 2451 2452 if (eth_da.nb_ports > 0) { 2453 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2454 for (p = 0; p < eth_da.nb_ports; p++) { 2455 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2456 eth_da.ports[p], mkvlist); 2457 if (ret) { 2458 DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " " 2459 "aborted due to proding failure of PF %u", 2460 pci_dev->addr.domain, pci_dev->addr.bus, 2461 pci_dev->addr.devid, pci_dev->addr.function, 2462 eth_da.ports[p]); 2463 mlx5_net_remove(cdev); 2464 if (p != 0) 2465 break; 2466 } 2467 } 2468 } else { 2469 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2470 } 2471 return ret; 2472 } 2473 2474 /* Probe a single SF device on auxiliary bus, no representor support. */ 2475 static int 2476 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2477 struct mlx5_kvargs_ctrl *mkvlist) 2478 { 2479 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2480 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 2481 struct rte_device *dev = cdev->dev; 2482 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2483 struct rte_eth_dev *eth_dev; 2484 int ret = 0; 2485 2486 /* Parse ethdev devargs. */ 2487 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2488 if (ret != 0) 2489 return ret; 2490 /* Init spawn data. */ 2491 spawn.max_port = 1; 2492 spawn.phys_port = 1; 2493 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2494 ret = mlx5_auxiliary_get_ifindex(dev->name); 2495 if (ret < 0) { 2496 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2497 return ret; 2498 } 2499 spawn.ifindex = ret; 2500 spawn.cdev = cdev; 2501 /* Spawn device. */ 2502 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2503 if (eth_dev == NULL) 2504 return -rte_errno; 2505 /* Post create. */ 2506 eth_dev->intr_handle = adev->intr_handle; 2507 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2508 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2509 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2510 eth_dev->data->numa_node = dev->numa_node; 2511 } 2512 rte_eth_dev_probing_finish(eth_dev); 2513 return 0; 2514 } 2515 2516 /** 2517 * Net class driver callback to probe a device. 2518 * 2519 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2520 * 2521 * @param[in] cdev 2522 * Pointer to the common mlx5 device. 2523 * @param[in, out] mkvlist 2524 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2525 * 2526 * @return 2527 * 0 on success, a negative errno value otherwise and rte_errno is set. 2528 */ 2529 int 2530 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2531 struct mlx5_kvargs_ctrl *mkvlist) 2532 { 2533 int ret; 2534 2535 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2536 mlx5_pmd_socket_init(); 2537 ret = mlx5_init_once(); 2538 if (ret) { 2539 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2540 strerror(rte_errno)); 2541 return -rte_errno; 2542 } 2543 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2544 if (ret) { 2545 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2546 strerror(rte_errno)); 2547 return -rte_errno; 2548 } 2549 if (mlx5_dev_is_pci(cdev->dev)) 2550 return mlx5_os_pci_probe(cdev, mkvlist); 2551 else 2552 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2553 } 2554 2555 /** 2556 * Cleanup resources when the last device is closed. 2557 */ 2558 void 2559 mlx5_os_net_cleanup(void) 2560 { 2561 mlx5_pmd_socket_uninit(); 2562 } 2563 2564 /** 2565 * Install shared asynchronous device events handler. 2566 * This function is implemented to support event sharing 2567 * between multiple ports of single IB device. 2568 * 2569 * @param sh 2570 * Pointer to mlx5_dev_ctx_shared object. 2571 */ 2572 void 2573 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2574 { 2575 struct ibv_context *ctx = sh->cdev->ctx; 2576 int nlsk_fd; 2577 2578 sh->intr_handle = mlx5_os_interrupt_handler_create 2579 (RTE_INTR_INSTANCE_F_SHARED, true, 2580 ctx->async_fd, mlx5_dev_interrupt_handler, sh); 2581 if (!sh->intr_handle) { 2582 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2583 return; 2584 } 2585 nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK); 2586 if (nlsk_fd < 0) { 2587 DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s", 2588 rte_strerror(rte_errno)); 2589 return; 2590 } 2591 sh->intr_handle_nl = mlx5_os_interrupt_handler_create 2592 (RTE_INTR_INSTANCE_F_SHARED, true, 2593 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh); 2594 if (sh->intr_handle_nl == NULL) { 2595 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2596 return; 2597 } 2598 if (sh->cdev->config.devx) { 2599 #ifdef HAVE_IBV_DEVX_ASYNC 2600 struct mlx5dv_devx_cmd_comp *devx_comp; 2601 2602 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2603 devx_comp = sh->devx_comp; 2604 if (!devx_comp) { 2605 DRV_LOG(INFO, "failed to allocate devx_comp."); 2606 return; 2607 } 2608 sh->intr_handle_devx = mlx5_os_interrupt_handler_create 2609 (RTE_INTR_INSTANCE_F_SHARED, true, 2610 devx_comp->fd, 2611 mlx5_dev_interrupt_handler_devx, sh); 2612 if (!sh->intr_handle_devx) { 2613 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2614 return; 2615 } 2616 #endif /* HAVE_IBV_DEVX_ASYNC */ 2617 } 2618 } 2619 2620 /** 2621 * Uninstall shared asynchronous device events handler. 2622 * This function is implemented to support event sharing 2623 * between multiple ports of single IB device. 2624 * 2625 * @param dev 2626 * Pointer to mlx5_dev_ctx_shared object. 2627 */ 2628 void 2629 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2630 { 2631 mlx5_os_interrupt_handler_destroy(sh->intr_handle, 2632 mlx5_dev_interrupt_handler, sh); 2633 mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl, 2634 mlx5_dev_interrupt_handler_nl, sh); 2635 #ifdef HAVE_IBV_DEVX_ASYNC 2636 mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx, 2637 mlx5_dev_interrupt_handler_devx, sh); 2638 if (sh->devx_comp) 2639 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2640 #endif 2641 } 2642 2643 /** 2644 * Read statistics by a named counter. 2645 * 2646 * @param[in] priv 2647 * Pointer to the private device data structure. 2648 * @param[in] ctr_name 2649 * Pointer to the name of the statistic counter to read 2650 * @param[out] stat 2651 * Pointer to read statistic value. 2652 * @return 2653 * 0 on success and stat is valud, 1 if failed to read the value 2654 * rte_errno is set. 2655 * 2656 */ 2657 int 2658 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2659 uint64_t *stat) 2660 { 2661 int fd; 2662 2663 if (priv->sh) { 2664 if (priv->q_counters != NULL && 2665 strcmp(ctr_name, "out_of_buffer") == 0) 2666 return mlx5_devx_cmd_queue_counter_query 2667 (priv->q_counters, 0, (uint32_t *)stat); 2668 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2669 priv->sh->ibdev_path, 2670 priv->dev_port, 2671 ctr_name); 2672 fd = open(path, O_RDONLY); 2673 /* 2674 * in switchdev the file location is not per port 2675 * but rather in <ibdev_path>/hw_counters/<file_name>. 2676 */ 2677 if (fd == -1) { 2678 MKSTR(path1, "%s/hw_counters/%s", 2679 priv->sh->ibdev_path, 2680 ctr_name); 2681 fd = open(path1, O_RDONLY); 2682 } 2683 if (fd != -1) { 2684 char buf[21] = {'\0'}; 2685 ssize_t n = read(fd, buf, sizeof(buf)); 2686 2687 close(fd); 2688 if (n != -1) { 2689 *stat = strtoull(buf, NULL, 10); 2690 return 0; 2691 } 2692 } 2693 } 2694 *stat = 0; 2695 return 1; 2696 } 2697 2698 /** 2699 * Remove a MAC address from device 2700 * 2701 * @param dev 2702 * Pointer to Ethernet device structure. 2703 * @param index 2704 * MAC address index. 2705 */ 2706 void 2707 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2708 { 2709 struct mlx5_priv *priv = dev->data->dev_private; 2710 const int vf = priv->sh->dev_cap.vf; 2711 2712 if (vf) 2713 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2714 mlx5_ifindex(dev), priv->mac_own, 2715 &dev->data->mac_addrs[index], index); 2716 } 2717 2718 /** 2719 * Adds a MAC address to the device 2720 * 2721 * @param dev 2722 * Pointer to Ethernet device structure. 2723 * @param mac_addr 2724 * MAC address to register. 2725 * @param index 2726 * MAC address index. 2727 * 2728 * @return 2729 * 0 on success, a negative errno value otherwise 2730 */ 2731 int 2732 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2733 uint32_t index) 2734 { 2735 struct mlx5_priv *priv = dev->data->dev_private; 2736 const int vf = priv->sh->dev_cap.vf; 2737 int ret = 0; 2738 2739 if (vf) 2740 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2741 mlx5_ifindex(dev), priv->mac_own, 2742 mac, index); 2743 return ret; 2744 } 2745 2746 /** 2747 * Modify a VF MAC address 2748 * 2749 * @param priv 2750 * Pointer to device private data. 2751 * @param mac_addr 2752 * MAC address to modify into. 2753 * @param iface_idx 2754 * Net device interface index 2755 * @param vf_index 2756 * VF index 2757 * 2758 * @return 2759 * 0 on success, a negative errno value otherwise 2760 */ 2761 int 2762 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2763 unsigned int iface_idx, 2764 struct rte_ether_addr *mac_addr, 2765 int vf_index) 2766 { 2767 return mlx5_nl_vf_mac_addr_modify 2768 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2769 } 2770 2771 /** 2772 * Set device promiscuous mode 2773 * 2774 * @param dev 2775 * Pointer to Ethernet device structure. 2776 * @param enable 2777 * 0 - promiscuous is disabled, otherwise - enabled 2778 * 2779 * @return 2780 * 0 on success, a negative error value otherwise 2781 */ 2782 int 2783 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2784 { 2785 struct mlx5_priv *priv = dev->data->dev_private; 2786 2787 return mlx5_nl_promisc(priv->nl_socket_route, 2788 mlx5_ifindex(dev), !!enable); 2789 } 2790 2791 /** 2792 * Set device promiscuous mode 2793 * 2794 * @param dev 2795 * Pointer to Ethernet device structure. 2796 * @param enable 2797 * 0 - all multicase is disabled, otherwise - enabled 2798 * 2799 * @return 2800 * 0 on success, a negative error value otherwise 2801 */ 2802 int 2803 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2804 { 2805 struct mlx5_priv *priv = dev->data->dev_private; 2806 2807 return mlx5_nl_allmulti(priv->nl_socket_route, 2808 mlx5_ifindex(dev), !!enable); 2809 } 2810 2811 /** 2812 * Flush device MAC addresses 2813 * 2814 * @param dev 2815 * Pointer to Ethernet device structure. 2816 * 2817 */ 2818 void 2819 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2820 { 2821 struct mlx5_priv *priv = dev->data->dev_private; 2822 2823 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2824 dev->data->mac_addrs, 2825 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2826 } 2827