1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <bus_driver.h> 23 #include <bus_pci_driver.h> 24 #include <bus_auxiliary_driver.h> 25 #include <rte_common.h> 26 #include <rte_kvargs.h> 27 #include <rte_rwlock.h> 28 #include <rte_spinlock.h> 29 #include <rte_string_fns.h> 30 #include <rte_alarm.h> 31 #include <rte_eal_paging.h> 32 33 #include <mlx5_glue.h> 34 #include <mlx5_devx_cmds.h> 35 #include <mlx5_common.h> 36 #include <mlx5_common_mp.h> 37 #include <mlx5_common_mr.h> 38 #include <mlx5_malloc.h> 39 40 #include "mlx5_defs.h" 41 #include "mlx5.h" 42 #include "mlx5_common_os.h" 43 #include "mlx5_utils.h" 44 #include "mlx5_rxtx.h" 45 #include "mlx5_rx.h" 46 #include "mlx5_tx.h" 47 #include "mlx5_autoconf.h" 48 #include "mlx5_flow.h" 49 #include "rte_pmd_mlx5.h" 50 #include "mlx5_verbs.h" 51 #include "mlx5_nl.h" 52 #include "mlx5_devx.h" 53 54 #ifndef HAVE_IBV_MLX5_MOD_MPW 55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 57 #endif 58 59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 61 #endif 62 63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 64 65 /* Spinlock for mlx5_shared_data allocation. */ 66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 67 68 /* Process local data for secondary processes. */ 69 static struct mlx5_local_data mlx5_local_data; 70 71 /* rte flow indexed pool configuration. */ 72 static struct mlx5_indexed_pool_config icfg[] = { 73 { 74 .size = sizeof(struct rte_flow), 75 .trunk_size = 64, 76 .need_lock = 1, 77 .release_mem_en = 0, 78 .malloc = mlx5_malloc, 79 .free = mlx5_free, 80 .per_core_cache = 0, 81 .type = "ctl_flow_ipool", 82 }, 83 { 84 .size = sizeof(struct rte_flow), 85 .trunk_size = 64, 86 .grow_trunk = 3, 87 .grow_shift = 2, 88 .need_lock = 1, 89 .release_mem_en = 0, 90 .malloc = mlx5_malloc, 91 .free = mlx5_free, 92 .per_core_cache = 1 << 14, 93 .type = "rte_flow_ipool", 94 }, 95 { 96 .size = sizeof(struct rte_flow), 97 .trunk_size = 64, 98 .grow_trunk = 3, 99 .grow_shift = 2, 100 .need_lock = 1, 101 .release_mem_en = 0, 102 .malloc = mlx5_malloc, 103 .free = mlx5_free, 104 .per_core_cache = 0, 105 .type = "mcp_flow_ipool", 106 }, 107 }; 108 109 /** 110 * Set the completion channel file descriptor interrupt as non-blocking. 111 * 112 * @param[in] rxq_obj 113 * Pointer to RQ channel object, which includes the channel fd 114 * 115 * @param[out] fd 116 * The file descriptor (representing the interrupt) used in this channel. 117 * 118 * @return 119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 120 */ 121 int 122 mlx5_os_set_nonblock_channel_fd(int fd) 123 { 124 int flags; 125 126 flags = fcntl(fd, F_GETFL); 127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 128 } 129 130 /** 131 * Get mlx5 device attributes. The glue function query_device_ex() is called 132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 133 * device attributes from the glue out parameter. 134 * 135 * @param sh 136 * Pointer to shared device context. 137 * 138 * @return 139 * 0 on success, a negative errno value otherwise and rte_errno is set. 140 */ 141 int 142 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 143 { 144 int err; 145 struct mlx5_common_device *cdev = sh->cdev; 146 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 147 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 148 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 149 150 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 151 if (err) { 152 rte_errno = errno; 153 return -rte_errno; 154 } 155 #ifdef HAVE_IBV_MLX5_MOD_SWP 156 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 157 #endif 158 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 159 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 160 #endif 161 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 162 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 163 #endif 164 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 165 if (err) { 166 rte_errno = errno; 167 return -rte_errno; 168 } 169 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 170 if (mlx5_dev_is_pci(cdev->dev)) 171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 172 else 173 sh->dev_cap.sf = 1; 174 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 175 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 176 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 177 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 178 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 179 sh->dev_cap.dest_tir = 1; 180 #endif 181 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 182 DRV_LOG(DEBUG, "DV flow is supported."); 183 sh->dev_cap.dv_flow_en = 1; 184 #endif 185 #ifdef HAVE_MLX5DV_DR_ESWITCH 186 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 187 sh->dev_cap.dv_esw_en = 1; 188 #endif 189 /* 190 * Multi-packet send is supported by ConnectX-4 Lx PF as well 191 * as all ConnectX-5 devices. 192 */ 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 194 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 195 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 196 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 197 } else { 198 DRV_LOG(DEBUG, "MPW is supported."); 199 sh->dev_cap.mps = MLX5_MPW; 200 } 201 } else { 202 DRV_LOG(DEBUG, "MPW isn't supported."); 203 sh->dev_cap.mps = MLX5_MPW_DISABLED; 204 } 205 #if (RTE_CACHE_LINE_SIZE == 128) 206 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 207 sh->dev_cap.cqe_comp = 1; 208 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 209 sh->dev_cap.cqe_comp ? "" : "not "); 210 #else 211 sh->dev_cap.cqe_comp = 1; 212 #endif 213 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 214 sh->dev_cap.mpls_en = 215 ((dv_attr.tunnel_offloads_caps & 216 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 217 (dv_attr.tunnel_offloads_caps & 218 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 219 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 220 sh->dev_cap.mpls_en ? "" : "not "); 221 #else 222 DRV_LOG(WARNING, 223 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 224 #endif 225 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 226 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 227 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 228 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 229 IBV_DEVICE_PCI_WRITE_END_PADDING); 230 #endif 231 sh->dev_cap.hw_csum = 232 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 233 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 234 sh->dev_cap.hw_csum ? "" : "not "); 235 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 236 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 237 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 238 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 239 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 240 IBV_RAW_PACKET_CAP_SCATTER_FCS); 241 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 242 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 243 DRV_LOG(DEBUG, "Counters are not supported."); 244 #endif 245 /* 246 * DPDK doesn't support larger/variable indirection tables. 247 * Once DPDK supports it, take max size from device attr. 248 */ 249 sh->dev_cap.ind_table_max_size = 250 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 251 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 252 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 253 sh->dev_cap.ind_table_max_size); 254 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 255 (attr_ex.tso_caps.supported_qpts & 256 (1 << IBV_QPT_RAW_PACKET))); 257 if (sh->dev_cap.tso) 258 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 259 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 260 sizeof(sh->dev_cap.fw_ver)); 261 #ifdef HAVE_IBV_MLX5_MOD_SWP 262 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 263 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 264 (MLX5_SW_PARSING_CAP | 265 MLX5_SW_PARSING_CSUM_CAP | 266 MLX5_SW_PARSING_TSO_CAP); 267 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 268 #endif 269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 270 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 271 struct mlx5dv_striding_rq_caps *strd_rq_caps = 272 &dv_attr.striding_rq_caps; 273 274 sh->dev_cap.mprq.enabled = 1; 275 sh->dev_cap.mprq.log_min_stride_size = 276 strd_rq_caps->min_single_stride_log_num_of_bytes; 277 sh->dev_cap.mprq.log_max_stride_size = 278 strd_rq_caps->max_single_stride_log_num_of_bytes; 279 sh->dev_cap.mprq.log_min_stride_num = 280 strd_rq_caps->min_single_wqe_log_num_of_strides; 281 sh->dev_cap.mprq.log_max_stride_num = 282 strd_rq_caps->max_single_wqe_log_num_of_strides; 283 sh->dev_cap.mprq.log_min_stride_wqe_size = 284 cdev->config.devx ? 285 hca_attr->log_min_stride_wqe_sz : 286 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 287 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 288 sh->dev_cap.mprq.log_min_stride_size); 289 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 290 sh->dev_cap.mprq.log_max_stride_size); 291 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 292 sh->dev_cap.mprq.log_min_stride_num); 293 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 294 sh->dev_cap.mprq.log_max_stride_num); 295 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 296 sh->dev_cap.mprq.log_min_stride_wqe_size); 297 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 298 strd_rq_caps->supported_qpts); 299 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 300 } 301 #endif 302 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 303 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 304 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 305 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 306 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 307 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 308 } 309 if (sh->dev_cap.tunnel_en) { 310 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 311 sh->dev_cap.tunnel_en & 312 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 313 sh->dev_cap.tunnel_en & 314 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 315 sh->dev_cap.tunnel_en & 316 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 317 } else { 318 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 319 } 320 #else 321 DRV_LOG(WARNING, 322 "Tunnel offloading disabled due to old OFED/rdma-core version"); 323 #endif 324 if (!sh->cdev->config.devx) 325 return 0; 326 /* Check capabilities for Packet Pacing. */ 327 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 328 hca_attr->dev_freq_khz); 329 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 330 hca_attr->qos.packet_pacing ? "" : "not "); 331 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 332 hca_attr->cross_channel ? "" : "not "); 333 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 334 hca_attr->wqe_index_ignore ? "" : "not "); 335 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 336 hca_attr->non_wire_sq ? "" : "not "); 337 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 338 hca_attr->log_max_static_sq_wq ? "" : "not ", 339 hca_attr->log_max_static_sq_wq); 340 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 341 hca_attr->qos.wqe_rate_pp ? "" : "not "); 342 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 343 if (!hca_attr->cross_channel) { 344 DRV_LOG(DEBUG, 345 "Cross channel operations are required for packet pacing."); 346 sh->dev_cap.txpp_en = 0; 347 } 348 if (!hca_attr->wqe_index_ignore) { 349 DRV_LOG(DEBUG, 350 "WQE index ignore feature is required for packet pacing."); 351 sh->dev_cap.txpp_en = 0; 352 } 353 if (!hca_attr->non_wire_sq) { 354 DRV_LOG(DEBUG, 355 "Non-wire SQ feature is required for packet pacing."); 356 sh->dev_cap.txpp_en = 0; 357 } 358 if (!hca_attr->log_max_static_sq_wq) { 359 DRV_LOG(DEBUG, 360 "Static WQE SQ feature is required for packet pacing."); 361 sh->dev_cap.txpp_en = 0; 362 } 363 if (!hca_attr->qos.wqe_rate_pp) { 364 DRV_LOG(DEBUG, 365 "WQE rate mode is required for packet pacing."); 366 sh->dev_cap.txpp_en = 0; 367 } 368 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 369 DRV_LOG(DEBUG, 370 "DevX does not provide UAR offset, can't create queues for packet pacing."); 371 sh->dev_cap.txpp_en = 0; 372 #endif 373 sh->dev_cap.scatter_fcs_w_decap_disable = 374 hca_attr->scatter_fcs_w_decap_disable; 375 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 376 mlx5_rt_timestamp_config(sh, hca_attr); 377 return 0; 378 } 379 380 /** 381 * Detect misc5 support or not 382 * 383 * @param[in] priv 384 * Device private data pointer 385 */ 386 #ifdef HAVE_MLX5DV_DR 387 static void 388 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 389 { 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 391 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 392 * Case: IPv4--->UDP--->VxLAN--->vni 393 */ 394 void *tbl; 395 struct mlx5_flow_dv_match_params matcher_mask; 396 void *match_m; 397 void *matcher; 398 void *headers_m; 399 void *misc5_m; 400 uint32_t *tunnel_header_m; 401 struct mlx5dv_flow_matcher_attr dv_attr; 402 403 memset(&matcher_mask, 0, sizeof(matcher_mask)); 404 matcher_mask.size = sizeof(matcher_mask.buf); 405 match_m = matcher_mask.buf; 406 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 407 misc5_m = MLX5_ADDR_OF(fte_match_param, 408 match_m, misc_parameters_5); 409 tunnel_header_m = (uint32_t *) 410 MLX5_ADDR_OF(fte_match_set_misc5, 411 misc5_m, tunnel_header_1); 412 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 413 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 414 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 415 *tunnel_header_m = 0xffffff; 416 417 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 418 if (!tbl) { 419 DRV_LOG(INFO, "No SW steering support"); 420 return; 421 } 422 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 423 dv_attr.match_mask = (void *)&matcher_mask, 424 dv_attr.match_criteria_enable = 425 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 426 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 427 dv_attr.priority = 3; 428 #ifdef HAVE_MLX5DV_DR_ESWITCH 429 void *misc2_m; 430 if (priv->sh->config.dv_esw_en) { 431 /* FDB enabled reg_c_0 */ 432 dv_attr.match_criteria_enable |= 433 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 434 misc2_m = MLX5_ADDR_OF(fte_match_param, 435 match_m, misc_parameters_2); 436 MLX5_SET(fte_match_set_misc2, misc2_m, 437 metadata_reg_c_0, 0xffff); 438 } 439 #endif 440 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 441 &dv_attr, tbl); 442 if (matcher) { 443 priv->sh->misc5_cap = 1; 444 mlx5_glue->dv_destroy_flow_matcher(matcher); 445 } 446 mlx5_glue->dr_destroy_flow_tbl(tbl); 447 #else 448 RTE_SET_USED(priv); 449 #endif 450 } 451 #endif 452 453 /** 454 * Initialize DR related data within private structure. 455 * Routine checks the reference counter and does actual 456 * resources creation/initialization only if counter is zero. 457 * 458 * @param[in] priv 459 * Pointer to the private device data structure. 460 * 461 * @return 462 * Zero on success, positive error code otherwise. 463 */ 464 static int 465 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 466 { 467 struct mlx5_dev_ctx_shared *sh = priv->sh; 468 char s[MLX5_NAME_SIZE] __rte_unused; 469 int err; 470 471 MLX5_ASSERT(sh && sh->refcnt); 472 if (sh->refcnt > 1) 473 return 0; 474 err = mlx5_alloc_table_hash_list(priv); 475 if (err) 476 goto error; 477 if (priv->sh->config.dv_flow_en == 2) 478 return 0; 479 /* The resources below are only valid with DV support. */ 480 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 481 /* Init port id action list. */ 482 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 483 sh->port_id_action_list = mlx5_list_create(s, sh, true, 484 flow_dv_port_id_create_cb, 485 flow_dv_port_id_match_cb, 486 flow_dv_port_id_remove_cb, 487 flow_dv_port_id_clone_cb, 488 flow_dv_port_id_clone_free_cb); 489 if (!sh->port_id_action_list) 490 goto error; 491 /* Init push vlan action list. */ 492 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 493 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 494 flow_dv_push_vlan_create_cb, 495 flow_dv_push_vlan_match_cb, 496 flow_dv_push_vlan_remove_cb, 497 flow_dv_push_vlan_clone_cb, 498 flow_dv_push_vlan_clone_free_cb); 499 if (!sh->push_vlan_action_list) 500 goto error; 501 /* Init sample action list. */ 502 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 503 sh->sample_action_list = mlx5_list_create(s, sh, true, 504 flow_dv_sample_create_cb, 505 flow_dv_sample_match_cb, 506 flow_dv_sample_remove_cb, 507 flow_dv_sample_clone_cb, 508 flow_dv_sample_clone_free_cb); 509 if (!sh->sample_action_list) 510 goto error; 511 /* Init dest array action list. */ 512 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 513 sh->dest_array_list = mlx5_list_create(s, sh, true, 514 flow_dv_dest_array_create_cb, 515 flow_dv_dest_array_match_cb, 516 flow_dv_dest_array_remove_cb, 517 flow_dv_dest_array_clone_cb, 518 flow_dv_dest_array_clone_free_cb); 519 if (!sh->dest_array_list) 520 goto error; 521 /* Init shared flex parsers list, no need lcore_share */ 522 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 523 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 524 mlx5_flex_parser_create_cb, 525 mlx5_flex_parser_match_cb, 526 mlx5_flex_parser_remove_cb, 527 mlx5_flex_parser_clone_cb, 528 mlx5_flex_parser_clone_free_cb); 529 if (!sh->flex_parsers_dv) 530 goto error; 531 #endif 532 #ifdef HAVE_MLX5DV_DR 533 void *domain; 534 535 /* Reference counter is zero, we should initialize structures. */ 536 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 537 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 538 if (!domain) { 539 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 540 err = errno; 541 goto error; 542 } 543 sh->rx_domain = domain; 544 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 545 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 546 if (!domain) { 547 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 548 err = errno; 549 goto error; 550 } 551 sh->tx_domain = domain; 552 #ifdef HAVE_MLX5DV_DR_ESWITCH 553 if (sh->config.dv_esw_en) { 554 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 555 MLX5DV_DR_DOMAIN_TYPE_FDB); 556 if (!domain) { 557 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 558 err = errno; 559 goto error; 560 } 561 sh->fdb_domain = domain; 562 } 563 /* 564 * The drop action is just some dummy placeholder in rdma-core. It 565 * does not belong to domains and has no any attributes, and, can be 566 * shared by the entire device. 567 */ 568 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 569 if (!sh->dr_drop_action) { 570 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 571 err = errno; 572 goto error; 573 } 574 #endif 575 if (!sh->tunnel_hub && sh->config.dv_miss_info) 576 err = mlx5_alloc_tunnel_hub(sh); 577 if (err) { 578 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 579 goto error; 580 } 581 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 582 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 583 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 584 if (sh->fdb_domain) 585 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 586 } 587 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 588 if (!sh->config.allow_duplicate_pattern) { 589 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 590 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 591 #endif 592 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 593 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 594 if (sh->fdb_domain) 595 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 596 } 597 598 __mlx5_discovery_misc5_cap(priv); 599 #endif /* HAVE_MLX5DV_DR */ 600 sh->default_miss_action = 601 mlx5_glue->dr_create_flow_action_default_miss(); 602 if (!sh->default_miss_action) 603 DRV_LOG(WARNING, "Default miss action is not supported."); 604 LIST_INIT(&sh->shared_rxqs); 605 return 0; 606 error: 607 /* Rollback the created objects. */ 608 if (sh->rx_domain) { 609 mlx5_glue->dr_destroy_domain(sh->rx_domain); 610 sh->rx_domain = NULL; 611 } 612 if (sh->tx_domain) { 613 mlx5_glue->dr_destroy_domain(sh->tx_domain); 614 sh->tx_domain = NULL; 615 } 616 if (sh->fdb_domain) { 617 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 618 sh->fdb_domain = NULL; 619 } 620 if (sh->dr_drop_action) { 621 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 622 sh->dr_drop_action = NULL; 623 } 624 if (sh->pop_vlan_action) { 625 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 626 sh->pop_vlan_action = NULL; 627 } 628 if (sh->encaps_decaps) { 629 mlx5_hlist_destroy(sh->encaps_decaps); 630 sh->encaps_decaps = NULL; 631 } 632 if (sh->modify_cmds) { 633 mlx5_hlist_destroy(sh->modify_cmds); 634 sh->modify_cmds = NULL; 635 } 636 if (sh->tag_table) { 637 /* tags should be destroyed with flow before. */ 638 mlx5_hlist_destroy(sh->tag_table); 639 sh->tag_table = NULL; 640 } 641 if (sh->tunnel_hub) { 642 mlx5_release_tunnel_hub(sh, priv->dev_port); 643 sh->tunnel_hub = NULL; 644 } 645 mlx5_free_table_hash_list(priv); 646 if (sh->port_id_action_list) { 647 mlx5_list_destroy(sh->port_id_action_list); 648 sh->port_id_action_list = NULL; 649 } 650 if (sh->push_vlan_action_list) { 651 mlx5_list_destroy(sh->push_vlan_action_list); 652 sh->push_vlan_action_list = NULL; 653 } 654 if (sh->sample_action_list) { 655 mlx5_list_destroy(sh->sample_action_list); 656 sh->sample_action_list = NULL; 657 } 658 if (sh->dest_array_list) { 659 mlx5_list_destroy(sh->dest_array_list); 660 sh->dest_array_list = NULL; 661 } 662 return err; 663 } 664 665 /** 666 * Destroy DR related data within private structure. 667 * 668 * @param[in] priv 669 * Pointer to the private device data structure. 670 */ 671 void 672 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 673 { 674 struct mlx5_dev_ctx_shared *sh = priv->sh; 675 676 MLX5_ASSERT(sh && sh->refcnt); 677 if (sh->refcnt > 1) 678 return; 679 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 680 #ifdef HAVE_MLX5DV_DR 681 if (sh->rx_domain) { 682 mlx5_glue->dr_destroy_domain(sh->rx_domain); 683 sh->rx_domain = NULL; 684 } 685 if (sh->tx_domain) { 686 mlx5_glue->dr_destroy_domain(sh->tx_domain); 687 sh->tx_domain = NULL; 688 } 689 #ifdef HAVE_MLX5DV_DR_ESWITCH 690 if (sh->fdb_domain) { 691 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 692 sh->fdb_domain = NULL; 693 } 694 if (sh->dr_drop_action) { 695 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 696 sh->dr_drop_action = NULL; 697 } 698 #endif 699 if (sh->pop_vlan_action) { 700 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 701 sh->pop_vlan_action = NULL; 702 } 703 if (sh->send_to_kernel_action.action) { 704 void *action = sh->send_to_kernel_action.action; 705 706 mlx5_glue->destroy_flow_action(action); 707 sh->send_to_kernel_action.action = NULL; 708 } 709 if (sh->send_to_kernel_action.tbl) { 710 struct mlx5_flow_tbl_resource *tbl = 711 sh->send_to_kernel_action.tbl; 712 713 flow_dv_tbl_resource_release(sh, tbl); 714 sh->send_to_kernel_action.tbl = NULL; 715 } 716 #endif /* HAVE_MLX5DV_DR */ 717 if (sh->default_miss_action) 718 mlx5_glue->destroy_flow_action 719 (sh->default_miss_action); 720 if (sh->encaps_decaps) { 721 mlx5_hlist_destroy(sh->encaps_decaps); 722 sh->encaps_decaps = NULL; 723 } 724 if (sh->modify_cmds) { 725 mlx5_hlist_destroy(sh->modify_cmds); 726 sh->modify_cmds = NULL; 727 } 728 if (sh->tag_table) { 729 /* tags should be destroyed with flow before. */ 730 mlx5_hlist_destroy(sh->tag_table); 731 sh->tag_table = NULL; 732 } 733 if (sh->tunnel_hub) { 734 mlx5_release_tunnel_hub(sh, priv->dev_port); 735 sh->tunnel_hub = NULL; 736 } 737 mlx5_free_table_hash_list(priv); 738 if (sh->port_id_action_list) { 739 mlx5_list_destroy(sh->port_id_action_list); 740 sh->port_id_action_list = NULL; 741 } 742 if (sh->push_vlan_action_list) { 743 mlx5_list_destroy(sh->push_vlan_action_list); 744 sh->push_vlan_action_list = NULL; 745 } 746 if (sh->sample_action_list) { 747 mlx5_list_destroy(sh->sample_action_list); 748 sh->sample_action_list = NULL; 749 } 750 if (sh->dest_array_list) { 751 mlx5_list_destroy(sh->dest_array_list); 752 sh->dest_array_list = NULL; 753 } 754 } 755 756 /** 757 * Initialize shared data between primary and secondary process. 758 * 759 * A memzone is reserved by primary process and secondary processes attach to 760 * the memzone. 761 * 762 * @return 763 * 0 on success, a negative errno value otherwise and rte_errno is set. 764 */ 765 static int 766 mlx5_init_shared_data(void) 767 { 768 const struct rte_memzone *mz; 769 int ret = 0; 770 771 rte_spinlock_lock(&mlx5_shared_data_lock); 772 if (mlx5_shared_data == NULL) { 773 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 774 /* Allocate shared memory. */ 775 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 776 sizeof(*mlx5_shared_data), 777 SOCKET_ID_ANY, 0); 778 if (mz == NULL) { 779 DRV_LOG(ERR, 780 "Cannot allocate mlx5 shared data"); 781 ret = -rte_errno; 782 goto error; 783 } 784 mlx5_shared_data = mz->addr; 785 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 786 rte_spinlock_init(&mlx5_shared_data->lock); 787 } else { 788 /* Lookup allocated shared memory. */ 789 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 790 if (mz == NULL) { 791 DRV_LOG(ERR, 792 "Cannot attach mlx5 shared data"); 793 ret = -rte_errno; 794 goto error; 795 } 796 mlx5_shared_data = mz->addr; 797 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 798 } 799 } 800 error: 801 rte_spinlock_unlock(&mlx5_shared_data_lock); 802 return ret; 803 } 804 805 /** 806 * PMD global initialization. 807 * 808 * Independent from individual device, this function initializes global 809 * per-PMD data structures distinguishing primary and secondary processes. 810 * Hence, each initialization is called once per a process. 811 * 812 * @return 813 * 0 on success, a negative errno value otherwise and rte_errno is set. 814 */ 815 static int 816 mlx5_init_once(void) 817 { 818 struct mlx5_shared_data *sd; 819 struct mlx5_local_data *ld = &mlx5_local_data; 820 int ret = 0; 821 822 if (mlx5_init_shared_data()) 823 return -rte_errno; 824 sd = mlx5_shared_data; 825 MLX5_ASSERT(sd); 826 rte_spinlock_lock(&sd->lock); 827 switch (rte_eal_process_type()) { 828 case RTE_PROC_PRIMARY: 829 if (sd->init_done) 830 break; 831 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 832 mlx5_mp_os_primary_handle); 833 if (ret) 834 goto out; 835 sd->init_done = true; 836 break; 837 case RTE_PROC_SECONDARY: 838 if (ld->init_done) 839 break; 840 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 841 mlx5_mp_os_secondary_handle); 842 if (ret) 843 goto out; 844 ++sd->secondary_cnt; 845 ld->init_done = true; 846 break; 847 default: 848 break; 849 } 850 out: 851 rte_spinlock_unlock(&sd->lock); 852 return ret; 853 } 854 855 /** 856 * DR flow drop action support detect. 857 * 858 * @param dev 859 * Pointer to rte_eth_dev structure. 860 * 861 */ 862 static void 863 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 864 { 865 #ifdef HAVE_MLX5DV_DR 866 struct mlx5_priv *priv = dev->data->dev_private; 867 868 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 869 return; 870 /** 871 * DR supports drop action placeholder when it is supported; 872 * otherwise, use the queue drop action. 873 */ 874 if (!priv->sh->drop_action_check_flag) { 875 if (!mlx5_flow_discover_dr_action_support(dev)) 876 priv->sh->dr_drop_action_en = 1; 877 priv->sh->drop_action_check_flag = 1; 878 } 879 if (priv->sh->dr_drop_action_en) 880 priv->root_drop_action = priv->sh->dr_drop_action; 881 else 882 priv->root_drop_action = priv->drop_queue.hrxq->action; 883 #endif 884 } 885 886 static void 887 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 888 { 889 struct mlx5_priv *priv = dev->data->dev_private; 890 void *ctx = priv->sh->cdev->ctx; 891 892 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 893 if (!priv->q_counters) { 894 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 895 struct ibv_wq *wq; 896 897 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 898 "by DevX - fall-back to use the kernel driver global " 899 "queue counter.", dev->data->port_id); 900 /* Create WQ by kernel and query its queue counter ID. */ 901 if (cq) { 902 wq = mlx5_glue->create_wq(ctx, 903 &(struct ibv_wq_init_attr){ 904 .wq_type = IBV_WQT_RQ, 905 .max_wr = 1, 906 .max_sge = 1, 907 .pd = priv->sh->cdev->pd, 908 .cq = cq, 909 }); 910 if (wq) { 911 /* Counter is assigned only on RDY state. */ 912 int ret = mlx5_glue->modify_wq(wq, 913 &(struct ibv_wq_attr){ 914 .attr_mask = IBV_WQ_ATTR_STATE, 915 .wq_state = IBV_WQS_RDY, 916 }); 917 918 if (ret == 0) 919 mlx5_devx_cmd_wq_query(wq, 920 &priv->counter_set_id); 921 claim_zero(mlx5_glue->destroy_wq(wq)); 922 } 923 claim_zero(mlx5_glue->destroy_cq(cq)); 924 } 925 } else { 926 priv->counter_set_id = priv->q_counters->id; 927 } 928 if (priv->counter_set_id == 0) 929 DRV_LOG(INFO, "Part of the port %d statistics will not be " 930 "available.", dev->data->port_id); 931 } 932 933 /** 934 * Check if representor spawn info match devargs. 935 * 936 * @param spawn 937 * Verbs device parameters (name, port, switch_info) to spawn. 938 * @param eth_da 939 * Device devargs to probe. 940 * 941 * @return 942 * Match result. 943 */ 944 static bool 945 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 946 struct rte_eth_devargs *eth_da) 947 { 948 struct mlx5_switch_info *switch_info = &spawn->info; 949 unsigned int p, f; 950 uint16_t id; 951 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 952 eth_da->type); 953 954 switch (eth_da->type) { 955 case RTE_ETH_REPRESENTOR_SF: 956 if (!(spawn->info.port_name == -1 && 957 switch_info->name_type == 958 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 959 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 960 rte_errno = EBUSY; 961 return false; 962 } 963 break; 964 case RTE_ETH_REPRESENTOR_VF: 965 /* Allows HPF representor index -1 as exception. */ 966 if (!(spawn->info.port_name == -1 && 967 switch_info->name_type == 968 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 969 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 970 rte_errno = EBUSY; 971 return false; 972 } 973 break; 974 case RTE_ETH_REPRESENTOR_NONE: 975 rte_errno = EBUSY; 976 return false; 977 default: 978 rte_errno = ENOTSUP; 979 DRV_LOG(ERR, "unsupported representor type"); 980 return false; 981 } 982 /* Check representor ID: */ 983 for (p = 0; p < eth_da->nb_ports; ++p) { 984 if (spawn->pf_bond < 0) { 985 /* For non-LAG mode, allow and ignore pf. */ 986 switch_info->pf_num = eth_da->ports[p]; 987 repr_id = mlx5_representor_id_encode(switch_info, 988 eth_da->type); 989 } 990 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 991 id = MLX5_REPRESENTOR_ID 992 (eth_da->ports[p], eth_da->type, 993 eth_da->representor_ports[f]); 994 if (repr_id == id) 995 return true; 996 } 997 } 998 rte_errno = EBUSY; 999 return false; 1000 } 1001 1002 /** 1003 * Spawn an Ethernet device from Verbs information. 1004 * 1005 * @param dpdk_dev 1006 * Backing DPDK device. 1007 * @param spawn 1008 * Verbs device parameters (name, port, switch_info) to spawn. 1009 * @param eth_da 1010 * Device arguments. 1011 * @param mkvlist 1012 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1013 * 1014 * @return 1015 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1016 * is set. The following errors are defined: 1017 * 1018 * EBUSY: device is not supposed to be spawned. 1019 * EEXIST: device is already spawned 1020 */ 1021 static struct rte_eth_dev * 1022 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1023 struct mlx5_dev_spawn_data *spawn, 1024 struct rte_eth_devargs *eth_da, 1025 struct mlx5_kvargs_ctrl *mkvlist) 1026 { 1027 const struct mlx5_switch_info *switch_info = &spawn->info; 1028 struct mlx5_dev_ctx_shared *sh = NULL; 1029 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1030 struct rte_eth_dev *eth_dev = NULL; 1031 struct mlx5_priv *priv = NULL; 1032 int err = 0; 1033 struct rte_ether_addr mac; 1034 char name[RTE_ETH_NAME_MAX_LEN]; 1035 int own_domain_id = 0; 1036 uint16_t port_id; 1037 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1038 int nl_rdma; 1039 int i; 1040 1041 /* Determine if this port representor is supposed to be spawned. */ 1042 if (switch_info->representor && dpdk_dev->devargs && 1043 !mlx5_representor_match(spawn, eth_da)) 1044 return NULL; 1045 /* Build device name. */ 1046 if (spawn->pf_bond < 0) { 1047 /* Single device. */ 1048 if (!switch_info->representor) 1049 strlcpy(name, dpdk_dev->name, sizeof(name)); 1050 else 1051 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1052 dpdk_dev->name, 1053 switch_info->name_type == 1054 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1055 switch_info->port_name); 1056 } else { 1057 /* Bonding device. */ 1058 if (!switch_info->representor) { 1059 err = snprintf(name, sizeof(name), "%s_%s", 1060 dpdk_dev->name, spawn->phys_dev_name); 1061 } else { 1062 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1063 dpdk_dev->name, spawn->phys_dev_name, 1064 switch_info->ctrl_num, 1065 switch_info->pf_num, 1066 switch_info->name_type == 1067 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1068 switch_info->port_name); 1069 } 1070 } 1071 if (err >= (int)sizeof(name)) 1072 DRV_LOG(WARNING, "device name overflow %s", name); 1073 /* check if the device is already spawned */ 1074 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1075 /* 1076 * When device is already spawned, its devargs should be set 1077 * as used. otherwise, mlx5_kvargs_validate() will fail. 1078 */ 1079 if (mkvlist) 1080 mlx5_port_args_set_used(name, port_id, mkvlist); 1081 rte_errno = EEXIST; 1082 return NULL; 1083 } 1084 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1085 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1086 struct mlx5_mp_id mp_id; 1087 int fd; 1088 1089 eth_dev = rte_eth_dev_attach_secondary(name); 1090 if (eth_dev == NULL) { 1091 DRV_LOG(ERR, "can not attach rte ethdev"); 1092 rte_errno = ENOMEM; 1093 return NULL; 1094 } 1095 eth_dev->device = dpdk_dev; 1096 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1097 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1098 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1099 err = mlx5_proc_priv_init(eth_dev); 1100 if (err) 1101 return NULL; 1102 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1103 /* Receive command fd from primary process */ 1104 fd = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1105 if (fd < 0) 1106 goto err_secondary; 1107 /* Remap UAR for Tx queues. */ 1108 err = mlx5_tx_uar_init_secondary(eth_dev, fd); 1109 close(fd); 1110 if (err) 1111 goto err_secondary; 1112 /* 1113 * Ethdev pointer is still required as input since 1114 * the primary device is not accessible from the 1115 * secondary process. 1116 */ 1117 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1118 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1119 return eth_dev; 1120 err_secondary: 1121 mlx5_dev_close(eth_dev); 1122 return NULL; 1123 } 1124 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1125 if (!sh) 1126 return NULL; 1127 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1128 /* Check port status. */ 1129 if (spawn->phys_port <= UINT8_MAX) { 1130 /* Legacy Verbs api only support u8 port number. */ 1131 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1132 &port_attr); 1133 if (err) { 1134 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1135 goto error; 1136 } 1137 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1138 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1139 err = EINVAL; 1140 goto error; 1141 } 1142 } else if (nl_rdma >= 0) { 1143 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1144 err = mlx5_nl_port_state(nl_rdma, 1145 spawn->phys_dev_name, 1146 spawn->phys_port); 1147 if (err < 0) { 1148 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1149 strerror(rte_errno)); 1150 err = -rte_errno; 1151 goto error; 1152 } 1153 port_attr.state = (enum ibv_port_state)err; 1154 } 1155 if (port_attr.state != IBV_PORT_ACTIVE) 1156 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1157 mlx5_glue->port_state_str(port_attr.state), 1158 port_attr.state); 1159 /* Allocate private eth device data. */ 1160 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1161 sizeof(*priv), 1162 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1163 if (priv == NULL) { 1164 DRV_LOG(ERR, "priv allocation failure"); 1165 err = ENOMEM; 1166 goto error; 1167 } 1168 /* 1169 * When user configures remote PD and CTX and device creates RxQ by 1170 * DevX, external RxQ is both supported and requested. 1171 */ 1172 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1173 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1174 sizeof(struct mlx5_external_rxq) * 1175 MLX5_MAX_EXT_RX_QUEUES, 0, 1176 SOCKET_ID_ANY); 1177 if (priv->ext_rxqs == NULL) { 1178 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1179 err = ENOMEM; 1180 goto error; 1181 } 1182 DRV_LOG(DEBUG, "External RxQ is supported."); 1183 } 1184 priv->sh = sh; 1185 priv->dev_port = spawn->phys_port; 1186 priv->pci_dev = spawn->pci_dev; 1187 priv->mtu = RTE_ETHER_MTU; 1188 /* Some internal functions rely on Netlink sockets, open them now. */ 1189 priv->nl_socket_rdma = nl_rdma; 1190 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1191 priv->representor = !!switch_info->representor; 1192 priv->master = !!switch_info->master; 1193 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1194 priv->vport_meta_tag = 0; 1195 priv->vport_meta_mask = 0; 1196 priv->pf_bond = spawn->pf_bond; 1197 1198 DRV_LOG(DEBUG, 1199 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1200 priv->dev_port, dpdk_dev->bus->name, 1201 priv->pci_dev ? priv->pci_dev->name : "NONE", 1202 priv->master, priv->representor, priv->pf_bond); 1203 1204 /* 1205 * If we have E-Switch we should determine the vport attributes. 1206 * E-Switch may use either source vport field or reg_c[0] metadata 1207 * register to match on vport index. The engaged part of metadata 1208 * register is defined by mask. 1209 */ 1210 if (sh->esw_mode) { 1211 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1212 spawn->phys_port, 1213 &vport_info); 1214 if (err) { 1215 DRV_LOG(WARNING, 1216 "Cannot query devx port %d on device %s", 1217 spawn->phys_port, spawn->phys_dev_name); 1218 vport_info.query_flags = 0; 1219 } 1220 } 1221 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1222 priv->vport_meta_tag = vport_info.vport_meta_tag; 1223 priv->vport_meta_mask = vport_info.vport_meta_mask; 1224 if (!priv->vport_meta_mask) { 1225 DRV_LOG(ERR, 1226 "vport zero mask for port %d on bonding device %s", 1227 spawn->phys_port, spawn->phys_dev_name); 1228 err = ENOTSUP; 1229 goto error; 1230 } 1231 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1232 DRV_LOG(ERR, 1233 "Invalid vport tag for port %d on bonding device %s", 1234 spawn->phys_port, spawn->phys_dev_name); 1235 err = ENOTSUP; 1236 goto error; 1237 } 1238 } 1239 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1240 priv->vport_id = vport_info.vport_id; 1241 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1242 DRV_LOG(ERR, 1243 "Cannot deduce vport index for port %d on bonding device %s", 1244 spawn->phys_port, spawn->phys_dev_name); 1245 err = ENOTSUP; 1246 goto error; 1247 } else { 1248 /* 1249 * Suppose vport index in compatible way. Kernel/rdma_core 1250 * support single E-Switch per PF configurations only and 1251 * vport_id field contains the vport index for associated VF, 1252 * which is deduced from representor port name. 1253 * For example, let's have the IB device port 10, it has 1254 * attached network device eth0, which has port name attribute 1255 * pf0vf2, we can deduce the VF number as 2, and set vport index 1256 * as 3 (2+1). This assigning schema should be changed if the 1257 * multiple E-Switch instances per PF configurations or/and PCI 1258 * subfunctions are added. 1259 */ 1260 priv->vport_id = switch_info->representor ? 1261 switch_info->port_name + 1 : -1; 1262 } 1263 priv->representor_id = mlx5_representor_id_encode(switch_info, 1264 eth_da->type); 1265 /* 1266 * Look for sibling devices in order to reuse their switch domain 1267 * if any, otherwise allocate one. 1268 */ 1269 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1270 const struct mlx5_priv *opriv = 1271 rte_eth_devices[port_id].data->dev_private; 1272 1273 if (!opriv || 1274 opriv->sh != priv->sh || 1275 opriv->domain_id == 1276 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1277 continue; 1278 priv->domain_id = opriv->domain_id; 1279 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1280 priv->dev_port, priv->domain_id); 1281 break; 1282 } 1283 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1284 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1285 if (err) { 1286 err = rte_errno; 1287 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1288 strerror(rte_errno)); 1289 goto error; 1290 } 1291 own_domain_id = 1; 1292 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1293 priv->dev_port, priv->domain_id); 1294 } 1295 if (sh->cdev->config.devx) { 1296 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1297 1298 sh->steering_format_version = hca_attr->steering_format_version; 1299 #if defined(HAVE_MLX5DV_DR) && \ 1300 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ 1301 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) 1302 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1303 sh->config.dv_flow_en) { 1304 uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; 1305 /* 1306 * Meter needs two REG_C's for color match and pre-sfx 1307 * flow match. Here get the REG_C for color match. 1308 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1309 */ 1310 reg_c_mask &= 0xfc; 1311 if (__builtin_popcount(reg_c_mask) < 1) { 1312 priv->mtr_en = 0; 1313 DRV_LOG(WARNING, "No available register for" 1314 " meter."); 1315 } else { 1316 /* 1317 * The meter color register is used by the 1318 * flow-hit feature as well. 1319 * The flow-hit feature must use REG_C_3 1320 * Prefer REG_C_3 if it is available. 1321 */ 1322 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 1323 priv->mtr_color_reg = REG_C_3; 1324 else 1325 priv->mtr_color_reg = ffs(reg_c_mask) 1326 - 1 + REG_C_0; 1327 priv->mtr_en = 1; 1328 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1329 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1330 priv->mtr_color_reg); 1331 } 1332 } 1333 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1334 uint32_t log_obj_size = 1335 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1336 if (log_obj_size >= 1337 hca_attr->qos.log_meter_aso_granularity && 1338 log_obj_size <= 1339 hca_attr->qos.log_meter_aso_max_alloc) 1340 sh->meter_aso_en = 1; 1341 } 1342 if (priv->mtr_en) { 1343 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1344 if (err) { 1345 err = -err; 1346 goto error; 1347 } 1348 } 1349 if (hca_attr->flow.tunnel_header_0_1) 1350 sh->tunnel_header_0_1 = 1; 1351 if (hca_attr->flow.tunnel_header_2_3) 1352 sh->tunnel_header_2_3 = 1; 1353 #endif 1354 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1355 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { 1356 sh->flow_hit_aso_en = 1; 1357 err = mlx5_flow_aso_age_mng_init(sh); 1358 if (err) { 1359 err = -err; 1360 goto error; 1361 } 1362 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1363 } 1364 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1365 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1366 defined(HAVE_MLX5_DR_ACTION_ASO_CT) 1367 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { 1368 err = mlx5_flow_aso_ct_mng_init(sh); 1369 if (err) { 1370 err = -err; 1371 goto error; 1372 } 1373 DRV_LOG(DEBUG, "CT ASO is supported."); 1374 sh->ct_aso_en = 1; 1375 } 1376 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1377 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1378 if (hca_attr->log_max_ft_sampler_num > 0 && 1379 sh->config.dv_flow_en) { 1380 priv->sampler_en = 1; 1381 DRV_LOG(DEBUG, "Sampler enabled!"); 1382 } else { 1383 priv->sampler_en = 0; 1384 if (!hca_attr->log_max_ft_sampler_num) 1385 DRV_LOG(WARNING, 1386 "No available register for sampler."); 1387 else 1388 DRV_LOG(DEBUG, "DV flow is not supported!"); 1389 } 1390 #endif 1391 } 1392 /* Process parameters and store port configuration on priv structure. */ 1393 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1394 if (err) { 1395 err = rte_errno; 1396 DRV_LOG(ERR, "Failed to process port configure: %s", 1397 strerror(rte_errno)); 1398 goto error; 1399 } 1400 eth_dev = rte_eth_dev_allocate(name); 1401 if (eth_dev == NULL) { 1402 DRV_LOG(ERR, "can not allocate rte ethdev"); 1403 err = ENOMEM; 1404 goto error; 1405 } 1406 if (priv->representor) { 1407 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1408 eth_dev->data->representor_id = priv->representor_id; 1409 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1410 struct mlx5_priv *opriv = 1411 rte_eth_devices[port_id].data->dev_private; 1412 if (opriv && 1413 opriv->master && 1414 opriv->domain_id == priv->domain_id && 1415 opriv->sh == priv->sh) { 1416 eth_dev->data->backer_port_id = port_id; 1417 break; 1418 } 1419 } 1420 if (port_id >= RTE_MAX_ETHPORTS) 1421 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1422 } 1423 priv->mp_id.port_id = eth_dev->data->port_id; 1424 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1425 /* 1426 * Store associated network device interface index. This index 1427 * is permanent throughout the lifetime of device. So, we may store 1428 * the ifindex here and use the cached value further. 1429 */ 1430 MLX5_ASSERT(spawn->ifindex); 1431 priv->if_index = spawn->ifindex; 1432 priv->lag_affinity_idx = sh->refcnt - 1; 1433 eth_dev->data->dev_private = priv; 1434 priv->dev_data = eth_dev->data; 1435 eth_dev->data->mac_addrs = priv->mac; 1436 eth_dev->device = dpdk_dev; 1437 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1438 /* Configure the first MAC address by default. */ 1439 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1440 DRV_LOG(ERR, 1441 "port %u cannot get MAC address, is mlx5_en" 1442 " loaded? (errno: %s)", 1443 eth_dev->data->port_id, strerror(rte_errno)); 1444 err = ENODEV; 1445 goto error; 1446 } 1447 DRV_LOG(INFO, 1448 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1449 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1450 #ifdef RTE_LIBRTE_MLX5_DEBUG 1451 { 1452 char ifname[MLX5_NAMESIZE]; 1453 1454 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1455 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1456 eth_dev->data->port_id, ifname); 1457 else 1458 DRV_LOG(DEBUG, "port %u ifname is unknown", 1459 eth_dev->data->port_id); 1460 } 1461 #endif 1462 /* Get actual MTU if possible. */ 1463 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1464 if (err) { 1465 err = rte_errno; 1466 goto error; 1467 } 1468 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1469 priv->mtu); 1470 /* Initialize burst functions to prevent crashes before link-up. */ 1471 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1472 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1473 eth_dev->dev_ops = &mlx5_dev_ops; 1474 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1475 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1476 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1477 /* Register MAC address. */ 1478 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1479 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1480 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1481 mlx5_ifindex(eth_dev), 1482 eth_dev->data->mac_addrs, 1483 MLX5_MAX_MAC_ADDRESSES); 1484 priv->ctrl_flows = 0; 1485 rte_spinlock_init(&priv->flow_list_lock); 1486 TAILQ_INIT(&priv->flow_meters); 1487 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1488 if (!priv->mtr_profile_tbl) 1489 goto error; 1490 /* Bring Ethernet device up. */ 1491 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1492 eth_dev->data->port_id); 1493 /* Read link status in case it is up and there will be no event. */ 1494 mlx5_link_update(eth_dev, 0); 1495 /* Watch LSC interrupts between port probe and port start. */ 1496 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1497 eth_dev->data->port_id; 1498 mlx5_set_link_up(eth_dev); 1499 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1500 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1501 if (sh->config.reclaim_mode) 1502 icfg[i].per_core_cache = 0; 1503 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1504 if (!priv->flows[i]) 1505 goto error; 1506 } 1507 /* Create context for virtual machine VLAN workaround. */ 1508 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1509 if (sh->config.dv_flow_en) { 1510 err = mlx5_alloc_shared_dr(priv); 1511 if (err) 1512 goto error; 1513 if (mlx5_flex_item_port_init(eth_dev) < 0) 1514 goto error; 1515 } 1516 if (mlx5_devx_obj_ops_en(sh)) { 1517 priv->obj_ops = devx_obj_ops; 1518 mlx5_queue_counter_id_prepare(eth_dev); 1519 priv->obj_ops.lb_dummy_queue_create = 1520 mlx5_rxq_ibv_obj_dummy_lb_create; 1521 priv->obj_ops.lb_dummy_queue_release = 1522 mlx5_rxq_ibv_obj_dummy_lb_release; 1523 } else if (spawn->max_port > UINT8_MAX) { 1524 /* Verbs can't support ports larger than 255 by design. */ 1525 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1526 err = ENOTSUP; 1527 goto error; 1528 } else { 1529 priv->obj_ops = ibv_obj_ops; 1530 } 1531 if (sh->config.tx_pp && 1532 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1533 /* 1534 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1535 * packet pacing and already checked above. 1536 * Hence, we should only make sure the SQs will be created 1537 * with DevX, not with Verbs. 1538 * Verbs allocates the SQ UAR on its own and it can't be shared 1539 * with Clock Queue UAR as required for Tx scheduling. 1540 */ 1541 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1542 err = ENODEV; 1543 goto error; 1544 } 1545 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1546 if (!priv->drop_queue.hrxq) 1547 goto error; 1548 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1549 mlx5_hrxq_create_cb, 1550 mlx5_hrxq_match_cb, 1551 mlx5_hrxq_remove_cb, 1552 mlx5_hrxq_clone_cb, 1553 mlx5_hrxq_clone_free_cb); 1554 if (!priv->hrxqs) 1555 goto error; 1556 mlx5_set_metadata_mask(eth_dev); 1557 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1558 !priv->sh->dv_regc0_mask) { 1559 DRV_LOG(ERR, "metadata mode %u is not supported " 1560 "(no metadata reg_c[0] is available)", 1561 sh->config.dv_xmeta_en); 1562 err = ENOTSUP; 1563 goto error; 1564 } 1565 rte_rwlock_init(&priv->ind_tbls_lock); 1566 if (priv->sh->config.dv_flow_en == 2) { 1567 #ifdef HAVE_MLX5_HWS_SUPPORT 1568 if (priv->vport_meta_mask) 1569 flow_hw_set_port_info(eth_dev); 1570 if (priv->sh->config.dv_esw_en && 1571 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1572 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) { 1573 DRV_LOG(ERR, 1574 "metadata mode %u is not supported in HWS eswitch mode", 1575 priv->sh->config.dv_xmeta_en); 1576 err = ENOTSUP; 1577 goto error; 1578 } 1579 /* Only HWS requires this information. */ 1580 flow_hw_init_tags_set(eth_dev); 1581 flow_hw_init_flow_metadata_config(eth_dev); 1582 if (priv->sh->config.dv_esw_en && 1583 flow_hw_create_vport_action(eth_dev)) { 1584 DRV_LOG(ERR, "port %u failed to create vport action", 1585 eth_dev->data->port_id); 1586 err = EINVAL; 1587 goto error; 1588 } 1589 return eth_dev; 1590 #else 1591 DRV_LOG(ERR, "DV support is missing for HWS."); 1592 goto error; 1593 #endif 1594 } 1595 if (!priv->sh->flow_priority_check_flag) { 1596 /* Supported Verbs flow priority number detection. */ 1597 err = mlx5_flow_discover_priorities(eth_dev); 1598 priv->sh->flow_max_priority = err; 1599 priv->sh->flow_priority_check_flag = 1; 1600 } else { 1601 err = priv->sh->flow_max_priority; 1602 } 1603 if (err < 0) { 1604 err = -err; 1605 goto error; 1606 } 1607 /* Query availability of metadata reg_c's. */ 1608 if (!priv->sh->metadata_regc_check_flag) { 1609 err = mlx5_flow_discover_mreg_c(eth_dev); 1610 if (err < 0) { 1611 err = -err; 1612 goto error; 1613 } 1614 } 1615 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1616 DRV_LOG(DEBUG, 1617 "port %u extensive metadata register is not supported", 1618 eth_dev->data->port_id); 1619 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1620 DRV_LOG(ERR, "metadata mode %u is not supported " 1621 "(no metadata registers available)", 1622 sh->config.dv_xmeta_en); 1623 err = ENOTSUP; 1624 goto error; 1625 } 1626 } 1627 if (sh->config.dv_flow_en && 1628 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1629 mlx5_flow_ext_mreg_supported(eth_dev) && 1630 priv->sh->dv_regc0_mask) { 1631 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1632 MLX5_FLOW_MREG_HTABLE_SZ, 1633 false, true, eth_dev, 1634 flow_dv_mreg_create_cb, 1635 flow_dv_mreg_match_cb, 1636 flow_dv_mreg_remove_cb, 1637 flow_dv_mreg_clone_cb, 1638 flow_dv_mreg_clone_free_cb); 1639 if (!priv->mreg_cp_tbl) { 1640 err = ENOMEM; 1641 goto error; 1642 } 1643 } 1644 rte_spinlock_init(&priv->shared_act_sl); 1645 mlx5_flow_counter_mode_config(eth_dev); 1646 mlx5_flow_drop_action_config(eth_dev); 1647 if (sh->config.dv_flow_en) 1648 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1649 return eth_dev; 1650 error: 1651 if (priv) { 1652 #ifdef HAVE_MLX5_HWS_SUPPORT 1653 if (eth_dev && 1654 priv->sh && 1655 priv->sh->config.dv_flow_en == 2 && 1656 priv->sh->config.dv_esw_en) 1657 flow_hw_destroy_vport_action(eth_dev); 1658 #endif 1659 if (priv->mreg_cp_tbl) 1660 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1661 if (priv->sh) 1662 mlx5_os_free_shared_dr(priv); 1663 if (priv->nl_socket_route >= 0) 1664 close(priv->nl_socket_route); 1665 if (priv->vmwa_context) 1666 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1667 if (eth_dev && priv->drop_queue.hrxq) 1668 mlx5_drop_action_destroy(eth_dev); 1669 if (priv->mtr_profile_tbl) 1670 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1671 if (own_domain_id) 1672 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1673 if (priv->hrxqs) 1674 mlx5_list_destroy(priv->hrxqs); 1675 if (eth_dev && priv->flex_item_map) 1676 mlx5_flex_item_port_cleanup(eth_dev); 1677 mlx5_free(priv->ext_rxqs); 1678 mlx5_free(priv); 1679 if (eth_dev != NULL) 1680 eth_dev->data->dev_private = NULL; 1681 } 1682 if (eth_dev != NULL) { 1683 /* mac_addrs must not be freed alone because part of 1684 * dev_private 1685 **/ 1686 eth_dev->data->mac_addrs = NULL; 1687 rte_eth_dev_release_port(eth_dev); 1688 } 1689 if (sh) 1690 mlx5_free_shared_dev_ctx(sh); 1691 if (nl_rdma >= 0) 1692 close(nl_rdma); 1693 MLX5_ASSERT(err > 0); 1694 rte_errno = err; 1695 return NULL; 1696 } 1697 1698 /** 1699 * Comparison callback to sort device data. 1700 * 1701 * This is meant to be used with qsort(). 1702 * 1703 * @param a[in] 1704 * Pointer to pointer to first data object. 1705 * @param b[in] 1706 * Pointer to pointer to second data object. 1707 * 1708 * @return 1709 * 0 if both objects are equal, less than 0 if the first argument is less 1710 * than the second, greater than 0 otherwise. 1711 */ 1712 static int 1713 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1714 { 1715 const struct mlx5_switch_info *si_a = 1716 &((const struct mlx5_dev_spawn_data *)a)->info; 1717 const struct mlx5_switch_info *si_b = 1718 &((const struct mlx5_dev_spawn_data *)b)->info; 1719 int ret; 1720 1721 /* Master device first. */ 1722 ret = si_b->master - si_a->master; 1723 if (ret) 1724 return ret; 1725 /* Then representor devices. */ 1726 ret = si_b->representor - si_a->representor; 1727 if (ret) 1728 return ret; 1729 /* Unidentified devices come last in no specific order. */ 1730 if (!si_a->representor) 1731 return 0; 1732 /* Order representors by name. */ 1733 return si_a->port_name - si_b->port_name; 1734 } 1735 1736 /** 1737 * Match PCI information for possible slaves of bonding device. 1738 * 1739 * @param[in] ibdev_name 1740 * Name of Infiniband device. 1741 * @param[in] pci_dev 1742 * Pointer to primary PCI address structure to match. 1743 * @param[in] nl_rdma 1744 * Netlink RDMA group socket handle. 1745 * @param[in] owner 1746 * Representor owner PF index. 1747 * @param[out] bond_info 1748 * Pointer to bonding information. 1749 * 1750 * @return 1751 * negative value if no bonding device found, otherwise 1752 * positive index of slave PF in bonding. 1753 */ 1754 static int 1755 mlx5_device_bond_pci_match(const char *ibdev_name, 1756 const struct rte_pci_addr *pci_dev, 1757 int nl_rdma, uint16_t owner, 1758 struct mlx5_bond_info *bond_info) 1759 { 1760 char ifname[IF_NAMESIZE + 1]; 1761 unsigned int ifindex; 1762 unsigned int np, i; 1763 FILE *bond_file = NULL, *file; 1764 int pf = -1; 1765 int ret; 1766 uint8_t cur_guid[32] = {0}; 1767 uint8_t guid[32] = {0}; 1768 1769 /* 1770 * Try to get master device name. If something goes wrong suppose 1771 * the lack of kernel support and no bonding devices. 1772 */ 1773 memset(bond_info, 0, sizeof(*bond_info)); 1774 if (nl_rdma < 0) 1775 return -1; 1776 if (!strstr(ibdev_name, "bond")) 1777 return -1; 1778 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1779 if (!np) 1780 return -1; 1781 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1782 return -1; 1783 /* 1784 * The master device might not be on the predefined port(not on port 1785 * index 1, it is not guaranteed), we have to scan all Infiniband 1786 * device ports and find master. 1787 */ 1788 for (i = 1; i <= np; ++i) { 1789 /* Check whether Infiniband port is populated. */ 1790 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1791 if (!ifindex) 1792 continue; 1793 if (!if_indextoname(ifindex, ifname)) 1794 continue; 1795 /* Try to read bonding slave names from sysfs. */ 1796 MKSTR(slaves, 1797 "/sys/class/net/%s/master/bonding/slaves", ifname); 1798 bond_file = fopen(slaves, "r"); 1799 if (bond_file) 1800 break; 1801 } 1802 if (!bond_file) 1803 return -1; 1804 /* Use safe format to check maximal buffer length. */ 1805 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1806 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1807 char tmp_str[IF_NAMESIZE + 32]; 1808 struct rte_pci_addr pci_addr; 1809 struct mlx5_switch_info info; 1810 int ret; 1811 1812 /* Process slave interface names in the loop. */ 1813 snprintf(tmp_str, sizeof(tmp_str), 1814 "/sys/class/net/%s", ifname); 1815 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1816 DRV_LOG(WARNING, 1817 "Cannot get PCI address for netdev \"%s\".", 1818 ifname); 1819 continue; 1820 } 1821 /* Slave interface PCI address match found. */ 1822 snprintf(tmp_str, sizeof(tmp_str), 1823 "/sys/class/net/%s/phys_port_name", ifname); 1824 file = fopen(tmp_str, "rb"); 1825 if (!file) 1826 break; 1827 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1828 if (fscanf(file, "%32s", tmp_str) == 1) 1829 mlx5_translate_port_name(tmp_str, &info); 1830 fclose(file); 1831 /* Only process PF ports. */ 1832 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1833 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1834 continue; 1835 /* Check max bonding member. */ 1836 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1837 DRV_LOG(WARNING, "bonding index out of range, " 1838 "please increase MLX5_BOND_MAX_PORTS: %s", 1839 tmp_str); 1840 break; 1841 } 1842 /* Get ifindex. */ 1843 snprintf(tmp_str, sizeof(tmp_str), 1844 "/sys/class/net/%s/ifindex", ifname); 1845 file = fopen(tmp_str, "rb"); 1846 if (!file) 1847 break; 1848 ret = fscanf(file, "%u", &ifindex); 1849 fclose(file); 1850 if (ret != 1) 1851 break; 1852 /* Save bonding info. */ 1853 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1854 sizeof(bond_info->ports[0].ifname)); 1855 bond_info->ports[info.port_name].pci_addr = pci_addr; 1856 bond_info->ports[info.port_name].ifindex = ifindex; 1857 bond_info->n_port++; 1858 /* 1859 * Under socket direct mode, bonding will use 1860 * system_image_guid as identification. 1861 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1862 * All bonding members should have the same guid even if driver 1863 * is using PCIe BDF. 1864 */ 1865 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1866 if (ret < 0) 1867 break; 1868 else if (ret > 0) { 1869 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1870 owner == info.port_name && 1871 (owner != 0 || (owner == 0 && 1872 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1873 pf = info.port_name; 1874 } else if (pci_dev->domain == pci_addr.domain && 1875 pci_dev->bus == pci_addr.bus && 1876 pci_dev->devid == pci_addr.devid && 1877 ((pci_dev->function == 0 && 1878 pci_dev->function + owner == pci_addr.function) || 1879 (pci_dev->function == owner && 1880 pci_addr.function == owner))) 1881 pf = info.port_name; 1882 } 1883 if (pf >= 0) { 1884 /* Get bond interface info */ 1885 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1886 bond_info->ifname); 1887 if (ret) 1888 DRV_LOG(ERR, "unable to get bond info: %s", 1889 strerror(rte_errno)); 1890 else 1891 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1892 ifindex, bond_info->ifindex, bond_info->ifname); 1893 } 1894 if (owner == 0 && pf != 0) { 1895 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", 1896 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1897 pci_dev->function); 1898 } 1899 return pf; 1900 } 1901 1902 /** 1903 * Register a PCI device within bonding. 1904 * 1905 * This function spawns Ethernet devices out of a given PCI device and 1906 * bonding owner PF index. 1907 * 1908 * @param[in] cdev 1909 * Pointer to common mlx5 device structure. 1910 * @param[in] req_eth_da 1911 * Requested ethdev device argument. 1912 * @param[in] owner_id 1913 * Requested owner PF port ID within bonding device, default to 0. 1914 * @param[in, out] mkvlist 1915 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1916 * 1917 * @return 1918 * 0 on success, a negative errno value otherwise and rte_errno is set. 1919 */ 1920 static int 1921 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 1922 struct rte_eth_devargs *req_eth_da, 1923 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 1924 { 1925 struct ibv_device **ibv_list; 1926 /* 1927 * Number of found IB Devices matching with requested PCI BDF. 1928 * nd != 1 means there are multiple IB devices over the same 1929 * PCI device and we have representors and master. 1930 */ 1931 unsigned int nd = 0; 1932 /* 1933 * Number of found IB device Ports. nd = 1 and np = 1..n means 1934 * we have the single multiport IB device, and there may be 1935 * representors attached to some of found ports. 1936 */ 1937 unsigned int np = 0; 1938 /* 1939 * Number of DPDK ethernet devices to Spawn - either over 1940 * multiple IB devices or multiple ports of single IB device. 1941 * Actually this is the number of iterations to spawn. 1942 */ 1943 unsigned int ns = 0; 1944 /* 1945 * Bonding device 1946 * < 0 - no bonding device (single one) 1947 * >= 0 - bonding device (value is slave PF index) 1948 */ 1949 int bd = -1; 1950 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 1951 struct mlx5_dev_spawn_data *list = NULL; 1952 struct rte_eth_devargs eth_da = *req_eth_da; 1953 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 1954 struct mlx5_bond_info bond_info; 1955 int ret = -1; 1956 1957 errno = 0; 1958 ibv_list = mlx5_glue->get_device_list(&ret); 1959 if (!ibv_list) { 1960 rte_errno = errno ? errno : ENOSYS; 1961 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 1962 return -rte_errno; 1963 } 1964 /* 1965 * First scan the list of all Infiniband devices to find 1966 * matching ones, gathering into the list. 1967 */ 1968 struct ibv_device *ibv_match[ret + 1]; 1969 int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1970 int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1971 unsigned int i; 1972 1973 while (ret-- > 0) { 1974 struct rte_pci_addr pci_addr; 1975 1976 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 1977 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 1978 nl_rdma, owner_id, &bond_info); 1979 if (bd >= 0) { 1980 /* 1981 * Bonding device detected. Only one match is allowed, 1982 * the bonding is supported over multi-port IB device, 1983 * there should be no matches on representor PCI 1984 * functions or non VF LAG bonding devices with 1985 * specified address. 1986 */ 1987 if (nd) { 1988 DRV_LOG(ERR, 1989 "multiple PCI match on bonding device" 1990 "\"%s\" found", ibv_list[ret]->name); 1991 rte_errno = ENOENT; 1992 ret = -rte_errno; 1993 goto exit; 1994 } 1995 /* Amend owner pci address if owner PF ID specified. */ 1996 if (eth_da.nb_representor_ports) 1997 owner_pci.function += owner_id; 1998 DRV_LOG(INFO, 1999 "PCI information matches for slave %d bonding device \"%s\"", 2000 bd, ibv_list[ret]->name); 2001 ibv_match[nd++] = ibv_list[ret]; 2002 break; 2003 } else { 2004 /* Bonding device not found. */ 2005 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 2006 &pci_addr)) 2007 continue; 2008 if (owner_pci.domain != pci_addr.domain || 2009 owner_pci.bus != pci_addr.bus || 2010 owner_pci.devid != pci_addr.devid || 2011 owner_pci.function != pci_addr.function) 2012 continue; 2013 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 2014 ibv_list[ret]->name); 2015 ibv_match[nd++] = ibv_list[ret]; 2016 } 2017 } 2018 ibv_match[nd] = NULL; 2019 if (!nd) { 2020 /* No device matches, just complain and bail out. */ 2021 DRV_LOG(WARNING, 2022 "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT "," 2023 " are kernel drivers loaded?", 2024 owner_id, owner_pci.domain, owner_pci.bus, 2025 owner_pci.devid, owner_pci.function); 2026 rte_errno = ENOENT; 2027 ret = -rte_errno; 2028 goto exit; 2029 } 2030 if (nd == 1) { 2031 /* 2032 * Found single matching device may have multiple ports. 2033 * Each port may be representor, we have to check the port 2034 * number and check the representors existence. 2035 */ 2036 if (nl_rdma >= 0) 2037 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 2038 if (!np) 2039 DRV_LOG(WARNING, 2040 "Cannot get IB device \"%s\" ports number.", 2041 ibv_match[0]->name); 2042 if (bd >= 0 && !np) { 2043 DRV_LOG(ERR, "Cannot get ports for bonding device."); 2044 rte_errno = ENOENT; 2045 ret = -rte_errno; 2046 goto exit; 2047 } 2048 } 2049 /* Now we can determine the maximal amount of devices to be spawned. */ 2050 list = mlx5_malloc(MLX5_MEM_ZERO, 2051 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2052 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2053 if (!list) { 2054 DRV_LOG(ERR, "Spawn data array allocation failure."); 2055 rte_errno = ENOMEM; 2056 ret = -rte_errno; 2057 goto exit; 2058 } 2059 if (bd >= 0 || np > 1) { 2060 /* 2061 * Single IB device with multiple ports found, 2062 * it may be E-Switch master device and representors. 2063 * We have to perform identification through the ports. 2064 */ 2065 MLX5_ASSERT(nl_rdma >= 0); 2066 MLX5_ASSERT(ns == 0); 2067 MLX5_ASSERT(nd == 1); 2068 MLX5_ASSERT(np); 2069 for (i = 1; i <= np; ++i) { 2070 list[ns].bond_info = &bond_info; 2071 list[ns].max_port = np; 2072 list[ns].phys_port = i; 2073 list[ns].phys_dev_name = ibv_match[0]->name; 2074 list[ns].eth_dev = NULL; 2075 list[ns].pci_dev = pci_dev; 2076 list[ns].cdev = cdev; 2077 list[ns].pf_bond = bd; 2078 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2079 ibv_match[0]->name, 2080 i); 2081 if (!list[ns].ifindex) { 2082 /* 2083 * No network interface index found for the 2084 * specified port, it means there is no 2085 * representor on this port. It's OK, 2086 * there can be disabled ports, for example 2087 * if sriov_numvfs < sriov_totalvfs. 2088 */ 2089 continue; 2090 } 2091 ret = -1; 2092 if (nl_route >= 0) 2093 ret = mlx5_nl_switch_info(nl_route, 2094 list[ns].ifindex, 2095 &list[ns].info); 2096 if (ret || (!list[ns].info.representor && 2097 !list[ns].info.master)) { 2098 /* 2099 * We failed to recognize representors with 2100 * Netlink, let's try to perform the task 2101 * with sysfs. 2102 */ 2103 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2104 &list[ns].info); 2105 } 2106 if (!ret && bd >= 0) { 2107 switch (list[ns].info.name_type) { 2108 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2109 if (np == 1) { 2110 /* 2111 * Force standalone bonding 2112 * device for ROCE LAG 2113 * configurations. 2114 */ 2115 list[ns].info.master = 0; 2116 list[ns].info.representor = 0; 2117 } 2118 if (list[ns].info.port_name == bd) 2119 ns++; 2120 break; 2121 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2122 /* Fallthrough */ 2123 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2124 /* Fallthrough */ 2125 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2126 if (list[ns].info.pf_num == bd) 2127 ns++; 2128 break; 2129 default: 2130 break; 2131 } 2132 continue; 2133 } 2134 if (!ret && (list[ns].info.representor ^ 2135 list[ns].info.master)) 2136 ns++; 2137 } 2138 if (!ns) { 2139 DRV_LOG(ERR, 2140 "Unable to recognize master/representors on the IB device with multiple ports."); 2141 rte_errno = ENOENT; 2142 ret = -rte_errno; 2143 goto exit; 2144 } 2145 } else { 2146 /* 2147 * The existence of several matching entries (nd > 1) means 2148 * port representors have been instantiated. No existing Verbs 2149 * call nor sysfs entries can tell them apart, this can only 2150 * be done through Netlink calls assuming kernel drivers are 2151 * recent enough to support them. 2152 * 2153 * In the event of identification failure through Netlink, 2154 * try again through sysfs, then: 2155 * 2156 * 1. A single IB device matches (nd == 1) with single 2157 * port (np=0/1) and is not a representor, assume 2158 * no switch support. 2159 * 2160 * 2. Otherwise no safe assumptions can be made; 2161 * complain louder and bail out. 2162 */ 2163 for (i = 0; i != nd; ++i) { 2164 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2165 list[ns].bond_info = NULL; 2166 list[ns].max_port = 1; 2167 list[ns].phys_port = 1; 2168 list[ns].phys_dev_name = ibv_match[i]->name; 2169 list[ns].eth_dev = NULL; 2170 list[ns].pci_dev = pci_dev; 2171 list[ns].cdev = cdev; 2172 list[ns].pf_bond = -1; 2173 list[ns].ifindex = 0; 2174 if (nl_rdma >= 0) 2175 list[ns].ifindex = mlx5_nl_ifindex 2176 (nl_rdma, 2177 ibv_match[i]->name, 2178 1); 2179 if (!list[ns].ifindex) { 2180 char ifname[IF_NAMESIZE]; 2181 2182 /* 2183 * Netlink failed, it may happen with old 2184 * ib_core kernel driver (before 4.16). 2185 * We can assume there is old driver because 2186 * here we are processing single ports IB 2187 * devices. Let's try sysfs to retrieve 2188 * the ifindex. The method works for 2189 * master device only. 2190 */ 2191 if (nd > 1) { 2192 /* 2193 * Multiple devices found, assume 2194 * representors, can not distinguish 2195 * master/representor and retrieve 2196 * ifindex via sysfs. 2197 */ 2198 continue; 2199 } 2200 ret = mlx5_get_ifname_sysfs 2201 (ibv_match[i]->ibdev_path, ifname); 2202 if (!ret) 2203 list[ns].ifindex = 2204 if_nametoindex(ifname); 2205 if (!list[ns].ifindex) { 2206 /* 2207 * No network interface index found 2208 * for the specified device, it means 2209 * there it is neither representor 2210 * nor master. 2211 */ 2212 continue; 2213 } 2214 } 2215 ret = -1; 2216 if (nl_route >= 0) 2217 ret = mlx5_nl_switch_info(nl_route, 2218 list[ns].ifindex, 2219 &list[ns].info); 2220 if (ret || (!list[ns].info.representor && 2221 !list[ns].info.master)) { 2222 /* 2223 * We failed to recognize representors with 2224 * Netlink, let's try to perform the task 2225 * with sysfs. 2226 */ 2227 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2228 &list[ns].info); 2229 } 2230 if (!ret && (list[ns].info.representor ^ 2231 list[ns].info.master)) { 2232 ns++; 2233 } else if ((nd == 1) && 2234 !list[ns].info.representor && 2235 !list[ns].info.master) { 2236 /* 2237 * Single IB device with one physical port and 2238 * attached network device. 2239 * May be SRIOV is not enabled or there is no 2240 * representors. 2241 */ 2242 DRV_LOG(INFO, "No E-Switch support detected."); 2243 ns++; 2244 break; 2245 } 2246 } 2247 if (!ns) { 2248 DRV_LOG(ERR, 2249 "Unable to recognize master/representors on the multiple IB devices."); 2250 rte_errno = ENOENT; 2251 ret = -rte_errno; 2252 goto exit; 2253 } 2254 /* 2255 * New kernels may add the switch_id attribute for the case 2256 * there is no E-Switch and we wrongly recognized the only 2257 * device as master. Override this if there is the single 2258 * device with single port and new device name format present. 2259 */ 2260 if (nd == 1 && 2261 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2262 list[0].info.master = 0; 2263 list[0].info.representor = 0; 2264 } 2265 } 2266 MLX5_ASSERT(ns); 2267 /* 2268 * Sort list to probe devices in natural order for users convenience 2269 * (i.e. master first, then representors from lowest to highest ID). 2270 */ 2271 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2272 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2273 /* Set devargs default values. */ 2274 if (eth_da.nb_mh_controllers == 0) { 2275 eth_da.nb_mh_controllers = 1; 2276 eth_da.mh_controllers[0] = 0; 2277 } 2278 if (eth_da.nb_ports == 0 && ns > 0) { 2279 if (list[0].pf_bond >= 0 && list[0].info.representor) 2280 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2281 pci_dev->device.devargs->args); 2282 eth_da.nb_ports = 1; 2283 eth_da.ports[0] = list[0].info.pf_num; 2284 } 2285 if (eth_da.nb_representor_ports == 0) { 2286 eth_da.nb_representor_ports = 1; 2287 eth_da.representor_ports[0] = 0; 2288 } 2289 } 2290 for (i = 0; i != ns; ++i) { 2291 uint32_t restore; 2292 2293 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2294 mkvlist); 2295 if (!list[i].eth_dev) { 2296 if (rte_errno != EBUSY && rte_errno != EEXIST) 2297 break; 2298 /* Device is disabled or already spawned. Ignore it. */ 2299 continue; 2300 } 2301 restore = list[i].eth_dev->data->dev_flags; 2302 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2303 /** 2304 * Each representor has a dedicated interrupts vector. 2305 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2306 * representor eth_dev object because representor and PF 2307 * share the same PCI address. 2308 * Override representor device with a dedicated 2309 * interrupts handle here. 2310 * Representor interrupts handle is released in mlx5_dev_stop(). 2311 */ 2312 if (list[i].info.representor) { 2313 struct rte_intr_handle *intr_handle = 2314 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2315 if (intr_handle == NULL) { 2316 DRV_LOG(ERR, 2317 "port %u failed to allocate memory for interrupt handler " 2318 "Rx interrupts will not be supported", 2319 i); 2320 rte_errno = ENOMEM; 2321 ret = -rte_errno; 2322 goto exit; 2323 } 2324 list[i].eth_dev->intr_handle = intr_handle; 2325 } 2326 /* Restore non-PCI flags cleared by the above call. */ 2327 list[i].eth_dev->data->dev_flags |= restore; 2328 rte_eth_dev_probing_finish(list[i].eth_dev); 2329 } 2330 if (i != ns) { 2331 DRV_LOG(ERR, 2332 "probe of PCI device " PCI_PRI_FMT " aborted after" 2333 " encountering an error: %s", 2334 owner_pci.domain, owner_pci.bus, 2335 owner_pci.devid, owner_pci.function, 2336 strerror(rte_errno)); 2337 ret = -rte_errno; 2338 /* Roll back. */ 2339 while (i--) { 2340 if (!list[i].eth_dev) 2341 continue; 2342 mlx5_dev_close(list[i].eth_dev); 2343 /* mac_addrs must not be freed because in dev_private */ 2344 list[i].eth_dev->data->mac_addrs = NULL; 2345 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2346 } 2347 /* Restore original error. */ 2348 rte_errno = -ret; 2349 } else { 2350 ret = 0; 2351 } 2352 exit: 2353 /* 2354 * Do the routine cleanup: 2355 * - close opened Netlink sockets 2356 * - free allocated spawn data array 2357 * - free the Infiniband device list 2358 */ 2359 if (nl_rdma >= 0) 2360 close(nl_rdma); 2361 if (nl_route >= 0) 2362 close(nl_route); 2363 if (list) 2364 mlx5_free(list); 2365 MLX5_ASSERT(ibv_list); 2366 mlx5_glue->free_device_list(ibv_list); 2367 return ret; 2368 } 2369 2370 static int 2371 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2372 struct rte_eth_devargs *eth_da) 2373 { 2374 int ret = 0; 2375 2376 if (dev->devargs == NULL) 2377 return 0; 2378 memset(eth_da, 0, sizeof(*eth_da)); 2379 /* Parse representor information first from class argument. */ 2380 if (dev->devargs->cls_str) 2381 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2382 if (ret != 0) { 2383 DRV_LOG(ERR, "failed to parse device arguments: %s", 2384 dev->devargs->cls_str); 2385 return -rte_errno; 2386 } 2387 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) { 2388 /* Parse legacy device argument */ 2389 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2390 if (ret) { 2391 DRV_LOG(ERR, "failed to parse device arguments: %s", 2392 dev->devargs->args); 2393 return -rte_errno; 2394 } 2395 } 2396 return 0; 2397 } 2398 2399 /** 2400 * Callback to register a PCI device. 2401 * 2402 * This function spawns Ethernet devices out of a given PCI device. 2403 * 2404 * @param[in] cdev 2405 * Pointer to common mlx5 device structure. 2406 * @param[in, out] mkvlist 2407 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2408 * 2409 * @return 2410 * 0 on success, a negative errno value otherwise and rte_errno is set. 2411 */ 2412 static int 2413 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2414 struct mlx5_kvargs_ctrl *mkvlist) 2415 { 2416 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2417 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2418 int ret = 0; 2419 uint16_t p; 2420 2421 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2422 if (ret != 0) 2423 return ret; 2424 2425 if (eth_da.nb_ports > 0) { 2426 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2427 for (p = 0; p < eth_da.nb_ports; p++) { 2428 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2429 eth_da.ports[p], mkvlist); 2430 if (ret) { 2431 DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " " 2432 "aborted due to proding failure of PF %u", 2433 pci_dev->addr.domain, pci_dev->addr.bus, 2434 pci_dev->addr.devid, pci_dev->addr.function, 2435 eth_da.ports[p]); 2436 mlx5_net_remove(cdev); 2437 if (p != 0) 2438 break; 2439 } 2440 } 2441 } else { 2442 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2443 } 2444 return ret; 2445 } 2446 2447 /* Probe a single SF device on auxiliary bus, no representor support. */ 2448 static int 2449 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2450 struct mlx5_kvargs_ctrl *mkvlist) 2451 { 2452 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2453 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 2454 struct rte_device *dev = cdev->dev; 2455 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2456 struct rte_eth_dev *eth_dev; 2457 int ret = 0; 2458 2459 /* Parse ethdev devargs. */ 2460 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2461 if (ret != 0) 2462 return ret; 2463 /* Init spawn data. */ 2464 spawn.max_port = 1; 2465 spawn.phys_port = 1; 2466 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2467 ret = mlx5_auxiliary_get_ifindex(dev->name); 2468 if (ret < 0) { 2469 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2470 return ret; 2471 } 2472 spawn.ifindex = ret; 2473 spawn.cdev = cdev; 2474 /* Spawn device. */ 2475 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2476 if (eth_dev == NULL) 2477 return -rte_errno; 2478 /* Post create. */ 2479 eth_dev->intr_handle = adev->intr_handle; 2480 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2481 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2482 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2483 eth_dev->data->numa_node = dev->numa_node; 2484 } 2485 rte_eth_dev_probing_finish(eth_dev); 2486 return 0; 2487 } 2488 2489 /** 2490 * Net class driver callback to probe a device. 2491 * 2492 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2493 * 2494 * @param[in] cdev 2495 * Pointer to the common mlx5 device. 2496 * @param[in, out] mkvlist 2497 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2498 * 2499 * @return 2500 * 0 on success, a negative errno value otherwise and rte_errno is set. 2501 */ 2502 int 2503 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2504 struct mlx5_kvargs_ctrl *mkvlist) 2505 { 2506 int ret; 2507 2508 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2509 mlx5_pmd_socket_init(); 2510 ret = mlx5_init_once(); 2511 if (ret) { 2512 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2513 strerror(rte_errno)); 2514 return -rte_errno; 2515 } 2516 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2517 if (ret) { 2518 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2519 strerror(rte_errno)); 2520 return -rte_errno; 2521 } 2522 if (mlx5_dev_is_pci(cdev->dev)) 2523 return mlx5_os_pci_probe(cdev, mkvlist); 2524 else 2525 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2526 } 2527 2528 /** 2529 * Cleanup resources when the last device is closed. 2530 */ 2531 void 2532 mlx5_os_net_cleanup(void) 2533 { 2534 mlx5_pmd_socket_uninit(); 2535 } 2536 2537 /** 2538 * Install shared asynchronous device events handler. 2539 * This function is implemented to support event sharing 2540 * between multiple ports of single IB device. 2541 * 2542 * @param sh 2543 * Pointer to mlx5_dev_ctx_shared object. 2544 */ 2545 void 2546 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2547 { 2548 struct ibv_context *ctx = sh->cdev->ctx; 2549 int nlsk_fd; 2550 2551 sh->intr_handle = mlx5_os_interrupt_handler_create 2552 (RTE_INTR_INSTANCE_F_SHARED, true, 2553 ctx->async_fd, mlx5_dev_interrupt_handler, sh); 2554 if (!sh->intr_handle) { 2555 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2556 return; 2557 } 2558 nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK); 2559 if (nlsk_fd < 0) { 2560 DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s", 2561 rte_strerror(rte_errno)); 2562 return; 2563 } 2564 sh->intr_handle_nl = mlx5_os_interrupt_handler_create 2565 (RTE_INTR_INSTANCE_F_SHARED, true, 2566 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh); 2567 if (sh->intr_handle_nl == NULL) { 2568 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2569 return; 2570 } 2571 if (sh->cdev->config.devx) { 2572 #ifdef HAVE_IBV_DEVX_ASYNC 2573 struct mlx5dv_devx_cmd_comp *devx_comp; 2574 2575 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2576 devx_comp = sh->devx_comp; 2577 if (!devx_comp) { 2578 DRV_LOG(INFO, "failed to allocate devx_comp."); 2579 return; 2580 } 2581 sh->intr_handle_devx = mlx5_os_interrupt_handler_create 2582 (RTE_INTR_INSTANCE_F_SHARED, true, 2583 devx_comp->fd, 2584 mlx5_dev_interrupt_handler_devx, sh); 2585 if (!sh->intr_handle_devx) { 2586 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2587 return; 2588 } 2589 #endif /* HAVE_IBV_DEVX_ASYNC */ 2590 } 2591 } 2592 2593 /** 2594 * Uninstall shared asynchronous device events handler. 2595 * This function is implemented to support event sharing 2596 * between multiple ports of single IB device. 2597 * 2598 * @param dev 2599 * Pointer to mlx5_dev_ctx_shared object. 2600 */ 2601 void 2602 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2603 { 2604 mlx5_os_interrupt_handler_destroy(sh->intr_handle, 2605 mlx5_dev_interrupt_handler, sh); 2606 mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl, 2607 mlx5_dev_interrupt_handler_nl, sh); 2608 #ifdef HAVE_IBV_DEVX_ASYNC 2609 mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx, 2610 mlx5_dev_interrupt_handler_devx, sh); 2611 if (sh->devx_comp) 2612 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2613 #endif 2614 } 2615 2616 /** 2617 * Read statistics by a named counter. 2618 * 2619 * @param[in] priv 2620 * Pointer to the private device data structure. 2621 * @param[in] ctr_name 2622 * Pointer to the name of the statistic counter to read 2623 * @param[out] stat 2624 * Pointer to read statistic value. 2625 * @return 2626 * 0 on success and stat is valud, 1 if failed to read the value 2627 * rte_errno is set. 2628 * 2629 */ 2630 int 2631 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2632 uint64_t *stat) 2633 { 2634 int fd; 2635 2636 if (priv->sh) { 2637 if (priv->q_counters != NULL && 2638 strcmp(ctr_name, "out_of_buffer") == 0) 2639 return mlx5_devx_cmd_queue_counter_query 2640 (priv->q_counters, 0, (uint32_t *)stat); 2641 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2642 priv->sh->ibdev_path, 2643 priv->dev_port, 2644 ctr_name); 2645 fd = open(path, O_RDONLY); 2646 /* 2647 * in switchdev the file location is not per port 2648 * but rather in <ibdev_path>/hw_counters/<file_name>. 2649 */ 2650 if (fd == -1) { 2651 MKSTR(path1, "%s/hw_counters/%s", 2652 priv->sh->ibdev_path, 2653 ctr_name); 2654 fd = open(path1, O_RDONLY); 2655 } 2656 if (fd != -1) { 2657 char buf[21] = {'\0'}; 2658 ssize_t n = read(fd, buf, sizeof(buf)); 2659 2660 close(fd); 2661 if (n != -1) { 2662 *stat = strtoull(buf, NULL, 10); 2663 return 0; 2664 } 2665 } 2666 } 2667 *stat = 0; 2668 return 1; 2669 } 2670 2671 /** 2672 * Remove a MAC address from device 2673 * 2674 * @param dev 2675 * Pointer to Ethernet device structure. 2676 * @param index 2677 * MAC address index. 2678 */ 2679 void 2680 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2681 { 2682 struct mlx5_priv *priv = dev->data->dev_private; 2683 const int vf = priv->sh->dev_cap.vf; 2684 2685 if (vf) 2686 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2687 mlx5_ifindex(dev), priv->mac_own, 2688 &dev->data->mac_addrs[index], index); 2689 } 2690 2691 /** 2692 * Adds a MAC address to the device 2693 * 2694 * @param dev 2695 * Pointer to Ethernet device structure. 2696 * @param mac_addr 2697 * MAC address to register. 2698 * @param index 2699 * MAC address index. 2700 * 2701 * @return 2702 * 0 on success, a negative errno value otherwise 2703 */ 2704 int 2705 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2706 uint32_t index) 2707 { 2708 struct mlx5_priv *priv = dev->data->dev_private; 2709 const int vf = priv->sh->dev_cap.vf; 2710 int ret = 0; 2711 2712 if (vf) 2713 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2714 mlx5_ifindex(dev), priv->mac_own, 2715 mac, index); 2716 return ret; 2717 } 2718 2719 /** 2720 * Modify a VF MAC address 2721 * 2722 * @param priv 2723 * Pointer to device private data. 2724 * @param mac_addr 2725 * MAC address to modify into. 2726 * @param iface_idx 2727 * Net device interface index 2728 * @param vf_index 2729 * VF index 2730 * 2731 * @return 2732 * 0 on success, a negative errno value otherwise 2733 */ 2734 int 2735 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2736 unsigned int iface_idx, 2737 struct rte_ether_addr *mac_addr, 2738 int vf_index) 2739 { 2740 return mlx5_nl_vf_mac_addr_modify 2741 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2742 } 2743 2744 /** 2745 * Set device promiscuous mode 2746 * 2747 * @param dev 2748 * Pointer to Ethernet device structure. 2749 * @param enable 2750 * 0 - promiscuous is disabled, otherwise - enabled 2751 * 2752 * @return 2753 * 0 on success, a negative error value otherwise 2754 */ 2755 int 2756 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2757 { 2758 struct mlx5_priv *priv = dev->data->dev_private; 2759 2760 return mlx5_nl_promisc(priv->nl_socket_route, 2761 mlx5_ifindex(dev), !!enable); 2762 } 2763 2764 /** 2765 * Set device promiscuous mode 2766 * 2767 * @param dev 2768 * Pointer to Ethernet device structure. 2769 * @param enable 2770 * 0 - all multicase is disabled, otherwise - enabled 2771 * 2772 * @return 2773 * 0 on success, a negative error value otherwise 2774 */ 2775 int 2776 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2777 { 2778 struct mlx5_priv *priv = dev->data->dev_private; 2779 2780 return mlx5_nl_allmulti(priv->nl_socket_route, 2781 mlx5_ifindex(dev), !!enable); 2782 } 2783 2784 /** 2785 * Flush device MAC addresses 2786 * 2787 * @param dev 2788 * Pointer to Ethernet device structure. 2789 * 2790 */ 2791 void 2792 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2793 { 2794 struct mlx5_priv *priv = dev->data->dev_private; 2795 2796 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2797 dev->data->mac_addrs, 2798 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2799 } 2800