1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <bus_driver.h> 23 #include <bus_pci_driver.h> 24 #include <bus_auxiliary_driver.h> 25 #include <rte_common.h> 26 #include <rte_kvargs.h> 27 #include <rte_rwlock.h> 28 #include <rte_spinlock.h> 29 #include <rte_string_fns.h> 30 #include <rte_alarm.h> 31 #include <rte_eal_paging.h> 32 33 #include <mlx5_glue.h> 34 #include <mlx5_devx_cmds.h> 35 #include <mlx5_common.h> 36 #include <mlx5_common_mp.h> 37 #include <mlx5_common_mr.h> 38 #include <mlx5_malloc.h> 39 40 #include "mlx5_defs.h" 41 #include "mlx5.h" 42 #include "mlx5_common_os.h" 43 #include "mlx5_utils.h" 44 #include "mlx5_rxtx.h" 45 #include "mlx5_rx.h" 46 #include "mlx5_tx.h" 47 #include "mlx5_autoconf.h" 48 #include "mlx5_flow.h" 49 #include "rte_pmd_mlx5.h" 50 #include "mlx5_verbs.h" 51 #include "mlx5_nl.h" 52 #include "mlx5_devx.h" 53 54 #ifndef HAVE_IBV_MLX5_MOD_MPW 55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 57 #endif 58 59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 61 #endif 62 63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 64 65 /* Spinlock for mlx5_shared_data allocation. */ 66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 67 68 /* Process local data for secondary processes. */ 69 static struct mlx5_local_data mlx5_local_data; 70 71 /* rte flow indexed pool configuration. */ 72 static struct mlx5_indexed_pool_config icfg[] = { 73 { 74 .size = sizeof(struct rte_flow), 75 .trunk_size = 64, 76 .need_lock = 1, 77 .release_mem_en = 0, 78 .malloc = mlx5_malloc, 79 .free = mlx5_free, 80 .per_core_cache = 0, 81 .type = "ctl_flow_ipool", 82 }, 83 { 84 .size = sizeof(struct rte_flow), 85 .trunk_size = 64, 86 .grow_trunk = 3, 87 .grow_shift = 2, 88 .need_lock = 1, 89 .release_mem_en = 0, 90 .malloc = mlx5_malloc, 91 .free = mlx5_free, 92 .per_core_cache = 1 << 14, 93 .type = "rte_flow_ipool", 94 }, 95 { 96 .size = sizeof(struct rte_flow), 97 .trunk_size = 64, 98 .grow_trunk = 3, 99 .grow_shift = 2, 100 .need_lock = 1, 101 .release_mem_en = 0, 102 .malloc = mlx5_malloc, 103 .free = mlx5_free, 104 .per_core_cache = 0, 105 .type = "mcp_flow_ipool", 106 }, 107 }; 108 109 /** 110 * Set the completion channel file descriptor interrupt as non-blocking. 111 * 112 * @param[in] rxq_obj 113 * Pointer to RQ channel object, which includes the channel fd 114 * 115 * @param[out] fd 116 * The file descriptor (representing the interrupt) used in this channel. 117 * 118 * @return 119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 120 */ 121 int 122 mlx5_os_set_nonblock_channel_fd(int fd) 123 { 124 int flags; 125 126 flags = fcntl(fd, F_GETFL); 127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 128 } 129 130 /** 131 * Get mlx5 device attributes. The glue function query_device_ex() is called 132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 133 * device attributes from the glue out parameter. 134 * 135 * @param sh 136 * Pointer to shared device context. 137 * 138 * @return 139 * 0 on success, a negative errno value otherwise and rte_errno is set. 140 */ 141 int 142 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 143 { 144 int err; 145 struct mlx5_common_device *cdev = sh->cdev; 146 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 147 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 148 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 149 150 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 151 if (err) { 152 rte_errno = errno; 153 return -rte_errno; 154 } 155 #ifdef HAVE_IBV_MLX5_MOD_SWP 156 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 157 #endif 158 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 159 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 160 #endif 161 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 162 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 163 #endif 164 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 165 if (err) { 166 rte_errno = errno; 167 return -rte_errno; 168 } 169 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 170 if (mlx5_dev_is_pci(cdev->dev)) 171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 172 else 173 sh->dev_cap.sf = 1; 174 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 175 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 176 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 177 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 178 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 179 sh->dev_cap.dest_tir = 1; 180 #endif 181 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 182 DRV_LOG(DEBUG, "DV flow is supported."); 183 sh->dev_cap.dv_flow_en = 1; 184 #endif 185 #ifdef HAVE_MLX5DV_DR_ESWITCH 186 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 187 sh->dev_cap.dv_esw_en = 1; 188 #endif 189 /* 190 * Multi-packet send is supported by ConnectX-4 Lx PF as well 191 * as all ConnectX-5 devices. 192 */ 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 194 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 195 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 196 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 197 } else { 198 DRV_LOG(DEBUG, "MPW is supported."); 199 sh->dev_cap.mps = MLX5_MPW; 200 } 201 } else { 202 DRV_LOG(DEBUG, "MPW isn't supported."); 203 sh->dev_cap.mps = MLX5_MPW_DISABLED; 204 } 205 #if (RTE_CACHE_LINE_SIZE == 128) 206 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 207 sh->dev_cap.cqe_comp = 1; 208 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 209 sh->dev_cap.cqe_comp ? "" : "not "); 210 #else 211 sh->dev_cap.cqe_comp = 1; 212 #endif 213 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 214 sh->dev_cap.mpls_en = 215 ((dv_attr.tunnel_offloads_caps & 216 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 217 (dv_attr.tunnel_offloads_caps & 218 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 219 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 220 sh->dev_cap.mpls_en ? "" : "not "); 221 #else 222 DRV_LOG(WARNING, 223 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 224 #endif 225 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 226 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 227 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 228 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 229 IBV_DEVICE_PCI_WRITE_END_PADDING); 230 #endif 231 sh->dev_cap.hw_csum = 232 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 233 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 234 sh->dev_cap.hw_csum ? "" : "not "); 235 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 236 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 237 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 238 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 239 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 240 IBV_RAW_PACKET_CAP_SCATTER_FCS); 241 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 242 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 243 DRV_LOG(DEBUG, "Counters are not supported."); 244 #endif 245 /* 246 * DPDK doesn't support larger/variable indirection tables. 247 * Once DPDK supports it, take max size from device attr. 248 */ 249 sh->dev_cap.ind_table_max_size = 250 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 251 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 252 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 253 sh->dev_cap.ind_table_max_size); 254 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 255 (attr_ex.tso_caps.supported_qpts & 256 (1 << IBV_QPT_RAW_PACKET))); 257 if (sh->dev_cap.tso) 258 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 259 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 260 sizeof(sh->dev_cap.fw_ver)); 261 #ifdef HAVE_IBV_MLX5_MOD_SWP 262 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 263 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 264 (MLX5_SW_PARSING_CAP | 265 MLX5_SW_PARSING_CSUM_CAP | 266 MLX5_SW_PARSING_TSO_CAP); 267 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 268 #endif 269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 270 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 271 struct mlx5dv_striding_rq_caps *strd_rq_caps = 272 &dv_attr.striding_rq_caps; 273 274 sh->dev_cap.mprq.enabled = 1; 275 sh->dev_cap.mprq.log_min_stride_size = 276 strd_rq_caps->min_single_stride_log_num_of_bytes; 277 sh->dev_cap.mprq.log_max_stride_size = 278 strd_rq_caps->max_single_stride_log_num_of_bytes; 279 sh->dev_cap.mprq.log_min_stride_num = 280 strd_rq_caps->min_single_wqe_log_num_of_strides; 281 sh->dev_cap.mprq.log_max_stride_num = 282 strd_rq_caps->max_single_wqe_log_num_of_strides; 283 sh->dev_cap.mprq.log_min_stride_wqe_size = 284 cdev->config.devx ? 285 hca_attr->log_min_stride_wqe_sz : 286 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 287 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 288 sh->dev_cap.mprq.log_min_stride_size); 289 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 290 sh->dev_cap.mprq.log_max_stride_size); 291 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 292 sh->dev_cap.mprq.log_min_stride_num); 293 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 294 sh->dev_cap.mprq.log_max_stride_num); 295 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 296 sh->dev_cap.mprq.log_min_stride_wqe_size); 297 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 298 strd_rq_caps->supported_qpts); 299 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 300 } 301 #endif 302 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 303 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 304 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 305 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 306 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 307 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 308 } 309 if (sh->dev_cap.tunnel_en) { 310 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 311 sh->dev_cap.tunnel_en & 312 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 313 sh->dev_cap.tunnel_en & 314 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 315 sh->dev_cap.tunnel_en & 316 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 317 } else { 318 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 319 } 320 #else 321 DRV_LOG(WARNING, 322 "Tunnel offloading disabled due to old OFED/rdma-core version"); 323 #endif 324 if (!sh->cdev->config.devx) 325 return 0; 326 /* Check capabilities for Packet Pacing. */ 327 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 328 hca_attr->dev_freq_khz); 329 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 330 hca_attr->qos.packet_pacing ? "" : "not "); 331 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 332 hca_attr->cross_channel ? "" : "not "); 333 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 334 hca_attr->wqe_index_ignore ? "" : "not "); 335 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 336 hca_attr->non_wire_sq ? "" : "not "); 337 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 338 hca_attr->log_max_static_sq_wq ? "" : "not ", 339 hca_attr->log_max_static_sq_wq); 340 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 341 hca_attr->qos.wqe_rate_pp ? "" : "not "); 342 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 343 if (!hca_attr->cross_channel) { 344 DRV_LOG(DEBUG, 345 "Cross channel operations are required for packet pacing."); 346 sh->dev_cap.txpp_en = 0; 347 } 348 if (!hca_attr->wqe_index_ignore) { 349 DRV_LOG(DEBUG, 350 "WQE index ignore feature is required for packet pacing."); 351 sh->dev_cap.txpp_en = 0; 352 } 353 if (!hca_attr->non_wire_sq) { 354 DRV_LOG(DEBUG, 355 "Non-wire SQ feature is required for packet pacing."); 356 sh->dev_cap.txpp_en = 0; 357 } 358 if (!hca_attr->log_max_static_sq_wq) { 359 DRV_LOG(DEBUG, 360 "Static WQE SQ feature is required for packet pacing."); 361 sh->dev_cap.txpp_en = 0; 362 } 363 if (!hca_attr->qos.wqe_rate_pp) { 364 DRV_LOG(DEBUG, 365 "WQE rate mode is required for packet pacing."); 366 sh->dev_cap.txpp_en = 0; 367 } 368 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 369 DRV_LOG(DEBUG, 370 "DevX does not provide UAR offset, can't create queues for packet pacing."); 371 sh->dev_cap.txpp_en = 0; 372 #endif 373 sh->dev_cap.scatter_fcs_w_decap_disable = 374 hca_attr->scatter_fcs_w_decap_disable; 375 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 376 mlx5_rt_timestamp_config(sh, hca_attr); 377 return 0; 378 } 379 380 /** 381 * Detect misc5 support or not 382 * 383 * @param[in] priv 384 * Device private data pointer 385 */ 386 #ifdef HAVE_MLX5DV_DR 387 static void 388 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 389 { 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 391 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 392 * Case: IPv4--->UDP--->VxLAN--->vni 393 */ 394 void *tbl; 395 struct mlx5_flow_dv_match_params matcher_mask; 396 void *match_m; 397 void *matcher; 398 void *headers_m; 399 void *misc5_m; 400 uint32_t *tunnel_header_m; 401 struct mlx5dv_flow_matcher_attr dv_attr; 402 403 memset(&matcher_mask, 0, sizeof(matcher_mask)); 404 matcher_mask.size = sizeof(matcher_mask.buf); 405 match_m = matcher_mask.buf; 406 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 407 misc5_m = MLX5_ADDR_OF(fte_match_param, 408 match_m, misc_parameters_5); 409 tunnel_header_m = (uint32_t *) 410 MLX5_ADDR_OF(fte_match_set_misc5, 411 misc5_m, tunnel_header_1); 412 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 413 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 414 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 415 *tunnel_header_m = 0xffffff; 416 417 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 418 if (!tbl) { 419 DRV_LOG(INFO, "No SW steering support"); 420 return; 421 } 422 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 423 dv_attr.match_mask = (void *)&matcher_mask, 424 dv_attr.match_criteria_enable = 425 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 426 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 427 dv_attr.priority = 3; 428 #ifdef HAVE_MLX5DV_DR_ESWITCH 429 void *misc2_m; 430 if (priv->sh->config.dv_esw_en) { 431 /* FDB enabled reg_c_0 */ 432 dv_attr.match_criteria_enable |= 433 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 434 misc2_m = MLX5_ADDR_OF(fte_match_param, 435 match_m, misc_parameters_2); 436 MLX5_SET(fte_match_set_misc2, misc2_m, 437 metadata_reg_c_0, 0xffff); 438 } 439 #endif 440 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 441 &dv_attr, tbl); 442 if (matcher) { 443 priv->sh->misc5_cap = 1; 444 mlx5_glue->dv_destroy_flow_matcher(matcher); 445 } 446 mlx5_glue->dr_destroy_flow_tbl(tbl); 447 #else 448 RTE_SET_USED(priv); 449 #endif 450 } 451 #endif 452 453 /** 454 * Initialize DR related data within private structure. 455 * Routine checks the reference counter and does actual 456 * resources creation/initialization only if counter is zero. 457 * 458 * @param[in] priv 459 * Pointer to the private device data structure. 460 * 461 * @return 462 * Zero on success, positive error code otherwise. 463 */ 464 static int 465 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 466 { 467 struct mlx5_dev_ctx_shared *sh = priv->sh; 468 char s[MLX5_NAME_SIZE] __rte_unused; 469 int err; 470 471 MLX5_ASSERT(sh && sh->refcnt); 472 if (sh->refcnt > 1) 473 return 0; 474 err = mlx5_alloc_table_hash_list(priv); 475 if (err) 476 goto error; 477 sh->default_miss_action = 478 mlx5_glue->dr_create_flow_action_default_miss(); 479 if (!sh->default_miss_action) 480 DRV_LOG(WARNING, "Default miss action is not supported."); 481 /* The resources below are only valid with DV support. */ 482 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 483 /* Init shared flex parsers list, no need lcore_share */ 484 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 485 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 486 mlx5_flex_parser_create_cb, 487 mlx5_flex_parser_match_cb, 488 mlx5_flex_parser_remove_cb, 489 mlx5_flex_parser_clone_cb, 490 mlx5_flex_parser_clone_free_cb); 491 if (!sh->flex_parsers_dv) 492 goto error; 493 if (priv->sh->config.dv_flow_en == 2) 494 return 0; 495 /* Init port id action list. */ 496 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 497 sh->port_id_action_list = mlx5_list_create(s, sh, true, 498 flow_dv_port_id_create_cb, 499 flow_dv_port_id_match_cb, 500 flow_dv_port_id_remove_cb, 501 flow_dv_port_id_clone_cb, 502 flow_dv_port_id_clone_free_cb); 503 if (!sh->port_id_action_list) 504 goto error; 505 /* Init push vlan action list. */ 506 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 507 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 508 flow_dv_push_vlan_create_cb, 509 flow_dv_push_vlan_match_cb, 510 flow_dv_push_vlan_remove_cb, 511 flow_dv_push_vlan_clone_cb, 512 flow_dv_push_vlan_clone_free_cb); 513 if (!sh->push_vlan_action_list) 514 goto error; 515 /* Init sample action list. */ 516 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 517 sh->sample_action_list = mlx5_list_create(s, sh, true, 518 flow_dv_sample_create_cb, 519 flow_dv_sample_match_cb, 520 flow_dv_sample_remove_cb, 521 flow_dv_sample_clone_cb, 522 flow_dv_sample_clone_free_cb); 523 if (!sh->sample_action_list) 524 goto error; 525 /* Init dest array action list. */ 526 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 527 sh->dest_array_list = mlx5_list_create(s, sh, true, 528 flow_dv_dest_array_create_cb, 529 flow_dv_dest_array_match_cb, 530 flow_dv_dest_array_remove_cb, 531 flow_dv_dest_array_clone_cb, 532 flow_dv_dest_array_clone_free_cb); 533 if (!sh->dest_array_list) 534 goto error; 535 #else 536 if (priv->sh->config.dv_flow_en == 2) 537 return 0; 538 #endif 539 #ifdef HAVE_MLX5DV_DR 540 void *domain; 541 542 /* Reference counter is zero, we should initialize structures. */ 543 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 544 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 545 if (!domain) { 546 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 547 err = errno; 548 goto error; 549 } 550 sh->rx_domain = domain; 551 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 552 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 553 if (!domain) { 554 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 555 err = errno; 556 goto error; 557 } 558 sh->tx_domain = domain; 559 #ifdef HAVE_MLX5DV_DR_ESWITCH 560 if (sh->config.dv_esw_en) { 561 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 562 MLX5DV_DR_DOMAIN_TYPE_FDB); 563 if (!domain) { 564 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 565 err = errno; 566 goto error; 567 } 568 sh->fdb_domain = domain; 569 } 570 /* 571 * The drop action is just some dummy placeholder in rdma-core. It 572 * does not belong to domains and has no any attributes, and, can be 573 * shared by the entire device. 574 */ 575 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 576 if (!sh->dr_drop_action) { 577 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 578 err = errno; 579 goto error; 580 } 581 #endif 582 if (!sh->tunnel_hub && sh->config.dv_miss_info) 583 err = mlx5_alloc_tunnel_hub(sh); 584 if (err) { 585 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 586 goto error; 587 } 588 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 589 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 590 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 591 if (sh->fdb_domain) 592 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 593 } 594 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 595 if (!sh->config.allow_duplicate_pattern) { 596 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 597 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 598 #endif 599 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 600 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 601 if (sh->fdb_domain) 602 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 603 } 604 605 __mlx5_discovery_misc5_cap(priv); 606 #endif /* HAVE_MLX5DV_DR */ 607 LIST_INIT(&sh->shared_rxqs); 608 return 0; 609 error: 610 /* Rollback the created objects. */ 611 if (sh->rx_domain) { 612 mlx5_glue->dr_destroy_domain(sh->rx_domain); 613 sh->rx_domain = NULL; 614 } 615 if (sh->tx_domain) { 616 mlx5_glue->dr_destroy_domain(sh->tx_domain); 617 sh->tx_domain = NULL; 618 } 619 if (sh->fdb_domain) { 620 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 621 sh->fdb_domain = NULL; 622 } 623 if (sh->dr_drop_action) { 624 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 625 sh->dr_drop_action = NULL; 626 } 627 if (sh->pop_vlan_action) { 628 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 629 sh->pop_vlan_action = NULL; 630 } 631 if (sh->encaps_decaps) { 632 mlx5_hlist_destroy(sh->encaps_decaps); 633 sh->encaps_decaps = NULL; 634 } 635 if (sh->modify_cmds) { 636 mlx5_hlist_destroy(sh->modify_cmds); 637 sh->modify_cmds = NULL; 638 } 639 if (sh->tag_table) { 640 /* tags should be destroyed with flow before. */ 641 mlx5_hlist_destroy(sh->tag_table); 642 sh->tag_table = NULL; 643 } 644 if (sh->tunnel_hub) { 645 mlx5_release_tunnel_hub(sh, priv->dev_port); 646 sh->tunnel_hub = NULL; 647 } 648 mlx5_free_table_hash_list(priv); 649 if (sh->port_id_action_list) { 650 mlx5_list_destroy(sh->port_id_action_list); 651 sh->port_id_action_list = NULL; 652 } 653 if (sh->push_vlan_action_list) { 654 mlx5_list_destroy(sh->push_vlan_action_list); 655 sh->push_vlan_action_list = NULL; 656 } 657 if (sh->sample_action_list) { 658 mlx5_list_destroy(sh->sample_action_list); 659 sh->sample_action_list = NULL; 660 } 661 if (sh->dest_array_list) { 662 mlx5_list_destroy(sh->dest_array_list); 663 sh->dest_array_list = NULL; 664 } 665 return err; 666 } 667 668 /** 669 * Destroy DR related data within private structure. 670 * 671 * @param[in] priv 672 * Pointer to the private device data structure. 673 */ 674 void 675 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 676 { 677 struct mlx5_dev_ctx_shared *sh = priv->sh; 678 #ifdef HAVE_MLX5DV_DR 679 int i; 680 #endif 681 682 MLX5_ASSERT(sh && sh->refcnt); 683 if (sh->refcnt > 1) 684 return; 685 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 686 #ifdef HAVE_MLX5DV_DR 687 if (sh->rx_domain) { 688 mlx5_glue->dr_destroy_domain(sh->rx_domain); 689 sh->rx_domain = NULL; 690 } 691 if (sh->tx_domain) { 692 mlx5_glue->dr_destroy_domain(sh->tx_domain); 693 sh->tx_domain = NULL; 694 } 695 #ifdef HAVE_MLX5DV_DR_ESWITCH 696 if (sh->fdb_domain) { 697 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 698 sh->fdb_domain = NULL; 699 } 700 if (sh->dr_drop_action) { 701 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 702 sh->dr_drop_action = NULL; 703 } 704 #endif 705 if (sh->pop_vlan_action) { 706 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 707 sh->pop_vlan_action = NULL; 708 } 709 for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) { 710 if (sh->send_to_kernel_action[i].action) { 711 void *action = sh->send_to_kernel_action[i].action; 712 713 mlx5_glue->destroy_flow_action(action); 714 sh->send_to_kernel_action[i].action = NULL; 715 } 716 if (sh->send_to_kernel_action[i].tbl) { 717 struct mlx5_flow_tbl_resource *tbl = 718 sh->send_to_kernel_action[i].tbl; 719 720 flow_dv_tbl_resource_release(sh, tbl); 721 sh->send_to_kernel_action[i].tbl = NULL; 722 } 723 } 724 #endif /* HAVE_MLX5DV_DR */ 725 if (sh->default_miss_action) 726 mlx5_glue->destroy_flow_action 727 (sh->default_miss_action); 728 if (sh->encaps_decaps) { 729 mlx5_hlist_destroy(sh->encaps_decaps); 730 sh->encaps_decaps = NULL; 731 } 732 if (sh->modify_cmds) { 733 mlx5_hlist_destroy(sh->modify_cmds); 734 sh->modify_cmds = NULL; 735 } 736 if (sh->tag_table) { 737 /* tags should be destroyed with flow before. */ 738 mlx5_hlist_destroy(sh->tag_table); 739 sh->tag_table = NULL; 740 } 741 if (sh->tunnel_hub) { 742 mlx5_release_tunnel_hub(sh, priv->dev_port); 743 sh->tunnel_hub = NULL; 744 } 745 mlx5_free_table_hash_list(priv); 746 if (sh->port_id_action_list) { 747 mlx5_list_destroy(sh->port_id_action_list); 748 sh->port_id_action_list = NULL; 749 } 750 if (sh->push_vlan_action_list) { 751 mlx5_list_destroy(sh->push_vlan_action_list); 752 sh->push_vlan_action_list = NULL; 753 } 754 if (sh->sample_action_list) { 755 mlx5_list_destroy(sh->sample_action_list); 756 sh->sample_action_list = NULL; 757 } 758 if (sh->dest_array_list) { 759 mlx5_list_destroy(sh->dest_array_list); 760 sh->dest_array_list = NULL; 761 } 762 } 763 764 /** 765 * Initialize shared data between primary and secondary process. 766 * 767 * A memzone is reserved by primary process and secondary processes attach to 768 * the memzone. 769 * 770 * @return 771 * 0 on success, a negative errno value otherwise and rte_errno is set. 772 */ 773 static int 774 mlx5_init_shared_data(void) 775 { 776 const struct rte_memzone *mz; 777 int ret = 0; 778 779 rte_spinlock_lock(&mlx5_shared_data_lock); 780 if (mlx5_shared_data == NULL) { 781 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 782 /* Allocate shared memory. */ 783 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 784 sizeof(*mlx5_shared_data), 785 SOCKET_ID_ANY, 0); 786 if (mz == NULL) { 787 DRV_LOG(ERR, 788 "Cannot allocate mlx5 shared data"); 789 ret = -rte_errno; 790 goto error; 791 } 792 mlx5_shared_data = mz->addr; 793 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 794 rte_spinlock_init(&mlx5_shared_data->lock); 795 } else { 796 /* Lookup allocated shared memory. */ 797 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 798 if (mz == NULL) { 799 DRV_LOG(ERR, 800 "Cannot attach mlx5 shared data"); 801 ret = -rte_errno; 802 goto error; 803 } 804 mlx5_shared_data = mz->addr; 805 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 806 } 807 } 808 error: 809 rte_spinlock_unlock(&mlx5_shared_data_lock); 810 return ret; 811 } 812 813 /** 814 * PMD global initialization. 815 * 816 * Independent from individual device, this function initializes global 817 * per-PMD data structures distinguishing primary and secondary processes. 818 * Hence, each initialization is called once per a process. 819 * 820 * @return 821 * 0 on success, a negative errno value otherwise and rte_errno is set. 822 */ 823 static int 824 mlx5_init_once(void) 825 { 826 struct mlx5_shared_data *sd; 827 struct mlx5_local_data *ld = &mlx5_local_data; 828 int ret = 0; 829 830 if (mlx5_init_shared_data()) 831 return -rte_errno; 832 sd = mlx5_shared_data; 833 MLX5_ASSERT(sd); 834 rte_spinlock_lock(&sd->lock); 835 switch (rte_eal_process_type()) { 836 case RTE_PROC_PRIMARY: 837 if (sd->init_done) 838 break; 839 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 840 mlx5_mp_os_primary_handle); 841 if (ret) 842 goto out; 843 sd->init_done = true; 844 break; 845 case RTE_PROC_SECONDARY: 846 if (ld->init_done) 847 break; 848 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 849 mlx5_mp_os_secondary_handle); 850 if (ret) 851 goto out; 852 ++sd->secondary_cnt; 853 ld->init_done = true; 854 break; 855 default: 856 break; 857 } 858 out: 859 rte_spinlock_unlock(&sd->lock); 860 return ret; 861 } 862 863 /** 864 * DR flow drop action support detect. 865 * 866 * @param dev 867 * Pointer to rte_eth_dev structure. 868 * 869 */ 870 static void 871 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 872 { 873 #ifdef HAVE_MLX5DV_DR 874 struct mlx5_priv *priv = dev->data->dev_private; 875 876 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 877 return; 878 /** 879 * DR supports drop action placeholder when it is supported; 880 * otherwise, use the queue drop action. 881 */ 882 if (!priv->sh->drop_action_check_flag) { 883 if (!mlx5_flow_discover_dr_action_support(dev)) 884 priv->sh->dr_root_drop_action_en = 1; 885 priv->sh->drop_action_check_flag = 1; 886 } 887 if (priv->sh->dr_root_drop_action_en) 888 priv->root_drop_action = priv->sh->dr_drop_action; 889 else 890 priv->root_drop_action = priv->drop_queue.hrxq->action; 891 #endif 892 } 893 894 static void 895 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 896 { 897 struct mlx5_priv *priv = dev->data->dev_private; 898 void *ctx = priv->sh->cdev->ctx; 899 900 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 901 if (!priv->q_counters) { 902 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 903 struct ibv_wq *wq; 904 905 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 906 "by DevX - fall-back to use the kernel driver global " 907 "queue counter.", dev->data->port_id); 908 /* Create WQ by kernel and query its queue counter ID. */ 909 if (cq) { 910 wq = mlx5_glue->create_wq(ctx, 911 &(struct ibv_wq_init_attr){ 912 .wq_type = IBV_WQT_RQ, 913 .max_wr = 1, 914 .max_sge = 1, 915 .pd = priv->sh->cdev->pd, 916 .cq = cq, 917 }); 918 if (wq) { 919 /* Counter is assigned only on RDY state. */ 920 int ret = mlx5_glue->modify_wq(wq, 921 &(struct ibv_wq_attr){ 922 .attr_mask = IBV_WQ_ATTR_STATE, 923 .wq_state = IBV_WQS_RDY, 924 }); 925 926 if (ret == 0) 927 mlx5_devx_cmd_wq_query(wq, 928 &priv->counter_set_id); 929 claim_zero(mlx5_glue->destroy_wq(wq)); 930 } 931 claim_zero(mlx5_glue->destroy_cq(cq)); 932 } 933 } else { 934 priv->counter_set_id = priv->q_counters->id; 935 } 936 if (priv->counter_set_id == 0) 937 DRV_LOG(INFO, "Part of the port %d statistics will not be " 938 "available.", dev->data->port_id); 939 } 940 941 /** 942 * Check if representor spawn info match devargs. 943 * 944 * @param spawn 945 * Verbs device parameters (name, port, switch_info) to spawn. 946 * @param eth_da 947 * Device devargs to probe. 948 * 949 * @return 950 * Match result. 951 */ 952 static bool 953 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 954 struct rte_eth_devargs *eth_da) 955 { 956 struct mlx5_switch_info *switch_info = &spawn->info; 957 unsigned int p, f; 958 uint16_t id; 959 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 960 eth_da->type); 961 962 /* 963 * Assuming Multiport E-Switch device was detected, 964 * if spawned port is an uplink, check if the port 965 * was requested through representor devarg. 966 */ 967 if (mlx5_is_probed_port_on_mpesw_device(spawn) && 968 switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 969 for (p = 0; p < eth_da->nb_ports; ++p) 970 if (switch_info->port_name == eth_da->ports[p]) 971 return true; 972 rte_errno = EBUSY; 973 return false; 974 } 975 switch (eth_da->type) { 976 case RTE_ETH_REPRESENTOR_PF: 977 /* 978 * PF representors provided in devargs translate to uplink ports, but 979 * if and only if the device is a part of MPESW device. 980 */ 981 if (!mlx5_is_probed_port_on_mpesw_device(spawn)) { 982 rte_errno = EBUSY; 983 return false; 984 } 985 break; 986 case RTE_ETH_REPRESENTOR_SF: 987 if (!(spawn->info.port_name == -1 && 988 switch_info->name_type == 989 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 990 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 991 rte_errno = EBUSY; 992 return false; 993 } 994 break; 995 case RTE_ETH_REPRESENTOR_VF: 996 /* Allows HPF representor index -1 as exception. */ 997 if (!(spawn->info.port_name == -1 && 998 switch_info->name_type == 999 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 1000 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 1001 rte_errno = EBUSY; 1002 return false; 1003 } 1004 break; 1005 case RTE_ETH_REPRESENTOR_NONE: 1006 rte_errno = EBUSY; 1007 return false; 1008 default: 1009 rte_errno = ENOTSUP; 1010 DRV_LOG(ERR, "unsupported representor type"); 1011 return false; 1012 } 1013 /* Check representor ID: */ 1014 for (p = 0; p < eth_da->nb_ports; ++p) { 1015 if (!mlx5_is_probed_port_on_mpesw_device(spawn) && spawn->pf_bond < 0) { 1016 /* For non-LAG mode, allow and ignore pf. */ 1017 switch_info->pf_num = eth_da->ports[p]; 1018 repr_id = mlx5_representor_id_encode(switch_info, 1019 eth_da->type); 1020 } 1021 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 1022 id = MLX5_REPRESENTOR_ID 1023 (eth_da->ports[p], eth_da->type, 1024 eth_da->representor_ports[f]); 1025 if (repr_id == id) 1026 return true; 1027 } 1028 } 1029 rte_errno = EBUSY; 1030 return false; 1031 } 1032 1033 /** 1034 * Spawn an Ethernet device from Verbs information. 1035 * 1036 * @param dpdk_dev 1037 * Backing DPDK device. 1038 * @param spawn 1039 * Verbs device parameters (name, port, switch_info) to spawn. 1040 * @param eth_da 1041 * Device arguments. 1042 * @param mkvlist 1043 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1044 * 1045 * @return 1046 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1047 * is set. The following errors are defined: 1048 * 1049 * EBUSY: device is not supposed to be spawned. 1050 * EEXIST: device is already spawned 1051 */ 1052 static struct rte_eth_dev * 1053 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1054 struct mlx5_dev_spawn_data *spawn, 1055 struct rte_eth_devargs *eth_da, 1056 struct mlx5_kvargs_ctrl *mkvlist) 1057 { 1058 const struct mlx5_switch_info *switch_info = &spawn->info; 1059 struct mlx5_dev_ctx_shared *sh = NULL; 1060 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1061 struct rte_eth_dev *eth_dev = NULL; 1062 struct mlx5_priv *priv = NULL; 1063 int err = 0; 1064 struct rte_ether_addr mac; 1065 char name[RTE_ETH_NAME_MAX_LEN]; 1066 int own_domain_id = 0; 1067 uint16_t port_id; 1068 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1069 int nl_rdma; 1070 int i; 1071 1072 /* Determine if this port representor is supposed to be spawned. */ 1073 if (switch_info->representor && dpdk_dev->devargs && 1074 !mlx5_representor_match(spawn, eth_da)) 1075 return NULL; 1076 /* Build device name. */ 1077 if (spawn->pf_bond >= 0) { 1078 /* Bonding device. */ 1079 if (!switch_info->representor) { 1080 err = snprintf(name, sizeof(name), "%s_%s", 1081 dpdk_dev->name, spawn->phys_dev_name); 1082 } else { 1083 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1084 dpdk_dev->name, spawn->phys_dev_name, 1085 switch_info->ctrl_num, 1086 switch_info->pf_num, 1087 switch_info->name_type == 1088 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1089 switch_info->port_name); 1090 } 1091 } else if (mlx5_is_probed_port_on_mpesw_device(spawn)) { 1092 /* MPESW device. */ 1093 if (switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 1094 err = snprintf(name, sizeof(name), "%s_p%d", 1095 dpdk_dev->name, spawn->mpesw_port); 1096 } else { 1097 err = snprintf(name, sizeof(name), "%s_representor_c%dpf%d%s%u", 1098 dpdk_dev->name, 1099 switch_info->ctrl_num, 1100 switch_info->pf_num, 1101 switch_info->name_type == 1102 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1103 switch_info->port_name); 1104 } 1105 } else { 1106 /* Single device. */ 1107 if (!switch_info->representor) 1108 strlcpy(name, dpdk_dev->name, sizeof(name)); 1109 else 1110 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1111 dpdk_dev->name, 1112 switch_info->name_type == 1113 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1114 switch_info->port_name); 1115 } 1116 if (err >= (int)sizeof(name)) 1117 DRV_LOG(WARNING, "device name overflow %s", name); 1118 /* check if the device is already spawned */ 1119 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1120 /* 1121 * When device is already spawned, its devargs should be set 1122 * as used. otherwise, mlx5_kvargs_validate() will fail. 1123 */ 1124 if (mkvlist) 1125 mlx5_port_args_set_used(name, port_id, mkvlist); 1126 rte_errno = EEXIST; 1127 return NULL; 1128 } 1129 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1130 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1131 struct mlx5_mp_id mp_id; 1132 int fd; 1133 1134 eth_dev = rte_eth_dev_attach_secondary(name); 1135 if (eth_dev == NULL) { 1136 DRV_LOG(ERR, "can not attach rte ethdev"); 1137 rte_errno = ENOMEM; 1138 return NULL; 1139 } 1140 eth_dev->device = dpdk_dev; 1141 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1142 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1143 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1144 err = mlx5_proc_priv_init(eth_dev); 1145 if (err) 1146 return NULL; 1147 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1148 /* Receive command fd from primary process */ 1149 fd = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1150 if (fd < 0) 1151 goto err_secondary; 1152 /* Remap UAR for Tx queues. */ 1153 err = mlx5_tx_uar_init_secondary(eth_dev, fd); 1154 close(fd); 1155 if (err) 1156 goto err_secondary; 1157 /* 1158 * Ethdev pointer is still required as input since 1159 * the primary device is not accessible from the 1160 * secondary process. 1161 */ 1162 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1163 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1164 return eth_dev; 1165 err_secondary: 1166 mlx5_dev_close(eth_dev); 1167 return NULL; 1168 } 1169 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1170 if (!sh) 1171 return NULL; 1172 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1173 /* Check port status. */ 1174 if (spawn->phys_port <= UINT8_MAX) { 1175 /* Legacy Verbs api only support u8 port number. */ 1176 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1177 &port_attr); 1178 if (err) { 1179 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1180 goto error; 1181 } 1182 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1183 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1184 err = EINVAL; 1185 goto error; 1186 } 1187 } else if (nl_rdma >= 0) { 1188 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1189 err = mlx5_nl_port_state(nl_rdma, 1190 spawn->phys_dev_name, 1191 spawn->phys_port); 1192 if (err < 0) { 1193 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1194 strerror(rte_errno)); 1195 err = -rte_errno; 1196 goto error; 1197 } 1198 port_attr.state = (enum ibv_port_state)err; 1199 } 1200 if (port_attr.state != IBV_PORT_ACTIVE) 1201 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1202 mlx5_glue->port_state_str(port_attr.state), 1203 port_attr.state); 1204 /* Allocate private eth device data. */ 1205 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1206 sizeof(*priv), 1207 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1208 if (priv == NULL) { 1209 DRV_LOG(ERR, "priv allocation failure"); 1210 err = ENOMEM; 1211 goto error; 1212 } 1213 /* 1214 * When user configures remote PD and CTX and device creates RxQ by 1215 * DevX, external RxQ is both supported and requested. 1216 */ 1217 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1218 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1219 sizeof(struct mlx5_external_rxq) * 1220 MLX5_MAX_EXT_RX_QUEUES, 0, 1221 SOCKET_ID_ANY); 1222 if (priv->ext_rxqs == NULL) { 1223 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1224 err = ENOMEM; 1225 goto error; 1226 } 1227 DRV_LOG(DEBUG, "External RxQ is supported."); 1228 } 1229 priv->sh = sh; 1230 priv->dev_port = spawn->phys_port; 1231 priv->pci_dev = spawn->pci_dev; 1232 priv->mtu = RTE_ETHER_MTU; 1233 /* Some internal functions rely on Netlink sockets, open them now. */ 1234 priv->nl_socket_rdma = nl_rdma; 1235 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1236 priv->representor = !!switch_info->representor; 1237 priv->master = !!switch_info->master; 1238 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1239 priv->vport_meta_tag = 0; 1240 priv->vport_meta_mask = 0; 1241 priv->pf_bond = spawn->pf_bond; 1242 priv->mpesw_port = spawn->mpesw_port; 1243 priv->mpesw_uplink = false; 1244 priv->mpesw_owner = spawn->info.mpesw_owner; 1245 if (mlx5_is_port_on_mpesw_device(priv)) 1246 priv->mpesw_uplink = (spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK); 1247 1248 DRV_LOG(DEBUG, 1249 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d " 1250 "mpesw_port=%d mpesw_uplink=%d", 1251 priv->dev_port, dpdk_dev->bus->name, 1252 priv->pci_dev ? priv->pci_dev->name : "NONE", 1253 priv->master, priv->representor, priv->pf_bond, 1254 priv->mpesw_port, priv->mpesw_uplink); 1255 1256 if (mlx5_is_port_on_mpesw_device(priv) && priv->sh->config.dv_flow_en != 2) { 1257 DRV_LOG(ERR, "MPESW device is supported only with HWS"); 1258 err = ENOTSUP; 1259 goto error; 1260 } 1261 /* 1262 * If we have E-Switch we should determine the vport attributes. 1263 * E-Switch may use either source vport field or reg_c[0] metadata 1264 * register to match on vport index. The engaged part of metadata 1265 * register is defined by mask. 1266 */ 1267 if (sh->esw_mode) { 1268 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1269 spawn->phys_port, 1270 &vport_info); 1271 if (err) { 1272 DRV_LOG(WARNING, 1273 "Cannot query devx port %d on device %s", 1274 spawn->phys_port, spawn->phys_dev_name); 1275 vport_info.query_flags = 0; 1276 } 1277 } 1278 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1279 priv->vport_meta_tag = vport_info.vport_meta_tag; 1280 priv->vport_meta_mask = vport_info.vport_meta_mask; 1281 if (!priv->vport_meta_mask) { 1282 DRV_LOG(ERR, 1283 "vport zero mask for port %d on bonding device %s", 1284 spawn->phys_port, spawn->phys_dev_name); 1285 err = ENOTSUP; 1286 goto error; 1287 } 1288 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1289 DRV_LOG(ERR, 1290 "Invalid vport tag for port %d on bonding device %s", 1291 spawn->phys_port, spawn->phys_dev_name); 1292 err = ENOTSUP; 1293 goto error; 1294 } 1295 } 1296 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1297 priv->vport_id = vport_info.vport_id; 1298 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1299 DRV_LOG(ERR, 1300 "Cannot deduce vport index for port %d on bonding device %s", 1301 spawn->phys_port, spawn->phys_dev_name); 1302 err = ENOTSUP; 1303 goto error; 1304 } else { 1305 /* 1306 * Suppose vport index in compatible way. Kernel/rdma_core 1307 * support single E-Switch per PF configurations only and 1308 * vport_id field contains the vport index for associated VF, 1309 * which is deduced from representor port name. 1310 * For example, let's have the IB device port 10, it has 1311 * attached network device eth0, which has port name attribute 1312 * pf0vf2, we can deduce the VF number as 2, and set vport index 1313 * as 3 (2+1). This assigning schema should be changed if the 1314 * multiple E-Switch instances per PF configurations or/and PCI 1315 * subfunctions are added. 1316 */ 1317 priv->vport_id = switch_info->representor ? 1318 switch_info->port_name + 1 : -1; 1319 } 1320 priv->representor_id = mlx5_representor_id_encode(switch_info, 1321 eth_da->type); 1322 /* 1323 * Look for sibling devices in order to reuse their switch domain 1324 * if any, otherwise allocate one. 1325 */ 1326 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1327 const struct mlx5_priv *opriv = 1328 rte_eth_devices[port_id].data->dev_private; 1329 1330 if (!opriv || 1331 opriv->sh != priv->sh || 1332 opriv->domain_id == 1333 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1334 continue; 1335 priv->domain_id = opriv->domain_id; 1336 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1337 priv->dev_port, priv->domain_id); 1338 break; 1339 } 1340 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1341 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1342 if (err) { 1343 err = rte_errno; 1344 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1345 strerror(rte_errno)); 1346 goto error; 1347 } 1348 own_domain_id = 1; 1349 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1350 priv->dev_port, priv->domain_id); 1351 } 1352 if (sh->cdev->config.devx) { 1353 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1354 1355 sh->steering_format_version = hca_attr->steering_format_version; 1356 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT) 1357 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1358 sh->config.dv_flow_en) { 1359 if (sh->registers.aso_reg != REG_NON) { 1360 priv->mtr_en = 1; 1361 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1362 } 1363 } 1364 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1365 uint32_t log_obj_size = 1366 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1367 if (log_obj_size >= 1368 hca_attr->qos.log_meter_aso_granularity && 1369 log_obj_size <= 1370 hca_attr->qos.log_meter_aso_max_alloc) 1371 sh->meter_aso_en = 1; 1372 } 1373 if (priv->mtr_en) { 1374 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1375 if (err) { 1376 err = -err; 1377 goto error; 1378 } 1379 } 1380 if (hca_attr->flow.tunnel_header_0_1) 1381 sh->tunnel_header_0_1 = 1; 1382 if (hca_attr->flow.tunnel_header_2_3) 1383 sh->tunnel_header_2_3 = 1; 1384 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */ 1385 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1386 if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3) { 1387 sh->flow_hit_aso_en = 1; 1388 err = mlx5_flow_aso_age_mng_init(sh); 1389 if (err) { 1390 err = -err; 1391 goto error; 1392 } 1393 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1394 } 1395 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1396 #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1397 defined (HAVE_MLX5_DR_ACTION_ASO_CT) 1398 /* HWS create CT ASO SQ based on HWS configure queue number. */ 1399 if (sh->config.dv_flow_en != 2 && 1400 hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) { 1401 err = mlx5_flow_aso_ct_mng_init(sh); 1402 if (err) { 1403 err = -err; 1404 goto error; 1405 } 1406 DRV_LOG(DEBUG, "CT ASO is supported."); 1407 sh->ct_aso_en = 1; 1408 } 1409 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1410 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1411 if (hca_attr->log_max_ft_sampler_num > 0 && 1412 sh->config.dv_flow_en) { 1413 priv->sampler_en = 1; 1414 DRV_LOG(DEBUG, "Sampler enabled!"); 1415 } else { 1416 priv->sampler_en = 0; 1417 if (!hca_attr->log_max_ft_sampler_num) 1418 DRV_LOG(WARNING, 1419 "No available register for sampler."); 1420 else 1421 DRV_LOG(DEBUG, "DV flow is not supported!"); 1422 } 1423 #endif 1424 if (hca_attr->lag_rx_port_affinity) { 1425 sh->lag_rx_port_affinity_en = 1; 1426 DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled"); 1427 } 1428 priv->num_lag_ports = hca_attr->num_lag_ports; 1429 DRV_LOG(DEBUG, "The number of lag ports is %d", priv->num_lag_ports); 1430 } 1431 /* Process parameters and store port configuration on priv structure. */ 1432 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1433 if (err) { 1434 err = rte_errno; 1435 DRV_LOG(ERR, "Failed to process port configure: %s", 1436 strerror(rte_errno)); 1437 goto error; 1438 } 1439 eth_dev = rte_eth_dev_allocate(name); 1440 if (eth_dev == NULL) { 1441 DRV_LOG(ERR, "can not allocate rte ethdev"); 1442 err = ENOMEM; 1443 goto error; 1444 } 1445 if (priv->representor) { 1446 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1447 eth_dev->data->representor_id = priv->representor_id; 1448 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1449 struct mlx5_priv *opriv = 1450 rte_eth_devices[port_id].data->dev_private; 1451 if (opriv && 1452 opriv->master && 1453 opriv->domain_id == priv->domain_id && 1454 opriv->sh == priv->sh) { 1455 eth_dev->data->backer_port_id = port_id; 1456 break; 1457 } 1458 } 1459 if (port_id >= RTE_MAX_ETHPORTS) 1460 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1461 } 1462 priv->mp_id.port_id = eth_dev->data->port_id; 1463 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1464 /* 1465 * Store associated network device interface index. This index 1466 * is permanent throughout the lifetime of device. So, we may store 1467 * the ifindex here and use the cached value further. 1468 */ 1469 MLX5_ASSERT(spawn->ifindex); 1470 priv->if_index = spawn->ifindex; 1471 priv->lag_affinity_idx = sh->refcnt - 1; 1472 eth_dev->data->dev_private = priv; 1473 priv->dev_data = eth_dev->data; 1474 eth_dev->data->mac_addrs = priv->mac; 1475 eth_dev->device = dpdk_dev; 1476 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1477 /* Configure the first MAC address by default. */ 1478 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1479 DRV_LOG(ERR, 1480 "port %u cannot get MAC address, is mlx5_en" 1481 " loaded? (errno: %s)", 1482 eth_dev->data->port_id, strerror(rte_errno)); 1483 err = ENODEV; 1484 goto error; 1485 } 1486 DRV_LOG(INFO, 1487 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1488 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1489 #ifdef RTE_LIBRTE_MLX5_DEBUG 1490 { 1491 char ifname[MLX5_NAMESIZE]; 1492 1493 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1494 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1495 eth_dev->data->port_id, ifname); 1496 else 1497 DRV_LOG(DEBUG, "port %u ifname is unknown", 1498 eth_dev->data->port_id); 1499 } 1500 #endif 1501 /* Get actual MTU if possible. */ 1502 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1503 if (err) { 1504 err = rte_errno; 1505 goto error; 1506 } 1507 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1508 priv->mtu); 1509 /* Initialize burst functions to prevent crashes before link-up. */ 1510 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1511 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1512 eth_dev->dev_ops = &mlx5_dev_ops; 1513 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1514 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1515 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1516 /* Register MAC address. */ 1517 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1518 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1519 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1520 mlx5_ifindex(eth_dev), 1521 eth_dev->data->mac_addrs, 1522 MLX5_MAX_MAC_ADDRESSES); 1523 priv->ctrl_flows = 0; 1524 rte_spinlock_init(&priv->flow_list_lock); 1525 TAILQ_INIT(&priv->flow_meters); 1526 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1527 if (!priv->mtr_profile_tbl) 1528 goto error; 1529 /* Bring Ethernet device up. */ 1530 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1531 eth_dev->data->port_id); 1532 /* Read link status in case it is up and there will be no event. */ 1533 mlx5_link_update(eth_dev, 0); 1534 /* Watch LSC interrupts between port probe and port start. */ 1535 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1536 eth_dev->data->port_id; 1537 mlx5_set_link_up(eth_dev); 1538 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1539 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1540 if (sh->config.reclaim_mode) 1541 icfg[i].per_core_cache = 0; 1542 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1543 if (!priv->flows[i]) 1544 goto error; 1545 } 1546 /* Create context for virtual machine VLAN workaround. */ 1547 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1548 if (sh->config.dv_flow_en) { 1549 err = mlx5_alloc_shared_dr(priv); 1550 if (err) 1551 goto error; 1552 if (mlx5_flex_item_port_init(eth_dev) < 0) 1553 goto error; 1554 } 1555 if (mlx5_devx_obj_ops_en(sh)) { 1556 priv->obj_ops = devx_obj_ops; 1557 mlx5_queue_counter_id_prepare(eth_dev); 1558 priv->obj_ops.lb_dummy_queue_create = 1559 mlx5_rxq_ibv_obj_dummy_lb_create; 1560 priv->obj_ops.lb_dummy_queue_release = 1561 mlx5_rxq_ibv_obj_dummy_lb_release; 1562 } else if (spawn->max_port > UINT8_MAX) { 1563 /* Verbs can't support ports larger than 255 by design. */ 1564 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1565 err = ENOTSUP; 1566 goto error; 1567 } else { 1568 priv->obj_ops = ibv_obj_ops; 1569 } 1570 if (sh->config.tx_pp && 1571 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1572 /* 1573 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1574 * packet pacing and already checked above. 1575 * Hence, we should only make sure the SQs will be created 1576 * with DevX, not with Verbs. 1577 * Verbs allocates the SQ UAR on its own and it can't be shared 1578 * with Clock Queue UAR as required for Tx scheduling. 1579 */ 1580 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1581 err = ENODEV; 1582 goto error; 1583 } 1584 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1585 if (!priv->drop_queue.hrxq) 1586 goto error; 1587 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1588 mlx5_hrxq_create_cb, 1589 mlx5_hrxq_match_cb, 1590 mlx5_hrxq_remove_cb, 1591 mlx5_hrxq_clone_cb, 1592 mlx5_hrxq_clone_free_cb); 1593 if (!priv->hrxqs) 1594 goto error; 1595 mlx5_set_metadata_mask(eth_dev); 1596 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1597 !priv->sh->dv_regc0_mask) { 1598 DRV_LOG(ERR, "metadata mode %u is not supported " 1599 "(no metadata reg_c[0] is available)", 1600 sh->config.dv_xmeta_en); 1601 err = ENOTSUP; 1602 goto error; 1603 } 1604 rte_rwlock_init(&priv->ind_tbls_lock); 1605 if (sh->config.dv_flow_en == 1 && 1606 !priv->sh->ipv6_tc_fallback && 1607 mlx5_flow_discover_ipv6_tc_support(eth_dev)) 1608 priv->sh->ipv6_tc_fallback = 1; 1609 if (priv->sh->config.dv_flow_en == 2) { 1610 #ifdef HAVE_MLX5_HWS_SUPPORT 1611 if (priv->sh->config.dv_esw_en) { 1612 uint32_t usable_bits; 1613 uint32_t required_bits; 1614 1615 if (priv->sh->dv_regc0_mask == UINT32_MAX) { 1616 DRV_LOG(ERR, "E-Switch port metadata is required when using HWS " 1617 "but it is disabled (configure it through devlink)"); 1618 err = ENOTSUP; 1619 goto error; 1620 } 1621 if (priv->sh->dv_regc0_mask == 0) { 1622 DRV_LOG(ERR, "E-Switch with HWS is not supported " 1623 "(no available bits in reg_c[0])"); 1624 err = ENOTSUP; 1625 goto error; 1626 } 1627 usable_bits = rte_popcount32(priv->sh->dv_regc0_mask); 1628 required_bits = rte_popcount32(priv->vport_meta_mask); 1629 if (usable_bits < required_bits) { 1630 DRV_LOG(ERR, "Not enough bits available in reg_c[0] to provide " 1631 "representor matching."); 1632 err = ENOTSUP; 1633 goto error; 1634 } 1635 } 1636 if (priv->vport_meta_mask) 1637 flow_hw_set_port_info(eth_dev); 1638 if (priv->sh->config.dv_esw_en && 1639 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1640 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) { 1641 DRV_LOG(ERR, 1642 "metadata mode %u is not supported in HWS eswitch mode", 1643 priv->sh->config.dv_xmeta_en); 1644 err = ENOTSUP; 1645 goto error; 1646 } 1647 if (priv->sh->config.dv_esw_en && 1648 flow_hw_create_vport_action(eth_dev)) { 1649 DRV_LOG(ERR, "port %u failed to create vport action", 1650 eth_dev->data->port_id); 1651 err = EINVAL; 1652 goto error; 1653 } 1654 /* 1655 * If representor matching is disabled, PMD cannot create default flow rules 1656 * to receive traffic for all ports, since implicit source port match is not added. 1657 * Isolated mode is forced. 1658 */ 1659 if (priv->sh->config.dv_esw_en && !priv->sh->config.repr_matching) { 1660 err = mlx5_flow_isolate(eth_dev, 1, NULL); 1661 if (err < 0) { 1662 err = -err; 1663 goto error; 1664 } 1665 DRV_LOG(WARNING, "port %u ingress traffic is restricted to defined " 1666 "flow rules (isolated mode) since representor " 1667 "matching is disabled", 1668 eth_dev->data->port_id); 1669 } 1670 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1671 return eth_dev; 1672 #else 1673 DRV_LOG(ERR, "DV support is missing for HWS."); 1674 goto error; 1675 #endif 1676 } 1677 if (!priv->sh->flow_priority_check_flag) { 1678 /* Supported Verbs flow priority number detection. */ 1679 err = mlx5_flow_discover_priorities(eth_dev); 1680 priv->sh->flow_max_priority = err; 1681 priv->sh->flow_priority_check_flag = 1; 1682 } else { 1683 err = priv->sh->flow_max_priority; 1684 } 1685 if (err < 0) { 1686 err = -err; 1687 goto error; 1688 } 1689 /* Query availability of metadata reg_c's. */ 1690 if (!priv->sh->metadata_regc_check_flag) { 1691 err = mlx5_flow_discover_mreg_c(eth_dev); 1692 if (err < 0) { 1693 err = -err; 1694 goto error; 1695 } 1696 } 1697 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1698 DRV_LOG(DEBUG, 1699 "port %u extensive metadata register is not supported", 1700 eth_dev->data->port_id); 1701 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1702 DRV_LOG(ERR, "metadata mode %u is not supported " 1703 "(no metadata registers available)", 1704 sh->config.dv_xmeta_en); 1705 err = ENOTSUP; 1706 goto error; 1707 } 1708 } 1709 if (sh->config.dv_flow_en && 1710 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1711 mlx5_flow_ext_mreg_supported(eth_dev) && 1712 priv->sh->dv_regc0_mask) { 1713 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1714 MLX5_FLOW_MREG_HTABLE_SZ, 1715 false, true, eth_dev, 1716 flow_dv_mreg_create_cb, 1717 flow_dv_mreg_match_cb, 1718 flow_dv_mreg_remove_cb, 1719 flow_dv_mreg_clone_cb, 1720 flow_dv_mreg_clone_free_cb); 1721 if (!priv->mreg_cp_tbl) { 1722 err = ENOMEM; 1723 goto error; 1724 } 1725 } 1726 rte_spinlock_init(&priv->shared_act_sl); 1727 mlx5_flow_counter_mode_config(eth_dev); 1728 mlx5_flow_drop_action_config(eth_dev); 1729 if (sh->config.dv_flow_en) 1730 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1731 return eth_dev; 1732 error: 1733 if (priv) { 1734 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1735 RTE_MAX_ETHPORTS; 1736 rte_io_wmb(); 1737 #ifdef HAVE_MLX5_HWS_SUPPORT 1738 if (eth_dev && 1739 priv->sh && 1740 priv->sh->config.dv_flow_en == 2 && 1741 priv->sh->config.dv_esw_en) 1742 flow_hw_destroy_vport_action(eth_dev); 1743 #endif 1744 if (priv->mreg_cp_tbl) 1745 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1746 if (priv->sh) 1747 mlx5_os_free_shared_dr(priv); 1748 if (priv->nl_socket_route >= 0) 1749 close(priv->nl_socket_route); 1750 if (priv->vmwa_context) 1751 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1752 if (eth_dev && priv->drop_queue.hrxq) 1753 mlx5_drop_action_destroy(eth_dev); 1754 if (priv->mtr_profile_tbl) 1755 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1756 if (own_domain_id) 1757 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1758 if (priv->hrxqs) 1759 mlx5_list_destroy(priv->hrxqs); 1760 if (eth_dev && priv->flex_item_map) 1761 mlx5_flex_item_port_cleanup(eth_dev); 1762 mlx5_free(priv->ext_rxqs); 1763 mlx5_free(priv); 1764 if (eth_dev != NULL) 1765 eth_dev->data->dev_private = NULL; 1766 } 1767 if (eth_dev != NULL) { 1768 /* mac_addrs must not be freed alone because part of 1769 * dev_private 1770 **/ 1771 eth_dev->data->mac_addrs = NULL; 1772 rte_eth_dev_release_port(eth_dev); 1773 } 1774 if (sh) 1775 mlx5_free_shared_dev_ctx(sh); 1776 if (nl_rdma >= 0) 1777 close(nl_rdma); 1778 MLX5_ASSERT(err > 0); 1779 rte_errno = err; 1780 return NULL; 1781 } 1782 1783 /** 1784 * Comparison callback to sort device data. 1785 * 1786 * This is meant to be used with qsort(). 1787 * 1788 * @param a[in] 1789 * Pointer to pointer to first data object. 1790 * @param b[in] 1791 * Pointer to pointer to second data object. 1792 * 1793 * @return 1794 * 0 if both objects are equal, less than 0 if the first argument is less 1795 * than the second, greater than 0 otherwise. 1796 */ 1797 static int 1798 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1799 { 1800 const struct mlx5_switch_info *si_a = 1801 &((const struct mlx5_dev_spawn_data *)a)->info; 1802 const struct mlx5_switch_info *si_b = 1803 &((const struct mlx5_dev_spawn_data *)b)->info; 1804 int uplink_a = si_a->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK; 1805 int uplink_b = si_b->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK; 1806 int ret; 1807 1808 /* Uplink ports first. */ 1809 ret = uplink_b - uplink_a; 1810 if (ret) 1811 return ret; 1812 /* Then master devices. */ 1813 ret = si_b->master - si_a->master; 1814 if (ret) 1815 return ret; 1816 /* Then representor devices. */ 1817 ret = si_b->representor - si_a->representor; 1818 if (ret) 1819 return ret; 1820 /* Unidentified devices come last in no specific order. */ 1821 if (!si_a->representor) 1822 return 0; 1823 /* Order representors by name. */ 1824 return si_a->port_name - si_b->port_name; 1825 } 1826 1827 /** 1828 * Match PCI information for possible slaves of bonding device. 1829 * 1830 * @param[in] ibdev_name 1831 * Name of Infiniband device. 1832 * @param[in] pci_dev 1833 * Pointer to primary PCI address structure to match. 1834 * @param[in] nl_rdma 1835 * Netlink RDMA group socket handle. 1836 * @param[in] owner 1837 * Representor owner PF index. 1838 * @param[out] bond_info 1839 * Pointer to bonding information. 1840 * 1841 * @return 1842 * negative value if no bonding device found, otherwise 1843 * positive index of slave PF in bonding. 1844 */ 1845 static int 1846 mlx5_device_bond_pci_match(const char *ibdev_name, 1847 const struct rte_pci_addr *pci_dev, 1848 int nl_rdma, uint16_t owner, 1849 struct mlx5_bond_info *bond_info) 1850 { 1851 char ifname[IF_NAMESIZE + 1]; 1852 unsigned int ifindex; 1853 unsigned int np, i; 1854 FILE *bond_file = NULL, *file; 1855 int pf = -1; 1856 int ret; 1857 uint8_t cur_guid[32] = {0}; 1858 uint8_t guid[32] = {0}; 1859 1860 /* 1861 * Try to get master device name. If something goes wrong suppose 1862 * the lack of kernel support and no bonding devices. 1863 */ 1864 memset(bond_info, 0, sizeof(*bond_info)); 1865 if (nl_rdma < 0) 1866 return -1; 1867 if (!strstr(ibdev_name, "bond")) 1868 return -1; 1869 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1870 if (!np) 1871 return -1; 1872 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1873 return -1; 1874 /* 1875 * The master device might not be on the predefined port(not on port 1876 * index 1, it is not guaranteed), we have to scan all Infiniband 1877 * device ports and find master. 1878 */ 1879 for (i = 1; i <= np; ++i) { 1880 /* Check whether Infiniband port is populated. */ 1881 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1882 if (!ifindex) 1883 continue; 1884 if (!if_indextoname(ifindex, ifname)) 1885 continue; 1886 /* Try to read bonding slave names from sysfs. */ 1887 MKSTR(slaves, 1888 "/sys/class/net/%s/master/bonding/slaves", ifname); 1889 bond_file = fopen(slaves, "r"); 1890 if (bond_file) 1891 break; 1892 } 1893 if (!bond_file) 1894 return -1; 1895 /* Use safe format to check maximal buffer length. */ 1896 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1897 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1898 char tmp_str[IF_NAMESIZE + 32]; 1899 struct rte_pci_addr pci_addr; 1900 struct mlx5_switch_info info; 1901 int ret; 1902 1903 /* Process slave interface names in the loop. */ 1904 snprintf(tmp_str, sizeof(tmp_str), 1905 "/sys/class/net/%s", ifname); 1906 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1907 DRV_LOG(WARNING, 1908 "Cannot get PCI address for netdev \"%s\".", 1909 ifname); 1910 continue; 1911 } 1912 /* Slave interface PCI address match found. */ 1913 snprintf(tmp_str, sizeof(tmp_str), 1914 "/sys/class/net/%s/phys_port_name", ifname); 1915 file = fopen(tmp_str, "rb"); 1916 if (!file) 1917 break; 1918 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1919 if (fscanf(file, "%32s", tmp_str) == 1) 1920 mlx5_translate_port_name(tmp_str, &info); 1921 fclose(file); 1922 /* Only process PF ports. */ 1923 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1924 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1925 continue; 1926 /* Check max bonding member. */ 1927 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1928 DRV_LOG(WARNING, "bonding index out of range, " 1929 "please increase MLX5_BOND_MAX_PORTS: %s", 1930 tmp_str); 1931 break; 1932 } 1933 /* Get ifindex. */ 1934 snprintf(tmp_str, sizeof(tmp_str), 1935 "/sys/class/net/%s/ifindex", ifname); 1936 file = fopen(tmp_str, "rb"); 1937 if (!file) 1938 break; 1939 ret = fscanf(file, "%u", &ifindex); 1940 fclose(file); 1941 if (ret != 1) 1942 break; 1943 /* Save bonding info. */ 1944 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1945 sizeof(bond_info->ports[0].ifname)); 1946 bond_info->ports[info.port_name].pci_addr = pci_addr; 1947 bond_info->ports[info.port_name].ifindex = ifindex; 1948 bond_info->n_port++; 1949 /* 1950 * Under socket direct mode, bonding will use 1951 * system_image_guid as identification. 1952 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1953 * All bonding members should have the same guid even if driver 1954 * is using PCIe BDF. 1955 */ 1956 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1957 if (ret < 0) 1958 break; 1959 else if (ret > 0) { 1960 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1961 owner == info.port_name && 1962 (owner != 0 || (owner == 0 && 1963 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1964 pf = info.port_name; 1965 } else if (pci_dev->domain == pci_addr.domain && 1966 pci_dev->bus == pci_addr.bus && 1967 pci_dev->devid == pci_addr.devid && 1968 ((pci_dev->function == 0 && 1969 pci_dev->function + owner == pci_addr.function) || 1970 (pci_dev->function == owner && 1971 pci_addr.function == owner))) 1972 pf = info.port_name; 1973 } 1974 if (pf >= 0) { 1975 /* Get bond interface info */ 1976 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1977 bond_info->ifname); 1978 if (ret) 1979 DRV_LOG(ERR, "unable to get bond info: %s", 1980 strerror(rte_errno)); 1981 else 1982 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1983 ifindex, bond_info->ifindex, bond_info->ifname); 1984 } 1985 if (owner == 0 && pf != 0) { 1986 DRV_LOG(INFO, "PCIe instance " PCI_PRI_FMT " isn't bonding owner", 1987 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1988 pci_dev->function); 1989 } 1990 return pf; 1991 } 1992 1993 static int 1994 mlx5_nl_esw_multiport_get(struct rte_pci_addr *pci_addr, int *enabled) 1995 { 1996 char pci_addr_str[PCI_PRI_STR_SIZE] = { 0 }; 1997 int nlsk_fd; 1998 int devlink_id; 1999 int ret; 2000 2001 /* Provide correct value to have defined enabled state in case of an error. */ 2002 *enabled = 0; 2003 rte_pci_device_name(pci_addr, pci_addr_str, sizeof(pci_addr_str)); 2004 nlsk_fd = mlx5_nl_init(NETLINK_GENERIC, 0); 2005 if (nlsk_fd < 0) 2006 return nlsk_fd; 2007 devlink_id = mlx5_nl_devlink_family_id_get(nlsk_fd); 2008 if (devlink_id < 0) { 2009 ret = devlink_id; 2010 DRV_LOG(DEBUG, "Unable to get devlink family id for Multiport E-Switch checks " 2011 "by netlink, for PCI device %s", pci_addr_str); 2012 goto close_nlsk_fd; 2013 } 2014 ret = mlx5_nl_devlink_esw_multiport_get(nlsk_fd, devlink_id, pci_addr_str, enabled); 2015 if (ret < 0) 2016 DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by Netlink."); 2017 close_nlsk_fd: 2018 close(nlsk_fd); 2019 return ret; 2020 } 2021 2022 #define SYSFS_MPESW_PARAM_MAX_LEN 16 2023 2024 static int 2025 mlx5_sysfs_esw_multiport_get(struct ibv_device *ibv, struct rte_pci_addr *pci_addr, int *enabled) 2026 { 2027 int nl_rdma; 2028 unsigned int n_ports; 2029 unsigned int i; 2030 int ret; 2031 2032 /* Provide correct value to have defined enabled state in case of an error. */ 2033 *enabled = 0; 2034 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 2035 if (nl_rdma < 0) 2036 return nl_rdma; 2037 n_ports = mlx5_nl_portnum(nl_rdma, ibv->name); 2038 if (!n_ports) { 2039 ret = -rte_errno; 2040 goto close_nl_rdma; 2041 } 2042 for (i = 1; i <= n_ports; ++i) { 2043 unsigned int ifindex; 2044 char ifname[IF_NAMESIZE + 1]; 2045 struct rte_pci_addr if_pci_addr; 2046 char mpesw[SYSFS_MPESW_PARAM_MAX_LEN + 1]; 2047 FILE *sysfs; 2048 int n; 2049 2050 ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i); 2051 if (!ifindex) 2052 continue; 2053 if (!if_indextoname(ifindex, ifname)) 2054 continue; 2055 MKSTR(sysfs_if_path, "/sys/class/net/%s", ifname); 2056 if (mlx5_get_pci_addr(sysfs_if_path, &if_pci_addr)) 2057 continue; 2058 if (pci_addr->domain != if_pci_addr.domain || 2059 pci_addr->bus != if_pci_addr.bus || 2060 pci_addr->devid != if_pci_addr.devid || 2061 pci_addr->function != if_pci_addr.function) 2062 continue; 2063 MKSTR(sysfs_mpesw_path, 2064 "/sys/class/net/%s/compat/devlink/lag_port_select_mode", ifname); 2065 sysfs = fopen(sysfs_mpesw_path, "r"); 2066 if (!sysfs) 2067 continue; 2068 n = fscanf(sysfs, "%" RTE_STR(SYSFS_MPESW_PARAM_MAX_LEN) "s", mpesw); 2069 fclose(sysfs); 2070 if (n != 1) 2071 continue; 2072 ret = 0; 2073 if (strcmp(mpesw, "multiport_esw") == 0) { 2074 *enabled = 1; 2075 break; 2076 } 2077 *enabled = 0; 2078 break; 2079 } 2080 if (i > n_ports) { 2081 DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by sysfs."); 2082 rte_errno = ENOENT; 2083 ret = -rte_errno; 2084 } 2085 2086 close_nl_rdma: 2087 close(nl_rdma); 2088 return ret; 2089 } 2090 2091 static int 2092 mlx5_is_mpesw_enabled(struct ibv_device *ibv, struct rte_pci_addr *ibv_pci_addr, int *enabled) 2093 { 2094 /* 2095 * Try getting Multiport E-Switch state through netlink interface 2096 * If unable, try sysfs interface. If that is unable as well, 2097 * assume that Multiport E-Switch is disabled and return an error. 2098 */ 2099 if (mlx5_nl_esw_multiport_get(ibv_pci_addr, enabled) >= 0 || 2100 mlx5_sysfs_esw_multiport_get(ibv, ibv_pci_addr, enabled) >= 0) 2101 return 0; 2102 DRV_LOG(DEBUG, "Unable to check MPESW state for IB device %s " 2103 "(PCI: " PCI_PRI_FMT ")", 2104 ibv->name, 2105 ibv_pci_addr->domain, ibv_pci_addr->bus, 2106 ibv_pci_addr->devid, ibv_pci_addr->function); 2107 *enabled = 0; 2108 return -rte_errno; 2109 } 2110 2111 static int 2112 mlx5_device_mpesw_pci_match(struct ibv_device *ibv, 2113 const struct rte_pci_addr *owner_pci, 2114 int nl_rdma) 2115 { 2116 struct rte_pci_addr ibdev_pci_addr = { 0 }; 2117 char ifname[IF_NAMESIZE + 1] = { 0 }; 2118 unsigned int ifindex; 2119 unsigned int np; 2120 unsigned int i; 2121 int enabled = 0; 2122 int ret; 2123 2124 /* Check if IB device's PCI address matches the probed PCI address. */ 2125 if (mlx5_get_pci_addr(ibv->ibdev_path, &ibdev_pci_addr)) { 2126 DRV_LOG(DEBUG, "Skipping MPESW check for IB device %s since " 2127 "there is no underlying PCI device", ibv->name); 2128 rte_errno = ENOENT; 2129 return -rte_errno; 2130 } 2131 if (ibdev_pci_addr.domain != owner_pci->domain || 2132 ibdev_pci_addr.bus != owner_pci->bus || 2133 ibdev_pci_addr.devid != owner_pci->devid || 2134 ibdev_pci_addr.function != owner_pci->function) { 2135 return -1; 2136 } 2137 /* Check if IB device has MPESW enabled. */ 2138 if (mlx5_is_mpesw_enabled(ibv, &ibdev_pci_addr, &enabled)) 2139 return -1; 2140 if (!enabled) 2141 return -1; 2142 /* Iterate through IB ports to find MPESW master uplink port. */ 2143 if (nl_rdma < 0) 2144 return -1; 2145 np = mlx5_nl_portnum(nl_rdma, ibv->name); 2146 if (!np) 2147 return -1; 2148 for (i = 1; i <= np; ++i) { 2149 struct rte_pci_addr pci_addr; 2150 FILE *file; 2151 char port_name[IF_NAMESIZE + 1]; 2152 struct mlx5_switch_info info; 2153 2154 /* Check whether IB port has a corresponding netdev. */ 2155 ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i); 2156 if (!ifindex) 2157 continue; 2158 if (!if_indextoname(ifindex, ifname)) 2159 continue; 2160 /* Read port name and determine its type. */ 2161 MKSTR(ifphysportname, "/sys/class/net/%s/phys_port_name", ifname); 2162 file = fopen(ifphysportname, "rb"); 2163 if (!file) 2164 continue; 2165 ret = fscanf(file, "%16s", port_name); 2166 fclose(file); 2167 if (ret != 1) 2168 continue; 2169 memset(&info, 0, sizeof(info)); 2170 mlx5_translate_port_name(port_name, &info); 2171 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 2172 continue; 2173 /* Fetch PCI address of the device to which the netdev is bound. */ 2174 MKSTR(ifpath, "/sys/class/net/%s", ifname); 2175 if (mlx5_get_pci_addr(ifpath, &pci_addr)) 2176 continue; 2177 if (pci_addr.domain == ibdev_pci_addr.domain && 2178 pci_addr.bus == ibdev_pci_addr.bus && 2179 pci_addr.devid == ibdev_pci_addr.devid && 2180 pci_addr.function == ibdev_pci_addr.function) { 2181 MLX5_ASSERT(info.port_name >= 0); 2182 return info.port_name; 2183 } 2184 } 2185 /* No matching MPESW uplink port was found. */ 2186 return -1; 2187 } 2188 2189 /** 2190 * Register a PCI device within bonding. 2191 * 2192 * This function spawns Ethernet devices out of a given PCI device and 2193 * bonding owner PF index. 2194 * 2195 * @param[in] cdev 2196 * Pointer to common mlx5 device structure. 2197 * @param[in] req_eth_da 2198 * Requested ethdev device argument. 2199 * @param[in] owner_id 2200 * Requested owner PF port ID within bonding device, default to 0. 2201 * @param[in, out] mkvlist 2202 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2203 * 2204 * @return 2205 * 0 on success, a negative errno value otherwise and rte_errno is set. 2206 */ 2207 static int 2208 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 2209 struct rte_eth_devargs *req_eth_da, 2210 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 2211 { 2212 struct ibv_device **ibv_list; 2213 /* 2214 * Number of found IB Devices matching with requested PCI BDF. 2215 * nd != 1 means there are multiple IB devices over the same 2216 * PCI device and we have representors and master. 2217 */ 2218 unsigned int nd = 0; 2219 /* 2220 * Number of found IB device Ports. nd = 1 and np = 1..n means 2221 * we have the single multiport IB device, and there may be 2222 * representors attached to some of found ports. 2223 */ 2224 unsigned int np = 0; 2225 /* 2226 * Number of DPDK ethernet devices to Spawn - either over 2227 * multiple IB devices or multiple ports of single IB device. 2228 * Actually this is the number of iterations to spawn. 2229 */ 2230 unsigned int ns = 0; 2231 /* 2232 * Bonding device 2233 * < 0 - no bonding device (single one) 2234 * >= 0 - bonding device (value is slave PF index) 2235 */ 2236 int bd = -1; 2237 /* 2238 * Multiport E-Switch (MPESW) device: 2239 * < 0 - no MPESW device or could not determine if it is MPESW device, 2240 * >= 0 - MPESW device. Value is the port index of the MPESW owner. 2241 */ 2242 int mpesw = MLX5_MPESW_PORT_INVALID; 2243 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2244 struct mlx5_dev_spawn_data *list = NULL; 2245 struct rte_eth_devargs eth_da = *req_eth_da; 2246 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 2247 struct mlx5_bond_info bond_info; 2248 int ret = -1; 2249 2250 errno = 0; 2251 ibv_list = mlx5_glue->get_device_list(&ret); 2252 if (!ibv_list) { 2253 rte_errno = errno ? errno : ENOSYS; 2254 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 2255 return -rte_errno; 2256 } 2257 /* 2258 * First scan the list of all Infiniband devices to find 2259 * matching ones, gathering into the list. 2260 */ 2261 struct ibv_device *ibv_match[ret + 1]; 2262 int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0); 2263 int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 2264 unsigned int i; 2265 2266 while (ret-- > 0) { 2267 struct rte_pci_addr pci_addr; 2268 2269 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 2270 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 2271 nl_rdma, owner_id, &bond_info); 2272 if (bd >= 0) { 2273 /* 2274 * Bonding device detected. Only one match is allowed, 2275 * the bonding is supported over multi-port IB device, 2276 * there should be no matches on representor PCI 2277 * functions or non VF LAG bonding devices with 2278 * specified address. 2279 */ 2280 if (nd) { 2281 DRV_LOG(ERR, 2282 "multiple PCI match on bonding device" 2283 "\"%s\" found", ibv_list[ret]->name); 2284 rte_errno = ENOENT; 2285 ret = -rte_errno; 2286 goto exit; 2287 } 2288 /* Amend owner pci address if owner PF ID specified. */ 2289 if (eth_da.nb_representor_ports) 2290 owner_pci.function += owner_id; 2291 DRV_LOG(INFO, 2292 "PCI information matches for slave %d bonding device \"%s\"", 2293 bd, ibv_list[ret]->name); 2294 ibv_match[nd++] = ibv_list[ret]; 2295 break; 2296 } 2297 mpesw = mlx5_device_mpesw_pci_match(ibv_list[ret], &owner_pci, nl_rdma); 2298 if (mpesw >= 0) { 2299 /* 2300 * MPESW device detected. Only one matching IB device is allowed, 2301 * so if any matches were found previously, fail gracefully. 2302 */ 2303 if (nd) { 2304 DRV_LOG(ERR, 2305 "PCI information matches MPESW device \"%s\", " 2306 "but multiple matching PCI devices were found. " 2307 "Probing failed.", 2308 ibv_list[ret]->name); 2309 rte_errno = ENOENT; 2310 ret = -rte_errno; 2311 goto exit; 2312 } 2313 DRV_LOG(INFO, 2314 "PCI information matches MPESW device \"%s\"", 2315 ibv_list[ret]->name); 2316 ibv_match[nd++] = ibv_list[ret]; 2317 break; 2318 } 2319 /* Bonding or MPESW device was not found. */ 2320 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 2321 &pci_addr)) 2322 continue; 2323 if (rte_pci_addr_cmp(&owner_pci, &pci_addr) != 0) 2324 continue; 2325 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 2326 ibv_list[ret]->name); 2327 ibv_match[nd++] = ibv_list[ret]; 2328 } 2329 ibv_match[nd] = NULL; 2330 if (!nd) { 2331 /* No device matches, just complain and bail out. */ 2332 DRV_LOG(WARNING, 2333 "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT "," 2334 " are kernel drivers loaded?", 2335 owner_id, owner_pci.domain, owner_pci.bus, 2336 owner_pci.devid, owner_pci.function); 2337 rte_errno = ENOENT; 2338 ret = -rte_errno; 2339 goto exit; 2340 } 2341 if (nd == 1) { 2342 /* 2343 * Found single matching device may have multiple ports. 2344 * Each port may be representor, we have to check the port 2345 * number and check the representors existence. 2346 */ 2347 if (nl_rdma >= 0) 2348 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 2349 if (!np) 2350 DRV_LOG(WARNING, 2351 "Cannot get IB device \"%s\" ports number.", 2352 ibv_match[0]->name); 2353 if (bd >= 0 && !np) { 2354 DRV_LOG(ERR, "Cannot get ports for bonding device."); 2355 rte_errno = ENOENT; 2356 ret = -rte_errno; 2357 goto exit; 2358 } 2359 if (mpesw >= 0 && !np) { 2360 DRV_LOG(ERR, "Cannot get ports for MPESW device."); 2361 rte_errno = ENOENT; 2362 ret = -rte_errno; 2363 goto exit; 2364 } 2365 } 2366 /* Now we can determine the maximal amount of devices to be spawned. */ 2367 list = mlx5_malloc(MLX5_MEM_ZERO, 2368 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2369 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2370 if (!list) { 2371 DRV_LOG(ERR, "Spawn data array allocation failure."); 2372 rte_errno = ENOMEM; 2373 ret = -rte_errno; 2374 goto exit; 2375 } 2376 if (bd >= 0 || mpesw >= 0 || np > 1) { 2377 /* 2378 * Single IB device with multiple ports found, 2379 * it may be E-Switch master device and representors. 2380 * We have to perform identification through the ports. 2381 */ 2382 MLX5_ASSERT(nl_rdma >= 0); 2383 MLX5_ASSERT(ns == 0); 2384 MLX5_ASSERT(nd == 1); 2385 MLX5_ASSERT(np); 2386 for (i = 1; i <= np; ++i) { 2387 list[ns].bond_info = &bond_info; 2388 list[ns].max_port = np; 2389 list[ns].phys_port = i; 2390 list[ns].phys_dev_name = ibv_match[0]->name; 2391 list[ns].eth_dev = NULL; 2392 list[ns].pci_dev = pci_dev; 2393 list[ns].cdev = cdev; 2394 list[ns].pf_bond = bd; 2395 list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID; 2396 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2397 ibv_match[0]->name, 2398 i); 2399 if (!list[ns].ifindex) { 2400 /* 2401 * No network interface index found for the 2402 * specified port, it means there is no 2403 * representor on this port. It's OK, 2404 * there can be disabled ports, for example 2405 * if sriov_numvfs < sriov_totalvfs. 2406 */ 2407 continue; 2408 } 2409 ret = -1; 2410 if (nl_route >= 0) 2411 ret = mlx5_nl_switch_info(nl_route, 2412 list[ns].ifindex, 2413 &list[ns].info); 2414 if (ret || (!list[ns].info.representor && 2415 !list[ns].info.master)) { 2416 /* 2417 * We failed to recognize representors with 2418 * Netlink, let's try to perform the task 2419 * with sysfs. 2420 */ 2421 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2422 &list[ns].info); 2423 } 2424 if (!ret && bd >= 0) { 2425 switch (list[ns].info.name_type) { 2426 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2427 if (np == 1) { 2428 /* 2429 * Force standalone bonding 2430 * device for ROCE LAG 2431 * configurations. 2432 */ 2433 list[ns].info.master = 0; 2434 list[ns].info.representor = 0; 2435 } 2436 if (list[ns].info.port_name == bd) 2437 ns++; 2438 break; 2439 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2440 /* Fallthrough */ 2441 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2442 /* Fallthrough */ 2443 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2444 if (list[ns].info.pf_num == bd) 2445 ns++; 2446 break; 2447 default: 2448 break; 2449 } 2450 continue; 2451 } 2452 if (!ret && mpesw >= 0) { 2453 switch (list[ns].info.name_type) { 2454 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2455 /* Owner port is treated as master port. */ 2456 if (list[ns].info.port_name == mpesw) { 2457 list[ns].info.master = 1; 2458 list[ns].info.representor = 0; 2459 } else { 2460 list[ns].info.master = 0; 2461 list[ns].info.representor = 1; 2462 } 2463 /* 2464 * Ports of this type have uplink port index 2465 * encoded in the name. This index is also a PF index. 2466 */ 2467 list[ns].info.pf_num = list[ns].info.port_name; 2468 list[ns].mpesw_port = list[ns].info.port_name; 2469 list[ns].info.mpesw_owner = mpesw; 2470 ns++; 2471 break; 2472 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2473 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2474 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2475 /* Only spawn representors related to the probed PF. */ 2476 if (list[ns].info.pf_num == owner_id) { 2477 /* 2478 * Ports of this type have PF index encoded in name, 2479 * which translate to the related uplink port index. 2480 */ 2481 list[ns].mpesw_port = list[ns].info.pf_num; 2482 /* MPESW owner is also saved but not used now. */ 2483 list[ns].info.mpesw_owner = mpesw; 2484 ns++; 2485 } 2486 break; 2487 default: 2488 break; 2489 } 2490 continue; 2491 } 2492 if (!ret && (list[ns].info.representor ^ 2493 list[ns].info.master)) 2494 ns++; 2495 } 2496 if (!ns) { 2497 DRV_LOG(ERR, 2498 "Unable to recognize master/representors on the IB device with multiple ports."); 2499 rte_errno = ENOENT; 2500 ret = -rte_errno; 2501 goto exit; 2502 } 2503 } else { 2504 /* 2505 * The existence of several matching entries (nd > 1) means 2506 * port representors have been instantiated. No existing Verbs 2507 * call nor sysfs entries can tell them apart, this can only 2508 * be done through Netlink calls assuming kernel drivers are 2509 * recent enough to support them. 2510 * 2511 * In the event of identification failure through Netlink, 2512 * try again through sysfs, then: 2513 * 2514 * 1. A single IB device matches (nd == 1) with single 2515 * port (np=0/1) and is not a representor, assume 2516 * no switch support. 2517 * 2518 * 2. Otherwise no safe assumptions can be made; 2519 * complain louder and bail out. 2520 */ 2521 for (i = 0; i != nd; ++i) { 2522 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2523 list[ns].bond_info = NULL; 2524 list[ns].max_port = 1; 2525 list[ns].phys_port = 1; 2526 list[ns].phys_dev_name = ibv_match[i]->name; 2527 list[ns].eth_dev = NULL; 2528 list[ns].pci_dev = pci_dev; 2529 list[ns].cdev = cdev; 2530 list[ns].pf_bond = -1; 2531 list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID; 2532 list[ns].ifindex = 0; 2533 if (nl_rdma >= 0) 2534 list[ns].ifindex = mlx5_nl_ifindex 2535 (nl_rdma, 2536 ibv_match[i]->name, 2537 1); 2538 if (!list[ns].ifindex) { 2539 char ifname[IF_NAMESIZE]; 2540 2541 /* 2542 * Netlink failed, it may happen with old 2543 * ib_core kernel driver (before 4.16). 2544 * We can assume there is old driver because 2545 * here we are processing single ports IB 2546 * devices. Let's try sysfs to retrieve 2547 * the ifindex. The method works for 2548 * master device only. 2549 */ 2550 if (nd > 1) { 2551 /* 2552 * Multiple devices found, assume 2553 * representors, can not distinguish 2554 * master/representor and retrieve 2555 * ifindex via sysfs. 2556 */ 2557 continue; 2558 } 2559 ret = mlx5_get_ifname_sysfs 2560 (ibv_match[i]->ibdev_path, ifname); 2561 if (!ret) 2562 list[ns].ifindex = 2563 if_nametoindex(ifname); 2564 if (!list[ns].ifindex) { 2565 /* 2566 * No network interface index found 2567 * for the specified device, it means 2568 * there it is neither representor 2569 * nor master. 2570 */ 2571 continue; 2572 } 2573 } 2574 ret = -1; 2575 if (nl_route >= 0) 2576 ret = mlx5_nl_switch_info(nl_route, 2577 list[ns].ifindex, 2578 &list[ns].info); 2579 if (ret || (!list[ns].info.representor && 2580 !list[ns].info.master)) { 2581 /* 2582 * We failed to recognize representors with 2583 * Netlink, let's try to perform the task 2584 * with sysfs. 2585 */ 2586 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2587 &list[ns].info); 2588 } 2589 if (!ret && (list[ns].info.representor ^ 2590 list[ns].info.master)) { 2591 ns++; 2592 } else if ((nd == 1) && 2593 !list[ns].info.representor && 2594 !list[ns].info.master) { 2595 /* 2596 * Single IB device with one physical port and 2597 * attached network device. 2598 * May be SRIOV is not enabled or there is no 2599 * representors. 2600 */ 2601 DRV_LOG(INFO, "No E-Switch support detected."); 2602 ns++; 2603 break; 2604 } 2605 } 2606 if (!ns) { 2607 DRV_LOG(ERR, 2608 "Unable to recognize master/representors on the multiple IB devices."); 2609 rte_errno = ENOENT; 2610 ret = -rte_errno; 2611 goto exit; 2612 } 2613 /* 2614 * New kernels may add the switch_id attribute for the case 2615 * there is no E-Switch and we wrongly recognized the only 2616 * device as master. Override this if there is the single 2617 * device with single port and new device name format present. 2618 */ 2619 if (nd == 1 && 2620 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2621 list[0].info.master = 0; 2622 list[0].info.representor = 0; 2623 } 2624 } 2625 MLX5_ASSERT(ns); 2626 /* 2627 * Sort list to probe devices in natural order for users convenience 2628 * (i.e. master first, then representors from lowest to highest ID). 2629 */ 2630 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2631 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2632 /* Set devargs default values. */ 2633 if (eth_da.nb_mh_controllers == 0) { 2634 eth_da.nb_mh_controllers = 1; 2635 eth_da.mh_controllers[0] = 0; 2636 } 2637 if (eth_da.nb_ports == 0 && ns > 0) { 2638 if (list[0].pf_bond >= 0 && list[0].info.representor) 2639 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2640 pci_dev->device.devargs->args); 2641 eth_da.nb_ports = 1; 2642 eth_da.ports[0] = list[0].info.pf_num; 2643 } 2644 if (eth_da.nb_representor_ports == 0) { 2645 eth_da.nb_representor_ports = 1; 2646 eth_da.representor_ports[0] = 0; 2647 } 2648 } 2649 for (i = 0; i != ns; ++i) { 2650 uint32_t restore; 2651 2652 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2653 mkvlist); 2654 if (!list[i].eth_dev) { 2655 if (rte_errno != EBUSY && rte_errno != EEXIST) 2656 break; 2657 /* Device is disabled or already spawned. Ignore it. */ 2658 continue; 2659 } 2660 restore = list[i].eth_dev->data->dev_flags; 2661 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2662 /** 2663 * Each representor has a dedicated interrupts vector. 2664 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2665 * representor eth_dev object because representor and PF 2666 * share the same PCI address. 2667 * Override representor device with a dedicated 2668 * interrupts handle here. 2669 * Representor interrupts handle is released in mlx5_dev_stop(). 2670 */ 2671 if (list[i].info.representor) { 2672 struct rte_intr_handle *intr_handle = 2673 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2674 if (intr_handle == NULL) { 2675 DRV_LOG(ERR, 2676 "port %u failed to allocate memory for interrupt handler " 2677 "Rx interrupts will not be supported", 2678 i); 2679 rte_errno = ENOMEM; 2680 ret = -rte_errno; 2681 goto exit; 2682 } 2683 list[i].eth_dev->intr_handle = intr_handle; 2684 } 2685 /* Restore non-PCI flags cleared by the above call. */ 2686 list[i].eth_dev->data->dev_flags |= restore; 2687 rte_eth_dev_probing_finish(list[i].eth_dev); 2688 } 2689 if (i != ns) { 2690 DRV_LOG(ERR, 2691 "probe of PCI device " PCI_PRI_FMT " aborted after" 2692 " encountering an error: %s", 2693 owner_pci.domain, owner_pci.bus, 2694 owner_pci.devid, owner_pci.function, 2695 strerror(rte_errno)); 2696 ret = -rte_errno; 2697 /* Roll back. */ 2698 while (i--) { 2699 if (!list[i].eth_dev) 2700 continue; 2701 mlx5_dev_close(list[i].eth_dev); 2702 /* mac_addrs must not be freed because in dev_private */ 2703 list[i].eth_dev->data->mac_addrs = NULL; 2704 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2705 } 2706 /* Restore original error. */ 2707 rte_errno = -ret; 2708 } else { 2709 ret = 0; 2710 } 2711 exit: 2712 /* 2713 * Do the routine cleanup: 2714 * - close opened Netlink sockets 2715 * - free allocated spawn data array 2716 * - free the Infiniband device list 2717 */ 2718 if (nl_rdma >= 0) 2719 close(nl_rdma); 2720 if (nl_route >= 0) 2721 close(nl_route); 2722 if (list) 2723 mlx5_free(list); 2724 MLX5_ASSERT(ibv_list); 2725 mlx5_glue->free_device_list(ibv_list); 2726 return ret; 2727 } 2728 2729 static int 2730 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2731 struct rte_eth_devargs *eth_da) 2732 { 2733 int ret = 0; 2734 2735 if (dev->devargs == NULL) 2736 return 0; 2737 memset(eth_da, 0, sizeof(*eth_da)); 2738 /* Parse representor information first from class argument. */ 2739 if (dev->devargs->cls_str) 2740 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da, 1); 2741 if (ret < 0) { 2742 DRV_LOG(ERR, "failed to parse device arguments: %s", 2743 dev->devargs->cls_str); 2744 return -rte_errno; 2745 } 2746 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) { 2747 /* Parse legacy device argument */ 2748 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da, 1); 2749 if (ret < 0) { 2750 DRV_LOG(ERR, "failed to parse device arguments: %s", 2751 dev->devargs->args); 2752 return -rte_errno; 2753 } 2754 } 2755 return 0; 2756 } 2757 2758 /** 2759 * Callback to register a PCI device. 2760 * 2761 * This function spawns Ethernet devices out of a given PCI device. 2762 * 2763 * @param[in] cdev 2764 * Pointer to common mlx5 device structure. 2765 * @param[in, out] mkvlist 2766 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2767 * 2768 * @return 2769 * 0 on success, a negative errno value otherwise and rte_errno is set. 2770 */ 2771 static int 2772 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2773 struct mlx5_kvargs_ctrl *mkvlist) 2774 { 2775 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2776 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2777 int ret = 0; 2778 uint16_t p; 2779 2780 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2781 if (ret != 0) 2782 return ret; 2783 2784 if (eth_da.nb_ports > 0) { 2785 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2786 for (p = 0; p < eth_da.nb_ports; p++) { 2787 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2788 eth_da.ports[p], mkvlist); 2789 if (ret) { 2790 DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " " 2791 "aborted due to proding failure of PF %u", 2792 pci_dev->addr.domain, pci_dev->addr.bus, 2793 pci_dev->addr.devid, pci_dev->addr.function, 2794 eth_da.ports[p]); 2795 mlx5_net_remove(cdev); 2796 if (p != 0) 2797 break; 2798 } 2799 } 2800 } else { 2801 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2802 } 2803 return ret; 2804 } 2805 2806 /* Probe a single SF device on auxiliary bus, no representor support. */ 2807 static int 2808 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2809 struct mlx5_kvargs_ctrl *mkvlist) 2810 { 2811 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2812 struct mlx5_dev_spawn_data spawn = { 2813 .pf_bond = -1, 2814 .mpesw_port = MLX5_MPESW_PORT_INVALID, 2815 }; 2816 struct rte_device *dev = cdev->dev; 2817 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2818 struct rte_eth_dev *eth_dev; 2819 int ret = 0; 2820 2821 /* Parse ethdev devargs. */ 2822 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2823 if (ret != 0) 2824 return ret; 2825 /* Init spawn data. */ 2826 spawn.max_port = 1; 2827 spawn.phys_port = 1; 2828 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2829 ret = mlx5_auxiliary_get_ifindex(dev->name); 2830 if (ret < 0) { 2831 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2832 return ret; 2833 } 2834 spawn.ifindex = ret; 2835 spawn.cdev = cdev; 2836 /* Spawn device. */ 2837 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2838 if (eth_dev == NULL) 2839 return -rte_errno; 2840 /* Post create. */ 2841 eth_dev->intr_handle = adev->intr_handle; 2842 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2843 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2844 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2845 eth_dev->data->numa_node = dev->numa_node; 2846 } 2847 rte_eth_dev_probing_finish(eth_dev); 2848 return 0; 2849 } 2850 2851 /** 2852 * Net class driver callback to probe a device. 2853 * 2854 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2855 * 2856 * @param[in] cdev 2857 * Pointer to the common mlx5 device. 2858 * @param[in, out] mkvlist 2859 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2860 * 2861 * @return 2862 * 0 on success, a negative errno value otherwise and rte_errno is set. 2863 */ 2864 int 2865 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2866 struct mlx5_kvargs_ctrl *mkvlist) 2867 { 2868 int ret; 2869 2870 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2871 mlx5_pmd_socket_init(); 2872 ret = mlx5_init_once(); 2873 if (ret) { 2874 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2875 strerror(rte_errno)); 2876 return -rte_errno; 2877 } 2878 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2879 if (ret) { 2880 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2881 strerror(rte_errno)); 2882 return -rte_errno; 2883 } 2884 if (mlx5_dev_is_pci(cdev->dev)) 2885 return mlx5_os_pci_probe(cdev, mkvlist); 2886 else 2887 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2888 } 2889 2890 /** 2891 * Cleanup resources when the last device is closed. 2892 */ 2893 void 2894 mlx5_os_net_cleanup(void) 2895 { 2896 mlx5_pmd_socket_uninit(); 2897 } 2898 2899 /** 2900 * Install shared asynchronous device events handler. 2901 * This function is implemented to support event sharing 2902 * between multiple ports of single IB device. 2903 * 2904 * @param sh 2905 * Pointer to mlx5_dev_ctx_shared object. 2906 */ 2907 void 2908 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2909 { 2910 struct ibv_context *ctx = sh->cdev->ctx; 2911 int nlsk_fd; 2912 2913 sh->intr_handle = mlx5_os_interrupt_handler_create 2914 (RTE_INTR_INSTANCE_F_SHARED, true, 2915 ctx->async_fd, mlx5_dev_interrupt_handler, sh); 2916 if (!sh->intr_handle) { 2917 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2918 return; 2919 } 2920 nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK); 2921 if (nlsk_fd < 0) { 2922 DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s", 2923 rte_strerror(rte_errno)); 2924 return; 2925 } 2926 sh->intr_handle_nl = mlx5_os_interrupt_handler_create 2927 (RTE_INTR_INSTANCE_F_SHARED, true, 2928 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh); 2929 if (sh->intr_handle_nl == NULL) { 2930 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2931 return; 2932 } 2933 if (sh->cdev->config.devx) { 2934 #ifdef HAVE_IBV_DEVX_ASYNC 2935 struct mlx5dv_devx_cmd_comp *devx_comp; 2936 2937 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2938 devx_comp = sh->devx_comp; 2939 if (!devx_comp) { 2940 DRV_LOG(INFO, "failed to allocate devx_comp."); 2941 return; 2942 } 2943 sh->intr_handle_devx = mlx5_os_interrupt_handler_create 2944 (RTE_INTR_INSTANCE_F_SHARED, true, 2945 devx_comp->fd, 2946 mlx5_dev_interrupt_handler_devx, sh); 2947 if (!sh->intr_handle_devx) { 2948 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2949 return; 2950 } 2951 #endif /* HAVE_IBV_DEVX_ASYNC */ 2952 } 2953 } 2954 2955 /** 2956 * Uninstall shared asynchronous device events handler. 2957 * This function is implemented to support event sharing 2958 * between multiple ports of single IB device. 2959 * 2960 * @param dev 2961 * Pointer to mlx5_dev_ctx_shared object. 2962 */ 2963 void 2964 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2965 { 2966 mlx5_os_interrupt_handler_destroy(sh->intr_handle, 2967 mlx5_dev_interrupt_handler, sh); 2968 mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl, 2969 mlx5_dev_interrupt_handler_nl, sh); 2970 #ifdef HAVE_IBV_DEVX_ASYNC 2971 mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx, 2972 mlx5_dev_interrupt_handler_devx, sh); 2973 if (sh->devx_comp) 2974 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2975 #endif 2976 } 2977 2978 /** 2979 * Read statistics by a named counter. 2980 * 2981 * @param[in] priv 2982 * Pointer to the private device data structure. 2983 * @param[in] ctr_name 2984 * Pointer to the name of the statistic counter to read 2985 * @param[out] stat 2986 * Pointer to read statistic value. 2987 * @return 2988 * 0 on success and stat is valud, 1 if failed to read the value 2989 * rte_errno is set. 2990 * 2991 */ 2992 int 2993 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2994 uint64_t *stat) 2995 { 2996 int fd; 2997 2998 if (priv->sh) { 2999 if (priv->q_counters != NULL && 3000 strcmp(ctr_name, "out_of_buffer") == 0) 3001 return mlx5_devx_cmd_queue_counter_query 3002 (priv->q_counters, 0, (uint32_t *)stat); 3003 MKSTR(path, "%s/ports/%d/hw_counters/%s", 3004 priv->sh->ibdev_path, 3005 priv->dev_port, 3006 ctr_name); 3007 fd = open(path, O_RDONLY); 3008 /* 3009 * in switchdev the file location is not per port 3010 * but rather in <ibdev_path>/hw_counters/<file_name>. 3011 */ 3012 if (fd == -1) { 3013 MKSTR(path1, "%s/hw_counters/%s", 3014 priv->sh->ibdev_path, 3015 ctr_name); 3016 fd = open(path1, O_RDONLY); 3017 } 3018 if (fd != -1) { 3019 char buf[21] = {'\0'}; 3020 ssize_t n = read(fd, buf, sizeof(buf)); 3021 3022 close(fd); 3023 if (n != -1) { 3024 *stat = strtoull(buf, NULL, 10); 3025 return 0; 3026 } 3027 } 3028 } 3029 *stat = 0; 3030 return 1; 3031 } 3032 3033 /** 3034 * Remove a MAC address from device 3035 * 3036 * @param dev 3037 * Pointer to Ethernet device structure. 3038 * @param index 3039 * MAC address index. 3040 */ 3041 void 3042 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 3043 { 3044 struct mlx5_priv *priv = dev->data->dev_private; 3045 const int vf = priv->sh->dev_cap.vf; 3046 3047 if (vf) 3048 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 3049 mlx5_ifindex(dev), priv->mac_own, 3050 &dev->data->mac_addrs[index], index); 3051 } 3052 3053 /** 3054 * Adds a MAC address to the device 3055 * 3056 * @param dev 3057 * Pointer to Ethernet device structure. 3058 * @param mac_addr 3059 * MAC address to register. 3060 * @param index 3061 * MAC address index. 3062 * 3063 * @return 3064 * 0 on success, a negative errno value otherwise 3065 */ 3066 int 3067 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 3068 uint32_t index) 3069 { 3070 struct mlx5_priv *priv = dev->data->dev_private; 3071 const int vf = priv->sh->dev_cap.vf; 3072 int ret = 0; 3073 3074 if (vf) 3075 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 3076 mlx5_ifindex(dev), priv->mac_own, 3077 mac, index); 3078 return ret; 3079 } 3080 3081 /** 3082 * Modify a VF MAC address 3083 * 3084 * @param priv 3085 * Pointer to device private data. 3086 * @param mac_addr 3087 * MAC address to modify into. 3088 * @param iface_idx 3089 * Net device interface index 3090 * @param vf_index 3091 * VF index 3092 * 3093 * @return 3094 * 0 on success, a negative errno value otherwise 3095 */ 3096 int 3097 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 3098 unsigned int iface_idx, 3099 struct rte_ether_addr *mac_addr, 3100 int vf_index) 3101 { 3102 return mlx5_nl_vf_mac_addr_modify 3103 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 3104 } 3105 3106 /** 3107 * Set device promiscuous mode 3108 * 3109 * @param dev 3110 * Pointer to Ethernet device structure. 3111 * @param enable 3112 * 0 - promiscuous is disabled, otherwise - enabled 3113 * 3114 * @return 3115 * 0 on success, a negative error value otherwise 3116 */ 3117 int 3118 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 3119 { 3120 struct mlx5_priv *priv = dev->data->dev_private; 3121 3122 return mlx5_nl_promisc(priv->nl_socket_route, 3123 mlx5_ifindex(dev), !!enable); 3124 } 3125 3126 /** 3127 * Set device promiscuous mode 3128 * 3129 * @param dev 3130 * Pointer to Ethernet device structure. 3131 * @param enable 3132 * 0 - all multicase is disabled, otherwise - enabled 3133 * 3134 * @return 3135 * 0 on success, a negative error value otherwise 3136 */ 3137 int 3138 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 3139 { 3140 struct mlx5_priv *priv = dev->data->dev_private; 3141 3142 return mlx5_nl_allmulti(priv->nl_socket_route, 3143 mlx5_ifindex(dev), !!enable); 3144 } 3145 3146 /** 3147 * Flush device MAC addresses 3148 * 3149 * @param dev 3150 * Pointer to Ethernet device structure. 3151 * 3152 */ 3153 void 3154 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 3155 { 3156 struct mlx5_priv *priv = dev->data->dev_private; 3157 3158 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 3159 dev->data->mac_addrs, 3160 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 3161 } 3162