1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <rte_ethdev_driver.h> 20 #include <rte_ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <rte_bus_pci.h> 23 #include <rte_common.h> 24 #include <rte_kvargs.h> 25 #include <rte_rwlock.h> 26 #include <rte_spinlock.h> 27 #include <rte_string_fns.h> 28 #include <rte_alarm.h> 29 #include <rte_eal_paging.h> 30 31 #include <mlx5_glue.h> 32 #include <mlx5_devx_cmds.h> 33 #include <mlx5_common.h> 34 #include <mlx5_common_mp.h> 35 #include <mlx5_common_mr.h> 36 #include <mlx5_malloc.h> 37 38 #include "mlx5_defs.h" 39 #include "mlx5.h" 40 #include "mlx5_common_os.h" 41 #include "mlx5_utils.h" 42 #include "mlx5_rxtx.h" 43 #include "mlx5_autoconf.h" 44 #include "mlx5_mr.h" 45 #include "mlx5_flow.h" 46 #include "rte_pmd_mlx5.h" 47 #include "mlx5_verbs.h" 48 #include "mlx5_nl.h" 49 #include "mlx5_devx.h" 50 51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 52 53 #ifndef HAVE_IBV_MLX5_MOD_MPW 54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 56 #endif 57 58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 60 #endif 61 62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 63 64 /* Spinlock for mlx5_shared_data allocation. */ 65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 66 67 /* Process local data for secondary processes. */ 68 static struct mlx5_local_data mlx5_local_data; 69 70 /** 71 * Set the completion channel file descriptor interrupt as non-blocking. 72 * 73 * @param[in] rxq_obj 74 * Pointer to RQ channel object, which includes the channel fd 75 * 76 * @param[out] fd 77 * The file descriptor (representing the intetrrupt) used in this channel. 78 * 79 * @return 80 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 81 */ 82 int 83 mlx5_os_set_nonblock_channel_fd(int fd) 84 { 85 int flags; 86 87 flags = fcntl(fd, F_GETFL); 88 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 89 } 90 91 /** 92 * Get mlx5 device attributes. The glue function query_device_ex() is called 93 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 94 * device attributes from the glue out parameter. 95 * 96 * @param dev 97 * Pointer to ibv context. 98 * 99 * @param device_attr 100 * Pointer to mlx5 device attributes. 101 * 102 * @return 103 * 0 on success, non zero error number otherwise 104 */ 105 int 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 107 { 108 int err; 109 struct ibv_device_attr_ex attr_ex; 110 memset(device_attr, 0, sizeof(*device_attr)); 111 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 112 if (err) 113 return err; 114 115 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 116 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 117 device_attr->max_sge = attr_ex.orig_attr.max_sge; 118 device_attr->max_cq = attr_ex.orig_attr.max_cq; 119 device_attr->max_qp = attr_ex.orig_attr.max_qp; 120 device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 121 device_attr->max_rwq_indirection_table_size = 122 attr_ex.rss_caps.max_rwq_indirection_table_size; 123 device_attr->max_tso = attr_ex.tso_caps.max_tso; 124 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 125 126 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 127 err = mlx5_glue->dv_query_device(ctx, &dv_attr); 128 if (err) 129 return err; 130 131 device_attr->flags = dv_attr.flags; 132 device_attr->comp_mask = dv_attr.comp_mask; 133 #ifdef HAVE_IBV_MLX5_MOD_SWP 134 device_attr->sw_parsing_offloads = 135 dv_attr.sw_parsing_caps.sw_parsing_offloads; 136 #endif 137 device_attr->min_single_stride_log_num_of_bytes = 138 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 139 device_attr->max_single_stride_log_num_of_bytes = 140 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 141 device_attr->min_single_wqe_log_num_of_strides = 142 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 143 device_attr->max_single_wqe_log_num_of_strides = 144 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 145 device_attr->stride_supported_qpts = 146 dv_attr.striding_rq_caps.supported_qpts; 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 148 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 149 #endif 150 151 return err; 152 } 153 154 /** 155 * Verbs callback to allocate a memory. This function should allocate the space 156 * according to the size provided residing inside a huge page. 157 * Please note that all allocation must respect the alignment from libmlx5 158 * (i.e. currently rte_mem_page_size()). 159 * 160 * @param[in] size 161 * The size in bytes of the memory to allocate. 162 * @param[in] data 163 * A pointer to the callback data. 164 * 165 * @return 166 * Allocated buffer, NULL otherwise and rte_errno is set. 167 */ 168 static void * 169 mlx5_alloc_verbs_buf(size_t size, void *data) 170 { 171 struct mlx5_priv *priv = data; 172 void *ret; 173 unsigned int socket = SOCKET_ID_ANY; 174 size_t alignment = rte_mem_page_size(); 175 if (alignment == (size_t)-1) { 176 DRV_LOG(ERR, "Failed to get mem page size"); 177 rte_errno = ENOMEM; 178 return NULL; 179 } 180 181 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { 182 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 183 184 socket = ctrl->socket; 185 } else if (priv->verbs_alloc_ctx.type == 186 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) { 187 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 188 189 socket = ctrl->socket; 190 } 191 MLX5_ASSERT(data != NULL); 192 ret = mlx5_malloc(0, size, alignment, socket); 193 if (!ret && size) 194 rte_errno = ENOMEM; 195 return ret; 196 } 197 198 /** 199 * Verbs callback to free a memory. 200 * 201 * @param[in] ptr 202 * A pointer to the memory to free. 203 * @param[in] data 204 * A pointer to the callback data. 205 */ 206 static void 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) 208 { 209 MLX5_ASSERT(data != NULL); 210 mlx5_free(ptr); 211 } 212 213 /** 214 * Initialize DR related data within private structure. 215 * Routine checks the reference counter and does actual 216 * resources creation/initialization only if counter is zero. 217 * 218 * @param[in] priv 219 * Pointer to the private device data structure. 220 * 221 * @return 222 * Zero on success, positive error code otherwise. 223 */ 224 static int 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 226 { 227 struct mlx5_dev_ctx_shared *sh = priv->sh; 228 char s[MLX5_HLIST_NAMESIZE]; 229 int err = 0; 230 231 if (!sh->flow_tbls) 232 err = mlx5_alloc_table_hash_list(priv); 233 else 234 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n", 235 (void *)sh->flow_tbls); 236 if (err) 237 return err; 238 /* Create tags hash list table. */ 239 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); 240 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE); 241 if (!sh->tag_table) { 242 DRV_LOG(ERR, "tags with hash creation failed."); 243 err = ENOMEM; 244 goto error; 245 } 246 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); 247 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ); 248 if (!sh->modify_cmds) { 249 DRV_LOG(ERR, "hdr modify hash creation failed"); 250 err = ENOMEM; 251 goto error; 252 } 253 snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name); 254 sh->encaps_decaps = mlx5_hlist_create(s, 255 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ); 256 if (!sh->encaps_decaps) { 257 DRV_LOG(ERR, "encap decap hash creation failed"); 258 err = ENOMEM; 259 goto error; 260 } 261 #ifdef HAVE_MLX5DV_DR 262 void *domain; 263 264 if (sh->dv_refcnt) { 265 /* Shared DV/DR structures is already initialized. */ 266 sh->dv_refcnt++; 267 priv->dr_shared = 1; 268 return 0; 269 } 270 /* Reference counter is zero, we should initialize structures. */ 271 domain = mlx5_glue->dr_create_domain(sh->ctx, 272 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 273 if (!domain) { 274 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 275 err = errno; 276 goto error; 277 } 278 sh->rx_domain = domain; 279 domain = mlx5_glue->dr_create_domain(sh->ctx, 280 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 281 if (!domain) { 282 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 283 err = errno; 284 goto error; 285 } 286 pthread_mutex_init(&sh->dv_mutex, NULL); 287 sh->tx_domain = domain; 288 #ifdef HAVE_MLX5DV_DR_ESWITCH 289 if (priv->config.dv_esw_en) { 290 domain = mlx5_glue->dr_create_domain 291 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); 292 if (!domain) { 293 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 294 err = errno; 295 goto error; 296 } 297 sh->fdb_domain = domain; 298 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); 299 } 300 #endif 301 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 302 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 303 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 304 if (sh->fdb_domain) 305 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 306 } 307 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 308 #endif /* HAVE_MLX5DV_DR */ 309 sh->dv_refcnt++; 310 priv->dr_shared = 1; 311 return 0; 312 error: 313 /* Rollback the created objects. */ 314 if (sh->rx_domain) { 315 mlx5_glue->dr_destroy_domain(sh->rx_domain); 316 sh->rx_domain = NULL; 317 } 318 if (sh->tx_domain) { 319 mlx5_glue->dr_destroy_domain(sh->tx_domain); 320 sh->tx_domain = NULL; 321 } 322 if (sh->fdb_domain) { 323 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 324 sh->fdb_domain = NULL; 325 } 326 if (sh->esw_drop_action) { 327 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 328 sh->esw_drop_action = NULL; 329 } 330 if (sh->pop_vlan_action) { 331 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 332 sh->pop_vlan_action = NULL; 333 } 334 if (sh->encaps_decaps) { 335 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL); 336 sh->encaps_decaps = NULL; 337 } 338 if (sh->modify_cmds) { 339 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 340 sh->modify_cmds = NULL; 341 } 342 if (sh->tag_table) { 343 /* tags should be destroyed with flow before. */ 344 mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 345 sh->tag_table = NULL; 346 } 347 mlx5_free_table_hash_list(priv); 348 return err; 349 } 350 351 /** 352 * Destroy DR related data within private structure. 353 * 354 * @param[in] priv 355 * Pointer to the private device data structure. 356 */ 357 void 358 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 359 { 360 struct mlx5_dev_ctx_shared *sh; 361 362 if (!priv->dr_shared) 363 return; 364 priv->dr_shared = 0; 365 sh = priv->sh; 366 MLX5_ASSERT(sh); 367 #ifdef HAVE_MLX5DV_DR 368 MLX5_ASSERT(sh->dv_refcnt); 369 if (sh->dv_refcnt && --sh->dv_refcnt) 370 return; 371 if (sh->rx_domain) { 372 mlx5_glue->dr_destroy_domain(sh->rx_domain); 373 sh->rx_domain = NULL; 374 } 375 if (sh->tx_domain) { 376 mlx5_glue->dr_destroy_domain(sh->tx_domain); 377 sh->tx_domain = NULL; 378 } 379 #ifdef HAVE_MLX5DV_DR_ESWITCH 380 if (sh->fdb_domain) { 381 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 382 sh->fdb_domain = NULL; 383 } 384 if (sh->esw_drop_action) { 385 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 386 sh->esw_drop_action = NULL; 387 } 388 #endif 389 if (sh->pop_vlan_action) { 390 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 391 sh->pop_vlan_action = NULL; 392 } 393 pthread_mutex_destroy(&sh->dv_mutex); 394 #endif /* HAVE_MLX5DV_DR */ 395 if (sh->encaps_decaps) { 396 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL); 397 sh->encaps_decaps = NULL; 398 } 399 if (sh->modify_cmds) { 400 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 401 sh->modify_cmds = NULL; 402 } 403 if (sh->tag_table) { 404 /* tags should be destroyed with flow before. */ 405 mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 406 sh->tag_table = NULL; 407 } 408 mlx5_free_table_hash_list(priv); 409 } 410 411 /** 412 * Initialize shared data between primary and secondary process. 413 * 414 * A memzone is reserved by primary process and secondary processes attach to 415 * the memzone. 416 * 417 * @return 418 * 0 on success, a negative errno value otherwise and rte_errno is set. 419 */ 420 static int 421 mlx5_init_shared_data(void) 422 { 423 const struct rte_memzone *mz; 424 int ret = 0; 425 426 rte_spinlock_lock(&mlx5_shared_data_lock); 427 if (mlx5_shared_data == NULL) { 428 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 429 /* Allocate shared memory. */ 430 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 431 sizeof(*mlx5_shared_data), 432 SOCKET_ID_ANY, 0); 433 if (mz == NULL) { 434 DRV_LOG(ERR, 435 "Cannot allocate mlx5 shared data"); 436 ret = -rte_errno; 437 goto error; 438 } 439 mlx5_shared_data = mz->addr; 440 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 441 rte_spinlock_init(&mlx5_shared_data->lock); 442 } else { 443 /* Lookup allocated shared memory. */ 444 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 445 if (mz == NULL) { 446 DRV_LOG(ERR, 447 "Cannot attach mlx5 shared data"); 448 ret = -rte_errno; 449 goto error; 450 } 451 mlx5_shared_data = mz->addr; 452 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 453 } 454 } 455 error: 456 rte_spinlock_unlock(&mlx5_shared_data_lock); 457 return ret; 458 } 459 460 /** 461 * PMD global initialization. 462 * 463 * Independent from individual device, this function initializes global 464 * per-PMD data structures distinguishing primary and secondary processes. 465 * Hence, each initialization is called once per a process. 466 * 467 * @return 468 * 0 on success, a negative errno value otherwise and rte_errno is set. 469 */ 470 static int 471 mlx5_init_once(void) 472 { 473 struct mlx5_shared_data *sd; 474 struct mlx5_local_data *ld = &mlx5_local_data; 475 int ret = 0; 476 477 if (mlx5_init_shared_data()) 478 return -rte_errno; 479 sd = mlx5_shared_data; 480 MLX5_ASSERT(sd); 481 rte_spinlock_lock(&sd->lock); 482 switch (rte_eal_process_type()) { 483 case RTE_PROC_PRIMARY: 484 if (sd->init_done) 485 break; 486 LIST_INIT(&sd->mem_event_cb_list); 487 rte_rwlock_init(&sd->mem_event_rwlock); 488 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", 489 mlx5_mr_mem_event_cb, NULL); 490 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 491 mlx5_mp_os_primary_handle); 492 if (ret) 493 goto out; 494 sd->init_done = true; 495 break; 496 case RTE_PROC_SECONDARY: 497 if (ld->init_done) 498 break; 499 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 500 mlx5_mp_os_secondary_handle); 501 if (ret) 502 goto out; 503 ++sd->secondary_cnt; 504 ld->init_done = true; 505 break; 506 default: 507 break; 508 } 509 out: 510 rte_spinlock_unlock(&sd->lock); 511 return ret; 512 } 513 514 /** 515 * Spawn an Ethernet device from Verbs information. 516 * 517 * @param dpdk_dev 518 * Backing DPDK device. 519 * @param spawn 520 * Verbs device parameters (name, port, switch_info) to spawn. 521 * @param config 522 * Device configuration parameters. 523 * 524 * @return 525 * A valid Ethernet device object on success, NULL otherwise and rte_errno 526 * is set. The following errors are defined: 527 * 528 * EBUSY: device is not supposed to be spawned. 529 * EEXIST: device is already spawned 530 */ 531 static struct rte_eth_dev * 532 mlx5_dev_spawn(struct rte_device *dpdk_dev, 533 struct mlx5_dev_spawn_data *spawn, 534 struct mlx5_dev_config *config) 535 { 536 const struct mlx5_switch_info *switch_info = &spawn->info; 537 struct mlx5_dev_ctx_shared *sh = NULL; 538 struct ibv_port_attr port_attr; 539 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 540 struct rte_eth_dev *eth_dev = NULL; 541 struct mlx5_priv *priv = NULL; 542 int err = 0; 543 unsigned int hw_padding = 0; 544 unsigned int mps; 545 unsigned int cqe_comp; 546 unsigned int cqe_pad = 0; 547 unsigned int tunnel_en = 0; 548 unsigned int mpls_en = 0; 549 unsigned int swp = 0; 550 unsigned int mprq = 0; 551 unsigned int mprq_min_stride_size_n = 0; 552 unsigned int mprq_max_stride_size_n = 0; 553 unsigned int mprq_min_stride_num_n = 0; 554 unsigned int mprq_max_stride_num_n = 0; 555 struct rte_ether_addr mac; 556 char name[RTE_ETH_NAME_MAX_LEN]; 557 int own_domain_id = 0; 558 uint16_t port_id; 559 unsigned int i; 560 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 561 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; 562 #endif 563 564 /* Determine if this port representor is supposed to be spawned. */ 565 if (switch_info->representor && dpdk_dev->devargs) { 566 struct rte_eth_devargs eth_da; 567 568 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); 569 if (err) { 570 rte_errno = -err; 571 DRV_LOG(ERR, "failed to process device arguments: %s", 572 strerror(rte_errno)); 573 return NULL; 574 } 575 for (i = 0; i < eth_da.nb_representor_ports; ++i) 576 if (eth_da.representor_ports[i] == 577 (uint16_t)switch_info->port_name) 578 break; 579 if (i == eth_da.nb_representor_ports) { 580 rte_errno = EBUSY; 581 return NULL; 582 } 583 } 584 /* Build device name. */ 585 if (spawn->pf_bond < 0) { 586 /* Single device. */ 587 if (!switch_info->representor) 588 strlcpy(name, dpdk_dev->name, sizeof(name)); 589 else 590 snprintf(name, sizeof(name), "%s_representor_%u", 591 dpdk_dev->name, switch_info->port_name); 592 } else { 593 /* Bonding device. */ 594 if (!switch_info->representor) 595 snprintf(name, sizeof(name), "%s_%s", 596 dpdk_dev->name, 597 mlx5_os_get_dev_device_name(spawn->phys_dev)); 598 else 599 snprintf(name, sizeof(name), "%s_%s_representor_%u", 600 dpdk_dev->name, 601 mlx5_os_get_dev_device_name(spawn->phys_dev), 602 switch_info->port_name); 603 } 604 /* check if the device is already spawned */ 605 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 606 rte_errno = EEXIST; 607 return NULL; 608 } 609 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 610 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 611 struct mlx5_mp_id mp_id; 612 613 eth_dev = rte_eth_dev_attach_secondary(name); 614 if (eth_dev == NULL) { 615 DRV_LOG(ERR, "can not attach rte ethdev"); 616 rte_errno = ENOMEM; 617 return NULL; 618 } 619 eth_dev->device = dpdk_dev; 620 eth_dev->dev_ops = &mlx5_os_dev_sec_ops; 621 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 622 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 623 err = mlx5_proc_priv_init(eth_dev); 624 if (err) 625 return NULL; 626 mp_id.port_id = eth_dev->data->port_id; 627 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 628 /* Receive command fd from primary process */ 629 err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 630 if (err < 0) 631 goto err_secondary; 632 /* Remap UAR for Tx queues. */ 633 err = mlx5_tx_uar_init_secondary(eth_dev, err); 634 if (err) 635 goto err_secondary; 636 /* 637 * Ethdev pointer is still required as input since 638 * the primary device is not accessible from the 639 * secondary process. 640 */ 641 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 642 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 643 return eth_dev; 644 err_secondary: 645 mlx5_dev_close(eth_dev); 646 return NULL; 647 } 648 /* 649 * Some parameters ("tx_db_nc" in particularly) are needed in 650 * advance to create dv/verbs device context. We proceed the 651 * devargs here to get ones, and later proceed devargs again 652 * to override some hardware settings. 653 */ 654 err = mlx5_args(config, dpdk_dev->devargs); 655 if (err) { 656 err = rte_errno; 657 DRV_LOG(ERR, "failed to process device arguments: %s", 658 strerror(rte_errno)); 659 goto error; 660 } 661 mlx5_malloc_mem_select(config->sys_mem_en); 662 sh = mlx5_alloc_shared_dev_ctx(spawn, config); 663 if (!sh) 664 return NULL; 665 config->devx = sh->devx; 666 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 667 config->dest_tir = 1; 668 #endif 669 #ifdef HAVE_IBV_MLX5_MOD_SWP 670 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 671 #endif 672 /* 673 * Multi-packet send is supported by ConnectX-4 Lx PF as well 674 * as all ConnectX-5 devices. 675 */ 676 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 677 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 678 #endif 679 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 680 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 681 #endif 682 mlx5_glue->dv_query_device(sh->ctx, &dv_attr); 683 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 684 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 685 DRV_LOG(DEBUG, "enhanced MPW is supported"); 686 mps = MLX5_MPW_ENHANCED; 687 } else { 688 DRV_LOG(DEBUG, "MPW is supported"); 689 mps = MLX5_MPW; 690 } 691 } else { 692 DRV_LOG(DEBUG, "MPW isn't supported"); 693 mps = MLX5_MPW_DISABLED; 694 } 695 #ifdef HAVE_IBV_MLX5_MOD_SWP 696 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 697 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; 698 DRV_LOG(DEBUG, "SWP support: %u", swp); 699 #endif 700 config->swp = !!swp; 701 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 702 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 703 struct mlx5dv_striding_rq_caps mprq_caps = 704 dv_attr.striding_rq_caps; 705 706 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 707 mprq_caps.min_single_stride_log_num_of_bytes); 708 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 709 mprq_caps.max_single_stride_log_num_of_bytes); 710 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 711 mprq_caps.min_single_wqe_log_num_of_strides); 712 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 713 mprq_caps.max_single_wqe_log_num_of_strides); 714 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 715 mprq_caps.supported_qpts); 716 DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 717 mprq = 1; 718 mprq_min_stride_size_n = 719 mprq_caps.min_single_stride_log_num_of_bytes; 720 mprq_max_stride_size_n = 721 mprq_caps.max_single_stride_log_num_of_bytes; 722 mprq_min_stride_num_n = 723 mprq_caps.min_single_wqe_log_num_of_strides; 724 mprq_max_stride_num_n = 725 mprq_caps.max_single_wqe_log_num_of_strides; 726 } 727 #endif 728 if (RTE_CACHE_LINE_SIZE == 128 && 729 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) 730 cqe_comp = 0; 731 else 732 cqe_comp = 1; 733 config->cqe_comp = cqe_comp; 734 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD 735 /* Whether device supports 128B Rx CQE padding. */ 736 cqe_pad = RTE_CACHE_LINE_SIZE == 128 && 737 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); 738 #endif 739 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 740 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 741 tunnel_en = ((dv_attr.tunnel_offloads_caps & 742 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && 743 (dv_attr.tunnel_offloads_caps & 744 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && 745 (dv_attr.tunnel_offloads_caps & 746 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); 747 } 748 DRV_LOG(DEBUG, "tunnel offloading is %ssupported", 749 tunnel_en ? "" : "not "); 750 #else 751 DRV_LOG(WARNING, 752 "tunnel offloading disabled due to old OFED/rdma-core version"); 753 #endif 754 config->tunnel_en = tunnel_en; 755 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 756 mpls_en = ((dv_attr.tunnel_offloads_caps & 757 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 758 (dv_attr.tunnel_offloads_caps & 759 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 760 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 761 mpls_en ? "" : "not "); 762 #else 763 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 764 " old OFED/rdma-core version or firmware configuration"); 765 #endif 766 config->mpls_en = mpls_en; 767 /* Check port status. */ 768 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); 769 if (err) { 770 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 771 goto error; 772 } 773 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 774 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 775 err = EINVAL; 776 goto error; 777 } 778 if (port_attr.state != IBV_PORT_ACTIVE) 779 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", 780 mlx5_glue->port_state_str(port_attr.state), 781 port_attr.state); 782 /* Allocate private eth device data. */ 783 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 784 sizeof(*priv), 785 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 786 if (priv == NULL) { 787 DRV_LOG(ERR, "priv allocation failure"); 788 err = ENOMEM; 789 goto error; 790 } 791 priv->sh = sh; 792 priv->dev_port = spawn->phys_port; 793 priv->pci_dev = spawn->pci_dev; 794 priv->mtu = RTE_ETHER_MTU; 795 priv->mp_id.port_id = port_id; 796 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 797 /* Some internal functions rely on Netlink sockets, open them now. */ 798 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); 799 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 800 priv->representor = !!switch_info->representor; 801 priv->master = !!switch_info->master; 802 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 803 priv->vport_meta_tag = 0; 804 priv->vport_meta_mask = 0; 805 priv->pf_bond = spawn->pf_bond; 806 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 807 /* 808 * The DevX port query API is implemented. E-Switch may use 809 * either vport or reg_c[0] metadata register to match on 810 * vport index. The engaged part of metadata register is 811 * defined by mask. 812 */ 813 if (switch_info->representor || switch_info->master) { 814 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | 815 MLX5DV_DEVX_PORT_MATCH_REG_C_0; 816 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, 817 &devx_port); 818 if (err) { 819 DRV_LOG(WARNING, 820 "can't query devx port %d on device %s", 821 spawn->phys_port, 822 mlx5_os_get_dev_device_name(spawn->phys_dev)); 823 devx_port.comp_mask = 0; 824 } 825 } 826 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { 827 priv->vport_meta_tag = devx_port.reg_c_0.value; 828 priv->vport_meta_mask = devx_port.reg_c_0.mask; 829 if (!priv->vport_meta_mask) { 830 DRV_LOG(ERR, "vport zero mask for port %d" 831 " on bonding device %s", 832 spawn->phys_port, 833 mlx5_os_get_dev_device_name 834 (spawn->phys_dev)); 835 err = ENOTSUP; 836 goto error; 837 } 838 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 839 DRV_LOG(ERR, "invalid vport tag for port %d" 840 " on bonding device %s", 841 spawn->phys_port, 842 mlx5_os_get_dev_device_name 843 (spawn->phys_dev)); 844 err = ENOTSUP; 845 goto error; 846 } 847 } 848 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { 849 priv->vport_id = devx_port.vport_num; 850 } else if (spawn->pf_bond >= 0) { 851 DRV_LOG(ERR, "can't deduce vport index for port %d" 852 " on bonding device %s", 853 spawn->phys_port, 854 mlx5_os_get_dev_device_name(spawn->phys_dev)); 855 err = ENOTSUP; 856 goto error; 857 } else { 858 /* Suppose vport index in compatible way. */ 859 priv->vport_id = switch_info->representor ? 860 switch_info->port_name + 1 : -1; 861 } 862 #else 863 /* 864 * Kernel/rdma_core support single E-Switch per PF configurations 865 * only and vport_id field contains the vport index for 866 * associated VF, which is deduced from representor port name. 867 * For example, let's have the IB device port 10, it has 868 * attached network device eth0, which has port name attribute 869 * pf0vf2, we can deduce the VF number as 2, and set vport index 870 * as 3 (2+1). This assigning schema should be changed if the 871 * multiple E-Switch instances per PF configurations or/and PCI 872 * subfunctions are added. 873 */ 874 priv->vport_id = switch_info->representor ? 875 switch_info->port_name + 1 : -1; 876 #endif 877 /* representor_id field keeps the unmodified VF index. */ 878 priv->representor_id = switch_info->representor ? 879 switch_info->port_name : -1; 880 /* 881 * Look for sibling devices in order to reuse their switch domain 882 * if any, otherwise allocate one. 883 */ 884 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 885 const struct mlx5_priv *opriv = 886 rte_eth_devices[port_id].data->dev_private; 887 888 if (!opriv || 889 opriv->sh != priv->sh || 890 opriv->domain_id == 891 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 892 continue; 893 priv->domain_id = opriv->domain_id; 894 break; 895 } 896 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 897 err = rte_eth_switch_domain_alloc(&priv->domain_id); 898 if (err) { 899 err = rte_errno; 900 DRV_LOG(ERR, "unable to allocate switch domain: %s", 901 strerror(rte_errno)); 902 goto error; 903 } 904 own_domain_id = 1; 905 } 906 /* Override some values set by hardware configuration. */ 907 mlx5_args(config, dpdk_dev->devargs); 908 err = mlx5_dev_check_sibling_config(priv, config); 909 if (err) 910 goto error; 911 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 912 IBV_DEVICE_RAW_IP_CSUM); 913 DRV_LOG(DEBUG, "checksum offloading is %ssupported", 914 (config->hw_csum ? "" : "not ")); 915 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 916 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 917 DRV_LOG(DEBUG, "counters are not supported"); 918 #endif 919 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 920 if (config->dv_flow_en) { 921 DRV_LOG(WARNING, "DV flow is not supported"); 922 config->dv_flow_en = 0; 923 } 924 #endif 925 config->ind_table_max_size = 926 sh->device_attr.max_rwq_indirection_table_size; 927 /* 928 * Remove this check once DPDK supports larger/variable 929 * indirection tables. 930 */ 931 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 932 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; 933 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 934 config->ind_table_max_size); 935 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 936 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 937 DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 938 (config->hw_vlan_strip ? "" : "not ")); 939 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 940 IBV_RAW_PACKET_CAP_SCATTER_FCS); 941 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 942 hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 943 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 944 hw_padding = !!(sh->device_attr.device_cap_flags_ex & 945 IBV_DEVICE_PCI_WRITE_END_PADDING); 946 #endif 947 if (config->hw_padding && !hw_padding) { 948 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 949 config->hw_padding = 0; 950 } else if (config->hw_padding) { 951 DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 952 } 953 config->tso = (sh->device_attr.max_tso > 0 && 954 (sh->device_attr.tso_supported_qpts & 955 (1 << IBV_QPT_RAW_PACKET))); 956 if (config->tso) 957 config->tso_max_payload_sz = sh->device_attr.max_tso; 958 /* 959 * MPW is disabled by default, while the Enhanced MPW is enabled 960 * by default. 961 */ 962 if (config->mps == MLX5_ARG_UNSET) 963 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 964 MLX5_MPW_DISABLED; 965 else 966 config->mps = config->mps ? mps : MLX5_MPW_DISABLED; 967 DRV_LOG(INFO, "%sMPS is %s", 968 config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 969 config->mps == MLX5_MPW ? "legacy " : "", 970 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 971 if (config->cqe_comp && !cqe_comp) { 972 DRV_LOG(WARNING, "Rx CQE compression isn't supported"); 973 config->cqe_comp = 0; 974 } 975 if (config->cqe_pad && !cqe_pad) { 976 DRV_LOG(WARNING, "Rx CQE padding isn't supported"); 977 config->cqe_pad = 0; 978 } else if (config->cqe_pad) { 979 DRV_LOG(INFO, "Rx CQE padding is enabled"); 980 } 981 if (config->devx) { 982 priv->counter_fallback = 0; 983 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); 984 if (err) { 985 err = -err; 986 goto error; 987 } 988 if (!config->hca_attr.flow_counters_dump) 989 priv->counter_fallback = 1; 990 #ifndef HAVE_IBV_DEVX_ASYNC 991 priv->counter_fallback = 1; 992 #endif 993 if (priv->counter_fallback) 994 DRV_LOG(INFO, "Use fall-back DV counter management"); 995 /* Check for LRO support. */ 996 if (config->dest_tir && config->hca_attr.lro_cap && 997 config->dv_flow_en) { 998 /* TBD check tunnel lro caps. */ 999 config->lro.supported = config->hca_attr.lro_cap; 1000 DRV_LOG(DEBUG, "Device supports LRO"); 1001 /* 1002 * If LRO timeout is not configured by application, 1003 * use the minimal supported value. 1004 */ 1005 if (!config->lro.timeout) 1006 config->lro.timeout = 1007 config->hca_attr.lro_timer_supported_periods[0]; 1008 DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 1009 config->lro.timeout); 1010 } 1011 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) 1012 if (config->hca_attr.qos.sup && 1013 config->hca_attr.qos.srtcm_sup && 1014 config->dv_flow_en) { 1015 uint8_t reg_c_mask = 1016 config->hca_attr.qos.flow_meter_reg_c_ids; 1017 /* 1018 * Meter needs two REG_C's for color match and pre-sfx 1019 * flow match. Here get the REG_C for color match. 1020 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1021 */ 1022 reg_c_mask &= 0xfc; 1023 if (__builtin_popcount(reg_c_mask) < 1) { 1024 priv->mtr_en = 0; 1025 DRV_LOG(WARNING, "No available register for" 1026 " meter."); 1027 } else { 1028 priv->mtr_color_reg = ffs(reg_c_mask) - 1 + 1029 REG_C_0; 1030 priv->mtr_en = 1; 1031 priv->mtr_reg_share = 1032 config->hca_attr.qos.flow_meter_reg_share; 1033 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1034 priv->mtr_color_reg); 1035 } 1036 } 1037 #endif 1038 } 1039 if (config->tx_pp) { 1040 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 1041 config->hca_attr.dev_freq_khz); 1042 DRV_LOG(DEBUG, "Packet pacing is %ssupported", 1043 config->hca_attr.qos.packet_pacing ? "" : "not "); 1044 DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 1045 config->hca_attr.cross_channel ? "" : "not "); 1046 DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 1047 config->hca_attr.wqe_index_ignore ? "" : "not "); 1048 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 1049 config->hca_attr.non_wire_sq ? "" : "not "); 1050 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 1051 config->hca_attr.log_max_static_sq_wq ? "" : "not ", 1052 config->hca_attr.log_max_static_sq_wq); 1053 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 1054 config->hca_attr.qos.wqe_rate_pp ? "" : "not "); 1055 if (!config->devx) { 1056 DRV_LOG(ERR, "DevX is required for packet pacing"); 1057 err = ENODEV; 1058 goto error; 1059 } 1060 if (!config->hca_attr.qos.packet_pacing) { 1061 DRV_LOG(ERR, "Packet pacing is not supported"); 1062 err = ENODEV; 1063 goto error; 1064 } 1065 if (!config->hca_attr.cross_channel) { 1066 DRV_LOG(ERR, "Cross channel operations are" 1067 " required for packet pacing"); 1068 err = ENODEV; 1069 goto error; 1070 } 1071 if (!config->hca_attr.wqe_index_ignore) { 1072 DRV_LOG(ERR, "WQE index ignore feature is" 1073 " required for packet pacing"); 1074 err = ENODEV; 1075 goto error; 1076 } 1077 if (!config->hca_attr.non_wire_sq) { 1078 DRV_LOG(ERR, "Non-wire SQ feature is" 1079 " required for packet pacing"); 1080 err = ENODEV; 1081 goto error; 1082 } 1083 if (!config->hca_attr.log_max_static_sq_wq) { 1084 DRV_LOG(ERR, "Static WQE SQ feature is" 1085 " required for packet pacing"); 1086 err = ENODEV; 1087 goto error; 1088 } 1089 if (!config->hca_attr.qos.wqe_rate_pp) { 1090 DRV_LOG(ERR, "WQE rate mode is required" 1091 " for packet pacing"); 1092 err = ENODEV; 1093 goto error; 1094 } 1095 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 1096 DRV_LOG(ERR, "DevX does not provide UAR offset," 1097 " can't create queues for packet pacing"); 1098 err = ENODEV; 1099 goto error; 1100 #endif 1101 } 1102 if (config->devx) { 1103 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 1104 1105 err = config->hca_attr.access_register_user ? 1106 mlx5_devx_cmd_register_read 1107 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 1108 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; 1109 if (!err) { 1110 uint32_t ts_mode; 1111 1112 /* MTUTC register is read successfully. */ 1113 ts_mode = MLX5_GET(register_mtutc, reg, 1114 time_stamp_mode); 1115 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 1116 config->rt_timestamp = 1; 1117 } else { 1118 /* Kernel does not support register reading. */ 1119 if (config->hca_attr.dev_freq_khz == 1120 (NS_PER_S / MS_PER_S)) 1121 config->rt_timestamp = 1; 1122 } 1123 } 1124 /* 1125 * If HW has bug working with tunnel packet decapsulation and 1126 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 1127 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 1128 */ 1129 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en) 1130 config->hw_fcs_strip = 0; 1131 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 1132 (config->hw_fcs_strip ? "" : "not ")); 1133 if (config->mprq.enabled && mprq) { 1134 if (config->mprq.stride_num_n && 1135 (config->mprq.stride_num_n > mprq_max_stride_num_n || 1136 config->mprq.stride_num_n < mprq_min_stride_num_n)) { 1137 config->mprq.stride_num_n = 1138 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, 1139 mprq_min_stride_num_n), 1140 mprq_max_stride_num_n); 1141 DRV_LOG(WARNING, 1142 "the number of strides" 1143 " for Multi-Packet RQ is out of range," 1144 " setting default value (%u)", 1145 1 << config->mprq.stride_num_n); 1146 } 1147 if (config->mprq.stride_size_n && 1148 (config->mprq.stride_size_n > mprq_max_stride_size_n || 1149 config->mprq.stride_size_n < mprq_min_stride_size_n)) { 1150 config->mprq.stride_size_n = 1151 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, 1152 mprq_min_stride_size_n), 1153 mprq_max_stride_size_n); 1154 DRV_LOG(WARNING, 1155 "the size of a stride" 1156 " for Multi-Packet RQ is out of range," 1157 " setting default value (%u)", 1158 1 << config->mprq.stride_size_n); 1159 } 1160 config->mprq.min_stride_size_n = mprq_min_stride_size_n; 1161 config->mprq.max_stride_size_n = mprq_max_stride_size_n; 1162 } else if (config->mprq.enabled && !mprq) { 1163 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 1164 config->mprq.enabled = 0; 1165 } 1166 if (config->max_dump_files_num == 0) 1167 config->max_dump_files_num = 128; 1168 eth_dev = rte_eth_dev_allocate(name); 1169 if (eth_dev == NULL) { 1170 DRV_LOG(ERR, "can not allocate rte ethdev"); 1171 err = ENOMEM; 1172 goto error; 1173 } 1174 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */ 1175 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; 1176 if (priv->representor) { 1177 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1178 eth_dev->data->representor_id = priv->representor_id; 1179 } 1180 /* 1181 * Store associated network device interface index. This index 1182 * is permanent throughout the lifetime of device. So, we may store 1183 * the ifindex here and use the cached value further. 1184 */ 1185 MLX5_ASSERT(spawn->ifindex); 1186 priv->if_index = spawn->ifindex; 1187 if (priv->pf_bond >= 0 && priv->master) { 1188 /* Get bond interface info */ 1189 err = mlx5_sysfs_bond_info(priv->if_index, 1190 &priv->bond_ifindex, 1191 priv->bond_name); 1192 if (err) 1193 DRV_LOG(ERR, "unable to get bond info: %s", 1194 strerror(rte_errno)); 1195 else 1196 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1197 priv->if_index, priv->bond_ifindex, 1198 priv->bond_name); 1199 } 1200 eth_dev->data->dev_private = priv; 1201 priv->dev_data = eth_dev->data; 1202 eth_dev->data->mac_addrs = priv->mac; 1203 eth_dev->device = dpdk_dev; 1204 /* Configure the first MAC address by default. */ 1205 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1206 DRV_LOG(ERR, 1207 "port %u cannot get MAC address, is mlx5_en" 1208 " loaded? (errno: %s)", 1209 eth_dev->data->port_id, strerror(rte_errno)); 1210 err = ENODEV; 1211 goto error; 1212 } 1213 DRV_LOG(INFO, 1214 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 1215 eth_dev->data->port_id, 1216 mac.addr_bytes[0], mac.addr_bytes[1], 1217 mac.addr_bytes[2], mac.addr_bytes[3], 1218 mac.addr_bytes[4], mac.addr_bytes[5]); 1219 #ifdef RTE_LIBRTE_MLX5_DEBUG 1220 { 1221 char ifname[IF_NAMESIZE]; 1222 1223 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1224 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1225 eth_dev->data->port_id, ifname); 1226 else 1227 DRV_LOG(DEBUG, "port %u ifname is unknown", 1228 eth_dev->data->port_id); 1229 } 1230 #endif 1231 /* Get actual MTU if possible. */ 1232 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1233 if (err) { 1234 err = rte_errno; 1235 goto error; 1236 } 1237 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1238 priv->mtu); 1239 /* Initialize burst functions to prevent crashes before link-up. */ 1240 eth_dev->rx_pkt_burst = removed_rx_burst; 1241 eth_dev->tx_pkt_burst = removed_tx_burst; 1242 eth_dev->dev_ops = &mlx5_os_dev_ops; 1243 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1244 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1245 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1246 /* Register MAC address. */ 1247 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1248 if (config->vf && config->vf_nl_en) 1249 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1250 mlx5_ifindex(eth_dev), 1251 eth_dev->data->mac_addrs, 1252 MLX5_MAX_MAC_ADDRESSES); 1253 priv->flows = 0; 1254 priv->ctrl_flows = 0; 1255 TAILQ_INIT(&priv->flow_meters); 1256 TAILQ_INIT(&priv->flow_meter_profiles); 1257 /* Hint libmlx5 to use PMD allocator for data plane resources */ 1258 mlx5_glue->dv_set_context_attr(sh->ctx, 1259 MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 1260 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 1261 .alloc = &mlx5_alloc_verbs_buf, 1262 .free = &mlx5_free_verbs_buf, 1263 .data = priv, 1264 })); 1265 /* Bring Ethernet device up. */ 1266 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1267 eth_dev->data->port_id); 1268 mlx5_set_link_up(eth_dev); 1269 /* 1270 * Even though the interrupt handler is not installed yet, 1271 * interrupts will still trigger on the async_fd from 1272 * Verbs context returned by ibv_open_device(). 1273 */ 1274 mlx5_link_update(eth_dev, 0); 1275 #ifdef HAVE_MLX5DV_DR_ESWITCH 1276 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && 1277 (switch_info->representor || switch_info->master))) 1278 config->dv_esw_en = 0; 1279 #else 1280 config->dv_esw_en = 0; 1281 #endif 1282 /* Detect minimal data bytes to inline. */ 1283 mlx5_set_min_inline(spawn, config); 1284 /* Store device configuration on private structure. */ 1285 priv->config = *config; 1286 /* Create context for virtual machine VLAN workaround. */ 1287 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1288 if (config->dv_flow_en) { 1289 err = mlx5_alloc_shared_dr(priv); 1290 if (err) 1291 goto error; 1292 /* 1293 * RSS id is shared with meter flow id. Meter flow id can only 1294 * use the 24 MSB of the register. 1295 */ 1296 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >> 1297 MLX5_MTR_COLOR_BITS); 1298 if (!priv->qrss_id_pool) { 1299 DRV_LOG(ERR, "can't create flow id pool"); 1300 err = ENOMEM; 1301 goto error; 1302 } 1303 } 1304 if (config->devx && config->dv_flow_en && config->dest_tir) { 1305 priv->obj_ops = devx_obj_ops; 1306 priv->obj_ops.drop_action_create = 1307 ibv_obj_ops.drop_action_create; 1308 priv->obj_ops.drop_action_destroy = 1309 ibv_obj_ops.drop_action_destroy; 1310 } else { 1311 priv->obj_ops = ibv_obj_ops; 1312 } 1313 /* Supported Verbs flow priority number detection. */ 1314 err = mlx5_flow_discover_priorities(eth_dev); 1315 if (err < 0) { 1316 err = -err; 1317 goto error; 1318 } 1319 priv->config.flow_prio = err; 1320 if (!priv->config.dv_esw_en && 1321 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1322 DRV_LOG(WARNING, "metadata mode %u is not supported " 1323 "(no E-Switch)", priv->config.dv_xmeta_en); 1324 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 1325 } 1326 mlx5_set_metadata_mask(eth_dev); 1327 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1328 !priv->sh->dv_regc0_mask) { 1329 DRV_LOG(ERR, "metadata mode %u is not supported " 1330 "(no metadata reg_c[0] is available)", 1331 priv->config.dv_xmeta_en); 1332 err = ENOTSUP; 1333 goto error; 1334 } 1335 /* 1336 * Allocate the buffer for flow creating, just once. 1337 * The allocation must be done before any flow creating. 1338 */ 1339 mlx5_flow_alloc_intermediate(eth_dev); 1340 /* Query availability of metadata reg_c's. */ 1341 err = mlx5_flow_discover_mreg_c(eth_dev); 1342 if (err < 0) { 1343 err = -err; 1344 goto error; 1345 } 1346 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1347 DRV_LOG(DEBUG, 1348 "port %u extensive metadata register is not supported", 1349 eth_dev->data->port_id); 1350 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1351 DRV_LOG(ERR, "metadata mode %u is not supported " 1352 "(no metadata registers available)", 1353 priv->config.dv_xmeta_en); 1354 err = ENOTSUP; 1355 goto error; 1356 } 1357 } 1358 if (priv->config.dv_flow_en && 1359 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1360 mlx5_flow_ext_mreg_supported(eth_dev) && 1361 priv->sh->dv_regc0_mask) { 1362 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1363 MLX5_FLOW_MREG_HTABLE_SZ); 1364 if (!priv->mreg_cp_tbl) { 1365 err = ENOMEM; 1366 goto error; 1367 } 1368 } 1369 return eth_dev; 1370 error: 1371 if (priv) { 1372 if (priv->mreg_cp_tbl) 1373 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL); 1374 if (priv->sh) 1375 mlx5_os_free_shared_dr(priv); 1376 if (priv->nl_socket_route >= 0) 1377 close(priv->nl_socket_route); 1378 if (priv->nl_socket_rdma >= 0) 1379 close(priv->nl_socket_rdma); 1380 if (priv->vmwa_context) 1381 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1382 if (priv->qrss_id_pool) 1383 mlx5_flow_id_pool_release(priv->qrss_id_pool); 1384 if (own_domain_id) 1385 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1386 mlx5_free(priv); 1387 if (eth_dev != NULL) 1388 eth_dev->data->dev_private = NULL; 1389 } 1390 if (eth_dev != NULL) { 1391 /* mac_addrs must not be freed alone because part of 1392 * dev_private 1393 **/ 1394 eth_dev->data->mac_addrs = NULL; 1395 rte_eth_dev_release_port(eth_dev); 1396 } 1397 if (sh) 1398 mlx5_free_shared_dev_ctx(sh); 1399 MLX5_ASSERT(err > 0); 1400 rte_errno = err; 1401 return NULL; 1402 } 1403 1404 /** 1405 * Comparison callback to sort device data. 1406 * 1407 * This is meant to be used with qsort(). 1408 * 1409 * @param a[in] 1410 * Pointer to pointer to first data object. 1411 * @param b[in] 1412 * Pointer to pointer to second data object. 1413 * 1414 * @return 1415 * 0 if both objects are equal, less than 0 if the first argument is less 1416 * than the second, greater than 0 otherwise. 1417 */ 1418 static int 1419 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1420 { 1421 const struct mlx5_switch_info *si_a = 1422 &((const struct mlx5_dev_spawn_data *)a)->info; 1423 const struct mlx5_switch_info *si_b = 1424 &((const struct mlx5_dev_spawn_data *)b)->info; 1425 int ret; 1426 1427 /* Master device first. */ 1428 ret = si_b->master - si_a->master; 1429 if (ret) 1430 return ret; 1431 /* Then representor devices. */ 1432 ret = si_b->representor - si_a->representor; 1433 if (ret) 1434 return ret; 1435 /* Unidentified devices come last in no specific order. */ 1436 if (!si_a->representor) 1437 return 0; 1438 /* Order representors by name. */ 1439 return si_a->port_name - si_b->port_name; 1440 } 1441 1442 /** 1443 * Match PCI information for possible slaves of bonding device. 1444 * 1445 * @param[in] ibv_dev 1446 * Pointer to Infiniband device structure. 1447 * @param[in] pci_dev 1448 * Pointer to PCI device structure to match PCI address. 1449 * @param[in] nl_rdma 1450 * Netlink RDMA group socket handle. 1451 * 1452 * @return 1453 * negative value if no bonding device found, otherwise 1454 * positive index of slave PF in bonding. 1455 */ 1456 static int 1457 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, 1458 const struct rte_pci_device *pci_dev, 1459 int nl_rdma) 1460 { 1461 char ifname[IF_NAMESIZE + 1]; 1462 unsigned int ifindex; 1463 unsigned int np, i; 1464 FILE *file = NULL; 1465 int pf = -1; 1466 1467 /* 1468 * Try to get master device name. If something goes 1469 * wrong suppose the lack of kernel support and no 1470 * bonding devices. 1471 */ 1472 if (nl_rdma < 0) 1473 return -1; 1474 if (!strstr(ibv_dev->name, "bond")) 1475 return -1; 1476 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); 1477 if (!np) 1478 return -1; 1479 /* 1480 * The Master device might not be on the predefined 1481 * port (not on port index 1, it is not garanted), 1482 * we have to scan all Infiniband device port and 1483 * find master. 1484 */ 1485 for (i = 1; i <= np; ++i) { 1486 /* Check whether Infiniband port is populated. */ 1487 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); 1488 if (!ifindex) 1489 continue; 1490 if (!if_indextoname(ifindex, ifname)) 1491 continue; 1492 /* Try to read bonding slave names from sysfs. */ 1493 MKSTR(slaves, 1494 "/sys/class/net/%s/master/bonding/slaves", ifname); 1495 file = fopen(slaves, "r"); 1496 if (file) 1497 break; 1498 } 1499 if (!file) 1500 return -1; 1501 /* Use safe format to check maximal buffer length. */ 1502 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1503 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1504 char tmp_str[IF_NAMESIZE + 32]; 1505 struct rte_pci_addr pci_addr; 1506 struct mlx5_switch_info info; 1507 1508 /* Process slave interface names in the loop. */ 1509 snprintf(tmp_str, sizeof(tmp_str), 1510 "/sys/class/net/%s", ifname); 1511 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { 1512 DRV_LOG(WARNING, "can not get PCI address" 1513 " for netdev \"%s\"", ifname); 1514 continue; 1515 } 1516 if (pci_dev->addr.domain != pci_addr.domain || 1517 pci_dev->addr.bus != pci_addr.bus || 1518 pci_dev->addr.devid != pci_addr.devid || 1519 pci_dev->addr.function != pci_addr.function) 1520 continue; 1521 /* Slave interface PCI address match found. */ 1522 fclose(file); 1523 snprintf(tmp_str, sizeof(tmp_str), 1524 "/sys/class/net/%s/phys_port_name", ifname); 1525 file = fopen(tmp_str, "rb"); 1526 if (!file) 1527 break; 1528 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1529 if (fscanf(file, "%32s", tmp_str) == 1) 1530 mlx5_translate_port_name(tmp_str, &info); 1531 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || 1532 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1533 pf = info.port_name; 1534 break; 1535 } 1536 if (file) 1537 fclose(file); 1538 return pf; 1539 } 1540 1541 /** 1542 * DPDK callback to register a PCI device. 1543 * 1544 * This function spawns Ethernet devices out of a given PCI device. 1545 * 1546 * @param[in] pci_drv 1547 * PCI driver structure (mlx5_driver). 1548 * @param[in] pci_dev 1549 * PCI device information. 1550 * 1551 * @return 1552 * 0 on success, a negative errno value otherwise and rte_errno is set. 1553 */ 1554 int 1555 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1556 struct rte_pci_device *pci_dev) 1557 { 1558 struct ibv_device **ibv_list; 1559 /* 1560 * Number of found IB Devices matching with requested PCI BDF. 1561 * nd != 1 means there are multiple IB devices over the same 1562 * PCI device and we have representors and master. 1563 */ 1564 unsigned int nd = 0; 1565 /* 1566 * Number of found IB device Ports. nd = 1 and np = 1..n means 1567 * we have the single multiport IB device, and there may be 1568 * representors attached to some of found ports. 1569 */ 1570 unsigned int np = 0; 1571 /* 1572 * Number of DPDK ethernet devices to Spawn - either over 1573 * multiple IB devices or multiple ports of single IB device. 1574 * Actually this is the number of iterations to spawn. 1575 */ 1576 unsigned int ns = 0; 1577 /* 1578 * Bonding device 1579 * < 0 - no bonding device (single one) 1580 * >= 0 - bonding device (value is slave PF index) 1581 */ 1582 int bd = -1; 1583 struct mlx5_dev_spawn_data *list = NULL; 1584 struct mlx5_dev_config dev_config; 1585 unsigned int dev_config_vf; 1586 int ret; 1587 1588 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1589 mlx5_pmd_socket_init(); 1590 ret = mlx5_init_once(); 1591 if (ret) { 1592 DRV_LOG(ERR, "unable to init PMD global data: %s", 1593 strerror(rte_errno)); 1594 return -rte_errno; 1595 } 1596 errno = 0; 1597 ibv_list = mlx5_glue->get_device_list(&ret); 1598 if (!ibv_list) { 1599 rte_errno = errno ? errno : ENOSYS; 1600 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 1601 return -rte_errno; 1602 } 1603 /* 1604 * First scan the list of all Infiniband devices to find 1605 * matching ones, gathering into the list. 1606 */ 1607 struct ibv_device *ibv_match[ret + 1]; 1608 int nl_route = mlx5_nl_init(NETLINK_ROUTE); 1609 int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 1610 unsigned int i; 1611 1612 while (ret-- > 0) { 1613 struct rte_pci_addr pci_addr; 1614 1615 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); 1616 bd = mlx5_device_bond_pci_match 1617 (ibv_list[ret], pci_dev, nl_rdma); 1618 if (bd >= 0) { 1619 /* 1620 * Bonding device detected. Only one match is allowed, 1621 * the bonding is supported over multi-port IB device, 1622 * there should be no matches on representor PCI 1623 * functions or non VF LAG bonding devices with 1624 * specified address. 1625 */ 1626 if (nd) { 1627 DRV_LOG(ERR, 1628 "multiple PCI match on bonding device" 1629 "\"%s\" found", ibv_list[ret]->name); 1630 rte_errno = ENOENT; 1631 ret = -rte_errno; 1632 goto exit; 1633 } 1634 DRV_LOG(INFO, "PCI information matches for" 1635 " slave %d bonding device \"%s\"", 1636 bd, ibv_list[ret]->name); 1637 ibv_match[nd++] = ibv_list[ret]; 1638 break; 1639 } 1640 if (mlx5_dev_to_pci_addr 1641 (ibv_list[ret]->ibdev_path, &pci_addr)) 1642 continue; 1643 if (pci_dev->addr.domain != pci_addr.domain || 1644 pci_dev->addr.bus != pci_addr.bus || 1645 pci_dev->addr.devid != pci_addr.devid || 1646 pci_dev->addr.function != pci_addr.function) 1647 continue; 1648 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 1649 ibv_list[ret]->name); 1650 ibv_match[nd++] = ibv_list[ret]; 1651 } 1652 ibv_match[nd] = NULL; 1653 if (!nd) { 1654 /* No device matches, just complain and bail out. */ 1655 DRV_LOG(WARNING, 1656 "no Verbs device matches PCI device " PCI_PRI_FMT "," 1657 " are kernel drivers loaded?", 1658 pci_dev->addr.domain, pci_dev->addr.bus, 1659 pci_dev->addr.devid, pci_dev->addr.function); 1660 rte_errno = ENOENT; 1661 ret = -rte_errno; 1662 goto exit; 1663 } 1664 if (nd == 1) { 1665 /* 1666 * Found single matching device may have multiple ports. 1667 * Each port may be representor, we have to check the port 1668 * number and check the representors existence. 1669 */ 1670 if (nl_rdma >= 0) 1671 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 1672 if (!np) 1673 DRV_LOG(WARNING, "can not get IB device \"%s\"" 1674 " ports number", ibv_match[0]->name); 1675 if (bd >= 0 && !np) { 1676 DRV_LOG(ERR, "can not get ports" 1677 " for bonding device"); 1678 rte_errno = ENOENT; 1679 ret = -rte_errno; 1680 goto exit; 1681 } 1682 } 1683 #ifndef HAVE_MLX5DV_DR_DEVX_PORT 1684 if (bd >= 0) { 1685 /* 1686 * This may happen if there is VF LAG kernel support and 1687 * application is compiled with older rdma_core library. 1688 */ 1689 DRV_LOG(ERR, 1690 "No kernel/verbs support for VF LAG bonding found."); 1691 rte_errno = ENOTSUP; 1692 ret = -rte_errno; 1693 goto exit; 1694 } 1695 #endif 1696 /* 1697 * Now we can determine the maximal 1698 * amount of devices to be spawned. 1699 */ 1700 list = mlx5_malloc(MLX5_MEM_ZERO, 1701 sizeof(struct mlx5_dev_spawn_data) * 1702 (np ? np : nd), 1703 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1704 if (!list) { 1705 DRV_LOG(ERR, "spawn data array allocation failure"); 1706 rte_errno = ENOMEM; 1707 ret = -rte_errno; 1708 goto exit; 1709 } 1710 if (bd >= 0 || np > 1) { 1711 /* 1712 * Single IB device with multiple ports found, 1713 * it may be E-Switch master device and representors. 1714 * We have to perform identification through the ports. 1715 */ 1716 MLX5_ASSERT(nl_rdma >= 0); 1717 MLX5_ASSERT(ns == 0); 1718 MLX5_ASSERT(nd == 1); 1719 MLX5_ASSERT(np); 1720 for (i = 1; i <= np; ++i) { 1721 list[ns].max_port = np; 1722 list[ns].phys_port = i; 1723 list[ns].phys_dev = ibv_match[0]; 1724 list[ns].eth_dev = NULL; 1725 list[ns].pci_dev = pci_dev; 1726 list[ns].pf_bond = bd; 1727 list[ns].ifindex = mlx5_nl_ifindex 1728 (nl_rdma, 1729 mlx5_os_get_dev_device_name 1730 (list[ns].phys_dev), i); 1731 if (!list[ns].ifindex) { 1732 /* 1733 * No network interface index found for the 1734 * specified port, it means there is no 1735 * representor on this port. It's OK, 1736 * there can be disabled ports, for example 1737 * if sriov_numvfs < sriov_totalvfs. 1738 */ 1739 continue; 1740 } 1741 ret = -1; 1742 if (nl_route >= 0) 1743 ret = mlx5_nl_switch_info 1744 (nl_route, 1745 list[ns].ifindex, 1746 &list[ns].info); 1747 if (ret || (!list[ns].info.representor && 1748 !list[ns].info.master)) { 1749 /* 1750 * We failed to recognize representors with 1751 * Netlink, let's try to perform the task 1752 * with sysfs. 1753 */ 1754 ret = mlx5_sysfs_switch_info 1755 (list[ns].ifindex, 1756 &list[ns].info); 1757 } 1758 if (!ret && bd >= 0) { 1759 switch (list[ns].info.name_type) { 1760 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 1761 if (list[ns].info.port_name == bd) 1762 ns++; 1763 break; 1764 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1765 /* Fallthrough */ 1766 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 1767 if (list[ns].info.pf_num == bd) 1768 ns++; 1769 break; 1770 default: 1771 break; 1772 } 1773 continue; 1774 } 1775 if (!ret && (list[ns].info.representor ^ 1776 list[ns].info.master)) 1777 ns++; 1778 } 1779 if (!ns) { 1780 DRV_LOG(ERR, 1781 "unable to recognize master/representors" 1782 " on the IB device with multiple ports"); 1783 rte_errno = ENOENT; 1784 ret = -rte_errno; 1785 goto exit; 1786 } 1787 } else { 1788 /* 1789 * The existence of several matching entries (nd > 1) means 1790 * port representors have been instantiated. No existing Verbs 1791 * call nor sysfs entries can tell them apart, this can only 1792 * be done through Netlink calls assuming kernel drivers are 1793 * recent enough to support them. 1794 * 1795 * In the event of identification failure through Netlink, 1796 * try again through sysfs, then: 1797 * 1798 * 1. A single IB device matches (nd == 1) with single 1799 * port (np=0/1) and is not a representor, assume 1800 * no switch support. 1801 * 1802 * 2. Otherwise no safe assumptions can be made; 1803 * complain louder and bail out. 1804 */ 1805 for (i = 0; i != nd; ++i) { 1806 memset(&list[ns].info, 0, sizeof(list[ns].info)); 1807 list[ns].max_port = 1; 1808 list[ns].phys_port = 1; 1809 list[ns].phys_dev = ibv_match[i]; 1810 list[ns].eth_dev = NULL; 1811 list[ns].pci_dev = pci_dev; 1812 list[ns].pf_bond = -1; 1813 list[ns].ifindex = 0; 1814 if (nl_rdma >= 0) 1815 list[ns].ifindex = mlx5_nl_ifindex 1816 (nl_rdma, 1817 mlx5_os_get_dev_device_name 1818 (list[ns].phys_dev), 1); 1819 if (!list[ns].ifindex) { 1820 char ifname[IF_NAMESIZE]; 1821 1822 /* 1823 * Netlink failed, it may happen with old 1824 * ib_core kernel driver (before 4.16). 1825 * We can assume there is old driver because 1826 * here we are processing single ports IB 1827 * devices. Let's try sysfs to retrieve 1828 * the ifindex. The method works for 1829 * master device only. 1830 */ 1831 if (nd > 1) { 1832 /* 1833 * Multiple devices found, assume 1834 * representors, can not distinguish 1835 * master/representor and retrieve 1836 * ifindex via sysfs. 1837 */ 1838 continue; 1839 } 1840 ret = mlx5_get_ifname_sysfs 1841 (ibv_match[i]->ibdev_path, ifname); 1842 if (!ret) 1843 list[ns].ifindex = 1844 if_nametoindex(ifname); 1845 if (!list[ns].ifindex) { 1846 /* 1847 * No network interface index found 1848 * for the specified device, it means 1849 * there it is neither representor 1850 * nor master. 1851 */ 1852 continue; 1853 } 1854 } 1855 ret = -1; 1856 if (nl_route >= 0) 1857 ret = mlx5_nl_switch_info 1858 (nl_route, 1859 list[ns].ifindex, 1860 &list[ns].info); 1861 if (ret || (!list[ns].info.representor && 1862 !list[ns].info.master)) { 1863 /* 1864 * We failed to recognize representors with 1865 * Netlink, let's try to perform the task 1866 * with sysfs. 1867 */ 1868 ret = mlx5_sysfs_switch_info 1869 (list[ns].ifindex, 1870 &list[ns].info); 1871 } 1872 if (!ret && (list[ns].info.representor ^ 1873 list[ns].info.master)) { 1874 ns++; 1875 } else if ((nd == 1) && 1876 !list[ns].info.representor && 1877 !list[ns].info.master) { 1878 /* 1879 * Single IB device with 1880 * one physical port and 1881 * attached network device. 1882 * May be SRIOV is not enabled 1883 * or there is no representors. 1884 */ 1885 DRV_LOG(INFO, "no E-Switch support detected"); 1886 ns++; 1887 break; 1888 } 1889 } 1890 if (!ns) { 1891 DRV_LOG(ERR, 1892 "unable to recognize master/representors" 1893 " on the multiple IB devices"); 1894 rte_errno = ENOENT; 1895 ret = -rte_errno; 1896 goto exit; 1897 } 1898 } 1899 MLX5_ASSERT(ns); 1900 /* 1901 * Sort list to probe devices in natural order for users convenience 1902 * (i.e. master first, then representors from lowest to highest ID). 1903 */ 1904 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 1905 /* Device specific configuration. */ 1906 switch (pci_dev->id.device_id) { 1907 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 1908 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 1909 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 1910 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 1911 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 1912 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 1913 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF: 1914 dev_config_vf = 1; 1915 break; 1916 default: 1917 dev_config_vf = 0; 1918 break; 1919 } 1920 for (i = 0; i != ns; ++i) { 1921 uint32_t restore; 1922 1923 /* Default configuration. */ 1924 memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); 1925 dev_config.vf = dev_config_vf; 1926 dev_config.mps = MLX5_ARG_UNSET; 1927 dev_config.dbnc = MLX5_ARG_UNSET; 1928 dev_config.rx_vec_en = 1; 1929 dev_config.txq_inline_max = MLX5_ARG_UNSET; 1930 dev_config.txq_inline_min = MLX5_ARG_UNSET; 1931 dev_config.txq_inline_mpw = MLX5_ARG_UNSET; 1932 dev_config.txqs_inline = MLX5_ARG_UNSET; 1933 dev_config.vf_nl_en = 1; 1934 dev_config.mr_ext_memseg_en = 1; 1935 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 1936 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 1937 dev_config.dv_esw_en = 1; 1938 dev_config.dv_flow_en = 1; 1939 dev_config.decap_en = 1; 1940 dev_config.log_hp_size = MLX5_ARG_UNSET; 1941 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, 1942 &list[i], 1943 &dev_config); 1944 if (!list[i].eth_dev) { 1945 if (rte_errno != EBUSY && rte_errno != EEXIST) 1946 break; 1947 /* Device is disabled or already spawned. Ignore it. */ 1948 continue; 1949 } 1950 restore = list[i].eth_dev->data->dev_flags; 1951 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 1952 /* Restore non-PCI flags cleared by the above call. */ 1953 list[i].eth_dev->data->dev_flags |= restore; 1954 rte_eth_dev_probing_finish(list[i].eth_dev); 1955 } 1956 if (i != ns) { 1957 DRV_LOG(ERR, 1958 "probe of PCI device " PCI_PRI_FMT " aborted after" 1959 " encountering an error: %s", 1960 pci_dev->addr.domain, pci_dev->addr.bus, 1961 pci_dev->addr.devid, pci_dev->addr.function, 1962 strerror(rte_errno)); 1963 ret = -rte_errno; 1964 /* Roll back. */ 1965 while (i--) { 1966 if (!list[i].eth_dev) 1967 continue; 1968 mlx5_dev_close(list[i].eth_dev); 1969 /* mac_addrs must not be freed because in dev_private */ 1970 list[i].eth_dev->data->mac_addrs = NULL; 1971 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 1972 } 1973 /* Restore original error. */ 1974 rte_errno = -ret; 1975 } else { 1976 ret = 0; 1977 } 1978 exit: 1979 /* 1980 * Do the routine cleanup: 1981 * - close opened Netlink sockets 1982 * - free allocated spawn data array 1983 * - free the Infiniband device list 1984 */ 1985 if (nl_rdma >= 0) 1986 close(nl_rdma); 1987 if (nl_route >= 0) 1988 close(nl_route); 1989 if (list) 1990 mlx5_free(list); 1991 MLX5_ASSERT(ibv_list); 1992 mlx5_glue->free_device_list(ibv_list); 1993 return ret; 1994 } 1995 1996 static int 1997 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) 1998 { 1999 char *env; 2000 int value; 2001 2002 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2003 /* Get environment variable to store. */ 2004 env = getenv(MLX5_SHUT_UP_BF); 2005 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; 2006 if (config->dbnc == MLX5_ARG_UNSET) 2007 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); 2008 else 2009 setenv(MLX5_SHUT_UP_BF, 2010 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); 2011 return value; 2012 } 2013 2014 static void 2015 mlx5_restore_doorbell_mapping_env(int value) 2016 { 2017 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2018 /* Restore the original environment variable state. */ 2019 if (value == MLX5_ARG_UNSET) 2020 unsetenv(MLX5_SHUT_UP_BF); 2021 else 2022 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); 2023 } 2024 2025 /** 2026 * Extract pdn of PD object using DV API. 2027 * 2028 * @param[in] pd 2029 * Pointer to the verbs PD object. 2030 * @param[out] pdn 2031 * Pointer to the PD object number variable. 2032 * 2033 * @return 2034 * 0 on success, error value otherwise. 2035 */ 2036 int 2037 mlx5_os_get_pdn(void *pd, uint32_t *pdn) 2038 { 2039 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 2040 struct mlx5dv_obj obj; 2041 struct mlx5dv_pd pd_info; 2042 int ret = 0; 2043 2044 obj.pd.in = pd; 2045 obj.pd.out = &pd_info; 2046 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 2047 if (ret) { 2048 DRV_LOG(DEBUG, "Fail to get PD object info"); 2049 return ret; 2050 } 2051 *pdn = pd_info.pdn; 2052 return 0; 2053 #else 2054 (void)pd; 2055 (void)pdn; 2056 return -ENOTSUP; 2057 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 2058 } 2059 2060 /** 2061 * Function API to open IB device. 2062 * 2063 * This function calls the Linux glue APIs to open a device. 2064 * 2065 * @param[in] spawn 2066 * Pointer to the IB device attributes (name, port, etc). 2067 * @param[out] config 2068 * Pointer to device configuration structure. 2069 * @param[out] sh 2070 * Pointer to shared context structure. 2071 * 2072 * @return 2073 * 0 on success, a positive error value otherwise. 2074 */ 2075 int 2076 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 2077 const struct mlx5_dev_config *config, 2078 struct mlx5_dev_ctx_shared *sh) 2079 { 2080 int dbmap_env; 2081 int err = 0; 2082 2083 sh->numa_node = spawn->pci_dev->device.numa_node; 2084 pthread_mutex_init(&sh->txpp.mutex, NULL); 2085 /* 2086 * Configure environment variable "MLX5_BF_SHUT_UP" 2087 * before the device creation. The rdma_core library 2088 * checks the variable at device creation and 2089 * stores the result internally. 2090 */ 2091 dbmap_env = mlx5_config_doorbell_mapping_env(config); 2092 /* Try to open IB device with DV first, then usual Verbs. */ 2093 errno = 0; 2094 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); 2095 if (sh->ctx) { 2096 sh->devx = 1; 2097 DRV_LOG(DEBUG, "DevX is supported"); 2098 /* The device is created, no need for environment. */ 2099 mlx5_restore_doorbell_mapping_env(dbmap_env); 2100 } else { 2101 /* The environment variable is still configured. */ 2102 sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 2103 err = errno ? errno : ENODEV; 2104 /* 2105 * The environment variable is not needed anymore, 2106 * all device creation attempts are completed. 2107 */ 2108 mlx5_restore_doorbell_mapping_env(dbmap_env); 2109 if (!sh->ctx) 2110 return err; 2111 DRV_LOG(DEBUG, "DevX is NOT supported"); 2112 err = 0; 2113 } 2114 return err; 2115 } 2116 2117 /** 2118 * Install shared asynchronous device events handler. 2119 * This function is implemented to support event sharing 2120 * between multiple ports of single IB device. 2121 * 2122 * @param sh 2123 * Pointer to mlx5_dev_ctx_shared object. 2124 */ 2125 void 2126 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2127 { 2128 int ret; 2129 int flags; 2130 2131 sh->intr_handle.fd = -1; 2132 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); 2133 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, 2134 F_SETFL, flags | O_NONBLOCK); 2135 if (ret) { 2136 DRV_LOG(INFO, "failed to change file descriptor async event" 2137 " queue"); 2138 } else { 2139 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; 2140 sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 2141 if (rte_intr_callback_register(&sh->intr_handle, 2142 mlx5_dev_interrupt_handler, sh)) { 2143 DRV_LOG(INFO, "Fail to install the shared interrupt."); 2144 sh->intr_handle.fd = -1; 2145 } 2146 } 2147 if (sh->devx) { 2148 #ifdef HAVE_IBV_DEVX_ASYNC 2149 sh->intr_handle_devx.fd = -1; 2150 sh->devx_comp = 2151 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); 2152 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 2153 if (!devx_comp) { 2154 DRV_LOG(INFO, "failed to allocate devx_comp."); 2155 return; 2156 } 2157 flags = fcntl(devx_comp->fd, F_GETFL); 2158 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 2159 if (ret) { 2160 DRV_LOG(INFO, "failed to change file descriptor" 2161 " devx comp"); 2162 return; 2163 } 2164 sh->intr_handle_devx.fd = devx_comp->fd; 2165 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 2166 if (rte_intr_callback_register(&sh->intr_handle_devx, 2167 mlx5_dev_interrupt_handler_devx, sh)) { 2168 DRV_LOG(INFO, "Fail to install the devx shared" 2169 " interrupt."); 2170 sh->intr_handle_devx.fd = -1; 2171 } 2172 #endif /* HAVE_IBV_DEVX_ASYNC */ 2173 } 2174 } 2175 2176 /** 2177 * Uninstall shared asynchronous device events handler. 2178 * This function is implemented to support event sharing 2179 * between multiple ports of single IB device. 2180 * 2181 * @param dev 2182 * Pointer to mlx5_dev_ctx_shared object. 2183 */ 2184 void 2185 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2186 { 2187 if (sh->intr_handle.fd >= 0) 2188 mlx5_intr_callback_unregister(&sh->intr_handle, 2189 mlx5_dev_interrupt_handler, sh); 2190 #ifdef HAVE_IBV_DEVX_ASYNC 2191 if (sh->intr_handle_devx.fd >= 0) 2192 rte_intr_callback_unregister(&sh->intr_handle_devx, 2193 mlx5_dev_interrupt_handler_devx, sh); 2194 if (sh->devx_comp) 2195 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2196 #endif 2197 } 2198 2199 /** 2200 * Read statistics by a named counter. 2201 * 2202 * @param[in] priv 2203 * Pointer to the private device data structure. 2204 * @param[in] ctr_name 2205 * Pointer to the name of the statistic counter to read 2206 * @param[out] stat 2207 * Pointer to read statistic value. 2208 * @return 2209 * 0 on success and stat is valud, 1 if failed to read the value 2210 * rte_errno is set. 2211 * 2212 */ 2213 int 2214 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2215 uint64_t *stat) 2216 { 2217 int fd; 2218 2219 if (priv->sh) { 2220 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2221 priv->sh->ibdev_path, 2222 priv->dev_port, 2223 ctr_name); 2224 fd = open(path, O_RDONLY); 2225 /* 2226 * in switchdev the file location is not per port 2227 * but rather in <ibdev_path>/hw_counters/<file_name>. 2228 */ 2229 if (fd == -1) { 2230 MKSTR(path1, "%s/hw_counters/%s", 2231 priv->sh->ibdev_path, 2232 ctr_name); 2233 fd = open(path1, O_RDONLY); 2234 } 2235 if (fd != -1) { 2236 char buf[21] = {'\0'}; 2237 ssize_t n = read(fd, buf, sizeof(buf)); 2238 2239 close(fd); 2240 if (n != -1) { 2241 *stat = strtoull(buf, NULL, 10); 2242 return 0; 2243 } 2244 } 2245 } 2246 *stat = 0; 2247 return 1; 2248 } 2249 2250 /** 2251 * Set the reg_mr and dereg_mr call backs 2252 * 2253 * @param reg_mr_cb[out] 2254 * Pointer to reg_mr func 2255 * @param dereg_mr_cb[out] 2256 * Pointer to dereg_mr func 2257 * 2258 */ 2259 void 2260 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 2261 mlx5_dereg_mr_t *dereg_mr_cb) 2262 { 2263 *reg_mr_cb = mlx5_verbs_ops.reg_mr; 2264 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; 2265 } 2266 2267 /** 2268 * Remove a MAC address from device 2269 * 2270 * @param dev 2271 * Pointer to Ethernet device structure. 2272 * @param index 2273 * MAC address index. 2274 */ 2275 void 2276 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2277 { 2278 struct mlx5_priv *priv = dev->data->dev_private; 2279 const int vf = priv->config.vf; 2280 2281 if (vf) 2282 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2283 mlx5_ifindex(dev), priv->mac_own, 2284 &dev->data->mac_addrs[index], index); 2285 } 2286 2287 /** 2288 * Adds a MAC address to the device 2289 * 2290 * @param dev 2291 * Pointer to Ethernet device structure. 2292 * @param mac_addr 2293 * MAC address to register. 2294 * @param index 2295 * MAC address index. 2296 * 2297 * @return 2298 * 0 on success, a negative errno value otherwise 2299 */ 2300 int 2301 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2302 uint32_t index) 2303 { 2304 struct mlx5_priv *priv = dev->data->dev_private; 2305 const int vf = priv->config.vf; 2306 int ret = 0; 2307 2308 if (vf) 2309 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2310 mlx5_ifindex(dev), priv->mac_own, 2311 mac, index); 2312 return ret; 2313 } 2314 2315 /** 2316 * Modify a VF MAC address 2317 * 2318 * @param priv 2319 * Pointer to device private data. 2320 * @param mac_addr 2321 * MAC address to modify into. 2322 * @param iface_idx 2323 * Net device interface index 2324 * @param vf_index 2325 * VF index 2326 * 2327 * @return 2328 * 0 on success, a negative errno value otherwise 2329 */ 2330 int 2331 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2332 unsigned int iface_idx, 2333 struct rte_ether_addr *mac_addr, 2334 int vf_index) 2335 { 2336 return mlx5_nl_vf_mac_addr_modify 2337 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2338 } 2339 2340 /** 2341 * Set device promiscuous mode 2342 * 2343 * @param dev 2344 * Pointer to Ethernet device structure. 2345 * @param enable 2346 * 0 - promiscuous is disabled, otherwise - enabled 2347 * 2348 * @return 2349 * 0 on success, a negative error value otherwise 2350 */ 2351 int 2352 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2353 { 2354 struct mlx5_priv *priv = dev->data->dev_private; 2355 2356 return mlx5_nl_promisc(priv->nl_socket_route, 2357 mlx5_ifindex(dev), !!enable); 2358 } 2359 2360 /** 2361 * Set device promiscuous mode 2362 * 2363 * @param dev 2364 * Pointer to Ethernet device structure. 2365 * @param enable 2366 * 0 - all multicase is disabled, otherwise - enabled 2367 * 2368 * @return 2369 * 0 on success, a negative error value otherwise 2370 */ 2371 int 2372 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2373 { 2374 struct mlx5_priv *priv = dev->data->dev_private; 2375 2376 return mlx5_nl_allmulti(priv->nl_socket_route, 2377 mlx5_ifindex(dev), !!enable); 2378 } 2379 2380 /** 2381 * Flush device MAC addresses 2382 * 2383 * @param dev 2384 * Pointer to Ethernet device structure. 2385 * 2386 */ 2387 void 2388 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2389 { 2390 struct mlx5_priv *priv = dev->data->dev_private; 2391 2392 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2393 dev->data->mac_addrs, 2394 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2395 } 2396 2397 const struct eth_dev_ops mlx5_os_dev_ops = { 2398 .dev_configure = mlx5_dev_configure, 2399 .dev_start = mlx5_dev_start, 2400 .dev_stop = mlx5_dev_stop, 2401 .dev_set_link_down = mlx5_set_link_down, 2402 .dev_set_link_up = mlx5_set_link_up, 2403 .dev_close = mlx5_dev_close, 2404 .promiscuous_enable = mlx5_promiscuous_enable, 2405 .promiscuous_disable = mlx5_promiscuous_disable, 2406 .allmulticast_enable = mlx5_allmulticast_enable, 2407 .allmulticast_disable = mlx5_allmulticast_disable, 2408 .link_update = mlx5_link_update, 2409 .stats_get = mlx5_stats_get, 2410 .stats_reset = mlx5_stats_reset, 2411 .xstats_get = mlx5_xstats_get, 2412 .xstats_reset = mlx5_xstats_reset, 2413 .xstats_get_names = mlx5_xstats_get_names, 2414 .fw_version_get = mlx5_fw_version_get, 2415 .dev_infos_get = mlx5_dev_infos_get, 2416 .read_clock = mlx5_txpp_read_clock, 2417 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2418 .vlan_filter_set = mlx5_vlan_filter_set, 2419 .rx_queue_setup = mlx5_rx_queue_setup, 2420 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2421 .tx_queue_setup = mlx5_tx_queue_setup, 2422 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2423 .rx_queue_release = mlx5_rx_queue_release, 2424 .tx_queue_release = mlx5_tx_queue_release, 2425 .rx_queue_start = mlx5_rx_queue_start, 2426 .rx_queue_stop = mlx5_rx_queue_stop, 2427 .tx_queue_start = mlx5_tx_queue_start, 2428 .tx_queue_stop = mlx5_tx_queue_stop, 2429 .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2430 .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2431 .mac_addr_remove = mlx5_mac_addr_remove, 2432 .mac_addr_add = mlx5_mac_addr_add, 2433 .mac_addr_set = mlx5_mac_addr_set, 2434 .set_mc_addr_list = mlx5_set_mc_addr_list, 2435 .mtu_set = mlx5_dev_set_mtu, 2436 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2437 .vlan_offload_set = mlx5_vlan_offload_set, 2438 .reta_update = mlx5_dev_rss_reta_update, 2439 .reta_query = mlx5_dev_rss_reta_query, 2440 .rss_hash_update = mlx5_rss_hash_update, 2441 .rss_hash_conf_get = mlx5_rss_hash_conf_get, 2442 .filter_ctrl = mlx5_dev_filter_ctrl, 2443 .rxq_info_get = mlx5_rxq_info_get, 2444 .txq_info_get = mlx5_txq_info_get, 2445 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2446 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2447 .rx_queue_intr_enable = mlx5_rx_intr_enable, 2448 .rx_queue_intr_disable = mlx5_rx_intr_disable, 2449 .is_removed = mlx5_is_removed, 2450 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, 2451 .get_module_info = mlx5_get_module_info, 2452 .get_module_eeprom = mlx5_get_module_eeprom, 2453 .hairpin_cap_get = mlx5_hairpin_cap_get, 2454 .mtr_ops_get = mlx5_flow_meter_ops_get, 2455 }; 2456 2457 /* Available operations from secondary process. */ 2458 const struct eth_dev_ops mlx5_os_dev_sec_ops = { 2459 .stats_get = mlx5_stats_get, 2460 .stats_reset = mlx5_stats_reset, 2461 .xstats_get = mlx5_xstats_get, 2462 .xstats_reset = mlx5_xstats_reset, 2463 .xstats_get_names = mlx5_xstats_get_names, 2464 .fw_version_get = mlx5_fw_version_get, 2465 .dev_infos_get = mlx5_dev_infos_get, 2466 .read_clock = mlx5_txpp_read_clock, 2467 .rx_queue_start = mlx5_rx_queue_start, 2468 .rx_queue_stop = mlx5_rx_queue_stop, 2469 .tx_queue_start = mlx5_tx_queue_start, 2470 .tx_queue_stop = mlx5_tx_queue_stop, 2471 .rxq_info_get = mlx5_rxq_info_get, 2472 .txq_info_get = mlx5_txq_info_get, 2473 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2474 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2475 .get_module_info = mlx5_get_module_info, 2476 .get_module_eeprom = mlx5_get_module_eeprom, 2477 }; 2478 2479 /* Available operations in flow isolated mode. */ 2480 const struct eth_dev_ops mlx5_os_dev_ops_isolate = { 2481 .dev_configure = mlx5_dev_configure, 2482 .dev_start = mlx5_dev_start, 2483 .dev_stop = mlx5_dev_stop, 2484 .dev_set_link_down = mlx5_set_link_down, 2485 .dev_set_link_up = mlx5_set_link_up, 2486 .dev_close = mlx5_dev_close, 2487 .promiscuous_enable = mlx5_promiscuous_enable, 2488 .promiscuous_disable = mlx5_promiscuous_disable, 2489 .allmulticast_enable = mlx5_allmulticast_enable, 2490 .allmulticast_disable = mlx5_allmulticast_disable, 2491 .link_update = mlx5_link_update, 2492 .stats_get = mlx5_stats_get, 2493 .stats_reset = mlx5_stats_reset, 2494 .xstats_get = mlx5_xstats_get, 2495 .xstats_reset = mlx5_xstats_reset, 2496 .xstats_get_names = mlx5_xstats_get_names, 2497 .fw_version_get = mlx5_fw_version_get, 2498 .dev_infos_get = mlx5_dev_infos_get, 2499 .read_clock = mlx5_txpp_read_clock, 2500 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2501 .vlan_filter_set = mlx5_vlan_filter_set, 2502 .rx_queue_setup = mlx5_rx_queue_setup, 2503 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2504 .tx_queue_setup = mlx5_tx_queue_setup, 2505 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2506 .rx_queue_release = mlx5_rx_queue_release, 2507 .tx_queue_release = mlx5_tx_queue_release, 2508 .rx_queue_start = mlx5_rx_queue_start, 2509 .rx_queue_stop = mlx5_rx_queue_stop, 2510 .tx_queue_start = mlx5_tx_queue_start, 2511 .tx_queue_stop = mlx5_tx_queue_stop, 2512 .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2513 .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2514 .mac_addr_remove = mlx5_mac_addr_remove, 2515 .mac_addr_add = mlx5_mac_addr_add, 2516 .mac_addr_set = mlx5_mac_addr_set, 2517 .set_mc_addr_list = mlx5_set_mc_addr_list, 2518 .mtu_set = mlx5_dev_set_mtu, 2519 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2520 .vlan_offload_set = mlx5_vlan_offload_set, 2521 .filter_ctrl = mlx5_dev_filter_ctrl, 2522 .rxq_info_get = mlx5_rxq_info_get, 2523 .txq_info_get = mlx5_txq_info_get, 2524 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2525 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2526 .rx_queue_intr_enable = mlx5_rx_intr_enable, 2527 .rx_queue_intr_disable = mlx5_rx_intr_disable, 2528 .is_removed = mlx5_is_removed, 2529 .get_module_info = mlx5_get_module_info, 2530 .get_module_eeprom = mlx5_get_module_eeprom, 2531 .hairpin_cap_get = mlx5_hairpin_cap_get, 2532 .mtr_ops_get = mlx5_flow_meter_ops_get, 2533 }; 2534