1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <bus_driver.h> 23 #include <bus_pci_driver.h> 24 #include <bus_auxiliary_driver.h> 25 #include <rte_common.h> 26 #include <rte_kvargs.h> 27 #include <rte_rwlock.h> 28 #include <rte_spinlock.h> 29 #include <rte_string_fns.h> 30 #include <rte_alarm.h> 31 #include <rte_eal_paging.h> 32 33 #include <mlx5_glue.h> 34 #include <mlx5_devx_cmds.h> 35 #include <mlx5_common.h> 36 #include <mlx5_common_mp.h> 37 #include <mlx5_common_mr.h> 38 #include <mlx5_malloc.h> 39 40 #include "mlx5_defs.h" 41 #include "mlx5.h" 42 #include "mlx5_common_os.h" 43 #include "mlx5_utils.h" 44 #include "mlx5_rxtx.h" 45 #include "mlx5_rx.h" 46 #include "mlx5_tx.h" 47 #include "mlx5_autoconf.h" 48 #include "mlx5_flow.h" 49 #include "rte_pmd_mlx5.h" 50 #include "mlx5_verbs.h" 51 #include "mlx5_nl.h" 52 #include "mlx5_devx.h" 53 54 #ifndef HAVE_IBV_MLX5_MOD_MPW 55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 57 #endif 58 59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 61 #endif 62 63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 64 65 /* Spinlock for mlx5_shared_data allocation. */ 66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 67 68 /* Process local data for secondary processes. */ 69 static struct mlx5_local_data mlx5_local_data; 70 71 /* rte flow indexed pool configuration. */ 72 static struct mlx5_indexed_pool_config icfg[] = { 73 { 74 .size = sizeof(struct rte_flow), 75 .trunk_size = 64, 76 .need_lock = 1, 77 .release_mem_en = 0, 78 .malloc = mlx5_malloc, 79 .free = mlx5_free, 80 .per_core_cache = 0, 81 .type = "ctl_flow_ipool", 82 }, 83 { 84 .size = sizeof(struct rte_flow), 85 .trunk_size = 64, 86 .grow_trunk = 3, 87 .grow_shift = 2, 88 .need_lock = 1, 89 .release_mem_en = 0, 90 .malloc = mlx5_malloc, 91 .free = mlx5_free, 92 .per_core_cache = 1 << 14, 93 .type = "rte_flow_ipool", 94 }, 95 { 96 .size = sizeof(struct rte_flow), 97 .trunk_size = 64, 98 .grow_trunk = 3, 99 .grow_shift = 2, 100 .need_lock = 1, 101 .release_mem_en = 0, 102 .malloc = mlx5_malloc, 103 .free = mlx5_free, 104 .per_core_cache = 0, 105 .type = "mcp_flow_ipool", 106 }, 107 }; 108 109 /** 110 * Set the completion channel file descriptor interrupt as non-blocking. 111 * 112 * @param[in] rxq_obj 113 * Pointer to RQ channel object, which includes the channel fd 114 * 115 * @param[out] fd 116 * The file descriptor (representing the interrupt) used in this channel. 117 * 118 * @return 119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 120 */ 121 int 122 mlx5_os_set_nonblock_channel_fd(int fd) 123 { 124 int flags; 125 126 flags = fcntl(fd, F_GETFL); 127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 128 } 129 130 /** 131 * Get mlx5 device attributes. The glue function query_device_ex() is called 132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 133 * device attributes from the glue out parameter. 134 * 135 * @param sh 136 * Pointer to shared device context. 137 * 138 * @return 139 * 0 on success, a negative errno value otherwise and rte_errno is set. 140 */ 141 int 142 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 143 { 144 int err; 145 struct mlx5_common_device *cdev = sh->cdev; 146 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 147 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 148 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 149 150 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 151 if (err) { 152 rte_errno = errno; 153 return -rte_errno; 154 } 155 #ifdef HAVE_IBV_MLX5_MOD_SWP 156 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 157 #endif 158 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 159 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 160 #endif 161 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 162 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 163 #endif 164 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 165 if (err) { 166 rte_errno = errno; 167 return -rte_errno; 168 } 169 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 170 if (mlx5_dev_is_pci(cdev->dev)) 171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 172 else 173 sh->dev_cap.sf = 1; 174 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 175 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 176 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 177 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 178 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 179 sh->dev_cap.dest_tir = 1; 180 #endif 181 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 182 DRV_LOG(DEBUG, "DV flow is supported."); 183 sh->dev_cap.dv_flow_en = 1; 184 #endif 185 #ifdef HAVE_MLX5DV_DR_ESWITCH 186 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 187 sh->dev_cap.dv_esw_en = 1; 188 #endif 189 /* 190 * Multi-packet send is supported by ConnectX-4 Lx PF as well 191 * as all ConnectX-5 devices. 192 */ 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 194 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 195 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 196 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 197 } else { 198 DRV_LOG(DEBUG, "MPW is supported."); 199 sh->dev_cap.mps = MLX5_MPW; 200 } 201 } else { 202 DRV_LOG(DEBUG, "MPW isn't supported."); 203 sh->dev_cap.mps = MLX5_MPW_DISABLED; 204 } 205 #if (RTE_CACHE_LINE_SIZE == 128) 206 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 207 sh->dev_cap.cqe_comp = 1; 208 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 209 sh->dev_cap.cqe_comp ? "" : "not "); 210 #else 211 sh->dev_cap.cqe_comp = 1; 212 #endif 213 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 214 sh->dev_cap.mpls_en = 215 ((dv_attr.tunnel_offloads_caps & 216 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 217 (dv_attr.tunnel_offloads_caps & 218 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 219 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 220 sh->dev_cap.mpls_en ? "" : "not "); 221 #else 222 DRV_LOG(WARNING, 223 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 224 #endif 225 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 226 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 227 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 228 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 229 IBV_DEVICE_PCI_WRITE_END_PADDING); 230 #endif 231 sh->dev_cap.hw_csum = 232 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 233 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 234 sh->dev_cap.hw_csum ? "" : "not "); 235 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 236 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 237 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 238 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 239 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 240 IBV_RAW_PACKET_CAP_SCATTER_FCS); 241 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 242 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 243 DRV_LOG(DEBUG, "Counters are not supported."); 244 #endif 245 /* 246 * DPDK doesn't support larger/variable indirection tables. 247 * Once DPDK supports it, take max size from device attr. 248 */ 249 sh->dev_cap.ind_table_max_size = 250 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 251 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 252 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 253 sh->dev_cap.ind_table_max_size); 254 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 255 (attr_ex.tso_caps.supported_qpts & 256 (1 << IBV_QPT_RAW_PACKET))); 257 if (sh->dev_cap.tso) 258 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 259 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 260 sizeof(sh->dev_cap.fw_ver)); 261 #ifdef HAVE_IBV_MLX5_MOD_SWP 262 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 263 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 264 (MLX5_SW_PARSING_CAP | 265 MLX5_SW_PARSING_CSUM_CAP | 266 MLX5_SW_PARSING_TSO_CAP); 267 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 268 #endif 269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 270 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 271 struct mlx5dv_striding_rq_caps *strd_rq_caps = 272 &dv_attr.striding_rq_caps; 273 274 sh->dev_cap.mprq.enabled = 1; 275 sh->dev_cap.mprq.log_min_stride_size = 276 strd_rq_caps->min_single_stride_log_num_of_bytes; 277 sh->dev_cap.mprq.log_max_stride_size = 278 strd_rq_caps->max_single_stride_log_num_of_bytes; 279 sh->dev_cap.mprq.log_min_stride_num = 280 strd_rq_caps->min_single_wqe_log_num_of_strides; 281 sh->dev_cap.mprq.log_max_stride_num = 282 strd_rq_caps->max_single_wqe_log_num_of_strides; 283 sh->dev_cap.mprq.log_min_stride_wqe_size = 284 cdev->config.devx ? 285 hca_attr->log_min_stride_wqe_sz : 286 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 287 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 288 sh->dev_cap.mprq.log_min_stride_size); 289 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 290 sh->dev_cap.mprq.log_max_stride_size); 291 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 292 sh->dev_cap.mprq.log_min_stride_num); 293 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 294 sh->dev_cap.mprq.log_max_stride_num); 295 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 296 sh->dev_cap.mprq.log_min_stride_wqe_size); 297 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 298 strd_rq_caps->supported_qpts); 299 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 300 } 301 #endif 302 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 303 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 304 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 305 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 306 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 307 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 308 } 309 if (sh->dev_cap.tunnel_en) { 310 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 311 sh->dev_cap.tunnel_en & 312 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 313 sh->dev_cap.tunnel_en & 314 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 315 sh->dev_cap.tunnel_en & 316 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 317 } else { 318 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 319 } 320 #else 321 DRV_LOG(WARNING, 322 "Tunnel offloading disabled due to old OFED/rdma-core version"); 323 #endif 324 if (!sh->cdev->config.devx) 325 return 0; 326 /* Check capabilities for Packet Pacing. */ 327 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 328 hca_attr->dev_freq_khz); 329 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 330 hca_attr->qos.packet_pacing ? "" : "not "); 331 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 332 hca_attr->cross_channel ? "" : "not "); 333 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 334 hca_attr->wqe_index_ignore ? "" : "not "); 335 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 336 hca_attr->non_wire_sq ? "" : "not "); 337 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 338 hca_attr->log_max_static_sq_wq ? "" : "not ", 339 hca_attr->log_max_static_sq_wq); 340 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 341 hca_attr->qos.wqe_rate_pp ? "" : "not "); 342 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 343 if (!hca_attr->cross_channel) { 344 DRV_LOG(DEBUG, 345 "Cross channel operations are required for packet pacing."); 346 sh->dev_cap.txpp_en = 0; 347 } 348 if (!hca_attr->wqe_index_ignore) { 349 DRV_LOG(DEBUG, 350 "WQE index ignore feature is required for packet pacing."); 351 sh->dev_cap.txpp_en = 0; 352 } 353 if (!hca_attr->non_wire_sq) { 354 DRV_LOG(DEBUG, 355 "Non-wire SQ feature is required for packet pacing."); 356 sh->dev_cap.txpp_en = 0; 357 } 358 if (!hca_attr->log_max_static_sq_wq) { 359 DRV_LOG(DEBUG, 360 "Static WQE SQ feature is required for packet pacing."); 361 sh->dev_cap.txpp_en = 0; 362 } 363 if (!hca_attr->qos.wqe_rate_pp) { 364 DRV_LOG(DEBUG, 365 "WQE rate mode is required for packet pacing."); 366 sh->dev_cap.txpp_en = 0; 367 } 368 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 369 DRV_LOG(DEBUG, 370 "DevX does not provide UAR offset, can't create queues for packet pacing."); 371 sh->dev_cap.txpp_en = 0; 372 #endif 373 /* Check for LRO support. */ 374 if (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) { 375 /* TBD check tunnel lro caps. */ 376 sh->dev_cap.lro_supported = 1; 377 DRV_LOG(DEBUG, "Device supports LRO."); 378 DRV_LOG(DEBUG, 379 "LRO minimal size of TCP segment required for coalescing is %d bytes.", 380 hca_attr->lro_min_mss_size); 381 } 382 sh->dev_cap.scatter_fcs_w_decap_disable = 383 hca_attr->scatter_fcs_w_decap_disable; 384 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 385 mlx5_rt_timestamp_config(sh, hca_attr); 386 return 0; 387 } 388 389 /** 390 * Detect misc5 support or not 391 * 392 * @param[in] priv 393 * Device private data pointer 394 */ 395 #ifdef HAVE_MLX5DV_DR 396 static void 397 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 398 { 399 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 400 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 401 * Case: IPv4--->UDP--->VxLAN--->vni 402 */ 403 void *tbl; 404 struct mlx5_flow_dv_match_params matcher_mask; 405 void *match_m; 406 void *matcher; 407 void *headers_m; 408 void *misc5_m; 409 uint32_t *tunnel_header_m; 410 struct mlx5dv_flow_matcher_attr dv_attr; 411 412 memset(&matcher_mask, 0, sizeof(matcher_mask)); 413 matcher_mask.size = sizeof(matcher_mask.buf); 414 match_m = matcher_mask.buf; 415 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 416 misc5_m = MLX5_ADDR_OF(fte_match_param, 417 match_m, misc_parameters_5); 418 tunnel_header_m = (uint32_t *) 419 MLX5_ADDR_OF(fte_match_set_misc5, 420 misc5_m, tunnel_header_1); 421 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 422 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 423 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 424 *tunnel_header_m = 0xffffff; 425 426 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 427 if (!tbl) { 428 DRV_LOG(INFO, "No SW steering support"); 429 return; 430 } 431 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 432 dv_attr.match_mask = (void *)&matcher_mask, 433 dv_attr.match_criteria_enable = 434 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 435 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 436 dv_attr.priority = 3; 437 #ifdef HAVE_MLX5DV_DR_ESWITCH 438 void *misc2_m; 439 if (priv->sh->config.dv_esw_en) { 440 /* FDB enabled reg_c_0 */ 441 dv_attr.match_criteria_enable |= 442 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 443 misc2_m = MLX5_ADDR_OF(fte_match_param, 444 match_m, misc_parameters_2); 445 MLX5_SET(fte_match_set_misc2, misc2_m, 446 metadata_reg_c_0, 0xffff); 447 } 448 #endif 449 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 450 &dv_attr, tbl); 451 if (matcher) { 452 priv->sh->misc5_cap = 1; 453 mlx5_glue->dv_destroy_flow_matcher(matcher); 454 } 455 mlx5_glue->dr_destroy_flow_tbl(tbl); 456 #else 457 RTE_SET_USED(priv); 458 #endif 459 } 460 #endif 461 462 /** 463 * Initialize DR related data within private structure. 464 * Routine checks the reference counter and does actual 465 * resources creation/initialization only if counter is zero. 466 * 467 * @param[in] priv 468 * Pointer to the private device data structure. 469 * 470 * @return 471 * Zero on success, positive error code otherwise. 472 */ 473 static int 474 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 475 { 476 struct mlx5_dev_ctx_shared *sh = priv->sh; 477 char s[MLX5_NAME_SIZE] __rte_unused; 478 int err; 479 480 MLX5_ASSERT(sh && sh->refcnt); 481 if (sh->refcnt > 1) 482 return 0; 483 err = mlx5_alloc_table_hash_list(priv); 484 if (err) 485 goto error; 486 if (priv->sh->config.dv_flow_en == 2) 487 return 0; 488 /* The resources below are only valid with DV support. */ 489 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 490 /* Init port id action list. */ 491 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 492 sh->port_id_action_list = mlx5_list_create(s, sh, true, 493 flow_dv_port_id_create_cb, 494 flow_dv_port_id_match_cb, 495 flow_dv_port_id_remove_cb, 496 flow_dv_port_id_clone_cb, 497 flow_dv_port_id_clone_free_cb); 498 if (!sh->port_id_action_list) 499 goto error; 500 /* Init push vlan action list. */ 501 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 502 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 503 flow_dv_push_vlan_create_cb, 504 flow_dv_push_vlan_match_cb, 505 flow_dv_push_vlan_remove_cb, 506 flow_dv_push_vlan_clone_cb, 507 flow_dv_push_vlan_clone_free_cb); 508 if (!sh->push_vlan_action_list) 509 goto error; 510 /* Init sample action list. */ 511 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 512 sh->sample_action_list = mlx5_list_create(s, sh, true, 513 flow_dv_sample_create_cb, 514 flow_dv_sample_match_cb, 515 flow_dv_sample_remove_cb, 516 flow_dv_sample_clone_cb, 517 flow_dv_sample_clone_free_cb); 518 if (!sh->sample_action_list) 519 goto error; 520 /* Init dest array action list. */ 521 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 522 sh->dest_array_list = mlx5_list_create(s, sh, true, 523 flow_dv_dest_array_create_cb, 524 flow_dv_dest_array_match_cb, 525 flow_dv_dest_array_remove_cb, 526 flow_dv_dest_array_clone_cb, 527 flow_dv_dest_array_clone_free_cb); 528 if (!sh->dest_array_list) 529 goto error; 530 /* Init shared flex parsers list, no need lcore_share */ 531 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 532 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 533 mlx5_flex_parser_create_cb, 534 mlx5_flex_parser_match_cb, 535 mlx5_flex_parser_remove_cb, 536 mlx5_flex_parser_clone_cb, 537 mlx5_flex_parser_clone_free_cb); 538 if (!sh->flex_parsers_dv) 539 goto error; 540 #endif 541 #ifdef HAVE_MLX5DV_DR 542 void *domain; 543 544 /* Reference counter is zero, we should initialize structures. */ 545 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 546 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 547 if (!domain) { 548 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 549 err = errno; 550 goto error; 551 } 552 sh->rx_domain = domain; 553 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 554 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 555 if (!domain) { 556 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 557 err = errno; 558 goto error; 559 } 560 sh->tx_domain = domain; 561 #ifdef HAVE_MLX5DV_DR_ESWITCH 562 if (sh->config.dv_esw_en) { 563 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 564 MLX5DV_DR_DOMAIN_TYPE_FDB); 565 if (!domain) { 566 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 567 err = errno; 568 goto error; 569 } 570 sh->fdb_domain = domain; 571 } 572 /* 573 * The drop action is just some dummy placeholder in rdma-core. It 574 * does not belong to domains and has no any attributes, and, can be 575 * shared by the entire device. 576 */ 577 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 578 if (!sh->dr_drop_action) { 579 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 580 err = errno; 581 goto error; 582 } 583 #endif 584 if (!sh->tunnel_hub && sh->config.dv_miss_info) 585 err = mlx5_alloc_tunnel_hub(sh); 586 if (err) { 587 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 588 goto error; 589 } 590 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 591 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 592 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 593 if (sh->fdb_domain) 594 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 595 } 596 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 597 if (!sh->config.allow_duplicate_pattern) { 598 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 599 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 600 #endif 601 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 602 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 603 if (sh->fdb_domain) 604 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 605 } 606 607 __mlx5_discovery_misc5_cap(priv); 608 #endif /* HAVE_MLX5DV_DR */ 609 sh->default_miss_action = 610 mlx5_glue->dr_create_flow_action_default_miss(); 611 if (!sh->default_miss_action) 612 DRV_LOG(WARNING, "Default miss action is not supported."); 613 LIST_INIT(&sh->shared_rxqs); 614 return 0; 615 error: 616 /* Rollback the created objects. */ 617 if (sh->rx_domain) { 618 mlx5_glue->dr_destroy_domain(sh->rx_domain); 619 sh->rx_domain = NULL; 620 } 621 if (sh->tx_domain) { 622 mlx5_glue->dr_destroy_domain(sh->tx_domain); 623 sh->tx_domain = NULL; 624 } 625 if (sh->fdb_domain) { 626 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 627 sh->fdb_domain = NULL; 628 } 629 if (sh->dr_drop_action) { 630 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 631 sh->dr_drop_action = NULL; 632 } 633 if (sh->pop_vlan_action) { 634 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 635 sh->pop_vlan_action = NULL; 636 } 637 if (sh->encaps_decaps) { 638 mlx5_hlist_destroy(sh->encaps_decaps); 639 sh->encaps_decaps = NULL; 640 } 641 if (sh->modify_cmds) { 642 mlx5_hlist_destroy(sh->modify_cmds); 643 sh->modify_cmds = NULL; 644 } 645 if (sh->tag_table) { 646 /* tags should be destroyed with flow before. */ 647 mlx5_hlist_destroy(sh->tag_table); 648 sh->tag_table = NULL; 649 } 650 if (sh->tunnel_hub) { 651 mlx5_release_tunnel_hub(sh, priv->dev_port); 652 sh->tunnel_hub = NULL; 653 } 654 mlx5_free_table_hash_list(priv); 655 if (sh->port_id_action_list) { 656 mlx5_list_destroy(sh->port_id_action_list); 657 sh->port_id_action_list = NULL; 658 } 659 if (sh->push_vlan_action_list) { 660 mlx5_list_destroy(sh->push_vlan_action_list); 661 sh->push_vlan_action_list = NULL; 662 } 663 if (sh->sample_action_list) { 664 mlx5_list_destroy(sh->sample_action_list); 665 sh->sample_action_list = NULL; 666 } 667 if (sh->dest_array_list) { 668 mlx5_list_destroy(sh->dest_array_list); 669 sh->dest_array_list = NULL; 670 } 671 return err; 672 } 673 674 /** 675 * Destroy DR related data within private structure. 676 * 677 * @param[in] priv 678 * Pointer to the private device data structure. 679 */ 680 void 681 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 682 { 683 struct mlx5_dev_ctx_shared *sh = priv->sh; 684 685 MLX5_ASSERT(sh && sh->refcnt); 686 if (sh->refcnt > 1) 687 return; 688 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 689 #ifdef HAVE_MLX5DV_DR 690 if (sh->rx_domain) { 691 mlx5_glue->dr_destroy_domain(sh->rx_domain); 692 sh->rx_domain = NULL; 693 } 694 if (sh->tx_domain) { 695 mlx5_glue->dr_destroy_domain(sh->tx_domain); 696 sh->tx_domain = NULL; 697 } 698 #ifdef HAVE_MLX5DV_DR_ESWITCH 699 if (sh->fdb_domain) { 700 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 701 sh->fdb_domain = NULL; 702 } 703 if (sh->dr_drop_action) { 704 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 705 sh->dr_drop_action = NULL; 706 } 707 #endif 708 if (sh->pop_vlan_action) { 709 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 710 sh->pop_vlan_action = NULL; 711 } 712 #endif /* HAVE_MLX5DV_DR */ 713 if (sh->default_miss_action) 714 mlx5_glue->destroy_flow_action 715 (sh->default_miss_action); 716 if (sh->encaps_decaps) { 717 mlx5_hlist_destroy(sh->encaps_decaps); 718 sh->encaps_decaps = NULL; 719 } 720 if (sh->modify_cmds) { 721 mlx5_hlist_destroy(sh->modify_cmds); 722 sh->modify_cmds = NULL; 723 } 724 if (sh->tag_table) { 725 /* tags should be destroyed with flow before. */ 726 mlx5_hlist_destroy(sh->tag_table); 727 sh->tag_table = NULL; 728 } 729 if (sh->tunnel_hub) { 730 mlx5_release_tunnel_hub(sh, priv->dev_port); 731 sh->tunnel_hub = NULL; 732 } 733 mlx5_free_table_hash_list(priv); 734 if (sh->port_id_action_list) { 735 mlx5_list_destroy(sh->port_id_action_list); 736 sh->port_id_action_list = NULL; 737 } 738 if (sh->push_vlan_action_list) { 739 mlx5_list_destroy(sh->push_vlan_action_list); 740 sh->push_vlan_action_list = NULL; 741 } 742 if (sh->sample_action_list) { 743 mlx5_list_destroy(sh->sample_action_list); 744 sh->sample_action_list = NULL; 745 } 746 if (sh->dest_array_list) { 747 mlx5_list_destroy(sh->dest_array_list); 748 sh->dest_array_list = NULL; 749 } 750 } 751 752 /** 753 * Initialize shared data between primary and secondary process. 754 * 755 * A memzone is reserved by primary process and secondary processes attach to 756 * the memzone. 757 * 758 * @return 759 * 0 on success, a negative errno value otherwise and rte_errno is set. 760 */ 761 static int 762 mlx5_init_shared_data(void) 763 { 764 const struct rte_memzone *mz; 765 int ret = 0; 766 767 rte_spinlock_lock(&mlx5_shared_data_lock); 768 if (mlx5_shared_data == NULL) { 769 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 770 /* Allocate shared memory. */ 771 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 772 sizeof(*mlx5_shared_data), 773 SOCKET_ID_ANY, 0); 774 if (mz == NULL) { 775 DRV_LOG(ERR, 776 "Cannot allocate mlx5 shared data"); 777 ret = -rte_errno; 778 goto error; 779 } 780 mlx5_shared_data = mz->addr; 781 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 782 rte_spinlock_init(&mlx5_shared_data->lock); 783 } else { 784 /* Lookup allocated shared memory. */ 785 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 786 if (mz == NULL) { 787 DRV_LOG(ERR, 788 "Cannot attach mlx5 shared data"); 789 ret = -rte_errno; 790 goto error; 791 } 792 mlx5_shared_data = mz->addr; 793 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 794 } 795 } 796 error: 797 rte_spinlock_unlock(&mlx5_shared_data_lock); 798 return ret; 799 } 800 801 /** 802 * PMD global initialization. 803 * 804 * Independent from individual device, this function initializes global 805 * per-PMD data structures distinguishing primary and secondary processes. 806 * Hence, each initialization is called once per a process. 807 * 808 * @return 809 * 0 on success, a negative errno value otherwise and rte_errno is set. 810 */ 811 static int 812 mlx5_init_once(void) 813 { 814 struct mlx5_shared_data *sd; 815 struct mlx5_local_data *ld = &mlx5_local_data; 816 int ret = 0; 817 818 if (mlx5_init_shared_data()) 819 return -rte_errno; 820 sd = mlx5_shared_data; 821 MLX5_ASSERT(sd); 822 rte_spinlock_lock(&sd->lock); 823 switch (rte_eal_process_type()) { 824 case RTE_PROC_PRIMARY: 825 if (sd->init_done) 826 break; 827 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 828 mlx5_mp_os_primary_handle); 829 if (ret) 830 goto out; 831 sd->init_done = true; 832 break; 833 case RTE_PROC_SECONDARY: 834 if (ld->init_done) 835 break; 836 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 837 mlx5_mp_os_secondary_handle); 838 if (ret) 839 goto out; 840 ++sd->secondary_cnt; 841 ld->init_done = true; 842 break; 843 default: 844 break; 845 } 846 out: 847 rte_spinlock_unlock(&sd->lock); 848 return ret; 849 } 850 851 /** 852 * DR flow drop action support detect. 853 * 854 * @param dev 855 * Pointer to rte_eth_dev structure. 856 * 857 */ 858 static void 859 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 860 { 861 #ifdef HAVE_MLX5DV_DR 862 struct mlx5_priv *priv = dev->data->dev_private; 863 864 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 865 return; 866 /** 867 * DR supports drop action placeholder when it is supported; 868 * otherwise, use the queue drop action. 869 */ 870 if (!priv->sh->drop_action_check_flag) { 871 if (!mlx5_flow_discover_dr_action_support(dev)) 872 priv->sh->dr_drop_action_en = 1; 873 priv->sh->drop_action_check_flag = 1; 874 } 875 if (priv->sh->dr_drop_action_en) 876 priv->root_drop_action = priv->sh->dr_drop_action; 877 else 878 priv->root_drop_action = priv->drop_queue.hrxq->action; 879 #endif 880 } 881 882 static void 883 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 884 { 885 struct mlx5_priv *priv = dev->data->dev_private; 886 void *ctx = priv->sh->cdev->ctx; 887 888 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 889 if (!priv->q_counters) { 890 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 891 struct ibv_wq *wq; 892 893 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 894 "by DevX - fall-back to use the kernel driver global " 895 "queue counter.", dev->data->port_id); 896 /* Create WQ by kernel and query its queue counter ID. */ 897 if (cq) { 898 wq = mlx5_glue->create_wq(ctx, 899 &(struct ibv_wq_init_attr){ 900 .wq_type = IBV_WQT_RQ, 901 .max_wr = 1, 902 .max_sge = 1, 903 .pd = priv->sh->cdev->pd, 904 .cq = cq, 905 }); 906 if (wq) { 907 /* Counter is assigned only on RDY state. */ 908 int ret = mlx5_glue->modify_wq(wq, 909 &(struct ibv_wq_attr){ 910 .attr_mask = IBV_WQ_ATTR_STATE, 911 .wq_state = IBV_WQS_RDY, 912 }); 913 914 if (ret == 0) 915 mlx5_devx_cmd_wq_query(wq, 916 &priv->counter_set_id); 917 claim_zero(mlx5_glue->destroy_wq(wq)); 918 } 919 claim_zero(mlx5_glue->destroy_cq(cq)); 920 } 921 } else { 922 priv->counter_set_id = priv->q_counters->id; 923 } 924 if (priv->counter_set_id == 0) 925 DRV_LOG(INFO, "Part of the port %d statistics will not be " 926 "available.", dev->data->port_id); 927 } 928 929 /** 930 * Check if representor spawn info match devargs. 931 * 932 * @param spawn 933 * Verbs device parameters (name, port, switch_info) to spawn. 934 * @param eth_da 935 * Device devargs to probe. 936 * 937 * @return 938 * Match result. 939 */ 940 static bool 941 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 942 struct rte_eth_devargs *eth_da) 943 { 944 struct mlx5_switch_info *switch_info = &spawn->info; 945 unsigned int p, f; 946 uint16_t id; 947 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 948 eth_da->type); 949 950 switch (eth_da->type) { 951 case RTE_ETH_REPRESENTOR_SF: 952 if (!(spawn->info.port_name == -1 && 953 switch_info->name_type == 954 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 955 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 956 rte_errno = EBUSY; 957 return false; 958 } 959 break; 960 case RTE_ETH_REPRESENTOR_VF: 961 /* Allows HPF representor index -1 as exception. */ 962 if (!(spawn->info.port_name == -1 && 963 switch_info->name_type == 964 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 965 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 966 rte_errno = EBUSY; 967 return false; 968 } 969 break; 970 case RTE_ETH_REPRESENTOR_NONE: 971 rte_errno = EBUSY; 972 return false; 973 default: 974 rte_errno = ENOTSUP; 975 DRV_LOG(ERR, "unsupported representor type"); 976 return false; 977 } 978 /* Check representor ID: */ 979 for (p = 0; p < eth_da->nb_ports; ++p) { 980 if (spawn->pf_bond < 0) { 981 /* For non-LAG mode, allow and ignore pf. */ 982 switch_info->pf_num = eth_da->ports[p]; 983 repr_id = mlx5_representor_id_encode(switch_info, 984 eth_da->type); 985 } 986 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 987 id = MLX5_REPRESENTOR_ID 988 (eth_da->ports[p], eth_da->type, 989 eth_da->representor_ports[f]); 990 if (repr_id == id) 991 return true; 992 } 993 } 994 rte_errno = EBUSY; 995 return false; 996 } 997 998 /** 999 * Spawn an Ethernet device from Verbs information. 1000 * 1001 * @param dpdk_dev 1002 * Backing DPDK device. 1003 * @param spawn 1004 * Verbs device parameters (name, port, switch_info) to spawn. 1005 * @param eth_da 1006 * Device arguments. 1007 * @param mkvlist 1008 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1009 * 1010 * @return 1011 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1012 * is set. The following errors are defined: 1013 * 1014 * EBUSY: device is not supposed to be spawned. 1015 * EEXIST: device is already spawned 1016 */ 1017 static struct rte_eth_dev * 1018 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1019 struct mlx5_dev_spawn_data *spawn, 1020 struct rte_eth_devargs *eth_da, 1021 struct mlx5_kvargs_ctrl *mkvlist) 1022 { 1023 const struct mlx5_switch_info *switch_info = &spawn->info; 1024 struct mlx5_dev_ctx_shared *sh = NULL; 1025 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1026 struct rte_eth_dev *eth_dev = NULL; 1027 struct mlx5_priv *priv = NULL; 1028 int err = 0; 1029 struct rte_ether_addr mac; 1030 char name[RTE_ETH_NAME_MAX_LEN]; 1031 int own_domain_id = 0; 1032 uint16_t port_id; 1033 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1034 int nl_rdma; 1035 int i; 1036 1037 /* Determine if this port representor is supposed to be spawned. */ 1038 if (switch_info->representor && dpdk_dev->devargs && 1039 !mlx5_representor_match(spawn, eth_da)) 1040 return NULL; 1041 /* Build device name. */ 1042 if (spawn->pf_bond < 0) { 1043 /* Single device. */ 1044 if (!switch_info->representor) 1045 strlcpy(name, dpdk_dev->name, sizeof(name)); 1046 else 1047 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1048 dpdk_dev->name, 1049 switch_info->name_type == 1050 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1051 switch_info->port_name); 1052 } else { 1053 /* Bonding device. */ 1054 if (!switch_info->representor) { 1055 err = snprintf(name, sizeof(name), "%s_%s", 1056 dpdk_dev->name, spawn->phys_dev_name); 1057 } else { 1058 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1059 dpdk_dev->name, spawn->phys_dev_name, 1060 switch_info->ctrl_num, 1061 switch_info->pf_num, 1062 switch_info->name_type == 1063 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1064 switch_info->port_name); 1065 } 1066 } 1067 if (err >= (int)sizeof(name)) 1068 DRV_LOG(WARNING, "device name overflow %s", name); 1069 /* check if the device is already spawned */ 1070 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1071 /* 1072 * When device is already spawned, its devargs should be set 1073 * as used. otherwise, mlx5_kvargs_validate() will fail. 1074 */ 1075 if (mkvlist) 1076 mlx5_port_args_set_used(name, port_id, mkvlist); 1077 rte_errno = EEXIST; 1078 return NULL; 1079 } 1080 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1081 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1082 struct mlx5_mp_id mp_id; 1083 int fd; 1084 1085 eth_dev = rte_eth_dev_attach_secondary(name); 1086 if (eth_dev == NULL) { 1087 DRV_LOG(ERR, "can not attach rte ethdev"); 1088 rte_errno = ENOMEM; 1089 return NULL; 1090 } 1091 eth_dev->device = dpdk_dev; 1092 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1093 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1094 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1095 err = mlx5_proc_priv_init(eth_dev); 1096 if (err) 1097 return NULL; 1098 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1099 /* Receive command fd from primary process */ 1100 fd = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1101 if (fd < 0) 1102 goto err_secondary; 1103 /* Remap UAR for Tx queues. */ 1104 err = mlx5_tx_uar_init_secondary(eth_dev, fd); 1105 close(fd); 1106 if (err) 1107 goto err_secondary; 1108 /* 1109 * Ethdev pointer is still required as input since 1110 * the primary device is not accessible from the 1111 * secondary process. 1112 */ 1113 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1114 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1115 return eth_dev; 1116 err_secondary: 1117 mlx5_dev_close(eth_dev); 1118 return NULL; 1119 } 1120 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1121 if (!sh) 1122 return NULL; 1123 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1124 /* Check port status. */ 1125 if (spawn->phys_port <= UINT8_MAX) { 1126 /* Legacy Verbs api only support u8 port number. */ 1127 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1128 &port_attr); 1129 if (err) { 1130 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1131 goto error; 1132 } 1133 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1134 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1135 err = EINVAL; 1136 goto error; 1137 } 1138 } else if (nl_rdma >= 0) { 1139 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1140 err = mlx5_nl_port_state(nl_rdma, 1141 spawn->phys_dev_name, 1142 spawn->phys_port); 1143 if (err < 0) { 1144 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1145 strerror(rte_errno)); 1146 err = -rte_errno; 1147 goto error; 1148 } 1149 port_attr.state = (enum ibv_port_state)err; 1150 } 1151 if (port_attr.state != IBV_PORT_ACTIVE) 1152 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1153 mlx5_glue->port_state_str(port_attr.state), 1154 port_attr.state); 1155 /* Allocate private eth device data. */ 1156 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1157 sizeof(*priv), 1158 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1159 if (priv == NULL) { 1160 DRV_LOG(ERR, "priv allocation failure"); 1161 err = ENOMEM; 1162 goto error; 1163 } 1164 /* 1165 * When user configures remote PD and CTX and device creates RxQ by 1166 * DevX, external RxQ is both supported and requested. 1167 */ 1168 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1169 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1170 sizeof(struct mlx5_external_rxq) * 1171 MLX5_MAX_EXT_RX_QUEUES, 0, 1172 SOCKET_ID_ANY); 1173 if (priv->ext_rxqs == NULL) { 1174 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1175 err = ENOMEM; 1176 goto error; 1177 } 1178 DRV_LOG(DEBUG, "External RxQ is supported."); 1179 } 1180 priv->sh = sh; 1181 priv->dev_port = spawn->phys_port; 1182 priv->pci_dev = spawn->pci_dev; 1183 priv->mtu = RTE_ETHER_MTU; 1184 /* Some internal functions rely on Netlink sockets, open them now. */ 1185 priv->nl_socket_rdma = nl_rdma; 1186 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1187 priv->representor = !!switch_info->representor; 1188 priv->master = !!switch_info->master; 1189 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1190 priv->vport_meta_tag = 0; 1191 priv->vport_meta_mask = 0; 1192 priv->pf_bond = spawn->pf_bond; 1193 1194 DRV_LOG(DEBUG, 1195 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1196 priv->dev_port, dpdk_dev->bus->name, 1197 priv->pci_dev ? priv->pci_dev->name : "NONE", 1198 priv->master, priv->representor, priv->pf_bond); 1199 1200 /* 1201 * If we have E-Switch we should determine the vport attributes. 1202 * E-Switch may use either source vport field or reg_c[0] metadata 1203 * register to match on vport index. The engaged part of metadata 1204 * register is defined by mask. 1205 */ 1206 if (sh->esw_mode) { 1207 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1208 spawn->phys_port, 1209 &vport_info); 1210 if (err) { 1211 DRV_LOG(WARNING, 1212 "Cannot query devx port %d on device %s", 1213 spawn->phys_port, spawn->phys_dev_name); 1214 vport_info.query_flags = 0; 1215 } 1216 } 1217 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1218 priv->vport_meta_tag = vport_info.vport_meta_tag; 1219 priv->vport_meta_mask = vport_info.vport_meta_mask; 1220 if (!priv->vport_meta_mask) { 1221 DRV_LOG(ERR, 1222 "vport zero mask for port %d on bonding device %s", 1223 spawn->phys_port, spawn->phys_dev_name); 1224 err = ENOTSUP; 1225 goto error; 1226 } 1227 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1228 DRV_LOG(ERR, 1229 "Invalid vport tag for port %d on bonding device %s", 1230 spawn->phys_port, spawn->phys_dev_name); 1231 err = ENOTSUP; 1232 goto error; 1233 } 1234 } 1235 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1236 priv->vport_id = vport_info.vport_id; 1237 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1238 DRV_LOG(ERR, 1239 "Cannot deduce vport index for port %d on bonding device %s", 1240 spawn->phys_port, spawn->phys_dev_name); 1241 err = ENOTSUP; 1242 goto error; 1243 } else { 1244 /* 1245 * Suppose vport index in compatible way. Kernel/rdma_core 1246 * support single E-Switch per PF configurations only and 1247 * vport_id field contains the vport index for associated VF, 1248 * which is deduced from representor port name. 1249 * For example, let's have the IB device port 10, it has 1250 * attached network device eth0, which has port name attribute 1251 * pf0vf2, we can deduce the VF number as 2, and set vport index 1252 * as 3 (2+1). This assigning schema should be changed if the 1253 * multiple E-Switch instances per PF configurations or/and PCI 1254 * subfunctions are added. 1255 */ 1256 priv->vport_id = switch_info->representor ? 1257 switch_info->port_name + 1 : -1; 1258 } 1259 priv->representor_id = mlx5_representor_id_encode(switch_info, 1260 eth_da->type); 1261 /* 1262 * Look for sibling devices in order to reuse their switch domain 1263 * if any, otherwise allocate one. 1264 */ 1265 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1266 const struct mlx5_priv *opriv = 1267 rte_eth_devices[port_id].data->dev_private; 1268 1269 if (!opriv || 1270 opriv->sh != priv->sh || 1271 opriv->domain_id == 1272 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1273 continue; 1274 priv->domain_id = opriv->domain_id; 1275 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1276 priv->dev_port, priv->domain_id); 1277 break; 1278 } 1279 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1280 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1281 if (err) { 1282 err = rte_errno; 1283 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1284 strerror(rte_errno)); 1285 goto error; 1286 } 1287 own_domain_id = 1; 1288 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1289 priv->dev_port, priv->domain_id); 1290 } 1291 if (sh->cdev->config.devx) { 1292 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1293 1294 sh->steering_format_version = hca_attr->steering_format_version; 1295 #if defined(HAVE_MLX5DV_DR) && \ 1296 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ 1297 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) 1298 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1299 sh->config.dv_flow_en) { 1300 uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; 1301 /* 1302 * Meter needs two REG_C's for color match and pre-sfx 1303 * flow match. Here get the REG_C for color match. 1304 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1305 */ 1306 reg_c_mask &= 0xfc; 1307 if (__builtin_popcount(reg_c_mask) < 1) { 1308 priv->mtr_en = 0; 1309 DRV_LOG(WARNING, "No available register for" 1310 " meter."); 1311 } else { 1312 /* 1313 * The meter color register is used by the 1314 * flow-hit feature as well. 1315 * The flow-hit feature must use REG_C_3 1316 * Prefer REG_C_3 if it is available. 1317 */ 1318 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 1319 priv->mtr_color_reg = REG_C_3; 1320 else 1321 priv->mtr_color_reg = ffs(reg_c_mask) 1322 - 1 + REG_C_0; 1323 priv->mtr_en = 1; 1324 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1325 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1326 priv->mtr_color_reg); 1327 } 1328 } 1329 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1330 uint32_t log_obj_size = 1331 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1332 if (log_obj_size >= 1333 hca_attr->qos.log_meter_aso_granularity && 1334 log_obj_size <= 1335 hca_attr->qos.log_meter_aso_max_alloc) 1336 sh->meter_aso_en = 1; 1337 } 1338 if (priv->mtr_en) { 1339 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1340 if (err) { 1341 err = -err; 1342 goto error; 1343 } 1344 } 1345 if (hca_attr->flow.tunnel_header_0_1) 1346 sh->tunnel_header_0_1 = 1; 1347 if (hca_attr->flow.tunnel_header_2_3) 1348 sh->tunnel_header_2_3 = 1; 1349 #endif 1350 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1351 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { 1352 sh->flow_hit_aso_en = 1; 1353 err = mlx5_flow_aso_age_mng_init(sh); 1354 if (err) { 1355 err = -err; 1356 goto error; 1357 } 1358 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1359 } 1360 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1361 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1362 defined(HAVE_MLX5_DR_ACTION_ASO_CT) 1363 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { 1364 err = mlx5_flow_aso_ct_mng_init(sh); 1365 if (err) { 1366 err = -err; 1367 goto error; 1368 } 1369 DRV_LOG(DEBUG, "CT ASO is supported."); 1370 sh->ct_aso_en = 1; 1371 } 1372 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1373 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1374 if (hca_attr->log_max_ft_sampler_num > 0 && 1375 sh->config.dv_flow_en) { 1376 priv->sampler_en = 1; 1377 DRV_LOG(DEBUG, "Sampler enabled!"); 1378 } else { 1379 priv->sampler_en = 0; 1380 if (!hca_attr->log_max_ft_sampler_num) 1381 DRV_LOG(WARNING, 1382 "No available register for sampler."); 1383 else 1384 DRV_LOG(DEBUG, "DV flow is not supported!"); 1385 } 1386 #endif 1387 } 1388 /* Process parameters and store port configuration on priv structure. */ 1389 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1390 if (err) { 1391 err = rte_errno; 1392 DRV_LOG(ERR, "Failed to process port configure: %s", 1393 strerror(rte_errno)); 1394 goto error; 1395 } 1396 eth_dev = rte_eth_dev_allocate(name); 1397 if (eth_dev == NULL) { 1398 DRV_LOG(ERR, "can not allocate rte ethdev"); 1399 err = ENOMEM; 1400 goto error; 1401 } 1402 if (priv->representor) { 1403 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1404 eth_dev->data->representor_id = priv->representor_id; 1405 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1406 struct mlx5_priv *opriv = 1407 rte_eth_devices[port_id].data->dev_private; 1408 if (opriv && 1409 opriv->master && 1410 opriv->domain_id == priv->domain_id && 1411 opriv->sh == priv->sh) { 1412 eth_dev->data->backer_port_id = port_id; 1413 break; 1414 } 1415 } 1416 if (port_id >= RTE_MAX_ETHPORTS) 1417 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1418 } 1419 priv->mp_id.port_id = eth_dev->data->port_id; 1420 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1421 /* 1422 * Store associated network device interface index. This index 1423 * is permanent throughout the lifetime of device. So, we may store 1424 * the ifindex here and use the cached value further. 1425 */ 1426 MLX5_ASSERT(spawn->ifindex); 1427 priv->if_index = spawn->ifindex; 1428 priv->lag_affinity_idx = sh->refcnt - 1; 1429 eth_dev->data->dev_private = priv; 1430 priv->dev_data = eth_dev->data; 1431 eth_dev->data->mac_addrs = priv->mac; 1432 eth_dev->device = dpdk_dev; 1433 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1434 /* Configure the first MAC address by default. */ 1435 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1436 DRV_LOG(ERR, 1437 "port %u cannot get MAC address, is mlx5_en" 1438 " loaded? (errno: %s)", 1439 eth_dev->data->port_id, strerror(rte_errno)); 1440 err = ENODEV; 1441 goto error; 1442 } 1443 DRV_LOG(INFO, 1444 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1445 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1446 #ifdef RTE_LIBRTE_MLX5_DEBUG 1447 { 1448 char ifname[MLX5_NAMESIZE]; 1449 1450 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1451 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1452 eth_dev->data->port_id, ifname); 1453 else 1454 DRV_LOG(DEBUG, "port %u ifname is unknown", 1455 eth_dev->data->port_id); 1456 } 1457 #endif 1458 /* Get actual MTU if possible. */ 1459 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1460 if (err) { 1461 err = rte_errno; 1462 goto error; 1463 } 1464 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1465 priv->mtu); 1466 /* Initialize burst functions to prevent crashes before link-up. */ 1467 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1468 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1469 eth_dev->dev_ops = &mlx5_dev_ops; 1470 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1471 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1472 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1473 /* Register MAC address. */ 1474 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1475 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1476 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1477 mlx5_ifindex(eth_dev), 1478 eth_dev->data->mac_addrs, 1479 MLX5_MAX_MAC_ADDRESSES); 1480 priv->ctrl_flows = 0; 1481 rte_spinlock_init(&priv->flow_list_lock); 1482 TAILQ_INIT(&priv->flow_meters); 1483 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1484 if (!priv->mtr_profile_tbl) 1485 goto error; 1486 /* Bring Ethernet device up. */ 1487 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1488 eth_dev->data->port_id); 1489 /* Read link status in case it is up and there will be no event. */ 1490 mlx5_link_update(eth_dev, 0); 1491 /* Watch LSC interrupts between port probe and port start. */ 1492 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1493 eth_dev->data->port_id; 1494 mlx5_set_link_up(eth_dev); 1495 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1496 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1497 if (sh->config.reclaim_mode) 1498 icfg[i].per_core_cache = 0; 1499 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1500 if (!priv->flows[i]) 1501 goto error; 1502 } 1503 /* Create context for virtual machine VLAN workaround. */ 1504 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1505 if (sh->config.dv_flow_en) { 1506 err = mlx5_alloc_shared_dr(priv); 1507 if (err) 1508 goto error; 1509 if (mlx5_flex_item_port_init(eth_dev) < 0) 1510 goto error; 1511 } 1512 if (mlx5_devx_obj_ops_en(sh)) { 1513 priv->obj_ops = devx_obj_ops; 1514 mlx5_queue_counter_id_prepare(eth_dev); 1515 priv->obj_ops.lb_dummy_queue_create = 1516 mlx5_rxq_ibv_obj_dummy_lb_create; 1517 priv->obj_ops.lb_dummy_queue_release = 1518 mlx5_rxq_ibv_obj_dummy_lb_release; 1519 } else if (spawn->max_port > UINT8_MAX) { 1520 /* Verbs can't support ports larger than 255 by design. */ 1521 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1522 err = ENOTSUP; 1523 goto error; 1524 } else { 1525 priv->obj_ops = ibv_obj_ops; 1526 } 1527 if (sh->config.tx_pp && 1528 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1529 /* 1530 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1531 * packet pacing and already checked above. 1532 * Hence, we should only make sure the SQs will be created 1533 * with DevX, not with Verbs. 1534 * Verbs allocates the SQ UAR on its own and it can't be shared 1535 * with Clock Queue UAR as required for Tx scheduling. 1536 */ 1537 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1538 err = ENODEV; 1539 goto error; 1540 } 1541 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1542 if (!priv->drop_queue.hrxq) 1543 goto error; 1544 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1545 mlx5_hrxq_create_cb, 1546 mlx5_hrxq_match_cb, 1547 mlx5_hrxq_remove_cb, 1548 mlx5_hrxq_clone_cb, 1549 mlx5_hrxq_clone_free_cb); 1550 if (!priv->hrxqs) 1551 goto error; 1552 rte_rwlock_init(&priv->ind_tbls_lock); 1553 if (priv->sh->config.dv_flow_en == 2) 1554 return eth_dev; 1555 /* Port representor shares the same max priority with pf port. */ 1556 if (!priv->sh->flow_priority_check_flag) { 1557 /* Supported Verbs flow priority number detection. */ 1558 err = mlx5_flow_discover_priorities(eth_dev); 1559 priv->sh->flow_max_priority = err; 1560 priv->sh->flow_priority_check_flag = 1; 1561 } else { 1562 err = priv->sh->flow_max_priority; 1563 } 1564 if (err < 0) { 1565 err = -err; 1566 goto error; 1567 } 1568 mlx5_set_metadata_mask(eth_dev); 1569 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1570 !priv->sh->dv_regc0_mask) { 1571 DRV_LOG(ERR, "metadata mode %u is not supported " 1572 "(no metadata reg_c[0] is available)", 1573 sh->config.dv_xmeta_en); 1574 err = ENOTSUP; 1575 goto error; 1576 } 1577 /* Query availability of metadata reg_c's. */ 1578 if (!priv->sh->metadata_regc_check_flag) { 1579 err = mlx5_flow_discover_mreg_c(eth_dev); 1580 if (err < 0) { 1581 err = -err; 1582 goto error; 1583 } 1584 } 1585 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1586 DRV_LOG(DEBUG, 1587 "port %u extensive metadata register is not supported", 1588 eth_dev->data->port_id); 1589 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1590 DRV_LOG(ERR, "metadata mode %u is not supported " 1591 "(no metadata registers available)", 1592 sh->config.dv_xmeta_en); 1593 err = ENOTSUP; 1594 goto error; 1595 } 1596 } 1597 if (sh->config.dv_flow_en && 1598 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1599 mlx5_flow_ext_mreg_supported(eth_dev) && 1600 priv->sh->dv_regc0_mask) { 1601 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1602 MLX5_FLOW_MREG_HTABLE_SZ, 1603 false, true, eth_dev, 1604 flow_dv_mreg_create_cb, 1605 flow_dv_mreg_match_cb, 1606 flow_dv_mreg_remove_cb, 1607 flow_dv_mreg_clone_cb, 1608 flow_dv_mreg_clone_free_cb); 1609 if (!priv->mreg_cp_tbl) { 1610 err = ENOMEM; 1611 goto error; 1612 } 1613 } 1614 rte_spinlock_init(&priv->shared_act_sl); 1615 mlx5_flow_counter_mode_config(eth_dev); 1616 mlx5_flow_drop_action_config(eth_dev); 1617 if (sh->config.dv_flow_en) 1618 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1619 return eth_dev; 1620 error: 1621 if (priv) { 1622 if (priv->mreg_cp_tbl) 1623 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1624 if (priv->sh) 1625 mlx5_os_free_shared_dr(priv); 1626 if (priv->nl_socket_route >= 0) 1627 close(priv->nl_socket_route); 1628 if (priv->vmwa_context) 1629 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1630 if (eth_dev && priv->drop_queue.hrxq) 1631 mlx5_drop_action_destroy(eth_dev); 1632 if (priv->mtr_profile_tbl) 1633 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1634 if (own_domain_id) 1635 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1636 if (priv->hrxqs) 1637 mlx5_list_destroy(priv->hrxqs); 1638 if (eth_dev && priv->flex_item_map) 1639 mlx5_flex_item_port_cleanup(eth_dev); 1640 mlx5_free(priv->ext_rxqs); 1641 mlx5_free(priv); 1642 if (eth_dev != NULL) 1643 eth_dev->data->dev_private = NULL; 1644 } 1645 if (eth_dev != NULL) { 1646 /* mac_addrs must not be freed alone because part of 1647 * dev_private 1648 **/ 1649 eth_dev->data->mac_addrs = NULL; 1650 rte_eth_dev_release_port(eth_dev); 1651 } 1652 if (sh) 1653 mlx5_free_shared_dev_ctx(sh); 1654 if (nl_rdma >= 0) 1655 close(nl_rdma); 1656 MLX5_ASSERT(err > 0); 1657 rte_errno = err; 1658 return NULL; 1659 } 1660 1661 /** 1662 * Comparison callback to sort device data. 1663 * 1664 * This is meant to be used with qsort(). 1665 * 1666 * @param a[in] 1667 * Pointer to pointer to first data object. 1668 * @param b[in] 1669 * Pointer to pointer to second data object. 1670 * 1671 * @return 1672 * 0 if both objects are equal, less than 0 if the first argument is less 1673 * than the second, greater than 0 otherwise. 1674 */ 1675 static int 1676 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1677 { 1678 const struct mlx5_switch_info *si_a = 1679 &((const struct mlx5_dev_spawn_data *)a)->info; 1680 const struct mlx5_switch_info *si_b = 1681 &((const struct mlx5_dev_spawn_data *)b)->info; 1682 int ret; 1683 1684 /* Master device first. */ 1685 ret = si_b->master - si_a->master; 1686 if (ret) 1687 return ret; 1688 /* Then representor devices. */ 1689 ret = si_b->representor - si_a->representor; 1690 if (ret) 1691 return ret; 1692 /* Unidentified devices come last in no specific order. */ 1693 if (!si_a->representor) 1694 return 0; 1695 /* Order representors by name. */ 1696 return si_a->port_name - si_b->port_name; 1697 } 1698 1699 /** 1700 * Match PCI information for possible slaves of bonding device. 1701 * 1702 * @param[in] ibdev_name 1703 * Name of Infiniband device. 1704 * @param[in] pci_dev 1705 * Pointer to primary PCI address structure to match. 1706 * @param[in] nl_rdma 1707 * Netlink RDMA group socket handle. 1708 * @param[in] owner 1709 * Representor owner PF index. 1710 * @param[out] bond_info 1711 * Pointer to bonding information. 1712 * 1713 * @return 1714 * negative value if no bonding device found, otherwise 1715 * positive index of slave PF in bonding. 1716 */ 1717 static int 1718 mlx5_device_bond_pci_match(const char *ibdev_name, 1719 const struct rte_pci_addr *pci_dev, 1720 int nl_rdma, uint16_t owner, 1721 struct mlx5_bond_info *bond_info) 1722 { 1723 char ifname[IF_NAMESIZE + 1]; 1724 unsigned int ifindex; 1725 unsigned int np, i; 1726 FILE *bond_file = NULL, *file; 1727 int pf = -1; 1728 int ret; 1729 uint8_t cur_guid[32] = {0}; 1730 uint8_t guid[32] = {0}; 1731 1732 /* 1733 * Try to get master device name. If something goes wrong suppose 1734 * the lack of kernel support and no bonding devices. 1735 */ 1736 memset(bond_info, 0, sizeof(*bond_info)); 1737 if (nl_rdma < 0) 1738 return -1; 1739 if (!strstr(ibdev_name, "bond")) 1740 return -1; 1741 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1742 if (!np) 1743 return -1; 1744 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1745 return -1; 1746 /* 1747 * The master device might not be on the predefined port(not on port 1748 * index 1, it is not guaranteed), we have to scan all Infiniband 1749 * device ports and find master. 1750 */ 1751 for (i = 1; i <= np; ++i) { 1752 /* Check whether Infiniband port is populated. */ 1753 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1754 if (!ifindex) 1755 continue; 1756 if (!if_indextoname(ifindex, ifname)) 1757 continue; 1758 /* Try to read bonding slave names from sysfs. */ 1759 MKSTR(slaves, 1760 "/sys/class/net/%s/master/bonding/slaves", ifname); 1761 bond_file = fopen(slaves, "r"); 1762 if (bond_file) 1763 break; 1764 } 1765 if (!bond_file) 1766 return -1; 1767 /* Use safe format to check maximal buffer length. */ 1768 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1769 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1770 char tmp_str[IF_NAMESIZE + 32]; 1771 struct rte_pci_addr pci_addr; 1772 struct mlx5_switch_info info; 1773 int ret; 1774 1775 /* Process slave interface names in the loop. */ 1776 snprintf(tmp_str, sizeof(tmp_str), 1777 "/sys/class/net/%s", ifname); 1778 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1779 DRV_LOG(WARNING, 1780 "Cannot get PCI address for netdev \"%s\".", 1781 ifname); 1782 continue; 1783 } 1784 /* Slave interface PCI address match found. */ 1785 snprintf(tmp_str, sizeof(tmp_str), 1786 "/sys/class/net/%s/phys_port_name", ifname); 1787 file = fopen(tmp_str, "rb"); 1788 if (!file) 1789 break; 1790 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1791 if (fscanf(file, "%32s", tmp_str) == 1) 1792 mlx5_translate_port_name(tmp_str, &info); 1793 fclose(file); 1794 /* Only process PF ports. */ 1795 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1796 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1797 continue; 1798 /* Check max bonding member. */ 1799 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1800 DRV_LOG(WARNING, "bonding index out of range, " 1801 "please increase MLX5_BOND_MAX_PORTS: %s", 1802 tmp_str); 1803 break; 1804 } 1805 /* Get ifindex. */ 1806 snprintf(tmp_str, sizeof(tmp_str), 1807 "/sys/class/net/%s/ifindex", ifname); 1808 file = fopen(tmp_str, "rb"); 1809 if (!file) 1810 break; 1811 ret = fscanf(file, "%u", &ifindex); 1812 fclose(file); 1813 if (ret != 1) 1814 break; 1815 /* Save bonding info. */ 1816 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1817 sizeof(bond_info->ports[0].ifname)); 1818 bond_info->ports[info.port_name].pci_addr = pci_addr; 1819 bond_info->ports[info.port_name].ifindex = ifindex; 1820 bond_info->n_port++; 1821 /* 1822 * Under socket direct mode, bonding will use 1823 * system_image_guid as identification. 1824 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1825 * All bonding members should have the same guid even if driver 1826 * is using PCIe BDF. 1827 */ 1828 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1829 if (ret < 0) 1830 break; 1831 else if (ret > 0) { 1832 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1833 owner == info.port_name && 1834 (owner != 0 || (owner == 0 && 1835 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1836 pf = info.port_name; 1837 } else if (pci_dev->domain == pci_addr.domain && 1838 pci_dev->bus == pci_addr.bus && 1839 pci_dev->devid == pci_addr.devid && 1840 ((pci_dev->function == 0 && 1841 pci_dev->function + owner == pci_addr.function) || 1842 (pci_dev->function == owner && 1843 pci_addr.function == owner))) 1844 pf = info.port_name; 1845 } 1846 if (pf >= 0) { 1847 /* Get bond interface info */ 1848 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1849 bond_info->ifname); 1850 if (ret) 1851 DRV_LOG(ERR, "unable to get bond info: %s", 1852 strerror(rte_errno)); 1853 else 1854 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1855 ifindex, bond_info->ifindex, bond_info->ifname); 1856 } 1857 if (owner == 0 && pf != 0) { 1858 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", 1859 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1860 pci_dev->function); 1861 } 1862 return pf; 1863 } 1864 1865 /** 1866 * Register a PCI device within bonding. 1867 * 1868 * This function spawns Ethernet devices out of a given PCI device and 1869 * bonding owner PF index. 1870 * 1871 * @param[in] cdev 1872 * Pointer to common mlx5 device structure. 1873 * @param[in] req_eth_da 1874 * Requested ethdev device argument. 1875 * @param[in] owner_id 1876 * Requested owner PF port ID within bonding device, default to 0. 1877 * @param[in, out] mkvlist 1878 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1879 * 1880 * @return 1881 * 0 on success, a negative errno value otherwise and rte_errno is set. 1882 */ 1883 static int 1884 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 1885 struct rte_eth_devargs *req_eth_da, 1886 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 1887 { 1888 struct ibv_device **ibv_list; 1889 /* 1890 * Number of found IB Devices matching with requested PCI BDF. 1891 * nd != 1 means there are multiple IB devices over the same 1892 * PCI device and we have representors and master. 1893 */ 1894 unsigned int nd = 0; 1895 /* 1896 * Number of found IB device Ports. nd = 1 and np = 1..n means 1897 * we have the single multiport IB device, and there may be 1898 * representors attached to some of found ports. 1899 */ 1900 unsigned int np = 0; 1901 /* 1902 * Number of DPDK ethernet devices to Spawn - either over 1903 * multiple IB devices or multiple ports of single IB device. 1904 * Actually this is the number of iterations to spawn. 1905 */ 1906 unsigned int ns = 0; 1907 /* 1908 * Bonding device 1909 * < 0 - no bonding device (single one) 1910 * >= 0 - bonding device (value is slave PF index) 1911 */ 1912 int bd = -1; 1913 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 1914 struct mlx5_dev_spawn_data *list = NULL; 1915 struct rte_eth_devargs eth_da = *req_eth_da; 1916 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 1917 struct mlx5_bond_info bond_info; 1918 int ret = -1; 1919 1920 errno = 0; 1921 ibv_list = mlx5_glue->get_device_list(&ret); 1922 if (!ibv_list) { 1923 rte_errno = errno ? errno : ENOSYS; 1924 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 1925 return -rte_errno; 1926 } 1927 /* 1928 * First scan the list of all Infiniband devices to find 1929 * matching ones, gathering into the list. 1930 */ 1931 struct ibv_device *ibv_match[ret + 1]; 1932 int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1933 int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1934 unsigned int i; 1935 1936 while (ret-- > 0) { 1937 struct rte_pci_addr pci_addr; 1938 1939 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 1940 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 1941 nl_rdma, owner_id, &bond_info); 1942 if (bd >= 0) { 1943 /* 1944 * Bonding device detected. Only one match is allowed, 1945 * the bonding is supported over multi-port IB device, 1946 * there should be no matches on representor PCI 1947 * functions or non VF LAG bonding devices with 1948 * specified address. 1949 */ 1950 if (nd) { 1951 DRV_LOG(ERR, 1952 "multiple PCI match on bonding device" 1953 "\"%s\" found", ibv_list[ret]->name); 1954 rte_errno = ENOENT; 1955 ret = -rte_errno; 1956 goto exit; 1957 } 1958 /* Amend owner pci address if owner PF ID specified. */ 1959 if (eth_da.nb_representor_ports) 1960 owner_pci.function += owner_id; 1961 DRV_LOG(INFO, 1962 "PCI information matches for slave %d bonding device \"%s\"", 1963 bd, ibv_list[ret]->name); 1964 ibv_match[nd++] = ibv_list[ret]; 1965 break; 1966 } else { 1967 /* Bonding device not found. */ 1968 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 1969 &pci_addr)) 1970 continue; 1971 if (owner_pci.domain != pci_addr.domain || 1972 owner_pci.bus != pci_addr.bus || 1973 owner_pci.devid != pci_addr.devid || 1974 owner_pci.function != pci_addr.function) 1975 continue; 1976 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 1977 ibv_list[ret]->name); 1978 ibv_match[nd++] = ibv_list[ret]; 1979 } 1980 } 1981 ibv_match[nd] = NULL; 1982 if (!nd) { 1983 /* No device matches, just complain and bail out. */ 1984 DRV_LOG(WARNING, 1985 "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT "," 1986 " are kernel drivers loaded?", 1987 owner_id, owner_pci.domain, owner_pci.bus, 1988 owner_pci.devid, owner_pci.function); 1989 rte_errno = ENOENT; 1990 ret = -rte_errno; 1991 goto exit; 1992 } 1993 if (nd == 1) { 1994 /* 1995 * Found single matching device may have multiple ports. 1996 * Each port may be representor, we have to check the port 1997 * number and check the representors existence. 1998 */ 1999 if (nl_rdma >= 0) 2000 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 2001 if (!np) 2002 DRV_LOG(WARNING, 2003 "Cannot get IB device \"%s\" ports number.", 2004 ibv_match[0]->name); 2005 if (bd >= 0 && !np) { 2006 DRV_LOG(ERR, "Cannot get ports for bonding device."); 2007 rte_errno = ENOENT; 2008 ret = -rte_errno; 2009 goto exit; 2010 } 2011 } 2012 /* Now we can determine the maximal amount of devices to be spawned. */ 2013 list = mlx5_malloc(MLX5_MEM_ZERO, 2014 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2015 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2016 if (!list) { 2017 DRV_LOG(ERR, "Spawn data array allocation failure."); 2018 rte_errno = ENOMEM; 2019 ret = -rte_errno; 2020 goto exit; 2021 } 2022 if (bd >= 0 || np > 1) { 2023 /* 2024 * Single IB device with multiple ports found, 2025 * it may be E-Switch master device and representors. 2026 * We have to perform identification through the ports. 2027 */ 2028 MLX5_ASSERT(nl_rdma >= 0); 2029 MLX5_ASSERT(ns == 0); 2030 MLX5_ASSERT(nd == 1); 2031 MLX5_ASSERT(np); 2032 for (i = 1; i <= np; ++i) { 2033 list[ns].bond_info = &bond_info; 2034 list[ns].max_port = np; 2035 list[ns].phys_port = i; 2036 list[ns].phys_dev_name = ibv_match[0]->name; 2037 list[ns].eth_dev = NULL; 2038 list[ns].pci_dev = pci_dev; 2039 list[ns].cdev = cdev; 2040 list[ns].pf_bond = bd; 2041 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2042 ibv_match[0]->name, 2043 i); 2044 if (!list[ns].ifindex) { 2045 /* 2046 * No network interface index found for the 2047 * specified port, it means there is no 2048 * representor on this port. It's OK, 2049 * there can be disabled ports, for example 2050 * if sriov_numvfs < sriov_totalvfs. 2051 */ 2052 continue; 2053 } 2054 ret = -1; 2055 if (nl_route >= 0) 2056 ret = mlx5_nl_switch_info(nl_route, 2057 list[ns].ifindex, 2058 &list[ns].info); 2059 if (ret || (!list[ns].info.representor && 2060 !list[ns].info.master)) { 2061 /* 2062 * We failed to recognize representors with 2063 * Netlink, let's try to perform the task 2064 * with sysfs. 2065 */ 2066 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2067 &list[ns].info); 2068 } 2069 if (!ret && bd >= 0) { 2070 switch (list[ns].info.name_type) { 2071 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2072 if (np == 1) { 2073 /* 2074 * Force standalone bonding 2075 * device for ROCE LAG 2076 * configurations. 2077 */ 2078 list[ns].info.master = 0; 2079 list[ns].info.representor = 0; 2080 } 2081 if (list[ns].info.port_name == bd) 2082 ns++; 2083 break; 2084 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2085 /* Fallthrough */ 2086 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2087 /* Fallthrough */ 2088 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2089 if (list[ns].info.pf_num == bd) 2090 ns++; 2091 break; 2092 default: 2093 break; 2094 } 2095 continue; 2096 } 2097 if (!ret && (list[ns].info.representor ^ 2098 list[ns].info.master)) 2099 ns++; 2100 } 2101 if (!ns) { 2102 DRV_LOG(ERR, 2103 "Unable to recognize master/representors on the IB device with multiple ports."); 2104 rte_errno = ENOENT; 2105 ret = -rte_errno; 2106 goto exit; 2107 } 2108 } else { 2109 /* 2110 * The existence of several matching entries (nd > 1) means 2111 * port representors have been instantiated. No existing Verbs 2112 * call nor sysfs entries can tell them apart, this can only 2113 * be done through Netlink calls assuming kernel drivers are 2114 * recent enough to support them. 2115 * 2116 * In the event of identification failure through Netlink, 2117 * try again through sysfs, then: 2118 * 2119 * 1. A single IB device matches (nd == 1) with single 2120 * port (np=0/1) and is not a representor, assume 2121 * no switch support. 2122 * 2123 * 2. Otherwise no safe assumptions can be made; 2124 * complain louder and bail out. 2125 */ 2126 for (i = 0; i != nd; ++i) { 2127 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2128 list[ns].bond_info = NULL; 2129 list[ns].max_port = 1; 2130 list[ns].phys_port = 1; 2131 list[ns].phys_dev_name = ibv_match[i]->name; 2132 list[ns].eth_dev = NULL; 2133 list[ns].pci_dev = pci_dev; 2134 list[ns].cdev = cdev; 2135 list[ns].pf_bond = -1; 2136 list[ns].ifindex = 0; 2137 if (nl_rdma >= 0) 2138 list[ns].ifindex = mlx5_nl_ifindex 2139 (nl_rdma, 2140 ibv_match[i]->name, 2141 1); 2142 if (!list[ns].ifindex) { 2143 char ifname[IF_NAMESIZE]; 2144 2145 /* 2146 * Netlink failed, it may happen with old 2147 * ib_core kernel driver (before 4.16). 2148 * We can assume there is old driver because 2149 * here we are processing single ports IB 2150 * devices. Let's try sysfs to retrieve 2151 * the ifindex. The method works for 2152 * master device only. 2153 */ 2154 if (nd > 1) { 2155 /* 2156 * Multiple devices found, assume 2157 * representors, can not distinguish 2158 * master/representor and retrieve 2159 * ifindex via sysfs. 2160 */ 2161 continue; 2162 } 2163 ret = mlx5_get_ifname_sysfs 2164 (ibv_match[i]->ibdev_path, ifname); 2165 if (!ret) 2166 list[ns].ifindex = 2167 if_nametoindex(ifname); 2168 if (!list[ns].ifindex) { 2169 /* 2170 * No network interface index found 2171 * for the specified device, it means 2172 * there it is neither representor 2173 * nor master. 2174 */ 2175 continue; 2176 } 2177 } 2178 ret = -1; 2179 if (nl_route >= 0) 2180 ret = mlx5_nl_switch_info(nl_route, 2181 list[ns].ifindex, 2182 &list[ns].info); 2183 if (ret || (!list[ns].info.representor && 2184 !list[ns].info.master)) { 2185 /* 2186 * We failed to recognize representors with 2187 * Netlink, let's try to perform the task 2188 * with sysfs. 2189 */ 2190 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2191 &list[ns].info); 2192 } 2193 if (!ret && (list[ns].info.representor ^ 2194 list[ns].info.master)) { 2195 ns++; 2196 } else if ((nd == 1) && 2197 !list[ns].info.representor && 2198 !list[ns].info.master) { 2199 /* 2200 * Single IB device with one physical port and 2201 * attached network device. 2202 * May be SRIOV is not enabled or there is no 2203 * representors. 2204 */ 2205 DRV_LOG(INFO, "No E-Switch support detected."); 2206 ns++; 2207 break; 2208 } 2209 } 2210 if (!ns) { 2211 DRV_LOG(ERR, 2212 "Unable to recognize master/representors on the multiple IB devices."); 2213 rte_errno = ENOENT; 2214 ret = -rte_errno; 2215 goto exit; 2216 } 2217 /* 2218 * New kernels may add the switch_id attribute for the case 2219 * there is no E-Switch and we wrongly recognized the only 2220 * device as master. Override this if there is the single 2221 * device with single port and new device name format present. 2222 */ 2223 if (nd == 1 && 2224 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2225 list[0].info.master = 0; 2226 list[0].info.representor = 0; 2227 } 2228 } 2229 MLX5_ASSERT(ns); 2230 /* 2231 * Sort list to probe devices in natural order for users convenience 2232 * (i.e. master first, then representors from lowest to highest ID). 2233 */ 2234 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2235 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2236 /* Set devargs default values. */ 2237 if (eth_da.nb_mh_controllers == 0) { 2238 eth_da.nb_mh_controllers = 1; 2239 eth_da.mh_controllers[0] = 0; 2240 } 2241 if (eth_da.nb_ports == 0 && ns > 0) { 2242 if (list[0].pf_bond >= 0 && list[0].info.representor) 2243 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2244 pci_dev->device.devargs->args); 2245 eth_da.nb_ports = 1; 2246 eth_da.ports[0] = list[0].info.pf_num; 2247 } 2248 if (eth_da.nb_representor_ports == 0) { 2249 eth_da.nb_representor_ports = 1; 2250 eth_da.representor_ports[0] = 0; 2251 } 2252 } 2253 for (i = 0; i != ns; ++i) { 2254 uint32_t restore; 2255 2256 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2257 mkvlist); 2258 if (!list[i].eth_dev) { 2259 if (rte_errno != EBUSY && rte_errno != EEXIST) 2260 break; 2261 /* Device is disabled or already spawned. Ignore it. */ 2262 continue; 2263 } 2264 restore = list[i].eth_dev->data->dev_flags; 2265 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2266 /** 2267 * Each representor has a dedicated interrupts vector. 2268 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2269 * representor eth_dev object because representor and PF 2270 * share the same PCI address. 2271 * Override representor device with a dedicated 2272 * interrupts handle here. 2273 * Representor interrupts handle is released in mlx5_dev_stop(). 2274 */ 2275 if (list[i].info.representor) { 2276 struct rte_intr_handle *intr_handle = 2277 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2278 if (intr_handle == NULL) { 2279 DRV_LOG(ERR, 2280 "port %u failed to allocate memory for interrupt handler " 2281 "Rx interrupts will not be supported", 2282 i); 2283 rte_errno = ENOMEM; 2284 ret = -rte_errno; 2285 goto exit; 2286 } 2287 list[i].eth_dev->intr_handle = intr_handle; 2288 } 2289 /* Restore non-PCI flags cleared by the above call. */ 2290 list[i].eth_dev->data->dev_flags |= restore; 2291 rte_eth_dev_probing_finish(list[i].eth_dev); 2292 } 2293 if (i != ns) { 2294 DRV_LOG(ERR, 2295 "probe of PCI device " PCI_PRI_FMT " aborted after" 2296 " encountering an error: %s", 2297 owner_pci.domain, owner_pci.bus, 2298 owner_pci.devid, owner_pci.function, 2299 strerror(rte_errno)); 2300 ret = -rte_errno; 2301 /* Roll back. */ 2302 while (i--) { 2303 if (!list[i].eth_dev) 2304 continue; 2305 mlx5_dev_close(list[i].eth_dev); 2306 /* mac_addrs must not be freed because in dev_private */ 2307 list[i].eth_dev->data->mac_addrs = NULL; 2308 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2309 } 2310 /* Restore original error. */ 2311 rte_errno = -ret; 2312 } else { 2313 ret = 0; 2314 } 2315 exit: 2316 /* 2317 * Do the routine cleanup: 2318 * - close opened Netlink sockets 2319 * - free allocated spawn data array 2320 * - free the Infiniband device list 2321 */ 2322 if (nl_rdma >= 0) 2323 close(nl_rdma); 2324 if (nl_route >= 0) 2325 close(nl_route); 2326 if (list) 2327 mlx5_free(list); 2328 MLX5_ASSERT(ibv_list); 2329 mlx5_glue->free_device_list(ibv_list); 2330 return ret; 2331 } 2332 2333 static int 2334 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2335 struct rte_eth_devargs *eth_da) 2336 { 2337 int ret = 0; 2338 2339 if (dev->devargs == NULL) 2340 return 0; 2341 memset(eth_da, 0, sizeof(*eth_da)); 2342 /* Parse representor information first from class argument. */ 2343 if (dev->devargs->cls_str) 2344 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2345 if (ret != 0) { 2346 DRV_LOG(ERR, "failed to parse device arguments: %s", 2347 dev->devargs->cls_str); 2348 return -rte_errno; 2349 } 2350 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) { 2351 /* Parse legacy device argument */ 2352 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2353 if (ret) { 2354 DRV_LOG(ERR, "failed to parse device arguments: %s", 2355 dev->devargs->args); 2356 return -rte_errno; 2357 } 2358 } 2359 return 0; 2360 } 2361 2362 /** 2363 * Callback to register a PCI device. 2364 * 2365 * This function spawns Ethernet devices out of a given PCI device. 2366 * 2367 * @param[in] cdev 2368 * Pointer to common mlx5 device structure. 2369 * @param[in, out] mkvlist 2370 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2371 * 2372 * @return 2373 * 0 on success, a negative errno value otherwise and rte_errno is set. 2374 */ 2375 static int 2376 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2377 struct mlx5_kvargs_ctrl *mkvlist) 2378 { 2379 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2380 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2381 int ret = 0; 2382 uint16_t p; 2383 2384 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2385 if (ret != 0) 2386 return ret; 2387 2388 if (eth_da.nb_ports > 0) { 2389 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2390 for (p = 0; p < eth_da.nb_ports; p++) { 2391 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2392 eth_da.ports[p], mkvlist); 2393 if (ret) { 2394 DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " " 2395 "aborted due to proding failure of PF %u", 2396 pci_dev->addr.domain, pci_dev->addr.bus, 2397 pci_dev->addr.devid, pci_dev->addr.function, 2398 eth_da.ports[p]); 2399 mlx5_net_remove(cdev); 2400 if (p != 0) 2401 break; 2402 } 2403 } 2404 } else { 2405 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2406 } 2407 return ret; 2408 } 2409 2410 /* Probe a single SF device on auxiliary bus, no representor support. */ 2411 static int 2412 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2413 struct mlx5_kvargs_ctrl *mkvlist) 2414 { 2415 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2416 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 2417 struct rte_device *dev = cdev->dev; 2418 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2419 struct rte_eth_dev *eth_dev; 2420 int ret = 0; 2421 2422 /* Parse ethdev devargs. */ 2423 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2424 if (ret != 0) 2425 return ret; 2426 /* Init spawn data. */ 2427 spawn.max_port = 1; 2428 spawn.phys_port = 1; 2429 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2430 ret = mlx5_auxiliary_get_ifindex(dev->name); 2431 if (ret < 0) { 2432 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2433 return ret; 2434 } 2435 spawn.ifindex = ret; 2436 spawn.cdev = cdev; 2437 /* Spawn device. */ 2438 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2439 if (eth_dev == NULL) 2440 return -rte_errno; 2441 /* Post create. */ 2442 eth_dev->intr_handle = adev->intr_handle; 2443 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2444 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2445 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2446 eth_dev->data->numa_node = dev->numa_node; 2447 } 2448 rte_eth_dev_probing_finish(eth_dev); 2449 return 0; 2450 } 2451 2452 /** 2453 * Net class driver callback to probe a device. 2454 * 2455 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2456 * 2457 * @param[in] cdev 2458 * Pointer to the common mlx5 device. 2459 * @param[in, out] mkvlist 2460 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2461 * 2462 * @return 2463 * 0 on success, a negative errno value otherwise and rte_errno is set. 2464 */ 2465 int 2466 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2467 struct mlx5_kvargs_ctrl *mkvlist) 2468 { 2469 int ret; 2470 2471 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2472 mlx5_pmd_socket_init(); 2473 ret = mlx5_init_once(); 2474 if (ret) { 2475 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2476 strerror(rte_errno)); 2477 return -rte_errno; 2478 } 2479 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2480 if (ret) { 2481 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2482 strerror(rte_errno)); 2483 return -rte_errno; 2484 } 2485 if (mlx5_dev_is_pci(cdev->dev)) 2486 return mlx5_os_pci_probe(cdev, mkvlist); 2487 else 2488 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2489 } 2490 2491 /** 2492 * Cleanup resources when the last device is closed. 2493 */ 2494 void 2495 mlx5_os_net_cleanup(void) 2496 { 2497 mlx5_pmd_socket_uninit(); 2498 } 2499 2500 /** 2501 * Install shared asynchronous device events handler. 2502 * This function is implemented to support event sharing 2503 * between multiple ports of single IB device. 2504 * 2505 * @param sh 2506 * Pointer to mlx5_dev_ctx_shared object. 2507 */ 2508 void 2509 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2510 { 2511 struct ibv_context *ctx = sh->cdev->ctx; 2512 int nlsk_fd; 2513 2514 sh->intr_handle = mlx5_os_interrupt_handler_create 2515 (RTE_INTR_INSTANCE_F_SHARED, true, 2516 ctx->async_fd, mlx5_dev_interrupt_handler, sh); 2517 if (!sh->intr_handle) { 2518 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2519 return; 2520 } 2521 nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK); 2522 if (nlsk_fd < 0) { 2523 DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s", 2524 rte_strerror(rte_errno)); 2525 return; 2526 } 2527 sh->intr_handle_nl = mlx5_os_interrupt_handler_create 2528 (RTE_INTR_INSTANCE_F_SHARED, true, 2529 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh); 2530 if (sh->intr_handle_nl == NULL) { 2531 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2532 return; 2533 } 2534 if (sh->cdev->config.devx) { 2535 #ifdef HAVE_IBV_DEVX_ASYNC 2536 struct mlx5dv_devx_cmd_comp *devx_comp; 2537 2538 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2539 devx_comp = sh->devx_comp; 2540 if (!devx_comp) { 2541 DRV_LOG(INFO, "failed to allocate devx_comp."); 2542 return; 2543 } 2544 sh->intr_handle_devx = mlx5_os_interrupt_handler_create 2545 (RTE_INTR_INSTANCE_F_SHARED, true, 2546 devx_comp->fd, 2547 mlx5_dev_interrupt_handler_devx, sh); 2548 if (!sh->intr_handle_devx) { 2549 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2550 return; 2551 } 2552 #endif /* HAVE_IBV_DEVX_ASYNC */ 2553 } 2554 } 2555 2556 /** 2557 * Uninstall shared asynchronous device events handler. 2558 * This function is implemented to support event sharing 2559 * between multiple ports of single IB device. 2560 * 2561 * @param dev 2562 * Pointer to mlx5_dev_ctx_shared object. 2563 */ 2564 void 2565 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2566 { 2567 mlx5_os_interrupt_handler_destroy(sh->intr_handle, 2568 mlx5_dev_interrupt_handler, sh); 2569 mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl, 2570 mlx5_dev_interrupt_handler_nl, sh); 2571 #ifdef HAVE_IBV_DEVX_ASYNC 2572 mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx, 2573 mlx5_dev_interrupt_handler_devx, sh); 2574 if (sh->devx_comp) 2575 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2576 #endif 2577 } 2578 2579 /** 2580 * Read statistics by a named counter. 2581 * 2582 * @param[in] priv 2583 * Pointer to the private device data structure. 2584 * @param[in] ctr_name 2585 * Pointer to the name of the statistic counter to read 2586 * @param[out] stat 2587 * Pointer to read statistic value. 2588 * @return 2589 * 0 on success and stat is valud, 1 if failed to read the value 2590 * rte_errno is set. 2591 * 2592 */ 2593 int 2594 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2595 uint64_t *stat) 2596 { 2597 int fd; 2598 2599 if (priv->sh) { 2600 if (priv->q_counters != NULL && 2601 strcmp(ctr_name, "out_of_buffer") == 0) 2602 return mlx5_devx_cmd_queue_counter_query 2603 (priv->q_counters, 0, (uint32_t *)stat); 2604 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2605 priv->sh->ibdev_path, 2606 priv->dev_port, 2607 ctr_name); 2608 fd = open(path, O_RDONLY); 2609 /* 2610 * in switchdev the file location is not per port 2611 * but rather in <ibdev_path>/hw_counters/<file_name>. 2612 */ 2613 if (fd == -1) { 2614 MKSTR(path1, "%s/hw_counters/%s", 2615 priv->sh->ibdev_path, 2616 ctr_name); 2617 fd = open(path1, O_RDONLY); 2618 } 2619 if (fd != -1) { 2620 char buf[21] = {'\0'}; 2621 ssize_t n = read(fd, buf, sizeof(buf)); 2622 2623 close(fd); 2624 if (n != -1) { 2625 *stat = strtoull(buf, NULL, 10); 2626 return 0; 2627 } 2628 } 2629 } 2630 *stat = 0; 2631 return 1; 2632 } 2633 2634 /** 2635 * Remove a MAC address from device 2636 * 2637 * @param dev 2638 * Pointer to Ethernet device structure. 2639 * @param index 2640 * MAC address index. 2641 */ 2642 void 2643 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2644 { 2645 struct mlx5_priv *priv = dev->data->dev_private; 2646 const int vf = priv->sh->dev_cap.vf; 2647 2648 if (vf) 2649 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2650 mlx5_ifindex(dev), priv->mac_own, 2651 &dev->data->mac_addrs[index], index); 2652 } 2653 2654 /** 2655 * Adds a MAC address to the device 2656 * 2657 * @param dev 2658 * Pointer to Ethernet device structure. 2659 * @param mac_addr 2660 * MAC address to register. 2661 * @param index 2662 * MAC address index. 2663 * 2664 * @return 2665 * 0 on success, a negative errno value otherwise 2666 */ 2667 int 2668 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2669 uint32_t index) 2670 { 2671 struct mlx5_priv *priv = dev->data->dev_private; 2672 const int vf = priv->sh->dev_cap.vf; 2673 int ret = 0; 2674 2675 if (vf) 2676 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2677 mlx5_ifindex(dev), priv->mac_own, 2678 mac, index); 2679 return ret; 2680 } 2681 2682 /** 2683 * Modify a VF MAC address 2684 * 2685 * @param priv 2686 * Pointer to device private data. 2687 * @param mac_addr 2688 * MAC address to modify into. 2689 * @param iface_idx 2690 * Net device interface index 2691 * @param vf_index 2692 * VF index 2693 * 2694 * @return 2695 * 0 on success, a negative errno value otherwise 2696 */ 2697 int 2698 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2699 unsigned int iface_idx, 2700 struct rte_ether_addr *mac_addr, 2701 int vf_index) 2702 { 2703 return mlx5_nl_vf_mac_addr_modify 2704 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2705 } 2706 2707 /** 2708 * Set device promiscuous mode 2709 * 2710 * @param dev 2711 * Pointer to Ethernet device structure. 2712 * @param enable 2713 * 0 - promiscuous is disabled, otherwise - enabled 2714 * 2715 * @return 2716 * 0 on success, a negative error value otherwise 2717 */ 2718 int 2719 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2720 { 2721 struct mlx5_priv *priv = dev->data->dev_private; 2722 2723 return mlx5_nl_promisc(priv->nl_socket_route, 2724 mlx5_ifindex(dev), !!enable); 2725 } 2726 2727 /** 2728 * Set device promiscuous mode 2729 * 2730 * @param dev 2731 * Pointer to Ethernet device structure. 2732 * @param enable 2733 * 0 - all multicase is disabled, otherwise - enabled 2734 * 2735 * @return 2736 * 0 on success, a negative error value otherwise 2737 */ 2738 int 2739 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2740 { 2741 struct mlx5_priv *priv = dev->data->dev_private; 2742 2743 return mlx5_nl_allmulti(priv->nl_socket_route, 2744 mlx5_ifindex(dev), !!enable); 2745 } 2746 2747 /** 2748 * Flush device MAC addresses 2749 * 2750 * @param dev 2751 * Pointer to Ethernet device structure. 2752 * 2753 */ 2754 void 2755 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2756 { 2757 struct mlx5_priv *priv = dev->data->dev_private; 2758 2759 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2760 dev->data->mac_addrs, 2761 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2762 } 2763