1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <bus_driver.h> 23 #include <bus_pci_driver.h> 24 #include <bus_auxiliary_driver.h> 25 #include <rte_common.h> 26 #include <rte_kvargs.h> 27 #include <rte_rwlock.h> 28 #include <rte_spinlock.h> 29 #include <rte_string_fns.h> 30 #include <rte_alarm.h> 31 #include <rte_eal_paging.h> 32 33 #include <mlx5_glue.h> 34 #include <mlx5_devx_cmds.h> 35 #include <mlx5_common.h> 36 #include <mlx5_common_mp.h> 37 #include <mlx5_common_mr.h> 38 #include <mlx5_malloc.h> 39 40 #include "mlx5_defs.h" 41 #include "mlx5.h" 42 #include "mlx5_common_os.h" 43 #include "mlx5_utils.h" 44 #include "mlx5_rxtx.h" 45 #include "mlx5_rx.h" 46 #include "mlx5_tx.h" 47 #include "mlx5_autoconf.h" 48 #include "mlx5_flow.h" 49 #include "rte_pmd_mlx5.h" 50 #include "mlx5_verbs.h" 51 #include "mlx5_nl.h" 52 #include "mlx5_devx.h" 53 54 #ifndef HAVE_IBV_MLX5_MOD_MPW 55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 57 #endif 58 59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 61 #endif 62 63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 64 65 /* Spinlock for mlx5_shared_data allocation. */ 66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 67 68 /* Process local data for secondary processes. */ 69 static struct mlx5_local_data mlx5_local_data; 70 71 /* rte flow indexed pool configuration. */ 72 static struct mlx5_indexed_pool_config icfg[] = { 73 { 74 .size = sizeof(struct rte_flow), 75 .trunk_size = 64, 76 .need_lock = 1, 77 .release_mem_en = 0, 78 .malloc = mlx5_malloc, 79 .free = mlx5_free, 80 .per_core_cache = 0, 81 .type = "ctl_flow_ipool", 82 }, 83 { 84 .size = sizeof(struct rte_flow), 85 .trunk_size = 64, 86 .grow_trunk = 3, 87 .grow_shift = 2, 88 .need_lock = 1, 89 .release_mem_en = 0, 90 .malloc = mlx5_malloc, 91 .free = mlx5_free, 92 .per_core_cache = 1 << 14, 93 .type = "rte_flow_ipool", 94 }, 95 { 96 .size = sizeof(struct rte_flow), 97 .trunk_size = 64, 98 .grow_trunk = 3, 99 .grow_shift = 2, 100 .need_lock = 1, 101 .release_mem_en = 0, 102 .malloc = mlx5_malloc, 103 .free = mlx5_free, 104 .per_core_cache = 0, 105 .type = "mcp_flow_ipool", 106 }, 107 }; 108 109 /** 110 * Set the completion channel file descriptor interrupt as non-blocking. 111 * 112 * @param[in] rxq_obj 113 * Pointer to RQ channel object, which includes the channel fd 114 * 115 * @param[out] fd 116 * The file descriptor (representing the interrupt) used in this channel. 117 * 118 * @return 119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 120 */ 121 int 122 mlx5_os_set_nonblock_channel_fd(int fd) 123 { 124 int flags; 125 126 flags = fcntl(fd, F_GETFL); 127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 128 } 129 130 /** 131 * Get mlx5 device attributes. The glue function query_device_ex() is called 132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 133 * device attributes from the glue out parameter. 134 * 135 * @param sh 136 * Pointer to shared device context. 137 * 138 * @return 139 * 0 on success, a negative errno value otherwise and rte_errno is set. 140 */ 141 int 142 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 143 { 144 int err; 145 struct mlx5_common_device *cdev = sh->cdev; 146 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 147 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 148 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 149 150 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 151 if (err) { 152 rte_errno = errno; 153 return -rte_errno; 154 } 155 #ifdef HAVE_IBV_MLX5_MOD_SWP 156 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 157 #endif 158 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 159 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 160 #endif 161 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 162 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 163 #endif 164 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 165 if (err) { 166 rte_errno = errno; 167 return -rte_errno; 168 } 169 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 170 if (mlx5_dev_is_pci(cdev->dev)) 171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 172 else 173 sh->dev_cap.sf = 1; 174 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 175 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 176 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 177 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 178 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 179 sh->dev_cap.dest_tir = 1; 180 #endif 181 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 182 DRV_LOG(DEBUG, "DV flow is supported."); 183 sh->dev_cap.dv_flow_en = 1; 184 #endif 185 #ifdef HAVE_MLX5DV_DR_ESWITCH 186 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 187 sh->dev_cap.dv_esw_en = 1; 188 #endif 189 /* 190 * Multi-packet send is supported by ConnectX-4 Lx PF as well 191 * as all ConnectX-5 devices. 192 */ 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 194 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 195 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 196 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 197 } else { 198 DRV_LOG(DEBUG, "MPW is supported."); 199 sh->dev_cap.mps = MLX5_MPW; 200 } 201 } else { 202 DRV_LOG(DEBUG, "MPW isn't supported."); 203 sh->dev_cap.mps = MLX5_MPW_DISABLED; 204 } 205 #if (RTE_CACHE_LINE_SIZE == 128) 206 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 207 sh->dev_cap.cqe_comp = 1; 208 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 209 sh->dev_cap.cqe_comp ? "" : "not "); 210 #else 211 sh->dev_cap.cqe_comp = 1; 212 #endif 213 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 214 sh->dev_cap.mpls_en = 215 ((dv_attr.tunnel_offloads_caps & 216 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 217 (dv_attr.tunnel_offloads_caps & 218 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 219 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 220 sh->dev_cap.mpls_en ? "" : "not "); 221 #else 222 DRV_LOG(WARNING, 223 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 224 #endif 225 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 226 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 227 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 228 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 229 IBV_DEVICE_PCI_WRITE_END_PADDING); 230 #endif 231 sh->dev_cap.hw_csum = 232 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 233 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 234 sh->dev_cap.hw_csum ? "" : "not "); 235 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 236 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 237 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 238 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 239 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 240 IBV_RAW_PACKET_CAP_SCATTER_FCS); 241 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 242 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 243 DRV_LOG(DEBUG, "Counters are not supported."); 244 #endif 245 /* 246 * DPDK doesn't support larger/variable indirection tables. 247 * Once DPDK supports it, take max size from device attr. 248 */ 249 sh->dev_cap.ind_table_max_size = 250 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 251 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 252 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 253 sh->dev_cap.ind_table_max_size); 254 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 255 (attr_ex.tso_caps.supported_qpts & 256 (1 << IBV_QPT_RAW_PACKET))); 257 if (sh->dev_cap.tso) 258 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 259 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 260 sizeof(sh->dev_cap.fw_ver)); 261 #ifdef HAVE_IBV_MLX5_MOD_SWP 262 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 263 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 264 (MLX5_SW_PARSING_CAP | 265 MLX5_SW_PARSING_CSUM_CAP | 266 MLX5_SW_PARSING_TSO_CAP); 267 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 268 #endif 269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 270 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 271 struct mlx5dv_striding_rq_caps *strd_rq_caps = 272 &dv_attr.striding_rq_caps; 273 274 sh->dev_cap.mprq.enabled = 1; 275 sh->dev_cap.mprq.log_min_stride_size = 276 strd_rq_caps->min_single_stride_log_num_of_bytes; 277 sh->dev_cap.mprq.log_max_stride_size = 278 strd_rq_caps->max_single_stride_log_num_of_bytes; 279 sh->dev_cap.mprq.log_min_stride_num = 280 strd_rq_caps->min_single_wqe_log_num_of_strides; 281 sh->dev_cap.mprq.log_max_stride_num = 282 strd_rq_caps->max_single_wqe_log_num_of_strides; 283 sh->dev_cap.mprq.log_min_stride_wqe_size = 284 cdev->config.devx ? 285 hca_attr->log_min_stride_wqe_sz : 286 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 287 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 288 sh->dev_cap.mprq.log_min_stride_size); 289 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 290 sh->dev_cap.mprq.log_max_stride_size); 291 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 292 sh->dev_cap.mprq.log_min_stride_num); 293 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 294 sh->dev_cap.mprq.log_max_stride_num); 295 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 296 sh->dev_cap.mprq.log_min_stride_wqe_size); 297 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 298 strd_rq_caps->supported_qpts); 299 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 300 } 301 #endif 302 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 303 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 304 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 305 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 306 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 307 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 308 } 309 if (sh->dev_cap.tunnel_en) { 310 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 311 sh->dev_cap.tunnel_en & 312 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 313 sh->dev_cap.tunnel_en & 314 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 315 sh->dev_cap.tunnel_en & 316 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 317 } else { 318 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 319 } 320 #else 321 DRV_LOG(WARNING, 322 "Tunnel offloading disabled due to old OFED/rdma-core version"); 323 #endif 324 if (!sh->cdev->config.devx) 325 return 0; 326 /* Check capabilities for Packet Pacing. */ 327 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 328 hca_attr->dev_freq_khz); 329 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 330 hca_attr->qos.packet_pacing ? "" : "not "); 331 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 332 hca_attr->cross_channel ? "" : "not "); 333 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 334 hca_attr->wqe_index_ignore ? "" : "not "); 335 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 336 hca_attr->non_wire_sq ? "" : "not "); 337 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 338 hca_attr->log_max_static_sq_wq ? "" : "not ", 339 hca_attr->log_max_static_sq_wq); 340 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 341 hca_attr->qos.wqe_rate_pp ? "" : "not "); 342 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 343 if (!hca_attr->cross_channel) { 344 DRV_LOG(DEBUG, 345 "Cross channel operations are required for packet pacing."); 346 sh->dev_cap.txpp_en = 0; 347 } 348 if (!hca_attr->wqe_index_ignore) { 349 DRV_LOG(DEBUG, 350 "WQE index ignore feature is required for packet pacing."); 351 sh->dev_cap.txpp_en = 0; 352 } 353 if (!hca_attr->non_wire_sq) { 354 DRV_LOG(DEBUG, 355 "Non-wire SQ feature is required for packet pacing."); 356 sh->dev_cap.txpp_en = 0; 357 } 358 if (!hca_attr->log_max_static_sq_wq) { 359 DRV_LOG(DEBUG, 360 "Static WQE SQ feature is required for packet pacing."); 361 sh->dev_cap.txpp_en = 0; 362 } 363 if (!hca_attr->qos.wqe_rate_pp) { 364 DRV_LOG(DEBUG, 365 "WQE rate mode is required for packet pacing."); 366 sh->dev_cap.txpp_en = 0; 367 } 368 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 369 DRV_LOG(DEBUG, 370 "DevX does not provide UAR offset, can't create queues for packet pacing."); 371 sh->dev_cap.txpp_en = 0; 372 #endif 373 sh->dev_cap.scatter_fcs_w_decap_disable = 374 hca_attr->scatter_fcs_w_decap_disable; 375 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 376 mlx5_rt_timestamp_config(sh, hca_attr); 377 return 0; 378 } 379 380 /** 381 * Detect misc5 support or not 382 * 383 * @param[in] priv 384 * Device private data pointer 385 */ 386 #ifdef HAVE_MLX5DV_DR 387 static void 388 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 389 { 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 391 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 392 * Case: IPv4--->UDP--->VxLAN--->vni 393 */ 394 void *tbl; 395 struct mlx5_flow_dv_match_params matcher_mask; 396 void *match_m; 397 void *matcher; 398 void *headers_m; 399 void *misc5_m; 400 uint32_t *tunnel_header_m; 401 struct mlx5dv_flow_matcher_attr dv_attr; 402 403 memset(&matcher_mask, 0, sizeof(matcher_mask)); 404 matcher_mask.size = sizeof(matcher_mask.buf); 405 match_m = matcher_mask.buf; 406 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 407 misc5_m = MLX5_ADDR_OF(fte_match_param, 408 match_m, misc_parameters_5); 409 tunnel_header_m = (uint32_t *) 410 MLX5_ADDR_OF(fte_match_set_misc5, 411 misc5_m, tunnel_header_1); 412 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 413 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 414 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 415 *tunnel_header_m = 0xffffff; 416 417 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 418 if (!tbl) { 419 DRV_LOG(INFO, "No SW steering support"); 420 return; 421 } 422 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 423 dv_attr.match_mask = (void *)&matcher_mask, 424 dv_attr.match_criteria_enable = 425 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 426 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 427 dv_attr.priority = 3; 428 #ifdef HAVE_MLX5DV_DR_ESWITCH 429 void *misc2_m; 430 if (priv->sh->config.dv_esw_en) { 431 /* FDB enabled reg_c_0 */ 432 dv_attr.match_criteria_enable |= 433 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 434 misc2_m = MLX5_ADDR_OF(fte_match_param, 435 match_m, misc_parameters_2); 436 MLX5_SET(fte_match_set_misc2, misc2_m, 437 metadata_reg_c_0, 0xffff); 438 } 439 #endif 440 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 441 &dv_attr, tbl); 442 if (matcher) { 443 priv->sh->misc5_cap = 1; 444 mlx5_glue->dv_destroy_flow_matcher(matcher); 445 } 446 mlx5_glue->dr_destroy_flow_tbl(tbl); 447 #else 448 RTE_SET_USED(priv); 449 #endif 450 } 451 #endif 452 453 /** 454 * Initialize DR related data within private structure. 455 * Routine checks the reference counter and does actual 456 * resources creation/initialization only if counter is zero. 457 * 458 * @param[in] priv 459 * Pointer to the private device data structure. 460 * 461 * @return 462 * Zero on success, positive error code otherwise. 463 */ 464 static int 465 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 466 { 467 struct mlx5_dev_ctx_shared *sh = priv->sh; 468 char s[MLX5_NAME_SIZE] __rte_unused; 469 int err; 470 471 MLX5_ASSERT(sh && sh->refcnt); 472 if (sh->refcnt > 1) 473 return 0; 474 err = mlx5_alloc_table_hash_list(priv); 475 if (err) 476 goto error; 477 /* The resources below are only valid with DV support. */ 478 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 479 /* Init shared flex parsers list, no need lcore_share */ 480 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 481 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 482 mlx5_flex_parser_create_cb, 483 mlx5_flex_parser_match_cb, 484 mlx5_flex_parser_remove_cb, 485 mlx5_flex_parser_clone_cb, 486 mlx5_flex_parser_clone_free_cb); 487 if (!sh->flex_parsers_dv) 488 goto error; 489 if (priv->sh->config.dv_flow_en == 2) 490 return 0; 491 /* Init port id action list. */ 492 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 493 sh->port_id_action_list = mlx5_list_create(s, sh, true, 494 flow_dv_port_id_create_cb, 495 flow_dv_port_id_match_cb, 496 flow_dv_port_id_remove_cb, 497 flow_dv_port_id_clone_cb, 498 flow_dv_port_id_clone_free_cb); 499 if (!sh->port_id_action_list) 500 goto error; 501 /* Init push vlan action list. */ 502 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 503 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 504 flow_dv_push_vlan_create_cb, 505 flow_dv_push_vlan_match_cb, 506 flow_dv_push_vlan_remove_cb, 507 flow_dv_push_vlan_clone_cb, 508 flow_dv_push_vlan_clone_free_cb); 509 if (!sh->push_vlan_action_list) 510 goto error; 511 /* Init sample action list. */ 512 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 513 sh->sample_action_list = mlx5_list_create(s, sh, true, 514 flow_dv_sample_create_cb, 515 flow_dv_sample_match_cb, 516 flow_dv_sample_remove_cb, 517 flow_dv_sample_clone_cb, 518 flow_dv_sample_clone_free_cb); 519 if (!sh->sample_action_list) 520 goto error; 521 /* Init dest array action list. */ 522 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 523 sh->dest_array_list = mlx5_list_create(s, sh, true, 524 flow_dv_dest_array_create_cb, 525 flow_dv_dest_array_match_cb, 526 flow_dv_dest_array_remove_cb, 527 flow_dv_dest_array_clone_cb, 528 flow_dv_dest_array_clone_free_cb); 529 if (!sh->dest_array_list) 530 goto error; 531 #else 532 if (priv->sh->config.dv_flow_en == 2) 533 return 0; 534 #endif 535 #ifdef HAVE_MLX5DV_DR 536 void *domain; 537 538 /* Reference counter is zero, we should initialize structures. */ 539 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 540 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 541 if (!domain) { 542 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 543 err = errno; 544 goto error; 545 } 546 sh->rx_domain = domain; 547 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 548 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 549 if (!domain) { 550 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 551 err = errno; 552 goto error; 553 } 554 sh->tx_domain = domain; 555 #ifdef HAVE_MLX5DV_DR_ESWITCH 556 if (sh->config.dv_esw_en) { 557 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 558 MLX5DV_DR_DOMAIN_TYPE_FDB); 559 if (!domain) { 560 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 561 err = errno; 562 goto error; 563 } 564 sh->fdb_domain = domain; 565 } 566 /* 567 * The drop action is just some dummy placeholder in rdma-core. It 568 * does not belong to domains and has no any attributes, and, can be 569 * shared by the entire device. 570 */ 571 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 572 if (!sh->dr_drop_action) { 573 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 574 err = errno; 575 goto error; 576 } 577 #endif 578 if (!sh->tunnel_hub && sh->config.dv_miss_info) 579 err = mlx5_alloc_tunnel_hub(sh); 580 if (err) { 581 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 582 goto error; 583 } 584 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 585 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 586 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 587 if (sh->fdb_domain) 588 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 589 } 590 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 591 if (!sh->config.allow_duplicate_pattern) { 592 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 593 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 594 #endif 595 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 596 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 597 if (sh->fdb_domain) 598 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 599 } 600 601 __mlx5_discovery_misc5_cap(priv); 602 #endif /* HAVE_MLX5DV_DR */ 603 sh->default_miss_action = 604 mlx5_glue->dr_create_flow_action_default_miss(); 605 if (!sh->default_miss_action) 606 DRV_LOG(WARNING, "Default miss action is not supported."); 607 LIST_INIT(&sh->shared_rxqs); 608 return 0; 609 error: 610 /* Rollback the created objects. */ 611 if (sh->rx_domain) { 612 mlx5_glue->dr_destroy_domain(sh->rx_domain); 613 sh->rx_domain = NULL; 614 } 615 if (sh->tx_domain) { 616 mlx5_glue->dr_destroy_domain(sh->tx_domain); 617 sh->tx_domain = NULL; 618 } 619 if (sh->fdb_domain) { 620 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 621 sh->fdb_domain = NULL; 622 } 623 if (sh->dr_drop_action) { 624 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 625 sh->dr_drop_action = NULL; 626 } 627 if (sh->pop_vlan_action) { 628 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 629 sh->pop_vlan_action = NULL; 630 } 631 if (sh->encaps_decaps) { 632 mlx5_hlist_destroy(sh->encaps_decaps); 633 sh->encaps_decaps = NULL; 634 } 635 if (sh->modify_cmds) { 636 mlx5_hlist_destroy(sh->modify_cmds); 637 sh->modify_cmds = NULL; 638 } 639 if (sh->tag_table) { 640 /* tags should be destroyed with flow before. */ 641 mlx5_hlist_destroy(sh->tag_table); 642 sh->tag_table = NULL; 643 } 644 if (sh->tunnel_hub) { 645 mlx5_release_tunnel_hub(sh, priv->dev_port); 646 sh->tunnel_hub = NULL; 647 } 648 mlx5_free_table_hash_list(priv); 649 if (sh->port_id_action_list) { 650 mlx5_list_destroy(sh->port_id_action_list); 651 sh->port_id_action_list = NULL; 652 } 653 if (sh->push_vlan_action_list) { 654 mlx5_list_destroy(sh->push_vlan_action_list); 655 sh->push_vlan_action_list = NULL; 656 } 657 if (sh->sample_action_list) { 658 mlx5_list_destroy(sh->sample_action_list); 659 sh->sample_action_list = NULL; 660 } 661 if (sh->dest_array_list) { 662 mlx5_list_destroy(sh->dest_array_list); 663 sh->dest_array_list = NULL; 664 } 665 return err; 666 } 667 668 /** 669 * Destroy DR related data within private structure. 670 * 671 * @param[in] priv 672 * Pointer to the private device data structure. 673 */ 674 void 675 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 676 { 677 struct mlx5_dev_ctx_shared *sh = priv->sh; 678 #ifdef HAVE_MLX5DV_DR 679 int i; 680 #endif 681 682 MLX5_ASSERT(sh && sh->refcnt); 683 if (sh->refcnt > 1) 684 return; 685 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 686 #ifdef HAVE_MLX5DV_DR 687 if (sh->rx_domain) { 688 mlx5_glue->dr_destroy_domain(sh->rx_domain); 689 sh->rx_domain = NULL; 690 } 691 if (sh->tx_domain) { 692 mlx5_glue->dr_destroy_domain(sh->tx_domain); 693 sh->tx_domain = NULL; 694 } 695 #ifdef HAVE_MLX5DV_DR_ESWITCH 696 if (sh->fdb_domain) { 697 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 698 sh->fdb_domain = NULL; 699 } 700 if (sh->dr_drop_action) { 701 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 702 sh->dr_drop_action = NULL; 703 } 704 #endif 705 if (sh->pop_vlan_action) { 706 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 707 sh->pop_vlan_action = NULL; 708 } 709 for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) { 710 if (sh->send_to_kernel_action[i].action) { 711 void *action = sh->send_to_kernel_action[i].action; 712 713 mlx5_glue->destroy_flow_action(action); 714 sh->send_to_kernel_action[i].action = NULL; 715 } 716 if (sh->send_to_kernel_action[i].tbl) { 717 struct mlx5_flow_tbl_resource *tbl = 718 sh->send_to_kernel_action[i].tbl; 719 720 flow_dv_tbl_resource_release(sh, tbl); 721 sh->send_to_kernel_action[i].tbl = NULL; 722 } 723 } 724 #endif /* HAVE_MLX5DV_DR */ 725 if (sh->default_miss_action) 726 mlx5_glue->destroy_flow_action 727 (sh->default_miss_action); 728 if (sh->encaps_decaps) { 729 mlx5_hlist_destroy(sh->encaps_decaps); 730 sh->encaps_decaps = NULL; 731 } 732 if (sh->modify_cmds) { 733 mlx5_hlist_destroy(sh->modify_cmds); 734 sh->modify_cmds = NULL; 735 } 736 if (sh->tag_table) { 737 /* tags should be destroyed with flow before. */ 738 mlx5_hlist_destroy(sh->tag_table); 739 sh->tag_table = NULL; 740 } 741 if (sh->tunnel_hub) { 742 mlx5_release_tunnel_hub(sh, priv->dev_port); 743 sh->tunnel_hub = NULL; 744 } 745 mlx5_free_table_hash_list(priv); 746 if (sh->port_id_action_list) { 747 mlx5_list_destroy(sh->port_id_action_list); 748 sh->port_id_action_list = NULL; 749 } 750 if (sh->push_vlan_action_list) { 751 mlx5_list_destroy(sh->push_vlan_action_list); 752 sh->push_vlan_action_list = NULL; 753 } 754 if (sh->sample_action_list) { 755 mlx5_list_destroy(sh->sample_action_list); 756 sh->sample_action_list = NULL; 757 } 758 if (sh->dest_array_list) { 759 mlx5_list_destroy(sh->dest_array_list); 760 sh->dest_array_list = NULL; 761 } 762 } 763 764 /** 765 * Initialize shared data between primary and secondary process. 766 * 767 * A memzone is reserved by primary process and secondary processes attach to 768 * the memzone. 769 * 770 * @return 771 * 0 on success, a negative errno value otherwise and rte_errno is set. 772 */ 773 static int 774 mlx5_init_shared_data(void) 775 { 776 const struct rte_memzone *mz; 777 int ret = 0; 778 779 rte_spinlock_lock(&mlx5_shared_data_lock); 780 if (mlx5_shared_data == NULL) { 781 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 782 /* Allocate shared memory. */ 783 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 784 sizeof(*mlx5_shared_data), 785 SOCKET_ID_ANY, 0); 786 if (mz == NULL) { 787 DRV_LOG(ERR, 788 "Cannot allocate mlx5 shared data"); 789 ret = -rte_errno; 790 goto error; 791 } 792 mlx5_shared_data = mz->addr; 793 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 794 rte_spinlock_init(&mlx5_shared_data->lock); 795 } else { 796 /* Lookup allocated shared memory. */ 797 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 798 if (mz == NULL) { 799 DRV_LOG(ERR, 800 "Cannot attach mlx5 shared data"); 801 ret = -rte_errno; 802 goto error; 803 } 804 mlx5_shared_data = mz->addr; 805 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 806 } 807 } 808 error: 809 rte_spinlock_unlock(&mlx5_shared_data_lock); 810 return ret; 811 } 812 813 /** 814 * PMD global initialization. 815 * 816 * Independent from individual device, this function initializes global 817 * per-PMD data structures distinguishing primary and secondary processes. 818 * Hence, each initialization is called once per a process. 819 * 820 * @return 821 * 0 on success, a negative errno value otherwise and rte_errno is set. 822 */ 823 static int 824 mlx5_init_once(void) 825 { 826 struct mlx5_shared_data *sd; 827 struct mlx5_local_data *ld = &mlx5_local_data; 828 int ret = 0; 829 830 if (mlx5_init_shared_data()) 831 return -rte_errno; 832 sd = mlx5_shared_data; 833 MLX5_ASSERT(sd); 834 rte_spinlock_lock(&sd->lock); 835 switch (rte_eal_process_type()) { 836 case RTE_PROC_PRIMARY: 837 if (sd->init_done) 838 break; 839 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 840 mlx5_mp_os_primary_handle); 841 if (ret) 842 goto out; 843 sd->init_done = true; 844 break; 845 case RTE_PROC_SECONDARY: 846 if (ld->init_done) 847 break; 848 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 849 mlx5_mp_os_secondary_handle); 850 if (ret) 851 goto out; 852 ++sd->secondary_cnt; 853 ld->init_done = true; 854 break; 855 default: 856 break; 857 } 858 out: 859 rte_spinlock_unlock(&sd->lock); 860 return ret; 861 } 862 863 /** 864 * DR flow drop action support detect. 865 * 866 * @param dev 867 * Pointer to rte_eth_dev structure. 868 * 869 */ 870 static void 871 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 872 { 873 #ifdef HAVE_MLX5DV_DR 874 struct mlx5_priv *priv = dev->data->dev_private; 875 876 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 877 return; 878 /** 879 * DR supports drop action placeholder when it is supported; 880 * otherwise, use the queue drop action. 881 */ 882 if (!priv->sh->drop_action_check_flag) { 883 if (!mlx5_flow_discover_dr_action_support(dev)) 884 priv->sh->dr_root_drop_action_en = 1; 885 priv->sh->drop_action_check_flag = 1; 886 } 887 if (priv->sh->dr_root_drop_action_en) 888 priv->root_drop_action = priv->sh->dr_drop_action; 889 else 890 priv->root_drop_action = priv->drop_queue.hrxq->action; 891 #endif 892 } 893 894 static void 895 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 896 { 897 struct mlx5_priv *priv = dev->data->dev_private; 898 void *ctx = priv->sh->cdev->ctx; 899 900 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 901 if (!priv->q_counters) { 902 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 903 struct ibv_wq *wq; 904 905 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 906 "by DevX - fall-back to use the kernel driver global " 907 "queue counter.", dev->data->port_id); 908 /* Create WQ by kernel and query its queue counter ID. */ 909 if (cq) { 910 wq = mlx5_glue->create_wq(ctx, 911 &(struct ibv_wq_init_attr){ 912 .wq_type = IBV_WQT_RQ, 913 .max_wr = 1, 914 .max_sge = 1, 915 .pd = priv->sh->cdev->pd, 916 .cq = cq, 917 }); 918 if (wq) { 919 /* Counter is assigned only on RDY state. */ 920 int ret = mlx5_glue->modify_wq(wq, 921 &(struct ibv_wq_attr){ 922 .attr_mask = IBV_WQ_ATTR_STATE, 923 .wq_state = IBV_WQS_RDY, 924 }); 925 926 if (ret == 0) 927 mlx5_devx_cmd_wq_query(wq, 928 &priv->counter_set_id); 929 claim_zero(mlx5_glue->destroy_wq(wq)); 930 } 931 claim_zero(mlx5_glue->destroy_cq(cq)); 932 } 933 } else { 934 priv->counter_set_id = priv->q_counters->id; 935 } 936 if (priv->counter_set_id == 0) 937 DRV_LOG(INFO, "Part of the port %d statistics will not be " 938 "available.", dev->data->port_id); 939 } 940 941 /** 942 * Check if representor spawn info match devargs. 943 * 944 * @param spawn 945 * Verbs device parameters (name, port, switch_info) to spawn. 946 * @param eth_da 947 * Device devargs to probe. 948 * 949 * @return 950 * Match result. 951 */ 952 static bool 953 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 954 struct rte_eth_devargs *eth_da) 955 { 956 struct mlx5_switch_info *switch_info = &spawn->info; 957 unsigned int p, f; 958 uint16_t id; 959 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 960 eth_da->type); 961 962 switch (eth_da->type) { 963 case RTE_ETH_REPRESENTOR_SF: 964 if (!(spawn->info.port_name == -1 && 965 switch_info->name_type == 966 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 967 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 968 rte_errno = EBUSY; 969 return false; 970 } 971 break; 972 case RTE_ETH_REPRESENTOR_VF: 973 /* Allows HPF representor index -1 as exception. */ 974 if (!(spawn->info.port_name == -1 && 975 switch_info->name_type == 976 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 977 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 978 rte_errno = EBUSY; 979 return false; 980 } 981 break; 982 case RTE_ETH_REPRESENTOR_NONE: 983 rte_errno = EBUSY; 984 return false; 985 default: 986 rte_errno = ENOTSUP; 987 DRV_LOG(ERR, "unsupported representor type"); 988 return false; 989 } 990 /* Check representor ID: */ 991 for (p = 0; p < eth_da->nb_ports; ++p) { 992 if (spawn->pf_bond < 0) { 993 /* For non-LAG mode, allow and ignore pf. */ 994 switch_info->pf_num = eth_da->ports[p]; 995 repr_id = mlx5_representor_id_encode(switch_info, 996 eth_da->type); 997 } 998 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 999 id = MLX5_REPRESENTOR_ID 1000 (eth_da->ports[p], eth_da->type, 1001 eth_da->representor_ports[f]); 1002 if (repr_id == id) 1003 return true; 1004 } 1005 } 1006 rte_errno = EBUSY; 1007 return false; 1008 } 1009 1010 /** 1011 * Spawn an Ethernet device from Verbs information. 1012 * 1013 * @param dpdk_dev 1014 * Backing DPDK device. 1015 * @param spawn 1016 * Verbs device parameters (name, port, switch_info) to spawn. 1017 * @param eth_da 1018 * Device arguments. 1019 * @param mkvlist 1020 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1021 * 1022 * @return 1023 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1024 * is set. The following errors are defined: 1025 * 1026 * EBUSY: device is not supposed to be spawned. 1027 * EEXIST: device is already spawned 1028 */ 1029 static struct rte_eth_dev * 1030 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1031 struct mlx5_dev_spawn_data *spawn, 1032 struct rte_eth_devargs *eth_da, 1033 struct mlx5_kvargs_ctrl *mkvlist) 1034 { 1035 const struct mlx5_switch_info *switch_info = &spawn->info; 1036 struct mlx5_dev_ctx_shared *sh = NULL; 1037 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1038 struct rte_eth_dev *eth_dev = NULL; 1039 struct mlx5_priv *priv = NULL; 1040 int err = 0; 1041 struct rte_ether_addr mac; 1042 char name[RTE_ETH_NAME_MAX_LEN]; 1043 int own_domain_id = 0; 1044 uint16_t port_id; 1045 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1046 int nl_rdma; 1047 int i; 1048 1049 /* Determine if this port representor is supposed to be spawned. */ 1050 if (switch_info->representor && dpdk_dev->devargs && 1051 !mlx5_representor_match(spawn, eth_da)) 1052 return NULL; 1053 /* Build device name. */ 1054 if (spawn->pf_bond < 0) { 1055 /* Single device. */ 1056 if (!switch_info->representor) 1057 strlcpy(name, dpdk_dev->name, sizeof(name)); 1058 else 1059 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1060 dpdk_dev->name, 1061 switch_info->name_type == 1062 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1063 switch_info->port_name); 1064 } else { 1065 /* Bonding device. */ 1066 if (!switch_info->representor) { 1067 err = snprintf(name, sizeof(name), "%s_%s", 1068 dpdk_dev->name, spawn->phys_dev_name); 1069 } else { 1070 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1071 dpdk_dev->name, spawn->phys_dev_name, 1072 switch_info->ctrl_num, 1073 switch_info->pf_num, 1074 switch_info->name_type == 1075 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1076 switch_info->port_name); 1077 } 1078 } 1079 if (err >= (int)sizeof(name)) 1080 DRV_LOG(WARNING, "device name overflow %s", name); 1081 /* check if the device is already spawned */ 1082 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1083 /* 1084 * When device is already spawned, its devargs should be set 1085 * as used. otherwise, mlx5_kvargs_validate() will fail. 1086 */ 1087 if (mkvlist) 1088 mlx5_port_args_set_used(name, port_id, mkvlist); 1089 rte_errno = EEXIST; 1090 return NULL; 1091 } 1092 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1093 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1094 struct mlx5_mp_id mp_id; 1095 int fd; 1096 1097 eth_dev = rte_eth_dev_attach_secondary(name); 1098 if (eth_dev == NULL) { 1099 DRV_LOG(ERR, "can not attach rte ethdev"); 1100 rte_errno = ENOMEM; 1101 return NULL; 1102 } 1103 eth_dev->device = dpdk_dev; 1104 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1105 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1106 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1107 err = mlx5_proc_priv_init(eth_dev); 1108 if (err) 1109 return NULL; 1110 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1111 /* Receive command fd from primary process */ 1112 fd = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1113 if (fd < 0) 1114 goto err_secondary; 1115 /* Remap UAR for Tx queues. */ 1116 err = mlx5_tx_uar_init_secondary(eth_dev, fd); 1117 close(fd); 1118 if (err) 1119 goto err_secondary; 1120 /* 1121 * Ethdev pointer is still required as input since 1122 * the primary device is not accessible from the 1123 * secondary process. 1124 */ 1125 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1126 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1127 return eth_dev; 1128 err_secondary: 1129 mlx5_dev_close(eth_dev); 1130 return NULL; 1131 } 1132 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1133 if (!sh) 1134 return NULL; 1135 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1136 /* Check port status. */ 1137 if (spawn->phys_port <= UINT8_MAX) { 1138 /* Legacy Verbs api only support u8 port number. */ 1139 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1140 &port_attr); 1141 if (err) { 1142 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1143 goto error; 1144 } 1145 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1146 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1147 err = EINVAL; 1148 goto error; 1149 } 1150 } else if (nl_rdma >= 0) { 1151 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1152 err = mlx5_nl_port_state(nl_rdma, 1153 spawn->phys_dev_name, 1154 spawn->phys_port); 1155 if (err < 0) { 1156 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1157 strerror(rte_errno)); 1158 err = -rte_errno; 1159 goto error; 1160 } 1161 port_attr.state = (enum ibv_port_state)err; 1162 } 1163 if (port_attr.state != IBV_PORT_ACTIVE) 1164 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1165 mlx5_glue->port_state_str(port_attr.state), 1166 port_attr.state); 1167 /* Allocate private eth device data. */ 1168 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1169 sizeof(*priv), 1170 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1171 if (priv == NULL) { 1172 DRV_LOG(ERR, "priv allocation failure"); 1173 err = ENOMEM; 1174 goto error; 1175 } 1176 /* 1177 * When user configures remote PD and CTX and device creates RxQ by 1178 * DevX, external RxQ is both supported and requested. 1179 */ 1180 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1181 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1182 sizeof(struct mlx5_external_rxq) * 1183 MLX5_MAX_EXT_RX_QUEUES, 0, 1184 SOCKET_ID_ANY); 1185 if (priv->ext_rxqs == NULL) { 1186 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1187 err = ENOMEM; 1188 goto error; 1189 } 1190 DRV_LOG(DEBUG, "External RxQ is supported."); 1191 } 1192 priv->sh = sh; 1193 priv->dev_port = spawn->phys_port; 1194 priv->pci_dev = spawn->pci_dev; 1195 priv->mtu = RTE_ETHER_MTU; 1196 /* Some internal functions rely on Netlink sockets, open them now. */ 1197 priv->nl_socket_rdma = nl_rdma; 1198 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1199 priv->representor = !!switch_info->representor; 1200 priv->master = !!switch_info->master; 1201 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1202 priv->vport_meta_tag = 0; 1203 priv->vport_meta_mask = 0; 1204 priv->pf_bond = spawn->pf_bond; 1205 1206 DRV_LOG(DEBUG, 1207 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1208 priv->dev_port, dpdk_dev->bus->name, 1209 priv->pci_dev ? priv->pci_dev->name : "NONE", 1210 priv->master, priv->representor, priv->pf_bond); 1211 1212 /* 1213 * If we have E-Switch we should determine the vport attributes. 1214 * E-Switch may use either source vport field or reg_c[0] metadata 1215 * register to match on vport index. The engaged part of metadata 1216 * register is defined by mask. 1217 */ 1218 if (sh->esw_mode) { 1219 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1220 spawn->phys_port, 1221 &vport_info); 1222 if (err) { 1223 DRV_LOG(WARNING, 1224 "Cannot query devx port %d on device %s", 1225 spawn->phys_port, spawn->phys_dev_name); 1226 vport_info.query_flags = 0; 1227 } 1228 } 1229 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1230 priv->vport_meta_tag = vport_info.vport_meta_tag; 1231 priv->vport_meta_mask = vport_info.vport_meta_mask; 1232 if (!priv->vport_meta_mask) { 1233 DRV_LOG(ERR, 1234 "vport zero mask for port %d on bonding device %s", 1235 spawn->phys_port, spawn->phys_dev_name); 1236 err = ENOTSUP; 1237 goto error; 1238 } 1239 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1240 DRV_LOG(ERR, 1241 "Invalid vport tag for port %d on bonding device %s", 1242 spawn->phys_port, spawn->phys_dev_name); 1243 err = ENOTSUP; 1244 goto error; 1245 } 1246 } 1247 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1248 priv->vport_id = vport_info.vport_id; 1249 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1250 DRV_LOG(ERR, 1251 "Cannot deduce vport index for port %d on bonding device %s", 1252 spawn->phys_port, spawn->phys_dev_name); 1253 err = ENOTSUP; 1254 goto error; 1255 } else { 1256 /* 1257 * Suppose vport index in compatible way. Kernel/rdma_core 1258 * support single E-Switch per PF configurations only and 1259 * vport_id field contains the vport index for associated VF, 1260 * which is deduced from representor port name. 1261 * For example, let's have the IB device port 10, it has 1262 * attached network device eth0, which has port name attribute 1263 * pf0vf2, we can deduce the VF number as 2, and set vport index 1264 * as 3 (2+1). This assigning schema should be changed if the 1265 * multiple E-Switch instances per PF configurations or/and PCI 1266 * subfunctions are added. 1267 */ 1268 priv->vport_id = switch_info->representor ? 1269 switch_info->port_name + 1 : -1; 1270 } 1271 priv->representor_id = mlx5_representor_id_encode(switch_info, 1272 eth_da->type); 1273 /* 1274 * Look for sibling devices in order to reuse their switch domain 1275 * if any, otherwise allocate one. 1276 */ 1277 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1278 const struct mlx5_priv *opriv = 1279 rte_eth_devices[port_id].data->dev_private; 1280 1281 if (!opriv || 1282 opriv->sh != priv->sh || 1283 opriv->domain_id == 1284 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1285 continue; 1286 priv->domain_id = opriv->domain_id; 1287 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1288 priv->dev_port, priv->domain_id); 1289 break; 1290 } 1291 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1292 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1293 if (err) { 1294 err = rte_errno; 1295 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1296 strerror(rte_errno)); 1297 goto error; 1298 } 1299 own_domain_id = 1; 1300 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1301 priv->dev_port, priv->domain_id); 1302 } 1303 if (sh->cdev->config.devx) { 1304 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1305 1306 sh->steering_format_version = hca_attr->steering_format_version; 1307 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT) 1308 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1309 sh->config.dv_flow_en) { 1310 if (sh->registers.aso_reg != REG_NON) { 1311 priv->mtr_en = 1; 1312 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1313 } 1314 } 1315 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1316 uint32_t log_obj_size = 1317 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1318 if (log_obj_size >= 1319 hca_attr->qos.log_meter_aso_granularity && 1320 log_obj_size <= 1321 hca_attr->qos.log_meter_aso_max_alloc) 1322 sh->meter_aso_en = 1; 1323 } 1324 if (priv->mtr_en) { 1325 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1326 if (err) { 1327 err = -err; 1328 goto error; 1329 } 1330 } 1331 if (hca_attr->flow.tunnel_header_0_1) 1332 sh->tunnel_header_0_1 = 1; 1333 if (hca_attr->flow.tunnel_header_2_3) 1334 sh->tunnel_header_2_3 = 1; 1335 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */ 1336 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1337 if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3) { 1338 sh->flow_hit_aso_en = 1; 1339 err = mlx5_flow_aso_age_mng_init(sh); 1340 if (err) { 1341 err = -err; 1342 goto error; 1343 } 1344 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1345 } 1346 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1347 #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1348 defined (HAVE_MLX5_DR_ACTION_ASO_CT) 1349 /* HWS create CT ASO SQ based on HWS configure queue number. */ 1350 if (sh->config.dv_flow_en != 2 && 1351 hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) { 1352 err = mlx5_flow_aso_ct_mng_init(sh); 1353 if (err) { 1354 err = -err; 1355 goto error; 1356 } 1357 DRV_LOG(DEBUG, "CT ASO is supported."); 1358 sh->ct_aso_en = 1; 1359 } 1360 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1361 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1362 if (hca_attr->log_max_ft_sampler_num > 0 && 1363 sh->config.dv_flow_en) { 1364 priv->sampler_en = 1; 1365 DRV_LOG(DEBUG, "Sampler enabled!"); 1366 } else { 1367 priv->sampler_en = 0; 1368 if (!hca_attr->log_max_ft_sampler_num) 1369 DRV_LOG(WARNING, 1370 "No available register for sampler."); 1371 else 1372 DRV_LOG(DEBUG, "DV flow is not supported!"); 1373 } 1374 #endif 1375 if (hca_attr->lag_rx_port_affinity) { 1376 sh->lag_rx_port_affinity_en = 1; 1377 DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled"); 1378 } 1379 priv->num_lag_ports = hca_attr->num_lag_ports; 1380 DRV_LOG(DEBUG, "The number of lag ports is %d", priv->num_lag_ports); 1381 } 1382 /* Process parameters and store port configuration on priv structure. */ 1383 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1384 if (err) { 1385 err = rte_errno; 1386 DRV_LOG(ERR, "Failed to process port configure: %s", 1387 strerror(rte_errno)); 1388 goto error; 1389 } 1390 eth_dev = rte_eth_dev_allocate(name); 1391 if (eth_dev == NULL) { 1392 DRV_LOG(ERR, "can not allocate rte ethdev"); 1393 err = ENOMEM; 1394 goto error; 1395 } 1396 if (priv->representor) { 1397 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1398 eth_dev->data->representor_id = priv->representor_id; 1399 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1400 struct mlx5_priv *opriv = 1401 rte_eth_devices[port_id].data->dev_private; 1402 if (opriv && 1403 opriv->master && 1404 opriv->domain_id == priv->domain_id && 1405 opriv->sh == priv->sh) { 1406 eth_dev->data->backer_port_id = port_id; 1407 break; 1408 } 1409 } 1410 if (port_id >= RTE_MAX_ETHPORTS) 1411 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1412 } 1413 priv->mp_id.port_id = eth_dev->data->port_id; 1414 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1415 /* 1416 * Store associated network device interface index. This index 1417 * is permanent throughout the lifetime of device. So, we may store 1418 * the ifindex here and use the cached value further. 1419 */ 1420 MLX5_ASSERT(spawn->ifindex); 1421 priv->if_index = spawn->ifindex; 1422 priv->lag_affinity_idx = sh->refcnt - 1; 1423 eth_dev->data->dev_private = priv; 1424 priv->dev_data = eth_dev->data; 1425 eth_dev->data->mac_addrs = priv->mac; 1426 eth_dev->device = dpdk_dev; 1427 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1428 /* Configure the first MAC address by default. */ 1429 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1430 DRV_LOG(ERR, 1431 "port %u cannot get MAC address, is mlx5_en" 1432 " loaded? (errno: %s)", 1433 eth_dev->data->port_id, strerror(rte_errno)); 1434 err = ENODEV; 1435 goto error; 1436 } 1437 DRV_LOG(INFO, 1438 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1439 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1440 #ifdef RTE_LIBRTE_MLX5_DEBUG 1441 { 1442 char ifname[MLX5_NAMESIZE]; 1443 1444 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1445 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1446 eth_dev->data->port_id, ifname); 1447 else 1448 DRV_LOG(DEBUG, "port %u ifname is unknown", 1449 eth_dev->data->port_id); 1450 } 1451 #endif 1452 /* Get actual MTU if possible. */ 1453 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1454 if (err) { 1455 err = rte_errno; 1456 goto error; 1457 } 1458 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1459 priv->mtu); 1460 /* Initialize burst functions to prevent crashes before link-up. */ 1461 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1462 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1463 eth_dev->dev_ops = &mlx5_dev_ops; 1464 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1465 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1466 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1467 /* Register MAC address. */ 1468 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1469 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1470 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1471 mlx5_ifindex(eth_dev), 1472 eth_dev->data->mac_addrs, 1473 MLX5_MAX_MAC_ADDRESSES); 1474 priv->ctrl_flows = 0; 1475 rte_spinlock_init(&priv->flow_list_lock); 1476 TAILQ_INIT(&priv->flow_meters); 1477 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1478 if (!priv->mtr_profile_tbl) 1479 goto error; 1480 /* Bring Ethernet device up. */ 1481 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1482 eth_dev->data->port_id); 1483 /* Read link status in case it is up and there will be no event. */ 1484 mlx5_link_update(eth_dev, 0); 1485 /* Watch LSC interrupts between port probe and port start. */ 1486 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1487 eth_dev->data->port_id; 1488 mlx5_set_link_up(eth_dev); 1489 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1490 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1491 if (sh->config.reclaim_mode) 1492 icfg[i].per_core_cache = 0; 1493 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1494 if (!priv->flows[i]) 1495 goto error; 1496 } 1497 /* Create context for virtual machine VLAN workaround. */ 1498 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1499 if (sh->config.dv_flow_en) { 1500 err = mlx5_alloc_shared_dr(priv); 1501 if (err) 1502 goto error; 1503 if (mlx5_flex_item_port_init(eth_dev) < 0) 1504 goto error; 1505 } 1506 if (mlx5_devx_obj_ops_en(sh)) { 1507 priv->obj_ops = devx_obj_ops; 1508 mlx5_queue_counter_id_prepare(eth_dev); 1509 priv->obj_ops.lb_dummy_queue_create = 1510 mlx5_rxq_ibv_obj_dummy_lb_create; 1511 priv->obj_ops.lb_dummy_queue_release = 1512 mlx5_rxq_ibv_obj_dummy_lb_release; 1513 } else if (spawn->max_port > UINT8_MAX) { 1514 /* Verbs can't support ports larger than 255 by design. */ 1515 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1516 err = ENOTSUP; 1517 goto error; 1518 } else { 1519 priv->obj_ops = ibv_obj_ops; 1520 } 1521 if (sh->config.tx_pp && 1522 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1523 /* 1524 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1525 * packet pacing and already checked above. 1526 * Hence, we should only make sure the SQs will be created 1527 * with DevX, not with Verbs. 1528 * Verbs allocates the SQ UAR on its own and it can't be shared 1529 * with Clock Queue UAR as required for Tx scheduling. 1530 */ 1531 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1532 err = ENODEV; 1533 goto error; 1534 } 1535 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1536 if (!priv->drop_queue.hrxq) 1537 goto error; 1538 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1539 mlx5_hrxq_create_cb, 1540 mlx5_hrxq_match_cb, 1541 mlx5_hrxq_remove_cb, 1542 mlx5_hrxq_clone_cb, 1543 mlx5_hrxq_clone_free_cb); 1544 if (!priv->hrxqs) 1545 goto error; 1546 mlx5_set_metadata_mask(eth_dev); 1547 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1548 !priv->sh->dv_regc0_mask) { 1549 DRV_LOG(ERR, "metadata mode %u is not supported " 1550 "(no metadata reg_c[0] is available)", 1551 sh->config.dv_xmeta_en); 1552 err = ENOTSUP; 1553 goto error; 1554 } 1555 rte_rwlock_init(&priv->ind_tbls_lock); 1556 if (priv->sh->config.dv_flow_en == 2) { 1557 #ifdef HAVE_MLX5_HWS_SUPPORT 1558 if (priv->sh->config.dv_esw_en) { 1559 uint32_t usable_bits; 1560 uint32_t required_bits; 1561 1562 if (priv->sh->dv_regc0_mask == UINT32_MAX) { 1563 DRV_LOG(ERR, "E-Switch port metadata is required when using HWS " 1564 "but it is disabled (configure it through devlink)"); 1565 err = ENOTSUP; 1566 goto error; 1567 } 1568 if (priv->sh->dv_regc0_mask == 0) { 1569 DRV_LOG(ERR, "E-Switch with HWS is not supported " 1570 "(no available bits in reg_c[0])"); 1571 err = ENOTSUP; 1572 goto error; 1573 } 1574 usable_bits = rte_popcount32(priv->sh->dv_regc0_mask); 1575 required_bits = rte_popcount32(priv->vport_meta_mask); 1576 if (usable_bits < required_bits) { 1577 DRV_LOG(ERR, "Not enough bits available in reg_c[0] to provide " 1578 "representor matching."); 1579 err = ENOTSUP; 1580 goto error; 1581 } 1582 } 1583 if (priv->vport_meta_mask) 1584 flow_hw_set_port_info(eth_dev); 1585 if (priv->sh->config.dv_esw_en && 1586 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1587 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) { 1588 DRV_LOG(ERR, 1589 "metadata mode %u is not supported in HWS eswitch mode", 1590 priv->sh->config.dv_xmeta_en); 1591 err = ENOTSUP; 1592 goto error; 1593 } 1594 if (priv->sh->config.dv_esw_en && 1595 flow_hw_create_vport_action(eth_dev)) { 1596 DRV_LOG(ERR, "port %u failed to create vport action", 1597 eth_dev->data->port_id); 1598 err = EINVAL; 1599 goto error; 1600 } 1601 /* 1602 * If representor matching is disabled, PMD cannot create default flow rules 1603 * to receive traffic for all ports, since implicit source port match is not added. 1604 * Isolated mode is forced. 1605 */ 1606 if (priv->sh->config.dv_esw_en && !priv->sh->config.repr_matching) { 1607 err = mlx5_flow_isolate(eth_dev, 1, NULL); 1608 if (err < 0) { 1609 err = -err; 1610 goto error; 1611 } 1612 DRV_LOG(WARNING, "port %u ingress traffic is restricted to defined " 1613 "flow rules (isolated mode) since representor " 1614 "matching is disabled", 1615 eth_dev->data->port_id); 1616 } 1617 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1618 return eth_dev; 1619 #else 1620 DRV_LOG(ERR, "DV support is missing for HWS."); 1621 goto error; 1622 #endif 1623 } 1624 if (!priv->sh->flow_priority_check_flag) { 1625 /* Supported Verbs flow priority number detection. */ 1626 err = mlx5_flow_discover_priorities(eth_dev); 1627 priv->sh->flow_max_priority = err; 1628 priv->sh->flow_priority_check_flag = 1; 1629 } else { 1630 err = priv->sh->flow_max_priority; 1631 } 1632 if (err < 0) { 1633 err = -err; 1634 goto error; 1635 } 1636 /* Query availability of metadata reg_c's. */ 1637 if (!priv->sh->metadata_regc_check_flag) { 1638 err = mlx5_flow_discover_mreg_c(eth_dev); 1639 if (err < 0) { 1640 err = -err; 1641 goto error; 1642 } 1643 } 1644 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1645 DRV_LOG(DEBUG, 1646 "port %u extensive metadata register is not supported", 1647 eth_dev->data->port_id); 1648 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1649 DRV_LOG(ERR, "metadata mode %u is not supported " 1650 "(no metadata registers available)", 1651 sh->config.dv_xmeta_en); 1652 err = ENOTSUP; 1653 goto error; 1654 } 1655 } 1656 if (sh->config.dv_flow_en && 1657 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1658 mlx5_flow_ext_mreg_supported(eth_dev) && 1659 priv->sh->dv_regc0_mask) { 1660 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1661 MLX5_FLOW_MREG_HTABLE_SZ, 1662 false, true, eth_dev, 1663 flow_dv_mreg_create_cb, 1664 flow_dv_mreg_match_cb, 1665 flow_dv_mreg_remove_cb, 1666 flow_dv_mreg_clone_cb, 1667 flow_dv_mreg_clone_free_cb); 1668 if (!priv->mreg_cp_tbl) { 1669 err = ENOMEM; 1670 goto error; 1671 } 1672 } 1673 rte_spinlock_init(&priv->shared_act_sl); 1674 mlx5_flow_counter_mode_config(eth_dev); 1675 mlx5_flow_drop_action_config(eth_dev); 1676 if (sh->config.dv_flow_en) 1677 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1678 return eth_dev; 1679 error: 1680 if (priv) { 1681 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1682 RTE_MAX_ETHPORTS; 1683 rte_io_wmb(); 1684 #ifdef HAVE_MLX5_HWS_SUPPORT 1685 if (eth_dev && 1686 priv->sh && 1687 priv->sh->config.dv_flow_en == 2 && 1688 priv->sh->config.dv_esw_en) 1689 flow_hw_destroy_vport_action(eth_dev); 1690 #endif 1691 if (priv->mreg_cp_tbl) 1692 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1693 if (priv->sh) 1694 mlx5_os_free_shared_dr(priv); 1695 if (priv->nl_socket_route >= 0) 1696 close(priv->nl_socket_route); 1697 if (priv->vmwa_context) 1698 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1699 if (eth_dev && priv->drop_queue.hrxq) 1700 mlx5_drop_action_destroy(eth_dev); 1701 if (priv->mtr_profile_tbl) 1702 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1703 if (own_domain_id) 1704 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1705 if (priv->hrxqs) 1706 mlx5_list_destroy(priv->hrxqs); 1707 if (eth_dev && priv->flex_item_map) 1708 mlx5_flex_item_port_cleanup(eth_dev); 1709 mlx5_free(priv->ext_rxqs); 1710 mlx5_free(priv); 1711 if (eth_dev != NULL) 1712 eth_dev->data->dev_private = NULL; 1713 } 1714 if (eth_dev != NULL) { 1715 /* mac_addrs must not be freed alone because part of 1716 * dev_private 1717 **/ 1718 eth_dev->data->mac_addrs = NULL; 1719 rte_eth_dev_release_port(eth_dev); 1720 } 1721 if (sh) 1722 mlx5_free_shared_dev_ctx(sh); 1723 if (nl_rdma >= 0) 1724 close(nl_rdma); 1725 MLX5_ASSERT(err > 0); 1726 rte_errno = err; 1727 return NULL; 1728 } 1729 1730 /** 1731 * Comparison callback to sort device data. 1732 * 1733 * This is meant to be used with qsort(). 1734 * 1735 * @param a[in] 1736 * Pointer to pointer to first data object. 1737 * @param b[in] 1738 * Pointer to pointer to second data object. 1739 * 1740 * @return 1741 * 0 if both objects are equal, less than 0 if the first argument is less 1742 * than the second, greater than 0 otherwise. 1743 */ 1744 static int 1745 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1746 { 1747 const struct mlx5_switch_info *si_a = 1748 &((const struct mlx5_dev_spawn_data *)a)->info; 1749 const struct mlx5_switch_info *si_b = 1750 &((const struct mlx5_dev_spawn_data *)b)->info; 1751 int ret; 1752 1753 /* Master device first. */ 1754 ret = si_b->master - si_a->master; 1755 if (ret) 1756 return ret; 1757 /* Then representor devices. */ 1758 ret = si_b->representor - si_a->representor; 1759 if (ret) 1760 return ret; 1761 /* Unidentified devices come last in no specific order. */ 1762 if (!si_a->representor) 1763 return 0; 1764 /* Order representors by name. */ 1765 return si_a->port_name - si_b->port_name; 1766 } 1767 1768 /** 1769 * Match PCI information for possible slaves of bonding device. 1770 * 1771 * @param[in] ibdev_name 1772 * Name of Infiniband device. 1773 * @param[in] pci_dev 1774 * Pointer to primary PCI address structure to match. 1775 * @param[in] nl_rdma 1776 * Netlink RDMA group socket handle. 1777 * @param[in] owner 1778 * Representor owner PF index. 1779 * @param[out] bond_info 1780 * Pointer to bonding information. 1781 * 1782 * @return 1783 * negative value if no bonding device found, otherwise 1784 * positive index of slave PF in bonding. 1785 */ 1786 static int 1787 mlx5_device_bond_pci_match(const char *ibdev_name, 1788 const struct rte_pci_addr *pci_dev, 1789 int nl_rdma, uint16_t owner, 1790 struct mlx5_bond_info *bond_info) 1791 { 1792 char ifname[IF_NAMESIZE + 1]; 1793 unsigned int ifindex; 1794 unsigned int np, i; 1795 FILE *bond_file = NULL, *file; 1796 int pf = -1; 1797 int ret; 1798 uint8_t cur_guid[32] = {0}; 1799 uint8_t guid[32] = {0}; 1800 1801 /* 1802 * Try to get master device name. If something goes wrong suppose 1803 * the lack of kernel support and no bonding devices. 1804 */ 1805 memset(bond_info, 0, sizeof(*bond_info)); 1806 if (nl_rdma < 0) 1807 return -1; 1808 if (!strstr(ibdev_name, "bond")) 1809 return -1; 1810 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1811 if (!np) 1812 return -1; 1813 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1814 return -1; 1815 /* 1816 * The master device might not be on the predefined port(not on port 1817 * index 1, it is not guaranteed), we have to scan all Infiniband 1818 * device ports and find master. 1819 */ 1820 for (i = 1; i <= np; ++i) { 1821 /* Check whether Infiniband port is populated. */ 1822 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1823 if (!ifindex) 1824 continue; 1825 if (!if_indextoname(ifindex, ifname)) 1826 continue; 1827 /* Try to read bonding slave names from sysfs. */ 1828 MKSTR(slaves, 1829 "/sys/class/net/%s/master/bonding/slaves", ifname); 1830 bond_file = fopen(slaves, "r"); 1831 if (bond_file) 1832 break; 1833 } 1834 if (!bond_file) 1835 return -1; 1836 /* Use safe format to check maximal buffer length. */ 1837 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1838 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1839 char tmp_str[IF_NAMESIZE + 32]; 1840 struct rte_pci_addr pci_addr; 1841 struct mlx5_switch_info info; 1842 int ret; 1843 1844 /* Process slave interface names in the loop. */ 1845 snprintf(tmp_str, sizeof(tmp_str), 1846 "/sys/class/net/%s", ifname); 1847 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1848 DRV_LOG(WARNING, 1849 "Cannot get PCI address for netdev \"%s\".", 1850 ifname); 1851 continue; 1852 } 1853 /* Slave interface PCI address match found. */ 1854 snprintf(tmp_str, sizeof(tmp_str), 1855 "/sys/class/net/%s/phys_port_name", ifname); 1856 file = fopen(tmp_str, "rb"); 1857 if (!file) 1858 break; 1859 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1860 if (fscanf(file, "%32s", tmp_str) == 1) 1861 mlx5_translate_port_name(tmp_str, &info); 1862 fclose(file); 1863 /* Only process PF ports. */ 1864 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1865 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1866 continue; 1867 /* Check max bonding member. */ 1868 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1869 DRV_LOG(WARNING, "bonding index out of range, " 1870 "please increase MLX5_BOND_MAX_PORTS: %s", 1871 tmp_str); 1872 break; 1873 } 1874 /* Get ifindex. */ 1875 snprintf(tmp_str, sizeof(tmp_str), 1876 "/sys/class/net/%s/ifindex", ifname); 1877 file = fopen(tmp_str, "rb"); 1878 if (!file) 1879 break; 1880 ret = fscanf(file, "%u", &ifindex); 1881 fclose(file); 1882 if (ret != 1) 1883 break; 1884 /* Save bonding info. */ 1885 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1886 sizeof(bond_info->ports[0].ifname)); 1887 bond_info->ports[info.port_name].pci_addr = pci_addr; 1888 bond_info->ports[info.port_name].ifindex = ifindex; 1889 bond_info->n_port++; 1890 /* 1891 * Under socket direct mode, bonding will use 1892 * system_image_guid as identification. 1893 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1894 * All bonding members should have the same guid even if driver 1895 * is using PCIe BDF. 1896 */ 1897 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1898 if (ret < 0) 1899 break; 1900 else if (ret > 0) { 1901 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1902 owner == info.port_name && 1903 (owner != 0 || (owner == 0 && 1904 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1905 pf = info.port_name; 1906 } else if (pci_dev->domain == pci_addr.domain && 1907 pci_dev->bus == pci_addr.bus && 1908 pci_dev->devid == pci_addr.devid && 1909 ((pci_dev->function == 0 && 1910 pci_dev->function + owner == pci_addr.function) || 1911 (pci_dev->function == owner && 1912 pci_addr.function == owner))) 1913 pf = info.port_name; 1914 } 1915 if (pf >= 0) { 1916 /* Get bond interface info */ 1917 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1918 bond_info->ifname); 1919 if (ret) 1920 DRV_LOG(ERR, "unable to get bond info: %s", 1921 strerror(rte_errno)); 1922 else 1923 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1924 ifindex, bond_info->ifindex, bond_info->ifname); 1925 } 1926 if (owner == 0 && pf != 0) { 1927 DRV_LOG(INFO, "PCIe instance " PCI_PRI_FMT " isn't bonding owner", 1928 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1929 pci_dev->function); 1930 } 1931 return pf; 1932 } 1933 1934 #define SYSFS_MPESW_PARAM_MAX_LEN 16 1935 1936 static __rte_unused int 1937 mlx5_sysfs_esw_multiport_get(struct ibv_device *ibv, struct rte_pci_addr *pci_addr, int *enabled) 1938 { 1939 int nl_rdma; 1940 unsigned int n_ports; 1941 unsigned int i; 1942 int ret; 1943 1944 /* Provide correct value to have defined enabled state in case of an error. */ 1945 *enabled = 0; 1946 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1947 if (nl_rdma < 0) 1948 return nl_rdma; 1949 n_ports = mlx5_nl_portnum(nl_rdma, ibv->name); 1950 if (!n_ports) { 1951 ret = -rte_errno; 1952 goto close_nl_rdma; 1953 } 1954 for (i = 1; i <= n_ports; ++i) { 1955 unsigned int ifindex; 1956 char ifname[IF_NAMESIZE + 1]; 1957 struct rte_pci_addr if_pci_addr; 1958 char mpesw[SYSFS_MPESW_PARAM_MAX_LEN + 1]; 1959 FILE *sysfs; 1960 int n; 1961 1962 ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i); 1963 if (!ifindex) 1964 continue; 1965 if (!if_indextoname(ifindex, ifname)) 1966 continue; 1967 MKSTR(sysfs_if_path, "/sys/class/net/%s", ifname); 1968 if (mlx5_get_pci_addr(sysfs_if_path, &if_pci_addr)) 1969 continue; 1970 if (pci_addr->domain != if_pci_addr.domain || 1971 pci_addr->bus != if_pci_addr.bus || 1972 pci_addr->devid != if_pci_addr.devid || 1973 pci_addr->function != if_pci_addr.function) 1974 continue; 1975 MKSTR(sysfs_mpesw_path, 1976 "/sys/class/net/%s/compat/devlink/lag_port_select_mode", ifname); 1977 sysfs = fopen(sysfs_mpesw_path, "r"); 1978 if (!sysfs) 1979 continue; 1980 n = fscanf(sysfs, "%" RTE_STR(SYSFS_MPESW_PARAM_MAX_LEN) "s", mpesw); 1981 fclose(sysfs); 1982 if (n != 1) 1983 continue; 1984 ret = 0; 1985 if (strcmp(mpesw, "multiport_esw") == 0) { 1986 *enabled = 1; 1987 break; 1988 } 1989 *enabled = 0; 1990 break; 1991 } 1992 if (i > n_ports) { 1993 DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by sysfs."); 1994 rte_errno = ENOENT; 1995 ret = -rte_errno; 1996 } 1997 1998 close_nl_rdma: 1999 close(nl_rdma); 2000 return ret; 2001 } 2002 2003 /** 2004 * Register a PCI device within bonding. 2005 * 2006 * This function spawns Ethernet devices out of a given PCI device and 2007 * bonding owner PF index. 2008 * 2009 * @param[in] cdev 2010 * Pointer to common mlx5 device structure. 2011 * @param[in] req_eth_da 2012 * Requested ethdev device argument. 2013 * @param[in] owner_id 2014 * Requested owner PF port ID within bonding device, default to 0. 2015 * @param[in, out] mkvlist 2016 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2017 * 2018 * @return 2019 * 0 on success, a negative errno value otherwise and rte_errno is set. 2020 */ 2021 static int 2022 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 2023 struct rte_eth_devargs *req_eth_da, 2024 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 2025 { 2026 struct ibv_device **ibv_list; 2027 /* 2028 * Number of found IB Devices matching with requested PCI BDF. 2029 * nd != 1 means there are multiple IB devices over the same 2030 * PCI device and we have representors and master. 2031 */ 2032 unsigned int nd = 0; 2033 /* 2034 * Number of found IB device Ports. nd = 1 and np = 1..n means 2035 * we have the single multiport IB device, and there may be 2036 * representors attached to some of found ports. 2037 */ 2038 unsigned int np = 0; 2039 /* 2040 * Number of DPDK ethernet devices to Spawn - either over 2041 * multiple IB devices or multiple ports of single IB device. 2042 * Actually this is the number of iterations to spawn. 2043 */ 2044 unsigned int ns = 0; 2045 /* 2046 * Bonding device 2047 * < 0 - no bonding device (single one) 2048 * >= 0 - bonding device (value is slave PF index) 2049 */ 2050 int bd = -1; 2051 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2052 struct mlx5_dev_spawn_data *list = NULL; 2053 struct rte_eth_devargs eth_da = *req_eth_da; 2054 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 2055 struct mlx5_bond_info bond_info; 2056 int ret = -1; 2057 2058 errno = 0; 2059 ibv_list = mlx5_glue->get_device_list(&ret); 2060 if (!ibv_list) { 2061 rte_errno = errno ? errno : ENOSYS; 2062 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 2063 return -rte_errno; 2064 } 2065 /* 2066 * First scan the list of all Infiniband devices to find 2067 * matching ones, gathering into the list. 2068 */ 2069 struct ibv_device *ibv_match[ret + 1]; 2070 int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0); 2071 int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 2072 unsigned int i; 2073 2074 while (ret-- > 0) { 2075 struct rte_pci_addr pci_addr; 2076 2077 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 2078 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 2079 nl_rdma, owner_id, &bond_info); 2080 if (bd >= 0) { 2081 /* 2082 * Bonding device detected. Only one match is allowed, 2083 * the bonding is supported over multi-port IB device, 2084 * there should be no matches on representor PCI 2085 * functions or non VF LAG bonding devices with 2086 * specified address. 2087 */ 2088 if (nd) { 2089 DRV_LOG(ERR, 2090 "multiple PCI match on bonding device" 2091 "\"%s\" found", ibv_list[ret]->name); 2092 rte_errno = ENOENT; 2093 ret = -rte_errno; 2094 goto exit; 2095 } 2096 /* Amend owner pci address if owner PF ID specified. */ 2097 if (eth_da.nb_representor_ports) 2098 owner_pci.function += owner_id; 2099 DRV_LOG(INFO, 2100 "PCI information matches for slave %d bonding device \"%s\"", 2101 bd, ibv_list[ret]->name); 2102 ibv_match[nd++] = ibv_list[ret]; 2103 break; 2104 } else { 2105 /* Bonding device not found. */ 2106 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 2107 &pci_addr)) 2108 continue; 2109 if (rte_pci_addr_cmp(&owner_pci, &pci_addr) != 0) 2110 continue; 2111 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 2112 ibv_list[ret]->name); 2113 ibv_match[nd++] = ibv_list[ret]; 2114 } 2115 } 2116 ibv_match[nd] = NULL; 2117 if (!nd) { 2118 /* No device matches, just complain and bail out. */ 2119 DRV_LOG(WARNING, 2120 "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT "," 2121 " are kernel drivers loaded?", 2122 owner_id, owner_pci.domain, owner_pci.bus, 2123 owner_pci.devid, owner_pci.function); 2124 rte_errno = ENOENT; 2125 ret = -rte_errno; 2126 goto exit; 2127 } 2128 if (nd == 1) { 2129 /* 2130 * Found single matching device may have multiple ports. 2131 * Each port may be representor, we have to check the port 2132 * number and check the representors existence. 2133 */ 2134 if (nl_rdma >= 0) 2135 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 2136 if (!np) 2137 DRV_LOG(WARNING, 2138 "Cannot get IB device \"%s\" ports number.", 2139 ibv_match[0]->name); 2140 if (bd >= 0 && !np) { 2141 DRV_LOG(ERR, "Cannot get ports for bonding device."); 2142 rte_errno = ENOENT; 2143 ret = -rte_errno; 2144 goto exit; 2145 } 2146 } 2147 /* Now we can determine the maximal amount of devices to be spawned. */ 2148 list = mlx5_malloc(MLX5_MEM_ZERO, 2149 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2150 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2151 if (!list) { 2152 DRV_LOG(ERR, "Spawn data array allocation failure."); 2153 rte_errno = ENOMEM; 2154 ret = -rte_errno; 2155 goto exit; 2156 } 2157 if (bd >= 0 || np > 1) { 2158 /* 2159 * Single IB device with multiple ports found, 2160 * it may be E-Switch master device and representors. 2161 * We have to perform identification through the ports. 2162 */ 2163 MLX5_ASSERT(nl_rdma >= 0); 2164 MLX5_ASSERT(ns == 0); 2165 MLX5_ASSERT(nd == 1); 2166 MLX5_ASSERT(np); 2167 for (i = 1; i <= np; ++i) { 2168 list[ns].bond_info = &bond_info; 2169 list[ns].max_port = np; 2170 list[ns].phys_port = i; 2171 list[ns].phys_dev_name = ibv_match[0]->name; 2172 list[ns].eth_dev = NULL; 2173 list[ns].pci_dev = pci_dev; 2174 list[ns].cdev = cdev; 2175 list[ns].pf_bond = bd; 2176 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2177 ibv_match[0]->name, 2178 i); 2179 if (!list[ns].ifindex) { 2180 /* 2181 * No network interface index found for the 2182 * specified port, it means there is no 2183 * representor on this port. It's OK, 2184 * there can be disabled ports, for example 2185 * if sriov_numvfs < sriov_totalvfs. 2186 */ 2187 continue; 2188 } 2189 ret = -1; 2190 if (nl_route >= 0) 2191 ret = mlx5_nl_switch_info(nl_route, 2192 list[ns].ifindex, 2193 &list[ns].info); 2194 if (ret || (!list[ns].info.representor && 2195 !list[ns].info.master)) { 2196 /* 2197 * We failed to recognize representors with 2198 * Netlink, let's try to perform the task 2199 * with sysfs. 2200 */ 2201 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2202 &list[ns].info); 2203 } 2204 if (!ret && bd >= 0) { 2205 switch (list[ns].info.name_type) { 2206 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2207 if (np == 1) { 2208 /* 2209 * Force standalone bonding 2210 * device for ROCE LAG 2211 * configurations. 2212 */ 2213 list[ns].info.master = 0; 2214 list[ns].info.representor = 0; 2215 } 2216 if (list[ns].info.port_name == bd) 2217 ns++; 2218 break; 2219 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2220 /* Fallthrough */ 2221 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2222 /* Fallthrough */ 2223 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2224 if (list[ns].info.pf_num == bd) 2225 ns++; 2226 break; 2227 default: 2228 break; 2229 } 2230 continue; 2231 } 2232 if (!ret && (list[ns].info.representor ^ 2233 list[ns].info.master)) 2234 ns++; 2235 } 2236 if (!ns) { 2237 DRV_LOG(ERR, 2238 "Unable to recognize master/representors on the IB device with multiple ports."); 2239 rte_errno = ENOENT; 2240 ret = -rte_errno; 2241 goto exit; 2242 } 2243 } else { 2244 /* 2245 * The existence of several matching entries (nd > 1) means 2246 * port representors have been instantiated. No existing Verbs 2247 * call nor sysfs entries can tell them apart, this can only 2248 * be done through Netlink calls assuming kernel drivers are 2249 * recent enough to support them. 2250 * 2251 * In the event of identification failure through Netlink, 2252 * try again through sysfs, then: 2253 * 2254 * 1. A single IB device matches (nd == 1) with single 2255 * port (np=0/1) and is not a representor, assume 2256 * no switch support. 2257 * 2258 * 2. Otherwise no safe assumptions can be made; 2259 * complain louder and bail out. 2260 */ 2261 for (i = 0; i != nd; ++i) { 2262 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2263 list[ns].bond_info = NULL; 2264 list[ns].max_port = 1; 2265 list[ns].phys_port = 1; 2266 list[ns].phys_dev_name = ibv_match[i]->name; 2267 list[ns].eth_dev = NULL; 2268 list[ns].pci_dev = pci_dev; 2269 list[ns].cdev = cdev; 2270 list[ns].pf_bond = -1; 2271 list[ns].ifindex = 0; 2272 if (nl_rdma >= 0) 2273 list[ns].ifindex = mlx5_nl_ifindex 2274 (nl_rdma, 2275 ibv_match[i]->name, 2276 1); 2277 if (!list[ns].ifindex) { 2278 char ifname[IF_NAMESIZE]; 2279 2280 /* 2281 * Netlink failed, it may happen with old 2282 * ib_core kernel driver (before 4.16). 2283 * We can assume there is old driver because 2284 * here we are processing single ports IB 2285 * devices. Let's try sysfs to retrieve 2286 * the ifindex. The method works for 2287 * master device only. 2288 */ 2289 if (nd > 1) { 2290 /* 2291 * Multiple devices found, assume 2292 * representors, can not distinguish 2293 * master/representor and retrieve 2294 * ifindex via sysfs. 2295 */ 2296 continue; 2297 } 2298 ret = mlx5_get_ifname_sysfs 2299 (ibv_match[i]->ibdev_path, ifname); 2300 if (!ret) 2301 list[ns].ifindex = 2302 if_nametoindex(ifname); 2303 if (!list[ns].ifindex) { 2304 /* 2305 * No network interface index found 2306 * for the specified device, it means 2307 * there it is neither representor 2308 * nor master. 2309 */ 2310 continue; 2311 } 2312 } 2313 ret = -1; 2314 if (nl_route >= 0) 2315 ret = mlx5_nl_switch_info(nl_route, 2316 list[ns].ifindex, 2317 &list[ns].info); 2318 if (ret || (!list[ns].info.representor && 2319 !list[ns].info.master)) { 2320 /* 2321 * We failed to recognize representors with 2322 * Netlink, let's try to perform the task 2323 * with sysfs. 2324 */ 2325 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2326 &list[ns].info); 2327 } 2328 if (!ret && (list[ns].info.representor ^ 2329 list[ns].info.master)) { 2330 ns++; 2331 } else if ((nd == 1) && 2332 !list[ns].info.representor && 2333 !list[ns].info.master) { 2334 /* 2335 * Single IB device with one physical port and 2336 * attached network device. 2337 * May be SRIOV is not enabled or there is no 2338 * representors. 2339 */ 2340 DRV_LOG(INFO, "No E-Switch support detected."); 2341 ns++; 2342 break; 2343 } 2344 } 2345 if (!ns) { 2346 DRV_LOG(ERR, 2347 "Unable to recognize master/representors on the multiple IB devices."); 2348 rte_errno = ENOENT; 2349 ret = -rte_errno; 2350 goto exit; 2351 } 2352 /* 2353 * New kernels may add the switch_id attribute for the case 2354 * there is no E-Switch and we wrongly recognized the only 2355 * device as master. Override this if there is the single 2356 * device with single port and new device name format present. 2357 */ 2358 if (nd == 1 && 2359 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2360 list[0].info.master = 0; 2361 list[0].info.representor = 0; 2362 } 2363 } 2364 MLX5_ASSERT(ns); 2365 /* 2366 * Sort list to probe devices in natural order for users convenience 2367 * (i.e. master first, then representors from lowest to highest ID). 2368 */ 2369 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2370 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2371 /* Set devargs default values. */ 2372 if (eth_da.nb_mh_controllers == 0) { 2373 eth_da.nb_mh_controllers = 1; 2374 eth_da.mh_controllers[0] = 0; 2375 } 2376 if (eth_da.nb_ports == 0 && ns > 0) { 2377 if (list[0].pf_bond >= 0 && list[0].info.representor) 2378 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2379 pci_dev->device.devargs->args); 2380 eth_da.nb_ports = 1; 2381 eth_da.ports[0] = list[0].info.pf_num; 2382 } 2383 if (eth_da.nb_representor_ports == 0) { 2384 eth_da.nb_representor_ports = 1; 2385 eth_da.representor_ports[0] = 0; 2386 } 2387 } 2388 for (i = 0; i != ns; ++i) { 2389 uint32_t restore; 2390 2391 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2392 mkvlist); 2393 if (!list[i].eth_dev) { 2394 if (rte_errno != EBUSY && rte_errno != EEXIST) 2395 break; 2396 /* Device is disabled or already spawned. Ignore it. */ 2397 continue; 2398 } 2399 restore = list[i].eth_dev->data->dev_flags; 2400 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2401 /** 2402 * Each representor has a dedicated interrupts vector. 2403 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2404 * representor eth_dev object because representor and PF 2405 * share the same PCI address. 2406 * Override representor device with a dedicated 2407 * interrupts handle here. 2408 * Representor interrupts handle is released in mlx5_dev_stop(). 2409 */ 2410 if (list[i].info.representor) { 2411 struct rte_intr_handle *intr_handle = 2412 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2413 if (intr_handle == NULL) { 2414 DRV_LOG(ERR, 2415 "port %u failed to allocate memory for interrupt handler " 2416 "Rx interrupts will not be supported", 2417 i); 2418 rte_errno = ENOMEM; 2419 ret = -rte_errno; 2420 goto exit; 2421 } 2422 list[i].eth_dev->intr_handle = intr_handle; 2423 } 2424 /* Restore non-PCI flags cleared by the above call. */ 2425 list[i].eth_dev->data->dev_flags |= restore; 2426 rte_eth_dev_probing_finish(list[i].eth_dev); 2427 } 2428 if (i != ns) { 2429 DRV_LOG(ERR, 2430 "probe of PCI device " PCI_PRI_FMT " aborted after" 2431 " encountering an error: %s", 2432 owner_pci.domain, owner_pci.bus, 2433 owner_pci.devid, owner_pci.function, 2434 strerror(rte_errno)); 2435 ret = -rte_errno; 2436 /* Roll back. */ 2437 while (i--) { 2438 if (!list[i].eth_dev) 2439 continue; 2440 mlx5_dev_close(list[i].eth_dev); 2441 /* mac_addrs must not be freed because in dev_private */ 2442 list[i].eth_dev->data->mac_addrs = NULL; 2443 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2444 } 2445 /* Restore original error. */ 2446 rte_errno = -ret; 2447 } else { 2448 ret = 0; 2449 } 2450 exit: 2451 /* 2452 * Do the routine cleanup: 2453 * - close opened Netlink sockets 2454 * - free allocated spawn data array 2455 * - free the Infiniband device list 2456 */ 2457 if (nl_rdma >= 0) 2458 close(nl_rdma); 2459 if (nl_route >= 0) 2460 close(nl_route); 2461 if (list) 2462 mlx5_free(list); 2463 MLX5_ASSERT(ibv_list); 2464 mlx5_glue->free_device_list(ibv_list); 2465 return ret; 2466 } 2467 2468 static int 2469 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2470 struct rte_eth_devargs *eth_da) 2471 { 2472 int ret = 0; 2473 2474 if (dev->devargs == NULL) 2475 return 0; 2476 memset(eth_da, 0, sizeof(*eth_da)); 2477 /* Parse representor information first from class argument. */ 2478 if (dev->devargs->cls_str) 2479 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2480 if (ret != 0) { 2481 DRV_LOG(ERR, "failed to parse device arguments: %s", 2482 dev->devargs->cls_str); 2483 return -rte_errno; 2484 } 2485 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) { 2486 /* Parse legacy device argument */ 2487 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2488 if (ret) { 2489 DRV_LOG(ERR, "failed to parse device arguments: %s", 2490 dev->devargs->args); 2491 return -rte_errno; 2492 } 2493 } 2494 return 0; 2495 } 2496 2497 /** 2498 * Callback to register a PCI device. 2499 * 2500 * This function spawns Ethernet devices out of a given PCI device. 2501 * 2502 * @param[in] cdev 2503 * Pointer to common mlx5 device structure. 2504 * @param[in, out] mkvlist 2505 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2506 * 2507 * @return 2508 * 0 on success, a negative errno value otherwise and rte_errno is set. 2509 */ 2510 static int 2511 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2512 struct mlx5_kvargs_ctrl *mkvlist) 2513 { 2514 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2515 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2516 int ret = 0; 2517 uint16_t p; 2518 2519 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2520 if (ret != 0) 2521 return ret; 2522 2523 if (eth_da.nb_ports > 0) { 2524 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2525 for (p = 0; p < eth_da.nb_ports; p++) { 2526 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2527 eth_da.ports[p], mkvlist); 2528 if (ret) { 2529 DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " " 2530 "aborted due to proding failure of PF %u", 2531 pci_dev->addr.domain, pci_dev->addr.bus, 2532 pci_dev->addr.devid, pci_dev->addr.function, 2533 eth_da.ports[p]); 2534 mlx5_net_remove(cdev); 2535 if (p != 0) 2536 break; 2537 } 2538 } 2539 } else { 2540 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2541 } 2542 return ret; 2543 } 2544 2545 /* Probe a single SF device on auxiliary bus, no representor support. */ 2546 static int 2547 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2548 struct mlx5_kvargs_ctrl *mkvlist) 2549 { 2550 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2551 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 2552 struct rte_device *dev = cdev->dev; 2553 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2554 struct rte_eth_dev *eth_dev; 2555 int ret = 0; 2556 2557 /* Parse ethdev devargs. */ 2558 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2559 if (ret != 0) 2560 return ret; 2561 /* Init spawn data. */ 2562 spawn.max_port = 1; 2563 spawn.phys_port = 1; 2564 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2565 ret = mlx5_auxiliary_get_ifindex(dev->name); 2566 if (ret < 0) { 2567 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2568 return ret; 2569 } 2570 spawn.ifindex = ret; 2571 spawn.cdev = cdev; 2572 /* Spawn device. */ 2573 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2574 if (eth_dev == NULL) 2575 return -rte_errno; 2576 /* Post create. */ 2577 eth_dev->intr_handle = adev->intr_handle; 2578 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2579 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2580 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2581 eth_dev->data->numa_node = dev->numa_node; 2582 } 2583 rte_eth_dev_probing_finish(eth_dev); 2584 return 0; 2585 } 2586 2587 /** 2588 * Net class driver callback to probe a device. 2589 * 2590 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2591 * 2592 * @param[in] cdev 2593 * Pointer to the common mlx5 device. 2594 * @param[in, out] mkvlist 2595 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2596 * 2597 * @return 2598 * 0 on success, a negative errno value otherwise and rte_errno is set. 2599 */ 2600 int 2601 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2602 struct mlx5_kvargs_ctrl *mkvlist) 2603 { 2604 int ret; 2605 2606 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2607 mlx5_pmd_socket_init(); 2608 ret = mlx5_init_once(); 2609 if (ret) { 2610 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2611 strerror(rte_errno)); 2612 return -rte_errno; 2613 } 2614 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2615 if (ret) { 2616 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2617 strerror(rte_errno)); 2618 return -rte_errno; 2619 } 2620 if (mlx5_dev_is_pci(cdev->dev)) 2621 return mlx5_os_pci_probe(cdev, mkvlist); 2622 else 2623 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2624 } 2625 2626 /** 2627 * Cleanup resources when the last device is closed. 2628 */ 2629 void 2630 mlx5_os_net_cleanup(void) 2631 { 2632 mlx5_pmd_socket_uninit(); 2633 } 2634 2635 /** 2636 * Install shared asynchronous device events handler. 2637 * This function is implemented to support event sharing 2638 * between multiple ports of single IB device. 2639 * 2640 * @param sh 2641 * Pointer to mlx5_dev_ctx_shared object. 2642 */ 2643 void 2644 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2645 { 2646 struct ibv_context *ctx = sh->cdev->ctx; 2647 int nlsk_fd; 2648 2649 sh->intr_handle = mlx5_os_interrupt_handler_create 2650 (RTE_INTR_INSTANCE_F_SHARED, true, 2651 ctx->async_fd, mlx5_dev_interrupt_handler, sh); 2652 if (!sh->intr_handle) { 2653 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2654 return; 2655 } 2656 nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK); 2657 if (nlsk_fd < 0) { 2658 DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s", 2659 rte_strerror(rte_errno)); 2660 return; 2661 } 2662 sh->intr_handle_nl = mlx5_os_interrupt_handler_create 2663 (RTE_INTR_INSTANCE_F_SHARED, true, 2664 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh); 2665 if (sh->intr_handle_nl == NULL) { 2666 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2667 return; 2668 } 2669 if (sh->cdev->config.devx) { 2670 #ifdef HAVE_IBV_DEVX_ASYNC 2671 struct mlx5dv_devx_cmd_comp *devx_comp; 2672 2673 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2674 devx_comp = sh->devx_comp; 2675 if (!devx_comp) { 2676 DRV_LOG(INFO, "failed to allocate devx_comp."); 2677 return; 2678 } 2679 sh->intr_handle_devx = mlx5_os_interrupt_handler_create 2680 (RTE_INTR_INSTANCE_F_SHARED, true, 2681 devx_comp->fd, 2682 mlx5_dev_interrupt_handler_devx, sh); 2683 if (!sh->intr_handle_devx) { 2684 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2685 return; 2686 } 2687 #endif /* HAVE_IBV_DEVX_ASYNC */ 2688 } 2689 } 2690 2691 /** 2692 * Uninstall shared asynchronous device events handler. 2693 * This function is implemented to support event sharing 2694 * between multiple ports of single IB device. 2695 * 2696 * @param dev 2697 * Pointer to mlx5_dev_ctx_shared object. 2698 */ 2699 void 2700 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2701 { 2702 mlx5_os_interrupt_handler_destroy(sh->intr_handle, 2703 mlx5_dev_interrupt_handler, sh); 2704 mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl, 2705 mlx5_dev_interrupt_handler_nl, sh); 2706 #ifdef HAVE_IBV_DEVX_ASYNC 2707 mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx, 2708 mlx5_dev_interrupt_handler_devx, sh); 2709 if (sh->devx_comp) 2710 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2711 #endif 2712 } 2713 2714 /** 2715 * Read statistics by a named counter. 2716 * 2717 * @param[in] priv 2718 * Pointer to the private device data structure. 2719 * @param[in] ctr_name 2720 * Pointer to the name of the statistic counter to read 2721 * @param[out] stat 2722 * Pointer to read statistic value. 2723 * @return 2724 * 0 on success and stat is valud, 1 if failed to read the value 2725 * rte_errno is set. 2726 * 2727 */ 2728 int 2729 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2730 uint64_t *stat) 2731 { 2732 int fd; 2733 2734 if (priv->sh) { 2735 if (priv->q_counters != NULL && 2736 strcmp(ctr_name, "out_of_buffer") == 0) 2737 return mlx5_devx_cmd_queue_counter_query 2738 (priv->q_counters, 0, (uint32_t *)stat); 2739 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2740 priv->sh->ibdev_path, 2741 priv->dev_port, 2742 ctr_name); 2743 fd = open(path, O_RDONLY); 2744 /* 2745 * in switchdev the file location is not per port 2746 * but rather in <ibdev_path>/hw_counters/<file_name>. 2747 */ 2748 if (fd == -1) { 2749 MKSTR(path1, "%s/hw_counters/%s", 2750 priv->sh->ibdev_path, 2751 ctr_name); 2752 fd = open(path1, O_RDONLY); 2753 } 2754 if (fd != -1) { 2755 char buf[21] = {'\0'}; 2756 ssize_t n = read(fd, buf, sizeof(buf)); 2757 2758 close(fd); 2759 if (n != -1) { 2760 *stat = strtoull(buf, NULL, 10); 2761 return 0; 2762 } 2763 } 2764 } 2765 *stat = 0; 2766 return 1; 2767 } 2768 2769 /** 2770 * Remove a MAC address from device 2771 * 2772 * @param dev 2773 * Pointer to Ethernet device structure. 2774 * @param index 2775 * MAC address index. 2776 */ 2777 void 2778 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2779 { 2780 struct mlx5_priv *priv = dev->data->dev_private; 2781 const int vf = priv->sh->dev_cap.vf; 2782 2783 if (vf) 2784 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2785 mlx5_ifindex(dev), priv->mac_own, 2786 &dev->data->mac_addrs[index], index); 2787 } 2788 2789 /** 2790 * Adds a MAC address to the device 2791 * 2792 * @param dev 2793 * Pointer to Ethernet device structure. 2794 * @param mac_addr 2795 * MAC address to register. 2796 * @param index 2797 * MAC address index. 2798 * 2799 * @return 2800 * 0 on success, a negative errno value otherwise 2801 */ 2802 int 2803 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2804 uint32_t index) 2805 { 2806 struct mlx5_priv *priv = dev->data->dev_private; 2807 const int vf = priv->sh->dev_cap.vf; 2808 int ret = 0; 2809 2810 if (vf) 2811 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2812 mlx5_ifindex(dev), priv->mac_own, 2813 mac, index); 2814 return ret; 2815 } 2816 2817 /** 2818 * Modify a VF MAC address 2819 * 2820 * @param priv 2821 * Pointer to device private data. 2822 * @param mac_addr 2823 * MAC address to modify into. 2824 * @param iface_idx 2825 * Net device interface index 2826 * @param vf_index 2827 * VF index 2828 * 2829 * @return 2830 * 0 on success, a negative errno value otherwise 2831 */ 2832 int 2833 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2834 unsigned int iface_idx, 2835 struct rte_ether_addr *mac_addr, 2836 int vf_index) 2837 { 2838 return mlx5_nl_vf_mac_addr_modify 2839 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2840 } 2841 2842 /** 2843 * Set device promiscuous mode 2844 * 2845 * @param dev 2846 * Pointer to Ethernet device structure. 2847 * @param enable 2848 * 0 - promiscuous is disabled, otherwise - enabled 2849 * 2850 * @return 2851 * 0 on success, a negative error value otherwise 2852 */ 2853 int 2854 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2855 { 2856 struct mlx5_priv *priv = dev->data->dev_private; 2857 2858 return mlx5_nl_promisc(priv->nl_socket_route, 2859 mlx5_ifindex(dev), !!enable); 2860 } 2861 2862 /** 2863 * Set device promiscuous mode 2864 * 2865 * @param dev 2866 * Pointer to Ethernet device structure. 2867 * @param enable 2868 * 0 - all multicase is disabled, otherwise - enabled 2869 * 2870 * @return 2871 * 0 on success, a negative error value otherwise 2872 */ 2873 int 2874 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2875 { 2876 struct mlx5_priv *priv = dev->data->dev_private; 2877 2878 return mlx5_nl_allmulti(priv->nl_socket_route, 2879 mlx5_ifindex(dev), !!enable); 2880 } 2881 2882 /** 2883 * Flush device MAC addresses 2884 * 2885 * @param dev 2886 * Pointer to Ethernet device structure. 2887 * 2888 */ 2889 void 2890 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2891 { 2892 struct mlx5_priv *priv = dev->data->dev_private; 2893 2894 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2895 dev->data->mac_addrs, 2896 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2897 } 2898