xref: /dpdk/drivers/net/mlx5/linux/mlx5_os.c (revision a2854c4de12970dc351eaefe9fbd3c77d403caf7)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2015 6WIND S.A.
3  * Copyright 2020 Mellanox Technologies, Ltd
4  */
5 
6 #include <stddef.h>
7 #include <unistd.h>
8 #include <string.h>
9 #include <stdint.h>
10 #include <stdlib.h>
11 #include <errno.h>
12 #include <net/if.h>
13 #include <sys/mman.h>
14 #include <linux/rtnetlink.h>
15 #include <linux/sockios.h>
16 #include <linux/ethtool.h>
17 #include <fcntl.h>
18 
19 /* Verbs header. */
20 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #ifdef PEDANTIC
22 #pragma GCC diagnostic ignored "-Wpedantic"
23 #endif
24 #include <infiniband/verbs.h>
25 #ifdef PEDANTIC
26 #pragma GCC diagnostic error "-Wpedantic"
27 #endif
28 
29 #include <rte_malloc.h>
30 #include <rte_ethdev_driver.h>
31 #include <rte_ethdev_pci.h>
32 #include <rte_pci.h>
33 #include <rte_bus_pci.h>
34 #include <rte_common.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
40 
41 #include <mlx5_glue.h>
42 #include <mlx5_devx_cmds.h>
43 #include <mlx5_common.h>
44 #include <mlx5_common_mp.h>
45 #include <mlx5_common_mr.h>
46 
47 #include "mlx5_defs.h"
48 #include "mlx5.h"
49 #include "mlx5_common_os.h"
50 #include "mlx5_utils.h"
51 #include "mlx5_rxtx.h"
52 #include "mlx5_autoconf.h"
53 #include "mlx5_mr.h"
54 #include "mlx5_flow.h"
55 #include "rte_pmd_mlx5.h"
56 #include "mlx5_verbs.h"
57 
58 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
59 
60 #ifndef HAVE_IBV_MLX5_MOD_MPW
61 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
62 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
63 #endif
64 
65 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
66 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
67 #endif
68 
69 /**
70  * Get mlx5 device attributes. The glue function query_device_ex() is called
71  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
72  * device attributes from the glue out parameter.
73  *
74  * @param dev
75  *   Pointer to ibv context.
76  *
77  * @param device_attr
78  *   Pointer to mlx5 device attributes.
79  *
80  * @return
81  *   0 on success, non zero error number otherwise
82  */
83 int
84 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
85 {
86 	int err;
87 	struct ibv_device_attr_ex attr_ex;
88 	memset(device_attr, 0, sizeof(*device_attr));
89 	err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
90 	if (err)
91 		return err;
92 
93 	device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
94 	device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
95 	device_attr->max_sge = attr_ex.orig_attr.max_sge;
96 	device_attr->max_cq = attr_ex.orig_attr.max_cq;
97 	device_attr->max_qp = attr_ex.orig_attr.max_qp;
98 	device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
99 	device_attr->max_rwq_indirection_table_size =
100 		attr_ex.rss_caps.max_rwq_indirection_table_size;
101 	device_attr->max_tso = attr_ex.tso_caps.max_tso;
102 	device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
103 
104 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
105 	err = mlx5_glue->dv_query_device(ctx, &dv_attr);
106 	if (err)
107 		return err;
108 
109 	device_attr->flags = dv_attr.flags;
110 	device_attr->comp_mask = dv_attr.comp_mask;
111 #ifdef HAVE_IBV_MLX5_MOD_SWP
112 	device_attr->sw_parsing_offloads =
113 		dv_attr.sw_parsing_caps.sw_parsing_offloads;
114 #endif
115 	device_attr->min_single_stride_log_num_of_bytes =
116 		dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
117 	device_attr->max_single_stride_log_num_of_bytes =
118 		dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
119 	device_attr->min_single_wqe_log_num_of_strides =
120 		dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
121 	device_attr->max_single_wqe_log_num_of_strides =
122 		dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
123 	device_attr->stride_supported_qpts =
124 		dv_attr.striding_rq_caps.supported_qpts;
125 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
126 	device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
127 #endif
128 
129 	return err;
130 }
131 
132 /**
133  * Verbs callback to allocate a memory. This function should allocate the space
134  * according to the size provided residing inside a huge page.
135  * Please note that all allocation must respect the alignment from libmlx5
136  * (i.e. currently sysconf(_SC_PAGESIZE)).
137  *
138  * @param[in] size
139  *   The size in bytes of the memory to allocate.
140  * @param[in] data
141  *   A pointer to the callback data.
142  *
143  * @return
144  *   Allocated buffer, NULL otherwise and rte_errno is set.
145  */
146 static void *
147 mlx5_alloc_verbs_buf(size_t size, void *data)
148 {
149 	struct mlx5_priv *priv = data;
150 	void *ret;
151 	size_t alignment = sysconf(_SC_PAGESIZE);
152 	unsigned int socket = SOCKET_ID_ANY;
153 
154 	if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
155 		const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
156 
157 		socket = ctrl->socket;
158 	} else if (priv->verbs_alloc_ctx.type ==
159 		   MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
160 		const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
161 
162 		socket = ctrl->socket;
163 	}
164 	MLX5_ASSERT(data != NULL);
165 	ret = rte_malloc_socket(__func__, size, alignment, socket);
166 	if (!ret && size)
167 		rte_errno = ENOMEM;
168 	return ret;
169 }
170 
171 /**
172  * Verbs callback to free a memory.
173  *
174  * @param[in] ptr
175  *   A pointer to the memory to free.
176  * @param[in] data
177  *   A pointer to the callback data.
178  */
179 static void
180 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
181 {
182 	MLX5_ASSERT(data != NULL);
183 	rte_free(ptr);
184 }
185 
186 /**
187  * Initialize DR related data within private structure.
188  * Routine checks the reference counter and does actual
189  * resources creation/initialization only if counter is zero.
190  *
191  * @param[in] priv
192  *   Pointer to the private device data structure.
193  *
194  * @return
195  *   Zero on success, positive error code otherwise.
196  */
197 static int
198 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
199 {
200 	struct mlx5_dev_ctx_shared *sh = priv->sh;
201 	char s[MLX5_HLIST_NAMESIZE];
202 	int err = 0;
203 
204 	if (!sh->flow_tbls)
205 		err = mlx5_alloc_table_hash_list(priv);
206 	else
207 		DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
208 			(void *)sh->flow_tbls);
209 	if (err)
210 		return err;
211 	/* Create tags hash list table. */
212 	snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
213 	sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
214 	if (!sh->tag_table) {
215 		DRV_LOG(ERR, "tags with hash creation failed.");
216 		err = ENOMEM;
217 		goto error;
218 	}
219 #ifdef HAVE_MLX5DV_DR
220 	void *domain;
221 
222 	if (sh->dv_refcnt) {
223 		/* Shared DV/DR structures is already initialized. */
224 		sh->dv_refcnt++;
225 		priv->dr_shared = 1;
226 		return 0;
227 	}
228 	/* Reference counter is zero, we should initialize structures. */
229 	domain = mlx5_glue->dr_create_domain(sh->ctx,
230 					     MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
231 	if (!domain) {
232 		DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
233 		err = errno;
234 		goto error;
235 	}
236 	sh->rx_domain = domain;
237 	domain = mlx5_glue->dr_create_domain(sh->ctx,
238 					     MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
239 	if (!domain) {
240 		DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
241 		err = errno;
242 		goto error;
243 	}
244 	pthread_mutex_init(&sh->dv_mutex, NULL);
245 	sh->tx_domain = domain;
246 #ifdef HAVE_MLX5DV_DR_ESWITCH
247 	if (priv->config.dv_esw_en) {
248 		domain  = mlx5_glue->dr_create_domain
249 			(sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
250 		if (!domain) {
251 			DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
252 			err = errno;
253 			goto error;
254 		}
255 		sh->fdb_domain = domain;
256 		sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
257 	}
258 #endif
259 	if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
260 		mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
261 		mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
262 		if (sh->fdb_domain)
263 			mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
264 	}
265 	sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
266 #endif /* HAVE_MLX5DV_DR */
267 	sh->dv_refcnt++;
268 	priv->dr_shared = 1;
269 	return 0;
270 error:
271 	/* Rollback the created objects. */
272 	if (sh->rx_domain) {
273 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
274 		sh->rx_domain = NULL;
275 	}
276 	if (sh->tx_domain) {
277 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
278 		sh->tx_domain = NULL;
279 	}
280 	if (sh->fdb_domain) {
281 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
282 		sh->fdb_domain = NULL;
283 	}
284 	if (sh->esw_drop_action) {
285 		mlx5_glue->destroy_flow_action(sh->esw_drop_action);
286 		sh->esw_drop_action = NULL;
287 	}
288 	if (sh->pop_vlan_action) {
289 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
290 		sh->pop_vlan_action = NULL;
291 	}
292 	if (sh->tag_table) {
293 		/* tags should be destroyed with flow before. */
294 		mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
295 		sh->tag_table = NULL;
296 	}
297 	mlx5_free_table_hash_list(priv);
298 	return err;
299 }
300 
301 /**
302  * Destroy DR related data within private structure.
303  *
304  * @param[in] priv
305  *   Pointer to the private device data structure.
306  */
307 void
308 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
309 {
310 	struct mlx5_dev_ctx_shared *sh;
311 
312 	if (!priv->dr_shared)
313 		return;
314 	priv->dr_shared = 0;
315 	sh = priv->sh;
316 	MLX5_ASSERT(sh);
317 #ifdef HAVE_MLX5DV_DR
318 	MLX5_ASSERT(sh->dv_refcnt);
319 	if (sh->dv_refcnt && --sh->dv_refcnt)
320 		return;
321 	if (sh->rx_domain) {
322 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
323 		sh->rx_domain = NULL;
324 	}
325 	if (sh->tx_domain) {
326 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
327 		sh->tx_domain = NULL;
328 	}
329 #ifdef HAVE_MLX5DV_DR_ESWITCH
330 	if (sh->fdb_domain) {
331 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
332 		sh->fdb_domain = NULL;
333 	}
334 	if (sh->esw_drop_action) {
335 		mlx5_glue->destroy_flow_action(sh->esw_drop_action);
336 		sh->esw_drop_action = NULL;
337 	}
338 #endif
339 	if (sh->pop_vlan_action) {
340 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
341 		sh->pop_vlan_action = NULL;
342 	}
343 	pthread_mutex_destroy(&sh->dv_mutex);
344 #endif /* HAVE_MLX5DV_DR */
345 	if (sh->tag_table) {
346 		/* tags should be destroyed with flow before. */
347 		mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
348 		sh->tag_table = NULL;
349 	}
350 	mlx5_free_table_hash_list(priv);
351 }
352 
353 /**
354  * Spawn an Ethernet device from Verbs information.
355  *
356  * @param dpdk_dev
357  *   Backing DPDK device.
358  * @param spawn
359  *   Verbs device parameters (name, port, switch_info) to spawn.
360  * @param config
361  *   Device configuration parameters.
362  *
363  * @return
364  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
365  *   is set. The following errors are defined:
366  *
367  *   EBUSY: device is not supposed to be spawned.
368  *   EEXIST: device is already spawned
369  */
370 static struct rte_eth_dev *
371 mlx5_dev_spawn(struct rte_device *dpdk_dev,
372 	       struct mlx5_dev_spawn_data *spawn,
373 	       struct mlx5_dev_config config)
374 {
375 	const struct mlx5_switch_info *switch_info = &spawn->info;
376 	struct mlx5_dev_ctx_shared *sh = NULL;
377 	struct ibv_port_attr port_attr;
378 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
379 	struct rte_eth_dev *eth_dev = NULL;
380 	struct mlx5_priv *priv = NULL;
381 	int err = 0;
382 	unsigned int hw_padding = 0;
383 	unsigned int mps;
384 	unsigned int cqe_comp;
385 	unsigned int cqe_pad = 0;
386 	unsigned int tunnel_en = 0;
387 	unsigned int mpls_en = 0;
388 	unsigned int swp = 0;
389 	unsigned int mprq = 0;
390 	unsigned int mprq_min_stride_size_n = 0;
391 	unsigned int mprq_max_stride_size_n = 0;
392 	unsigned int mprq_min_stride_num_n = 0;
393 	unsigned int mprq_max_stride_num_n = 0;
394 	struct rte_ether_addr mac;
395 	char name[RTE_ETH_NAME_MAX_LEN];
396 	int own_domain_id = 0;
397 	uint16_t port_id;
398 	unsigned int i;
399 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
400 	struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
401 #endif
402 
403 	/* Determine if this port representor is supposed to be spawned. */
404 	if (switch_info->representor && dpdk_dev->devargs) {
405 		struct rte_eth_devargs eth_da;
406 
407 		err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
408 		if (err) {
409 			rte_errno = -err;
410 			DRV_LOG(ERR, "failed to process device arguments: %s",
411 				strerror(rte_errno));
412 			return NULL;
413 		}
414 		for (i = 0; i < eth_da.nb_representor_ports; ++i)
415 			if (eth_da.representor_ports[i] ==
416 			    (uint16_t)switch_info->port_name)
417 				break;
418 		if (i == eth_da.nb_representor_ports) {
419 			rte_errno = EBUSY;
420 			return NULL;
421 		}
422 	}
423 	/* Build device name. */
424 	if (spawn->pf_bond <  0) {
425 		/* Single device. */
426 		if (!switch_info->representor)
427 			strlcpy(name, dpdk_dev->name, sizeof(name));
428 		else
429 			snprintf(name, sizeof(name), "%s_representor_%u",
430 				 dpdk_dev->name, switch_info->port_name);
431 	} else {
432 		/* Bonding device. */
433 		if (!switch_info->representor)
434 			snprintf(name, sizeof(name), "%s_%s",
435 				 dpdk_dev->name,
436 				 mlx5_os_get_dev_device_name(spawn->phys_dev));
437 		else
438 			snprintf(name, sizeof(name), "%s_%s_representor_%u",
439 				 dpdk_dev->name,
440 				 mlx5_os_get_dev_device_name(spawn->phys_dev),
441 				 switch_info->port_name);
442 	}
443 	/* check if the device is already spawned */
444 	if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
445 		rte_errno = EEXIST;
446 		return NULL;
447 	}
448 	DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
449 	if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
450 		struct mlx5_mp_id mp_id;
451 
452 		eth_dev = rte_eth_dev_attach_secondary(name);
453 		if (eth_dev == NULL) {
454 			DRV_LOG(ERR, "can not attach rte ethdev");
455 			rte_errno = ENOMEM;
456 			return NULL;
457 		}
458 		eth_dev->device = dpdk_dev;
459 		eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
460 		err = mlx5_proc_priv_init(eth_dev);
461 		if (err)
462 			return NULL;
463 		mp_id.port_id = eth_dev->data->port_id;
464 		strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
465 		/* Receive command fd from primary process */
466 		err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
467 		if (err < 0)
468 			goto err_secondary;
469 		/* Remap UAR for Tx queues. */
470 		err = mlx5_tx_uar_init_secondary(eth_dev, err);
471 		if (err)
472 			goto err_secondary;
473 		/*
474 		 * Ethdev pointer is still required as input since
475 		 * the primary device is not accessible from the
476 		 * secondary process.
477 		 */
478 		eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
479 		eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
480 		return eth_dev;
481 err_secondary:
482 		mlx5_dev_close(eth_dev);
483 		return NULL;
484 	}
485 	/*
486 	 * Some parameters ("tx_db_nc" in particularly) are needed in
487 	 * advance to create dv/verbs device context. We proceed the
488 	 * devargs here to get ones, and later proceed devargs again
489 	 * to override some hardware settings.
490 	 */
491 	err = mlx5_args(&config, dpdk_dev->devargs);
492 	if (err) {
493 		err = rte_errno;
494 		DRV_LOG(ERR, "failed to process device arguments: %s",
495 			strerror(rte_errno));
496 		goto error;
497 	}
498 	sh = mlx5_alloc_shared_dev_ctx(spawn, &config);
499 	if (!sh)
500 		return NULL;
501 	config.devx = sh->devx;
502 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
503 	config.dest_tir = 1;
504 #endif
505 #ifdef HAVE_IBV_MLX5_MOD_SWP
506 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
507 #endif
508 	/*
509 	 * Multi-packet send is supported by ConnectX-4 Lx PF as well
510 	 * as all ConnectX-5 devices.
511 	 */
512 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
513 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
514 #endif
515 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
516 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
517 #endif
518 	mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
519 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
520 		if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
521 			DRV_LOG(DEBUG, "enhanced MPW is supported");
522 			mps = MLX5_MPW_ENHANCED;
523 		} else {
524 			DRV_LOG(DEBUG, "MPW is supported");
525 			mps = MLX5_MPW;
526 		}
527 	} else {
528 		DRV_LOG(DEBUG, "MPW isn't supported");
529 		mps = MLX5_MPW_DISABLED;
530 	}
531 #ifdef HAVE_IBV_MLX5_MOD_SWP
532 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
533 		swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
534 	DRV_LOG(DEBUG, "SWP support: %u", swp);
535 #endif
536 	config.swp = !!swp;
537 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
538 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
539 		struct mlx5dv_striding_rq_caps mprq_caps =
540 			dv_attr.striding_rq_caps;
541 
542 		DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
543 			mprq_caps.min_single_stride_log_num_of_bytes);
544 		DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
545 			mprq_caps.max_single_stride_log_num_of_bytes);
546 		DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
547 			mprq_caps.min_single_wqe_log_num_of_strides);
548 		DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
549 			mprq_caps.max_single_wqe_log_num_of_strides);
550 		DRV_LOG(DEBUG, "\tsupported_qpts: %d",
551 			mprq_caps.supported_qpts);
552 		DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
553 		mprq = 1;
554 		mprq_min_stride_size_n =
555 			mprq_caps.min_single_stride_log_num_of_bytes;
556 		mprq_max_stride_size_n =
557 			mprq_caps.max_single_stride_log_num_of_bytes;
558 		mprq_min_stride_num_n =
559 			mprq_caps.min_single_wqe_log_num_of_strides;
560 		mprq_max_stride_num_n =
561 			mprq_caps.max_single_wqe_log_num_of_strides;
562 	}
563 #endif
564 	if (RTE_CACHE_LINE_SIZE == 128 &&
565 	    !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
566 		cqe_comp = 0;
567 	else
568 		cqe_comp = 1;
569 	config.cqe_comp = cqe_comp;
570 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
571 	/* Whether device supports 128B Rx CQE padding. */
572 	cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
573 		  (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
574 #endif
575 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
576 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
577 		tunnel_en = ((dv_attr.tunnel_offloads_caps &
578 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
579 			     (dv_attr.tunnel_offloads_caps &
580 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
581 			     (dv_attr.tunnel_offloads_caps &
582 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
583 	}
584 	DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
585 		tunnel_en ? "" : "not ");
586 #else
587 	DRV_LOG(WARNING,
588 		"tunnel offloading disabled due to old OFED/rdma-core version");
589 #endif
590 	config.tunnel_en = tunnel_en;
591 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
592 	mpls_en = ((dv_attr.tunnel_offloads_caps &
593 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
594 		   (dv_attr.tunnel_offloads_caps &
595 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
596 	DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
597 		mpls_en ? "" : "not ");
598 #else
599 	DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
600 		" old OFED/rdma-core version or firmware configuration");
601 #endif
602 	config.mpls_en = mpls_en;
603 	/* Check port status. */
604 	err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
605 	if (err) {
606 		DRV_LOG(ERR, "port query failed: %s", strerror(err));
607 		goto error;
608 	}
609 	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
610 		DRV_LOG(ERR, "port is not configured in Ethernet mode");
611 		err = EINVAL;
612 		goto error;
613 	}
614 	if (port_attr.state != IBV_PORT_ACTIVE)
615 		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
616 			mlx5_glue->port_state_str(port_attr.state),
617 			port_attr.state);
618 	/* Allocate private eth device data. */
619 	priv = rte_zmalloc("ethdev private structure",
620 			   sizeof(*priv),
621 			   RTE_CACHE_LINE_SIZE);
622 	if (priv == NULL) {
623 		DRV_LOG(ERR, "priv allocation failure");
624 		err = ENOMEM;
625 		goto error;
626 	}
627 	priv->sh = sh;
628 	priv->dev_port = spawn->phys_port;
629 	priv->pci_dev = spawn->pci_dev;
630 	priv->mtu = RTE_ETHER_MTU;
631 	priv->mp_id.port_id = port_id;
632 	strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
633 	/* Some internal functions rely on Netlink sockets, open them now. */
634 	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
635 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
636 	priv->representor = !!switch_info->representor;
637 	priv->master = !!switch_info->master;
638 	priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
639 	priv->vport_meta_tag = 0;
640 	priv->vport_meta_mask = 0;
641 	priv->pf_bond = spawn->pf_bond;
642 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
643 	/*
644 	 * The DevX port query API is implemented. E-Switch may use
645 	 * either vport or reg_c[0] metadata register to match on
646 	 * vport index. The engaged part of metadata register is
647 	 * defined by mask.
648 	 */
649 	if (switch_info->representor || switch_info->master) {
650 		devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
651 				      MLX5DV_DEVX_PORT_MATCH_REG_C_0;
652 		err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
653 						 &devx_port);
654 		if (err) {
655 			DRV_LOG(WARNING,
656 				"can't query devx port %d on device %s",
657 				spawn->phys_port,
658 				mlx5_os_get_dev_device_name(spawn->phys_dev));
659 			devx_port.comp_mask = 0;
660 		}
661 	}
662 	if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
663 		priv->vport_meta_tag = devx_port.reg_c_0.value;
664 		priv->vport_meta_mask = devx_port.reg_c_0.mask;
665 		if (!priv->vport_meta_mask) {
666 			DRV_LOG(ERR, "vport zero mask for port %d"
667 				     " on bonding device %s",
668 				     spawn->phys_port,
669 				     mlx5_os_get_dev_device_name
670 							(spawn->phys_dev));
671 			err = ENOTSUP;
672 			goto error;
673 		}
674 		if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
675 			DRV_LOG(ERR, "invalid vport tag for port %d"
676 				     " on bonding device %s",
677 				     spawn->phys_port,
678 				     mlx5_os_get_dev_device_name
679 							(spawn->phys_dev));
680 			err = ENOTSUP;
681 			goto error;
682 		}
683 	}
684 	if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
685 		priv->vport_id = devx_port.vport_num;
686 	} else if (spawn->pf_bond >= 0) {
687 		DRV_LOG(ERR, "can't deduce vport index for port %d"
688 			     " on bonding device %s",
689 			     spawn->phys_port,
690 			     mlx5_os_get_dev_device_name(spawn->phys_dev));
691 		err = ENOTSUP;
692 		goto error;
693 	} else {
694 		/* Suppose vport index in compatible way. */
695 		priv->vport_id = switch_info->representor ?
696 				 switch_info->port_name + 1 : -1;
697 	}
698 #else
699 	/*
700 	 * Kernel/rdma_core support single E-Switch per PF configurations
701 	 * only and vport_id field contains the vport index for
702 	 * associated VF, which is deduced from representor port name.
703 	 * For example, let's have the IB device port 10, it has
704 	 * attached network device eth0, which has port name attribute
705 	 * pf0vf2, we can deduce the VF number as 2, and set vport index
706 	 * as 3 (2+1). This assigning schema should be changed if the
707 	 * multiple E-Switch instances per PF configurations or/and PCI
708 	 * subfunctions are added.
709 	 */
710 	priv->vport_id = switch_info->representor ?
711 			 switch_info->port_name + 1 : -1;
712 #endif
713 	/* representor_id field keeps the unmodified VF index. */
714 	priv->representor_id = switch_info->representor ?
715 			       switch_info->port_name : -1;
716 	/*
717 	 * Look for sibling devices in order to reuse their switch domain
718 	 * if any, otherwise allocate one.
719 	 */
720 	MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
721 		const struct mlx5_priv *opriv =
722 			rte_eth_devices[port_id].data->dev_private;
723 
724 		if (!opriv ||
725 		    opriv->sh != priv->sh ||
726 			opriv->domain_id ==
727 			RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
728 			continue;
729 		priv->domain_id = opriv->domain_id;
730 		break;
731 	}
732 	if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
733 		err = rte_eth_switch_domain_alloc(&priv->domain_id);
734 		if (err) {
735 			err = rte_errno;
736 			DRV_LOG(ERR, "unable to allocate switch domain: %s",
737 				strerror(rte_errno));
738 			goto error;
739 		}
740 		own_domain_id = 1;
741 	}
742 	/* Override some values set by hardware configuration. */
743 	mlx5_args(&config, dpdk_dev->devargs);
744 	err = mlx5_dev_check_sibling_config(priv, &config);
745 	if (err)
746 		goto error;
747 	config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
748 			    IBV_DEVICE_RAW_IP_CSUM);
749 	DRV_LOG(DEBUG, "checksum offloading is %ssupported",
750 		(config.hw_csum ? "" : "not "));
751 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
752 	!defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
753 	DRV_LOG(DEBUG, "counters are not supported");
754 #endif
755 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
756 	if (config.dv_flow_en) {
757 		DRV_LOG(WARNING, "DV flow is not supported");
758 		config.dv_flow_en = 0;
759 	}
760 #endif
761 	config.ind_table_max_size =
762 		sh->device_attr.max_rwq_indirection_table_size;
763 	/*
764 	 * Remove this check once DPDK supports larger/variable
765 	 * indirection tables.
766 	 */
767 	if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
768 		config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
769 	DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
770 		config.ind_table_max_size);
771 	config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
772 				  IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
773 	DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
774 		(config.hw_vlan_strip ? "" : "not "));
775 	config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
776 				 IBV_RAW_PACKET_CAP_SCATTER_FCS);
777 	DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
778 		(config.hw_fcs_strip ? "" : "not "));
779 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
780 	hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
781 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
782 	hw_padding = !!(sh->device_attr.device_cap_flags_ex &
783 			IBV_DEVICE_PCI_WRITE_END_PADDING);
784 #endif
785 	if (config.hw_padding && !hw_padding) {
786 		DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
787 		config.hw_padding = 0;
788 	} else if (config.hw_padding) {
789 		DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
790 	}
791 	config.tso = (sh->device_attr.max_tso > 0 &&
792 		      (sh->device_attr.tso_supported_qpts &
793 		       (1 << IBV_QPT_RAW_PACKET)));
794 	if (config.tso)
795 		config.tso_max_payload_sz = sh->device_attr.max_tso;
796 	/*
797 	 * MPW is disabled by default, while the Enhanced MPW is enabled
798 	 * by default.
799 	 */
800 	if (config.mps == MLX5_ARG_UNSET)
801 		config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
802 							  MLX5_MPW_DISABLED;
803 	else
804 		config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
805 	DRV_LOG(INFO, "%sMPS is %s",
806 		config.mps == MLX5_MPW_ENHANCED ? "enhanced " :
807 		config.mps == MLX5_MPW ? "legacy " : "",
808 		config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
809 	if (config.cqe_comp && !cqe_comp) {
810 		DRV_LOG(WARNING, "Rx CQE compression isn't supported");
811 		config.cqe_comp = 0;
812 	}
813 	if (config.cqe_pad && !cqe_pad) {
814 		DRV_LOG(WARNING, "Rx CQE padding isn't supported");
815 		config.cqe_pad = 0;
816 	} else if (config.cqe_pad) {
817 		DRV_LOG(INFO, "Rx CQE padding is enabled");
818 	}
819 	if (config.devx) {
820 		priv->counter_fallback = 0;
821 		err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
822 		if (err) {
823 			err = -err;
824 			goto error;
825 		}
826 		if (!config.hca_attr.flow_counters_dump)
827 			priv->counter_fallback = 1;
828 #ifndef HAVE_IBV_DEVX_ASYNC
829 		priv->counter_fallback = 1;
830 #endif
831 		if (priv->counter_fallback)
832 			DRV_LOG(INFO, "Use fall-back DV counter management");
833 		/* Check for LRO support. */
834 		if (config.dest_tir && config.hca_attr.lro_cap &&
835 		    config.dv_flow_en) {
836 			/* TBD check tunnel lro caps. */
837 			config.lro.supported = config.hca_attr.lro_cap;
838 			DRV_LOG(DEBUG, "Device supports LRO");
839 			/*
840 			 * If LRO timeout is not configured by application,
841 			 * use the minimal supported value.
842 			 */
843 			if (!config.lro.timeout)
844 				config.lro.timeout =
845 				config.hca_attr.lro_timer_supported_periods[0];
846 			DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
847 				config.lro.timeout);
848 		}
849 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
850 		if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
851 		    config.dv_flow_en) {
852 			uint8_t reg_c_mask =
853 				config.hca_attr.qos.flow_meter_reg_c_ids;
854 			/*
855 			 * Meter needs two REG_C's for color match and pre-sfx
856 			 * flow match. Here get the REG_C for color match.
857 			 * REG_C_0 and REG_C_1 is reserved for metadata feature.
858 			 */
859 			reg_c_mask &= 0xfc;
860 			if (__builtin_popcount(reg_c_mask) < 1) {
861 				priv->mtr_en = 0;
862 				DRV_LOG(WARNING, "No available register for"
863 					" meter.");
864 			} else {
865 				priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
866 						      REG_C_0;
867 				priv->mtr_en = 1;
868 				priv->mtr_reg_share =
869 				      config.hca_attr.qos.flow_meter_reg_share;
870 				DRV_LOG(DEBUG, "The REG_C meter uses is %d",
871 					priv->mtr_color_reg);
872 			}
873 		}
874 #endif
875 	}
876 	if (config.tx_pp) {
877 		DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
878 			config.hca_attr.dev_freq_khz);
879 		DRV_LOG(DEBUG, "Packet pacing is %ssupported",
880 			config.hca_attr.qos.packet_pacing ? "" : "not ");
881 		DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
882 			config.hca_attr.cross_channel ? "" : "not ");
883 		DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
884 			config.hca_attr.wqe_index_ignore ? "" : "not ");
885 		DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
886 			config.hca_attr.non_wire_sq ? "" : "not ");
887 		DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
888 			config.hca_attr.log_max_static_sq_wq ? "" : "not ",
889 			config.hca_attr.log_max_static_sq_wq);
890 		DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
891 			config.hca_attr.qos.wqe_rate_pp ? "" : "not ");
892 		if (!config.devx) {
893 			DRV_LOG(ERR, "DevX is required for packet pacing");
894 			err = ENODEV;
895 			goto error;
896 		}
897 		if (!config.hca_attr.qos.packet_pacing) {
898 			DRV_LOG(ERR, "Packet pacing is not supported");
899 			err = ENODEV;
900 			goto error;
901 		}
902 		if (!config.hca_attr.cross_channel) {
903 			DRV_LOG(ERR, "Cross channel operations are"
904 				     " required for packet pacing");
905 			err = ENODEV;
906 			goto error;
907 		}
908 		if (!config.hca_attr.wqe_index_ignore) {
909 			DRV_LOG(ERR, "WQE index ignore feature is"
910 				     " required for packet pacing");
911 			err = ENODEV;
912 			goto error;
913 		}
914 		if (!config.hca_attr.non_wire_sq) {
915 			DRV_LOG(ERR, "Non-wire SQ feature is"
916 				     " required for packet pacing");
917 			err = ENODEV;
918 			goto error;
919 		}
920 		if (!config.hca_attr.log_max_static_sq_wq) {
921 			DRV_LOG(ERR, "Static WQE SQ feature is"
922 				     " required for packet pacing");
923 			err = ENODEV;
924 			goto error;
925 		}
926 		if (!config.hca_attr.qos.wqe_rate_pp) {
927 			DRV_LOG(ERR, "WQE rate mode is required"
928 				     " for packet pacing");
929 			err = ENODEV;
930 			goto error;
931 		}
932 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
933 		DRV_LOG(ERR, "DevX does not provide UAR offset,"
934 			     " can't create queues for packet pacing");
935 		err = ENODEV;
936 		goto error;
937 #endif
938 	}
939 	if (config.devx) {
940 		uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
941 
942 		err = mlx5_devx_cmd_register_read
943 			(sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
944 			reg, MLX5_ST_SZ_DW(register_mtutc));
945 		if (!err) {
946 			uint32_t ts_mode;
947 
948 			/* MTUTC register is read successfully. */
949 			ts_mode = MLX5_GET(register_mtutc, reg,
950 					   time_stamp_mode);
951 			if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
952 				config.rt_timestamp = 1;
953 		} else {
954 			/* Kernel does not support register reading. */
955 			if (config.hca_attr.dev_freq_khz ==
956 						 (NS_PER_S / MS_PER_S))
957 				config.rt_timestamp = 1;
958 		}
959 	}
960 	if (config.mprq.enabled && mprq) {
961 		if (config.mprq.stride_num_n &&
962 		    (config.mprq.stride_num_n > mprq_max_stride_num_n ||
963 		     config.mprq.stride_num_n < mprq_min_stride_num_n)) {
964 			config.mprq.stride_num_n =
965 				RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
966 						mprq_min_stride_num_n),
967 					mprq_max_stride_num_n);
968 			DRV_LOG(WARNING,
969 				"the number of strides"
970 				" for Multi-Packet RQ is out of range,"
971 				" setting default value (%u)",
972 				1 << config.mprq.stride_num_n);
973 		}
974 		if (config.mprq.stride_size_n &&
975 		    (config.mprq.stride_size_n > mprq_max_stride_size_n ||
976 		     config.mprq.stride_size_n < mprq_min_stride_size_n)) {
977 			config.mprq.stride_size_n =
978 				RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
979 						mprq_min_stride_size_n),
980 					mprq_max_stride_size_n);
981 			DRV_LOG(WARNING,
982 				"the size of a stride"
983 				" for Multi-Packet RQ is out of range,"
984 				" setting default value (%u)",
985 				1 << config.mprq.stride_size_n);
986 		}
987 		config.mprq.min_stride_size_n = mprq_min_stride_size_n;
988 		config.mprq.max_stride_size_n = mprq_max_stride_size_n;
989 	} else if (config.mprq.enabled && !mprq) {
990 		DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
991 		config.mprq.enabled = 0;
992 	}
993 	if (config.max_dump_files_num == 0)
994 		config.max_dump_files_num = 128;
995 	eth_dev = rte_eth_dev_allocate(name);
996 	if (eth_dev == NULL) {
997 		DRV_LOG(ERR, "can not allocate rte ethdev");
998 		err = ENOMEM;
999 		goto error;
1000 	}
1001 	/* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1002 	eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1003 	if (priv->representor) {
1004 		eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1005 		eth_dev->data->representor_id = priv->representor_id;
1006 	}
1007 	/*
1008 	 * Store associated network device interface index. This index
1009 	 * is permanent throughout the lifetime of device. So, we may store
1010 	 * the ifindex here and use the cached value further.
1011 	 */
1012 	MLX5_ASSERT(spawn->ifindex);
1013 	priv->if_index = spawn->ifindex;
1014 	eth_dev->data->dev_private = priv;
1015 	priv->dev_data = eth_dev->data;
1016 	eth_dev->data->mac_addrs = priv->mac;
1017 	eth_dev->device = dpdk_dev;
1018 	/* Configure the first MAC address by default. */
1019 	if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1020 		DRV_LOG(ERR,
1021 			"port %u cannot get MAC address, is mlx5_en"
1022 			" loaded? (errno: %s)",
1023 			eth_dev->data->port_id, strerror(rte_errno));
1024 		err = ENODEV;
1025 		goto error;
1026 	}
1027 	DRV_LOG(INFO,
1028 		"port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1029 		eth_dev->data->port_id,
1030 		mac.addr_bytes[0], mac.addr_bytes[1],
1031 		mac.addr_bytes[2], mac.addr_bytes[3],
1032 		mac.addr_bytes[4], mac.addr_bytes[5]);
1033 #ifdef RTE_LIBRTE_MLX5_DEBUG
1034 	{
1035 		char ifname[IF_NAMESIZE];
1036 
1037 		if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1038 			DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1039 				eth_dev->data->port_id, ifname);
1040 		else
1041 			DRV_LOG(DEBUG, "port %u ifname is unknown",
1042 				eth_dev->data->port_id);
1043 	}
1044 #endif
1045 	/* Get actual MTU if possible. */
1046 	err = mlx5_get_mtu(eth_dev, &priv->mtu);
1047 	if (err) {
1048 		err = rte_errno;
1049 		goto error;
1050 	}
1051 	DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1052 		priv->mtu);
1053 	/* Initialize burst functions to prevent crashes before link-up. */
1054 	eth_dev->rx_pkt_burst = removed_rx_burst;
1055 	eth_dev->tx_pkt_burst = removed_tx_burst;
1056 	eth_dev->dev_ops = &mlx5_os_dev_ops;
1057 	/* Register MAC address. */
1058 	claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1059 	if (config.vf && config.vf_nl_en)
1060 		mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1061 				      mlx5_ifindex(eth_dev),
1062 				      eth_dev->data->mac_addrs,
1063 				      MLX5_MAX_MAC_ADDRESSES);
1064 	priv->flows = 0;
1065 	priv->ctrl_flows = 0;
1066 	TAILQ_INIT(&priv->flow_meters);
1067 	TAILQ_INIT(&priv->flow_meter_profiles);
1068 	/* Hint libmlx5 to use PMD allocator for data plane resources */
1069 	mlx5_glue->dv_set_context_attr(sh->ctx,
1070 			MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1071 			(void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1072 				.alloc = &mlx5_alloc_verbs_buf,
1073 				.free = &mlx5_free_verbs_buf,
1074 				.data = priv,
1075 			}));
1076 	/* Bring Ethernet device up. */
1077 	DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1078 		eth_dev->data->port_id);
1079 	mlx5_set_link_up(eth_dev);
1080 	/*
1081 	 * Even though the interrupt handler is not installed yet,
1082 	 * interrupts will still trigger on the async_fd from
1083 	 * Verbs context returned by ibv_open_device().
1084 	 */
1085 	mlx5_link_update(eth_dev, 0);
1086 #ifdef HAVE_MLX5DV_DR_ESWITCH
1087 	if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1088 	      (switch_info->representor || switch_info->master)))
1089 		config.dv_esw_en = 0;
1090 #else
1091 	config.dv_esw_en = 0;
1092 #endif
1093 	/* Detect minimal data bytes to inline. */
1094 	mlx5_set_min_inline(spawn, &config);
1095 	/* Store device configuration on private structure. */
1096 	priv->config = config;
1097 	/* Create context for virtual machine VLAN workaround. */
1098 	priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1099 	if (config.dv_flow_en) {
1100 		err = mlx5_alloc_shared_dr(priv);
1101 		if (err)
1102 			goto error;
1103 		/*
1104 		 * RSS id is shared with meter flow id. Meter flow id can only
1105 		 * use the 24 MSB of the register.
1106 		 */
1107 		priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1108 				     MLX5_MTR_COLOR_BITS);
1109 		if (!priv->qrss_id_pool) {
1110 			DRV_LOG(ERR, "can't create flow id pool");
1111 			err = ENOMEM;
1112 			goto error;
1113 		}
1114 	}
1115 	/* Supported Verbs flow priority number detection. */
1116 	err = mlx5_flow_discover_priorities(eth_dev);
1117 	if (err < 0) {
1118 		err = -err;
1119 		goto error;
1120 	}
1121 	priv->config.flow_prio = err;
1122 	if (!priv->config.dv_esw_en &&
1123 	    priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1124 		DRV_LOG(WARNING, "metadata mode %u is not supported "
1125 				 "(no E-Switch)", priv->config.dv_xmeta_en);
1126 		priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1127 	}
1128 	mlx5_set_metadata_mask(eth_dev);
1129 	if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1130 	    !priv->sh->dv_regc0_mask) {
1131 		DRV_LOG(ERR, "metadata mode %u is not supported "
1132 			     "(no metadata reg_c[0] is available)",
1133 			     priv->config.dv_xmeta_en);
1134 			err = ENOTSUP;
1135 			goto error;
1136 	}
1137 	/*
1138 	 * Allocate the buffer for flow creating, just once.
1139 	 * The allocation must be done before any flow creating.
1140 	 */
1141 	mlx5_flow_alloc_intermediate(eth_dev);
1142 	/* Query availability of metadata reg_c's. */
1143 	err = mlx5_flow_discover_mreg_c(eth_dev);
1144 	if (err < 0) {
1145 		err = -err;
1146 		goto error;
1147 	}
1148 	if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1149 		DRV_LOG(DEBUG,
1150 			"port %u extensive metadata register is not supported",
1151 			eth_dev->data->port_id);
1152 		if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1153 			DRV_LOG(ERR, "metadata mode %u is not supported "
1154 				     "(no metadata registers available)",
1155 				     priv->config.dv_xmeta_en);
1156 			err = ENOTSUP;
1157 			goto error;
1158 		}
1159 	}
1160 	if (priv->config.dv_flow_en &&
1161 	    priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1162 	    mlx5_flow_ext_mreg_supported(eth_dev) &&
1163 	    priv->sh->dv_regc0_mask) {
1164 		priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1165 						      MLX5_FLOW_MREG_HTABLE_SZ);
1166 		if (!priv->mreg_cp_tbl) {
1167 			err = ENOMEM;
1168 			goto error;
1169 		}
1170 	}
1171 	return eth_dev;
1172 error:
1173 	if (priv) {
1174 		if (priv->mreg_cp_tbl)
1175 			mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1176 		if (priv->sh)
1177 			mlx5_os_free_shared_dr(priv);
1178 		if (priv->nl_socket_route >= 0)
1179 			close(priv->nl_socket_route);
1180 		if (priv->nl_socket_rdma >= 0)
1181 			close(priv->nl_socket_rdma);
1182 		if (priv->vmwa_context)
1183 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
1184 		if (priv->qrss_id_pool)
1185 			mlx5_flow_id_pool_release(priv->qrss_id_pool);
1186 		if (own_domain_id)
1187 			claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1188 		rte_free(priv);
1189 		if (eth_dev != NULL)
1190 			eth_dev->data->dev_private = NULL;
1191 	}
1192 	if (eth_dev != NULL) {
1193 		/* mac_addrs must not be freed alone because part of
1194 		 * dev_private
1195 		 **/
1196 		eth_dev->data->mac_addrs = NULL;
1197 		rte_eth_dev_release_port(eth_dev);
1198 	}
1199 	if (sh)
1200 		mlx5_free_shared_dev_ctx(sh);
1201 	MLX5_ASSERT(err > 0);
1202 	rte_errno = err;
1203 	return NULL;
1204 }
1205 
1206 /**
1207  * Comparison callback to sort device data.
1208  *
1209  * This is meant to be used with qsort().
1210  *
1211  * @param a[in]
1212  *   Pointer to pointer to first data object.
1213  * @param b[in]
1214  *   Pointer to pointer to second data object.
1215  *
1216  * @return
1217  *   0 if both objects are equal, less than 0 if the first argument is less
1218  *   than the second, greater than 0 otherwise.
1219  */
1220 static int
1221 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1222 {
1223 	const struct mlx5_switch_info *si_a =
1224 		&((const struct mlx5_dev_spawn_data *)a)->info;
1225 	const struct mlx5_switch_info *si_b =
1226 		&((const struct mlx5_dev_spawn_data *)b)->info;
1227 	int ret;
1228 
1229 	/* Master device first. */
1230 	ret = si_b->master - si_a->master;
1231 	if (ret)
1232 		return ret;
1233 	/* Then representor devices. */
1234 	ret = si_b->representor - si_a->representor;
1235 	if (ret)
1236 		return ret;
1237 	/* Unidentified devices come last in no specific order. */
1238 	if (!si_a->representor)
1239 		return 0;
1240 	/* Order representors by name. */
1241 	return si_a->port_name - si_b->port_name;
1242 }
1243 
1244 /**
1245  * Match PCI information for possible slaves of bonding device.
1246  *
1247  * @param[in] ibv_dev
1248  *   Pointer to Infiniband device structure.
1249  * @param[in] pci_dev
1250  *   Pointer to PCI device structure to match PCI address.
1251  * @param[in] nl_rdma
1252  *   Netlink RDMA group socket handle.
1253  *
1254  * @return
1255  *   negative value if no bonding device found, otherwise
1256  *   positive index of slave PF in bonding.
1257  */
1258 static int
1259 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1260 			   const struct rte_pci_device *pci_dev,
1261 			   int nl_rdma)
1262 {
1263 	char ifname[IF_NAMESIZE + 1];
1264 	unsigned int ifindex;
1265 	unsigned int np, i;
1266 	FILE *file = NULL;
1267 	int pf = -1;
1268 
1269 	/*
1270 	 * Try to get master device name. If something goes
1271 	 * wrong suppose the lack of kernel support and no
1272 	 * bonding devices.
1273 	 */
1274 	if (nl_rdma < 0)
1275 		return -1;
1276 	if (!strstr(ibv_dev->name, "bond"))
1277 		return -1;
1278 	np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1279 	if (!np)
1280 		return -1;
1281 	/*
1282 	 * The Master device might not be on the predefined
1283 	 * port (not on port index 1, it is not garanted),
1284 	 * we have to scan all Infiniband device port and
1285 	 * find master.
1286 	 */
1287 	for (i = 1; i <= np; ++i) {
1288 		/* Check whether Infiniband port is populated. */
1289 		ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1290 		if (!ifindex)
1291 			continue;
1292 		if (!if_indextoname(ifindex, ifname))
1293 			continue;
1294 		/* Try to read bonding slave names from sysfs. */
1295 		MKSTR(slaves,
1296 		      "/sys/class/net/%s/master/bonding/slaves", ifname);
1297 		file = fopen(slaves, "r");
1298 		if (file)
1299 			break;
1300 	}
1301 	if (!file)
1302 		return -1;
1303 	/* Use safe format to check maximal buffer length. */
1304 	MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1305 	while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1306 		char tmp_str[IF_NAMESIZE + 32];
1307 		struct rte_pci_addr pci_addr;
1308 		struct mlx5_switch_info	info;
1309 
1310 		/* Process slave interface names in the loop. */
1311 		snprintf(tmp_str, sizeof(tmp_str),
1312 			 "/sys/class/net/%s", ifname);
1313 		if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1314 			DRV_LOG(WARNING, "can not get PCI address"
1315 					 " for netdev \"%s\"", ifname);
1316 			continue;
1317 		}
1318 		if (pci_dev->addr.domain != pci_addr.domain ||
1319 		    pci_dev->addr.bus != pci_addr.bus ||
1320 		    pci_dev->addr.devid != pci_addr.devid ||
1321 		    pci_dev->addr.function != pci_addr.function)
1322 			continue;
1323 		/* Slave interface PCI address match found. */
1324 		fclose(file);
1325 		snprintf(tmp_str, sizeof(tmp_str),
1326 			 "/sys/class/net/%s/phys_port_name", ifname);
1327 		file = fopen(tmp_str, "rb");
1328 		if (!file)
1329 			break;
1330 		info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1331 		if (fscanf(file, "%32s", tmp_str) == 1)
1332 			mlx5_translate_port_name(tmp_str, &info);
1333 		if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1334 		    info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1335 			pf = info.port_name;
1336 		break;
1337 	}
1338 	if (file)
1339 		fclose(file);
1340 	return pf;
1341 }
1342 
1343 /**
1344  * DPDK callback to register a PCI device.
1345  *
1346  * This function spawns Ethernet devices out of a given PCI device.
1347  *
1348  * @param[in] pci_drv
1349  *   PCI driver structure (mlx5_driver).
1350  * @param[in] pci_dev
1351  *   PCI device information.
1352  *
1353  * @return
1354  *   0 on success, a negative errno value otherwise and rte_errno is set.
1355  */
1356 int
1357 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1358 		  struct rte_pci_device *pci_dev)
1359 {
1360 	struct ibv_device **ibv_list;
1361 	/*
1362 	 * Number of found IB Devices matching with requested PCI BDF.
1363 	 * nd != 1 means there are multiple IB devices over the same
1364 	 * PCI device and we have representors and master.
1365 	 */
1366 	unsigned int nd = 0;
1367 	/*
1368 	 * Number of found IB device Ports. nd = 1 and np = 1..n means
1369 	 * we have the single multiport IB device, and there may be
1370 	 * representors attached to some of found ports.
1371 	 */
1372 	unsigned int np = 0;
1373 	/*
1374 	 * Number of DPDK ethernet devices to Spawn - either over
1375 	 * multiple IB devices or multiple ports of single IB device.
1376 	 * Actually this is the number of iterations to spawn.
1377 	 */
1378 	unsigned int ns = 0;
1379 	/*
1380 	 * Bonding device
1381 	 *   < 0 - no bonding device (single one)
1382 	 *  >= 0 - bonding device (value is slave PF index)
1383 	 */
1384 	int bd = -1;
1385 	struct mlx5_dev_spawn_data *list = NULL;
1386 	struct mlx5_dev_config dev_config;
1387 	int ret;
1388 
1389 	if (mlx5_class_get(pci_dev->device.devargs) != MLX5_CLASS_NET) {
1390 		DRV_LOG(DEBUG, "Skip probing - should be probed by other mlx5"
1391 			" driver.");
1392 		return 1;
1393 	}
1394 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1395 		mlx5_pmd_socket_init();
1396 	ret = mlx5_init_once();
1397 	if (ret) {
1398 		DRV_LOG(ERR, "unable to init PMD global data: %s",
1399 			strerror(rte_errno));
1400 		return -rte_errno;
1401 	}
1402 	MLX5_ASSERT(pci_drv == &mlx5_driver);
1403 	errno = 0;
1404 	ibv_list = mlx5_glue->get_device_list(&ret);
1405 	if (!ibv_list) {
1406 		rte_errno = errno ? errno : ENOSYS;
1407 		DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1408 		return -rte_errno;
1409 	}
1410 	/*
1411 	 * First scan the list of all Infiniband devices to find
1412 	 * matching ones, gathering into the list.
1413 	 */
1414 	struct ibv_device *ibv_match[ret + 1];
1415 	int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1416 	int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1417 	unsigned int i;
1418 
1419 	while (ret-- > 0) {
1420 		struct rte_pci_addr pci_addr;
1421 
1422 		DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1423 		bd = mlx5_device_bond_pci_match
1424 				(ibv_list[ret], pci_dev, nl_rdma);
1425 		if (bd >= 0) {
1426 			/*
1427 			 * Bonding device detected. Only one match is allowed,
1428 			 * the bonding is supported over multi-port IB device,
1429 			 * there should be no matches on representor PCI
1430 			 * functions or non VF LAG bonding devices with
1431 			 * specified address.
1432 			 */
1433 			if (nd) {
1434 				DRV_LOG(ERR,
1435 					"multiple PCI match on bonding device"
1436 					"\"%s\" found", ibv_list[ret]->name);
1437 				rte_errno = ENOENT;
1438 				ret = -rte_errno;
1439 				goto exit;
1440 			}
1441 			DRV_LOG(INFO, "PCI information matches for"
1442 				      " slave %d bonding device \"%s\"",
1443 				      bd, ibv_list[ret]->name);
1444 			ibv_match[nd++] = ibv_list[ret];
1445 			break;
1446 		}
1447 		if (mlx5_dev_to_pci_addr
1448 			(ibv_list[ret]->ibdev_path, &pci_addr))
1449 			continue;
1450 		if (pci_dev->addr.domain != pci_addr.domain ||
1451 		    pci_dev->addr.bus != pci_addr.bus ||
1452 		    pci_dev->addr.devid != pci_addr.devid ||
1453 		    pci_dev->addr.function != pci_addr.function)
1454 			continue;
1455 		DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1456 			ibv_list[ret]->name);
1457 		ibv_match[nd++] = ibv_list[ret];
1458 	}
1459 	ibv_match[nd] = NULL;
1460 	if (!nd) {
1461 		/* No device matches, just complain and bail out. */
1462 		DRV_LOG(WARNING,
1463 			"no Verbs device matches PCI device " PCI_PRI_FMT ","
1464 			" are kernel drivers loaded?",
1465 			pci_dev->addr.domain, pci_dev->addr.bus,
1466 			pci_dev->addr.devid, pci_dev->addr.function);
1467 		rte_errno = ENOENT;
1468 		ret = -rte_errno;
1469 		goto exit;
1470 	}
1471 	if (nd == 1) {
1472 		/*
1473 		 * Found single matching device may have multiple ports.
1474 		 * Each port may be representor, we have to check the port
1475 		 * number and check the representors existence.
1476 		 */
1477 		if (nl_rdma >= 0)
1478 			np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1479 		if (!np)
1480 			DRV_LOG(WARNING, "can not get IB device \"%s\""
1481 					 " ports number", ibv_match[0]->name);
1482 		if (bd >= 0 && !np) {
1483 			DRV_LOG(ERR, "can not get ports"
1484 				     " for bonding device");
1485 			rte_errno = ENOENT;
1486 			ret = -rte_errno;
1487 			goto exit;
1488 		}
1489 	}
1490 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1491 	if (bd >= 0) {
1492 		/*
1493 		 * This may happen if there is VF LAG kernel support and
1494 		 * application is compiled with older rdma_core library.
1495 		 */
1496 		DRV_LOG(ERR,
1497 			"No kernel/verbs support for VF LAG bonding found.");
1498 		rte_errno = ENOTSUP;
1499 		ret = -rte_errno;
1500 		goto exit;
1501 	}
1502 #endif
1503 	/*
1504 	 * Now we can determine the maximal
1505 	 * amount of devices to be spawned.
1506 	 */
1507 	list = rte_zmalloc("device spawn data",
1508 			 sizeof(struct mlx5_dev_spawn_data) *
1509 			 (np ? np : nd),
1510 			 RTE_CACHE_LINE_SIZE);
1511 	if (!list) {
1512 		DRV_LOG(ERR, "spawn data array allocation failure");
1513 		rte_errno = ENOMEM;
1514 		ret = -rte_errno;
1515 		goto exit;
1516 	}
1517 	if (bd >= 0 || np > 1) {
1518 		/*
1519 		 * Single IB device with multiple ports found,
1520 		 * it may be E-Switch master device and representors.
1521 		 * We have to perform identification through the ports.
1522 		 */
1523 		MLX5_ASSERT(nl_rdma >= 0);
1524 		MLX5_ASSERT(ns == 0);
1525 		MLX5_ASSERT(nd == 1);
1526 		MLX5_ASSERT(np);
1527 		for (i = 1; i <= np; ++i) {
1528 			list[ns].max_port = np;
1529 			list[ns].phys_port = i;
1530 			list[ns].phys_dev = ibv_match[0];
1531 			list[ns].eth_dev = NULL;
1532 			list[ns].pci_dev = pci_dev;
1533 			list[ns].pf_bond = bd;
1534 			list[ns].ifindex = mlx5_nl_ifindex
1535 				(nl_rdma,
1536 				mlx5_os_get_dev_device_name
1537 						(list[ns].phys_dev), i);
1538 			if (!list[ns].ifindex) {
1539 				/*
1540 				 * No network interface index found for the
1541 				 * specified port, it means there is no
1542 				 * representor on this port. It's OK,
1543 				 * there can be disabled ports, for example
1544 				 * if sriov_numvfs < sriov_totalvfs.
1545 				 */
1546 				continue;
1547 			}
1548 			ret = -1;
1549 			if (nl_route >= 0)
1550 				ret = mlx5_nl_switch_info
1551 					       (nl_route,
1552 						list[ns].ifindex,
1553 						&list[ns].info);
1554 			if (ret || (!list[ns].info.representor &&
1555 				    !list[ns].info.master)) {
1556 				/*
1557 				 * We failed to recognize representors with
1558 				 * Netlink, let's try to perform the task
1559 				 * with sysfs.
1560 				 */
1561 				ret =  mlx5_sysfs_switch_info
1562 						(list[ns].ifindex,
1563 						 &list[ns].info);
1564 			}
1565 			if (!ret && bd >= 0) {
1566 				switch (list[ns].info.name_type) {
1567 				case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1568 					if (list[ns].info.port_name == bd)
1569 						ns++;
1570 					break;
1571 				case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1572 					/* Fallthrough */
1573 				case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1574 					if (list[ns].info.pf_num == bd)
1575 						ns++;
1576 					break;
1577 				default:
1578 					break;
1579 				}
1580 				continue;
1581 			}
1582 			if (!ret && (list[ns].info.representor ^
1583 				     list[ns].info.master))
1584 				ns++;
1585 		}
1586 		if (!ns) {
1587 			DRV_LOG(ERR,
1588 				"unable to recognize master/representors"
1589 				" on the IB device with multiple ports");
1590 			rte_errno = ENOENT;
1591 			ret = -rte_errno;
1592 			goto exit;
1593 		}
1594 	} else {
1595 		/*
1596 		 * The existence of several matching entries (nd > 1) means
1597 		 * port representors have been instantiated. No existing Verbs
1598 		 * call nor sysfs entries can tell them apart, this can only
1599 		 * be done through Netlink calls assuming kernel drivers are
1600 		 * recent enough to support them.
1601 		 *
1602 		 * In the event of identification failure through Netlink,
1603 		 * try again through sysfs, then:
1604 		 *
1605 		 * 1. A single IB device matches (nd == 1) with single
1606 		 *    port (np=0/1) and is not a representor, assume
1607 		 *    no switch support.
1608 		 *
1609 		 * 2. Otherwise no safe assumptions can be made;
1610 		 *    complain louder and bail out.
1611 		 */
1612 		for (i = 0; i != nd; ++i) {
1613 			memset(&list[ns].info, 0, sizeof(list[ns].info));
1614 			list[ns].max_port = 1;
1615 			list[ns].phys_port = 1;
1616 			list[ns].phys_dev = ibv_match[i];
1617 			list[ns].eth_dev = NULL;
1618 			list[ns].pci_dev = pci_dev;
1619 			list[ns].pf_bond = -1;
1620 			list[ns].ifindex = 0;
1621 			if (nl_rdma >= 0)
1622 				list[ns].ifindex = mlx5_nl_ifindex
1623 				(nl_rdma,
1624 				mlx5_os_get_dev_device_name
1625 						(list[ns].phys_dev), 1);
1626 			if (!list[ns].ifindex) {
1627 				char ifname[IF_NAMESIZE];
1628 
1629 				/*
1630 				 * Netlink failed, it may happen with old
1631 				 * ib_core kernel driver (before 4.16).
1632 				 * We can assume there is old driver because
1633 				 * here we are processing single ports IB
1634 				 * devices. Let's try sysfs to retrieve
1635 				 * the ifindex. The method works for
1636 				 * master device only.
1637 				 */
1638 				if (nd > 1) {
1639 					/*
1640 					 * Multiple devices found, assume
1641 					 * representors, can not distinguish
1642 					 * master/representor and retrieve
1643 					 * ifindex via sysfs.
1644 					 */
1645 					continue;
1646 				}
1647 				ret = mlx5_get_ifname_sysfs
1648 					(ibv_match[i]->ibdev_path, ifname);
1649 				if (!ret)
1650 					list[ns].ifindex =
1651 						if_nametoindex(ifname);
1652 				if (!list[ns].ifindex) {
1653 					/*
1654 					 * No network interface index found
1655 					 * for the specified device, it means
1656 					 * there it is neither representor
1657 					 * nor master.
1658 					 */
1659 					continue;
1660 				}
1661 			}
1662 			ret = -1;
1663 			if (nl_route >= 0)
1664 				ret = mlx5_nl_switch_info
1665 					       (nl_route,
1666 						list[ns].ifindex,
1667 						&list[ns].info);
1668 			if (ret || (!list[ns].info.representor &&
1669 				    !list[ns].info.master)) {
1670 				/*
1671 				 * We failed to recognize representors with
1672 				 * Netlink, let's try to perform the task
1673 				 * with sysfs.
1674 				 */
1675 				ret =  mlx5_sysfs_switch_info
1676 						(list[ns].ifindex,
1677 						 &list[ns].info);
1678 			}
1679 			if (!ret && (list[ns].info.representor ^
1680 				     list[ns].info.master)) {
1681 				ns++;
1682 			} else if ((nd == 1) &&
1683 				   !list[ns].info.representor &&
1684 				   !list[ns].info.master) {
1685 				/*
1686 				 * Single IB device with
1687 				 * one physical port and
1688 				 * attached network device.
1689 				 * May be SRIOV is not enabled
1690 				 * or there is no representors.
1691 				 */
1692 				DRV_LOG(INFO, "no E-Switch support detected");
1693 				ns++;
1694 				break;
1695 			}
1696 		}
1697 		if (!ns) {
1698 			DRV_LOG(ERR,
1699 				"unable to recognize master/representors"
1700 				" on the multiple IB devices");
1701 			rte_errno = ENOENT;
1702 			ret = -rte_errno;
1703 			goto exit;
1704 		}
1705 	}
1706 	MLX5_ASSERT(ns);
1707 	/*
1708 	 * Sort list to probe devices in natural order for users convenience
1709 	 * (i.e. master first, then representors from lowest to highest ID).
1710 	 */
1711 	qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1712 	/* Default configuration. */
1713 	dev_config = (struct mlx5_dev_config){
1714 		.hw_padding = 0,
1715 		.mps = MLX5_ARG_UNSET,
1716 		.dbnc = MLX5_ARG_UNSET,
1717 		.rx_vec_en = 1,
1718 		.txq_inline_max = MLX5_ARG_UNSET,
1719 		.txq_inline_min = MLX5_ARG_UNSET,
1720 		.txq_inline_mpw = MLX5_ARG_UNSET,
1721 		.txqs_inline = MLX5_ARG_UNSET,
1722 		.vf_nl_en = 1,
1723 		.mr_ext_memseg_en = 1,
1724 		.mprq = {
1725 			.enabled = 0, /* Disabled by default. */
1726 			.stride_num_n = 0,
1727 			.stride_size_n = 0,
1728 			.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1729 			.min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1730 		},
1731 		.dv_esw_en = 1,
1732 		.dv_flow_en = 1,
1733 		.log_hp_size = MLX5_ARG_UNSET,
1734 	};
1735 	/* Device specific configuration. */
1736 	switch (pci_dev->id.device_id) {
1737 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1738 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1739 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1740 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1741 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1742 	case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1743 	case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1744 		dev_config.vf = 1;
1745 		break;
1746 	default:
1747 		break;
1748 	}
1749 	for (i = 0; i != ns; ++i) {
1750 		uint32_t restore;
1751 
1752 		list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1753 						 &list[i],
1754 						 dev_config);
1755 		if (!list[i].eth_dev) {
1756 			if (rte_errno != EBUSY && rte_errno != EEXIST)
1757 				break;
1758 			/* Device is disabled or already spawned. Ignore it. */
1759 			continue;
1760 		}
1761 		restore = list[i].eth_dev->data->dev_flags;
1762 		rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1763 		/* Restore non-PCI flags cleared by the above call. */
1764 		list[i].eth_dev->data->dev_flags |= restore;
1765 		rte_eth_dev_probing_finish(list[i].eth_dev);
1766 	}
1767 	if (i != ns) {
1768 		DRV_LOG(ERR,
1769 			"probe of PCI device " PCI_PRI_FMT " aborted after"
1770 			" encountering an error: %s",
1771 			pci_dev->addr.domain, pci_dev->addr.bus,
1772 			pci_dev->addr.devid, pci_dev->addr.function,
1773 			strerror(rte_errno));
1774 		ret = -rte_errno;
1775 		/* Roll back. */
1776 		while (i--) {
1777 			if (!list[i].eth_dev)
1778 				continue;
1779 			mlx5_dev_close(list[i].eth_dev);
1780 			/* mac_addrs must not be freed because in dev_private */
1781 			list[i].eth_dev->data->mac_addrs = NULL;
1782 			claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1783 		}
1784 		/* Restore original error. */
1785 		rte_errno = -ret;
1786 	} else {
1787 		ret = 0;
1788 	}
1789 exit:
1790 	/*
1791 	 * Do the routine cleanup:
1792 	 * - close opened Netlink sockets
1793 	 * - free allocated spawn data array
1794 	 * - free the Infiniband device list
1795 	 */
1796 	if (nl_rdma >= 0)
1797 		close(nl_rdma);
1798 	if (nl_route >= 0)
1799 		close(nl_route);
1800 	if (list)
1801 		rte_free(list);
1802 	MLX5_ASSERT(ibv_list);
1803 	mlx5_glue->free_device_list(ibv_list);
1804 	return ret;
1805 }
1806 
1807 static int
1808 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1809 {
1810 	char *env;
1811 	int value;
1812 
1813 	MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1814 	/* Get environment variable to store. */
1815 	env = getenv(MLX5_SHUT_UP_BF);
1816 	value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1817 	if (config->dbnc == MLX5_ARG_UNSET)
1818 		setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1819 	else
1820 		setenv(MLX5_SHUT_UP_BF,
1821 		       config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1822 	return value;
1823 }
1824 
1825 static void
1826 mlx5_restore_doorbell_mapping_env(int value)
1827 {
1828 	MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1829 	/* Restore the original environment variable state. */
1830 	if (value == MLX5_ARG_UNSET)
1831 		unsetenv(MLX5_SHUT_UP_BF);
1832 	else
1833 		setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1834 }
1835 
1836 /**
1837  * Extract pdn of PD object using DV API.
1838  *
1839  * @param[in] pd
1840  *   Pointer to the verbs PD object.
1841  * @param[out] pdn
1842  *   Pointer to the PD object number variable.
1843  *
1844  * @return
1845  *   0 on success, error value otherwise.
1846  */
1847 int
1848 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
1849 {
1850 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1851 	struct mlx5dv_obj obj;
1852 	struct mlx5dv_pd pd_info;
1853 	int ret = 0;
1854 
1855 	obj.pd.in = pd;
1856 	obj.pd.out = &pd_info;
1857 	ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
1858 	if (ret) {
1859 		DRV_LOG(DEBUG, "Fail to get PD object info");
1860 		return ret;
1861 	}
1862 	*pdn = pd_info.pdn;
1863 	return 0;
1864 #else
1865 	(void)pd;
1866 	(void)pdn;
1867 	return -ENOTSUP;
1868 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
1869 }
1870 
1871 /**
1872  * Function API to open IB device.
1873  *
1874  * This function calls the Linux glue APIs to open a device.
1875  *
1876  * @param[in] spawn
1877  *   Pointer to the IB device attributes (name, port, etc).
1878  * @param[out] config
1879  *   Pointer to device configuration structure.
1880  * @param[out] sh
1881  *   Pointer to shared context structure.
1882  *
1883  * @return
1884  *   0 on success, a positive error value otherwise.
1885  */
1886 int
1887 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
1888 		     const struct mlx5_dev_config *config,
1889 		     struct mlx5_dev_ctx_shared *sh)
1890 {
1891 	int dbmap_env;
1892 	int err = 0;
1893 
1894 	sh->numa_node = spawn->pci_dev->device.numa_node;
1895 	pthread_mutex_init(&sh->txpp.mutex, NULL);
1896 	/*
1897 	 * Configure environment variable "MLX5_BF_SHUT_UP"
1898 	 * before the device creation. The rdma_core library
1899 	 * checks the variable at device creation and
1900 	 * stores the result internally.
1901 	 */
1902 	dbmap_env = mlx5_config_doorbell_mapping_env(config);
1903 	/* Try to open IB device with DV first, then usual Verbs. */
1904 	errno = 0;
1905 	sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
1906 	if (sh->ctx) {
1907 		sh->devx = 1;
1908 		DRV_LOG(DEBUG, "DevX is supported");
1909 		/* The device is created, no need for environment. */
1910 		mlx5_restore_doorbell_mapping_env(dbmap_env);
1911 	} else {
1912 		/* The environment variable is still configured. */
1913 		sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
1914 		err = errno ? errno : ENODEV;
1915 		/*
1916 		 * The environment variable is not needed anymore,
1917 		 * all device creation attempts are completed.
1918 		 */
1919 		mlx5_restore_doorbell_mapping_env(dbmap_env);
1920 		if (!sh->ctx)
1921 			return err;
1922 		DRV_LOG(DEBUG, "DevX is NOT supported");
1923 		err = 0;
1924 	}
1925 	return err;
1926 }
1927 
1928 /**
1929  * Install shared asynchronous device events handler.
1930  * This function is implemented to support event sharing
1931  * between multiple ports of single IB device.
1932  *
1933  * @param sh
1934  *   Pointer to mlx5_dev_ctx_shared object.
1935  */
1936 void
1937 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
1938 {
1939 	int ret;
1940 	int flags;
1941 
1942 	sh->intr_handle.fd = -1;
1943 	flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
1944 	ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
1945 		    F_SETFL, flags | O_NONBLOCK);
1946 	if (ret) {
1947 		DRV_LOG(INFO, "failed to change file descriptor async event"
1948 			" queue");
1949 	} else {
1950 		sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
1951 		sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
1952 		if (rte_intr_callback_register(&sh->intr_handle,
1953 					mlx5_dev_interrupt_handler, sh)) {
1954 			DRV_LOG(INFO, "Fail to install the shared interrupt.");
1955 			sh->intr_handle.fd = -1;
1956 		}
1957 	}
1958 	if (sh->devx) {
1959 #ifdef HAVE_IBV_DEVX_ASYNC
1960 		sh->intr_handle_devx.fd = -1;
1961 		sh->devx_comp =
1962 			(void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
1963 		struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
1964 		if (!devx_comp) {
1965 			DRV_LOG(INFO, "failed to allocate devx_comp.");
1966 			return;
1967 		}
1968 		flags = fcntl(devx_comp->fd, F_GETFL);
1969 		ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
1970 		if (ret) {
1971 			DRV_LOG(INFO, "failed to change file descriptor"
1972 				" devx comp");
1973 			return;
1974 		}
1975 		sh->intr_handle_devx.fd = devx_comp->fd;
1976 		sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
1977 		if (rte_intr_callback_register(&sh->intr_handle_devx,
1978 					mlx5_dev_interrupt_handler_devx, sh)) {
1979 			DRV_LOG(INFO, "Fail to install the devx shared"
1980 				" interrupt.");
1981 			sh->intr_handle_devx.fd = -1;
1982 		}
1983 #endif /* HAVE_IBV_DEVX_ASYNC */
1984 	}
1985 }
1986 
1987 /**
1988  * Uninstall shared asynchronous device events handler.
1989  * This function is implemented to support event sharing
1990  * between multiple ports of single IB device.
1991  *
1992  * @param dev
1993  *   Pointer to mlx5_dev_ctx_shared object.
1994  */
1995 void
1996 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
1997 {
1998 	if (sh->intr_handle.fd >= 0)
1999 		mlx5_intr_callback_unregister(&sh->intr_handle,
2000 					      mlx5_dev_interrupt_handler, sh);
2001 #ifdef HAVE_IBV_DEVX_ASYNC
2002 	if (sh->intr_handle_devx.fd >= 0)
2003 		rte_intr_callback_unregister(&sh->intr_handle_devx,
2004 				  mlx5_dev_interrupt_handler_devx, sh);
2005 	if (sh->devx_comp)
2006 		mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2007 #endif
2008 }
2009 
2010 /**
2011  * Read statistics by a named counter.
2012  *
2013  * @param[in] priv
2014  *   Pointer to the private device data structure.
2015  * @param[in] ctr_name
2016  *   Pointer to the name of the statistic counter to read
2017  * @param[out] stat
2018  *   Pointer to read statistic value.
2019  * @return
2020  *   0 on success and stat is valud, 1 if failed to read the value
2021  *   rte_errno is set.
2022  *
2023  */
2024 int
2025 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2026 		      uint64_t *stat)
2027 {
2028 	int fd;
2029 
2030 	if (priv->sh) {
2031 		MKSTR(path, "%s/ports/%d/hw_counters/%s",
2032 			  priv->sh->ibdev_path,
2033 			  priv->dev_port,
2034 			  ctr_name);
2035 		fd = open(path, O_RDONLY);
2036 		if (fd != -1) {
2037 			char buf[21] = {'\0'};
2038 			ssize_t n = read(fd, buf, sizeof(buf));
2039 
2040 			close(fd);
2041 			if (n != -1) {
2042 				*stat = strtoull(buf, NULL, 10);
2043 				return 0;
2044 			}
2045 		}
2046 	}
2047 	*stat = 0;
2048 	return 1;
2049 }
2050 
2051 /**
2052  * Read device counters table.
2053  *
2054  * @param dev
2055  *   Pointer to Ethernet device.
2056  * @param[out] stats
2057  *   Counters table output buffer.
2058  *
2059  * @return
2060  *   0 on success and stats is filled, negative errno value otherwise and
2061  *   rte_errno is set.
2062  */
2063 int
2064 mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats)
2065 {
2066 	struct mlx5_priv *priv = dev->data->dev_private;
2067 	struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl;
2068 	unsigned int i;
2069 	struct ifreq ifr;
2070 	unsigned int stats_sz = xstats_ctrl->stats_n * sizeof(uint64_t);
2071 	unsigned char et_stat_buf[sizeof(struct ethtool_stats) + stats_sz];
2072 	struct ethtool_stats *et_stats = (struct ethtool_stats *)et_stat_buf;
2073 	int ret;
2074 
2075 	et_stats->cmd = ETHTOOL_GSTATS;
2076 	et_stats->n_stats = xstats_ctrl->stats_n;
2077 	ifr.ifr_data = (caddr_t)et_stats;
2078 	ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
2079 	if (ret) {
2080 		DRV_LOG(WARNING,
2081 			"port %u unable to read statistic values from device",
2082 			dev->data->port_id);
2083 		return ret;
2084 	}
2085 	for (i = 0; i != xstats_ctrl->mlx5_stats_n; ++i) {
2086 		if (xstats_ctrl->info[i].dev) {
2087 			ret = mlx5_os_read_dev_stat(priv,
2088 					    xstats_ctrl->info[i].ctr_name,
2089 					    &stats[i]);
2090 			/* return last xstats counter if fail to read. */
2091 			if (ret == 0)
2092 				xstats_ctrl->xstats[i] = stats[i];
2093 			else
2094 				stats[i] = xstats_ctrl->xstats[i];
2095 		} else {
2096 			stats[i] = (uint64_t)
2097 				et_stats->data[xstats_ctrl->dev_table_idx[i]];
2098 		}
2099 	}
2100 	return 0;
2101 }
2102 
2103 /**
2104  * Query the number of statistics provided by ETHTOOL.
2105  *
2106  * @param dev
2107  *   Pointer to Ethernet device.
2108  *
2109  * @return
2110  *   Number of statistics on success, negative errno value otherwise and
2111  *   rte_errno is set.
2112  */
2113 int
2114 mlx5_os_get_stats_n(struct rte_eth_dev *dev)
2115 {
2116 	struct ethtool_drvinfo drvinfo;
2117 	struct ifreq ifr;
2118 	int ret;
2119 
2120 	drvinfo.cmd = ETHTOOL_GDRVINFO;
2121 	ifr.ifr_data = (caddr_t)&drvinfo;
2122 	ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
2123 	if (ret) {
2124 		DRV_LOG(WARNING, "port %u unable to query number of statistics",
2125 			dev->data->port_id);
2126 		return ret;
2127 	}
2128 	return drvinfo.n_stats;
2129 }
2130 
2131 static const struct mlx5_counter_ctrl mlx5_counters_init[] = {
2132 	{
2133 		.dpdk_name = "rx_port_unicast_bytes",
2134 		.ctr_name = "rx_vport_unicast_bytes",
2135 	},
2136 	{
2137 		.dpdk_name = "rx_port_multicast_bytes",
2138 		.ctr_name = "rx_vport_multicast_bytes",
2139 	},
2140 	{
2141 		.dpdk_name = "rx_port_broadcast_bytes",
2142 		.ctr_name = "rx_vport_broadcast_bytes",
2143 	},
2144 	{
2145 		.dpdk_name = "rx_port_unicast_packets",
2146 		.ctr_name = "rx_vport_unicast_packets",
2147 	},
2148 	{
2149 		.dpdk_name = "rx_port_multicast_packets",
2150 		.ctr_name = "rx_vport_multicast_packets",
2151 	},
2152 	{
2153 		.dpdk_name = "rx_port_broadcast_packets",
2154 		.ctr_name = "rx_vport_broadcast_packets",
2155 	},
2156 	{
2157 		.dpdk_name = "tx_port_unicast_bytes",
2158 		.ctr_name = "tx_vport_unicast_bytes",
2159 	},
2160 	{
2161 		.dpdk_name = "tx_port_multicast_bytes",
2162 		.ctr_name = "tx_vport_multicast_bytes",
2163 	},
2164 	{
2165 		.dpdk_name = "tx_port_broadcast_bytes",
2166 		.ctr_name = "tx_vport_broadcast_bytes",
2167 	},
2168 	{
2169 		.dpdk_name = "tx_port_unicast_packets",
2170 		.ctr_name = "tx_vport_unicast_packets",
2171 	},
2172 	{
2173 		.dpdk_name = "tx_port_multicast_packets",
2174 		.ctr_name = "tx_vport_multicast_packets",
2175 	},
2176 	{
2177 		.dpdk_name = "tx_port_broadcast_packets",
2178 		.ctr_name = "tx_vport_broadcast_packets",
2179 	},
2180 	{
2181 		.dpdk_name = "rx_wqe_err",
2182 		.ctr_name = "rx_wqe_err",
2183 	},
2184 	{
2185 		.dpdk_name = "rx_crc_errors_phy",
2186 		.ctr_name = "rx_crc_errors_phy",
2187 	},
2188 	{
2189 		.dpdk_name = "rx_in_range_len_errors_phy",
2190 		.ctr_name = "rx_in_range_len_errors_phy",
2191 	},
2192 	{
2193 		.dpdk_name = "rx_symbol_err_phy",
2194 		.ctr_name = "rx_symbol_err_phy",
2195 	},
2196 	{
2197 		.dpdk_name = "tx_errors_phy",
2198 		.ctr_name = "tx_errors_phy",
2199 	},
2200 	{
2201 		.dpdk_name = "rx_out_of_buffer",
2202 		.ctr_name = "out_of_buffer",
2203 		.dev = 1,
2204 	},
2205 	{
2206 		.dpdk_name = "tx_packets_phy",
2207 		.ctr_name = "tx_packets_phy",
2208 	},
2209 	{
2210 		.dpdk_name = "rx_packets_phy",
2211 		.ctr_name = "rx_packets_phy",
2212 	},
2213 	{
2214 		.dpdk_name = "tx_discards_phy",
2215 		.ctr_name = "tx_discards_phy",
2216 	},
2217 	{
2218 		.dpdk_name = "rx_discards_phy",
2219 		.ctr_name = "rx_discards_phy",
2220 	},
2221 	{
2222 		.dpdk_name = "tx_bytes_phy",
2223 		.ctr_name = "tx_bytes_phy",
2224 	},
2225 	{
2226 		.dpdk_name = "rx_bytes_phy",
2227 		.ctr_name = "rx_bytes_phy",
2228 	},
2229 	/* Representor only */
2230 	{
2231 		.dpdk_name = "rx_packets",
2232 		.ctr_name = "vport_rx_packets",
2233 	},
2234 	{
2235 		.dpdk_name = "rx_bytes",
2236 		.ctr_name = "vport_rx_bytes",
2237 	},
2238 	{
2239 		.dpdk_name = "tx_packets",
2240 		.ctr_name = "vport_tx_packets",
2241 	},
2242 	{
2243 		.dpdk_name = "tx_bytes",
2244 		.ctr_name = "vport_tx_bytes",
2245 	},
2246 };
2247 
2248 static const unsigned int xstats_n = RTE_DIM(mlx5_counters_init);
2249 
2250 /**
2251  * Init the structures to read device counters.
2252  *
2253  * @param dev
2254  *   Pointer to Ethernet device.
2255  */
2256 void
2257 mlx5_os_stats_init(struct rte_eth_dev *dev)
2258 {
2259 	struct mlx5_priv *priv = dev->data->dev_private;
2260 	struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl;
2261 	struct mlx5_stats_ctrl *stats_ctrl = &priv->stats_ctrl;
2262 	unsigned int i;
2263 	unsigned int j;
2264 	struct ifreq ifr;
2265 	struct ethtool_gstrings *strings = NULL;
2266 	unsigned int dev_stats_n;
2267 	unsigned int str_sz;
2268 	int ret;
2269 
2270 	/* So that it won't aggregate for each init. */
2271 	xstats_ctrl->mlx5_stats_n = 0;
2272 	ret = mlx5_os_get_stats_n(dev);
2273 	if (ret < 0) {
2274 		DRV_LOG(WARNING, "port %u no extended statistics available",
2275 			dev->data->port_id);
2276 		return;
2277 	}
2278 	dev_stats_n = ret;
2279 	/* Allocate memory to grab stat names and values. */
2280 	str_sz = dev_stats_n * ETH_GSTRING_LEN;
2281 	strings = (struct ethtool_gstrings *)
2282 		  rte_malloc("xstats_strings",
2283 			     str_sz + sizeof(struct ethtool_gstrings), 0);
2284 	if (!strings) {
2285 		DRV_LOG(WARNING, "port %u unable to allocate memory for xstats",
2286 		     dev->data->port_id);
2287 		return;
2288 	}
2289 	strings->cmd = ETHTOOL_GSTRINGS;
2290 	strings->string_set = ETH_SS_STATS;
2291 	strings->len = dev_stats_n;
2292 	ifr.ifr_data = (caddr_t)strings;
2293 	ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
2294 	if (ret) {
2295 		DRV_LOG(WARNING, "port %u unable to get statistic names",
2296 			dev->data->port_id);
2297 		goto free;
2298 	}
2299 	for (i = 0; i != dev_stats_n; ++i) {
2300 		const char *curr_string = (const char *)
2301 			&strings->data[i * ETH_GSTRING_LEN];
2302 
2303 		for (j = 0; j != xstats_n; ++j) {
2304 			if (!strcmp(mlx5_counters_init[j].ctr_name,
2305 				    curr_string)) {
2306 				unsigned int idx = xstats_ctrl->mlx5_stats_n++;
2307 
2308 				xstats_ctrl->dev_table_idx[idx] = i;
2309 				xstats_ctrl->info[idx] = mlx5_counters_init[j];
2310 				break;
2311 			}
2312 		}
2313 	}
2314 	/* Add dev counters. */
2315 	for (i = 0; i != xstats_n; ++i) {
2316 		if (mlx5_counters_init[i].dev) {
2317 			unsigned int idx = xstats_ctrl->mlx5_stats_n++;
2318 
2319 			xstats_ctrl->info[idx] = mlx5_counters_init[i];
2320 			xstats_ctrl->hw_stats[idx] = 0;
2321 		}
2322 	}
2323 	MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS);
2324 	xstats_ctrl->stats_n = dev_stats_n;
2325 	/* Copy to base at first time. */
2326 	ret = mlx5_os_read_dev_counters(dev, xstats_ctrl->base);
2327 	if (ret)
2328 		DRV_LOG(ERR, "port %u cannot read device counters: %s",
2329 			dev->data->port_id, strerror(rte_errno));
2330 	mlx5_os_read_dev_stat(priv, "out_of_buffer", &stats_ctrl->imissed_base);
2331 	stats_ctrl->imissed = 0;
2332 free:
2333 	rte_free(strings);
2334 }
2335 
2336 /**
2337  * Set the reg_mr and dereg_mr call backs
2338  *
2339  * @param reg_mr_cb[out]
2340  *   Pointer to reg_mr func
2341  * @param dereg_mr_cb[out]
2342  *   Pointer to dereg_mr func
2343  *
2344  */
2345 void
2346 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2347 		      mlx5_dereg_mr_t *dereg_mr_cb)
2348 {
2349 	*reg_mr_cb = mlx5_verbs_ops.reg_mr;
2350 	*dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2351 }
2352 
2353 const struct eth_dev_ops mlx5_os_dev_ops = {
2354 	.dev_configure = mlx5_dev_configure,
2355 	.dev_start = mlx5_dev_start,
2356 	.dev_stop = mlx5_dev_stop,
2357 	.dev_set_link_down = mlx5_set_link_down,
2358 	.dev_set_link_up = mlx5_set_link_up,
2359 	.dev_close = mlx5_dev_close,
2360 	.promiscuous_enable = mlx5_promiscuous_enable,
2361 	.promiscuous_disable = mlx5_promiscuous_disable,
2362 	.allmulticast_enable = mlx5_allmulticast_enable,
2363 	.allmulticast_disable = mlx5_allmulticast_disable,
2364 	.link_update = mlx5_link_update,
2365 	.stats_get = mlx5_stats_get,
2366 	.stats_reset = mlx5_stats_reset,
2367 	.xstats_get = mlx5_xstats_get,
2368 	.xstats_reset = mlx5_xstats_reset,
2369 	.xstats_get_names = mlx5_xstats_get_names,
2370 	.fw_version_get = mlx5_fw_version_get,
2371 	.dev_infos_get = mlx5_dev_infos_get,
2372 	.read_clock = mlx5_txpp_read_clock,
2373 	.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2374 	.vlan_filter_set = mlx5_vlan_filter_set,
2375 	.rx_queue_setup = mlx5_rx_queue_setup,
2376 	.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2377 	.tx_queue_setup = mlx5_tx_queue_setup,
2378 	.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2379 	.rx_queue_release = mlx5_rx_queue_release,
2380 	.tx_queue_release = mlx5_tx_queue_release,
2381 	.flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2382 	.flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2383 	.mac_addr_remove = mlx5_mac_addr_remove,
2384 	.mac_addr_add = mlx5_mac_addr_add,
2385 	.mac_addr_set = mlx5_mac_addr_set,
2386 	.set_mc_addr_list = mlx5_set_mc_addr_list,
2387 	.mtu_set = mlx5_dev_set_mtu,
2388 	.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2389 	.vlan_offload_set = mlx5_vlan_offload_set,
2390 	.reta_update = mlx5_dev_rss_reta_update,
2391 	.reta_query = mlx5_dev_rss_reta_query,
2392 	.rss_hash_update = mlx5_rss_hash_update,
2393 	.rss_hash_conf_get = mlx5_rss_hash_conf_get,
2394 	.filter_ctrl = mlx5_dev_filter_ctrl,
2395 	.rx_descriptor_status = mlx5_rx_descriptor_status,
2396 	.tx_descriptor_status = mlx5_tx_descriptor_status,
2397 	.rxq_info_get = mlx5_rxq_info_get,
2398 	.txq_info_get = mlx5_txq_info_get,
2399 	.rx_burst_mode_get = mlx5_rx_burst_mode_get,
2400 	.tx_burst_mode_get = mlx5_tx_burst_mode_get,
2401 	.rx_queue_count = mlx5_rx_queue_count,
2402 	.rx_queue_intr_enable = mlx5_rx_intr_enable,
2403 	.rx_queue_intr_disable = mlx5_rx_intr_disable,
2404 	.is_removed = mlx5_is_removed,
2405 	.udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2406 	.get_module_info = mlx5_get_module_info,
2407 	.get_module_eeprom = mlx5_get_module_eeprom,
2408 	.hairpin_cap_get = mlx5_hairpin_cap_get,
2409 	.mtr_ops_get = mlx5_flow_meter_ops_get,
2410 };
2411 
2412 /* Available operations from secondary process. */
2413 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2414 	.stats_get = mlx5_stats_get,
2415 	.stats_reset = mlx5_stats_reset,
2416 	.xstats_get = mlx5_xstats_get,
2417 	.xstats_reset = mlx5_xstats_reset,
2418 	.xstats_get_names = mlx5_xstats_get_names,
2419 	.fw_version_get = mlx5_fw_version_get,
2420 	.dev_infos_get = mlx5_dev_infos_get,
2421 	.read_clock = mlx5_txpp_read_clock,
2422 	.rx_descriptor_status = mlx5_rx_descriptor_status,
2423 	.tx_descriptor_status = mlx5_tx_descriptor_status,
2424 	.rxq_info_get = mlx5_rxq_info_get,
2425 	.txq_info_get = mlx5_txq_info_get,
2426 	.rx_burst_mode_get = mlx5_rx_burst_mode_get,
2427 	.tx_burst_mode_get = mlx5_tx_burst_mode_get,
2428 	.get_module_info = mlx5_get_module_info,
2429 	.get_module_eeprom = mlx5_get_module_eeprom,
2430 };
2431 
2432 /* Available operations in flow isolated mode. */
2433 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2434 	.dev_configure = mlx5_dev_configure,
2435 	.dev_start = mlx5_dev_start,
2436 	.dev_stop = mlx5_dev_stop,
2437 	.dev_set_link_down = mlx5_set_link_down,
2438 	.dev_set_link_up = mlx5_set_link_up,
2439 	.dev_close = mlx5_dev_close,
2440 	.promiscuous_enable = mlx5_promiscuous_enable,
2441 	.promiscuous_disable = mlx5_promiscuous_disable,
2442 	.allmulticast_enable = mlx5_allmulticast_enable,
2443 	.allmulticast_disable = mlx5_allmulticast_disable,
2444 	.link_update = mlx5_link_update,
2445 	.stats_get = mlx5_stats_get,
2446 	.stats_reset = mlx5_stats_reset,
2447 	.xstats_get = mlx5_xstats_get,
2448 	.xstats_reset = mlx5_xstats_reset,
2449 	.xstats_get_names = mlx5_xstats_get_names,
2450 	.fw_version_get = mlx5_fw_version_get,
2451 	.dev_infos_get = mlx5_dev_infos_get,
2452 	.read_clock = mlx5_txpp_read_clock,
2453 	.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2454 	.vlan_filter_set = mlx5_vlan_filter_set,
2455 	.rx_queue_setup = mlx5_rx_queue_setup,
2456 	.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2457 	.tx_queue_setup = mlx5_tx_queue_setup,
2458 	.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2459 	.rx_queue_release = mlx5_rx_queue_release,
2460 	.tx_queue_release = mlx5_tx_queue_release,
2461 	.flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2462 	.flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2463 	.mac_addr_remove = mlx5_mac_addr_remove,
2464 	.mac_addr_add = mlx5_mac_addr_add,
2465 	.mac_addr_set = mlx5_mac_addr_set,
2466 	.set_mc_addr_list = mlx5_set_mc_addr_list,
2467 	.mtu_set = mlx5_dev_set_mtu,
2468 	.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2469 	.vlan_offload_set = mlx5_vlan_offload_set,
2470 	.filter_ctrl = mlx5_dev_filter_ctrl,
2471 	.rx_descriptor_status = mlx5_rx_descriptor_status,
2472 	.tx_descriptor_status = mlx5_tx_descriptor_status,
2473 	.rxq_info_get = mlx5_rxq_info_get,
2474 	.txq_info_get = mlx5_txq_info_get,
2475 	.rx_burst_mode_get = mlx5_rx_burst_mode_get,
2476 	.tx_burst_mode_get = mlx5_tx_burst_mode_get,
2477 	.rx_queue_intr_enable = mlx5_rx_intr_enable,
2478 	.rx_queue_intr_disable = mlx5_rx_intr_disable,
2479 	.is_removed = mlx5_is_removed,
2480 	.get_module_info = mlx5_get_module_info,
2481 	.get_module_eeprom = mlx5_get_module_eeprom,
2482 	.hairpin_cap_get = mlx5_hairpin_cap_get,
2483 	.mtr_ops_get = mlx5_flow_meter_ops_get,
2484 };
2485