1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <rte_bus_pci.h> 23 #include <rte_bus_auxiliary.h> 24 #include <rte_common.h> 25 #include <rte_kvargs.h> 26 #include <rte_rwlock.h> 27 #include <rte_spinlock.h> 28 #include <rte_string_fns.h> 29 #include <rte_alarm.h> 30 #include <rte_eal_paging.h> 31 32 #include <mlx5_glue.h> 33 #include <mlx5_devx_cmds.h> 34 #include <mlx5_common.h> 35 #include <mlx5_common_mp.h> 36 #include <mlx5_common_mr.h> 37 #include <mlx5_malloc.h> 38 39 #include "mlx5_defs.h" 40 #include "mlx5.h" 41 #include "mlx5_common_os.h" 42 #include "mlx5_utils.h" 43 #include "mlx5_rxtx.h" 44 #include "mlx5_rx.h" 45 #include "mlx5_tx.h" 46 #include "mlx5_autoconf.h" 47 #include "mlx5_flow.h" 48 #include "rte_pmd_mlx5.h" 49 #include "mlx5_verbs.h" 50 #include "mlx5_nl.h" 51 #include "mlx5_devx.h" 52 53 #ifndef HAVE_IBV_MLX5_MOD_MPW 54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 56 #endif 57 58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 60 #endif 61 62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 63 64 /* Spinlock for mlx5_shared_data allocation. */ 65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 66 67 /* Process local data for secondary processes. */ 68 static struct mlx5_local_data mlx5_local_data; 69 70 /* rte flow indexed pool configuration. */ 71 static struct mlx5_indexed_pool_config icfg[] = { 72 { 73 .size = sizeof(struct rte_flow), 74 .trunk_size = 64, 75 .need_lock = 1, 76 .release_mem_en = 0, 77 .malloc = mlx5_malloc, 78 .free = mlx5_free, 79 .per_core_cache = 0, 80 .type = "ctl_flow_ipool", 81 }, 82 { 83 .size = sizeof(struct rte_flow), 84 .trunk_size = 64, 85 .grow_trunk = 3, 86 .grow_shift = 2, 87 .need_lock = 1, 88 .release_mem_en = 0, 89 .malloc = mlx5_malloc, 90 .free = mlx5_free, 91 .per_core_cache = 1 << 14, 92 .type = "rte_flow_ipool", 93 }, 94 { 95 .size = sizeof(struct rte_flow), 96 .trunk_size = 64, 97 .grow_trunk = 3, 98 .grow_shift = 2, 99 .need_lock = 1, 100 .release_mem_en = 0, 101 .malloc = mlx5_malloc, 102 .free = mlx5_free, 103 .per_core_cache = 0, 104 .type = "mcp_flow_ipool", 105 }, 106 }; 107 108 /** 109 * Set the completion channel file descriptor interrupt as non-blocking. 110 * 111 * @param[in] rxq_obj 112 * Pointer to RQ channel object, which includes the channel fd 113 * 114 * @param[out] fd 115 * The file descriptor (representing the interrupt) used in this channel. 116 * 117 * @return 118 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 119 */ 120 int 121 mlx5_os_set_nonblock_channel_fd(int fd) 122 { 123 int flags; 124 125 flags = fcntl(fd, F_GETFL); 126 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 127 } 128 129 /** 130 * Get mlx5 device attributes. The glue function query_device_ex() is called 131 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 132 * device attributes from the glue out parameter. 133 * 134 * @param sh 135 * Pointer to shared device context. 136 * 137 * @return 138 * 0 on success, a negative errno value otherwise and rte_errno is set. 139 */ 140 int 141 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 142 { 143 int err; 144 struct mlx5_common_device *cdev = sh->cdev; 145 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 146 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 147 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 148 149 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 150 if (err) { 151 rte_errno = errno; 152 return -rte_errno; 153 } 154 #ifdef HAVE_IBV_MLX5_MOD_SWP 155 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 156 #endif 157 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 158 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 159 #endif 160 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 161 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 162 #endif 163 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 164 if (err) { 165 rte_errno = errno; 166 return -rte_errno; 167 } 168 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 169 if (mlx5_dev_is_pci(cdev->dev)) 170 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 171 else 172 sh->dev_cap.sf = 1; 173 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 174 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 175 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 176 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 177 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 178 sh->dev_cap.dest_tir = 1; 179 #endif 180 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 181 DRV_LOG(DEBUG, "DV flow is supported."); 182 sh->dev_cap.dv_flow_en = 1; 183 #endif 184 #ifdef HAVE_MLX5DV_DR_ESWITCH 185 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 186 sh->dev_cap.dv_esw_en = 1; 187 #endif 188 /* 189 * Multi-packet send is supported by ConnectX-4 Lx PF as well 190 * as all ConnectX-5 devices. 191 */ 192 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 194 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 195 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 196 } else { 197 DRV_LOG(DEBUG, "MPW is supported."); 198 sh->dev_cap.mps = MLX5_MPW; 199 } 200 } else { 201 DRV_LOG(DEBUG, "MPW isn't supported."); 202 sh->dev_cap.mps = MLX5_MPW_DISABLED; 203 } 204 #if (RTE_CACHE_LINE_SIZE == 128) 205 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 206 sh->dev_cap.cqe_comp = 1; 207 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 208 sh->dev_cap.cqe_comp ? "" : "not "); 209 #else 210 sh->dev_cap.cqe_comp = 1; 211 #endif 212 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 213 sh->dev_cap.mpls_en = 214 ((dv_attr.tunnel_offloads_caps & 215 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 216 (dv_attr.tunnel_offloads_caps & 217 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 218 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 219 sh->dev_cap.mpls_en ? "" : "not "); 220 #else 221 DRV_LOG(WARNING, 222 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 223 #endif 224 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 225 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 226 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 227 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 228 IBV_DEVICE_PCI_WRITE_END_PADDING); 229 #endif 230 sh->dev_cap.hw_csum = 231 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 232 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 233 sh->dev_cap.hw_csum ? "" : "not "); 234 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 235 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 236 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 237 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 238 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 239 IBV_RAW_PACKET_CAP_SCATTER_FCS); 240 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 241 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 242 DRV_LOG(DEBUG, "Counters are not supported."); 243 #endif 244 /* 245 * DPDK doesn't support larger/variable indirection tables. 246 * Once DPDK supports it, take max size from device attr. 247 */ 248 sh->dev_cap.ind_table_max_size = 249 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 250 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 251 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 252 sh->dev_cap.ind_table_max_size); 253 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 254 (attr_ex.tso_caps.supported_qpts & 255 (1 << IBV_QPT_RAW_PACKET))); 256 if (sh->dev_cap.tso) 257 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 258 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 259 sizeof(sh->dev_cap.fw_ver)); 260 #ifdef HAVE_IBV_MLX5_MOD_SWP 261 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 262 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 263 (MLX5_SW_PARSING_CAP | 264 MLX5_SW_PARSING_CSUM_CAP | 265 MLX5_SW_PARSING_TSO_CAP); 266 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 267 #endif 268 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 269 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 270 struct mlx5dv_striding_rq_caps *strd_rq_caps = 271 &dv_attr.striding_rq_caps; 272 273 sh->dev_cap.mprq.enabled = 1; 274 sh->dev_cap.mprq.log_min_stride_size = 275 strd_rq_caps->min_single_stride_log_num_of_bytes; 276 sh->dev_cap.mprq.log_max_stride_size = 277 strd_rq_caps->max_single_stride_log_num_of_bytes; 278 sh->dev_cap.mprq.log_min_stride_num = 279 strd_rq_caps->min_single_wqe_log_num_of_strides; 280 sh->dev_cap.mprq.log_max_stride_num = 281 strd_rq_caps->max_single_wqe_log_num_of_strides; 282 sh->dev_cap.mprq.log_min_stride_wqe_size = 283 cdev->config.devx ? 284 hca_attr->log_min_stride_wqe_sz : 285 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 286 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 287 sh->dev_cap.mprq.log_min_stride_size); 288 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 289 sh->dev_cap.mprq.log_max_stride_size); 290 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 291 sh->dev_cap.mprq.log_min_stride_num); 292 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 293 sh->dev_cap.mprq.log_max_stride_num); 294 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 295 sh->dev_cap.mprq.log_min_stride_wqe_size); 296 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 297 strd_rq_caps->supported_qpts); 298 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 299 } 300 #endif 301 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 302 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 303 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 304 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 305 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 306 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 307 } 308 if (sh->dev_cap.tunnel_en) { 309 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 310 sh->dev_cap.tunnel_en & 311 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 312 sh->dev_cap.tunnel_en & 313 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 314 sh->dev_cap.tunnel_en & 315 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 316 } else { 317 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 318 } 319 #else 320 DRV_LOG(WARNING, 321 "Tunnel offloading disabled due to old OFED/rdma-core version"); 322 #endif 323 if (!sh->cdev->config.devx) 324 return 0; 325 /* Check capabilities for Packet Pacing. */ 326 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 327 hca_attr->dev_freq_khz); 328 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 329 hca_attr->qos.packet_pacing ? "" : "not "); 330 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 331 hca_attr->cross_channel ? "" : "not "); 332 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 333 hca_attr->wqe_index_ignore ? "" : "not "); 334 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 335 hca_attr->non_wire_sq ? "" : "not "); 336 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 337 hca_attr->log_max_static_sq_wq ? "" : "not ", 338 hca_attr->log_max_static_sq_wq); 339 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 340 hca_attr->qos.wqe_rate_pp ? "" : "not "); 341 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 342 if (!hca_attr->cross_channel) { 343 DRV_LOG(DEBUG, 344 "Cross channel operations are required for packet pacing."); 345 sh->dev_cap.txpp_en = 0; 346 } 347 if (!hca_attr->wqe_index_ignore) { 348 DRV_LOG(DEBUG, 349 "WQE index ignore feature is required for packet pacing."); 350 sh->dev_cap.txpp_en = 0; 351 } 352 if (!hca_attr->non_wire_sq) { 353 DRV_LOG(DEBUG, 354 "Non-wire SQ feature is required for packet pacing."); 355 sh->dev_cap.txpp_en = 0; 356 } 357 if (!hca_attr->log_max_static_sq_wq) { 358 DRV_LOG(DEBUG, 359 "Static WQE SQ feature is required for packet pacing."); 360 sh->dev_cap.txpp_en = 0; 361 } 362 if (!hca_attr->qos.wqe_rate_pp) { 363 DRV_LOG(DEBUG, 364 "WQE rate mode is required for packet pacing."); 365 sh->dev_cap.txpp_en = 0; 366 } 367 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 368 DRV_LOG(DEBUG, 369 "DevX does not provide UAR offset, can't create queues for packet pacing."); 370 sh->dev_cap.txpp_en = 0; 371 #endif 372 /* Check for LRO support. */ 373 if (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) { 374 /* TBD check tunnel lro caps. */ 375 sh->dev_cap.lro_supported = 1; 376 DRV_LOG(DEBUG, "Device supports LRO."); 377 DRV_LOG(DEBUG, 378 "LRO minimal size of TCP segment required for coalescing is %d bytes.", 379 hca_attr->lro_min_mss_size); 380 } 381 sh->dev_cap.scatter_fcs_w_decap_disable = 382 hca_attr->scatter_fcs_w_decap_disable; 383 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 384 mlx5_rt_timestamp_config(sh, hca_attr); 385 return 0; 386 } 387 388 /** 389 * Detect misc5 support or not 390 * 391 * @param[in] priv 392 * Device private data pointer 393 */ 394 #ifdef HAVE_MLX5DV_DR 395 static void 396 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 397 { 398 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 399 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 400 * Case: IPv4--->UDP--->VxLAN--->vni 401 */ 402 void *tbl; 403 struct mlx5_flow_dv_match_params matcher_mask; 404 void *match_m; 405 void *matcher; 406 void *headers_m; 407 void *misc5_m; 408 uint32_t *tunnel_header_m; 409 struct mlx5dv_flow_matcher_attr dv_attr; 410 411 memset(&matcher_mask, 0, sizeof(matcher_mask)); 412 matcher_mask.size = sizeof(matcher_mask.buf); 413 match_m = matcher_mask.buf; 414 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 415 misc5_m = MLX5_ADDR_OF(fte_match_param, 416 match_m, misc_parameters_5); 417 tunnel_header_m = (uint32_t *) 418 MLX5_ADDR_OF(fte_match_set_misc5, 419 misc5_m, tunnel_header_1); 420 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 421 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 422 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 423 *tunnel_header_m = 0xffffff; 424 425 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 426 if (!tbl) { 427 DRV_LOG(INFO, "No SW steering support"); 428 return; 429 } 430 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 431 dv_attr.match_mask = (void *)&matcher_mask, 432 dv_attr.match_criteria_enable = 433 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 434 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 435 dv_attr.priority = 3; 436 #ifdef HAVE_MLX5DV_DR_ESWITCH 437 void *misc2_m; 438 if (priv->sh->config.dv_esw_en) { 439 /* FDB enabled reg_c_0 */ 440 dv_attr.match_criteria_enable |= 441 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 442 misc2_m = MLX5_ADDR_OF(fte_match_param, 443 match_m, misc_parameters_2); 444 MLX5_SET(fte_match_set_misc2, misc2_m, 445 metadata_reg_c_0, 0xffff); 446 } 447 #endif 448 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 449 &dv_attr, tbl); 450 if (matcher) { 451 priv->sh->misc5_cap = 1; 452 mlx5_glue->dv_destroy_flow_matcher(matcher); 453 } 454 mlx5_glue->dr_destroy_flow_tbl(tbl); 455 #else 456 RTE_SET_USED(priv); 457 #endif 458 } 459 #endif 460 461 /** 462 * Initialize DR related data within private structure. 463 * Routine checks the reference counter and does actual 464 * resources creation/initialization only if counter is zero. 465 * 466 * @param[in] priv 467 * Pointer to the private device data structure. 468 * 469 * @return 470 * Zero on success, positive error code otherwise. 471 */ 472 static int 473 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 474 { 475 struct mlx5_dev_ctx_shared *sh = priv->sh; 476 char s[MLX5_NAME_SIZE] __rte_unused; 477 int err; 478 479 MLX5_ASSERT(sh && sh->refcnt); 480 if (sh->refcnt > 1) 481 return 0; 482 err = mlx5_alloc_table_hash_list(priv); 483 if (err) 484 goto error; 485 if (priv->sh->config.dv_flow_en == 2) 486 return 0; 487 /* The resources below are only valid with DV support. */ 488 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 489 /* Init port id action list. */ 490 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 491 sh->port_id_action_list = mlx5_list_create(s, sh, true, 492 flow_dv_port_id_create_cb, 493 flow_dv_port_id_match_cb, 494 flow_dv_port_id_remove_cb, 495 flow_dv_port_id_clone_cb, 496 flow_dv_port_id_clone_free_cb); 497 if (!sh->port_id_action_list) 498 goto error; 499 /* Init push vlan action list. */ 500 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 501 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 502 flow_dv_push_vlan_create_cb, 503 flow_dv_push_vlan_match_cb, 504 flow_dv_push_vlan_remove_cb, 505 flow_dv_push_vlan_clone_cb, 506 flow_dv_push_vlan_clone_free_cb); 507 if (!sh->push_vlan_action_list) 508 goto error; 509 /* Init sample action list. */ 510 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 511 sh->sample_action_list = mlx5_list_create(s, sh, true, 512 flow_dv_sample_create_cb, 513 flow_dv_sample_match_cb, 514 flow_dv_sample_remove_cb, 515 flow_dv_sample_clone_cb, 516 flow_dv_sample_clone_free_cb); 517 if (!sh->sample_action_list) 518 goto error; 519 /* Init dest array action list. */ 520 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 521 sh->dest_array_list = mlx5_list_create(s, sh, true, 522 flow_dv_dest_array_create_cb, 523 flow_dv_dest_array_match_cb, 524 flow_dv_dest_array_remove_cb, 525 flow_dv_dest_array_clone_cb, 526 flow_dv_dest_array_clone_free_cb); 527 if (!sh->dest_array_list) 528 goto error; 529 /* Init shared flex parsers list, no need lcore_share */ 530 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 531 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 532 mlx5_flex_parser_create_cb, 533 mlx5_flex_parser_match_cb, 534 mlx5_flex_parser_remove_cb, 535 mlx5_flex_parser_clone_cb, 536 mlx5_flex_parser_clone_free_cb); 537 if (!sh->flex_parsers_dv) 538 goto error; 539 #endif 540 #ifdef HAVE_MLX5DV_DR 541 void *domain; 542 543 /* Reference counter is zero, we should initialize structures. */ 544 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 545 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 546 if (!domain) { 547 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 548 err = errno; 549 goto error; 550 } 551 sh->rx_domain = domain; 552 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 553 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 554 if (!domain) { 555 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 556 err = errno; 557 goto error; 558 } 559 sh->tx_domain = domain; 560 #ifdef HAVE_MLX5DV_DR_ESWITCH 561 if (sh->config.dv_esw_en) { 562 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 563 MLX5DV_DR_DOMAIN_TYPE_FDB); 564 if (!domain) { 565 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 566 err = errno; 567 goto error; 568 } 569 sh->fdb_domain = domain; 570 } 571 /* 572 * The drop action is just some dummy placeholder in rdma-core. It 573 * does not belong to domains and has no any attributes, and, can be 574 * shared by the entire device. 575 */ 576 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 577 if (!sh->dr_drop_action) { 578 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 579 err = errno; 580 goto error; 581 } 582 #endif 583 if (!sh->tunnel_hub && sh->config.dv_miss_info) 584 err = mlx5_alloc_tunnel_hub(sh); 585 if (err) { 586 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 587 goto error; 588 } 589 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 590 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 591 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 592 if (sh->fdb_domain) 593 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 594 } 595 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 596 if (!sh->config.allow_duplicate_pattern) { 597 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 598 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 599 #endif 600 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 601 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 602 if (sh->fdb_domain) 603 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 604 } 605 606 __mlx5_discovery_misc5_cap(priv); 607 #endif /* HAVE_MLX5DV_DR */ 608 sh->default_miss_action = 609 mlx5_glue->dr_create_flow_action_default_miss(); 610 if (!sh->default_miss_action) 611 DRV_LOG(WARNING, "Default miss action is not supported."); 612 LIST_INIT(&sh->shared_rxqs); 613 return 0; 614 error: 615 /* Rollback the created objects. */ 616 if (sh->rx_domain) { 617 mlx5_glue->dr_destroy_domain(sh->rx_domain); 618 sh->rx_domain = NULL; 619 } 620 if (sh->tx_domain) { 621 mlx5_glue->dr_destroy_domain(sh->tx_domain); 622 sh->tx_domain = NULL; 623 } 624 if (sh->fdb_domain) { 625 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 626 sh->fdb_domain = NULL; 627 } 628 if (sh->dr_drop_action) { 629 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 630 sh->dr_drop_action = NULL; 631 } 632 if (sh->pop_vlan_action) { 633 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 634 sh->pop_vlan_action = NULL; 635 } 636 if (sh->encaps_decaps) { 637 mlx5_hlist_destroy(sh->encaps_decaps); 638 sh->encaps_decaps = NULL; 639 } 640 if (sh->modify_cmds) { 641 mlx5_hlist_destroy(sh->modify_cmds); 642 sh->modify_cmds = NULL; 643 } 644 if (sh->tag_table) { 645 /* tags should be destroyed with flow before. */ 646 mlx5_hlist_destroy(sh->tag_table); 647 sh->tag_table = NULL; 648 } 649 if (sh->tunnel_hub) { 650 mlx5_release_tunnel_hub(sh, priv->dev_port); 651 sh->tunnel_hub = NULL; 652 } 653 mlx5_free_table_hash_list(priv); 654 if (sh->port_id_action_list) { 655 mlx5_list_destroy(sh->port_id_action_list); 656 sh->port_id_action_list = NULL; 657 } 658 if (sh->push_vlan_action_list) { 659 mlx5_list_destroy(sh->push_vlan_action_list); 660 sh->push_vlan_action_list = NULL; 661 } 662 if (sh->sample_action_list) { 663 mlx5_list_destroy(sh->sample_action_list); 664 sh->sample_action_list = NULL; 665 } 666 if (sh->dest_array_list) { 667 mlx5_list_destroy(sh->dest_array_list); 668 sh->dest_array_list = NULL; 669 } 670 return err; 671 } 672 673 /** 674 * Destroy DR related data within private structure. 675 * 676 * @param[in] priv 677 * Pointer to the private device data structure. 678 */ 679 void 680 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 681 { 682 struct mlx5_dev_ctx_shared *sh = priv->sh; 683 684 MLX5_ASSERT(sh && sh->refcnt); 685 if (sh->refcnt > 1) 686 return; 687 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 688 #ifdef HAVE_MLX5DV_DR 689 if (sh->rx_domain) { 690 mlx5_glue->dr_destroy_domain(sh->rx_domain); 691 sh->rx_domain = NULL; 692 } 693 if (sh->tx_domain) { 694 mlx5_glue->dr_destroy_domain(sh->tx_domain); 695 sh->tx_domain = NULL; 696 } 697 #ifdef HAVE_MLX5DV_DR_ESWITCH 698 if (sh->fdb_domain) { 699 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 700 sh->fdb_domain = NULL; 701 } 702 if (sh->dr_drop_action) { 703 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 704 sh->dr_drop_action = NULL; 705 } 706 #endif 707 if (sh->pop_vlan_action) { 708 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 709 sh->pop_vlan_action = NULL; 710 } 711 #endif /* HAVE_MLX5DV_DR */ 712 if (sh->default_miss_action) 713 mlx5_glue->destroy_flow_action 714 (sh->default_miss_action); 715 if (sh->encaps_decaps) { 716 mlx5_hlist_destroy(sh->encaps_decaps); 717 sh->encaps_decaps = NULL; 718 } 719 if (sh->modify_cmds) { 720 mlx5_hlist_destroy(sh->modify_cmds); 721 sh->modify_cmds = NULL; 722 } 723 if (sh->tag_table) { 724 /* tags should be destroyed with flow before. */ 725 mlx5_hlist_destroy(sh->tag_table); 726 sh->tag_table = NULL; 727 } 728 if (sh->tunnel_hub) { 729 mlx5_release_tunnel_hub(sh, priv->dev_port); 730 sh->tunnel_hub = NULL; 731 } 732 mlx5_free_table_hash_list(priv); 733 if (sh->port_id_action_list) { 734 mlx5_list_destroy(sh->port_id_action_list); 735 sh->port_id_action_list = NULL; 736 } 737 if (sh->push_vlan_action_list) { 738 mlx5_list_destroy(sh->push_vlan_action_list); 739 sh->push_vlan_action_list = NULL; 740 } 741 if (sh->sample_action_list) { 742 mlx5_list_destroy(sh->sample_action_list); 743 sh->sample_action_list = NULL; 744 } 745 if (sh->dest_array_list) { 746 mlx5_list_destroy(sh->dest_array_list); 747 sh->dest_array_list = NULL; 748 } 749 } 750 751 /** 752 * Initialize shared data between primary and secondary process. 753 * 754 * A memzone is reserved by primary process and secondary processes attach to 755 * the memzone. 756 * 757 * @return 758 * 0 on success, a negative errno value otherwise and rte_errno is set. 759 */ 760 static int 761 mlx5_init_shared_data(void) 762 { 763 const struct rte_memzone *mz; 764 int ret = 0; 765 766 rte_spinlock_lock(&mlx5_shared_data_lock); 767 if (mlx5_shared_data == NULL) { 768 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 769 /* Allocate shared memory. */ 770 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 771 sizeof(*mlx5_shared_data), 772 SOCKET_ID_ANY, 0); 773 if (mz == NULL) { 774 DRV_LOG(ERR, 775 "Cannot allocate mlx5 shared data"); 776 ret = -rte_errno; 777 goto error; 778 } 779 mlx5_shared_data = mz->addr; 780 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 781 rte_spinlock_init(&mlx5_shared_data->lock); 782 } else { 783 /* Lookup allocated shared memory. */ 784 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 785 if (mz == NULL) { 786 DRV_LOG(ERR, 787 "Cannot attach mlx5 shared data"); 788 ret = -rte_errno; 789 goto error; 790 } 791 mlx5_shared_data = mz->addr; 792 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 793 } 794 } 795 error: 796 rte_spinlock_unlock(&mlx5_shared_data_lock); 797 return ret; 798 } 799 800 /** 801 * PMD global initialization. 802 * 803 * Independent from individual device, this function initializes global 804 * per-PMD data structures distinguishing primary and secondary processes. 805 * Hence, each initialization is called once per a process. 806 * 807 * @return 808 * 0 on success, a negative errno value otherwise and rte_errno is set. 809 */ 810 static int 811 mlx5_init_once(void) 812 { 813 struct mlx5_shared_data *sd; 814 struct mlx5_local_data *ld = &mlx5_local_data; 815 int ret = 0; 816 817 if (mlx5_init_shared_data()) 818 return -rte_errno; 819 sd = mlx5_shared_data; 820 MLX5_ASSERT(sd); 821 rte_spinlock_lock(&sd->lock); 822 switch (rte_eal_process_type()) { 823 case RTE_PROC_PRIMARY: 824 if (sd->init_done) 825 break; 826 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 827 mlx5_mp_os_primary_handle); 828 if (ret) 829 goto out; 830 sd->init_done = true; 831 break; 832 case RTE_PROC_SECONDARY: 833 if (ld->init_done) 834 break; 835 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 836 mlx5_mp_os_secondary_handle); 837 if (ret) 838 goto out; 839 ++sd->secondary_cnt; 840 ld->init_done = true; 841 break; 842 default: 843 break; 844 } 845 out: 846 rte_spinlock_unlock(&sd->lock); 847 return ret; 848 } 849 850 /** 851 * DR flow drop action support detect. 852 * 853 * @param dev 854 * Pointer to rte_eth_dev structure. 855 * 856 */ 857 static void 858 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 859 { 860 #ifdef HAVE_MLX5DV_DR 861 struct mlx5_priv *priv = dev->data->dev_private; 862 863 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 864 return; 865 /** 866 * DR supports drop action placeholder when it is supported; 867 * otherwise, use the queue drop action. 868 */ 869 if (!priv->sh->drop_action_check_flag) { 870 if (!mlx5_flow_discover_dr_action_support(dev)) 871 priv->sh->dr_drop_action_en = 1; 872 priv->sh->drop_action_check_flag = 1; 873 } 874 if (priv->sh->dr_drop_action_en) 875 priv->root_drop_action = priv->sh->dr_drop_action; 876 else 877 priv->root_drop_action = priv->drop_queue.hrxq->action; 878 #endif 879 } 880 881 static void 882 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 883 { 884 struct mlx5_priv *priv = dev->data->dev_private; 885 void *ctx = priv->sh->cdev->ctx; 886 887 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 888 if (!priv->q_counters) { 889 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 890 struct ibv_wq *wq; 891 892 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 893 "by DevX - fall-back to use the kernel driver global " 894 "queue counter.", dev->data->port_id); 895 /* Create WQ by kernel and query its queue counter ID. */ 896 if (cq) { 897 wq = mlx5_glue->create_wq(ctx, 898 &(struct ibv_wq_init_attr){ 899 .wq_type = IBV_WQT_RQ, 900 .max_wr = 1, 901 .max_sge = 1, 902 .pd = priv->sh->cdev->pd, 903 .cq = cq, 904 }); 905 if (wq) { 906 /* Counter is assigned only on RDY state. */ 907 int ret = mlx5_glue->modify_wq(wq, 908 &(struct ibv_wq_attr){ 909 .attr_mask = IBV_WQ_ATTR_STATE, 910 .wq_state = IBV_WQS_RDY, 911 }); 912 913 if (ret == 0) 914 mlx5_devx_cmd_wq_query(wq, 915 &priv->counter_set_id); 916 claim_zero(mlx5_glue->destroy_wq(wq)); 917 } 918 claim_zero(mlx5_glue->destroy_cq(cq)); 919 } 920 } else { 921 priv->counter_set_id = priv->q_counters->id; 922 } 923 if (priv->counter_set_id == 0) 924 DRV_LOG(INFO, "Part of the port %d statistics will not be " 925 "available.", dev->data->port_id); 926 } 927 928 /** 929 * Check if representor spawn info match devargs. 930 * 931 * @param spawn 932 * Verbs device parameters (name, port, switch_info) to spawn. 933 * @param eth_da 934 * Device devargs to probe. 935 * 936 * @return 937 * Match result. 938 */ 939 static bool 940 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 941 struct rte_eth_devargs *eth_da) 942 { 943 struct mlx5_switch_info *switch_info = &spawn->info; 944 unsigned int p, f; 945 uint16_t id; 946 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 947 eth_da->type); 948 949 switch (eth_da->type) { 950 case RTE_ETH_REPRESENTOR_SF: 951 if (!(spawn->info.port_name == -1 && 952 switch_info->name_type == 953 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 954 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 955 rte_errno = EBUSY; 956 return false; 957 } 958 break; 959 case RTE_ETH_REPRESENTOR_VF: 960 /* Allows HPF representor index -1 as exception. */ 961 if (!(spawn->info.port_name == -1 && 962 switch_info->name_type == 963 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 964 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 965 rte_errno = EBUSY; 966 return false; 967 } 968 break; 969 case RTE_ETH_REPRESENTOR_NONE: 970 rte_errno = EBUSY; 971 return false; 972 default: 973 rte_errno = ENOTSUP; 974 DRV_LOG(ERR, "unsupported representor type"); 975 return false; 976 } 977 /* Check representor ID: */ 978 for (p = 0; p < eth_da->nb_ports; ++p) { 979 if (spawn->pf_bond < 0) { 980 /* For non-LAG mode, allow and ignore pf. */ 981 switch_info->pf_num = eth_da->ports[p]; 982 repr_id = mlx5_representor_id_encode(switch_info, 983 eth_da->type); 984 } 985 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 986 id = MLX5_REPRESENTOR_ID 987 (eth_da->ports[p], eth_da->type, 988 eth_da->representor_ports[f]); 989 if (repr_id == id) 990 return true; 991 } 992 } 993 rte_errno = EBUSY; 994 return false; 995 } 996 997 /** 998 * Spawn an Ethernet device from Verbs information. 999 * 1000 * @param dpdk_dev 1001 * Backing DPDK device. 1002 * @param spawn 1003 * Verbs device parameters (name, port, switch_info) to spawn. 1004 * @param eth_da 1005 * Device arguments. 1006 * @param mkvlist 1007 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1008 * 1009 * @return 1010 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1011 * is set. The following errors are defined: 1012 * 1013 * EBUSY: device is not supposed to be spawned. 1014 * EEXIST: device is already spawned 1015 */ 1016 static struct rte_eth_dev * 1017 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1018 struct mlx5_dev_spawn_data *spawn, 1019 struct rte_eth_devargs *eth_da, 1020 struct mlx5_kvargs_ctrl *mkvlist) 1021 { 1022 const struct mlx5_switch_info *switch_info = &spawn->info; 1023 struct mlx5_dev_ctx_shared *sh = NULL; 1024 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1025 struct rte_eth_dev *eth_dev = NULL; 1026 struct mlx5_priv *priv = NULL; 1027 int err = 0; 1028 struct rte_ether_addr mac; 1029 char name[RTE_ETH_NAME_MAX_LEN]; 1030 int own_domain_id = 0; 1031 uint16_t port_id; 1032 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1033 int nl_rdma; 1034 int i; 1035 1036 /* Determine if this port representor is supposed to be spawned. */ 1037 if (switch_info->representor && dpdk_dev->devargs && 1038 !mlx5_representor_match(spawn, eth_da)) 1039 return NULL; 1040 /* Build device name. */ 1041 if (spawn->pf_bond < 0) { 1042 /* Single device. */ 1043 if (!switch_info->representor) 1044 strlcpy(name, dpdk_dev->name, sizeof(name)); 1045 else 1046 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1047 dpdk_dev->name, 1048 switch_info->name_type == 1049 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1050 switch_info->port_name); 1051 } else { 1052 /* Bonding device. */ 1053 if (!switch_info->representor) { 1054 err = snprintf(name, sizeof(name), "%s_%s", 1055 dpdk_dev->name, spawn->phys_dev_name); 1056 } else { 1057 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1058 dpdk_dev->name, spawn->phys_dev_name, 1059 switch_info->ctrl_num, 1060 switch_info->pf_num, 1061 switch_info->name_type == 1062 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1063 switch_info->port_name); 1064 } 1065 } 1066 if (err >= (int)sizeof(name)) 1067 DRV_LOG(WARNING, "device name overflow %s", name); 1068 /* check if the device is already spawned */ 1069 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1070 /* 1071 * When device is already spawned, its devargs should be set 1072 * as used. otherwise, mlx5_kvargs_validate() will fail. 1073 */ 1074 if (mkvlist) 1075 mlx5_port_args_set_used(name, port_id, mkvlist); 1076 rte_errno = EEXIST; 1077 return NULL; 1078 } 1079 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1080 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1081 struct mlx5_mp_id mp_id; 1082 1083 eth_dev = rte_eth_dev_attach_secondary(name); 1084 if (eth_dev == NULL) { 1085 DRV_LOG(ERR, "can not attach rte ethdev"); 1086 rte_errno = ENOMEM; 1087 return NULL; 1088 } 1089 eth_dev->device = dpdk_dev; 1090 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1091 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1092 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1093 err = mlx5_proc_priv_init(eth_dev); 1094 if (err) 1095 return NULL; 1096 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1097 /* Receive command fd from primary process */ 1098 err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1099 if (err < 0) 1100 goto err_secondary; 1101 /* Remap UAR for Tx queues. */ 1102 err = mlx5_tx_uar_init_secondary(eth_dev, err); 1103 if (err) 1104 goto err_secondary; 1105 /* 1106 * Ethdev pointer is still required as input since 1107 * the primary device is not accessible from the 1108 * secondary process. 1109 */ 1110 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1111 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1112 return eth_dev; 1113 err_secondary: 1114 mlx5_dev_close(eth_dev); 1115 return NULL; 1116 } 1117 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1118 if (!sh) 1119 return NULL; 1120 nl_rdma = mlx5_nl_init(NETLINK_RDMA); 1121 /* Check port status. */ 1122 if (spawn->phys_port <= UINT8_MAX) { 1123 /* Legacy Verbs api only support u8 port number. */ 1124 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1125 &port_attr); 1126 if (err) { 1127 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1128 goto error; 1129 } 1130 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1131 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1132 err = EINVAL; 1133 goto error; 1134 } 1135 } else if (nl_rdma >= 0) { 1136 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1137 err = mlx5_nl_port_state(nl_rdma, 1138 spawn->phys_dev_name, 1139 spawn->phys_port); 1140 if (err < 0) { 1141 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1142 strerror(rte_errno)); 1143 err = -rte_errno; 1144 goto error; 1145 } 1146 port_attr.state = (enum ibv_port_state)err; 1147 } 1148 if (port_attr.state != IBV_PORT_ACTIVE) 1149 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1150 mlx5_glue->port_state_str(port_attr.state), 1151 port_attr.state); 1152 /* Allocate private eth device data. */ 1153 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1154 sizeof(*priv), 1155 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1156 if (priv == NULL) { 1157 DRV_LOG(ERR, "priv allocation failure"); 1158 err = ENOMEM; 1159 goto error; 1160 } 1161 /* 1162 * When user configures remote PD and CTX and device creates RxQ by 1163 * DevX, external RxQ is both supported and requested. 1164 */ 1165 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1166 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1167 sizeof(struct mlx5_external_rxq) * 1168 MLX5_MAX_EXT_RX_QUEUES, 0, 1169 SOCKET_ID_ANY); 1170 if (priv->ext_rxqs == NULL) { 1171 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1172 err = ENOMEM; 1173 goto error; 1174 } 1175 DRV_LOG(DEBUG, "External RxQ is supported."); 1176 } 1177 priv->sh = sh; 1178 priv->dev_port = spawn->phys_port; 1179 priv->pci_dev = spawn->pci_dev; 1180 priv->mtu = RTE_ETHER_MTU; 1181 /* Some internal functions rely on Netlink sockets, open them now. */ 1182 priv->nl_socket_rdma = nl_rdma; 1183 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 1184 priv->representor = !!switch_info->representor; 1185 priv->master = !!switch_info->master; 1186 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1187 priv->vport_meta_tag = 0; 1188 priv->vport_meta_mask = 0; 1189 priv->pf_bond = spawn->pf_bond; 1190 1191 DRV_LOG(DEBUG, 1192 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1193 priv->dev_port, dpdk_dev->bus->name, 1194 priv->pci_dev ? priv->pci_dev->name : "NONE", 1195 priv->master, priv->representor, priv->pf_bond); 1196 1197 /* 1198 * If we have E-Switch we should determine the vport attributes. 1199 * E-Switch may use either source vport field or reg_c[0] metadata 1200 * register to match on vport index. The engaged part of metadata 1201 * register is defined by mask. 1202 */ 1203 if (sh->esw_mode) { 1204 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1205 spawn->phys_port, 1206 &vport_info); 1207 if (err) { 1208 DRV_LOG(WARNING, 1209 "Cannot query devx port %d on device %s", 1210 spawn->phys_port, spawn->phys_dev_name); 1211 vport_info.query_flags = 0; 1212 } 1213 } 1214 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1215 priv->vport_meta_tag = vport_info.vport_meta_tag; 1216 priv->vport_meta_mask = vport_info.vport_meta_mask; 1217 if (!priv->vport_meta_mask) { 1218 DRV_LOG(ERR, 1219 "vport zero mask for port %d on bonding device %s", 1220 spawn->phys_port, spawn->phys_dev_name); 1221 err = ENOTSUP; 1222 goto error; 1223 } 1224 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1225 DRV_LOG(ERR, 1226 "Invalid vport tag for port %d on bonding device %s", 1227 spawn->phys_port, spawn->phys_dev_name); 1228 err = ENOTSUP; 1229 goto error; 1230 } 1231 } 1232 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1233 priv->vport_id = vport_info.vport_id; 1234 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1235 DRV_LOG(ERR, 1236 "Cannot deduce vport index for port %d on bonding device %s", 1237 spawn->phys_port, spawn->phys_dev_name); 1238 err = ENOTSUP; 1239 goto error; 1240 } else { 1241 /* 1242 * Suppose vport index in compatible way. Kernel/rdma_core 1243 * support single E-Switch per PF configurations only and 1244 * vport_id field contains the vport index for associated VF, 1245 * which is deduced from representor port name. 1246 * For example, let's have the IB device port 10, it has 1247 * attached network device eth0, which has port name attribute 1248 * pf0vf2, we can deduce the VF number as 2, and set vport index 1249 * as 3 (2+1). This assigning schema should be changed if the 1250 * multiple E-Switch instances per PF configurations or/and PCI 1251 * subfunctions are added. 1252 */ 1253 priv->vport_id = switch_info->representor ? 1254 switch_info->port_name + 1 : -1; 1255 } 1256 priv->representor_id = mlx5_representor_id_encode(switch_info, 1257 eth_da->type); 1258 /* 1259 * Look for sibling devices in order to reuse their switch domain 1260 * if any, otherwise allocate one. 1261 */ 1262 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1263 const struct mlx5_priv *opriv = 1264 rte_eth_devices[port_id].data->dev_private; 1265 1266 if (!opriv || 1267 opriv->sh != priv->sh || 1268 opriv->domain_id == 1269 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1270 continue; 1271 priv->domain_id = opriv->domain_id; 1272 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1273 priv->dev_port, priv->domain_id); 1274 break; 1275 } 1276 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1277 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1278 if (err) { 1279 err = rte_errno; 1280 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1281 strerror(rte_errno)); 1282 goto error; 1283 } 1284 own_domain_id = 1; 1285 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1286 priv->dev_port, priv->domain_id); 1287 } 1288 if (sh->cdev->config.devx) { 1289 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1290 1291 sh->steering_format_version = hca_attr->steering_format_version; 1292 #if defined(HAVE_MLX5DV_DR) && \ 1293 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ 1294 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) 1295 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1296 sh->config.dv_flow_en) { 1297 uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; 1298 /* 1299 * Meter needs two REG_C's for color match and pre-sfx 1300 * flow match. Here get the REG_C for color match. 1301 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1302 */ 1303 reg_c_mask &= 0xfc; 1304 if (__builtin_popcount(reg_c_mask) < 1) { 1305 priv->mtr_en = 0; 1306 DRV_LOG(WARNING, "No available register for" 1307 " meter."); 1308 } else { 1309 /* 1310 * The meter color register is used by the 1311 * flow-hit feature as well. 1312 * The flow-hit feature must use REG_C_3 1313 * Prefer REG_C_3 if it is available. 1314 */ 1315 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 1316 priv->mtr_color_reg = REG_C_3; 1317 else 1318 priv->mtr_color_reg = ffs(reg_c_mask) 1319 - 1 + REG_C_0; 1320 priv->mtr_en = 1; 1321 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1322 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1323 priv->mtr_color_reg); 1324 } 1325 } 1326 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1327 uint32_t log_obj_size = 1328 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1329 if (log_obj_size >= 1330 hca_attr->qos.log_meter_aso_granularity && 1331 log_obj_size <= 1332 hca_attr->qos.log_meter_aso_max_alloc) 1333 sh->meter_aso_en = 1; 1334 } 1335 if (priv->mtr_en) { 1336 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1337 if (err) { 1338 err = -err; 1339 goto error; 1340 } 1341 } 1342 if (hca_attr->flow.tunnel_header_0_1) 1343 sh->tunnel_header_0_1 = 1; 1344 if (hca_attr->flow.tunnel_header_2_3) 1345 sh->tunnel_header_2_3 = 1; 1346 #endif 1347 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1348 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { 1349 sh->flow_hit_aso_en = 1; 1350 err = mlx5_flow_aso_age_mng_init(sh); 1351 if (err) { 1352 err = -err; 1353 goto error; 1354 } 1355 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1356 } 1357 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1358 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1359 defined(HAVE_MLX5_DR_ACTION_ASO_CT) 1360 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { 1361 err = mlx5_flow_aso_ct_mng_init(sh); 1362 if (err) { 1363 err = -err; 1364 goto error; 1365 } 1366 DRV_LOG(DEBUG, "CT ASO is supported."); 1367 sh->ct_aso_en = 1; 1368 } 1369 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1370 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1371 if (hca_attr->log_max_ft_sampler_num > 0 && 1372 sh->config.dv_flow_en) { 1373 priv->sampler_en = 1; 1374 DRV_LOG(DEBUG, "Sampler enabled!"); 1375 } else { 1376 priv->sampler_en = 0; 1377 if (!hca_attr->log_max_ft_sampler_num) 1378 DRV_LOG(WARNING, 1379 "No available register for sampler."); 1380 else 1381 DRV_LOG(DEBUG, "DV flow is not supported!"); 1382 } 1383 #endif 1384 } 1385 /* Process parameters and store port configuration on priv structure. */ 1386 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1387 if (err) { 1388 err = rte_errno; 1389 DRV_LOG(ERR, "Failed to process port configure: %s", 1390 strerror(rte_errno)); 1391 goto error; 1392 } 1393 eth_dev = rte_eth_dev_allocate(name); 1394 if (eth_dev == NULL) { 1395 DRV_LOG(ERR, "can not allocate rte ethdev"); 1396 err = ENOMEM; 1397 goto error; 1398 } 1399 if (priv->representor) { 1400 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1401 eth_dev->data->representor_id = priv->representor_id; 1402 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1403 struct mlx5_priv *opriv = 1404 rte_eth_devices[port_id].data->dev_private; 1405 if (opriv && 1406 opriv->master && 1407 opriv->domain_id == priv->domain_id && 1408 opriv->sh == priv->sh) { 1409 eth_dev->data->backer_port_id = port_id; 1410 break; 1411 } 1412 } 1413 if (port_id >= RTE_MAX_ETHPORTS) 1414 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1415 } 1416 priv->mp_id.port_id = eth_dev->data->port_id; 1417 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1418 /* 1419 * Store associated network device interface index. This index 1420 * is permanent throughout the lifetime of device. So, we may store 1421 * the ifindex here and use the cached value further. 1422 */ 1423 MLX5_ASSERT(spawn->ifindex); 1424 priv->if_index = spawn->ifindex; 1425 priv->lag_affinity_idx = sh->refcnt - 1; 1426 eth_dev->data->dev_private = priv; 1427 priv->dev_data = eth_dev->data; 1428 eth_dev->data->mac_addrs = priv->mac; 1429 eth_dev->device = dpdk_dev; 1430 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1431 /* Configure the first MAC address by default. */ 1432 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1433 DRV_LOG(ERR, 1434 "port %u cannot get MAC address, is mlx5_en" 1435 " loaded? (errno: %s)", 1436 eth_dev->data->port_id, strerror(rte_errno)); 1437 err = ENODEV; 1438 goto error; 1439 } 1440 DRV_LOG(INFO, 1441 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1442 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1443 #ifdef RTE_LIBRTE_MLX5_DEBUG 1444 { 1445 char ifname[MLX5_NAMESIZE]; 1446 1447 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1448 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1449 eth_dev->data->port_id, ifname); 1450 else 1451 DRV_LOG(DEBUG, "port %u ifname is unknown", 1452 eth_dev->data->port_id); 1453 } 1454 #endif 1455 /* Get actual MTU if possible. */ 1456 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1457 if (err) { 1458 err = rte_errno; 1459 goto error; 1460 } 1461 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1462 priv->mtu); 1463 /* Initialize burst functions to prevent crashes before link-up. */ 1464 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1465 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1466 eth_dev->dev_ops = &mlx5_dev_ops; 1467 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1468 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1469 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1470 /* Register MAC address. */ 1471 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1472 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1473 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1474 mlx5_ifindex(eth_dev), 1475 eth_dev->data->mac_addrs, 1476 MLX5_MAX_MAC_ADDRESSES); 1477 priv->ctrl_flows = 0; 1478 rte_spinlock_init(&priv->flow_list_lock); 1479 TAILQ_INIT(&priv->flow_meters); 1480 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1481 if (!priv->mtr_profile_tbl) 1482 goto error; 1483 /* Bring Ethernet device up. */ 1484 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1485 eth_dev->data->port_id); 1486 mlx5_set_link_up(eth_dev); 1487 /* 1488 * Even though the interrupt handler is not installed yet, 1489 * interrupts will still trigger on the async_fd from 1490 * Verbs context returned by ibv_open_device(). 1491 */ 1492 mlx5_link_update(eth_dev, 0); 1493 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1494 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1495 if (sh->config.reclaim_mode) 1496 icfg[i].per_core_cache = 0; 1497 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1498 if (!priv->flows[i]) 1499 goto error; 1500 } 1501 /* Create context for virtual machine VLAN workaround. */ 1502 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1503 if (sh->config.dv_flow_en) { 1504 err = mlx5_alloc_shared_dr(priv); 1505 if (err) 1506 goto error; 1507 if (mlx5_flex_item_port_init(eth_dev) < 0) 1508 goto error; 1509 } 1510 if (mlx5_devx_obj_ops_en(sh)) { 1511 priv->obj_ops = devx_obj_ops; 1512 mlx5_queue_counter_id_prepare(eth_dev); 1513 priv->obj_ops.lb_dummy_queue_create = 1514 mlx5_rxq_ibv_obj_dummy_lb_create; 1515 priv->obj_ops.lb_dummy_queue_release = 1516 mlx5_rxq_ibv_obj_dummy_lb_release; 1517 } else if (spawn->max_port > UINT8_MAX) { 1518 /* Verbs can't support ports larger than 255 by design. */ 1519 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1520 err = ENOTSUP; 1521 goto error; 1522 } else { 1523 priv->obj_ops = ibv_obj_ops; 1524 } 1525 if (sh->config.tx_pp && 1526 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1527 /* 1528 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1529 * packet pacing and already checked above. 1530 * Hence, we should only make sure the SQs will be created 1531 * with DevX, not with Verbs. 1532 * Verbs allocates the SQ UAR on its own and it can't be shared 1533 * with Clock Queue UAR as required for Tx scheduling. 1534 */ 1535 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1536 err = ENODEV; 1537 goto error; 1538 } 1539 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1540 if (!priv->drop_queue.hrxq) 1541 goto error; 1542 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1543 mlx5_hrxq_create_cb, 1544 mlx5_hrxq_match_cb, 1545 mlx5_hrxq_remove_cb, 1546 mlx5_hrxq_clone_cb, 1547 mlx5_hrxq_clone_free_cb); 1548 if (!priv->hrxqs) 1549 goto error; 1550 rte_rwlock_init(&priv->ind_tbls_lock); 1551 if (priv->sh->config.dv_flow_en == 2) 1552 return eth_dev; 1553 /* Port representor shares the same max priority with pf port. */ 1554 if (!priv->sh->flow_priority_check_flag) { 1555 /* Supported Verbs flow priority number detection. */ 1556 err = mlx5_flow_discover_priorities(eth_dev); 1557 priv->sh->flow_max_priority = err; 1558 priv->sh->flow_priority_check_flag = 1; 1559 } else { 1560 err = priv->sh->flow_max_priority; 1561 } 1562 if (err < 0) { 1563 err = -err; 1564 goto error; 1565 } 1566 mlx5_set_metadata_mask(eth_dev); 1567 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1568 !priv->sh->dv_regc0_mask) { 1569 DRV_LOG(ERR, "metadata mode %u is not supported " 1570 "(no metadata reg_c[0] is available)", 1571 sh->config.dv_xmeta_en); 1572 err = ENOTSUP; 1573 goto error; 1574 } 1575 /* Query availability of metadata reg_c's. */ 1576 if (!priv->sh->metadata_regc_check_flag) { 1577 err = mlx5_flow_discover_mreg_c(eth_dev); 1578 if (err < 0) { 1579 err = -err; 1580 goto error; 1581 } 1582 } 1583 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1584 DRV_LOG(DEBUG, 1585 "port %u extensive metadata register is not supported", 1586 eth_dev->data->port_id); 1587 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1588 DRV_LOG(ERR, "metadata mode %u is not supported " 1589 "(no metadata registers available)", 1590 sh->config.dv_xmeta_en); 1591 err = ENOTSUP; 1592 goto error; 1593 } 1594 } 1595 if (sh->config.dv_flow_en && 1596 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1597 mlx5_flow_ext_mreg_supported(eth_dev) && 1598 priv->sh->dv_regc0_mask) { 1599 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1600 MLX5_FLOW_MREG_HTABLE_SZ, 1601 false, true, eth_dev, 1602 flow_dv_mreg_create_cb, 1603 flow_dv_mreg_match_cb, 1604 flow_dv_mreg_remove_cb, 1605 flow_dv_mreg_clone_cb, 1606 flow_dv_mreg_clone_free_cb); 1607 if (!priv->mreg_cp_tbl) { 1608 err = ENOMEM; 1609 goto error; 1610 } 1611 } 1612 rte_spinlock_init(&priv->shared_act_sl); 1613 mlx5_flow_counter_mode_config(eth_dev); 1614 mlx5_flow_drop_action_config(eth_dev); 1615 if (sh->config.dv_flow_en) 1616 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1617 return eth_dev; 1618 error: 1619 if (priv) { 1620 if (priv->mreg_cp_tbl) 1621 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1622 if (priv->sh) 1623 mlx5_os_free_shared_dr(priv); 1624 if (priv->nl_socket_route >= 0) 1625 close(priv->nl_socket_route); 1626 if (priv->vmwa_context) 1627 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1628 if (eth_dev && priv->drop_queue.hrxq) 1629 mlx5_drop_action_destroy(eth_dev); 1630 if (priv->mtr_profile_tbl) 1631 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1632 if (own_domain_id) 1633 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1634 if (priv->hrxqs) 1635 mlx5_list_destroy(priv->hrxqs); 1636 if (eth_dev && priv->flex_item_map) 1637 mlx5_flex_item_port_cleanup(eth_dev); 1638 mlx5_free(priv->ext_rxqs); 1639 mlx5_free(priv); 1640 if (eth_dev != NULL) 1641 eth_dev->data->dev_private = NULL; 1642 } 1643 if (eth_dev != NULL) { 1644 /* mac_addrs must not be freed alone because part of 1645 * dev_private 1646 **/ 1647 eth_dev->data->mac_addrs = NULL; 1648 rte_eth_dev_release_port(eth_dev); 1649 } 1650 if (sh) 1651 mlx5_free_shared_dev_ctx(sh); 1652 if (nl_rdma >= 0) 1653 close(nl_rdma); 1654 MLX5_ASSERT(err > 0); 1655 rte_errno = err; 1656 return NULL; 1657 } 1658 1659 /** 1660 * Comparison callback to sort device data. 1661 * 1662 * This is meant to be used with qsort(). 1663 * 1664 * @param a[in] 1665 * Pointer to pointer to first data object. 1666 * @param b[in] 1667 * Pointer to pointer to second data object. 1668 * 1669 * @return 1670 * 0 if both objects are equal, less than 0 if the first argument is less 1671 * than the second, greater than 0 otherwise. 1672 */ 1673 static int 1674 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1675 { 1676 const struct mlx5_switch_info *si_a = 1677 &((const struct mlx5_dev_spawn_data *)a)->info; 1678 const struct mlx5_switch_info *si_b = 1679 &((const struct mlx5_dev_spawn_data *)b)->info; 1680 int ret; 1681 1682 /* Master device first. */ 1683 ret = si_b->master - si_a->master; 1684 if (ret) 1685 return ret; 1686 /* Then representor devices. */ 1687 ret = si_b->representor - si_a->representor; 1688 if (ret) 1689 return ret; 1690 /* Unidentified devices come last in no specific order. */ 1691 if (!si_a->representor) 1692 return 0; 1693 /* Order representors by name. */ 1694 return si_a->port_name - si_b->port_name; 1695 } 1696 1697 /** 1698 * Match PCI information for possible slaves of bonding device. 1699 * 1700 * @param[in] ibdev_name 1701 * Name of Infiniband device. 1702 * @param[in] pci_dev 1703 * Pointer to primary PCI address structure to match. 1704 * @param[in] nl_rdma 1705 * Netlink RDMA group socket handle. 1706 * @param[in] owner 1707 * Representor owner PF index. 1708 * @param[out] bond_info 1709 * Pointer to bonding information. 1710 * 1711 * @return 1712 * negative value if no bonding device found, otherwise 1713 * positive index of slave PF in bonding. 1714 */ 1715 static int 1716 mlx5_device_bond_pci_match(const char *ibdev_name, 1717 const struct rte_pci_addr *pci_dev, 1718 int nl_rdma, uint16_t owner, 1719 struct mlx5_bond_info *bond_info) 1720 { 1721 char ifname[IF_NAMESIZE + 1]; 1722 unsigned int ifindex; 1723 unsigned int np, i; 1724 FILE *bond_file = NULL, *file; 1725 int pf = -1; 1726 int ret; 1727 uint8_t cur_guid[32] = {0}; 1728 uint8_t guid[32] = {0}; 1729 1730 /* 1731 * Try to get master device name. If something goes wrong suppose 1732 * the lack of kernel support and no bonding devices. 1733 */ 1734 memset(bond_info, 0, sizeof(*bond_info)); 1735 if (nl_rdma < 0) 1736 return -1; 1737 if (!strstr(ibdev_name, "bond")) 1738 return -1; 1739 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1740 if (!np) 1741 return -1; 1742 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1743 return -1; 1744 /* 1745 * The master device might not be on the predefined port(not on port 1746 * index 1, it is not guaranteed), we have to scan all Infiniband 1747 * device ports and find master. 1748 */ 1749 for (i = 1; i <= np; ++i) { 1750 /* Check whether Infiniband port is populated. */ 1751 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1752 if (!ifindex) 1753 continue; 1754 if (!if_indextoname(ifindex, ifname)) 1755 continue; 1756 /* Try to read bonding slave names from sysfs. */ 1757 MKSTR(slaves, 1758 "/sys/class/net/%s/master/bonding/slaves", ifname); 1759 bond_file = fopen(slaves, "r"); 1760 if (bond_file) 1761 break; 1762 } 1763 if (!bond_file) 1764 return -1; 1765 /* Use safe format to check maximal buffer length. */ 1766 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1767 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1768 char tmp_str[IF_NAMESIZE + 32]; 1769 struct rte_pci_addr pci_addr; 1770 struct mlx5_switch_info info; 1771 int ret; 1772 1773 /* Process slave interface names in the loop. */ 1774 snprintf(tmp_str, sizeof(tmp_str), 1775 "/sys/class/net/%s", ifname); 1776 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1777 DRV_LOG(WARNING, 1778 "Cannot get PCI address for netdev \"%s\".", 1779 ifname); 1780 continue; 1781 } 1782 /* Slave interface PCI address match found. */ 1783 snprintf(tmp_str, sizeof(tmp_str), 1784 "/sys/class/net/%s/phys_port_name", ifname); 1785 file = fopen(tmp_str, "rb"); 1786 if (!file) 1787 break; 1788 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1789 if (fscanf(file, "%32s", tmp_str) == 1) 1790 mlx5_translate_port_name(tmp_str, &info); 1791 fclose(file); 1792 /* Only process PF ports. */ 1793 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1794 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1795 continue; 1796 /* Check max bonding member. */ 1797 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1798 DRV_LOG(WARNING, "bonding index out of range, " 1799 "please increase MLX5_BOND_MAX_PORTS: %s", 1800 tmp_str); 1801 break; 1802 } 1803 /* Get ifindex. */ 1804 snprintf(tmp_str, sizeof(tmp_str), 1805 "/sys/class/net/%s/ifindex", ifname); 1806 file = fopen(tmp_str, "rb"); 1807 if (!file) 1808 break; 1809 ret = fscanf(file, "%u", &ifindex); 1810 fclose(file); 1811 if (ret != 1) 1812 break; 1813 /* Save bonding info. */ 1814 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1815 sizeof(bond_info->ports[0].ifname)); 1816 bond_info->ports[info.port_name].pci_addr = pci_addr; 1817 bond_info->ports[info.port_name].ifindex = ifindex; 1818 bond_info->n_port++; 1819 /* 1820 * Under socket direct mode, bonding will use 1821 * system_image_guid as identification. 1822 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1823 * All bonding members should have the same guid even if driver 1824 * is using PCIe BDF. 1825 */ 1826 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1827 if (ret < 0) 1828 break; 1829 else if (ret > 0) { 1830 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1831 owner == info.port_name && 1832 (owner != 0 || (owner == 0 && 1833 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1834 pf = info.port_name; 1835 } else if (pci_dev->domain == pci_addr.domain && 1836 pci_dev->bus == pci_addr.bus && 1837 pci_dev->devid == pci_addr.devid && 1838 ((pci_dev->function == 0 && 1839 pci_dev->function + owner == pci_addr.function) || 1840 (pci_dev->function == owner && 1841 pci_addr.function == owner))) 1842 pf = info.port_name; 1843 } 1844 if (pf >= 0) { 1845 /* Get bond interface info */ 1846 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1847 bond_info->ifname); 1848 if (ret) 1849 DRV_LOG(ERR, "unable to get bond info: %s", 1850 strerror(rte_errno)); 1851 else 1852 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1853 ifindex, bond_info->ifindex, bond_info->ifname); 1854 } 1855 if (owner == 0 && pf != 0) { 1856 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", 1857 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1858 pci_dev->function); 1859 } 1860 return pf; 1861 } 1862 1863 /** 1864 * Register a PCI device within bonding. 1865 * 1866 * This function spawns Ethernet devices out of a given PCI device and 1867 * bonding owner PF index. 1868 * 1869 * @param[in] cdev 1870 * Pointer to common mlx5 device structure. 1871 * @param[in] req_eth_da 1872 * Requested ethdev device argument. 1873 * @param[in] owner_id 1874 * Requested owner PF port ID within bonding device, default to 0. 1875 * @param[in, out] mkvlist 1876 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1877 * 1878 * @return 1879 * 0 on success, a negative errno value otherwise and rte_errno is set. 1880 */ 1881 static int 1882 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 1883 struct rte_eth_devargs *req_eth_da, 1884 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 1885 { 1886 struct ibv_device **ibv_list; 1887 /* 1888 * Number of found IB Devices matching with requested PCI BDF. 1889 * nd != 1 means there are multiple IB devices over the same 1890 * PCI device and we have representors and master. 1891 */ 1892 unsigned int nd = 0; 1893 /* 1894 * Number of found IB device Ports. nd = 1 and np = 1..n means 1895 * we have the single multiport IB device, and there may be 1896 * representors attached to some of found ports. 1897 */ 1898 unsigned int np = 0; 1899 /* 1900 * Number of DPDK ethernet devices to Spawn - either over 1901 * multiple IB devices or multiple ports of single IB device. 1902 * Actually this is the number of iterations to spawn. 1903 */ 1904 unsigned int ns = 0; 1905 /* 1906 * Bonding device 1907 * < 0 - no bonding device (single one) 1908 * >= 0 - bonding device (value is slave PF index) 1909 */ 1910 int bd = -1; 1911 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 1912 struct mlx5_dev_spawn_data *list = NULL; 1913 struct rte_eth_devargs eth_da = *req_eth_da; 1914 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 1915 struct mlx5_bond_info bond_info; 1916 int ret = -1; 1917 1918 errno = 0; 1919 ibv_list = mlx5_glue->get_device_list(&ret); 1920 if (!ibv_list) { 1921 rte_errno = errno ? errno : ENOSYS; 1922 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 1923 return -rte_errno; 1924 } 1925 /* 1926 * First scan the list of all Infiniband devices to find 1927 * matching ones, gathering into the list. 1928 */ 1929 struct ibv_device *ibv_match[ret + 1]; 1930 int nl_route = mlx5_nl_init(NETLINK_ROUTE); 1931 int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 1932 unsigned int i; 1933 1934 while (ret-- > 0) { 1935 struct rte_pci_addr pci_addr; 1936 1937 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 1938 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 1939 nl_rdma, owner_id, &bond_info); 1940 if (bd >= 0) { 1941 /* 1942 * Bonding device detected. Only one match is allowed, 1943 * the bonding is supported over multi-port IB device, 1944 * there should be no matches on representor PCI 1945 * functions or non VF LAG bonding devices with 1946 * specified address. 1947 */ 1948 if (nd) { 1949 DRV_LOG(ERR, 1950 "multiple PCI match on bonding device" 1951 "\"%s\" found", ibv_list[ret]->name); 1952 rte_errno = ENOENT; 1953 ret = -rte_errno; 1954 goto exit; 1955 } 1956 /* Amend owner pci address if owner PF ID specified. */ 1957 if (eth_da.nb_representor_ports) 1958 owner_pci.function += owner_id; 1959 DRV_LOG(INFO, 1960 "PCI information matches for slave %d bonding device \"%s\"", 1961 bd, ibv_list[ret]->name); 1962 ibv_match[nd++] = ibv_list[ret]; 1963 break; 1964 } else { 1965 /* Bonding device not found. */ 1966 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 1967 &pci_addr)) 1968 continue; 1969 if (owner_pci.domain != pci_addr.domain || 1970 owner_pci.bus != pci_addr.bus || 1971 owner_pci.devid != pci_addr.devid || 1972 owner_pci.function != pci_addr.function) 1973 continue; 1974 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 1975 ibv_list[ret]->name); 1976 ibv_match[nd++] = ibv_list[ret]; 1977 } 1978 } 1979 ibv_match[nd] = NULL; 1980 if (!nd) { 1981 /* No device matches, just complain and bail out. */ 1982 DRV_LOG(WARNING, 1983 "No Verbs device matches PCI device " PCI_PRI_FMT "," 1984 " are kernel drivers loaded?", 1985 owner_pci.domain, owner_pci.bus, 1986 owner_pci.devid, owner_pci.function); 1987 rte_errno = ENOENT; 1988 ret = -rte_errno; 1989 goto exit; 1990 } 1991 if (nd == 1) { 1992 /* 1993 * Found single matching device may have multiple ports. 1994 * Each port may be representor, we have to check the port 1995 * number and check the representors existence. 1996 */ 1997 if (nl_rdma >= 0) 1998 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 1999 if (!np) 2000 DRV_LOG(WARNING, 2001 "Cannot get IB device \"%s\" ports number.", 2002 ibv_match[0]->name); 2003 if (bd >= 0 && !np) { 2004 DRV_LOG(ERR, "Cannot get ports for bonding device."); 2005 rte_errno = ENOENT; 2006 ret = -rte_errno; 2007 goto exit; 2008 } 2009 } 2010 /* Now we can determine the maximal amount of devices to be spawned. */ 2011 list = mlx5_malloc(MLX5_MEM_ZERO, 2012 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2013 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2014 if (!list) { 2015 DRV_LOG(ERR, "Spawn data array allocation failure."); 2016 rte_errno = ENOMEM; 2017 ret = -rte_errno; 2018 goto exit; 2019 } 2020 if (bd >= 0 || np > 1) { 2021 /* 2022 * Single IB device with multiple ports found, 2023 * it may be E-Switch master device and representors. 2024 * We have to perform identification through the ports. 2025 */ 2026 MLX5_ASSERT(nl_rdma >= 0); 2027 MLX5_ASSERT(ns == 0); 2028 MLX5_ASSERT(nd == 1); 2029 MLX5_ASSERT(np); 2030 for (i = 1; i <= np; ++i) { 2031 list[ns].bond_info = &bond_info; 2032 list[ns].max_port = np; 2033 list[ns].phys_port = i; 2034 list[ns].phys_dev_name = ibv_match[0]->name; 2035 list[ns].eth_dev = NULL; 2036 list[ns].pci_dev = pci_dev; 2037 list[ns].cdev = cdev; 2038 list[ns].pf_bond = bd; 2039 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2040 ibv_match[0]->name, 2041 i); 2042 if (!list[ns].ifindex) { 2043 /* 2044 * No network interface index found for the 2045 * specified port, it means there is no 2046 * representor on this port. It's OK, 2047 * there can be disabled ports, for example 2048 * if sriov_numvfs < sriov_totalvfs. 2049 */ 2050 continue; 2051 } 2052 ret = -1; 2053 if (nl_route >= 0) 2054 ret = mlx5_nl_switch_info(nl_route, 2055 list[ns].ifindex, 2056 &list[ns].info); 2057 if (ret || (!list[ns].info.representor && 2058 !list[ns].info.master)) { 2059 /* 2060 * We failed to recognize representors with 2061 * Netlink, let's try to perform the task 2062 * with sysfs. 2063 */ 2064 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2065 &list[ns].info); 2066 } 2067 if (!ret && bd >= 0) { 2068 switch (list[ns].info.name_type) { 2069 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2070 if (np == 1) { 2071 /* 2072 * Force standalone bonding 2073 * device for ROCE LAG 2074 * configurations. 2075 */ 2076 list[ns].info.master = 0; 2077 list[ns].info.representor = 0; 2078 } 2079 if (list[ns].info.port_name == bd) 2080 ns++; 2081 break; 2082 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2083 /* Fallthrough */ 2084 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2085 /* Fallthrough */ 2086 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2087 if (list[ns].info.pf_num == bd) 2088 ns++; 2089 break; 2090 default: 2091 break; 2092 } 2093 continue; 2094 } 2095 if (!ret && (list[ns].info.representor ^ 2096 list[ns].info.master)) 2097 ns++; 2098 } 2099 if (!ns) { 2100 DRV_LOG(ERR, 2101 "Unable to recognize master/representors on the IB device with multiple ports."); 2102 rte_errno = ENOENT; 2103 ret = -rte_errno; 2104 goto exit; 2105 } 2106 } else { 2107 /* 2108 * The existence of several matching entries (nd > 1) means 2109 * port representors have been instantiated. No existing Verbs 2110 * call nor sysfs entries can tell them apart, this can only 2111 * be done through Netlink calls assuming kernel drivers are 2112 * recent enough to support them. 2113 * 2114 * In the event of identification failure through Netlink, 2115 * try again through sysfs, then: 2116 * 2117 * 1. A single IB device matches (nd == 1) with single 2118 * port (np=0/1) and is not a representor, assume 2119 * no switch support. 2120 * 2121 * 2. Otherwise no safe assumptions can be made; 2122 * complain louder and bail out. 2123 */ 2124 for (i = 0; i != nd; ++i) { 2125 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2126 list[ns].bond_info = NULL; 2127 list[ns].max_port = 1; 2128 list[ns].phys_port = 1; 2129 list[ns].phys_dev_name = ibv_match[i]->name; 2130 list[ns].eth_dev = NULL; 2131 list[ns].pci_dev = pci_dev; 2132 list[ns].cdev = cdev; 2133 list[ns].pf_bond = -1; 2134 list[ns].ifindex = 0; 2135 if (nl_rdma >= 0) 2136 list[ns].ifindex = mlx5_nl_ifindex 2137 (nl_rdma, 2138 ibv_match[i]->name, 2139 1); 2140 if (!list[ns].ifindex) { 2141 char ifname[IF_NAMESIZE]; 2142 2143 /* 2144 * Netlink failed, it may happen with old 2145 * ib_core kernel driver (before 4.16). 2146 * We can assume there is old driver because 2147 * here we are processing single ports IB 2148 * devices. Let's try sysfs to retrieve 2149 * the ifindex. The method works for 2150 * master device only. 2151 */ 2152 if (nd > 1) { 2153 /* 2154 * Multiple devices found, assume 2155 * representors, can not distinguish 2156 * master/representor and retrieve 2157 * ifindex via sysfs. 2158 */ 2159 continue; 2160 } 2161 ret = mlx5_get_ifname_sysfs 2162 (ibv_match[i]->ibdev_path, ifname); 2163 if (!ret) 2164 list[ns].ifindex = 2165 if_nametoindex(ifname); 2166 if (!list[ns].ifindex) { 2167 /* 2168 * No network interface index found 2169 * for the specified device, it means 2170 * there it is neither representor 2171 * nor master. 2172 */ 2173 continue; 2174 } 2175 } 2176 ret = -1; 2177 if (nl_route >= 0) 2178 ret = mlx5_nl_switch_info(nl_route, 2179 list[ns].ifindex, 2180 &list[ns].info); 2181 if (ret || (!list[ns].info.representor && 2182 !list[ns].info.master)) { 2183 /* 2184 * We failed to recognize representors with 2185 * Netlink, let's try to perform the task 2186 * with sysfs. 2187 */ 2188 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2189 &list[ns].info); 2190 } 2191 if (!ret && (list[ns].info.representor ^ 2192 list[ns].info.master)) { 2193 ns++; 2194 } else if ((nd == 1) && 2195 !list[ns].info.representor && 2196 !list[ns].info.master) { 2197 /* 2198 * Single IB device with one physical port and 2199 * attached network device. 2200 * May be SRIOV is not enabled or there is no 2201 * representors. 2202 */ 2203 DRV_LOG(INFO, "No E-Switch support detected."); 2204 ns++; 2205 break; 2206 } 2207 } 2208 if (!ns) { 2209 DRV_LOG(ERR, 2210 "Unable to recognize master/representors on the multiple IB devices."); 2211 rte_errno = ENOENT; 2212 ret = -rte_errno; 2213 goto exit; 2214 } 2215 /* 2216 * New kernels may add the switch_id attribute for the case 2217 * there is no E-Switch and we wrongly recognized the only 2218 * device as master. Override this if there is the single 2219 * device with single port and new device name format present. 2220 */ 2221 if (nd == 1 && 2222 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2223 list[0].info.master = 0; 2224 list[0].info.representor = 0; 2225 } 2226 } 2227 MLX5_ASSERT(ns); 2228 /* 2229 * Sort list to probe devices in natural order for users convenience 2230 * (i.e. master first, then representors from lowest to highest ID). 2231 */ 2232 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2233 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2234 /* Set devargs default values. */ 2235 if (eth_da.nb_mh_controllers == 0) { 2236 eth_da.nb_mh_controllers = 1; 2237 eth_da.mh_controllers[0] = 0; 2238 } 2239 if (eth_da.nb_ports == 0 && ns > 0) { 2240 if (list[0].pf_bond >= 0 && list[0].info.representor) 2241 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2242 pci_dev->device.devargs->args); 2243 eth_da.nb_ports = 1; 2244 eth_da.ports[0] = list[0].info.pf_num; 2245 } 2246 if (eth_da.nb_representor_ports == 0) { 2247 eth_da.nb_representor_ports = 1; 2248 eth_da.representor_ports[0] = 0; 2249 } 2250 } 2251 for (i = 0; i != ns; ++i) { 2252 uint32_t restore; 2253 2254 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2255 mkvlist); 2256 if (!list[i].eth_dev) { 2257 if (rte_errno != EBUSY && rte_errno != EEXIST) 2258 break; 2259 /* Device is disabled or already spawned. Ignore it. */ 2260 continue; 2261 } 2262 restore = list[i].eth_dev->data->dev_flags; 2263 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2264 /** 2265 * Each representor has a dedicated interrupts vector. 2266 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2267 * representor eth_dev object because representor and PF 2268 * share the same PCI address. 2269 * Override representor device with a dedicated 2270 * interrupts handle here. 2271 * Representor interrupts handle is released in mlx5_dev_stop(). 2272 */ 2273 if (list[i].info.representor) { 2274 struct rte_intr_handle *intr_handle = 2275 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2276 if (intr_handle == NULL) { 2277 DRV_LOG(ERR, 2278 "port %u failed to allocate memory for interrupt handler " 2279 "Rx interrupts will not be supported", 2280 i); 2281 rte_errno = ENOMEM; 2282 ret = -rte_errno; 2283 goto exit; 2284 } 2285 list[i].eth_dev->intr_handle = intr_handle; 2286 } 2287 /* Restore non-PCI flags cleared by the above call. */ 2288 list[i].eth_dev->data->dev_flags |= restore; 2289 rte_eth_dev_probing_finish(list[i].eth_dev); 2290 } 2291 if (i != ns) { 2292 DRV_LOG(ERR, 2293 "probe of PCI device " PCI_PRI_FMT " aborted after" 2294 " encountering an error: %s", 2295 owner_pci.domain, owner_pci.bus, 2296 owner_pci.devid, owner_pci.function, 2297 strerror(rte_errno)); 2298 ret = -rte_errno; 2299 /* Roll back. */ 2300 while (i--) { 2301 if (!list[i].eth_dev) 2302 continue; 2303 mlx5_dev_close(list[i].eth_dev); 2304 /* mac_addrs must not be freed because in dev_private */ 2305 list[i].eth_dev->data->mac_addrs = NULL; 2306 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2307 } 2308 /* Restore original error. */ 2309 rte_errno = -ret; 2310 } else { 2311 ret = 0; 2312 } 2313 exit: 2314 /* 2315 * Do the routine cleanup: 2316 * - close opened Netlink sockets 2317 * - free allocated spawn data array 2318 * - free the Infiniband device list 2319 */ 2320 if (nl_rdma >= 0) 2321 close(nl_rdma); 2322 if (nl_route >= 0) 2323 close(nl_route); 2324 if (list) 2325 mlx5_free(list); 2326 MLX5_ASSERT(ibv_list); 2327 mlx5_glue->free_device_list(ibv_list); 2328 return ret; 2329 } 2330 2331 static int 2332 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2333 struct rte_eth_devargs *eth_da) 2334 { 2335 int ret = 0; 2336 2337 if (dev->devargs == NULL) 2338 return 0; 2339 memset(eth_da, 0, sizeof(*eth_da)); 2340 /* Parse representor information first from class argument. */ 2341 if (dev->devargs->cls_str) 2342 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2343 if (ret != 0) { 2344 DRV_LOG(ERR, "failed to parse device arguments: %s", 2345 dev->devargs->cls_str); 2346 return -rte_errno; 2347 } 2348 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) { 2349 /* Parse legacy device argument */ 2350 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2351 if (ret) { 2352 DRV_LOG(ERR, "failed to parse device arguments: %s", 2353 dev->devargs->args); 2354 return -rte_errno; 2355 } 2356 } 2357 return 0; 2358 } 2359 2360 /** 2361 * Callback to register a PCI device. 2362 * 2363 * This function spawns Ethernet devices out of a given PCI device. 2364 * 2365 * @param[in] cdev 2366 * Pointer to common mlx5 device structure. 2367 * @param[in, out] mkvlist 2368 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2369 * 2370 * @return 2371 * 0 on success, a negative errno value otherwise and rte_errno is set. 2372 */ 2373 static int 2374 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2375 struct mlx5_kvargs_ctrl *mkvlist) 2376 { 2377 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2378 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2379 int ret = 0; 2380 uint16_t p; 2381 2382 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2383 if (ret != 0) 2384 return ret; 2385 2386 if (eth_da.nb_ports > 0) { 2387 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2388 for (p = 0; p < eth_da.nb_ports; p++) { 2389 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2390 eth_da.ports[p], mkvlist); 2391 if (ret) 2392 break; 2393 } 2394 if (ret) { 2395 DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " " 2396 "aborted due to prodding failure of PF %u", 2397 pci_dev->addr.domain, pci_dev->addr.bus, 2398 pci_dev->addr.devid, pci_dev->addr.function, 2399 eth_da.ports[p]); 2400 mlx5_net_remove(cdev); 2401 } 2402 } else { 2403 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2404 } 2405 return ret; 2406 } 2407 2408 /* Probe a single SF device on auxiliary bus, no representor support. */ 2409 static int 2410 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2411 struct mlx5_kvargs_ctrl *mkvlist) 2412 { 2413 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2414 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 2415 struct rte_device *dev = cdev->dev; 2416 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2417 struct rte_eth_dev *eth_dev; 2418 int ret = 0; 2419 2420 /* Parse ethdev devargs. */ 2421 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2422 if (ret != 0) 2423 return ret; 2424 /* Init spawn data. */ 2425 spawn.max_port = 1; 2426 spawn.phys_port = 1; 2427 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2428 ret = mlx5_auxiliary_get_ifindex(dev->name); 2429 if (ret < 0) { 2430 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2431 return ret; 2432 } 2433 spawn.ifindex = ret; 2434 spawn.cdev = cdev; 2435 /* Spawn device. */ 2436 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2437 if (eth_dev == NULL) 2438 return -rte_errno; 2439 /* Post create. */ 2440 eth_dev->intr_handle = adev->intr_handle; 2441 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2442 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2443 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2444 eth_dev->data->numa_node = dev->numa_node; 2445 } 2446 rte_eth_dev_probing_finish(eth_dev); 2447 return 0; 2448 } 2449 2450 /** 2451 * Net class driver callback to probe a device. 2452 * 2453 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2454 * 2455 * @param[in] cdev 2456 * Pointer to the common mlx5 device. 2457 * @param[in, out] mkvlist 2458 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2459 * 2460 * @return 2461 * 0 on success, a negative errno value otherwise and rte_errno is set. 2462 */ 2463 int 2464 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2465 struct mlx5_kvargs_ctrl *mkvlist) 2466 { 2467 int ret; 2468 2469 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2470 mlx5_pmd_socket_init(); 2471 ret = mlx5_init_once(); 2472 if (ret) { 2473 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2474 strerror(rte_errno)); 2475 return -rte_errno; 2476 } 2477 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2478 if (ret) { 2479 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2480 strerror(rte_errno)); 2481 return -rte_errno; 2482 } 2483 if (mlx5_dev_is_pci(cdev->dev)) 2484 return mlx5_os_pci_probe(cdev, mkvlist); 2485 else 2486 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2487 } 2488 2489 /** 2490 * Cleanup resources when the last device is closed. 2491 */ 2492 void 2493 mlx5_os_net_cleanup(void) 2494 { 2495 mlx5_pmd_socket_uninit(); 2496 } 2497 2498 /** 2499 * Install shared asynchronous device events handler. 2500 * This function is implemented to support event sharing 2501 * between multiple ports of single IB device. 2502 * 2503 * @param sh 2504 * Pointer to mlx5_dev_ctx_shared object. 2505 */ 2506 void 2507 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2508 { 2509 int ret; 2510 int flags; 2511 struct ibv_context *ctx = sh->cdev->ctx; 2512 2513 sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2514 if (sh->intr_handle == NULL) { 2515 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2516 rte_errno = ENOMEM; 2517 return; 2518 } 2519 rte_intr_fd_set(sh->intr_handle, -1); 2520 2521 flags = fcntl(ctx->async_fd, F_GETFL); 2522 ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK); 2523 if (ret) { 2524 DRV_LOG(INFO, "failed to change file descriptor async event" 2525 " queue"); 2526 } else { 2527 rte_intr_fd_set(sh->intr_handle, ctx->async_fd); 2528 rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT); 2529 if (rte_intr_callback_register(sh->intr_handle, 2530 mlx5_dev_interrupt_handler, sh)) { 2531 DRV_LOG(INFO, "Fail to install the shared interrupt."); 2532 rte_intr_fd_set(sh->intr_handle, -1); 2533 } 2534 } 2535 if (sh->cdev->config.devx) { 2536 #ifdef HAVE_IBV_DEVX_ASYNC 2537 sh->intr_handle_devx = 2538 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2539 if (!sh->intr_handle_devx) { 2540 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2541 rte_errno = ENOMEM; 2542 return; 2543 } 2544 rte_intr_fd_set(sh->intr_handle_devx, -1); 2545 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2546 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 2547 if (!devx_comp) { 2548 DRV_LOG(INFO, "failed to allocate devx_comp."); 2549 return; 2550 } 2551 flags = fcntl(devx_comp->fd, F_GETFL); 2552 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 2553 if (ret) { 2554 DRV_LOG(INFO, "failed to change file descriptor" 2555 " devx comp"); 2556 return; 2557 } 2558 rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd); 2559 rte_intr_type_set(sh->intr_handle_devx, 2560 RTE_INTR_HANDLE_EXT); 2561 if (rte_intr_callback_register(sh->intr_handle_devx, 2562 mlx5_dev_interrupt_handler_devx, sh)) { 2563 DRV_LOG(INFO, "Fail to install the devx shared" 2564 " interrupt."); 2565 rte_intr_fd_set(sh->intr_handle_devx, -1); 2566 } 2567 #endif /* HAVE_IBV_DEVX_ASYNC */ 2568 } 2569 } 2570 2571 /** 2572 * Uninstall shared asynchronous device events handler. 2573 * This function is implemented to support event sharing 2574 * between multiple ports of single IB device. 2575 * 2576 * @param dev 2577 * Pointer to mlx5_dev_ctx_shared object. 2578 */ 2579 void 2580 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2581 { 2582 if (rte_intr_fd_get(sh->intr_handle) >= 0) 2583 mlx5_intr_callback_unregister(sh->intr_handle, 2584 mlx5_dev_interrupt_handler, sh); 2585 rte_intr_instance_free(sh->intr_handle); 2586 #ifdef HAVE_IBV_DEVX_ASYNC 2587 if (rte_intr_fd_get(sh->intr_handle_devx) >= 0) 2588 rte_intr_callback_unregister(sh->intr_handle_devx, 2589 mlx5_dev_interrupt_handler_devx, sh); 2590 rte_intr_instance_free(sh->intr_handle_devx); 2591 if (sh->devx_comp) 2592 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2593 #endif 2594 } 2595 2596 /** 2597 * Read statistics by a named counter. 2598 * 2599 * @param[in] priv 2600 * Pointer to the private device data structure. 2601 * @param[in] ctr_name 2602 * Pointer to the name of the statistic counter to read 2603 * @param[out] stat 2604 * Pointer to read statistic value. 2605 * @return 2606 * 0 on success and stat is valud, 1 if failed to read the value 2607 * rte_errno is set. 2608 * 2609 */ 2610 int 2611 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2612 uint64_t *stat) 2613 { 2614 int fd; 2615 2616 if (priv->sh) { 2617 if (priv->q_counters != NULL && 2618 strcmp(ctr_name, "out_of_buffer") == 0) 2619 return mlx5_devx_cmd_queue_counter_query 2620 (priv->q_counters, 0, (uint32_t *)stat); 2621 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2622 priv->sh->ibdev_path, 2623 priv->dev_port, 2624 ctr_name); 2625 fd = open(path, O_RDONLY); 2626 /* 2627 * in switchdev the file location is not per port 2628 * but rather in <ibdev_path>/hw_counters/<file_name>. 2629 */ 2630 if (fd == -1) { 2631 MKSTR(path1, "%s/hw_counters/%s", 2632 priv->sh->ibdev_path, 2633 ctr_name); 2634 fd = open(path1, O_RDONLY); 2635 } 2636 if (fd != -1) { 2637 char buf[21] = {'\0'}; 2638 ssize_t n = read(fd, buf, sizeof(buf)); 2639 2640 close(fd); 2641 if (n != -1) { 2642 *stat = strtoull(buf, NULL, 10); 2643 return 0; 2644 } 2645 } 2646 } 2647 *stat = 0; 2648 return 1; 2649 } 2650 2651 /** 2652 * Remove a MAC address from device 2653 * 2654 * @param dev 2655 * Pointer to Ethernet device structure. 2656 * @param index 2657 * MAC address index. 2658 */ 2659 void 2660 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2661 { 2662 struct mlx5_priv *priv = dev->data->dev_private; 2663 const int vf = priv->sh->dev_cap.vf; 2664 2665 if (vf) 2666 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2667 mlx5_ifindex(dev), priv->mac_own, 2668 &dev->data->mac_addrs[index], index); 2669 } 2670 2671 /** 2672 * Adds a MAC address to the device 2673 * 2674 * @param dev 2675 * Pointer to Ethernet device structure. 2676 * @param mac_addr 2677 * MAC address to register. 2678 * @param index 2679 * MAC address index. 2680 * 2681 * @return 2682 * 0 on success, a negative errno value otherwise 2683 */ 2684 int 2685 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2686 uint32_t index) 2687 { 2688 struct mlx5_priv *priv = dev->data->dev_private; 2689 const int vf = priv->sh->dev_cap.vf; 2690 int ret = 0; 2691 2692 if (vf) 2693 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2694 mlx5_ifindex(dev), priv->mac_own, 2695 mac, index); 2696 return ret; 2697 } 2698 2699 /** 2700 * Modify a VF MAC address 2701 * 2702 * @param priv 2703 * Pointer to device private data. 2704 * @param mac_addr 2705 * MAC address to modify into. 2706 * @param iface_idx 2707 * Net device interface index 2708 * @param vf_index 2709 * VF index 2710 * 2711 * @return 2712 * 0 on success, a negative errno value otherwise 2713 */ 2714 int 2715 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2716 unsigned int iface_idx, 2717 struct rte_ether_addr *mac_addr, 2718 int vf_index) 2719 { 2720 return mlx5_nl_vf_mac_addr_modify 2721 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2722 } 2723 2724 /** 2725 * Set device promiscuous mode 2726 * 2727 * @param dev 2728 * Pointer to Ethernet device structure. 2729 * @param enable 2730 * 0 - promiscuous is disabled, otherwise - enabled 2731 * 2732 * @return 2733 * 0 on success, a negative error value otherwise 2734 */ 2735 int 2736 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2737 { 2738 struct mlx5_priv *priv = dev->data->dev_private; 2739 2740 return mlx5_nl_promisc(priv->nl_socket_route, 2741 mlx5_ifindex(dev), !!enable); 2742 } 2743 2744 /** 2745 * Set device promiscuous mode 2746 * 2747 * @param dev 2748 * Pointer to Ethernet device structure. 2749 * @param enable 2750 * 0 - all multicase is disabled, otherwise - enabled 2751 * 2752 * @return 2753 * 0 on success, a negative error value otherwise 2754 */ 2755 int 2756 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2757 { 2758 struct mlx5_priv *priv = dev->data->dev_private; 2759 2760 return mlx5_nl_allmulti(priv->nl_socket_route, 2761 mlx5_ifindex(dev), !!enable); 2762 } 2763 2764 /** 2765 * Flush device MAC addresses 2766 * 2767 * @param dev 2768 * Pointer to Ethernet device structure. 2769 * 2770 */ 2771 void 2772 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2773 { 2774 struct mlx5_priv *priv = dev->data->dev_private; 2775 2776 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2777 dev->data->mac_addrs, 2778 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2779 } 2780