1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <rte_bus_pci.h> 23 #include <rte_common.h> 24 #include <rte_kvargs.h> 25 #include <rte_rwlock.h> 26 #include <rte_spinlock.h> 27 #include <rte_string_fns.h> 28 #include <rte_alarm.h> 29 #include <rte_eal_paging.h> 30 31 #include <mlx5_glue.h> 32 #include <mlx5_devx_cmds.h> 33 #include <mlx5_common.h> 34 #include <mlx5_common_mp.h> 35 #include <mlx5_common_mr.h> 36 #include <mlx5_malloc.h> 37 38 #include "mlx5_defs.h" 39 #include "mlx5.h" 40 #include "mlx5_common_os.h" 41 #include "mlx5_utils.h" 42 #include "mlx5_rxtx.h" 43 #include "mlx5_autoconf.h" 44 #include "mlx5_mr.h" 45 #include "mlx5_flow.h" 46 #include "rte_pmd_mlx5.h" 47 #include "mlx5_verbs.h" 48 #include "mlx5_nl.h" 49 #include "mlx5_devx.h" 50 51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 52 53 #ifndef HAVE_IBV_MLX5_MOD_MPW 54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 56 #endif 57 58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 60 #endif 61 62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 63 64 /* Spinlock for mlx5_shared_data allocation. */ 65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 66 67 /* Process local data for secondary processes. */ 68 static struct mlx5_local_data mlx5_local_data; 69 70 /** 71 * Set the completion channel file descriptor interrupt as non-blocking. 72 * 73 * @param[in] rxq_obj 74 * Pointer to RQ channel object, which includes the channel fd 75 * 76 * @param[out] fd 77 * The file descriptor (representing the intetrrupt) used in this channel. 78 * 79 * @return 80 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 81 */ 82 int 83 mlx5_os_set_nonblock_channel_fd(int fd) 84 { 85 int flags; 86 87 flags = fcntl(fd, F_GETFL); 88 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 89 } 90 91 /** 92 * Get mlx5 device attributes. The glue function query_device_ex() is called 93 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 94 * device attributes from the glue out parameter. 95 * 96 * @param dev 97 * Pointer to ibv context. 98 * 99 * @param device_attr 100 * Pointer to mlx5 device attributes. 101 * 102 * @return 103 * 0 on success, non zero error number otherwise 104 */ 105 int 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 107 { 108 int err; 109 struct ibv_device_attr_ex attr_ex; 110 memset(device_attr, 0, sizeof(*device_attr)); 111 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 112 if (err) 113 return err; 114 115 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 116 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 117 device_attr->max_sge = attr_ex.orig_attr.max_sge; 118 device_attr->max_cq = attr_ex.orig_attr.max_cq; 119 device_attr->max_cqe = attr_ex.orig_attr.max_cqe; 120 device_attr->max_mr = attr_ex.orig_attr.max_mr; 121 device_attr->max_pd = attr_ex.orig_attr.max_pd; 122 device_attr->max_qp = attr_ex.orig_attr.max_qp; 123 device_attr->max_srq = attr_ex.orig_attr.max_srq; 124 device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr; 125 device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 126 device_attr->max_rwq_indirection_table_size = 127 attr_ex.rss_caps.max_rwq_indirection_table_size; 128 device_attr->max_tso = attr_ex.tso_caps.max_tso; 129 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 130 131 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 132 err = mlx5_glue->dv_query_device(ctx, &dv_attr); 133 if (err) 134 return err; 135 136 device_attr->flags = dv_attr.flags; 137 device_attr->comp_mask = dv_attr.comp_mask; 138 #ifdef HAVE_IBV_MLX5_MOD_SWP 139 device_attr->sw_parsing_offloads = 140 dv_attr.sw_parsing_caps.sw_parsing_offloads; 141 #endif 142 device_attr->min_single_stride_log_num_of_bytes = 143 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 144 device_attr->max_single_stride_log_num_of_bytes = 145 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 146 device_attr->min_single_wqe_log_num_of_strides = 147 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 148 device_attr->max_single_wqe_log_num_of_strides = 149 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 150 device_attr->stride_supported_qpts = 151 dv_attr.striding_rq_caps.supported_qpts; 152 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 153 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 154 #endif 155 156 return err; 157 } 158 159 /** 160 * Verbs callback to allocate a memory. This function should allocate the space 161 * according to the size provided residing inside a huge page. 162 * Please note that all allocation must respect the alignment from libmlx5 163 * (i.e. currently rte_mem_page_size()). 164 * 165 * @param[in] size 166 * The size in bytes of the memory to allocate. 167 * @param[in] data 168 * A pointer to the callback data. 169 * 170 * @return 171 * Allocated buffer, NULL otherwise and rte_errno is set. 172 */ 173 static void * 174 mlx5_alloc_verbs_buf(size_t size, void *data) 175 { 176 struct mlx5_dev_ctx_shared *sh = data; 177 void *ret; 178 size_t alignment = rte_mem_page_size(); 179 if (alignment == (size_t)-1) { 180 DRV_LOG(ERR, "Failed to get mem page size"); 181 rte_errno = ENOMEM; 182 return NULL; 183 } 184 185 MLX5_ASSERT(data != NULL); 186 ret = mlx5_malloc(0, size, alignment, sh->numa_node); 187 if (!ret && size) 188 rte_errno = ENOMEM; 189 return ret; 190 } 191 192 /** 193 * Verbs callback to free a memory. 194 * 195 * @param[in] ptr 196 * A pointer to the memory to free. 197 * @param[in] data 198 * A pointer to the callback data. 199 */ 200 static void 201 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) 202 { 203 MLX5_ASSERT(data != NULL); 204 mlx5_free(ptr); 205 } 206 207 /** 208 * Initialize DR related data within private structure. 209 * Routine checks the reference counter and does actual 210 * resources creation/initialization only if counter is zero. 211 * 212 * @param[in] priv 213 * Pointer to the private device data structure. 214 * 215 * @return 216 * Zero on success, positive error code otherwise. 217 */ 218 static int 219 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 220 { 221 struct mlx5_dev_ctx_shared *sh = priv->sh; 222 char s[MLX5_HLIST_NAMESIZE] __rte_unused; 223 int err; 224 225 MLX5_ASSERT(sh && sh->refcnt); 226 if (sh->refcnt > 1) 227 return 0; 228 err = mlx5_alloc_table_hash_list(priv); 229 if (err) 230 goto error; 231 /* The resources below are only valid with DV support. */ 232 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 233 /* Init port id action cache list. */ 234 snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name); 235 mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh, 236 flow_dv_port_id_create_cb, 237 flow_dv_port_id_match_cb, 238 flow_dv_port_id_remove_cb); 239 /* Init push vlan action cache list. */ 240 snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name); 241 mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh, 242 flow_dv_push_vlan_create_cb, 243 flow_dv_push_vlan_match_cb, 244 flow_dv_push_vlan_remove_cb); 245 /* Init sample action cache list. */ 246 snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name); 247 mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh, 248 flow_dv_sample_create_cb, 249 flow_dv_sample_match_cb, 250 flow_dv_sample_remove_cb); 251 /* Init dest array action cache list. */ 252 snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name); 253 mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh, 254 flow_dv_dest_array_create_cb, 255 flow_dv_dest_array_match_cb, 256 flow_dv_dest_array_remove_cb); 257 /* Create tags hash list table. */ 258 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); 259 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0, 260 MLX5_HLIST_WRITE_MOST, 261 flow_dv_tag_create_cb, 262 flow_dv_tag_match_cb, 263 flow_dv_tag_remove_cb); 264 if (!sh->tag_table) { 265 DRV_LOG(ERR, "tags with hash creation failed."); 266 err = ENOMEM; 267 goto error; 268 } 269 sh->tag_table->ctx = sh; 270 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); 271 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ, 272 0, MLX5_HLIST_WRITE_MOST | 273 MLX5_HLIST_DIRECT_KEY, 274 flow_dv_modify_create_cb, 275 flow_dv_modify_match_cb, 276 flow_dv_modify_remove_cb); 277 if (!sh->modify_cmds) { 278 DRV_LOG(ERR, "hdr modify hash creation failed"); 279 err = ENOMEM; 280 goto error; 281 } 282 sh->modify_cmds->ctx = sh; 283 snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name); 284 sh->encaps_decaps = mlx5_hlist_create(s, 285 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ, 286 0, MLX5_HLIST_DIRECT_KEY | 287 MLX5_HLIST_WRITE_MOST, 288 flow_dv_encap_decap_create_cb, 289 flow_dv_encap_decap_match_cb, 290 flow_dv_encap_decap_remove_cb); 291 if (!sh->encaps_decaps) { 292 DRV_LOG(ERR, "encap decap hash creation failed"); 293 err = ENOMEM; 294 goto error; 295 } 296 sh->encaps_decaps->ctx = sh; 297 #endif 298 #ifdef HAVE_MLX5DV_DR 299 void *domain; 300 301 /* Reference counter is zero, we should initialize structures. */ 302 domain = mlx5_glue->dr_create_domain(sh->ctx, 303 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 304 if (!domain) { 305 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 306 err = errno; 307 goto error; 308 } 309 sh->rx_domain = domain; 310 domain = mlx5_glue->dr_create_domain(sh->ctx, 311 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 312 if (!domain) { 313 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 314 err = errno; 315 goto error; 316 } 317 sh->tx_domain = domain; 318 #ifdef HAVE_MLX5DV_DR_ESWITCH 319 if (priv->config.dv_esw_en) { 320 domain = mlx5_glue->dr_create_domain 321 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); 322 if (!domain) { 323 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 324 err = errno; 325 goto error; 326 } 327 sh->fdb_domain = domain; 328 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); 329 } 330 #endif 331 if (!sh->tunnel_hub) 332 err = mlx5_alloc_tunnel_hub(sh); 333 if (err) { 334 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 335 goto error; 336 } 337 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 338 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 339 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 340 if (sh->fdb_domain) 341 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 342 } 343 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 344 #endif /* HAVE_MLX5DV_DR */ 345 sh->default_miss_action = 346 mlx5_glue->dr_create_flow_action_default_miss(); 347 if (!sh->default_miss_action) 348 DRV_LOG(WARNING, "Default miss action is not supported."); 349 return 0; 350 error: 351 /* Rollback the created objects. */ 352 if (sh->rx_domain) { 353 mlx5_glue->dr_destroy_domain(sh->rx_domain); 354 sh->rx_domain = NULL; 355 } 356 if (sh->tx_domain) { 357 mlx5_glue->dr_destroy_domain(sh->tx_domain); 358 sh->tx_domain = NULL; 359 } 360 if (sh->fdb_domain) { 361 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 362 sh->fdb_domain = NULL; 363 } 364 if (sh->esw_drop_action) { 365 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 366 sh->esw_drop_action = NULL; 367 } 368 if (sh->pop_vlan_action) { 369 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 370 sh->pop_vlan_action = NULL; 371 } 372 if (sh->encaps_decaps) { 373 mlx5_hlist_destroy(sh->encaps_decaps); 374 sh->encaps_decaps = NULL; 375 } 376 if (sh->modify_cmds) { 377 mlx5_hlist_destroy(sh->modify_cmds); 378 sh->modify_cmds = NULL; 379 } 380 if (sh->tag_table) { 381 /* tags should be destroyed with flow before. */ 382 mlx5_hlist_destroy(sh->tag_table); 383 sh->tag_table = NULL; 384 } 385 if (sh->tunnel_hub) { 386 mlx5_release_tunnel_hub(sh, priv->dev_port); 387 sh->tunnel_hub = NULL; 388 } 389 mlx5_free_table_hash_list(priv); 390 return err; 391 } 392 393 /** 394 * Destroy DR related data within private structure. 395 * 396 * @param[in] priv 397 * Pointer to the private device data structure. 398 */ 399 void 400 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 401 { 402 struct mlx5_dev_ctx_shared *sh = priv->sh; 403 404 MLX5_ASSERT(sh && sh->refcnt); 405 if (sh->refcnt > 1) 406 return; 407 #ifdef HAVE_MLX5DV_DR 408 if (sh->rx_domain) { 409 mlx5_glue->dr_destroy_domain(sh->rx_domain); 410 sh->rx_domain = NULL; 411 } 412 if (sh->tx_domain) { 413 mlx5_glue->dr_destroy_domain(sh->tx_domain); 414 sh->tx_domain = NULL; 415 } 416 #ifdef HAVE_MLX5DV_DR_ESWITCH 417 if (sh->fdb_domain) { 418 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 419 sh->fdb_domain = NULL; 420 } 421 if (sh->esw_drop_action) { 422 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 423 sh->esw_drop_action = NULL; 424 } 425 #endif 426 if (sh->pop_vlan_action) { 427 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 428 sh->pop_vlan_action = NULL; 429 } 430 #endif /* HAVE_MLX5DV_DR */ 431 if (sh->default_miss_action) 432 mlx5_glue->destroy_flow_action 433 (sh->default_miss_action); 434 if (sh->encaps_decaps) { 435 mlx5_hlist_destroy(sh->encaps_decaps); 436 sh->encaps_decaps = NULL; 437 } 438 if (sh->modify_cmds) { 439 mlx5_hlist_destroy(sh->modify_cmds); 440 sh->modify_cmds = NULL; 441 } 442 if (sh->tag_table) { 443 /* tags should be destroyed with flow before. */ 444 mlx5_hlist_destroy(sh->tag_table); 445 sh->tag_table = NULL; 446 } 447 if (sh->tunnel_hub) { 448 mlx5_release_tunnel_hub(sh, priv->dev_port); 449 sh->tunnel_hub = NULL; 450 } 451 mlx5_cache_list_destroy(&sh->port_id_action_list); 452 mlx5_cache_list_destroy(&sh->push_vlan_action_list); 453 mlx5_free_table_hash_list(priv); 454 } 455 456 /** 457 * Initialize shared data between primary and secondary process. 458 * 459 * A memzone is reserved by primary process and secondary processes attach to 460 * the memzone. 461 * 462 * @return 463 * 0 on success, a negative errno value otherwise and rte_errno is set. 464 */ 465 static int 466 mlx5_init_shared_data(void) 467 { 468 const struct rte_memzone *mz; 469 int ret = 0; 470 471 rte_spinlock_lock(&mlx5_shared_data_lock); 472 if (mlx5_shared_data == NULL) { 473 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 474 /* Allocate shared memory. */ 475 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 476 sizeof(*mlx5_shared_data), 477 SOCKET_ID_ANY, 0); 478 if (mz == NULL) { 479 DRV_LOG(ERR, 480 "Cannot allocate mlx5 shared data"); 481 ret = -rte_errno; 482 goto error; 483 } 484 mlx5_shared_data = mz->addr; 485 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 486 rte_spinlock_init(&mlx5_shared_data->lock); 487 } else { 488 /* Lookup allocated shared memory. */ 489 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 490 if (mz == NULL) { 491 DRV_LOG(ERR, 492 "Cannot attach mlx5 shared data"); 493 ret = -rte_errno; 494 goto error; 495 } 496 mlx5_shared_data = mz->addr; 497 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 498 } 499 } 500 error: 501 rte_spinlock_unlock(&mlx5_shared_data_lock); 502 return ret; 503 } 504 505 /** 506 * PMD global initialization. 507 * 508 * Independent from individual device, this function initializes global 509 * per-PMD data structures distinguishing primary and secondary processes. 510 * Hence, each initialization is called once per a process. 511 * 512 * @return 513 * 0 on success, a negative errno value otherwise and rte_errno is set. 514 */ 515 static int 516 mlx5_init_once(void) 517 { 518 struct mlx5_shared_data *sd; 519 struct mlx5_local_data *ld = &mlx5_local_data; 520 int ret = 0; 521 522 if (mlx5_init_shared_data()) 523 return -rte_errno; 524 sd = mlx5_shared_data; 525 MLX5_ASSERT(sd); 526 rte_spinlock_lock(&sd->lock); 527 switch (rte_eal_process_type()) { 528 case RTE_PROC_PRIMARY: 529 if (sd->init_done) 530 break; 531 LIST_INIT(&sd->mem_event_cb_list); 532 rte_rwlock_init(&sd->mem_event_rwlock); 533 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", 534 mlx5_mr_mem_event_cb, NULL); 535 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 536 mlx5_mp_os_primary_handle); 537 if (ret) 538 goto out; 539 sd->init_done = true; 540 break; 541 case RTE_PROC_SECONDARY: 542 if (ld->init_done) 543 break; 544 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 545 mlx5_mp_os_secondary_handle); 546 if (ret) 547 goto out; 548 ++sd->secondary_cnt; 549 ld->init_done = true; 550 break; 551 default: 552 break; 553 } 554 out: 555 rte_spinlock_unlock(&sd->lock); 556 return ret; 557 } 558 559 /** 560 * Create the Tx queue DevX/Verbs object. 561 * 562 * @param dev 563 * Pointer to Ethernet device. 564 * @param idx 565 * Queue index in DPDK Tx queue array. 566 * 567 * @return 568 * 0 on success, a negative errno value otherwise and rte_errno is set. 569 */ 570 static int 571 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx) 572 { 573 struct mlx5_priv *priv = dev->data->dev_private; 574 struct mlx5_txq_data *txq_data = (*priv->txqs)[idx]; 575 struct mlx5_txq_ctrl *txq_ctrl = 576 container_of(txq_data, struct mlx5_txq_ctrl, txq); 577 578 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) 579 return mlx5_txq_devx_obj_new(dev, idx); 580 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 581 if (!priv->config.dv_esw_en) 582 return mlx5_txq_devx_obj_new(dev, idx); 583 #endif 584 return mlx5_txq_ibv_obj_new(dev, idx); 585 } 586 587 /** 588 * Release an Tx DevX/verbs queue object. 589 * 590 * @param txq_obj 591 * DevX/Verbs Tx queue object. 592 */ 593 static void 594 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj) 595 { 596 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) { 597 mlx5_txq_devx_obj_release(txq_obj); 598 return; 599 } 600 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 601 if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) { 602 mlx5_txq_devx_obj_release(txq_obj); 603 return; 604 } 605 #endif 606 mlx5_txq_ibv_obj_release(txq_obj); 607 } 608 609 /** 610 * DV flow counter mode detect and config. 611 * 612 * @param dev 613 * Pointer to rte_eth_dev structure. 614 * 615 */ 616 static void 617 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) 618 { 619 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 620 struct mlx5_priv *priv = dev->data->dev_private; 621 struct mlx5_dev_ctx_shared *sh = priv->sh; 622 bool fallback; 623 624 #ifndef HAVE_IBV_DEVX_ASYNC 625 fallback = true; 626 #else 627 fallback = false; 628 if (!priv->config.devx || !priv->config.dv_flow_en || 629 !priv->config.hca_attr.flow_counters_dump || 630 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) || 631 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP)) 632 fallback = true; 633 #endif 634 if (fallback) 635 DRV_LOG(INFO, "Use fall-back DV counter management. Flow " 636 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.", 637 priv->config.hca_attr.flow_counters_dump, 638 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap); 639 /* Initialize fallback mode only on the port initializes sh. */ 640 if (sh->refcnt == 1) 641 sh->cmng.counter_fallback = fallback; 642 else if (fallback != sh->cmng.counter_fallback) 643 DRV_LOG(WARNING, "Port %d in sh has different fallback mode " 644 "with others:%d.", PORT_ID(priv), fallback); 645 #endif 646 } 647 648 /** 649 * Spawn an Ethernet device from Verbs information. 650 * 651 * @param dpdk_dev 652 * Backing DPDK device. 653 * @param spawn 654 * Verbs device parameters (name, port, switch_info) to spawn. 655 * @param config 656 * Device configuration parameters. 657 * 658 * @return 659 * A valid Ethernet device object on success, NULL otherwise and rte_errno 660 * is set. The following errors are defined: 661 * 662 * EBUSY: device is not supposed to be spawned. 663 * EEXIST: device is already spawned 664 */ 665 static struct rte_eth_dev * 666 mlx5_dev_spawn(struct rte_device *dpdk_dev, 667 struct mlx5_dev_spawn_data *spawn, 668 struct mlx5_dev_config *config) 669 { 670 const struct mlx5_switch_info *switch_info = &spawn->info; 671 struct mlx5_dev_ctx_shared *sh = NULL; 672 struct ibv_port_attr port_attr; 673 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 674 struct rte_eth_dev *eth_dev = NULL; 675 struct mlx5_priv *priv = NULL; 676 int err = 0; 677 unsigned int hw_padding = 0; 678 unsigned int mps; 679 unsigned int tunnel_en = 0; 680 unsigned int mpls_en = 0; 681 unsigned int swp = 0; 682 unsigned int mprq = 0; 683 unsigned int mprq_min_stride_size_n = 0; 684 unsigned int mprq_max_stride_size_n = 0; 685 unsigned int mprq_min_stride_num_n = 0; 686 unsigned int mprq_max_stride_num_n = 0; 687 struct rte_ether_addr mac; 688 char name[RTE_ETH_NAME_MAX_LEN]; 689 int own_domain_id = 0; 690 uint16_t port_id; 691 unsigned int i; 692 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 693 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; 694 #endif 695 696 /* Determine if this port representor is supposed to be spawned. */ 697 if (switch_info->representor && dpdk_dev->devargs) { 698 struct rte_eth_devargs eth_da; 699 700 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); 701 if (err) { 702 rte_errno = -err; 703 DRV_LOG(ERR, "failed to process device arguments: %s", 704 strerror(rte_errno)); 705 return NULL; 706 } 707 for (i = 0; i < eth_da.nb_representor_ports; ++i) 708 if (eth_da.representor_ports[i] == 709 (uint16_t)switch_info->port_name) 710 break; 711 if (i == eth_da.nb_representor_ports) { 712 rte_errno = EBUSY; 713 return NULL; 714 } 715 } 716 /* Build device name. */ 717 if (spawn->pf_bond < 0) { 718 /* Single device. */ 719 if (!switch_info->representor) 720 strlcpy(name, dpdk_dev->name, sizeof(name)); 721 else 722 snprintf(name, sizeof(name), "%s_representor_%u", 723 dpdk_dev->name, switch_info->port_name); 724 } else { 725 /* Bonding device. */ 726 if (!switch_info->representor) 727 snprintf(name, sizeof(name), "%s_%s", 728 dpdk_dev->name, 729 mlx5_os_get_dev_device_name(spawn->phys_dev)); 730 else 731 snprintf(name, sizeof(name), "%s_%s_representor_%u", 732 dpdk_dev->name, 733 mlx5_os_get_dev_device_name(spawn->phys_dev), 734 switch_info->port_name); 735 } 736 /* check if the device is already spawned */ 737 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 738 rte_errno = EEXIST; 739 return NULL; 740 } 741 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 742 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 743 struct mlx5_mp_id mp_id; 744 745 eth_dev = rte_eth_dev_attach_secondary(name); 746 if (eth_dev == NULL) { 747 DRV_LOG(ERR, "can not attach rte ethdev"); 748 rte_errno = ENOMEM; 749 return NULL; 750 } 751 priv = eth_dev->data->dev_private; 752 if (priv->sh->bond_dev != UINT16_MAX) 753 /* For bonding port, use primary PCI device. */ 754 eth_dev->device = 755 rte_eth_devices[priv->sh->bond_dev].device; 756 else 757 eth_dev->device = dpdk_dev; 758 eth_dev->dev_ops = &mlx5_dev_sec_ops; 759 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 760 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 761 err = mlx5_proc_priv_init(eth_dev); 762 if (err) 763 return NULL; 764 mp_id.port_id = eth_dev->data->port_id; 765 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 766 /* Receive command fd from primary process */ 767 err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 768 if (err < 0) 769 goto err_secondary; 770 /* Remap UAR for Tx queues. */ 771 err = mlx5_tx_uar_init_secondary(eth_dev, err); 772 if (err) 773 goto err_secondary; 774 /* 775 * Ethdev pointer is still required as input since 776 * the primary device is not accessible from the 777 * secondary process. 778 */ 779 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 780 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 781 return eth_dev; 782 err_secondary: 783 mlx5_dev_close(eth_dev); 784 return NULL; 785 } 786 /* 787 * Some parameters ("tx_db_nc" in particularly) are needed in 788 * advance to create dv/verbs device context. We proceed the 789 * devargs here to get ones, and later proceed devargs again 790 * to override some hardware settings. 791 */ 792 err = mlx5_args(config, dpdk_dev->devargs); 793 if (err) { 794 err = rte_errno; 795 DRV_LOG(ERR, "failed to process device arguments: %s", 796 strerror(rte_errno)); 797 goto error; 798 } 799 if (config->dv_miss_info) { 800 if (switch_info->master || switch_info->representor) 801 config->dv_xmeta_en = MLX5_XMETA_MODE_META16; 802 } 803 mlx5_malloc_mem_select(config->sys_mem_en); 804 sh = mlx5_alloc_shared_dev_ctx(spawn, config); 805 if (!sh) 806 return NULL; 807 config->devx = sh->devx; 808 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 809 config->dest_tir = 1; 810 #endif 811 #ifdef HAVE_IBV_MLX5_MOD_SWP 812 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 813 #endif 814 /* 815 * Multi-packet send is supported by ConnectX-4 Lx PF as well 816 * as all ConnectX-5 devices. 817 */ 818 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 819 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 820 #endif 821 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 822 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 823 #endif 824 mlx5_glue->dv_query_device(sh->ctx, &dv_attr); 825 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 826 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 827 DRV_LOG(DEBUG, "enhanced MPW is supported"); 828 mps = MLX5_MPW_ENHANCED; 829 } else { 830 DRV_LOG(DEBUG, "MPW is supported"); 831 mps = MLX5_MPW; 832 } 833 } else { 834 DRV_LOG(DEBUG, "MPW isn't supported"); 835 mps = MLX5_MPW_DISABLED; 836 } 837 #ifdef HAVE_IBV_MLX5_MOD_SWP 838 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 839 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; 840 DRV_LOG(DEBUG, "SWP support: %u", swp); 841 #endif 842 config->swp = !!swp; 843 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 844 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 845 struct mlx5dv_striding_rq_caps mprq_caps = 846 dv_attr.striding_rq_caps; 847 848 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 849 mprq_caps.min_single_stride_log_num_of_bytes); 850 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 851 mprq_caps.max_single_stride_log_num_of_bytes); 852 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 853 mprq_caps.min_single_wqe_log_num_of_strides); 854 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 855 mprq_caps.max_single_wqe_log_num_of_strides); 856 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 857 mprq_caps.supported_qpts); 858 DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 859 mprq = 1; 860 mprq_min_stride_size_n = 861 mprq_caps.min_single_stride_log_num_of_bytes; 862 mprq_max_stride_size_n = 863 mprq_caps.max_single_stride_log_num_of_bytes; 864 mprq_min_stride_num_n = 865 mprq_caps.min_single_wqe_log_num_of_strides; 866 mprq_max_stride_num_n = 867 mprq_caps.max_single_wqe_log_num_of_strides; 868 } 869 #endif 870 /* Rx CQE compression is enabled by default. */ 871 config->cqe_comp = 1; 872 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 873 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 874 tunnel_en = ((dv_attr.tunnel_offloads_caps & 875 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && 876 (dv_attr.tunnel_offloads_caps & 877 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && 878 (dv_attr.tunnel_offloads_caps & 879 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); 880 } 881 DRV_LOG(DEBUG, "tunnel offloading is %ssupported", 882 tunnel_en ? "" : "not "); 883 #else 884 DRV_LOG(WARNING, 885 "tunnel offloading disabled due to old OFED/rdma-core version"); 886 #endif 887 config->tunnel_en = tunnel_en; 888 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 889 mpls_en = ((dv_attr.tunnel_offloads_caps & 890 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 891 (dv_attr.tunnel_offloads_caps & 892 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 893 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 894 mpls_en ? "" : "not "); 895 #else 896 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 897 " old OFED/rdma-core version or firmware configuration"); 898 #endif 899 config->mpls_en = mpls_en; 900 /* Check port status. */ 901 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); 902 if (err) { 903 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 904 goto error; 905 } 906 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 907 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 908 err = EINVAL; 909 goto error; 910 } 911 if (port_attr.state != IBV_PORT_ACTIVE) 912 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", 913 mlx5_glue->port_state_str(port_attr.state), 914 port_attr.state); 915 /* Allocate private eth device data. */ 916 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 917 sizeof(*priv), 918 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 919 if (priv == NULL) { 920 DRV_LOG(ERR, "priv allocation failure"); 921 err = ENOMEM; 922 goto error; 923 } 924 priv->sh = sh; 925 priv->dev_port = spawn->phys_port; 926 priv->pci_dev = spawn->pci_dev; 927 priv->mtu = RTE_ETHER_MTU; 928 /* Some internal functions rely on Netlink sockets, open them now. */ 929 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); 930 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 931 priv->representor = !!switch_info->representor; 932 priv->master = !!switch_info->master; 933 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 934 priv->vport_meta_tag = 0; 935 priv->vport_meta_mask = 0; 936 priv->pf_bond = spawn->pf_bond; 937 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 938 /* 939 * The DevX port query API is implemented. E-Switch may use 940 * either vport or reg_c[0] metadata register to match on 941 * vport index. The engaged part of metadata register is 942 * defined by mask. 943 */ 944 if (switch_info->representor || switch_info->master) { 945 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | 946 MLX5DV_DEVX_PORT_MATCH_REG_C_0; 947 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, 948 &devx_port); 949 if (err) { 950 DRV_LOG(WARNING, 951 "can't query devx port %d on device %s", 952 spawn->phys_port, 953 mlx5_os_get_dev_device_name(spawn->phys_dev)); 954 devx_port.comp_mask = 0; 955 } 956 } 957 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { 958 priv->vport_meta_tag = devx_port.reg_c_0.value; 959 priv->vport_meta_mask = devx_port.reg_c_0.mask; 960 if (!priv->vport_meta_mask) { 961 DRV_LOG(ERR, "vport zero mask for port %d" 962 " on bonding device %s", 963 spawn->phys_port, 964 mlx5_os_get_dev_device_name 965 (spawn->phys_dev)); 966 err = ENOTSUP; 967 goto error; 968 } 969 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 970 DRV_LOG(ERR, "invalid vport tag for port %d" 971 " on bonding device %s", 972 spawn->phys_port, 973 mlx5_os_get_dev_device_name 974 (spawn->phys_dev)); 975 err = ENOTSUP; 976 goto error; 977 } 978 } 979 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { 980 priv->vport_id = devx_port.vport_num; 981 } else if (spawn->pf_bond >= 0) { 982 DRV_LOG(ERR, "can't deduce vport index for port %d" 983 " on bonding device %s", 984 spawn->phys_port, 985 mlx5_os_get_dev_device_name(spawn->phys_dev)); 986 err = ENOTSUP; 987 goto error; 988 } else { 989 /* Suppose vport index in compatible way. */ 990 priv->vport_id = switch_info->representor ? 991 switch_info->port_name + 1 : -1; 992 } 993 #else 994 /* 995 * Kernel/rdma_core support single E-Switch per PF configurations 996 * only and vport_id field contains the vport index for 997 * associated VF, which is deduced from representor port name. 998 * For example, let's have the IB device port 10, it has 999 * attached network device eth0, which has port name attribute 1000 * pf0vf2, we can deduce the VF number as 2, and set vport index 1001 * as 3 (2+1). This assigning schema should be changed if the 1002 * multiple E-Switch instances per PF configurations or/and PCI 1003 * subfunctions are added. 1004 */ 1005 priv->vport_id = switch_info->representor ? 1006 switch_info->port_name + 1 : -1; 1007 #endif 1008 /* representor_id field keeps the unmodified VF index. */ 1009 priv->representor_id = switch_info->representor ? 1010 switch_info->port_name : -1; 1011 /* 1012 * Look for sibling devices in order to reuse their switch domain 1013 * if any, otherwise allocate one. 1014 */ 1015 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 1016 const struct mlx5_priv *opriv = 1017 rte_eth_devices[port_id].data->dev_private; 1018 1019 if (!opriv || 1020 opriv->sh != priv->sh || 1021 opriv->domain_id == 1022 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1023 continue; 1024 priv->domain_id = opriv->domain_id; 1025 break; 1026 } 1027 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1028 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1029 if (err) { 1030 err = rte_errno; 1031 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1032 strerror(rte_errno)); 1033 goto error; 1034 } 1035 own_domain_id = 1; 1036 } 1037 /* Override some values set by hardware configuration. */ 1038 mlx5_args(config, dpdk_dev->devargs); 1039 err = mlx5_dev_check_sibling_config(priv, config); 1040 if (err) 1041 goto error; 1042 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 1043 IBV_DEVICE_RAW_IP_CSUM); 1044 DRV_LOG(DEBUG, "checksum offloading is %ssupported", 1045 (config->hw_csum ? "" : "not ")); 1046 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 1047 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 1048 DRV_LOG(DEBUG, "counters are not supported"); 1049 #endif 1050 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 1051 if (config->dv_flow_en) { 1052 DRV_LOG(WARNING, "DV flow is not supported"); 1053 config->dv_flow_en = 0; 1054 } 1055 #endif 1056 config->ind_table_max_size = 1057 sh->device_attr.max_rwq_indirection_table_size; 1058 /* 1059 * Remove this check once DPDK supports larger/variable 1060 * indirection tables. 1061 */ 1062 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 1063 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; 1064 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 1065 config->ind_table_max_size); 1066 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 1067 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 1068 DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 1069 (config->hw_vlan_strip ? "" : "not ")); 1070 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 1071 IBV_RAW_PACKET_CAP_SCATTER_FCS); 1072 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 1073 hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 1074 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 1075 hw_padding = !!(sh->device_attr.device_cap_flags_ex & 1076 IBV_DEVICE_PCI_WRITE_END_PADDING); 1077 #endif 1078 if (config->hw_padding && !hw_padding) { 1079 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 1080 config->hw_padding = 0; 1081 } else if (config->hw_padding) { 1082 DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 1083 } 1084 config->tso = (sh->device_attr.max_tso > 0 && 1085 (sh->device_attr.tso_supported_qpts & 1086 (1 << IBV_QPT_RAW_PACKET))); 1087 if (config->tso) 1088 config->tso_max_payload_sz = sh->device_attr.max_tso; 1089 /* 1090 * MPW is disabled by default, while the Enhanced MPW is enabled 1091 * by default. 1092 */ 1093 if (config->mps == MLX5_ARG_UNSET) 1094 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 1095 MLX5_MPW_DISABLED; 1096 else 1097 config->mps = config->mps ? mps : MLX5_MPW_DISABLED; 1098 DRV_LOG(INFO, "%sMPS is %s", 1099 config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 1100 config->mps == MLX5_MPW ? "legacy " : "", 1101 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 1102 if (config->devx) { 1103 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); 1104 if (err) { 1105 err = -err; 1106 goto error; 1107 } 1108 /* Check relax ordering support. */ 1109 if (!haswell_broadwell_cpu) { 1110 sh->cmng.relaxed_ordering_write = 1111 config->hca_attr.relaxed_ordering_write; 1112 sh->cmng.relaxed_ordering_read = 1113 config->hca_attr.relaxed_ordering_read; 1114 } else { 1115 sh->cmng.relaxed_ordering_read = 0; 1116 sh->cmng.relaxed_ordering_write = 0; 1117 } 1118 /* Check for LRO support. */ 1119 if (config->dest_tir && config->hca_attr.lro_cap && 1120 config->dv_flow_en) { 1121 /* TBD check tunnel lro caps. */ 1122 config->lro.supported = config->hca_attr.lro_cap; 1123 DRV_LOG(DEBUG, "Device supports LRO"); 1124 /* 1125 * If LRO timeout is not configured by application, 1126 * use the minimal supported value. 1127 */ 1128 if (!config->lro.timeout) 1129 config->lro.timeout = 1130 config->hca_attr.lro_timer_supported_periods[0]; 1131 DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 1132 config->lro.timeout); 1133 DRV_LOG(DEBUG, "LRO minimal size of TCP segment " 1134 "required for coalescing is %d bytes", 1135 config->hca_attr.lro_min_mss_size); 1136 } 1137 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) 1138 if (config->hca_attr.qos.sup && 1139 config->hca_attr.qos.flow_meter_old && 1140 config->dv_flow_en) { 1141 uint8_t reg_c_mask = 1142 config->hca_attr.qos.flow_meter_reg_c_ids; 1143 /* 1144 * Meter needs two REG_C's for color match and pre-sfx 1145 * flow match. Here get the REG_C for color match. 1146 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1147 */ 1148 reg_c_mask &= 0xfc; 1149 if (__builtin_popcount(reg_c_mask) < 1) { 1150 priv->mtr_en = 0; 1151 DRV_LOG(WARNING, "No available register for" 1152 " meter."); 1153 } else { 1154 /* 1155 * The meter color register is used by the 1156 * flow-hit feature as well. 1157 * The flow-hit feature must use REG_C_3 1158 * Prefer REG_C_3 if it is available. 1159 */ 1160 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 1161 priv->mtr_color_reg = REG_C_3; 1162 else 1163 priv->mtr_color_reg = ffs(reg_c_mask) 1164 - 1 + REG_C_0; 1165 priv->mtr_en = 1; 1166 priv->mtr_reg_share = 1167 config->hca_attr.qos.flow_meter; 1168 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1169 priv->mtr_color_reg); 1170 } 1171 } 1172 #endif 1173 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1174 if (config->hca_attr.flow_hit_aso && 1175 priv->mtr_color_reg == REG_C_3) { 1176 sh->flow_hit_aso_en = 1; 1177 err = mlx5_flow_aso_age_mng_init(sh); 1178 if (err) { 1179 err = -err; 1180 goto error; 1181 } 1182 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1183 } 1184 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1185 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1186 if (config->hca_attr.log_max_ft_sampler_num > 0 && 1187 config->dv_flow_en) { 1188 priv->sampler_en = 1; 1189 DRV_LOG(DEBUG, "The Sampler enabled!\n"); 1190 } else { 1191 priv->sampler_en = 0; 1192 if (!config->hca_attr.log_max_ft_sampler_num) 1193 DRV_LOG(WARNING, "No available register for" 1194 " Sampler."); 1195 else 1196 DRV_LOG(DEBUG, "DV flow is not supported!\n"); 1197 } 1198 #endif 1199 } 1200 if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 && 1201 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) { 1202 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported"); 1203 config->cqe_comp = 0; 1204 } 1205 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX && 1206 (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) { 1207 DRV_LOG(WARNING, "Flow Tag CQE compression" 1208 " format isn't supported."); 1209 config->cqe_comp = 0; 1210 } 1211 if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX && 1212 (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) { 1213 DRV_LOG(WARNING, "L3/L4 Header CQE compression" 1214 " format isn't supported."); 1215 config->cqe_comp = 0; 1216 } 1217 DRV_LOG(DEBUG, "Rx CQE compression is %ssupported", 1218 config->cqe_comp ? "" : "not "); 1219 if (config->tx_pp) { 1220 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 1221 config->hca_attr.dev_freq_khz); 1222 DRV_LOG(DEBUG, "Packet pacing is %ssupported", 1223 config->hca_attr.qos.packet_pacing ? "" : "not "); 1224 DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 1225 config->hca_attr.cross_channel ? "" : "not "); 1226 DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 1227 config->hca_attr.wqe_index_ignore ? "" : "not "); 1228 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 1229 config->hca_attr.non_wire_sq ? "" : "not "); 1230 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 1231 config->hca_attr.log_max_static_sq_wq ? "" : "not ", 1232 config->hca_attr.log_max_static_sq_wq); 1233 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 1234 config->hca_attr.qos.wqe_rate_pp ? "" : "not "); 1235 if (!config->devx) { 1236 DRV_LOG(ERR, "DevX is required for packet pacing"); 1237 err = ENODEV; 1238 goto error; 1239 } 1240 if (!config->hca_attr.qos.packet_pacing) { 1241 DRV_LOG(ERR, "Packet pacing is not supported"); 1242 err = ENODEV; 1243 goto error; 1244 } 1245 if (!config->hca_attr.cross_channel) { 1246 DRV_LOG(ERR, "Cross channel operations are" 1247 " required for packet pacing"); 1248 err = ENODEV; 1249 goto error; 1250 } 1251 if (!config->hca_attr.wqe_index_ignore) { 1252 DRV_LOG(ERR, "WQE index ignore feature is" 1253 " required for packet pacing"); 1254 err = ENODEV; 1255 goto error; 1256 } 1257 if (!config->hca_attr.non_wire_sq) { 1258 DRV_LOG(ERR, "Non-wire SQ feature is" 1259 " required for packet pacing"); 1260 err = ENODEV; 1261 goto error; 1262 } 1263 if (!config->hca_attr.log_max_static_sq_wq) { 1264 DRV_LOG(ERR, "Static WQE SQ feature is" 1265 " required for packet pacing"); 1266 err = ENODEV; 1267 goto error; 1268 } 1269 if (!config->hca_attr.qos.wqe_rate_pp) { 1270 DRV_LOG(ERR, "WQE rate mode is required" 1271 " for packet pacing"); 1272 err = ENODEV; 1273 goto error; 1274 } 1275 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 1276 DRV_LOG(ERR, "DevX does not provide UAR offset," 1277 " can't create queues for packet pacing"); 1278 err = ENODEV; 1279 goto error; 1280 #endif 1281 } 1282 if (config->devx) { 1283 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 1284 1285 err = config->hca_attr.access_register_user ? 1286 mlx5_devx_cmd_register_read 1287 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 1288 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; 1289 if (!err) { 1290 uint32_t ts_mode; 1291 1292 /* MTUTC register is read successfully. */ 1293 ts_mode = MLX5_GET(register_mtutc, reg, 1294 time_stamp_mode); 1295 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 1296 config->rt_timestamp = 1; 1297 } else { 1298 /* Kernel does not support register reading. */ 1299 if (config->hca_attr.dev_freq_khz == 1300 (NS_PER_S / MS_PER_S)) 1301 config->rt_timestamp = 1; 1302 } 1303 } 1304 /* 1305 * If HW has bug working with tunnel packet decapsulation and 1306 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 1307 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 1308 */ 1309 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en) 1310 config->hw_fcs_strip = 0; 1311 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 1312 (config->hw_fcs_strip ? "" : "not ")); 1313 if (config->mprq.enabled && mprq) { 1314 if (config->mprq.stride_num_n && 1315 (config->mprq.stride_num_n > mprq_max_stride_num_n || 1316 config->mprq.stride_num_n < mprq_min_stride_num_n)) { 1317 config->mprq.stride_num_n = 1318 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, 1319 mprq_min_stride_num_n), 1320 mprq_max_stride_num_n); 1321 DRV_LOG(WARNING, 1322 "the number of strides" 1323 " for Multi-Packet RQ is out of range," 1324 " setting default value (%u)", 1325 1 << config->mprq.stride_num_n); 1326 } 1327 if (config->mprq.stride_size_n && 1328 (config->mprq.stride_size_n > mprq_max_stride_size_n || 1329 config->mprq.stride_size_n < mprq_min_stride_size_n)) { 1330 config->mprq.stride_size_n = 1331 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, 1332 mprq_min_stride_size_n), 1333 mprq_max_stride_size_n); 1334 DRV_LOG(WARNING, 1335 "the size of a stride" 1336 " for Multi-Packet RQ is out of range," 1337 " setting default value (%u)", 1338 1 << config->mprq.stride_size_n); 1339 } 1340 config->mprq.min_stride_size_n = mprq_min_stride_size_n; 1341 config->mprq.max_stride_size_n = mprq_max_stride_size_n; 1342 } else if (config->mprq.enabled && !mprq) { 1343 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 1344 config->mprq.enabled = 0; 1345 } 1346 if (config->max_dump_files_num == 0) 1347 config->max_dump_files_num = 128; 1348 eth_dev = rte_eth_dev_allocate(name); 1349 if (eth_dev == NULL) { 1350 DRV_LOG(ERR, "can not allocate rte ethdev"); 1351 err = ENOMEM; 1352 goto error; 1353 } 1354 if (priv->representor) { 1355 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1356 eth_dev->data->representor_id = priv->representor_id; 1357 } 1358 priv->mp_id.port_id = eth_dev->data->port_id; 1359 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1360 /* 1361 * Store associated network device interface index. This index 1362 * is permanent throughout the lifetime of device. So, we may store 1363 * the ifindex here and use the cached value further. 1364 */ 1365 MLX5_ASSERT(spawn->ifindex); 1366 priv->if_index = spawn->ifindex; 1367 if (priv->pf_bond >= 0 && priv->master) { 1368 /* Get bond interface info */ 1369 err = mlx5_sysfs_bond_info(priv->if_index, 1370 &priv->bond_ifindex, 1371 priv->bond_name); 1372 if (err) 1373 DRV_LOG(ERR, "unable to get bond info: %s", 1374 strerror(rte_errno)); 1375 else 1376 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1377 priv->if_index, priv->bond_ifindex, 1378 priv->bond_name); 1379 } 1380 eth_dev->data->dev_private = priv; 1381 priv->dev_data = eth_dev->data; 1382 eth_dev->data->mac_addrs = priv->mac; 1383 if (spawn->pf_bond < 0) { 1384 eth_dev->device = dpdk_dev; 1385 } else { 1386 /* Use primary bond PCI as device. */ 1387 if (sh->bond_dev == UINT16_MAX) { 1388 sh->bond_dev = eth_dev->data->port_id; 1389 eth_dev->device = dpdk_dev; 1390 } else { 1391 eth_dev->device = rte_eth_devices[sh->bond_dev].device; 1392 } 1393 } 1394 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1395 /* Configure the first MAC address by default. */ 1396 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1397 DRV_LOG(ERR, 1398 "port %u cannot get MAC address, is mlx5_en" 1399 " loaded? (errno: %s)", 1400 eth_dev->data->port_id, strerror(rte_errno)); 1401 err = ENODEV; 1402 goto error; 1403 } 1404 DRV_LOG(INFO, 1405 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 1406 eth_dev->data->port_id, 1407 mac.addr_bytes[0], mac.addr_bytes[1], 1408 mac.addr_bytes[2], mac.addr_bytes[3], 1409 mac.addr_bytes[4], mac.addr_bytes[5]); 1410 #ifdef RTE_LIBRTE_MLX5_DEBUG 1411 { 1412 char ifname[MLX5_NAMESIZE]; 1413 1414 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1415 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1416 eth_dev->data->port_id, ifname); 1417 else 1418 DRV_LOG(DEBUG, "port %u ifname is unknown", 1419 eth_dev->data->port_id); 1420 } 1421 #endif 1422 /* Get actual MTU if possible. */ 1423 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1424 if (err) { 1425 err = rte_errno; 1426 goto error; 1427 } 1428 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1429 priv->mtu); 1430 /* Initialize burst functions to prevent crashes before link-up. */ 1431 eth_dev->rx_pkt_burst = removed_rx_burst; 1432 eth_dev->tx_pkt_burst = removed_tx_burst; 1433 eth_dev->dev_ops = &mlx5_dev_ops; 1434 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1435 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1436 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1437 /* Register MAC address. */ 1438 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1439 if (config->vf && config->vf_nl_en) 1440 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1441 mlx5_ifindex(eth_dev), 1442 eth_dev->data->mac_addrs, 1443 MLX5_MAX_MAC_ADDRESSES); 1444 priv->flows = 0; 1445 priv->ctrl_flows = 0; 1446 rte_spinlock_init(&priv->flow_list_lock); 1447 TAILQ_INIT(&priv->flow_meters); 1448 TAILQ_INIT(&priv->flow_meter_profiles); 1449 /* Hint libmlx5 to use PMD allocator for data plane resources */ 1450 mlx5_glue->dv_set_context_attr(sh->ctx, 1451 MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 1452 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 1453 .alloc = &mlx5_alloc_verbs_buf, 1454 .free = &mlx5_free_verbs_buf, 1455 .data = sh, 1456 })); 1457 /* Bring Ethernet device up. */ 1458 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1459 eth_dev->data->port_id); 1460 mlx5_set_link_up(eth_dev); 1461 /* 1462 * Even though the interrupt handler is not installed yet, 1463 * interrupts will still trigger on the async_fd from 1464 * Verbs context returned by ibv_open_device(). 1465 */ 1466 mlx5_link_update(eth_dev, 0); 1467 #ifdef HAVE_MLX5DV_DR_ESWITCH 1468 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && 1469 (switch_info->representor || switch_info->master))) 1470 config->dv_esw_en = 0; 1471 #else 1472 config->dv_esw_en = 0; 1473 #endif 1474 /* Detect minimal data bytes to inline. */ 1475 mlx5_set_min_inline(spawn, config); 1476 /* Store device configuration on private structure. */ 1477 priv->config = *config; 1478 /* Create context for virtual machine VLAN workaround. */ 1479 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1480 if (config->dv_flow_en) { 1481 err = mlx5_alloc_shared_dr(priv); 1482 if (err) 1483 goto error; 1484 } 1485 if (config->devx && config->dv_flow_en && config->dest_tir) { 1486 priv->obj_ops = devx_obj_ops; 1487 priv->obj_ops.drop_action_create = 1488 ibv_obj_ops.drop_action_create; 1489 priv->obj_ops.drop_action_destroy = 1490 ibv_obj_ops.drop_action_destroy; 1491 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 1492 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify; 1493 #else 1494 if (config->dv_esw_en) 1495 priv->obj_ops.txq_obj_modify = 1496 ibv_obj_ops.txq_obj_modify; 1497 #endif 1498 /* Use specific wrappers for Tx object. */ 1499 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new; 1500 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release; 1501 1502 } else { 1503 priv->obj_ops = ibv_obj_ops; 1504 } 1505 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1506 if (!priv->drop_queue.hrxq) 1507 goto error; 1508 /* Supported Verbs flow priority number detection. */ 1509 err = mlx5_flow_discover_priorities(eth_dev); 1510 if (err < 0) { 1511 err = -err; 1512 goto error; 1513 } 1514 priv->config.flow_prio = err; 1515 if (!priv->config.dv_esw_en && 1516 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1517 DRV_LOG(WARNING, "metadata mode %u is not supported " 1518 "(no E-Switch)", priv->config.dv_xmeta_en); 1519 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 1520 } 1521 mlx5_set_metadata_mask(eth_dev); 1522 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1523 !priv->sh->dv_regc0_mask) { 1524 DRV_LOG(ERR, "metadata mode %u is not supported " 1525 "(no metadata reg_c[0] is available)", 1526 priv->config.dv_xmeta_en); 1527 err = ENOTSUP; 1528 goto error; 1529 } 1530 mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev, 1531 mlx5_hrxq_create_cb, 1532 mlx5_hrxq_match_cb, 1533 mlx5_hrxq_remove_cb); 1534 /* Query availability of metadata reg_c's. */ 1535 err = mlx5_flow_discover_mreg_c(eth_dev); 1536 if (err < 0) { 1537 err = -err; 1538 goto error; 1539 } 1540 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1541 DRV_LOG(DEBUG, 1542 "port %u extensive metadata register is not supported", 1543 eth_dev->data->port_id); 1544 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1545 DRV_LOG(ERR, "metadata mode %u is not supported " 1546 "(no metadata registers available)", 1547 priv->config.dv_xmeta_en); 1548 err = ENOTSUP; 1549 goto error; 1550 } 1551 } 1552 if (priv->config.dv_flow_en && 1553 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1554 mlx5_flow_ext_mreg_supported(eth_dev) && 1555 priv->sh->dv_regc0_mask) { 1556 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1557 MLX5_FLOW_MREG_HTABLE_SZ, 1558 0, 0, 1559 flow_dv_mreg_create_cb, 1560 flow_dv_mreg_match_cb, 1561 flow_dv_mreg_remove_cb); 1562 if (!priv->mreg_cp_tbl) { 1563 err = ENOMEM; 1564 goto error; 1565 } 1566 priv->mreg_cp_tbl->ctx = eth_dev; 1567 } 1568 rte_spinlock_init(&priv->shared_act_sl); 1569 mlx5_flow_counter_mode_config(eth_dev); 1570 if (priv->config.dv_flow_en) 1571 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1572 return eth_dev; 1573 error: 1574 if (priv) { 1575 if (priv->mreg_cp_tbl) 1576 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1577 if (priv->sh) 1578 mlx5_os_free_shared_dr(priv); 1579 if (priv->nl_socket_route >= 0) 1580 close(priv->nl_socket_route); 1581 if (priv->nl_socket_rdma >= 0) 1582 close(priv->nl_socket_rdma); 1583 if (priv->vmwa_context) 1584 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1585 if (eth_dev && priv->drop_queue.hrxq) 1586 mlx5_drop_action_destroy(eth_dev); 1587 if (own_domain_id) 1588 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1589 mlx5_cache_list_destroy(&priv->hrxqs); 1590 mlx5_free(priv); 1591 if (eth_dev != NULL) 1592 eth_dev->data->dev_private = NULL; 1593 } 1594 if (eth_dev != NULL) { 1595 /* mac_addrs must not be freed alone because part of 1596 * dev_private 1597 **/ 1598 eth_dev->data->mac_addrs = NULL; 1599 rte_eth_dev_release_port(eth_dev); 1600 } 1601 if (sh) 1602 mlx5_free_shared_dev_ctx(sh); 1603 MLX5_ASSERT(err > 0); 1604 rte_errno = err; 1605 return NULL; 1606 } 1607 1608 /** 1609 * Comparison callback to sort device data. 1610 * 1611 * This is meant to be used with qsort(). 1612 * 1613 * @param a[in] 1614 * Pointer to pointer to first data object. 1615 * @param b[in] 1616 * Pointer to pointer to second data object. 1617 * 1618 * @return 1619 * 0 if both objects are equal, less than 0 if the first argument is less 1620 * than the second, greater than 0 otherwise. 1621 */ 1622 static int 1623 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1624 { 1625 const struct mlx5_switch_info *si_a = 1626 &((const struct mlx5_dev_spawn_data *)a)->info; 1627 const struct mlx5_switch_info *si_b = 1628 &((const struct mlx5_dev_spawn_data *)b)->info; 1629 int ret; 1630 1631 /* Master device first. */ 1632 ret = si_b->master - si_a->master; 1633 if (ret) 1634 return ret; 1635 /* Then representor devices. */ 1636 ret = si_b->representor - si_a->representor; 1637 if (ret) 1638 return ret; 1639 /* Unidentified devices come last in no specific order. */ 1640 if (!si_a->representor) 1641 return 0; 1642 /* Order representors by name. */ 1643 return si_a->port_name - si_b->port_name; 1644 } 1645 1646 /** 1647 * Match PCI information for possible slaves of bonding device. 1648 * 1649 * @param[in] ibv_dev 1650 * Pointer to Infiniband device structure. 1651 * @param[in] pci_dev 1652 * Pointer to PCI device structure to match PCI address. 1653 * @param[in] nl_rdma 1654 * Netlink RDMA group socket handle. 1655 * 1656 * @return 1657 * negative value if no bonding device found, otherwise 1658 * positive index of slave PF in bonding. 1659 */ 1660 static int 1661 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, 1662 const struct rte_pci_device *pci_dev, 1663 int nl_rdma) 1664 { 1665 char ifname[IF_NAMESIZE + 1]; 1666 unsigned int ifindex; 1667 unsigned int np, i; 1668 FILE *file = NULL; 1669 int pf = -1; 1670 1671 /* 1672 * Try to get master device name. If something goes 1673 * wrong suppose the lack of kernel support and no 1674 * bonding devices. 1675 */ 1676 if (nl_rdma < 0) 1677 return -1; 1678 if (!strstr(ibv_dev->name, "bond")) 1679 return -1; 1680 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); 1681 if (!np) 1682 return -1; 1683 /* 1684 * The Master device might not be on the predefined 1685 * port (not on port index 1, it is not garanted), 1686 * we have to scan all Infiniband device port and 1687 * find master. 1688 */ 1689 for (i = 1; i <= np; ++i) { 1690 /* Check whether Infiniband port is populated. */ 1691 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); 1692 if (!ifindex) 1693 continue; 1694 if (!if_indextoname(ifindex, ifname)) 1695 continue; 1696 /* Try to read bonding slave names from sysfs. */ 1697 MKSTR(slaves, 1698 "/sys/class/net/%s/master/bonding/slaves", ifname); 1699 file = fopen(slaves, "r"); 1700 if (file) 1701 break; 1702 } 1703 if (!file) 1704 return -1; 1705 /* Use safe format to check maximal buffer length. */ 1706 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1707 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1708 char tmp_str[IF_NAMESIZE + 32]; 1709 struct rte_pci_addr pci_addr; 1710 struct mlx5_switch_info info; 1711 1712 /* Process slave interface names in the loop. */ 1713 snprintf(tmp_str, sizeof(tmp_str), 1714 "/sys/class/net/%s", ifname); 1715 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { 1716 DRV_LOG(WARNING, "can not get PCI address" 1717 " for netdev \"%s\"", ifname); 1718 continue; 1719 } 1720 if (pci_dev->addr.domain != pci_addr.domain || 1721 pci_dev->addr.bus != pci_addr.bus || 1722 pci_dev->addr.devid != pci_addr.devid || 1723 pci_dev->addr.function != pci_addr.function) 1724 continue; 1725 /* Slave interface PCI address match found. */ 1726 fclose(file); 1727 snprintf(tmp_str, sizeof(tmp_str), 1728 "/sys/class/net/%s/phys_port_name", ifname); 1729 file = fopen(tmp_str, "rb"); 1730 if (!file) 1731 break; 1732 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1733 if (fscanf(file, "%32s", tmp_str) == 1) 1734 mlx5_translate_port_name(tmp_str, &info); 1735 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || 1736 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1737 pf = info.port_name; 1738 break; 1739 } 1740 if (file) 1741 fclose(file); 1742 return pf; 1743 } 1744 1745 /** 1746 * DPDK callback to register a PCI device. 1747 * 1748 * This function spawns Ethernet devices out of a given PCI device. 1749 * 1750 * @param[in] pci_drv 1751 * PCI driver structure (mlx5_driver). 1752 * @param[in] pci_dev 1753 * PCI device information. 1754 * 1755 * @return 1756 * 0 on success, a negative errno value otherwise and rte_errno is set. 1757 */ 1758 int 1759 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1760 struct rte_pci_device *pci_dev) 1761 { 1762 struct ibv_device **ibv_list; 1763 /* 1764 * Number of found IB Devices matching with requested PCI BDF. 1765 * nd != 1 means there are multiple IB devices over the same 1766 * PCI device and we have representors and master. 1767 */ 1768 unsigned int nd = 0; 1769 /* 1770 * Number of found IB device Ports. nd = 1 and np = 1..n means 1771 * we have the single multiport IB device, and there may be 1772 * representors attached to some of found ports. 1773 */ 1774 unsigned int np = 0; 1775 /* 1776 * Number of DPDK ethernet devices to Spawn - either over 1777 * multiple IB devices or multiple ports of single IB device. 1778 * Actually this is the number of iterations to spawn. 1779 */ 1780 unsigned int ns = 0; 1781 /* 1782 * Bonding device 1783 * < 0 - no bonding device (single one) 1784 * >= 0 - bonding device (value is slave PF index) 1785 */ 1786 int bd = -1; 1787 struct mlx5_dev_spawn_data *list = NULL; 1788 struct mlx5_dev_config dev_config; 1789 unsigned int dev_config_vf; 1790 int ret; 1791 1792 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1793 mlx5_pmd_socket_init(); 1794 ret = mlx5_init_once(); 1795 if (ret) { 1796 DRV_LOG(ERR, "unable to init PMD global data: %s", 1797 strerror(rte_errno)); 1798 return -rte_errno; 1799 } 1800 errno = 0; 1801 ibv_list = mlx5_glue->get_device_list(&ret); 1802 if (!ibv_list) { 1803 rte_errno = errno ? errno : ENOSYS; 1804 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 1805 return -rte_errno; 1806 } 1807 /* 1808 * First scan the list of all Infiniband devices to find 1809 * matching ones, gathering into the list. 1810 */ 1811 struct ibv_device *ibv_match[ret + 1]; 1812 int nl_route = mlx5_nl_init(NETLINK_ROUTE); 1813 int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 1814 unsigned int i; 1815 1816 while (ret-- > 0) { 1817 struct rte_pci_addr pci_addr; 1818 1819 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); 1820 bd = mlx5_device_bond_pci_match 1821 (ibv_list[ret], pci_dev, nl_rdma); 1822 if (bd >= 0) { 1823 /* 1824 * Bonding device detected. Only one match is allowed, 1825 * the bonding is supported over multi-port IB device, 1826 * there should be no matches on representor PCI 1827 * functions or non VF LAG bonding devices with 1828 * specified address. 1829 */ 1830 if (nd) { 1831 DRV_LOG(ERR, 1832 "multiple PCI match on bonding device" 1833 "\"%s\" found", ibv_list[ret]->name); 1834 rte_errno = ENOENT; 1835 ret = -rte_errno; 1836 goto exit; 1837 } 1838 DRV_LOG(INFO, "PCI information matches for" 1839 " slave %d bonding device \"%s\"", 1840 bd, ibv_list[ret]->name); 1841 ibv_match[nd++] = ibv_list[ret]; 1842 break; 1843 } 1844 if (mlx5_dev_to_pci_addr 1845 (ibv_list[ret]->ibdev_path, &pci_addr)) 1846 continue; 1847 if (pci_dev->addr.domain != pci_addr.domain || 1848 pci_dev->addr.bus != pci_addr.bus || 1849 pci_dev->addr.devid != pci_addr.devid || 1850 pci_dev->addr.function != pci_addr.function) 1851 continue; 1852 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 1853 ibv_list[ret]->name); 1854 ibv_match[nd++] = ibv_list[ret]; 1855 } 1856 ibv_match[nd] = NULL; 1857 if (!nd) { 1858 /* No device matches, just complain and bail out. */ 1859 DRV_LOG(WARNING, 1860 "no Verbs device matches PCI device " PCI_PRI_FMT "," 1861 " are kernel drivers loaded?", 1862 pci_dev->addr.domain, pci_dev->addr.bus, 1863 pci_dev->addr.devid, pci_dev->addr.function); 1864 rte_errno = ENOENT; 1865 ret = -rte_errno; 1866 goto exit; 1867 } 1868 if (nd == 1) { 1869 /* 1870 * Found single matching device may have multiple ports. 1871 * Each port may be representor, we have to check the port 1872 * number and check the representors existence. 1873 */ 1874 if (nl_rdma >= 0) 1875 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 1876 if (!np) 1877 DRV_LOG(WARNING, "can not get IB device \"%s\"" 1878 " ports number", ibv_match[0]->name); 1879 if (bd >= 0 && !np) { 1880 DRV_LOG(ERR, "can not get ports" 1881 " for bonding device"); 1882 rte_errno = ENOENT; 1883 ret = -rte_errno; 1884 goto exit; 1885 } 1886 } 1887 #ifndef HAVE_MLX5DV_DR_DEVX_PORT 1888 if (bd >= 0) { 1889 /* 1890 * This may happen if there is VF LAG kernel support and 1891 * application is compiled with older rdma_core library. 1892 */ 1893 DRV_LOG(ERR, 1894 "No kernel/verbs support for VF LAG bonding found."); 1895 rte_errno = ENOTSUP; 1896 ret = -rte_errno; 1897 goto exit; 1898 } 1899 #endif 1900 /* 1901 * Now we can determine the maximal 1902 * amount of devices to be spawned. 1903 */ 1904 list = mlx5_malloc(MLX5_MEM_ZERO, 1905 sizeof(struct mlx5_dev_spawn_data) * 1906 (np ? np : nd), 1907 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1908 if (!list) { 1909 DRV_LOG(ERR, "spawn data array allocation failure"); 1910 rte_errno = ENOMEM; 1911 ret = -rte_errno; 1912 goto exit; 1913 } 1914 if (bd >= 0 || np > 1) { 1915 /* 1916 * Single IB device with multiple ports found, 1917 * it may be E-Switch master device and representors. 1918 * We have to perform identification through the ports. 1919 */ 1920 MLX5_ASSERT(nl_rdma >= 0); 1921 MLX5_ASSERT(ns == 0); 1922 MLX5_ASSERT(nd == 1); 1923 MLX5_ASSERT(np); 1924 for (i = 1; i <= np; ++i) { 1925 list[ns].max_port = np; 1926 list[ns].phys_port = i; 1927 list[ns].phys_dev = ibv_match[0]; 1928 list[ns].eth_dev = NULL; 1929 list[ns].pci_dev = pci_dev; 1930 list[ns].pf_bond = bd; 1931 list[ns].ifindex = mlx5_nl_ifindex 1932 (nl_rdma, 1933 mlx5_os_get_dev_device_name 1934 (list[ns].phys_dev), i); 1935 if (!list[ns].ifindex) { 1936 /* 1937 * No network interface index found for the 1938 * specified port, it means there is no 1939 * representor on this port. It's OK, 1940 * there can be disabled ports, for example 1941 * if sriov_numvfs < sriov_totalvfs. 1942 */ 1943 continue; 1944 } 1945 ret = -1; 1946 if (nl_route >= 0) 1947 ret = mlx5_nl_switch_info 1948 (nl_route, 1949 list[ns].ifindex, 1950 &list[ns].info); 1951 if (ret || (!list[ns].info.representor && 1952 !list[ns].info.master)) { 1953 /* 1954 * We failed to recognize representors with 1955 * Netlink, let's try to perform the task 1956 * with sysfs. 1957 */ 1958 ret = mlx5_sysfs_switch_info 1959 (list[ns].ifindex, 1960 &list[ns].info); 1961 } 1962 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 1963 if (!ret && bd >= 0) { 1964 switch (list[ns].info.name_type) { 1965 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 1966 if (list[ns].info.port_name == bd) 1967 ns++; 1968 break; 1969 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1970 /* Fallthrough */ 1971 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 1972 if (list[ns].info.pf_num == bd) 1973 ns++; 1974 break; 1975 default: 1976 break; 1977 } 1978 continue; 1979 } 1980 #endif 1981 if (!ret && (list[ns].info.representor ^ 1982 list[ns].info.master)) 1983 ns++; 1984 } 1985 if (!ns) { 1986 DRV_LOG(ERR, 1987 "unable to recognize master/representors" 1988 " on the IB device with multiple ports"); 1989 rte_errno = ENOENT; 1990 ret = -rte_errno; 1991 goto exit; 1992 } 1993 } else { 1994 /* 1995 * The existence of several matching entries (nd > 1) means 1996 * port representors have been instantiated. No existing Verbs 1997 * call nor sysfs entries can tell them apart, this can only 1998 * be done through Netlink calls assuming kernel drivers are 1999 * recent enough to support them. 2000 * 2001 * In the event of identification failure through Netlink, 2002 * try again through sysfs, then: 2003 * 2004 * 1. A single IB device matches (nd == 1) with single 2005 * port (np=0/1) and is not a representor, assume 2006 * no switch support. 2007 * 2008 * 2. Otherwise no safe assumptions can be made; 2009 * complain louder and bail out. 2010 */ 2011 for (i = 0; i != nd; ++i) { 2012 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2013 list[ns].max_port = 1; 2014 list[ns].phys_port = 1; 2015 list[ns].phys_dev = ibv_match[i]; 2016 list[ns].eth_dev = NULL; 2017 list[ns].pci_dev = pci_dev; 2018 list[ns].pf_bond = -1; 2019 list[ns].ifindex = 0; 2020 if (nl_rdma >= 0) 2021 list[ns].ifindex = mlx5_nl_ifindex 2022 (nl_rdma, 2023 mlx5_os_get_dev_device_name 2024 (list[ns].phys_dev), 1); 2025 if (!list[ns].ifindex) { 2026 char ifname[IF_NAMESIZE]; 2027 2028 /* 2029 * Netlink failed, it may happen with old 2030 * ib_core kernel driver (before 4.16). 2031 * We can assume there is old driver because 2032 * here we are processing single ports IB 2033 * devices. Let's try sysfs to retrieve 2034 * the ifindex. The method works for 2035 * master device only. 2036 */ 2037 if (nd > 1) { 2038 /* 2039 * Multiple devices found, assume 2040 * representors, can not distinguish 2041 * master/representor and retrieve 2042 * ifindex via sysfs. 2043 */ 2044 continue; 2045 } 2046 ret = mlx5_get_ifname_sysfs 2047 (ibv_match[i]->ibdev_path, ifname); 2048 if (!ret) 2049 list[ns].ifindex = 2050 if_nametoindex(ifname); 2051 if (!list[ns].ifindex) { 2052 /* 2053 * No network interface index found 2054 * for the specified device, it means 2055 * there it is neither representor 2056 * nor master. 2057 */ 2058 continue; 2059 } 2060 } 2061 ret = -1; 2062 if (nl_route >= 0) 2063 ret = mlx5_nl_switch_info 2064 (nl_route, 2065 list[ns].ifindex, 2066 &list[ns].info); 2067 if (ret || (!list[ns].info.representor && 2068 !list[ns].info.master)) { 2069 /* 2070 * We failed to recognize representors with 2071 * Netlink, let's try to perform the task 2072 * with sysfs. 2073 */ 2074 ret = mlx5_sysfs_switch_info 2075 (list[ns].ifindex, 2076 &list[ns].info); 2077 } 2078 if (!ret && (list[ns].info.representor ^ 2079 list[ns].info.master)) { 2080 ns++; 2081 } else if ((nd == 1) && 2082 !list[ns].info.representor && 2083 !list[ns].info.master) { 2084 /* 2085 * Single IB device with 2086 * one physical port and 2087 * attached network device. 2088 * May be SRIOV is not enabled 2089 * or there is no representors. 2090 */ 2091 DRV_LOG(INFO, "no E-Switch support detected"); 2092 ns++; 2093 break; 2094 } 2095 } 2096 if (!ns) { 2097 DRV_LOG(ERR, 2098 "unable to recognize master/representors" 2099 " on the multiple IB devices"); 2100 rte_errno = ENOENT; 2101 ret = -rte_errno; 2102 goto exit; 2103 } 2104 } 2105 MLX5_ASSERT(ns); 2106 /* 2107 * Sort list to probe devices in natural order for users convenience 2108 * (i.e. master first, then representors from lowest to highest ID). 2109 */ 2110 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2111 /* Device specific configuration. */ 2112 switch (pci_dev->id.device_id) { 2113 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 2114 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 2115 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 2116 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 2117 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 2118 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 2119 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF: 2120 dev_config_vf = 1; 2121 break; 2122 default: 2123 dev_config_vf = 0; 2124 break; 2125 } 2126 for (i = 0; i != ns; ++i) { 2127 uint32_t restore; 2128 2129 /* Default configuration. */ 2130 memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); 2131 dev_config.vf = dev_config_vf; 2132 dev_config.mps = MLX5_ARG_UNSET; 2133 dev_config.dbnc = MLX5_ARG_UNSET; 2134 dev_config.rx_vec_en = 1; 2135 dev_config.txq_inline_max = MLX5_ARG_UNSET; 2136 dev_config.txq_inline_min = MLX5_ARG_UNSET; 2137 dev_config.txq_inline_mpw = MLX5_ARG_UNSET; 2138 dev_config.txqs_inline = MLX5_ARG_UNSET; 2139 dev_config.vf_nl_en = 1; 2140 dev_config.mr_ext_memseg_en = 1; 2141 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 2142 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 2143 dev_config.dv_esw_en = 1; 2144 dev_config.dv_flow_en = 1; 2145 dev_config.decap_en = 1; 2146 dev_config.log_hp_size = MLX5_ARG_UNSET; 2147 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, 2148 &list[i], 2149 &dev_config); 2150 if (!list[i].eth_dev) { 2151 if (rte_errno != EBUSY && rte_errno != EEXIST) 2152 break; 2153 /* Device is disabled or already spawned. Ignore it. */ 2154 continue; 2155 } 2156 restore = list[i].eth_dev->data->dev_flags; 2157 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2158 /* Restore non-PCI flags cleared by the above call. */ 2159 list[i].eth_dev->data->dev_flags |= restore; 2160 rte_eth_dev_probing_finish(list[i].eth_dev); 2161 } 2162 if (i != ns) { 2163 DRV_LOG(ERR, 2164 "probe of PCI device " PCI_PRI_FMT " aborted after" 2165 " encountering an error: %s", 2166 pci_dev->addr.domain, pci_dev->addr.bus, 2167 pci_dev->addr.devid, pci_dev->addr.function, 2168 strerror(rte_errno)); 2169 ret = -rte_errno; 2170 /* Roll back. */ 2171 while (i--) { 2172 if (!list[i].eth_dev) 2173 continue; 2174 mlx5_dev_close(list[i].eth_dev); 2175 /* mac_addrs must not be freed because in dev_private */ 2176 list[i].eth_dev->data->mac_addrs = NULL; 2177 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2178 } 2179 /* Restore original error. */ 2180 rte_errno = -ret; 2181 } else { 2182 ret = 0; 2183 } 2184 exit: 2185 /* 2186 * Do the routine cleanup: 2187 * - close opened Netlink sockets 2188 * - free allocated spawn data array 2189 * - free the Infiniband device list 2190 */ 2191 if (nl_rdma >= 0) 2192 close(nl_rdma); 2193 if (nl_route >= 0) 2194 close(nl_route); 2195 if (list) 2196 mlx5_free(list); 2197 MLX5_ASSERT(ibv_list); 2198 mlx5_glue->free_device_list(ibv_list); 2199 return ret; 2200 } 2201 2202 static int 2203 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) 2204 { 2205 char *env; 2206 int value; 2207 2208 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2209 /* Get environment variable to store. */ 2210 env = getenv(MLX5_SHUT_UP_BF); 2211 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; 2212 if (config->dbnc == MLX5_ARG_UNSET) 2213 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); 2214 else 2215 setenv(MLX5_SHUT_UP_BF, 2216 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); 2217 return value; 2218 } 2219 2220 static void 2221 mlx5_restore_doorbell_mapping_env(int value) 2222 { 2223 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2224 /* Restore the original environment variable state. */ 2225 if (value == MLX5_ARG_UNSET) 2226 unsetenv(MLX5_SHUT_UP_BF); 2227 else 2228 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); 2229 } 2230 2231 /** 2232 * Extract pdn of PD object using DV API. 2233 * 2234 * @param[in] pd 2235 * Pointer to the verbs PD object. 2236 * @param[out] pdn 2237 * Pointer to the PD object number variable. 2238 * 2239 * @return 2240 * 0 on success, error value otherwise. 2241 */ 2242 int 2243 mlx5_os_get_pdn(void *pd, uint32_t *pdn) 2244 { 2245 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 2246 struct mlx5dv_obj obj; 2247 struct mlx5dv_pd pd_info; 2248 int ret = 0; 2249 2250 obj.pd.in = pd; 2251 obj.pd.out = &pd_info; 2252 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 2253 if (ret) { 2254 DRV_LOG(DEBUG, "Fail to get PD object info"); 2255 return ret; 2256 } 2257 *pdn = pd_info.pdn; 2258 return 0; 2259 #else 2260 (void)pd; 2261 (void)pdn; 2262 return -ENOTSUP; 2263 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 2264 } 2265 2266 /** 2267 * Function API to open IB device. 2268 * 2269 * This function calls the Linux glue APIs to open a device. 2270 * 2271 * @param[in] spawn 2272 * Pointer to the IB device attributes (name, port, etc). 2273 * @param[out] config 2274 * Pointer to device configuration structure. 2275 * @param[out] sh 2276 * Pointer to shared context structure. 2277 * 2278 * @return 2279 * 0 on success, a positive error value otherwise. 2280 */ 2281 int 2282 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 2283 const struct mlx5_dev_config *config, 2284 struct mlx5_dev_ctx_shared *sh) 2285 { 2286 int dbmap_env; 2287 int err = 0; 2288 2289 sh->numa_node = spawn->pci_dev->device.numa_node; 2290 pthread_mutex_init(&sh->txpp.mutex, NULL); 2291 /* 2292 * Configure environment variable "MLX5_BF_SHUT_UP" 2293 * before the device creation. The rdma_core library 2294 * checks the variable at device creation and 2295 * stores the result internally. 2296 */ 2297 dbmap_env = mlx5_config_doorbell_mapping_env(config); 2298 /* Try to open IB device with DV first, then usual Verbs. */ 2299 errno = 0; 2300 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); 2301 if (sh->ctx) { 2302 sh->devx = 1; 2303 DRV_LOG(DEBUG, "DevX is supported"); 2304 /* The device is created, no need for environment. */ 2305 mlx5_restore_doorbell_mapping_env(dbmap_env); 2306 } else { 2307 /* The environment variable is still configured. */ 2308 sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 2309 err = errno ? errno : ENODEV; 2310 /* 2311 * The environment variable is not needed anymore, 2312 * all device creation attempts are completed. 2313 */ 2314 mlx5_restore_doorbell_mapping_env(dbmap_env); 2315 if (!sh->ctx) 2316 return err; 2317 DRV_LOG(DEBUG, "DevX is NOT supported"); 2318 err = 0; 2319 } 2320 if (!err && sh->ctx) { 2321 /* Hint libmlx5 to use PMD allocator for data plane resources */ 2322 mlx5_glue->dv_set_context_attr(sh->ctx, 2323 MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 2324 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 2325 .alloc = &mlx5_alloc_verbs_buf, 2326 .free = &mlx5_free_verbs_buf, 2327 .data = sh, 2328 })); 2329 } 2330 return err; 2331 } 2332 2333 /** 2334 * Install shared asynchronous device events handler. 2335 * This function is implemented to support event sharing 2336 * between multiple ports of single IB device. 2337 * 2338 * @param sh 2339 * Pointer to mlx5_dev_ctx_shared object. 2340 */ 2341 void 2342 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2343 { 2344 int ret; 2345 int flags; 2346 2347 sh->intr_handle.fd = -1; 2348 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); 2349 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, 2350 F_SETFL, flags | O_NONBLOCK); 2351 if (ret) { 2352 DRV_LOG(INFO, "failed to change file descriptor async event" 2353 " queue"); 2354 } else { 2355 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; 2356 sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 2357 if (rte_intr_callback_register(&sh->intr_handle, 2358 mlx5_dev_interrupt_handler, sh)) { 2359 DRV_LOG(INFO, "Fail to install the shared interrupt."); 2360 sh->intr_handle.fd = -1; 2361 } 2362 } 2363 if (sh->devx) { 2364 #ifdef HAVE_IBV_DEVX_ASYNC 2365 sh->intr_handle_devx.fd = -1; 2366 sh->devx_comp = 2367 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); 2368 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 2369 if (!devx_comp) { 2370 DRV_LOG(INFO, "failed to allocate devx_comp."); 2371 return; 2372 } 2373 flags = fcntl(devx_comp->fd, F_GETFL); 2374 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 2375 if (ret) { 2376 DRV_LOG(INFO, "failed to change file descriptor" 2377 " devx comp"); 2378 return; 2379 } 2380 sh->intr_handle_devx.fd = devx_comp->fd; 2381 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 2382 if (rte_intr_callback_register(&sh->intr_handle_devx, 2383 mlx5_dev_interrupt_handler_devx, sh)) { 2384 DRV_LOG(INFO, "Fail to install the devx shared" 2385 " interrupt."); 2386 sh->intr_handle_devx.fd = -1; 2387 } 2388 #endif /* HAVE_IBV_DEVX_ASYNC */ 2389 } 2390 } 2391 2392 /** 2393 * Uninstall shared asynchronous device events handler. 2394 * This function is implemented to support event sharing 2395 * between multiple ports of single IB device. 2396 * 2397 * @param dev 2398 * Pointer to mlx5_dev_ctx_shared object. 2399 */ 2400 void 2401 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2402 { 2403 if (sh->intr_handle.fd >= 0) 2404 mlx5_intr_callback_unregister(&sh->intr_handle, 2405 mlx5_dev_interrupt_handler, sh); 2406 #ifdef HAVE_IBV_DEVX_ASYNC 2407 if (sh->intr_handle_devx.fd >= 0) 2408 rte_intr_callback_unregister(&sh->intr_handle_devx, 2409 mlx5_dev_interrupt_handler_devx, sh); 2410 if (sh->devx_comp) 2411 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2412 #endif 2413 } 2414 2415 /** 2416 * Read statistics by a named counter. 2417 * 2418 * @param[in] priv 2419 * Pointer to the private device data structure. 2420 * @param[in] ctr_name 2421 * Pointer to the name of the statistic counter to read 2422 * @param[out] stat 2423 * Pointer to read statistic value. 2424 * @return 2425 * 0 on success and stat is valud, 1 if failed to read the value 2426 * rte_errno is set. 2427 * 2428 */ 2429 int 2430 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2431 uint64_t *stat) 2432 { 2433 int fd; 2434 2435 if (priv->sh) { 2436 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2437 priv->sh->ibdev_path, 2438 priv->dev_port, 2439 ctr_name); 2440 fd = open(path, O_RDONLY); 2441 /* 2442 * in switchdev the file location is not per port 2443 * but rather in <ibdev_path>/hw_counters/<file_name>. 2444 */ 2445 if (fd == -1) { 2446 MKSTR(path1, "%s/hw_counters/%s", 2447 priv->sh->ibdev_path, 2448 ctr_name); 2449 fd = open(path1, O_RDONLY); 2450 } 2451 if (fd != -1) { 2452 char buf[21] = {'\0'}; 2453 ssize_t n = read(fd, buf, sizeof(buf)); 2454 2455 close(fd); 2456 if (n != -1) { 2457 *stat = strtoull(buf, NULL, 10); 2458 return 0; 2459 } 2460 } 2461 } 2462 *stat = 0; 2463 return 1; 2464 } 2465 2466 /** 2467 * Set the reg_mr and dereg_mr call backs 2468 * 2469 * @param reg_mr_cb[out] 2470 * Pointer to reg_mr func 2471 * @param dereg_mr_cb[out] 2472 * Pointer to dereg_mr func 2473 * 2474 */ 2475 void 2476 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 2477 mlx5_dereg_mr_t *dereg_mr_cb) 2478 { 2479 *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr; 2480 *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr; 2481 } 2482 2483 /** 2484 * Remove a MAC address from device 2485 * 2486 * @param dev 2487 * Pointer to Ethernet device structure. 2488 * @param index 2489 * MAC address index. 2490 */ 2491 void 2492 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2493 { 2494 struct mlx5_priv *priv = dev->data->dev_private; 2495 const int vf = priv->config.vf; 2496 2497 if (vf) 2498 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2499 mlx5_ifindex(dev), priv->mac_own, 2500 &dev->data->mac_addrs[index], index); 2501 } 2502 2503 /** 2504 * Adds a MAC address to the device 2505 * 2506 * @param dev 2507 * Pointer to Ethernet device structure. 2508 * @param mac_addr 2509 * MAC address to register. 2510 * @param index 2511 * MAC address index. 2512 * 2513 * @return 2514 * 0 on success, a negative errno value otherwise 2515 */ 2516 int 2517 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2518 uint32_t index) 2519 { 2520 struct mlx5_priv *priv = dev->data->dev_private; 2521 const int vf = priv->config.vf; 2522 int ret = 0; 2523 2524 if (vf) 2525 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2526 mlx5_ifindex(dev), priv->mac_own, 2527 mac, index); 2528 return ret; 2529 } 2530 2531 /** 2532 * Modify a VF MAC address 2533 * 2534 * @param priv 2535 * Pointer to device private data. 2536 * @param mac_addr 2537 * MAC address to modify into. 2538 * @param iface_idx 2539 * Net device interface index 2540 * @param vf_index 2541 * VF index 2542 * 2543 * @return 2544 * 0 on success, a negative errno value otherwise 2545 */ 2546 int 2547 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2548 unsigned int iface_idx, 2549 struct rte_ether_addr *mac_addr, 2550 int vf_index) 2551 { 2552 return mlx5_nl_vf_mac_addr_modify 2553 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2554 } 2555 2556 /** 2557 * Set device promiscuous mode 2558 * 2559 * @param dev 2560 * Pointer to Ethernet device structure. 2561 * @param enable 2562 * 0 - promiscuous is disabled, otherwise - enabled 2563 * 2564 * @return 2565 * 0 on success, a negative error value otherwise 2566 */ 2567 int 2568 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2569 { 2570 struct mlx5_priv *priv = dev->data->dev_private; 2571 2572 return mlx5_nl_promisc(priv->nl_socket_route, 2573 mlx5_ifindex(dev), !!enable); 2574 } 2575 2576 /** 2577 * Set device promiscuous mode 2578 * 2579 * @param dev 2580 * Pointer to Ethernet device structure. 2581 * @param enable 2582 * 0 - all multicase is disabled, otherwise - enabled 2583 * 2584 * @return 2585 * 0 on success, a negative error value otherwise 2586 */ 2587 int 2588 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2589 { 2590 struct mlx5_priv *priv = dev->data->dev_private; 2591 2592 return mlx5_nl_allmulti(priv->nl_socket_route, 2593 mlx5_ifindex(dev), !!enable); 2594 } 2595 2596 /** 2597 * Flush device MAC addresses 2598 * 2599 * @param dev 2600 * Pointer to Ethernet device structure. 2601 * 2602 */ 2603 void 2604 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2605 { 2606 struct mlx5_priv *priv = dev->data->dev_private; 2607 2608 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2609 dev->data->mac_addrs, 2610 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2611 } 2612