1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <bus_driver.h> 23 #include <bus_pci_driver.h> 24 #include <bus_auxiliary_driver.h> 25 #include <rte_common.h> 26 #include <rte_kvargs.h> 27 #include <rte_rwlock.h> 28 #include <rte_spinlock.h> 29 #include <rte_string_fns.h> 30 #include <rte_alarm.h> 31 #include <rte_eal_paging.h> 32 33 #include <mlx5_glue.h> 34 #include <mlx5_devx_cmds.h> 35 #include <mlx5_common.h> 36 #include <mlx5_common_mp.h> 37 #include <mlx5_common_mr.h> 38 #include <mlx5_malloc.h> 39 40 #include "mlx5_defs.h" 41 #include "mlx5.h" 42 #include "mlx5_common_os.h" 43 #include "mlx5_utils.h" 44 #include "mlx5_rxtx.h" 45 #include "mlx5_rx.h" 46 #include "mlx5_tx.h" 47 #include "mlx5_autoconf.h" 48 #include "mlx5_flow.h" 49 #include "rte_pmd_mlx5.h" 50 #include "mlx5_verbs.h" 51 #include "mlx5_nl.h" 52 #include "mlx5_devx.h" 53 54 #ifndef HAVE_IBV_MLX5_MOD_MPW 55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 57 #endif 58 59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 61 #endif 62 63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 64 65 /* Spinlock for mlx5_shared_data allocation. */ 66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 67 68 /* Process local data for secondary processes. */ 69 static struct mlx5_local_data mlx5_local_data; 70 71 /* rte flow indexed pool configuration. */ 72 static struct mlx5_indexed_pool_config icfg[] = { 73 { 74 .size = sizeof(struct rte_flow), 75 .trunk_size = 64, 76 .need_lock = 1, 77 .release_mem_en = 0, 78 .malloc = mlx5_malloc, 79 .free = mlx5_free, 80 .per_core_cache = 0, 81 .type = "ctl_flow_ipool", 82 }, 83 { 84 .size = sizeof(struct rte_flow), 85 .trunk_size = 64, 86 .grow_trunk = 3, 87 .grow_shift = 2, 88 .need_lock = 1, 89 .release_mem_en = 0, 90 .malloc = mlx5_malloc, 91 .free = mlx5_free, 92 .per_core_cache = 1 << 14, 93 .type = "rte_flow_ipool", 94 }, 95 { 96 .size = sizeof(struct rte_flow), 97 .trunk_size = 64, 98 .grow_trunk = 3, 99 .grow_shift = 2, 100 .need_lock = 1, 101 .release_mem_en = 0, 102 .malloc = mlx5_malloc, 103 .free = mlx5_free, 104 .per_core_cache = 0, 105 .type = "mcp_flow_ipool", 106 }, 107 }; 108 109 /** 110 * Set the completion channel file descriptor interrupt as non-blocking. 111 * 112 * @param[in] rxq_obj 113 * Pointer to RQ channel object, which includes the channel fd 114 * 115 * @param[out] fd 116 * The file descriptor (representing the interrupt) used in this channel. 117 * 118 * @return 119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 120 */ 121 int 122 mlx5_os_set_nonblock_channel_fd(int fd) 123 { 124 int flags; 125 126 flags = fcntl(fd, F_GETFL); 127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 128 } 129 130 /** 131 * Get mlx5 device attributes. The glue function query_device_ex() is called 132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 133 * device attributes from the glue out parameter. 134 * 135 * @param sh 136 * Pointer to shared device context. 137 * 138 * @return 139 * 0 on success, a negative errno value otherwise and rte_errno is set. 140 */ 141 int 142 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 143 { 144 int err; 145 struct mlx5_common_device *cdev = sh->cdev; 146 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 147 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 148 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 149 150 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 151 if (err) { 152 rte_errno = errno; 153 return -rte_errno; 154 } 155 #ifdef HAVE_IBV_MLX5_MOD_SWP 156 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 157 #endif 158 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 159 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 160 #endif 161 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 162 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 163 #endif 164 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 165 if (err) { 166 rte_errno = errno; 167 return -rte_errno; 168 } 169 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 170 if (mlx5_dev_is_pci(cdev->dev)) 171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 172 else 173 sh->dev_cap.sf = 1; 174 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 175 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 176 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 177 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 178 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 179 sh->dev_cap.dest_tir = 1; 180 #endif 181 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 182 DRV_LOG(DEBUG, "DV flow is supported."); 183 sh->dev_cap.dv_flow_en = 1; 184 #endif 185 #ifdef HAVE_MLX5DV_DR_ESWITCH 186 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 187 sh->dev_cap.dv_esw_en = 1; 188 #endif 189 /* 190 * Multi-packet send is supported by ConnectX-4 Lx PF as well 191 * as all ConnectX-5 devices. 192 */ 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 194 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 195 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 196 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 197 } else { 198 DRV_LOG(DEBUG, "MPW is supported."); 199 sh->dev_cap.mps = MLX5_MPW; 200 } 201 } else { 202 DRV_LOG(DEBUG, "MPW isn't supported."); 203 sh->dev_cap.mps = MLX5_MPW_DISABLED; 204 } 205 #if (RTE_CACHE_LINE_SIZE == 128) 206 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 207 sh->dev_cap.cqe_comp = 1; 208 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 209 sh->dev_cap.cqe_comp ? "" : "not "); 210 #else 211 sh->dev_cap.cqe_comp = 1; 212 #endif 213 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 214 sh->dev_cap.mpls_en = 215 ((dv_attr.tunnel_offloads_caps & 216 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 217 (dv_attr.tunnel_offloads_caps & 218 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 219 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 220 sh->dev_cap.mpls_en ? "" : "not "); 221 #else 222 DRV_LOG(WARNING, 223 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 224 #endif 225 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 226 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 227 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 228 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 229 IBV_DEVICE_PCI_WRITE_END_PADDING); 230 #endif 231 sh->dev_cap.hw_csum = 232 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 233 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 234 sh->dev_cap.hw_csum ? "" : "not "); 235 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 236 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 237 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 238 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 239 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 240 IBV_RAW_PACKET_CAP_SCATTER_FCS); 241 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 242 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 243 DRV_LOG(DEBUG, "Counters are not supported."); 244 #endif 245 /* 246 * DPDK doesn't support larger/variable indirection tables. 247 * Once DPDK supports it, take max size from device attr. 248 */ 249 sh->dev_cap.ind_table_max_size = 250 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 251 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 252 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 253 sh->dev_cap.ind_table_max_size); 254 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 255 (attr_ex.tso_caps.supported_qpts & 256 (1 << IBV_QPT_RAW_PACKET))); 257 if (sh->dev_cap.tso) 258 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 259 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 260 sizeof(sh->dev_cap.fw_ver)); 261 #ifdef HAVE_IBV_MLX5_MOD_SWP 262 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 263 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 264 (MLX5_SW_PARSING_CAP | 265 MLX5_SW_PARSING_CSUM_CAP | 266 MLX5_SW_PARSING_TSO_CAP); 267 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 268 #endif 269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 270 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 271 struct mlx5dv_striding_rq_caps *strd_rq_caps = 272 &dv_attr.striding_rq_caps; 273 274 sh->dev_cap.mprq.enabled = 1; 275 sh->dev_cap.mprq.log_min_stride_size = 276 strd_rq_caps->min_single_stride_log_num_of_bytes; 277 sh->dev_cap.mprq.log_max_stride_size = 278 strd_rq_caps->max_single_stride_log_num_of_bytes; 279 sh->dev_cap.mprq.log_min_stride_num = 280 strd_rq_caps->min_single_wqe_log_num_of_strides; 281 sh->dev_cap.mprq.log_max_stride_num = 282 strd_rq_caps->max_single_wqe_log_num_of_strides; 283 sh->dev_cap.mprq.log_min_stride_wqe_size = 284 cdev->config.devx ? 285 hca_attr->log_min_stride_wqe_sz : 286 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 287 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 288 sh->dev_cap.mprq.log_min_stride_size); 289 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 290 sh->dev_cap.mprq.log_max_stride_size); 291 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 292 sh->dev_cap.mprq.log_min_stride_num); 293 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 294 sh->dev_cap.mprq.log_max_stride_num); 295 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 296 sh->dev_cap.mprq.log_min_stride_wqe_size); 297 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 298 strd_rq_caps->supported_qpts); 299 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 300 } 301 #endif 302 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 303 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 304 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 305 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 306 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 307 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 308 } 309 if (sh->dev_cap.tunnel_en) { 310 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 311 sh->dev_cap.tunnel_en & 312 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 313 sh->dev_cap.tunnel_en & 314 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 315 sh->dev_cap.tunnel_en & 316 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 317 } else { 318 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 319 } 320 #else 321 DRV_LOG(WARNING, 322 "Tunnel offloading disabled due to old OFED/rdma-core version"); 323 #endif 324 if (!sh->cdev->config.devx) 325 return 0; 326 /* Check capabilities for Packet Pacing. */ 327 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 328 hca_attr->dev_freq_khz); 329 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 330 hca_attr->qos.packet_pacing ? "" : "not "); 331 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 332 hca_attr->cross_channel ? "" : "not "); 333 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 334 hca_attr->wqe_index_ignore ? "" : "not "); 335 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 336 hca_attr->non_wire_sq ? "" : "not "); 337 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 338 hca_attr->log_max_static_sq_wq ? "" : "not ", 339 hca_attr->log_max_static_sq_wq); 340 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 341 hca_attr->qos.wqe_rate_pp ? "" : "not "); 342 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 343 if (!hca_attr->cross_channel) { 344 DRV_LOG(DEBUG, 345 "Cross channel operations are required for packet pacing."); 346 sh->dev_cap.txpp_en = 0; 347 } 348 if (!hca_attr->wqe_index_ignore) { 349 DRV_LOG(DEBUG, 350 "WQE index ignore feature is required for packet pacing."); 351 sh->dev_cap.txpp_en = 0; 352 } 353 if (!hca_attr->non_wire_sq) { 354 DRV_LOG(DEBUG, 355 "Non-wire SQ feature is required for packet pacing."); 356 sh->dev_cap.txpp_en = 0; 357 } 358 if (!hca_attr->log_max_static_sq_wq) { 359 DRV_LOG(DEBUG, 360 "Static WQE SQ feature is required for packet pacing."); 361 sh->dev_cap.txpp_en = 0; 362 } 363 if (!hca_attr->qos.wqe_rate_pp) { 364 DRV_LOG(DEBUG, 365 "WQE rate mode is required for packet pacing."); 366 sh->dev_cap.txpp_en = 0; 367 } 368 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 369 DRV_LOG(DEBUG, 370 "DevX does not provide UAR offset, can't create queues for packet pacing."); 371 sh->dev_cap.txpp_en = 0; 372 #endif 373 sh->dev_cap.scatter_fcs_w_decap_disable = 374 hca_attr->scatter_fcs_w_decap_disable; 375 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 376 mlx5_rt_timestamp_config(sh, hca_attr); 377 return 0; 378 } 379 380 /** 381 * Detect misc5 support or not 382 * 383 * @param[in] priv 384 * Device private data pointer 385 */ 386 #ifdef HAVE_MLX5DV_DR 387 static void 388 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 389 { 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 391 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 392 * Case: IPv4--->UDP--->VxLAN--->vni 393 */ 394 void *tbl; 395 struct mlx5_flow_dv_match_params matcher_mask; 396 void *match_m; 397 void *matcher; 398 void *headers_m; 399 void *misc5_m; 400 uint32_t *tunnel_header_m; 401 struct mlx5dv_flow_matcher_attr dv_attr; 402 403 memset(&matcher_mask, 0, sizeof(matcher_mask)); 404 matcher_mask.size = sizeof(matcher_mask.buf); 405 match_m = matcher_mask.buf; 406 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 407 misc5_m = MLX5_ADDR_OF(fte_match_param, 408 match_m, misc_parameters_5); 409 tunnel_header_m = (uint32_t *) 410 MLX5_ADDR_OF(fte_match_set_misc5, 411 misc5_m, tunnel_header_1); 412 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 413 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 414 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 415 *tunnel_header_m = 0xffffff; 416 417 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 418 if (!tbl) { 419 DRV_LOG(INFO, "No SW steering support"); 420 return; 421 } 422 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 423 dv_attr.match_mask = (void *)&matcher_mask, 424 dv_attr.match_criteria_enable = 425 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 426 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 427 dv_attr.priority = 3; 428 #ifdef HAVE_MLX5DV_DR_ESWITCH 429 void *misc2_m; 430 if (priv->sh->config.dv_esw_en) { 431 /* FDB enabled reg_c_0 */ 432 dv_attr.match_criteria_enable |= 433 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 434 misc2_m = MLX5_ADDR_OF(fte_match_param, 435 match_m, misc_parameters_2); 436 MLX5_SET(fte_match_set_misc2, misc2_m, 437 metadata_reg_c_0, 0xffff); 438 } 439 #endif 440 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 441 &dv_attr, tbl); 442 if (matcher) { 443 priv->sh->misc5_cap = 1; 444 mlx5_glue->dv_destroy_flow_matcher(matcher); 445 } 446 mlx5_glue->dr_destroy_flow_tbl(tbl); 447 #else 448 RTE_SET_USED(priv); 449 #endif 450 } 451 #endif 452 453 /** 454 * Initialize DR related data within private structure. 455 * Routine checks the reference counter and does actual 456 * resources creation/initialization only if counter is zero. 457 * 458 * @param[in] priv 459 * Pointer to the private device data structure. 460 * 461 * @return 462 * Zero on success, positive error code otherwise. 463 */ 464 static int 465 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 466 { 467 struct mlx5_dev_ctx_shared *sh = priv->sh; 468 char s[MLX5_NAME_SIZE] __rte_unused; 469 int err; 470 471 MLX5_ASSERT(sh && sh->refcnt); 472 if (sh->refcnt > 1) 473 return 0; 474 err = mlx5_alloc_table_hash_list(priv); 475 if (err) 476 goto error; 477 if (priv->sh->config.dv_flow_en == 2) 478 return 0; 479 /* The resources below are only valid with DV support. */ 480 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 481 /* Init port id action list. */ 482 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 483 sh->port_id_action_list = mlx5_list_create(s, sh, true, 484 flow_dv_port_id_create_cb, 485 flow_dv_port_id_match_cb, 486 flow_dv_port_id_remove_cb, 487 flow_dv_port_id_clone_cb, 488 flow_dv_port_id_clone_free_cb); 489 if (!sh->port_id_action_list) 490 goto error; 491 /* Init push vlan action list. */ 492 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 493 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 494 flow_dv_push_vlan_create_cb, 495 flow_dv_push_vlan_match_cb, 496 flow_dv_push_vlan_remove_cb, 497 flow_dv_push_vlan_clone_cb, 498 flow_dv_push_vlan_clone_free_cb); 499 if (!sh->push_vlan_action_list) 500 goto error; 501 /* Init sample action list. */ 502 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 503 sh->sample_action_list = mlx5_list_create(s, sh, true, 504 flow_dv_sample_create_cb, 505 flow_dv_sample_match_cb, 506 flow_dv_sample_remove_cb, 507 flow_dv_sample_clone_cb, 508 flow_dv_sample_clone_free_cb); 509 if (!sh->sample_action_list) 510 goto error; 511 /* Init dest array action list. */ 512 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 513 sh->dest_array_list = mlx5_list_create(s, sh, true, 514 flow_dv_dest_array_create_cb, 515 flow_dv_dest_array_match_cb, 516 flow_dv_dest_array_remove_cb, 517 flow_dv_dest_array_clone_cb, 518 flow_dv_dest_array_clone_free_cb); 519 if (!sh->dest_array_list) 520 goto error; 521 /* Init shared flex parsers list, no need lcore_share */ 522 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 523 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 524 mlx5_flex_parser_create_cb, 525 mlx5_flex_parser_match_cb, 526 mlx5_flex_parser_remove_cb, 527 mlx5_flex_parser_clone_cb, 528 mlx5_flex_parser_clone_free_cb); 529 if (!sh->flex_parsers_dv) 530 goto error; 531 #endif 532 #ifdef HAVE_MLX5DV_DR 533 void *domain; 534 535 /* Reference counter is zero, we should initialize structures. */ 536 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 537 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 538 if (!domain) { 539 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 540 err = errno; 541 goto error; 542 } 543 sh->rx_domain = domain; 544 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 545 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 546 if (!domain) { 547 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 548 err = errno; 549 goto error; 550 } 551 sh->tx_domain = domain; 552 #ifdef HAVE_MLX5DV_DR_ESWITCH 553 if (sh->config.dv_esw_en) { 554 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 555 MLX5DV_DR_DOMAIN_TYPE_FDB); 556 if (!domain) { 557 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 558 err = errno; 559 goto error; 560 } 561 sh->fdb_domain = domain; 562 } 563 /* 564 * The drop action is just some dummy placeholder in rdma-core. It 565 * does not belong to domains and has no any attributes, and, can be 566 * shared by the entire device. 567 */ 568 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 569 if (!sh->dr_drop_action) { 570 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 571 err = errno; 572 goto error; 573 } 574 #endif 575 if (!sh->tunnel_hub && sh->config.dv_miss_info) 576 err = mlx5_alloc_tunnel_hub(sh); 577 if (err) { 578 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 579 goto error; 580 } 581 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 582 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 583 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 584 if (sh->fdb_domain) 585 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 586 } 587 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 588 if (!sh->config.allow_duplicate_pattern) { 589 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 590 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 591 #endif 592 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 593 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 594 if (sh->fdb_domain) 595 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 596 } 597 598 __mlx5_discovery_misc5_cap(priv); 599 #endif /* HAVE_MLX5DV_DR */ 600 sh->default_miss_action = 601 mlx5_glue->dr_create_flow_action_default_miss(); 602 if (!sh->default_miss_action) 603 DRV_LOG(WARNING, "Default miss action is not supported."); 604 LIST_INIT(&sh->shared_rxqs); 605 return 0; 606 error: 607 /* Rollback the created objects. */ 608 if (sh->rx_domain) { 609 mlx5_glue->dr_destroy_domain(sh->rx_domain); 610 sh->rx_domain = NULL; 611 } 612 if (sh->tx_domain) { 613 mlx5_glue->dr_destroy_domain(sh->tx_domain); 614 sh->tx_domain = NULL; 615 } 616 if (sh->fdb_domain) { 617 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 618 sh->fdb_domain = NULL; 619 } 620 if (sh->dr_drop_action) { 621 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 622 sh->dr_drop_action = NULL; 623 } 624 if (sh->pop_vlan_action) { 625 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 626 sh->pop_vlan_action = NULL; 627 } 628 if (sh->encaps_decaps) { 629 mlx5_hlist_destroy(sh->encaps_decaps); 630 sh->encaps_decaps = NULL; 631 } 632 if (sh->modify_cmds) { 633 mlx5_hlist_destroy(sh->modify_cmds); 634 sh->modify_cmds = NULL; 635 } 636 if (sh->tag_table) { 637 /* tags should be destroyed with flow before. */ 638 mlx5_hlist_destroy(sh->tag_table); 639 sh->tag_table = NULL; 640 } 641 if (sh->tunnel_hub) { 642 mlx5_release_tunnel_hub(sh, priv->dev_port); 643 sh->tunnel_hub = NULL; 644 } 645 mlx5_free_table_hash_list(priv); 646 if (sh->port_id_action_list) { 647 mlx5_list_destroy(sh->port_id_action_list); 648 sh->port_id_action_list = NULL; 649 } 650 if (sh->push_vlan_action_list) { 651 mlx5_list_destroy(sh->push_vlan_action_list); 652 sh->push_vlan_action_list = NULL; 653 } 654 if (sh->sample_action_list) { 655 mlx5_list_destroy(sh->sample_action_list); 656 sh->sample_action_list = NULL; 657 } 658 if (sh->dest_array_list) { 659 mlx5_list_destroy(sh->dest_array_list); 660 sh->dest_array_list = NULL; 661 } 662 return err; 663 } 664 665 /** 666 * Destroy DR related data within private structure. 667 * 668 * @param[in] priv 669 * Pointer to the private device data structure. 670 */ 671 void 672 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 673 { 674 struct mlx5_dev_ctx_shared *sh = priv->sh; 675 676 MLX5_ASSERT(sh && sh->refcnt); 677 if (sh->refcnt > 1) 678 return; 679 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 680 #ifdef HAVE_MLX5DV_DR 681 if (sh->rx_domain) { 682 mlx5_glue->dr_destroy_domain(sh->rx_domain); 683 sh->rx_domain = NULL; 684 } 685 if (sh->tx_domain) { 686 mlx5_glue->dr_destroy_domain(sh->tx_domain); 687 sh->tx_domain = NULL; 688 } 689 #ifdef HAVE_MLX5DV_DR_ESWITCH 690 if (sh->fdb_domain) { 691 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 692 sh->fdb_domain = NULL; 693 } 694 if (sh->dr_drop_action) { 695 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 696 sh->dr_drop_action = NULL; 697 } 698 #endif 699 if (sh->pop_vlan_action) { 700 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 701 sh->pop_vlan_action = NULL; 702 } 703 #endif /* HAVE_MLX5DV_DR */ 704 if (sh->default_miss_action) 705 mlx5_glue->destroy_flow_action 706 (sh->default_miss_action); 707 if (sh->encaps_decaps) { 708 mlx5_hlist_destroy(sh->encaps_decaps); 709 sh->encaps_decaps = NULL; 710 } 711 if (sh->modify_cmds) { 712 mlx5_hlist_destroy(sh->modify_cmds); 713 sh->modify_cmds = NULL; 714 } 715 if (sh->tag_table) { 716 /* tags should be destroyed with flow before. */ 717 mlx5_hlist_destroy(sh->tag_table); 718 sh->tag_table = NULL; 719 } 720 if (sh->tunnel_hub) { 721 mlx5_release_tunnel_hub(sh, priv->dev_port); 722 sh->tunnel_hub = NULL; 723 } 724 mlx5_free_table_hash_list(priv); 725 if (sh->port_id_action_list) { 726 mlx5_list_destroy(sh->port_id_action_list); 727 sh->port_id_action_list = NULL; 728 } 729 if (sh->push_vlan_action_list) { 730 mlx5_list_destroy(sh->push_vlan_action_list); 731 sh->push_vlan_action_list = NULL; 732 } 733 if (sh->sample_action_list) { 734 mlx5_list_destroy(sh->sample_action_list); 735 sh->sample_action_list = NULL; 736 } 737 if (sh->dest_array_list) { 738 mlx5_list_destroy(sh->dest_array_list); 739 sh->dest_array_list = NULL; 740 } 741 } 742 743 /** 744 * Initialize shared data between primary and secondary process. 745 * 746 * A memzone is reserved by primary process and secondary processes attach to 747 * the memzone. 748 * 749 * @return 750 * 0 on success, a negative errno value otherwise and rte_errno is set. 751 */ 752 static int 753 mlx5_init_shared_data(void) 754 { 755 const struct rte_memzone *mz; 756 int ret = 0; 757 758 rte_spinlock_lock(&mlx5_shared_data_lock); 759 if (mlx5_shared_data == NULL) { 760 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 761 /* Allocate shared memory. */ 762 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 763 sizeof(*mlx5_shared_data), 764 SOCKET_ID_ANY, 0); 765 if (mz == NULL) { 766 DRV_LOG(ERR, 767 "Cannot allocate mlx5 shared data"); 768 ret = -rte_errno; 769 goto error; 770 } 771 mlx5_shared_data = mz->addr; 772 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 773 rte_spinlock_init(&mlx5_shared_data->lock); 774 } else { 775 /* Lookup allocated shared memory. */ 776 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 777 if (mz == NULL) { 778 DRV_LOG(ERR, 779 "Cannot attach mlx5 shared data"); 780 ret = -rte_errno; 781 goto error; 782 } 783 mlx5_shared_data = mz->addr; 784 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 785 } 786 } 787 error: 788 rte_spinlock_unlock(&mlx5_shared_data_lock); 789 return ret; 790 } 791 792 /** 793 * PMD global initialization. 794 * 795 * Independent from individual device, this function initializes global 796 * per-PMD data structures distinguishing primary and secondary processes. 797 * Hence, each initialization is called once per a process. 798 * 799 * @return 800 * 0 on success, a negative errno value otherwise and rte_errno is set. 801 */ 802 static int 803 mlx5_init_once(void) 804 { 805 struct mlx5_shared_data *sd; 806 struct mlx5_local_data *ld = &mlx5_local_data; 807 int ret = 0; 808 809 if (mlx5_init_shared_data()) 810 return -rte_errno; 811 sd = mlx5_shared_data; 812 MLX5_ASSERT(sd); 813 rte_spinlock_lock(&sd->lock); 814 switch (rte_eal_process_type()) { 815 case RTE_PROC_PRIMARY: 816 if (sd->init_done) 817 break; 818 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 819 mlx5_mp_os_primary_handle); 820 if (ret) 821 goto out; 822 sd->init_done = true; 823 break; 824 case RTE_PROC_SECONDARY: 825 if (ld->init_done) 826 break; 827 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 828 mlx5_mp_os_secondary_handle); 829 if (ret) 830 goto out; 831 ++sd->secondary_cnt; 832 ld->init_done = true; 833 break; 834 default: 835 break; 836 } 837 out: 838 rte_spinlock_unlock(&sd->lock); 839 return ret; 840 } 841 842 /** 843 * DR flow drop action support detect. 844 * 845 * @param dev 846 * Pointer to rte_eth_dev structure. 847 * 848 */ 849 static void 850 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 851 { 852 #ifdef HAVE_MLX5DV_DR 853 struct mlx5_priv *priv = dev->data->dev_private; 854 855 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 856 return; 857 /** 858 * DR supports drop action placeholder when it is supported; 859 * otherwise, use the queue drop action. 860 */ 861 if (!priv->sh->drop_action_check_flag) { 862 if (!mlx5_flow_discover_dr_action_support(dev)) 863 priv->sh->dr_drop_action_en = 1; 864 priv->sh->drop_action_check_flag = 1; 865 } 866 if (priv->sh->dr_drop_action_en) 867 priv->root_drop_action = priv->sh->dr_drop_action; 868 else 869 priv->root_drop_action = priv->drop_queue.hrxq->action; 870 #endif 871 } 872 873 static void 874 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 875 { 876 struct mlx5_priv *priv = dev->data->dev_private; 877 void *ctx = priv->sh->cdev->ctx; 878 879 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 880 if (!priv->q_counters) { 881 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 882 struct ibv_wq *wq; 883 884 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 885 "by DevX - fall-back to use the kernel driver global " 886 "queue counter.", dev->data->port_id); 887 /* Create WQ by kernel and query its queue counter ID. */ 888 if (cq) { 889 wq = mlx5_glue->create_wq(ctx, 890 &(struct ibv_wq_init_attr){ 891 .wq_type = IBV_WQT_RQ, 892 .max_wr = 1, 893 .max_sge = 1, 894 .pd = priv->sh->cdev->pd, 895 .cq = cq, 896 }); 897 if (wq) { 898 /* Counter is assigned only on RDY state. */ 899 int ret = mlx5_glue->modify_wq(wq, 900 &(struct ibv_wq_attr){ 901 .attr_mask = IBV_WQ_ATTR_STATE, 902 .wq_state = IBV_WQS_RDY, 903 }); 904 905 if (ret == 0) 906 mlx5_devx_cmd_wq_query(wq, 907 &priv->counter_set_id); 908 claim_zero(mlx5_glue->destroy_wq(wq)); 909 } 910 claim_zero(mlx5_glue->destroy_cq(cq)); 911 } 912 } else { 913 priv->counter_set_id = priv->q_counters->id; 914 } 915 if (priv->counter_set_id == 0) 916 DRV_LOG(INFO, "Part of the port %d statistics will not be " 917 "available.", dev->data->port_id); 918 } 919 920 /** 921 * Check if representor spawn info match devargs. 922 * 923 * @param spawn 924 * Verbs device parameters (name, port, switch_info) to spawn. 925 * @param eth_da 926 * Device devargs to probe. 927 * 928 * @return 929 * Match result. 930 */ 931 static bool 932 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 933 struct rte_eth_devargs *eth_da) 934 { 935 struct mlx5_switch_info *switch_info = &spawn->info; 936 unsigned int p, f; 937 uint16_t id; 938 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 939 eth_da->type); 940 941 switch (eth_da->type) { 942 case RTE_ETH_REPRESENTOR_SF: 943 if (!(spawn->info.port_name == -1 && 944 switch_info->name_type == 945 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 946 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 947 rte_errno = EBUSY; 948 return false; 949 } 950 break; 951 case RTE_ETH_REPRESENTOR_VF: 952 /* Allows HPF representor index -1 as exception. */ 953 if (!(spawn->info.port_name == -1 && 954 switch_info->name_type == 955 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 956 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 957 rte_errno = EBUSY; 958 return false; 959 } 960 break; 961 case RTE_ETH_REPRESENTOR_NONE: 962 rte_errno = EBUSY; 963 return false; 964 default: 965 rte_errno = ENOTSUP; 966 DRV_LOG(ERR, "unsupported representor type"); 967 return false; 968 } 969 /* Check representor ID: */ 970 for (p = 0; p < eth_da->nb_ports; ++p) { 971 if (spawn->pf_bond < 0) { 972 /* For non-LAG mode, allow and ignore pf. */ 973 switch_info->pf_num = eth_da->ports[p]; 974 repr_id = mlx5_representor_id_encode(switch_info, 975 eth_da->type); 976 } 977 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 978 id = MLX5_REPRESENTOR_ID 979 (eth_da->ports[p], eth_da->type, 980 eth_da->representor_ports[f]); 981 if (repr_id == id) 982 return true; 983 } 984 } 985 rte_errno = EBUSY; 986 return false; 987 } 988 989 /** 990 * Spawn an Ethernet device from Verbs information. 991 * 992 * @param dpdk_dev 993 * Backing DPDK device. 994 * @param spawn 995 * Verbs device parameters (name, port, switch_info) to spawn. 996 * @param eth_da 997 * Device arguments. 998 * @param mkvlist 999 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1000 * 1001 * @return 1002 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1003 * is set. The following errors are defined: 1004 * 1005 * EBUSY: device is not supposed to be spawned. 1006 * EEXIST: device is already spawned 1007 */ 1008 static struct rte_eth_dev * 1009 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1010 struct mlx5_dev_spawn_data *spawn, 1011 struct rte_eth_devargs *eth_da, 1012 struct mlx5_kvargs_ctrl *mkvlist) 1013 { 1014 const struct mlx5_switch_info *switch_info = &spawn->info; 1015 struct mlx5_dev_ctx_shared *sh = NULL; 1016 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1017 struct rte_eth_dev *eth_dev = NULL; 1018 struct mlx5_priv *priv = NULL; 1019 int err = 0; 1020 struct rte_ether_addr mac; 1021 char name[RTE_ETH_NAME_MAX_LEN]; 1022 int own_domain_id = 0; 1023 uint16_t port_id; 1024 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1025 int nl_rdma; 1026 int i; 1027 1028 /* Determine if this port representor is supposed to be spawned. */ 1029 if (switch_info->representor && dpdk_dev->devargs && 1030 !mlx5_representor_match(spawn, eth_da)) 1031 return NULL; 1032 /* Build device name. */ 1033 if (spawn->pf_bond < 0) { 1034 /* Single device. */ 1035 if (!switch_info->representor) 1036 strlcpy(name, dpdk_dev->name, sizeof(name)); 1037 else 1038 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1039 dpdk_dev->name, 1040 switch_info->name_type == 1041 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1042 switch_info->port_name); 1043 } else { 1044 /* Bonding device. */ 1045 if (!switch_info->representor) { 1046 err = snprintf(name, sizeof(name), "%s_%s", 1047 dpdk_dev->name, spawn->phys_dev_name); 1048 } else { 1049 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1050 dpdk_dev->name, spawn->phys_dev_name, 1051 switch_info->ctrl_num, 1052 switch_info->pf_num, 1053 switch_info->name_type == 1054 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1055 switch_info->port_name); 1056 } 1057 } 1058 if (err >= (int)sizeof(name)) 1059 DRV_LOG(WARNING, "device name overflow %s", name); 1060 /* check if the device is already spawned */ 1061 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1062 /* 1063 * When device is already spawned, its devargs should be set 1064 * as used. otherwise, mlx5_kvargs_validate() will fail. 1065 */ 1066 if (mkvlist) 1067 mlx5_port_args_set_used(name, port_id, mkvlist); 1068 rte_errno = EEXIST; 1069 return NULL; 1070 } 1071 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1072 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1073 struct mlx5_mp_id mp_id; 1074 int fd; 1075 1076 eth_dev = rte_eth_dev_attach_secondary(name); 1077 if (eth_dev == NULL) { 1078 DRV_LOG(ERR, "can not attach rte ethdev"); 1079 rte_errno = ENOMEM; 1080 return NULL; 1081 } 1082 eth_dev->device = dpdk_dev; 1083 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1084 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1085 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1086 err = mlx5_proc_priv_init(eth_dev); 1087 if (err) 1088 return NULL; 1089 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1090 /* Receive command fd from primary process */ 1091 fd = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1092 if (fd < 0) 1093 goto err_secondary; 1094 /* Remap UAR for Tx queues. */ 1095 err = mlx5_tx_uar_init_secondary(eth_dev, fd); 1096 close(fd); 1097 if (err) 1098 goto err_secondary; 1099 /* 1100 * Ethdev pointer is still required as input since 1101 * the primary device is not accessible from the 1102 * secondary process. 1103 */ 1104 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1105 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1106 return eth_dev; 1107 err_secondary: 1108 mlx5_dev_close(eth_dev); 1109 return NULL; 1110 } 1111 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1112 if (!sh) 1113 return NULL; 1114 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1115 /* Check port status. */ 1116 if (spawn->phys_port <= UINT8_MAX) { 1117 /* Legacy Verbs api only support u8 port number. */ 1118 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1119 &port_attr); 1120 if (err) { 1121 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1122 goto error; 1123 } 1124 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1125 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1126 err = EINVAL; 1127 goto error; 1128 } 1129 } else if (nl_rdma >= 0) { 1130 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1131 err = mlx5_nl_port_state(nl_rdma, 1132 spawn->phys_dev_name, 1133 spawn->phys_port); 1134 if (err < 0) { 1135 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1136 strerror(rte_errno)); 1137 err = -rte_errno; 1138 goto error; 1139 } 1140 port_attr.state = (enum ibv_port_state)err; 1141 } 1142 if (port_attr.state != IBV_PORT_ACTIVE) 1143 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1144 mlx5_glue->port_state_str(port_attr.state), 1145 port_attr.state); 1146 /* Allocate private eth device data. */ 1147 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1148 sizeof(*priv), 1149 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1150 if (priv == NULL) { 1151 DRV_LOG(ERR, "priv allocation failure"); 1152 err = ENOMEM; 1153 goto error; 1154 } 1155 /* 1156 * When user configures remote PD and CTX and device creates RxQ by 1157 * DevX, external RxQ is both supported and requested. 1158 */ 1159 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1160 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1161 sizeof(struct mlx5_external_rxq) * 1162 MLX5_MAX_EXT_RX_QUEUES, 0, 1163 SOCKET_ID_ANY); 1164 if (priv->ext_rxqs == NULL) { 1165 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1166 err = ENOMEM; 1167 goto error; 1168 } 1169 DRV_LOG(DEBUG, "External RxQ is supported."); 1170 } 1171 priv->sh = sh; 1172 priv->dev_port = spawn->phys_port; 1173 priv->pci_dev = spawn->pci_dev; 1174 priv->mtu = RTE_ETHER_MTU; 1175 /* Some internal functions rely on Netlink sockets, open them now. */ 1176 priv->nl_socket_rdma = nl_rdma; 1177 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1178 priv->representor = !!switch_info->representor; 1179 priv->master = !!switch_info->master; 1180 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1181 priv->vport_meta_tag = 0; 1182 priv->vport_meta_mask = 0; 1183 priv->pf_bond = spawn->pf_bond; 1184 1185 DRV_LOG(DEBUG, 1186 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1187 priv->dev_port, dpdk_dev->bus->name, 1188 priv->pci_dev ? priv->pci_dev->name : "NONE", 1189 priv->master, priv->representor, priv->pf_bond); 1190 1191 /* 1192 * If we have E-Switch we should determine the vport attributes. 1193 * E-Switch may use either source vport field or reg_c[0] metadata 1194 * register to match on vport index. The engaged part of metadata 1195 * register is defined by mask. 1196 */ 1197 if (sh->esw_mode) { 1198 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1199 spawn->phys_port, 1200 &vport_info); 1201 if (err) { 1202 DRV_LOG(WARNING, 1203 "Cannot query devx port %d on device %s", 1204 spawn->phys_port, spawn->phys_dev_name); 1205 vport_info.query_flags = 0; 1206 } 1207 } 1208 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1209 priv->vport_meta_tag = vport_info.vport_meta_tag; 1210 priv->vport_meta_mask = vport_info.vport_meta_mask; 1211 if (!priv->vport_meta_mask) { 1212 DRV_LOG(ERR, 1213 "vport zero mask for port %d on bonding device %s", 1214 spawn->phys_port, spawn->phys_dev_name); 1215 err = ENOTSUP; 1216 goto error; 1217 } 1218 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1219 DRV_LOG(ERR, 1220 "Invalid vport tag for port %d on bonding device %s", 1221 spawn->phys_port, spawn->phys_dev_name); 1222 err = ENOTSUP; 1223 goto error; 1224 } 1225 } 1226 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1227 priv->vport_id = vport_info.vport_id; 1228 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1229 DRV_LOG(ERR, 1230 "Cannot deduce vport index for port %d on bonding device %s", 1231 spawn->phys_port, spawn->phys_dev_name); 1232 err = ENOTSUP; 1233 goto error; 1234 } else { 1235 /* 1236 * Suppose vport index in compatible way. Kernel/rdma_core 1237 * support single E-Switch per PF configurations only and 1238 * vport_id field contains the vport index for associated VF, 1239 * which is deduced from representor port name. 1240 * For example, let's have the IB device port 10, it has 1241 * attached network device eth0, which has port name attribute 1242 * pf0vf2, we can deduce the VF number as 2, and set vport index 1243 * as 3 (2+1). This assigning schema should be changed if the 1244 * multiple E-Switch instances per PF configurations or/and PCI 1245 * subfunctions are added. 1246 */ 1247 priv->vport_id = switch_info->representor ? 1248 switch_info->port_name + 1 : -1; 1249 } 1250 priv->representor_id = mlx5_representor_id_encode(switch_info, 1251 eth_da->type); 1252 /* 1253 * Look for sibling devices in order to reuse their switch domain 1254 * if any, otherwise allocate one. 1255 */ 1256 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1257 const struct mlx5_priv *opriv = 1258 rte_eth_devices[port_id].data->dev_private; 1259 1260 if (!opriv || 1261 opriv->sh != priv->sh || 1262 opriv->domain_id == 1263 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1264 continue; 1265 priv->domain_id = opriv->domain_id; 1266 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1267 priv->dev_port, priv->domain_id); 1268 break; 1269 } 1270 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1271 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1272 if (err) { 1273 err = rte_errno; 1274 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1275 strerror(rte_errno)); 1276 goto error; 1277 } 1278 own_domain_id = 1; 1279 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1280 priv->dev_port, priv->domain_id); 1281 } 1282 if (sh->cdev->config.devx) { 1283 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1284 1285 sh->steering_format_version = hca_attr->steering_format_version; 1286 #if defined(HAVE_MLX5DV_DR) && \ 1287 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ 1288 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) 1289 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1290 sh->config.dv_flow_en) { 1291 uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; 1292 /* 1293 * Meter needs two REG_C's for color match and pre-sfx 1294 * flow match. Here get the REG_C for color match. 1295 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1296 */ 1297 reg_c_mask &= 0xfc; 1298 if (__builtin_popcount(reg_c_mask) < 1) { 1299 priv->mtr_en = 0; 1300 DRV_LOG(WARNING, "No available register for" 1301 " meter."); 1302 } else { 1303 /* 1304 * The meter color register is used by the 1305 * flow-hit feature as well. 1306 * The flow-hit feature must use REG_C_3 1307 * Prefer REG_C_3 if it is available. 1308 */ 1309 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 1310 priv->mtr_color_reg = REG_C_3; 1311 else 1312 priv->mtr_color_reg = ffs(reg_c_mask) 1313 - 1 + REG_C_0; 1314 priv->mtr_en = 1; 1315 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1316 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1317 priv->mtr_color_reg); 1318 } 1319 } 1320 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1321 uint32_t log_obj_size = 1322 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1323 if (log_obj_size >= 1324 hca_attr->qos.log_meter_aso_granularity && 1325 log_obj_size <= 1326 hca_attr->qos.log_meter_aso_max_alloc) 1327 sh->meter_aso_en = 1; 1328 } 1329 if (priv->mtr_en) { 1330 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1331 if (err) { 1332 err = -err; 1333 goto error; 1334 } 1335 } 1336 if (hca_attr->flow.tunnel_header_0_1) 1337 sh->tunnel_header_0_1 = 1; 1338 if (hca_attr->flow.tunnel_header_2_3) 1339 sh->tunnel_header_2_3 = 1; 1340 #endif 1341 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1342 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { 1343 sh->flow_hit_aso_en = 1; 1344 err = mlx5_flow_aso_age_mng_init(sh); 1345 if (err) { 1346 err = -err; 1347 goto error; 1348 } 1349 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1350 } 1351 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1352 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1353 defined(HAVE_MLX5_DR_ACTION_ASO_CT) 1354 if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { 1355 err = mlx5_flow_aso_ct_mng_init(sh); 1356 if (err) { 1357 err = -err; 1358 goto error; 1359 } 1360 DRV_LOG(DEBUG, "CT ASO is supported."); 1361 sh->ct_aso_en = 1; 1362 } 1363 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1364 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1365 if (hca_attr->log_max_ft_sampler_num > 0 && 1366 sh->config.dv_flow_en) { 1367 priv->sampler_en = 1; 1368 DRV_LOG(DEBUG, "Sampler enabled!"); 1369 } else { 1370 priv->sampler_en = 0; 1371 if (!hca_attr->log_max_ft_sampler_num) 1372 DRV_LOG(WARNING, 1373 "No available register for sampler."); 1374 else 1375 DRV_LOG(DEBUG, "DV flow is not supported!"); 1376 } 1377 #endif 1378 } 1379 /* Process parameters and store port configuration on priv structure. */ 1380 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1381 if (err) { 1382 err = rte_errno; 1383 DRV_LOG(ERR, "Failed to process port configure: %s", 1384 strerror(rte_errno)); 1385 goto error; 1386 } 1387 eth_dev = rte_eth_dev_allocate(name); 1388 if (eth_dev == NULL) { 1389 DRV_LOG(ERR, "can not allocate rte ethdev"); 1390 err = ENOMEM; 1391 goto error; 1392 } 1393 if (priv->representor) { 1394 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1395 eth_dev->data->representor_id = priv->representor_id; 1396 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1397 struct mlx5_priv *opriv = 1398 rte_eth_devices[port_id].data->dev_private; 1399 if (opriv && 1400 opriv->master && 1401 opriv->domain_id == priv->domain_id && 1402 opriv->sh == priv->sh) { 1403 eth_dev->data->backer_port_id = port_id; 1404 break; 1405 } 1406 } 1407 if (port_id >= RTE_MAX_ETHPORTS) 1408 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1409 } 1410 priv->mp_id.port_id = eth_dev->data->port_id; 1411 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1412 /* 1413 * Store associated network device interface index. This index 1414 * is permanent throughout the lifetime of device. So, we may store 1415 * the ifindex here and use the cached value further. 1416 */ 1417 MLX5_ASSERT(spawn->ifindex); 1418 priv->if_index = spawn->ifindex; 1419 priv->lag_affinity_idx = sh->refcnt - 1; 1420 eth_dev->data->dev_private = priv; 1421 priv->dev_data = eth_dev->data; 1422 eth_dev->data->mac_addrs = priv->mac; 1423 eth_dev->device = dpdk_dev; 1424 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1425 /* Configure the first MAC address by default. */ 1426 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1427 DRV_LOG(ERR, 1428 "port %u cannot get MAC address, is mlx5_en" 1429 " loaded? (errno: %s)", 1430 eth_dev->data->port_id, strerror(rte_errno)); 1431 err = ENODEV; 1432 goto error; 1433 } 1434 DRV_LOG(INFO, 1435 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1436 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1437 #ifdef RTE_LIBRTE_MLX5_DEBUG 1438 { 1439 char ifname[MLX5_NAMESIZE]; 1440 1441 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1442 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1443 eth_dev->data->port_id, ifname); 1444 else 1445 DRV_LOG(DEBUG, "port %u ifname is unknown", 1446 eth_dev->data->port_id); 1447 } 1448 #endif 1449 /* Get actual MTU if possible. */ 1450 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1451 if (err) { 1452 err = rte_errno; 1453 goto error; 1454 } 1455 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1456 priv->mtu); 1457 /* Initialize burst functions to prevent crashes before link-up. */ 1458 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1459 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1460 eth_dev->dev_ops = &mlx5_dev_ops; 1461 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1462 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1463 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1464 /* Register MAC address. */ 1465 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1466 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1467 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1468 mlx5_ifindex(eth_dev), 1469 eth_dev->data->mac_addrs, 1470 MLX5_MAX_MAC_ADDRESSES); 1471 priv->ctrl_flows = 0; 1472 rte_spinlock_init(&priv->flow_list_lock); 1473 TAILQ_INIT(&priv->flow_meters); 1474 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1475 if (!priv->mtr_profile_tbl) 1476 goto error; 1477 /* Bring Ethernet device up. */ 1478 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1479 eth_dev->data->port_id); 1480 /* Read link status in case it is up and there will be no event. */ 1481 mlx5_link_update(eth_dev, 0); 1482 /* Watch LSC interrupts between port probe and port start. */ 1483 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1484 eth_dev->data->port_id; 1485 mlx5_set_link_up(eth_dev); 1486 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1487 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1488 if (sh->config.reclaim_mode) 1489 icfg[i].per_core_cache = 0; 1490 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1491 if (!priv->flows[i]) 1492 goto error; 1493 } 1494 /* Create context for virtual machine VLAN workaround. */ 1495 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1496 if (sh->config.dv_flow_en) { 1497 err = mlx5_alloc_shared_dr(priv); 1498 if (err) 1499 goto error; 1500 if (mlx5_flex_item_port_init(eth_dev) < 0) 1501 goto error; 1502 } 1503 if (mlx5_devx_obj_ops_en(sh)) { 1504 priv->obj_ops = devx_obj_ops; 1505 mlx5_queue_counter_id_prepare(eth_dev); 1506 priv->obj_ops.lb_dummy_queue_create = 1507 mlx5_rxq_ibv_obj_dummy_lb_create; 1508 priv->obj_ops.lb_dummy_queue_release = 1509 mlx5_rxq_ibv_obj_dummy_lb_release; 1510 } else if (spawn->max_port > UINT8_MAX) { 1511 /* Verbs can't support ports larger than 255 by design. */ 1512 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1513 err = ENOTSUP; 1514 goto error; 1515 } else { 1516 priv->obj_ops = ibv_obj_ops; 1517 } 1518 if (sh->config.tx_pp && 1519 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1520 /* 1521 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1522 * packet pacing and already checked above. 1523 * Hence, we should only make sure the SQs will be created 1524 * with DevX, not with Verbs. 1525 * Verbs allocates the SQ UAR on its own and it can't be shared 1526 * with Clock Queue UAR as required for Tx scheduling. 1527 */ 1528 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1529 err = ENODEV; 1530 goto error; 1531 } 1532 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1533 if (!priv->drop_queue.hrxq) 1534 goto error; 1535 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1536 mlx5_hrxq_create_cb, 1537 mlx5_hrxq_match_cb, 1538 mlx5_hrxq_remove_cb, 1539 mlx5_hrxq_clone_cb, 1540 mlx5_hrxq_clone_free_cb); 1541 if (!priv->hrxqs) 1542 goto error; 1543 rte_rwlock_init(&priv->ind_tbls_lock); 1544 if (priv->sh->config.dv_flow_en == 2) 1545 return eth_dev; 1546 /* Port representor shares the same max priority with pf port. */ 1547 if (!priv->sh->flow_priority_check_flag) { 1548 /* Supported Verbs flow priority number detection. */ 1549 err = mlx5_flow_discover_priorities(eth_dev); 1550 priv->sh->flow_max_priority = err; 1551 priv->sh->flow_priority_check_flag = 1; 1552 } else { 1553 err = priv->sh->flow_max_priority; 1554 } 1555 if (err < 0) { 1556 err = -err; 1557 goto error; 1558 } 1559 mlx5_set_metadata_mask(eth_dev); 1560 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1561 !priv->sh->dv_regc0_mask) { 1562 DRV_LOG(ERR, "metadata mode %u is not supported " 1563 "(no metadata reg_c[0] is available)", 1564 sh->config.dv_xmeta_en); 1565 err = ENOTSUP; 1566 goto error; 1567 } 1568 /* Query availability of metadata reg_c's. */ 1569 if (!priv->sh->metadata_regc_check_flag) { 1570 err = mlx5_flow_discover_mreg_c(eth_dev); 1571 if (err < 0) { 1572 err = -err; 1573 goto error; 1574 } 1575 } 1576 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1577 DRV_LOG(DEBUG, 1578 "port %u extensive metadata register is not supported", 1579 eth_dev->data->port_id); 1580 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1581 DRV_LOG(ERR, "metadata mode %u is not supported " 1582 "(no metadata registers available)", 1583 sh->config.dv_xmeta_en); 1584 err = ENOTSUP; 1585 goto error; 1586 } 1587 } 1588 if (sh->config.dv_flow_en && 1589 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1590 mlx5_flow_ext_mreg_supported(eth_dev) && 1591 priv->sh->dv_regc0_mask) { 1592 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1593 MLX5_FLOW_MREG_HTABLE_SZ, 1594 false, true, eth_dev, 1595 flow_dv_mreg_create_cb, 1596 flow_dv_mreg_match_cb, 1597 flow_dv_mreg_remove_cb, 1598 flow_dv_mreg_clone_cb, 1599 flow_dv_mreg_clone_free_cb); 1600 if (!priv->mreg_cp_tbl) { 1601 err = ENOMEM; 1602 goto error; 1603 } 1604 } 1605 rte_spinlock_init(&priv->shared_act_sl); 1606 mlx5_flow_counter_mode_config(eth_dev); 1607 mlx5_flow_drop_action_config(eth_dev); 1608 if (sh->config.dv_flow_en) 1609 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1610 return eth_dev; 1611 error: 1612 if (priv) { 1613 if (priv->mreg_cp_tbl) 1614 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1615 if (priv->sh) 1616 mlx5_os_free_shared_dr(priv); 1617 if (priv->nl_socket_route >= 0) 1618 close(priv->nl_socket_route); 1619 if (priv->vmwa_context) 1620 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1621 if (eth_dev && priv->drop_queue.hrxq) 1622 mlx5_drop_action_destroy(eth_dev); 1623 if (priv->mtr_profile_tbl) 1624 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1625 if (own_domain_id) 1626 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1627 if (priv->hrxqs) 1628 mlx5_list_destroy(priv->hrxqs); 1629 if (eth_dev && priv->flex_item_map) 1630 mlx5_flex_item_port_cleanup(eth_dev); 1631 mlx5_free(priv->ext_rxqs); 1632 mlx5_free(priv); 1633 if (eth_dev != NULL) 1634 eth_dev->data->dev_private = NULL; 1635 } 1636 if (eth_dev != NULL) { 1637 /* mac_addrs must not be freed alone because part of 1638 * dev_private 1639 **/ 1640 eth_dev->data->mac_addrs = NULL; 1641 rte_eth_dev_release_port(eth_dev); 1642 } 1643 if (sh) 1644 mlx5_free_shared_dev_ctx(sh); 1645 if (nl_rdma >= 0) 1646 close(nl_rdma); 1647 MLX5_ASSERT(err > 0); 1648 rte_errno = err; 1649 return NULL; 1650 } 1651 1652 /** 1653 * Comparison callback to sort device data. 1654 * 1655 * This is meant to be used with qsort(). 1656 * 1657 * @param a[in] 1658 * Pointer to pointer to first data object. 1659 * @param b[in] 1660 * Pointer to pointer to second data object. 1661 * 1662 * @return 1663 * 0 if both objects are equal, less than 0 if the first argument is less 1664 * than the second, greater than 0 otherwise. 1665 */ 1666 static int 1667 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1668 { 1669 const struct mlx5_switch_info *si_a = 1670 &((const struct mlx5_dev_spawn_data *)a)->info; 1671 const struct mlx5_switch_info *si_b = 1672 &((const struct mlx5_dev_spawn_data *)b)->info; 1673 int ret; 1674 1675 /* Master device first. */ 1676 ret = si_b->master - si_a->master; 1677 if (ret) 1678 return ret; 1679 /* Then representor devices. */ 1680 ret = si_b->representor - si_a->representor; 1681 if (ret) 1682 return ret; 1683 /* Unidentified devices come last in no specific order. */ 1684 if (!si_a->representor) 1685 return 0; 1686 /* Order representors by name. */ 1687 return si_a->port_name - si_b->port_name; 1688 } 1689 1690 /** 1691 * Match PCI information for possible slaves of bonding device. 1692 * 1693 * @param[in] ibdev_name 1694 * Name of Infiniband device. 1695 * @param[in] pci_dev 1696 * Pointer to primary PCI address structure to match. 1697 * @param[in] nl_rdma 1698 * Netlink RDMA group socket handle. 1699 * @param[in] owner 1700 * Representor owner PF index. 1701 * @param[out] bond_info 1702 * Pointer to bonding information. 1703 * 1704 * @return 1705 * negative value if no bonding device found, otherwise 1706 * positive index of slave PF in bonding. 1707 */ 1708 static int 1709 mlx5_device_bond_pci_match(const char *ibdev_name, 1710 const struct rte_pci_addr *pci_dev, 1711 int nl_rdma, uint16_t owner, 1712 struct mlx5_bond_info *bond_info) 1713 { 1714 char ifname[IF_NAMESIZE + 1]; 1715 unsigned int ifindex; 1716 unsigned int np, i; 1717 FILE *bond_file = NULL, *file; 1718 int pf = -1; 1719 int ret; 1720 uint8_t cur_guid[32] = {0}; 1721 uint8_t guid[32] = {0}; 1722 1723 /* 1724 * Try to get master device name. If something goes wrong suppose 1725 * the lack of kernel support and no bonding devices. 1726 */ 1727 memset(bond_info, 0, sizeof(*bond_info)); 1728 if (nl_rdma < 0) 1729 return -1; 1730 if (!strstr(ibdev_name, "bond")) 1731 return -1; 1732 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1733 if (!np) 1734 return -1; 1735 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1736 return -1; 1737 /* 1738 * The master device might not be on the predefined port(not on port 1739 * index 1, it is not guaranteed), we have to scan all Infiniband 1740 * device ports and find master. 1741 */ 1742 for (i = 1; i <= np; ++i) { 1743 /* Check whether Infiniband port is populated. */ 1744 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1745 if (!ifindex) 1746 continue; 1747 if (!if_indextoname(ifindex, ifname)) 1748 continue; 1749 /* Try to read bonding slave names from sysfs. */ 1750 MKSTR(slaves, 1751 "/sys/class/net/%s/master/bonding/slaves", ifname); 1752 bond_file = fopen(slaves, "r"); 1753 if (bond_file) 1754 break; 1755 } 1756 if (!bond_file) 1757 return -1; 1758 /* Use safe format to check maximal buffer length. */ 1759 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1760 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1761 char tmp_str[IF_NAMESIZE + 32]; 1762 struct rte_pci_addr pci_addr; 1763 struct mlx5_switch_info info; 1764 int ret; 1765 1766 /* Process slave interface names in the loop. */ 1767 snprintf(tmp_str, sizeof(tmp_str), 1768 "/sys/class/net/%s", ifname); 1769 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1770 DRV_LOG(WARNING, 1771 "Cannot get PCI address for netdev \"%s\".", 1772 ifname); 1773 continue; 1774 } 1775 /* Slave interface PCI address match found. */ 1776 snprintf(tmp_str, sizeof(tmp_str), 1777 "/sys/class/net/%s/phys_port_name", ifname); 1778 file = fopen(tmp_str, "rb"); 1779 if (!file) 1780 break; 1781 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1782 if (fscanf(file, "%32s", tmp_str) == 1) 1783 mlx5_translate_port_name(tmp_str, &info); 1784 fclose(file); 1785 /* Only process PF ports. */ 1786 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1787 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1788 continue; 1789 /* Check max bonding member. */ 1790 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1791 DRV_LOG(WARNING, "bonding index out of range, " 1792 "please increase MLX5_BOND_MAX_PORTS: %s", 1793 tmp_str); 1794 break; 1795 } 1796 /* Get ifindex. */ 1797 snprintf(tmp_str, sizeof(tmp_str), 1798 "/sys/class/net/%s/ifindex", ifname); 1799 file = fopen(tmp_str, "rb"); 1800 if (!file) 1801 break; 1802 ret = fscanf(file, "%u", &ifindex); 1803 fclose(file); 1804 if (ret != 1) 1805 break; 1806 /* Save bonding info. */ 1807 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1808 sizeof(bond_info->ports[0].ifname)); 1809 bond_info->ports[info.port_name].pci_addr = pci_addr; 1810 bond_info->ports[info.port_name].ifindex = ifindex; 1811 bond_info->n_port++; 1812 /* 1813 * Under socket direct mode, bonding will use 1814 * system_image_guid as identification. 1815 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1816 * All bonding members should have the same guid even if driver 1817 * is using PCIe BDF. 1818 */ 1819 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1820 if (ret < 0) 1821 break; 1822 else if (ret > 0) { 1823 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1824 owner == info.port_name && 1825 (owner != 0 || (owner == 0 && 1826 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1827 pf = info.port_name; 1828 } else if (pci_dev->domain == pci_addr.domain && 1829 pci_dev->bus == pci_addr.bus && 1830 pci_dev->devid == pci_addr.devid && 1831 ((pci_dev->function == 0 && 1832 pci_dev->function + owner == pci_addr.function) || 1833 (pci_dev->function == owner && 1834 pci_addr.function == owner))) 1835 pf = info.port_name; 1836 } 1837 if (pf >= 0) { 1838 /* Get bond interface info */ 1839 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1840 bond_info->ifname); 1841 if (ret) 1842 DRV_LOG(ERR, "unable to get bond info: %s", 1843 strerror(rte_errno)); 1844 else 1845 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1846 ifindex, bond_info->ifindex, bond_info->ifname); 1847 } 1848 if (owner == 0 && pf != 0) { 1849 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", 1850 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1851 pci_dev->function); 1852 } 1853 return pf; 1854 } 1855 1856 /** 1857 * Register a PCI device within bonding. 1858 * 1859 * This function spawns Ethernet devices out of a given PCI device and 1860 * bonding owner PF index. 1861 * 1862 * @param[in] cdev 1863 * Pointer to common mlx5 device structure. 1864 * @param[in] req_eth_da 1865 * Requested ethdev device argument. 1866 * @param[in] owner_id 1867 * Requested owner PF port ID within bonding device, default to 0. 1868 * @param[in, out] mkvlist 1869 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1870 * 1871 * @return 1872 * 0 on success, a negative errno value otherwise and rte_errno is set. 1873 */ 1874 static int 1875 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 1876 struct rte_eth_devargs *req_eth_da, 1877 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 1878 { 1879 struct ibv_device **ibv_list; 1880 /* 1881 * Number of found IB Devices matching with requested PCI BDF. 1882 * nd != 1 means there are multiple IB devices over the same 1883 * PCI device and we have representors and master. 1884 */ 1885 unsigned int nd = 0; 1886 /* 1887 * Number of found IB device Ports. nd = 1 and np = 1..n means 1888 * we have the single multiport IB device, and there may be 1889 * representors attached to some of found ports. 1890 */ 1891 unsigned int np = 0; 1892 /* 1893 * Number of DPDK ethernet devices to Spawn - either over 1894 * multiple IB devices or multiple ports of single IB device. 1895 * Actually this is the number of iterations to spawn. 1896 */ 1897 unsigned int ns = 0; 1898 /* 1899 * Bonding device 1900 * < 0 - no bonding device (single one) 1901 * >= 0 - bonding device (value is slave PF index) 1902 */ 1903 int bd = -1; 1904 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 1905 struct mlx5_dev_spawn_data *list = NULL; 1906 struct rte_eth_devargs eth_da = *req_eth_da; 1907 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 1908 struct mlx5_bond_info bond_info; 1909 int ret = -1; 1910 1911 errno = 0; 1912 ibv_list = mlx5_glue->get_device_list(&ret); 1913 if (!ibv_list) { 1914 rte_errno = errno ? errno : ENOSYS; 1915 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 1916 return -rte_errno; 1917 } 1918 /* 1919 * First scan the list of all Infiniband devices to find 1920 * matching ones, gathering into the list. 1921 */ 1922 struct ibv_device *ibv_match[ret + 1]; 1923 int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1924 int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1925 unsigned int i; 1926 1927 while (ret-- > 0) { 1928 struct rte_pci_addr pci_addr; 1929 1930 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 1931 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 1932 nl_rdma, owner_id, &bond_info); 1933 if (bd >= 0) { 1934 /* 1935 * Bonding device detected. Only one match is allowed, 1936 * the bonding is supported over multi-port IB device, 1937 * there should be no matches on representor PCI 1938 * functions or non VF LAG bonding devices with 1939 * specified address. 1940 */ 1941 if (nd) { 1942 DRV_LOG(ERR, 1943 "multiple PCI match on bonding device" 1944 "\"%s\" found", ibv_list[ret]->name); 1945 rte_errno = ENOENT; 1946 ret = -rte_errno; 1947 goto exit; 1948 } 1949 /* Amend owner pci address if owner PF ID specified. */ 1950 if (eth_da.nb_representor_ports) 1951 owner_pci.function += owner_id; 1952 DRV_LOG(INFO, 1953 "PCI information matches for slave %d bonding device \"%s\"", 1954 bd, ibv_list[ret]->name); 1955 ibv_match[nd++] = ibv_list[ret]; 1956 break; 1957 } else { 1958 /* Bonding device not found. */ 1959 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 1960 &pci_addr)) 1961 continue; 1962 if (owner_pci.domain != pci_addr.domain || 1963 owner_pci.bus != pci_addr.bus || 1964 owner_pci.devid != pci_addr.devid || 1965 owner_pci.function != pci_addr.function) 1966 continue; 1967 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 1968 ibv_list[ret]->name); 1969 ibv_match[nd++] = ibv_list[ret]; 1970 } 1971 } 1972 ibv_match[nd] = NULL; 1973 if (!nd) { 1974 /* No device matches, just complain and bail out. */ 1975 DRV_LOG(WARNING, 1976 "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT "," 1977 " are kernel drivers loaded?", 1978 owner_id, owner_pci.domain, owner_pci.bus, 1979 owner_pci.devid, owner_pci.function); 1980 rte_errno = ENOENT; 1981 ret = -rte_errno; 1982 goto exit; 1983 } 1984 if (nd == 1) { 1985 /* 1986 * Found single matching device may have multiple ports. 1987 * Each port may be representor, we have to check the port 1988 * number and check the representors existence. 1989 */ 1990 if (nl_rdma >= 0) 1991 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 1992 if (!np) 1993 DRV_LOG(WARNING, 1994 "Cannot get IB device \"%s\" ports number.", 1995 ibv_match[0]->name); 1996 if (bd >= 0 && !np) { 1997 DRV_LOG(ERR, "Cannot get ports for bonding device."); 1998 rte_errno = ENOENT; 1999 ret = -rte_errno; 2000 goto exit; 2001 } 2002 } 2003 /* Now we can determine the maximal amount of devices to be spawned. */ 2004 list = mlx5_malloc(MLX5_MEM_ZERO, 2005 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2006 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2007 if (!list) { 2008 DRV_LOG(ERR, "Spawn data array allocation failure."); 2009 rte_errno = ENOMEM; 2010 ret = -rte_errno; 2011 goto exit; 2012 } 2013 if (bd >= 0 || np > 1) { 2014 /* 2015 * Single IB device with multiple ports found, 2016 * it may be E-Switch master device and representors. 2017 * We have to perform identification through the ports. 2018 */ 2019 MLX5_ASSERT(nl_rdma >= 0); 2020 MLX5_ASSERT(ns == 0); 2021 MLX5_ASSERT(nd == 1); 2022 MLX5_ASSERT(np); 2023 for (i = 1; i <= np; ++i) { 2024 list[ns].bond_info = &bond_info; 2025 list[ns].max_port = np; 2026 list[ns].phys_port = i; 2027 list[ns].phys_dev_name = ibv_match[0]->name; 2028 list[ns].eth_dev = NULL; 2029 list[ns].pci_dev = pci_dev; 2030 list[ns].cdev = cdev; 2031 list[ns].pf_bond = bd; 2032 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2033 ibv_match[0]->name, 2034 i); 2035 if (!list[ns].ifindex) { 2036 /* 2037 * No network interface index found for the 2038 * specified port, it means there is no 2039 * representor on this port. It's OK, 2040 * there can be disabled ports, for example 2041 * if sriov_numvfs < sriov_totalvfs. 2042 */ 2043 continue; 2044 } 2045 ret = -1; 2046 if (nl_route >= 0) 2047 ret = mlx5_nl_switch_info(nl_route, 2048 list[ns].ifindex, 2049 &list[ns].info); 2050 if (ret || (!list[ns].info.representor && 2051 !list[ns].info.master)) { 2052 /* 2053 * We failed to recognize representors with 2054 * Netlink, let's try to perform the task 2055 * with sysfs. 2056 */ 2057 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2058 &list[ns].info); 2059 } 2060 if (!ret && bd >= 0) { 2061 switch (list[ns].info.name_type) { 2062 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2063 if (np == 1) { 2064 /* 2065 * Force standalone bonding 2066 * device for ROCE LAG 2067 * configurations. 2068 */ 2069 list[ns].info.master = 0; 2070 list[ns].info.representor = 0; 2071 } 2072 if (list[ns].info.port_name == bd) 2073 ns++; 2074 break; 2075 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2076 /* Fallthrough */ 2077 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2078 /* Fallthrough */ 2079 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2080 if (list[ns].info.pf_num == bd) 2081 ns++; 2082 break; 2083 default: 2084 break; 2085 } 2086 continue; 2087 } 2088 if (!ret && (list[ns].info.representor ^ 2089 list[ns].info.master)) 2090 ns++; 2091 } 2092 if (!ns) { 2093 DRV_LOG(ERR, 2094 "Unable to recognize master/representors on the IB device with multiple ports."); 2095 rte_errno = ENOENT; 2096 ret = -rte_errno; 2097 goto exit; 2098 } 2099 } else { 2100 /* 2101 * The existence of several matching entries (nd > 1) means 2102 * port representors have been instantiated. No existing Verbs 2103 * call nor sysfs entries can tell them apart, this can only 2104 * be done through Netlink calls assuming kernel drivers are 2105 * recent enough to support them. 2106 * 2107 * In the event of identification failure through Netlink, 2108 * try again through sysfs, then: 2109 * 2110 * 1. A single IB device matches (nd == 1) with single 2111 * port (np=0/1) and is not a representor, assume 2112 * no switch support. 2113 * 2114 * 2. Otherwise no safe assumptions can be made; 2115 * complain louder and bail out. 2116 */ 2117 for (i = 0; i != nd; ++i) { 2118 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2119 list[ns].bond_info = NULL; 2120 list[ns].max_port = 1; 2121 list[ns].phys_port = 1; 2122 list[ns].phys_dev_name = ibv_match[i]->name; 2123 list[ns].eth_dev = NULL; 2124 list[ns].pci_dev = pci_dev; 2125 list[ns].cdev = cdev; 2126 list[ns].pf_bond = -1; 2127 list[ns].ifindex = 0; 2128 if (nl_rdma >= 0) 2129 list[ns].ifindex = mlx5_nl_ifindex 2130 (nl_rdma, 2131 ibv_match[i]->name, 2132 1); 2133 if (!list[ns].ifindex) { 2134 char ifname[IF_NAMESIZE]; 2135 2136 /* 2137 * Netlink failed, it may happen with old 2138 * ib_core kernel driver (before 4.16). 2139 * We can assume there is old driver because 2140 * here we are processing single ports IB 2141 * devices. Let's try sysfs to retrieve 2142 * the ifindex. The method works for 2143 * master device only. 2144 */ 2145 if (nd > 1) { 2146 /* 2147 * Multiple devices found, assume 2148 * representors, can not distinguish 2149 * master/representor and retrieve 2150 * ifindex via sysfs. 2151 */ 2152 continue; 2153 } 2154 ret = mlx5_get_ifname_sysfs 2155 (ibv_match[i]->ibdev_path, ifname); 2156 if (!ret) 2157 list[ns].ifindex = 2158 if_nametoindex(ifname); 2159 if (!list[ns].ifindex) { 2160 /* 2161 * No network interface index found 2162 * for the specified device, it means 2163 * there it is neither representor 2164 * nor master. 2165 */ 2166 continue; 2167 } 2168 } 2169 ret = -1; 2170 if (nl_route >= 0) 2171 ret = mlx5_nl_switch_info(nl_route, 2172 list[ns].ifindex, 2173 &list[ns].info); 2174 if (ret || (!list[ns].info.representor && 2175 !list[ns].info.master)) { 2176 /* 2177 * We failed to recognize representors with 2178 * Netlink, let's try to perform the task 2179 * with sysfs. 2180 */ 2181 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2182 &list[ns].info); 2183 } 2184 if (!ret && (list[ns].info.representor ^ 2185 list[ns].info.master)) { 2186 ns++; 2187 } else if ((nd == 1) && 2188 !list[ns].info.representor && 2189 !list[ns].info.master) { 2190 /* 2191 * Single IB device with one physical port and 2192 * attached network device. 2193 * May be SRIOV is not enabled or there is no 2194 * representors. 2195 */ 2196 DRV_LOG(INFO, "No E-Switch support detected."); 2197 ns++; 2198 break; 2199 } 2200 } 2201 if (!ns) { 2202 DRV_LOG(ERR, 2203 "Unable to recognize master/representors on the multiple IB devices."); 2204 rte_errno = ENOENT; 2205 ret = -rte_errno; 2206 goto exit; 2207 } 2208 /* 2209 * New kernels may add the switch_id attribute for the case 2210 * there is no E-Switch and we wrongly recognized the only 2211 * device as master. Override this if there is the single 2212 * device with single port and new device name format present. 2213 */ 2214 if (nd == 1 && 2215 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2216 list[0].info.master = 0; 2217 list[0].info.representor = 0; 2218 } 2219 } 2220 MLX5_ASSERT(ns); 2221 /* 2222 * Sort list to probe devices in natural order for users convenience 2223 * (i.e. master first, then representors from lowest to highest ID). 2224 */ 2225 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2226 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2227 /* Set devargs default values. */ 2228 if (eth_da.nb_mh_controllers == 0) { 2229 eth_da.nb_mh_controllers = 1; 2230 eth_da.mh_controllers[0] = 0; 2231 } 2232 if (eth_da.nb_ports == 0 && ns > 0) { 2233 if (list[0].pf_bond >= 0 && list[0].info.representor) 2234 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2235 pci_dev->device.devargs->args); 2236 eth_da.nb_ports = 1; 2237 eth_da.ports[0] = list[0].info.pf_num; 2238 } 2239 if (eth_da.nb_representor_ports == 0) { 2240 eth_da.nb_representor_ports = 1; 2241 eth_da.representor_ports[0] = 0; 2242 } 2243 } 2244 for (i = 0; i != ns; ++i) { 2245 uint32_t restore; 2246 2247 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2248 mkvlist); 2249 if (!list[i].eth_dev) { 2250 if (rte_errno != EBUSY && rte_errno != EEXIST) 2251 break; 2252 /* Device is disabled or already spawned. Ignore it. */ 2253 continue; 2254 } 2255 restore = list[i].eth_dev->data->dev_flags; 2256 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2257 /** 2258 * Each representor has a dedicated interrupts vector. 2259 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2260 * representor eth_dev object because representor and PF 2261 * share the same PCI address. 2262 * Override representor device with a dedicated 2263 * interrupts handle here. 2264 * Representor interrupts handle is released in mlx5_dev_stop(). 2265 */ 2266 if (list[i].info.representor) { 2267 struct rte_intr_handle *intr_handle = 2268 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2269 if (intr_handle == NULL) { 2270 DRV_LOG(ERR, 2271 "port %u failed to allocate memory for interrupt handler " 2272 "Rx interrupts will not be supported", 2273 i); 2274 rte_errno = ENOMEM; 2275 ret = -rte_errno; 2276 goto exit; 2277 } 2278 list[i].eth_dev->intr_handle = intr_handle; 2279 } 2280 /* Restore non-PCI flags cleared by the above call. */ 2281 list[i].eth_dev->data->dev_flags |= restore; 2282 rte_eth_dev_probing_finish(list[i].eth_dev); 2283 } 2284 if (i != ns) { 2285 DRV_LOG(ERR, 2286 "probe of PCI device " PCI_PRI_FMT " aborted after" 2287 " encountering an error: %s", 2288 owner_pci.domain, owner_pci.bus, 2289 owner_pci.devid, owner_pci.function, 2290 strerror(rte_errno)); 2291 ret = -rte_errno; 2292 /* Roll back. */ 2293 while (i--) { 2294 if (!list[i].eth_dev) 2295 continue; 2296 mlx5_dev_close(list[i].eth_dev); 2297 /* mac_addrs must not be freed because in dev_private */ 2298 list[i].eth_dev->data->mac_addrs = NULL; 2299 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2300 } 2301 /* Restore original error. */ 2302 rte_errno = -ret; 2303 } else { 2304 ret = 0; 2305 } 2306 exit: 2307 /* 2308 * Do the routine cleanup: 2309 * - close opened Netlink sockets 2310 * - free allocated spawn data array 2311 * - free the Infiniband device list 2312 */ 2313 if (nl_rdma >= 0) 2314 close(nl_rdma); 2315 if (nl_route >= 0) 2316 close(nl_route); 2317 if (list) 2318 mlx5_free(list); 2319 MLX5_ASSERT(ibv_list); 2320 mlx5_glue->free_device_list(ibv_list); 2321 return ret; 2322 } 2323 2324 static int 2325 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2326 struct rte_eth_devargs *eth_da) 2327 { 2328 int ret = 0; 2329 2330 if (dev->devargs == NULL) 2331 return 0; 2332 memset(eth_da, 0, sizeof(*eth_da)); 2333 /* Parse representor information first from class argument. */ 2334 if (dev->devargs->cls_str) 2335 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2336 if (ret != 0) { 2337 DRV_LOG(ERR, "failed to parse device arguments: %s", 2338 dev->devargs->cls_str); 2339 return -rte_errno; 2340 } 2341 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) { 2342 /* Parse legacy device argument */ 2343 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2344 if (ret) { 2345 DRV_LOG(ERR, "failed to parse device arguments: %s", 2346 dev->devargs->args); 2347 return -rte_errno; 2348 } 2349 } 2350 return 0; 2351 } 2352 2353 /** 2354 * Callback to register a PCI device. 2355 * 2356 * This function spawns Ethernet devices out of a given PCI device. 2357 * 2358 * @param[in] cdev 2359 * Pointer to common mlx5 device structure. 2360 * @param[in, out] mkvlist 2361 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2362 * 2363 * @return 2364 * 0 on success, a negative errno value otherwise and rte_errno is set. 2365 */ 2366 static int 2367 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2368 struct mlx5_kvargs_ctrl *mkvlist) 2369 { 2370 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2371 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2372 int ret = 0; 2373 uint16_t p; 2374 2375 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2376 if (ret != 0) 2377 return ret; 2378 2379 if (eth_da.nb_ports > 0) { 2380 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2381 for (p = 0; p < eth_da.nb_ports; p++) { 2382 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2383 eth_da.ports[p], mkvlist); 2384 if (ret) { 2385 DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " " 2386 "aborted due to proding failure of PF %u", 2387 pci_dev->addr.domain, pci_dev->addr.bus, 2388 pci_dev->addr.devid, pci_dev->addr.function, 2389 eth_da.ports[p]); 2390 mlx5_net_remove(cdev); 2391 if (p != 0) 2392 break; 2393 } 2394 } 2395 } else { 2396 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2397 } 2398 return ret; 2399 } 2400 2401 /* Probe a single SF device on auxiliary bus, no representor support. */ 2402 static int 2403 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2404 struct mlx5_kvargs_ctrl *mkvlist) 2405 { 2406 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2407 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 2408 struct rte_device *dev = cdev->dev; 2409 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2410 struct rte_eth_dev *eth_dev; 2411 int ret = 0; 2412 2413 /* Parse ethdev devargs. */ 2414 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2415 if (ret != 0) 2416 return ret; 2417 /* Init spawn data. */ 2418 spawn.max_port = 1; 2419 spawn.phys_port = 1; 2420 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2421 ret = mlx5_auxiliary_get_ifindex(dev->name); 2422 if (ret < 0) { 2423 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2424 return ret; 2425 } 2426 spawn.ifindex = ret; 2427 spawn.cdev = cdev; 2428 /* Spawn device. */ 2429 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2430 if (eth_dev == NULL) 2431 return -rte_errno; 2432 /* Post create. */ 2433 eth_dev->intr_handle = adev->intr_handle; 2434 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2435 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2436 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2437 eth_dev->data->numa_node = dev->numa_node; 2438 } 2439 rte_eth_dev_probing_finish(eth_dev); 2440 return 0; 2441 } 2442 2443 /** 2444 * Net class driver callback to probe a device. 2445 * 2446 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2447 * 2448 * @param[in] cdev 2449 * Pointer to the common mlx5 device. 2450 * @param[in, out] mkvlist 2451 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2452 * 2453 * @return 2454 * 0 on success, a negative errno value otherwise and rte_errno is set. 2455 */ 2456 int 2457 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2458 struct mlx5_kvargs_ctrl *mkvlist) 2459 { 2460 int ret; 2461 2462 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2463 mlx5_pmd_socket_init(); 2464 ret = mlx5_init_once(); 2465 if (ret) { 2466 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2467 strerror(rte_errno)); 2468 return -rte_errno; 2469 } 2470 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2471 if (ret) { 2472 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2473 strerror(rte_errno)); 2474 return -rte_errno; 2475 } 2476 if (mlx5_dev_is_pci(cdev->dev)) 2477 return mlx5_os_pci_probe(cdev, mkvlist); 2478 else 2479 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2480 } 2481 2482 /** 2483 * Cleanup resources when the last device is closed. 2484 */ 2485 void 2486 mlx5_os_net_cleanup(void) 2487 { 2488 mlx5_pmd_socket_uninit(); 2489 } 2490 2491 /** 2492 * Install shared asynchronous device events handler. 2493 * This function is implemented to support event sharing 2494 * between multiple ports of single IB device. 2495 * 2496 * @param sh 2497 * Pointer to mlx5_dev_ctx_shared object. 2498 */ 2499 void 2500 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2501 { 2502 struct ibv_context *ctx = sh->cdev->ctx; 2503 int nlsk_fd; 2504 2505 sh->intr_handle = mlx5_os_interrupt_handler_create 2506 (RTE_INTR_INSTANCE_F_SHARED, true, 2507 ctx->async_fd, mlx5_dev_interrupt_handler, sh); 2508 if (!sh->intr_handle) { 2509 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2510 return; 2511 } 2512 nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK); 2513 if (nlsk_fd < 0) { 2514 DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s", 2515 rte_strerror(rte_errno)); 2516 return; 2517 } 2518 sh->intr_handle_nl = mlx5_os_interrupt_handler_create 2519 (RTE_INTR_INSTANCE_F_SHARED, true, 2520 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh); 2521 if (sh->intr_handle_nl == NULL) { 2522 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2523 return; 2524 } 2525 if (sh->cdev->config.devx) { 2526 #ifdef HAVE_IBV_DEVX_ASYNC 2527 struct mlx5dv_devx_cmd_comp *devx_comp; 2528 2529 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2530 devx_comp = sh->devx_comp; 2531 if (!devx_comp) { 2532 DRV_LOG(INFO, "failed to allocate devx_comp."); 2533 return; 2534 } 2535 sh->intr_handle_devx = mlx5_os_interrupt_handler_create 2536 (RTE_INTR_INSTANCE_F_SHARED, true, 2537 devx_comp->fd, 2538 mlx5_dev_interrupt_handler_devx, sh); 2539 if (!sh->intr_handle_devx) { 2540 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2541 return; 2542 } 2543 #endif /* HAVE_IBV_DEVX_ASYNC */ 2544 } 2545 } 2546 2547 /** 2548 * Uninstall shared asynchronous device events handler. 2549 * This function is implemented to support event sharing 2550 * between multiple ports of single IB device. 2551 * 2552 * @param dev 2553 * Pointer to mlx5_dev_ctx_shared object. 2554 */ 2555 void 2556 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2557 { 2558 mlx5_os_interrupt_handler_destroy(sh->intr_handle, 2559 mlx5_dev_interrupt_handler, sh); 2560 mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl, 2561 mlx5_dev_interrupt_handler_nl, sh); 2562 #ifdef HAVE_IBV_DEVX_ASYNC 2563 mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx, 2564 mlx5_dev_interrupt_handler_devx, sh); 2565 if (sh->devx_comp) 2566 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2567 #endif 2568 } 2569 2570 /** 2571 * Read statistics by a named counter. 2572 * 2573 * @param[in] priv 2574 * Pointer to the private device data structure. 2575 * @param[in] ctr_name 2576 * Pointer to the name of the statistic counter to read 2577 * @param[out] stat 2578 * Pointer to read statistic value. 2579 * @return 2580 * 0 on success and stat is valud, 1 if failed to read the value 2581 * rte_errno is set. 2582 * 2583 */ 2584 int 2585 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2586 uint64_t *stat) 2587 { 2588 int fd; 2589 2590 if (priv->sh) { 2591 if (priv->q_counters != NULL && 2592 strcmp(ctr_name, "out_of_buffer") == 0) 2593 return mlx5_devx_cmd_queue_counter_query 2594 (priv->q_counters, 0, (uint32_t *)stat); 2595 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2596 priv->sh->ibdev_path, 2597 priv->dev_port, 2598 ctr_name); 2599 fd = open(path, O_RDONLY); 2600 /* 2601 * in switchdev the file location is not per port 2602 * but rather in <ibdev_path>/hw_counters/<file_name>. 2603 */ 2604 if (fd == -1) { 2605 MKSTR(path1, "%s/hw_counters/%s", 2606 priv->sh->ibdev_path, 2607 ctr_name); 2608 fd = open(path1, O_RDONLY); 2609 } 2610 if (fd != -1) { 2611 char buf[21] = {'\0'}; 2612 ssize_t n = read(fd, buf, sizeof(buf)); 2613 2614 close(fd); 2615 if (n != -1) { 2616 *stat = strtoull(buf, NULL, 10); 2617 return 0; 2618 } 2619 } 2620 } 2621 *stat = 0; 2622 return 1; 2623 } 2624 2625 /** 2626 * Remove a MAC address from device 2627 * 2628 * @param dev 2629 * Pointer to Ethernet device structure. 2630 * @param index 2631 * MAC address index. 2632 */ 2633 void 2634 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2635 { 2636 struct mlx5_priv *priv = dev->data->dev_private; 2637 const int vf = priv->sh->dev_cap.vf; 2638 2639 if (vf) 2640 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2641 mlx5_ifindex(dev), priv->mac_own, 2642 &dev->data->mac_addrs[index], index); 2643 } 2644 2645 /** 2646 * Adds a MAC address to the device 2647 * 2648 * @param dev 2649 * Pointer to Ethernet device structure. 2650 * @param mac_addr 2651 * MAC address to register. 2652 * @param index 2653 * MAC address index. 2654 * 2655 * @return 2656 * 0 on success, a negative errno value otherwise 2657 */ 2658 int 2659 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2660 uint32_t index) 2661 { 2662 struct mlx5_priv *priv = dev->data->dev_private; 2663 const int vf = priv->sh->dev_cap.vf; 2664 int ret = 0; 2665 2666 if (vf) 2667 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2668 mlx5_ifindex(dev), priv->mac_own, 2669 mac, index); 2670 return ret; 2671 } 2672 2673 /** 2674 * Modify a VF MAC address 2675 * 2676 * @param priv 2677 * Pointer to device private data. 2678 * @param mac_addr 2679 * MAC address to modify into. 2680 * @param iface_idx 2681 * Net device interface index 2682 * @param vf_index 2683 * VF index 2684 * 2685 * @return 2686 * 0 on success, a negative errno value otherwise 2687 */ 2688 int 2689 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2690 unsigned int iface_idx, 2691 struct rte_ether_addr *mac_addr, 2692 int vf_index) 2693 { 2694 return mlx5_nl_vf_mac_addr_modify 2695 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2696 } 2697 2698 /** 2699 * Set device promiscuous mode 2700 * 2701 * @param dev 2702 * Pointer to Ethernet device structure. 2703 * @param enable 2704 * 0 - promiscuous is disabled, otherwise - enabled 2705 * 2706 * @return 2707 * 0 on success, a negative error value otherwise 2708 */ 2709 int 2710 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2711 { 2712 struct mlx5_priv *priv = dev->data->dev_private; 2713 2714 return mlx5_nl_promisc(priv->nl_socket_route, 2715 mlx5_ifindex(dev), !!enable); 2716 } 2717 2718 /** 2719 * Set device promiscuous mode 2720 * 2721 * @param dev 2722 * Pointer to Ethernet device structure. 2723 * @param enable 2724 * 0 - all multicase is disabled, otherwise - enabled 2725 * 2726 * @return 2727 * 0 on success, a negative error value otherwise 2728 */ 2729 int 2730 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2731 { 2732 struct mlx5_priv *priv = dev->data->dev_private; 2733 2734 return mlx5_nl_allmulti(priv->nl_socket_route, 2735 mlx5_ifindex(dev), !!enable); 2736 } 2737 2738 /** 2739 * Flush device MAC addresses 2740 * 2741 * @param dev 2742 * Pointer to Ethernet device structure. 2743 * 2744 */ 2745 void 2746 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2747 { 2748 struct mlx5_priv *priv = dev->data->dev_private; 2749 2750 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2751 dev->data->mac_addrs, 2752 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2753 } 2754