1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <rte_ethdev_driver.h> 20 #include <rte_ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <rte_bus_pci.h> 23 #include <rte_common.h> 24 #include <rte_kvargs.h> 25 #include <rte_rwlock.h> 26 #include <rte_spinlock.h> 27 #include <rte_string_fns.h> 28 #include <rte_alarm.h> 29 #include <rte_eal_paging.h> 30 31 #include <mlx5_glue.h> 32 #include <mlx5_devx_cmds.h> 33 #include <mlx5_common.h> 34 #include <mlx5_common_mp.h> 35 #include <mlx5_common_mr.h> 36 #include <mlx5_malloc.h> 37 38 #include "mlx5_defs.h" 39 #include "mlx5.h" 40 #include "mlx5_common_os.h" 41 #include "mlx5_utils.h" 42 #include "mlx5_rxtx.h" 43 #include "mlx5_autoconf.h" 44 #include "mlx5_mr.h" 45 #include "mlx5_flow.h" 46 #include "rte_pmd_mlx5.h" 47 #include "mlx5_verbs.h" 48 #include "mlx5_nl.h" 49 #include "mlx5_devx.h" 50 51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 52 53 #ifndef HAVE_IBV_MLX5_MOD_MPW 54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 56 #endif 57 58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 60 #endif 61 62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 63 64 /* Spinlock for mlx5_shared_data allocation. */ 65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 66 67 /* Process local data for secondary processes. */ 68 static struct mlx5_local_data mlx5_local_data; 69 70 /** 71 * Set the completion channel file descriptor interrupt as non-blocking. 72 * 73 * @param[in] rxq_obj 74 * Pointer to RQ channel object, which includes the channel fd 75 * 76 * @param[out] fd 77 * The file descriptor (representing the intetrrupt) used in this channel. 78 * 79 * @return 80 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 81 */ 82 int 83 mlx5_os_set_nonblock_channel_fd(int fd) 84 { 85 int flags; 86 87 flags = fcntl(fd, F_GETFL); 88 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 89 } 90 91 /** 92 * Get mlx5 device attributes. The glue function query_device_ex() is called 93 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 94 * device attributes from the glue out parameter. 95 * 96 * @param dev 97 * Pointer to ibv context. 98 * 99 * @param device_attr 100 * Pointer to mlx5 device attributes. 101 * 102 * @return 103 * 0 on success, non zero error number otherwise 104 */ 105 int 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 107 { 108 int err; 109 struct ibv_device_attr_ex attr_ex; 110 memset(device_attr, 0, sizeof(*device_attr)); 111 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 112 if (err) 113 return err; 114 115 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 116 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 117 device_attr->max_sge = attr_ex.orig_attr.max_sge; 118 device_attr->max_cq = attr_ex.orig_attr.max_cq; 119 device_attr->max_qp = attr_ex.orig_attr.max_qp; 120 device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 121 device_attr->max_rwq_indirection_table_size = 122 attr_ex.rss_caps.max_rwq_indirection_table_size; 123 device_attr->max_tso = attr_ex.tso_caps.max_tso; 124 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 125 126 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 127 err = mlx5_glue->dv_query_device(ctx, &dv_attr); 128 if (err) 129 return err; 130 131 device_attr->flags = dv_attr.flags; 132 device_attr->comp_mask = dv_attr.comp_mask; 133 #ifdef HAVE_IBV_MLX5_MOD_SWP 134 device_attr->sw_parsing_offloads = 135 dv_attr.sw_parsing_caps.sw_parsing_offloads; 136 #endif 137 device_attr->min_single_stride_log_num_of_bytes = 138 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 139 device_attr->max_single_stride_log_num_of_bytes = 140 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 141 device_attr->min_single_wqe_log_num_of_strides = 142 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 143 device_attr->max_single_wqe_log_num_of_strides = 144 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 145 device_attr->stride_supported_qpts = 146 dv_attr.striding_rq_caps.supported_qpts; 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 148 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 149 #endif 150 151 return err; 152 } 153 154 /** 155 * Verbs callback to allocate a memory. This function should allocate the space 156 * according to the size provided residing inside a huge page. 157 * Please note that all allocation must respect the alignment from libmlx5 158 * (i.e. currently rte_mem_page_size()). 159 * 160 * @param[in] size 161 * The size in bytes of the memory to allocate. 162 * @param[in] data 163 * A pointer to the callback data. 164 * 165 * @return 166 * Allocated buffer, NULL otherwise and rte_errno is set. 167 */ 168 static void * 169 mlx5_alloc_verbs_buf(size_t size, void *data) 170 { 171 struct mlx5_priv *priv = data; 172 void *ret; 173 unsigned int socket = SOCKET_ID_ANY; 174 size_t alignment = rte_mem_page_size(); 175 if (alignment == (size_t)-1) { 176 DRV_LOG(ERR, "Failed to get mem page size"); 177 rte_errno = ENOMEM; 178 return NULL; 179 } 180 181 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { 182 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 183 184 socket = ctrl->socket; 185 } else if (priv->verbs_alloc_ctx.type == 186 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) { 187 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 188 189 socket = ctrl->socket; 190 } 191 MLX5_ASSERT(data != NULL); 192 ret = mlx5_malloc(0, size, alignment, socket); 193 if (!ret && size) 194 rte_errno = ENOMEM; 195 return ret; 196 } 197 198 /** 199 * Verbs callback to free a memory. 200 * 201 * @param[in] ptr 202 * A pointer to the memory to free. 203 * @param[in] data 204 * A pointer to the callback data. 205 */ 206 static void 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) 208 { 209 MLX5_ASSERT(data != NULL); 210 mlx5_free(ptr); 211 } 212 213 /** 214 * Initialize DR related data within private structure. 215 * Routine checks the reference counter and does actual 216 * resources creation/initialization only if counter is zero. 217 * 218 * @param[in] priv 219 * Pointer to the private device data structure. 220 * 221 * @return 222 * Zero on success, positive error code otherwise. 223 */ 224 static int 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 226 { 227 struct mlx5_dev_ctx_shared *sh = priv->sh; 228 char s[MLX5_HLIST_NAMESIZE]; 229 int err = 0; 230 231 if (!sh->flow_tbls) 232 err = mlx5_alloc_table_hash_list(priv); 233 else 234 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n", 235 (void *)sh->flow_tbls); 236 if (err) 237 return err; 238 /* Create tags hash list table. */ 239 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); 240 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE); 241 if (!sh->tag_table) { 242 DRV_LOG(ERR, "tags with hash creation failed."); 243 err = ENOMEM; 244 goto error; 245 } 246 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); 247 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ); 248 if (!sh->modify_cmds) { 249 DRV_LOG(ERR, "hdr modify hash creation failed"); 250 err = ENOMEM; 251 goto error; 252 } 253 snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name); 254 sh->encaps_decaps = mlx5_hlist_create(s, 255 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ); 256 if (!sh->encaps_decaps) { 257 DRV_LOG(ERR, "encap decap hash creation failed"); 258 err = ENOMEM; 259 goto error; 260 } 261 #ifdef HAVE_MLX5DV_DR 262 void *domain; 263 264 if (sh->dv_refcnt) { 265 /* Shared DV/DR structures is already initialized. */ 266 sh->dv_refcnt++; 267 priv->dr_shared = 1; 268 return 0; 269 } 270 /* Reference counter is zero, we should initialize structures. */ 271 domain = mlx5_glue->dr_create_domain(sh->ctx, 272 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 273 if (!domain) { 274 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 275 err = errno; 276 goto error; 277 } 278 sh->rx_domain = domain; 279 domain = mlx5_glue->dr_create_domain(sh->ctx, 280 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 281 if (!domain) { 282 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 283 err = errno; 284 goto error; 285 } 286 pthread_mutex_init(&sh->dv_mutex, NULL); 287 sh->tx_domain = domain; 288 #ifdef HAVE_MLX5DV_DR_ESWITCH 289 if (priv->config.dv_esw_en) { 290 domain = mlx5_glue->dr_create_domain 291 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); 292 if (!domain) { 293 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 294 err = errno; 295 goto error; 296 } 297 sh->fdb_domain = domain; 298 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); 299 } 300 #endif 301 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 302 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 303 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 304 if (sh->fdb_domain) 305 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 306 } 307 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 308 #endif /* HAVE_MLX5DV_DR */ 309 sh->dv_refcnt++; 310 priv->dr_shared = 1; 311 return 0; 312 error: 313 /* Rollback the created objects. */ 314 if (sh->rx_domain) { 315 mlx5_glue->dr_destroy_domain(sh->rx_domain); 316 sh->rx_domain = NULL; 317 } 318 if (sh->tx_domain) { 319 mlx5_glue->dr_destroy_domain(sh->tx_domain); 320 sh->tx_domain = NULL; 321 } 322 if (sh->fdb_domain) { 323 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 324 sh->fdb_domain = NULL; 325 } 326 if (sh->esw_drop_action) { 327 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 328 sh->esw_drop_action = NULL; 329 } 330 if (sh->pop_vlan_action) { 331 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 332 sh->pop_vlan_action = NULL; 333 } 334 if (sh->encaps_decaps) { 335 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL); 336 sh->encaps_decaps = NULL; 337 } 338 if (sh->modify_cmds) { 339 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 340 sh->modify_cmds = NULL; 341 } 342 if (sh->tag_table) { 343 /* tags should be destroyed with flow before. */ 344 mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 345 sh->tag_table = NULL; 346 } 347 mlx5_free_table_hash_list(priv); 348 return err; 349 } 350 351 /** 352 * Destroy DR related data within private structure. 353 * 354 * @param[in] priv 355 * Pointer to the private device data structure. 356 */ 357 void 358 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 359 { 360 struct mlx5_dev_ctx_shared *sh; 361 362 if (!priv->dr_shared) 363 return; 364 priv->dr_shared = 0; 365 sh = priv->sh; 366 MLX5_ASSERT(sh); 367 #ifdef HAVE_MLX5DV_DR 368 MLX5_ASSERT(sh->dv_refcnt); 369 if (sh->dv_refcnt && --sh->dv_refcnt) 370 return; 371 if (sh->rx_domain) { 372 mlx5_glue->dr_destroy_domain(sh->rx_domain); 373 sh->rx_domain = NULL; 374 } 375 if (sh->tx_domain) { 376 mlx5_glue->dr_destroy_domain(sh->tx_domain); 377 sh->tx_domain = NULL; 378 } 379 #ifdef HAVE_MLX5DV_DR_ESWITCH 380 if (sh->fdb_domain) { 381 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 382 sh->fdb_domain = NULL; 383 } 384 if (sh->esw_drop_action) { 385 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 386 sh->esw_drop_action = NULL; 387 } 388 #endif 389 if (sh->pop_vlan_action) { 390 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 391 sh->pop_vlan_action = NULL; 392 } 393 pthread_mutex_destroy(&sh->dv_mutex); 394 #endif /* HAVE_MLX5DV_DR */ 395 if (sh->encaps_decaps) { 396 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL); 397 sh->encaps_decaps = NULL; 398 } 399 if (sh->modify_cmds) { 400 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 401 sh->modify_cmds = NULL; 402 } 403 if (sh->tag_table) { 404 /* tags should be destroyed with flow before. */ 405 mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 406 sh->tag_table = NULL; 407 } 408 mlx5_free_table_hash_list(priv); 409 } 410 411 /** 412 * Initialize shared data between primary and secondary process. 413 * 414 * A memzone is reserved by primary process and secondary processes attach to 415 * the memzone. 416 * 417 * @return 418 * 0 on success, a negative errno value otherwise and rte_errno is set. 419 */ 420 static int 421 mlx5_init_shared_data(void) 422 { 423 const struct rte_memzone *mz; 424 int ret = 0; 425 426 rte_spinlock_lock(&mlx5_shared_data_lock); 427 if (mlx5_shared_data == NULL) { 428 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 429 /* Allocate shared memory. */ 430 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 431 sizeof(*mlx5_shared_data), 432 SOCKET_ID_ANY, 0); 433 if (mz == NULL) { 434 DRV_LOG(ERR, 435 "Cannot allocate mlx5 shared data"); 436 ret = -rte_errno; 437 goto error; 438 } 439 mlx5_shared_data = mz->addr; 440 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 441 rte_spinlock_init(&mlx5_shared_data->lock); 442 } else { 443 /* Lookup allocated shared memory. */ 444 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 445 if (mz == NULL) { 446 DRV_LOG(ERR, 447 "Cannot attach mlx5 shared data"); 448 ret = -rte_errno; 449 goto error; 450 } 451 mlx5_shared_data = mz->addr; 452 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 453 } 454 } 455 error: 456 rte_spinlock_unlock(&mlx5_shared_data_lock); 457 return ret; 458 } 459 460 /** 461 * PMD global initialization. 462 * 463 * Independent from individual device, this function initializes global 464 * per-PMD data structures distinguishing primary and secondary processes. 465 * Hence, each initialization is called once per a process. 466 * 467 * @return 468 * 0 on success, a negative errno value otherwise and rte_errno is set. 469 */ 470 static int 471 mlx5_init_once(void) 472 { 473 struct mlx5_shared_data *sd; 474 struct mlx5_local_data *ld = &mlx5_local_data; 475 int ret = 0; 476 477 if (mlx5_init_shared_data()) 478 return -rte_errno; 479 sd = mlx5_shared_data; 480 MLX5_ASSERT(sd); 481 rte_spinlock_lock(&sd->lock); 482 switch (rte_eal_process_type()) { 483 case RTE_PROC_PRIMARY: 484 if (sd->init_done) 485 break; 486 LIST_INIT(&sd->mem_event_cb_list); 487 rte_rwlock_init(&sd->mem_event_rwlock); 488 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", 489 mlx5_mr_mem_event_cb, NULL); 490 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 491 mlx5_mp_os_primary_handle); 492 if (ret) 493 goto out; 494 sd->init_done = true; 495 break; 496 case RTE_PROC_SECONDARY: 497 if (ld->init_done) 498 break; 499 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 500 mlx5_mp_os_secondary_handle); 501 if (ret) 502 goto out; 503 ++sd->secondary_cnt; 504 ld->init_done = true; 505 break; 506 default: 507 break; 508 } 509 out: 510 rte_spinlock_unlock(&sd->lock); 511 return ret; 512 } 513 514 /** 515 * Create the Tx queue DevX/Verbs object. 516 * 517 * @param dev 518 * Pointer to Ethernet device. 519 * @param idx 520 * Queue index in DPDK Tx queue array. 521 * 522 * @return 523 * 0 on success, a negative errno value otherwise and rte_errno is set. 524 */ 525 static int 526 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx) 527 { 528 struct mlx5_priv *priv = dev->data->dev_private; 529 struct mlx5_txq_data *txq_data = (*priv->txqs)[idx]; 530 struct mlx5_txq_ctrl *txq_ctrl = 531 container_of(txq_data, struct mlx5_txq_ctrl, txq); 532 533 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) 534 return mlx5_txq_devx_obj_new(dev, idx); 535 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 536 if (!priv->config.dv_esw_en) 537 return mlx5_txq_devx_obj_new(dev, idx); 538 #endif 539 return mlx5_txq_ibv_obj_new(dev, idx); 540 } 541 542 /** 543 * Release an Tx DevX/verbs queue object. 544 * 545 * @param txq_obj 546 * DevX/Verbs Tx queue object. 547 */ 548 static void 549 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj) 550 { 551 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) { 552 mlx5_txq_devx_obj_release(txq_obj); 553 return; 554 } 555 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 556 if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) { 557 mlx5_txq_devx_obj_release(txq_obj); 558 return; 559 } 560 #endif 561 mlx5_txq_ibv_obj_release(txq_obj); 562 } 563 564 /** 565 * DV flow counter mode detect and config. 566 * 567 * @param dev 568 * Pointer to rte_eth_dev structure. 569 * 570 */ 571 static void 572 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) 573 { 574 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 575 struct mlx5_priv *priv = dev->data->dev_private; 576 577 /* If devx is not supported or not DV mode, counters are not working. */ 578 if (!priv->config.devx || !priv->config.dv_flow_en) 579 return; 580 #ifndef HAVE_IBV_DEVX_ASYNC 581 priv->counter_fallback = 1; 582 #else 583 priv->counter_fallback = 0; 584 if (!priv->config.hca_attr.flow_counters_dump || 585 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) || 586 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP)) 587 priv->counter_fallback = 1; 588 #endif 589 if (priv->counter_fallback) 590 DRV_LOG(INFO, "Use fall-back DV counter management. Flow " 591 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.", 592 priv->config.hca_attr.flow_counters_dump, 593 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap); 594 #endif 595 } 596 597 /** 598 * Spawn an Ethernet device from Verbs information. 599 * 600 * @param dpdk_dev 601 * Backing DPDK device. 602 * @param spawn 603 * Verbs device parameters (name, port, switch_info) to spawn. 604 * @param config 605 * Device configuration parameters. 606 * 607 * @return 608 * A valid Ethernet device object on success, NULL otherwise and rte_errno 609 * is set. The following errors are defined: 610 * 611 * EBUSY: device is not supposed to be spawned. 612 * EEXIST: device is already spawned 613 */ 614 static struct rte_eth_dev * 615 mlx5_dev_spawn(struct rte_device *dpdk_dev, 616 struct mlx5_dev_spawn_data *spawn, 617 struct mlx5_dev_config *config) 618 { 619 const struct mlx5_switch_info *switch_info = &spawn->info; 620 struct mlx5_dev_ctx_shared *sh = NULL; 621 struct ibv_port_attr port_attr; 622 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 623 struct rte_eth_dev *eth_dev = NULL; 624 struct mlx5_priv *priv = NULL; 625 int err = 0; 626 unsigned int hw_padding = 0; 627 unsigned int mps; 628 unsigned int cqe_comp; 629 unsigned int cqe_pad = 0; 630 unsigned int tunnel_en = 0; 631 unsigned int mpls_en = 0; 632 unsigned int swp = 0; 633 unsigned int mprq = 0; 634 unsigned int mprq_min_stride_size_n = 0; 635 unsigned int mprq_max_stride_size_n = 0; 636 unsigned int mprq_min_stride_num_n = 0; 637 unsigned int mprq_max_stride_num_n = 0; 638 struct rte_ether_addr mac; 639 char name[RTE_ETH_NAME_MAX_LEN]; 640 int own_domain_id = 0; 641 uint16_t port_id; 642 unsigned int i; 643 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 644 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; 645 #endif 646 647 /* Determine if this port representor is supposed to be spawned. */ 648 if (switch_info->representor && dpdk_dev->devargs) { 649 struct rte_eth_devargs eth_da; 650 651 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); 652 if (err) { 653 rte_errno = -err; 654 DRV_LOG(ERR, "failed to process device arguments: %s", 655 strerror(rte_errno)); 656 return NULL; 657 } 658 for (i = 0; i < eth_da.nb_representor_ports; ++i) 659 if (eth_da.representor_ports[i] == 660 (uint16_t)switch_info->port_name) 661 break; 662 if (i == eth_da.nb_representor_ports) { 663 rte_errno = EBUSY; 664 return NULL; 665 } 666 } 667 /* Build device name. */ 668 if (spawn->pf_bond < 0) { 669 /* Single device. */ 670 if (!switch_info->representor) 671 strlcpy(name, dpdk_dev->name, sizeof(name)); 672 else 673 snprintf(name, sizeof(name), "%s_representor_%u", 674 dpdk_dev->name, switch_info->port_name); 675 } else { 676 /* Bonding device. */ 677 if (!switch_info->representor) 678 snprintf(name, sizeof(name), "%s_%s", 679 dpdk_dev->name, 680 mlx5_os_get_dev_device_name(spawn->phys_dev)); 681 else 682 snprintf(name, sizeof(name), "%s_%s_representor_%u", 683 dpdk_dev->name, 684 mlx5_os_get_dev_device_name(spawn->phys_dev), 685 switch_info->port_name); 686 } 687 /* check if the device is already spawned */ 688 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 689 rte_errno = EEXIST; 690 return NULL; 691 } 692 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 693 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 694 struct mlx5_mp_id mp_id; 695 696 eth_dev = rte_eth_dev_attach_secondary(name); 697 if (eth_dev == NULL) { 698 DRV_LOG(ERR, "can not attach rte ethdev"); 699 rte_errno = ENOMEM; 700 return NULL; 701 } 702 eth_dev->device = dpdk_dev; 703 eth_dev->dev_ops = &mlx5_os_dev_sec_ops; 704 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 705 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 706 err = mlx5_proc_priv_init(eth_dev); 707 if (err) 708 return NULL; 709 mp_id.port_id = eth_dev->data->port_id; 710 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 711 /* Receive command fd from primary process */ 712 err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 713 if (err < 0) 714 goto err_secondary; 715 /* Remap UAR for Tx queues. */ 716 err = mlx5_tx_uar_init_secondary(eth_dev, err); 717 if (err) 718 goto err_secondary; 719 /* 720 * Ethdev pointer is still required as input since 721 * the primary device is not accessible from the 722 * secondary process. 723 */ 724 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 725 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 726 return eth_dev; 727 err_secondary: 728 mlx5_dev_close(eth_dev); 729 return NULL; 730 } 731 /* 732 * Some parameters ("tx_db_nc" in particularly) are needed in 733 * advance to create dv/verbs device context. We proceed the 734 * devargs here to get ones, and later proceed devargs again 735 * to override some hardware settings. 736 */ 737 err = mlx5_args(config, dpdk_dev->devargs); 738 if (err) { 739 err = rte_errno; 740 DRV_LOG(ERR, "failed to process device arguments: %s", 741 strerror(rte_errno)); 742 goto error; 743 } 744 mlx5_malloc_mem_select(config->sys_mem_en); 745 sh = mlx5_alloc_shared_dev_ctx(spawn, config); 746 if (!sh) 747 return NULL; 748 config->devx = sh->devx; 749 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 750 config->dest_tir = 1; 751 #endif 752 #ifdef HAVE_IBV_MLX5_MOD_SWP 753 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 754 #endif 755 /* 756 * Multi-packet send is supported by ConnectX-4 Lx PF as well 757 * as all ConnectX-5 devices. 758 */ 759 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 760 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 761 #endif 762 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 763 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 764 #endif 765 mlx5_glue->dv_query_device(sh->ctx, &dv_attr); 766 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 767 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 768 DRV_LOG(DEBUG, "enhanced MPW is supported"); 769 mps = MLX5_MPW_ENHANCED; 770 } else { 771 DRV_LOG(DEBUG, "MPW is supported"); 772 mps = MLX5_MPW; 773 } 774 } else { 775 DRV_LOG(DEBUG, "MPW isn't supported"); 776 mps = MLX5_MPW_DISABLED; 777 } 778 #ifdef HAVE_IBV_MLX5_MOD_SWP 779 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 780 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; 781 DRV_LOG(DEBUG, "SWP support: %u", swp); 782 #endif 783 config->swp = !!swp; 784 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 785 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 786 struct mlx5dv_striding_rq_caps mprq_caps = 787 dv_attr.striding_rq_caps; 788 789 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 790 mprq_caps.min_single_stride_log_num_of_bytes); 791 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 792 mprq_caps.max_single_stride_log_num_of_bytes); 793 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 794 mprq_caps.min_single_wqe_log_num_of_strides); 795 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 796 mprq_caps.max_single_wqe_log_num_of_strides); 797 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 798 mprq_caps.supported_qpts); 799 DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 800 mprq = 1; 801 mprq_min_stride_size_n = 802 mprq_caps.min_single_stride_log_num_of_bytes; 803 mprq_max_stride_size_n = 804 mprq_caps.max_single_stride_log_num_of_bytes; 805 mprq_min_stride_num_n = 806 mprq_caps.min_single_wqe_log_num_of_strides; 807 mprq_max_stride_num_n = 808 mprq_caps.max_single_wqe_log_num_of_strides; 809 } 810 #endif 811 if (RTE_CACHE_LINE_SIZE == 128 && 812 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) 813 cqe_comp = 0; 814 else 815 cqe_comp = 1; 816 config->cqe_comp = cqe_comp; 817 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD 818 /* Whether device supports 128B Rx CQE padding. */ 819 cqe_pad = RTE_CACHE_LINE_SIZE == 128 && 820 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); 821 #endif 822 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 823 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 824 tunnel_en = ((dv_attr.tunnel_offloads_caps & 825 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && 826 (dv_attr.tunnel_offloads_caps & 827 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && 828 (dv_attr.tunnel_offloads_caps & 829 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); 830 } 831 DRV_LOG(DEBUG, "tunnel offloading is %ssupported", 832 tunnel_en ? "" : "not "); 833 #else 834 DRV_LOG(WARNING, 835 "tunnel offloading disabled due to old OFED/rdma-core version"); 836 #endif 837 config->tunnel_en = tunnel_en; 838 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 839 mpls_en = ((dv_attr.tunnel_offloads_caps & 840 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 841 (dv_attr.tunnel_offloads_caps & 842 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 843 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 844 mpls_en ? "" : "not "); 845 #else 846 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 847 " old OFED/rdma-core version or firmware configuration"); 848 #endif 849 config->mpls_en = mpls_en; 850 /* Check port status. */ 851 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); 852 if (err) { 853 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 854 goto error; 855 } 856 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 857 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 858 err = EINVAL; 859 goto error; 860 } 861 if (port_attr.state != IBV_PORT_ACTIVE) 862 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", 863 mlx5_glue->port_state_str(port_attr.state), 864 port_attr.state); 865 /* Allocate private eth device data. */ 866 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 867 sizeof(*priv), 868 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 869 if (priv == NULL) { 870 DRV_LOG(ERR, "priv allocation failure"); 871 err = ENOMEM; 872 goto error; 873 } 874 priv->sh = sh; 875 priv->dev_port = spawn->phys_port; 876 priv->pci_dev = spawn->pci_dev; 877 priv->mtu = RTE_ETHER_MTU; 878 priv->mp_id.port_id = port_id; 879 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 880 /* Some internal functions rely on Netlink sockets, open them now. */ 881 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); 882 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 883 priv->representor = !!switch_info->representor; 884 priv->master = !!switch_info->master; 885 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 886 priv->vport_meta_tag = 0; 887 priv->vport_meta_mask = 0; 888 priv->pf_bond = spawn->pf_bond; 889 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 890 /* 891 * The DevX port query API is implemented. E-Switch may use 892 * either vport or reg_c[0] metadata register to match on 893 * vport index. The engaged part of metadata register is 894 * defined by mask. 895 */ 896 if (switch_info->representor || switch_info->master) { 897 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | 898 MLX5DV_DEVX_PORT_MATCH_REG_C_0; 899 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, 900 &devx_port); 901 if (err) { 902 DRV_LOG(WARNING, 903 "can't query devx port %d on device %s", 904 spawn->phys_port, 905 mlx5_os_get_dev_device_name(spawn->phys_dev)); 906 devx_port.comp_mask = 0; 907 } 908 } 909 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { 910 priv->vport_meta_tag = devx_port.reg_c_0.value; 911 priv->vport_meta_mask = devx_port.reg_c_0.mask; 912 if (!priv->vport_meta_mask) { 913 DRV_LOG(ERR, "vport zero mask for port %d" 914 " on bonding device %s", 915 spawn->phys_port, 916 mlx5_os_get_dev_device_name 917 (spawn->phys_dev)); 918 err = ENOTSUP; 919 goto error; 920 } 921 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 922 DRV_LOG(ERR, "invalid vport tag for port %d" 923 " on bonding device %s", 924 spawn->phys_port, 925 mlx5_os_get_dev_device_name 926 (spawn->phys_dev)); 927 err = ENOTSUP; 928 goto error; 929 } 930 } 931 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { 932 priv->vport_id = devx_port.vport_num; 933 } else if (spawn->pf_bond >= 0) { 934 DRV_LOG(ERR, "can't deduce vport index for port %d" 935 " on bonding device %s", 936 spawn->phys_port, 937 mlx5_os_get_dev_device_name(spawn->phys_dev)); 938 err = ENOTSUP; 939 goto error; 940 } else { 941 /* Suppose vport index in compatible way. */ 942 priv->vport_id = switch_info->representor ? 943 switch_info->port_name + 1 : -1; 944 } 945 #else 946 /* 947 * Kernel/rdma_core support single E-Switch per PF configurations 948 * only and vport_id field contains the vport index for 949 * associated VF, which is deduced from representor port name. 950 * For example, let's have the IB device port 10, it has 951 * attached network device eth0, which has port name attribute 952 * pf0vf2, we can deduce the VF number as 2, and set vport index 953 * as 3 (2+1). This assigning schema should be changed if the 954 * multiple E-Switch instances per PF configurations or/and PCI 955 * subfunctions are added. 956 */ 957 priv->vport_id = switch_info->representor ? 958 switch_info->port_name + 1 : -1; 959 #endif 960 /* representor_id field keeps the unmodified VF index. */ 961 priv->representor_id = switch_info->representor ? 962 switch_info->port_name : -1; 963 /* 964 * Look for sibling devices in order to reuse their switch domain 965 * if any, otherwise allocate one. 966 */ 967 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 968 const struct mlx5_priv *opriv = 969 rte_eth_devices[port_id].data->dev_private; 970 971 if (!opriv || 972 opriv->sh != priv->sh || 973 opriv->domain_id == 974 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 975 continue; 976 priv->domain_id = opriv->domain_id; 977 break; 978 } 979 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 980 err = rte_eth_switch_domain_alloc(&priv->domain_id); 981 if (err) { 982 err = rte_errno; 983 DRV_LOG(ERR, "unable to allocate switch domain: %s", 984 strerror(rte_errno)); 985 goto error; 986 } 987 own_domain_id = 1; 988 } 989 /* Override some values set by hardware configuration. */ 990 mlx5_args(config, dpdk_dev->devargs); 991 err = mlx5_dev_check_sibling_config(priv, config); 992 if (err) 993 goto error; 994 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 995 IBV_DEVICE_RAW_IP_CSUM); 996 DRV_LOG(DEBUG, "checksum offloading is %ssupported", 997 (config->hw_csum ? "" : "not ")); 998 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 999 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 1000 DRV_LOG(DEBUG, "counters are not supported"); 1001 #endif 1002 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 1003 if (config->dv_flow_en) { 1004 DRV_LOG(WARNING, "DV flow is not supported"); 1005 config->dv_flow_en = 0; 1006 } 1007 #endif 1008 config->ind_table_max_size = 1009 sh->device_attr.max_rwq_indirection_table_size; 1010 /* 1011 * Remove this check once DPDK supports larger/variable 1012 * indirection tables. 1013 */ 1014 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 1015 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; 1016 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 1017 config->ind_table_max_size); 1018 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 1019 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 1020 DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 1021 (config->hw_vlan_strip ? "" : "not ")); 1022 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 1023 IBV_RAW_PACKET_CAP_SCATTER_FCS); 1024 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 1025 hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 1026 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 1027 hw_padding = !!(sh->device_attr.device_cap_flags_ex & 1028 IBV_DEVICE_PCI_WRITE_END_PADDING); 1029 #endif 1030 if (config->hw_padding && !hw_padding) { 1031 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 1032 config->hw_padding = 0; 1033 } else if (config->hw_padding) { 1034 DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 1035 } 1036 config->tso = (sh->device_attr.max_tso > 0 && 1037 (sh->device_attr.tso_supported_qpts & 1038 (1 << IBV_QPT_RAW_PACKET))); 1039 if (config->tso) 1040 config->tso_max_payload_sz = sh->device_attr.max_tso; 1041 /* 1042 * MPW is disabled by default, while the Enhanced MPW is enabled 1043 * by default. 1044 */ 1045 if (config->mps == MLX5_ARG_UNSET) 1046 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 1047 MLX5_MPW_DISABLED; 1048 else 1049 config->mps = config->mps ? mps : MLX5_MPW_DISABLED; 1050 DRV_LOG(INFO, "%sMPS is %s", 1051 config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 1052 config->mps == MLX5_MPW ? "legacy " : "", 1053 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 1054 if (config->cqe_comp && !cqe_comp) { 1055 DRV_LOG(WARNING, "Rx CQE compression isn't supported"); 1056 config->cqe_comp = 0; 1057 } 1058 if (config->cqe_pad && !cqe_pad) { 1059 DRV_LOG(WARNING, "Rx CQE padding isn't supported"); 1060 config->cqe_pad = 0; 1061 } else if (config->cqe_pad) { 1062 DRV_LOG(INFO, "Rx CQE padding is enabled"); 1063 } 1064 if (config->devx) { 1065 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); 1066 if (err) { 1067 err = -err; 1068 goto error; 1069 } 1070 /* Check relax ordering support. */ 1071 if (config->hca_attr.relaxed_ordering_write && 1072 config->hca_attr.relaxed_ordering_read && 1073 !haswell_broadwell_cpu) 1074 sh->cmng.relaxed_ordering = 1; 1075 /* Check for LRO support. */ 1076 if (config->dest_tir && config->hca_attr.lro_cap && 1077 config->dv_flow_en) { 1078 /* TBD check tunnel lro caps. */ 1079 config->lro.supported = config->hca_attr.lro_cap; 1080 DRV_LOG(DEBUG, "Device supports LRO"); 1081 /* 1082 * If LRO timeout is not configured by application, 1083 * use the minimal supported value. 1084 */ 1085 if (!config->lro.timeout) 1086 config->lro.timeout = 1087 config->hca_attr.lro_timer_supported_periods[0]; 1088 DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 1089 config->lro.timeout); 1090 DRV_LOG(DEBUG, "LRO minimal size of TCP segment " 1091 "required for coalescing is %d bytes", 1092 config->hca_attr.lro_min_mss_size); 1093 } 1094 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) 1095 if (config->hca_attr.qos.sup && 1096 config->hca_attr.qos.srtcm_sup && 1097 config->dv_flow_en) { 1098 uint8_t reg_c_mask = 1099 config->hca_attr.qos.flow_meter_reg_c_ids; 1100 /* 1101 * Meter needs two REG_C's for color match and pre-sfx 1102 * flow match. Here get the REG_C for color match. 1103 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1104 */ 1105 reg_c_mask &= 0xfc; 1106 if (__builtin_popcount(reg_c_mask) < 1) { 1107 priv->mtr_en = 0; 1108 DRV_LOG(WARNING, "No available register for" 1109 " meter."); 1110 } else { 1111 priv->mtr_color_reg = ffs(reg_c_mask) - 1 + 1112 REG_C_0; 1113 priv->mtr_en = 1; 1114 priv->mtr_reg_share = 1115 config->hca_attr.qos.flow_meter_reg_share; 1116 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1117 priv->mtr_color_reg); 1118 } 1119 } 1120 #endif 1121 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1122 if (config->hca_attr.log_max_ft_sampler_num > 0 && 1123 config->dv_flow_en) { 1124 priv->sampler_en = 1; 1125 DRV_LOG(DEBUG, "The Sampler enabled!\n"); 1126 } else { 1127 priv->sampler_en = 0; 1128 if (!config->hca_attr.log_max_ft_sampler_num) 1129 DRV_LOG(WARNING, "No available register for" 1130 " Sampler."); 1131 else 1132 DRV_LOG(DEBUG, "DV flow is not supported!\n"); 1133 } 1134 #endif 1135 } 1136 if (config->tx_pp) { 1137 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 1138 config->hca_attr.dev_freq_khz); 1139 DRV_LOG(DEBUG, "Packet pacing is %ssupported", 1140 config->hca_attr.qos.packet_pacing ? "" : "not "); 1141 DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 1142 config->hca_attr.cross_channel ? "" : "not "); 1143 DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 1144 config->hca_attr.wqe_index_ignore ? "" : "not "); 1145 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 1146 config->hca_attr.non_wire_sq ? "" : "not "); 1147 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 1148 config->hca_attr.log_max_static_sq_wq ? "" : "not ", 1149 config->hca_attr.log_max_static_sq_wq); 1150 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 1151 config->hca_attr.qos.wqe_rate_pp ? "" : "not "); 1152 if (!config->devx) { 1153 DRV_LOG(ERR, "DevX is required for packet pacing"); 1154 err = ENODEV; 1155 goto error; 1156 } 1157 if (!config->hca_attr.qos.packet_pacing) { 1158 DRV_LOG(ERR, "Packet pacing is not supported"); 1159 err = ENODEV; 1160 goto error; 1161 } 1162 if (!config->hca_attr.cross_channel) { 1163 DRV_LOG(ERR, "Cross channel operations are" 1164 " required for packet pacing"); 1165 err = ENODEV; 1166 goto error; 1167 } 1168 if (!config->hca_attr.wqe_index_ignore) { 1169 DRV_LOG(ERR, "WQE index ignore feature is" 1170 " required for packet pacing"); 1171 err = ENODEV; 1172 goto error; 1173 } 1174 if (!config->hca_attr.non_wire_sq) { 1175 DRV_LOG(ERR, "Non-wire SQ feature is" 1176 " required for packet pacing"); 1177 err = ENODEV; 1178 goto error; 1179 } 1180 if (!config->hca_attr.log_max_static_sq_wq) { 1181 DRV_LOG(ERR, "Static WQE SQ feature is" 1182 " required for packet pacing"); 1183 err = ENODEV; 1184 goto error; 1185 } 1186 if (!config->hca_attr.qos.wqe_rate_pp) { 1187 DRV_LOG(ERR, "WQE rate mode is required" 1188 " for packet pacing"); 1189 err = ENODEV; 1190 goto error; 1191 } 1192 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 1193 DRV_LOG(ERR, "DevX does not provide UAR offset," 1194 " can't create queues for packet pacing"); 1195 err = ENODEV; 1196 goto error; 1197 #endif 1198 } 1199 if (config->devx) { 1200 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 1201 1202 err = config->hca_attr.access_register_user ? 1203 mlx5_devx_cmd_register_read 1204 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 1205 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; 1206 if (!err) { 1207 uint32_t ts_mode; 1208 1209 /* MTUTC register is read successfully. */ 1210 ts_mode = MLX5_GET(register_mtutc, reg, 1211 time_stamp_mode); 1212 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 1213 config->rt_timestamp = 1; 1214 } else { 1215 /* Kernel does not support register reading. */ 1216 if (config->hca_attr.dev_freq_khz == 1217 (NS_PER_S / MS_PER_S)) 1218 config->rt_timestamp = 1; 1219 } 1220 } 1221 /* 1222 * If HW has bug working with tunnel packet decapsulation and 1223 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 1224 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 1225 */ 1226 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en) 1227 config->hw_fcs_strip = 0; 1228 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 1229 (config->hw_fcs_strip ? "" : "not ")); 1230 if (config->mprq.enabled && mprq) { 1231 if (config->mprq.stride_num_n && 1232 (config->mprq.stride_num_n > mprq_max_stride_num_n || 1233 config->mprq.stride_num_n < mprq_min_stride_num_n)) { 1234 config->mprq.stride_num_n = 1235 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, 1236 mprq_min_stride_num_n), 1237 mprq_max_stride_num_n); 1238 DRV_LOG(WARNING, 1239 "the number of strides" 1240 " for Multi-Packet RQ is out of range," 1241 " setting default value (%u)", 1242 1 << config->mprq.stride_num_n); 1243 } 1244 if (config->mprq.stride_size_n && 1245 (config->mprq.stride_size_n > mprq_max_stride_size_n || 1246 config->mprq.stride_size_n < mprq_min_stride_size_n)) { 1247 config->mprq.stride_size_n = 1248 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, 1249 mprq_min_stride_size_n), 1250 mprq_max_stride_size_n); 1251 DRV_LOG(WARNING, 1252 "the size of a stride" 1253 " for Multi-Packet RQ is out of range," 1254 " setting default value (%u)", 1255 1 << config->mprq.stride_size_n); 1256 } 1257 config->mprq.min_stride_size_n = mprq_min_stride_size_n; 1258 config->mprq.max_stride_size_n = mprq_max_stride_size_n; 1259 } else if (config->mprq.enabled && !mprq) { 1260 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 1261 config->mprq.enabled = 0; 1262 } 1263 if (config->max_dump_files_num == 0) 1264 config->max_dump_files_num = 128; 1265 eth_dev = rte_eth_dev_allocate(name); 1266 if (eth_dev == NULL) { 1267 DRV_LOG(ERR, "can not allocate rte ethdev"); 1268 err = ENOMEM; 1269 goto error; 1270 } 1271 if (priv->representor) { 1272 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1273 eth_dev->data->representor_id = priv->representor_id; 1274 } 1275 /* 1276 * Store associated network device interface index. This index 1277 * is permanent throughout the lifetime of device. So, we may store 1278 * the ifindex here and use the cached value further. 1279 */ 1280 MLX5_ASSERT(spawn->ifindex); 1281 priv->if_index = spawn->ifindex; 1282 if (priv->pf_bond >= 0 && priv->master) { 1283 /* Get bond interface info */ 1284 err = mlx5_sysfs_bond_info(priv->if_index, 1285 &priv->bond_ifindex, 1286 priv->bond_name); 1287 if (err) 1288 DRV_LOG(ERR, "unable to get bond info: %s", 1289 strerror(rte_errno)); 1290 else 1291 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1292 priv->if_index, priv->bond_ifindex, 1293 priv->bond_name); 1294 } 1295 eth_dev->data->dev_private = priv; 1296 priv->dev_data = eth_dev->data; 1297 eth_dev->data->mac_addrs = priv->mac; 1298 eth_dev->device = dpdk_dev; 1299 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1300 /* Configure the first MAC address by default. */ 1301 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1302 DRV_LOG(ERR, 1303 "port %u cannot get MAC address, is mlx5_en" 1304 " loaded? (errno: %s)", 1305 eth_dev->data->port_id, strerror(rte_errno)); 1306 err = ENODEV; 1307 goto error; 1308 } 1309 DRV_LOG(INFO, 1310 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 1311 eth_dev->data->port_id, 1312 mac.addr_bytes[0], mac.addr_bytes[1], 1313 mac.addr_bytes[2], mac.addr_bytes[3], 1314 mac.addr_bytes[4], mac.addr_bytes[5]); 1315 #ifdef RTE_LIBRTE_MLX5_DEBUG 1316 { 1317 char ifname[IF_NAMESIZE]; 1318 1319 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1320 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1321 eth_dev->data->port_id, ifname); 1322 else 1323 DRV_LOG(DEBUG, "port %u ifname is unknown", 1324 eth_dev->data->port_id); 1325 } 1326 #endif 1327 /* Get actual MTU if possible. */ 1328 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1329 if (err) { 1330 err = rte_errno; 1331 goto error; 1332 } 1333 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1334 priv->mtu); 1335 /* Initialize burst functions to prevent crashes before link-up. */ 1336 eth_dev->rx_pkt_burst = removed_rx_burst; 1337 eth_dev->tx_pkt_burst = removed_tx_burst; 1338 eth_dev->dev_ops = &mlx5_os_dev_ops; 1339 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1340 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1341 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1342 /* Register MAC address. */ 1343 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1344 if (config->vf && config->vf_nl_en) 1345 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1346 mlx5_ifindex(eth_dev), 1347 eth_dev->data->mac_addrs, 1348 MLX5_MAX_MAC_ADDRESSES); 1349 priv->flows = 0; 1350 priv->ctrl_flows = 0; 1351 TAILQ_INIT(&priv->flow_meters); 1352 TAILQ_INIT(&priv->flow_meter_profiles); 1353 /* Hint libmlx5 to use PMD allocator for data plane resources */ 1354 mlx5_glue->dv_set_context_attr(sh->ctx, 1355 MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 1356 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 1357 .alloc = &mlx5_alloc_verbs_buf, 1358 .free = &mlx5_free_verbs_buf, 1359 .data = priv, 1360 })); 1361 /* Bring Ethernet device up. */ 1362 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1363 eth_dev->data->port_id); 1364 mlx5_set_link_up(eth_dev); 1365 /* 1366 * Even though the interrupt handler is not installed yet, 1367 * interrupts will still trigger on the async_fd from 1368 * Verbs context returned by ibv_open_device(). 1369 */ 1370 mlx5_link_update(eth_dev, 0); 1371 #ifdef HAVE_MLX5DV_DR_ESWITCH 1372 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && 1373 (switch_info->representor || switch_info->master))) 1374 config->dv_esw_en = 0; 1375 #else 1376 config->dv_esw_en = 0; 1377 #endif 1378 /* Detect minimal data bytes to inline. */ 1379 mlx5_set_min_inline(spawn, config); 1380 /* Store device configuration on private structure. */ 1381 priv->config = *config; 1382 /* Create context for virtual machine VLAN workaround. */ 1383 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1384 if (config->dv_flow_en) { 1385 err = mlx5_alloc_shared_dr(priv); 1386 if (err) 1387 goto error; 1388 /* 1389 * RSS id is shared with meter flow id. Meter flow id can only 1390 * use the 24 MSB of the register. 1391 */ 1392 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >> 1393 MLX5_MTR_COLOR_BITS); 1394 if (!priv->qrss_id_pool) { 1395 DRV_LOG(ERR, "can't create flow id pool"); 1396 err = ENOMEM; 1397 goto error; 1398 } 1399 } 1400 if (config->devx && config->dv_flow_en && config->dest_tir) { 1401 priv->obj_ops = devx_obj_ops; 1402 priv->obj_ops.drop_action_create = 1403 ibv_obj_ops.drop_action_create; 1404 priv->obj_ops.drop_action_destroy = 1405 ibv_obj_ops.drop_action_destroy; 1406 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 1407 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify; 1408 #else 1409 if (config->dv_esw_en) 1410 priv->obj_ops.txq_obj_modify = 1411 ibv_obj_ops.txq_obj_modify; 1412 #endif 1413 /* Use specific wrappers for Tx object. */ 1414 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new; 1415 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release; 1416 1417 } else { 1418 priv->obj_ops = ibv_obj_ops; 1419 } 1420 /* Supported Verbs flow priority number detection. */ 1421 err = mlx5_flow_discover_priorities(eth_dev); 1422 if (err < 0) { 1423 err = -err; 1424 goto error; 1425 } 1426 priv->config.flow_prio = err; 1427 if (!priv->config.dv_esw_en && 1428 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1429 DRV_LOG(WARNING, "metadata mode %u is not supported " 1430 "(no E-Switch)", priv->config.dv_xmeta_en); 1431 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 1432 } 1433 mlx5_set_metadata_mask(eth_dev); 1434 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1435 !priv->sh->dv_regc0_mask) { 1436 DRV_LOG(ERR, "metadata mode %u is not supported " 1437 "(no metadata reg_c[0] is available)", 1438 priv->config.dv_xmeta_en); 1439 err = ENOTSUP; 1440 goto error; 1441 } 1442 /* 1443 * Allocate the buffer for flow creating, just once. 1444 * The allocation must be done before any flow creating. 1445 */ 1446 mlx5_flow_alloc_intermediate(eth_dev); 1447 /* Query availability of metadata reg_c's. */ 1448 err = mlx5_flow_discover_mreg_c(eth_dev); 1449 if (err < 0) { 1450 err = -err; 1451 goto error; 1452 } 1453 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1454 DRV_LOG(DEBUG, 1455 "port %u extensive metadata register is not supported", 1456 eth_dev->data->port_id); 1457 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1458 DRV_LOG(ERR, "metadata mode %u is not supported " 1459 "(no metadata registers available)", 1460 priv->config.dv_xmeta_en); 1461 err = ENOTSUP; 1462 goto error; 1463 } 1464 } 1465 if (priv->config.dv_flow_en && 1466 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1467 mlx5_flow_ext_mreg_supported(eth_dev) && 1468 priv->sh->dv_regc0_mask) { 1469 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1470 MLX5_FLOW_MREG_HTABLE_SZ); 1471 if (!priv->mreg_cp_tbl) { 1472 err = ENOMEM; 1473 goto error; 1474 } 1475 } 1476 mlx5_flow_counter_mode_config(eth_dev); 1477 return eth_dev; 1478 error: 1479 if (priv) { 1480 if (priv->mreg_cp_tbl) 1481 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL); 1482 if (priv->sh) 1483 mlx5_os_free_shared_dr(priv); 1484 if (priv->nl_socket_route >= 0) 1485 close(priv->nl_socket_route); 1486 if (priv->nl_socket_rdma >= 0) 1487 close(priv->nl_socket_rdma); 1488 if (priv->vmwa_context) 1489 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1490 if (priv->qrss_id_pool) 1491 mlx5_flow_id_pool_release(priv->qrss_id_pool); 1492 if (own_domain_id) 1493 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1494 mlx5_free(priv); 1495 if (eth_dev != NULL) 1496 eth_dev->data->dev_private = NULL; 1497 } 1498 if (eth_dev != NULL) { 1499 /* mac_addrs must not be freed alone because part of 1500 * dev_private 1501 **/ 1502 eth_dev->data->mac_addrs = NULL; 1503 rte_eth_dev_release_port(eth_dev); 1504 } 1505 if (sh) 1506 mlx5_free_shared_dev_ctx(sh); 1507 MLX5_ASSERT(err > 0); 1508 rte_errno = err; 1509 return NULL; 1510 } 1511 1512 /** 1513 * Comparison callback to sort device data. 1514 * 1515 * This is meant to be used with qsort(). 1516 * 1517 * @param a[in] 1518 * Pointer to pointer to first data object. 1519 * @param b[in] 1520 * Pointer to pointer to second data object. 1521 * 1522 * @return 1523 * 0 if both objects are equal, less than 0 if the first argument is less 1524 * than the second, greater than 0 otherwise. 1525 */ 1526 static int 1527 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1528 { 1529 const struct mlx5_switch_info *si_a = 1530 &((const struct mlx5_dev_spawn_data *)a)->info; 1531 const struct mlx5_switch_info *si_b = 1532 &((const struct mlx5_dev_spawn_data *)b)->info; 1533 int ret; 1534 1535 /* Master device first. */ 1536 ret = si_b->master - si_a->master; 1537 if (ret) 1538 return ret; 1539 /* Then representor devices. */ 1540 ret = si_b->representor - si_a->representor; 1541 if (ret) 1542 return ret; 1543 /* Unidentified devices come last in no specific order. */ 1544 if (!si_a->representor) 1545 return 0; 1546 /* Order representors by name. */ 1547 return si_a->port_name - si_b->port_name; 1548 } 1549 1550 /** 1551 * Match PCI information for possible slaves of bonding device. 1552 * 1553 * @param[in] ibv_dev 1554 * Pointer to Infiniband device structure. 1555 * @param[in] pci_dev 1556 * Pointer to PCI device structure to match PCI address. 1557 * @param[in] nl_rdma 1558 * Netlink RDMA group socket handle. 1559 * 1560 * @return 1561 * negative value if no bonding device found, otherwise 1562 * positive index of slave PF in bonding. 1563 */ 1564 static int 1565 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, 1566 const struct rte_pci_device *pci_dev, 1567 int nl_rdma) 1568 { 1569 char ifname[IF_NAMESIZE + 1]; 1570 unsigned int ifindex; 1571 unsigned int np, i; 1572 FILE *file = NULL; 1573 int pf = -1; 1574 1575 /* 1576 * Try to get master device name. If something goes 1577 * wrong suppose the lack of kernel support and no 1578 * bonding devices. 1579 */ 1580 if (nl_rdma < 0) 1581 return -1; 1582 if (!strstr(ibv_dev->name, "bond")) 1583 return -1; 1584 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); 1585 if (!np) 1586 return -1; 1587 /* 1588 * The Master device might not be on the predefined 1589 * port (not on port index 1, it is not garanted), 1590 * we have to scan all Infiniband device port and 1591 * find master. 1592 */ 1593 for (i = 1; i <= np; ++i) { 1594 /* Check whether Infiniband port is populated. */ 1595 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); 1596 if (!ifindex) 1597 continue; 1598 if (!if_indextoname(ifindex, ifname)) 1599 continue; 1600 /* Try to read bonding slave names from sysfs. */ 1601 MKSTR(slaves, 1602 "/sys/class/net/%s/master/bonding/slaves", ifname); 1603 file = fopen(slaves, "r"); 1604 if (file) 1605 break; 1606 } 1607 if (!file) 1608 return -1; 1609 /* Use safe format to check maximal buffer length. */ 1610 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1611 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1612 char tmp_str[IF_NAMESIZE + 32]; 1613 struct rte_pci_addr pci_addr; 1614 struct mlx5_switch_info info; 1615 1616 /* Process slave interface names in the loop. */ 1617 snprintf(tmp_str, sizeof(tmp_str), 1618 "/sys/class/net/%s", ifname); 1619 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { 1620 DRV_LOG(WARNING, "can not get PCI address" 1621 " for netdev \"%s\"", ifname); 1622 continue; 1623 } 1624 if (pci_dev->addr.domain != pci_addr.domain || 1625 pci_dev->addr.bus != pci_addr.bus || 1626 pci_dev->addr.devid != pci_addr.devid || 1627 pci_dev->addr.function != pci_addr.function) 1628 continue; 1629 /* Slave interface PCI address match found. */ 1630 fclose(file); 1631 snprintf(tmp_str, sizeof(tmp_str), 1632 "/sys/class/net/%s/phys_port_name", ifname); 1633 file = fopen(tmp_str, "rb"); 1634 if (!file) 1635 break; 1636 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1637 if (fscanf(file, "%32s", tmp_str) == 1) 1638 mlx5_translate_port_name(tmp_str, &info); 1639 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || 1640 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1641 pf = info.port_name; 1642 break; 1643 } 1644 if (file) 1645 fclose(file); 1646 return pf; 1647 } 1648 1649 /** 1650 * DPDK callback to register a PCI device. 1651 * 1652 * This function spawns Ethernet devices out of a given PCI device. 1653 * 1654 * @param[in] pci_drv 1655 * PCI driver structure (mlx5_driver). 1656 * @param[in] pci_dev 1657 * PCI device information. 1658 * 1659 * @return 1660 * 0 on success, a negative errno value otherwise and rte_errno is set. 1661 */ 1662 int 1663 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1664 struct rte_pci_device *pci_dev) 1665 { 1666 struct ibv_device **ibv_list; 1667 /* 1668 * Number of found IB Devices matching with requested PCI BDF. 1669 * nd != 1 means there are multiple IB devices over the same 1670 * PCI device and we have representors and master. 1671 */ 1672 unsigned int nd = 0; 1673 /* 1674 * Number of found IB device Ports. nd = 1 and np = 1..n means 1675 * we have the single multiport IB device, and there may be 1676 * representors attached to some of found ports. 1677 */ 1678 unsigned int np = 0; 1679 /* 1680 * Number of DPDK ethernet devices to Spawn - either over 1681 * multiple IB devices or multiple ports of single IB device. 1682 * Actually this is the number of iterations to spawn. 1683 */ 1684 unsigned int ns = 0; 1685 /* 1686 * Bonding device 1687 * < 0 - no bonding device (single one) 1688 * >= 0 - bonding device (value is slave PF index) 1689 */ 1690 int bd = -1; 1691 struct mlx5_dev_spawn_data *list = NULL; 1692 struct mlx5_dev_config dev_config; 1693 unsigned int dev_config_vf; 1694 int ret; 1695 1696 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1697 mlx5_pmd_socket_init(); 1698 ret = mlx5_init_once(); 1699 if (ret) { 1700 DRV_LOG(ERR, "unable to init PMD global data: %s", 1701 strerror(rte_errno)); 1702 return -rte_errno; 1703 } 1704 errno = 0; 1705 ibv_list = mlx5_glue->get_device_list(&ret); 1706 if (!ibv_list) { 1707 rte_errno = errno ? errno : ENOSYS; 1708 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 1709 return -rte_errno; 1710 } 1711 /* 1712 * First scan the list of all Infiniband devices to find 1713 * matching ones, gathering into the list. 1714 */ 1715 struct ibv_device *ibv_match[ret + 1]; 1716 int nl_route = mlx5_nl_init(NETLINK_ROUTE); 1717 int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 1718 unsigned int i; 1719 1720 while (ret-- > 0) { 1721 struct rte_pci_addr pci_addr; 1722 1723 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); 1724 bd = mlx5_device_bond_pci_match 1725 (ibv_list[ret], pci_dev, nl_rdma); 1726 if (bd >= 0) { 1727 /* 1728 * Bonding device detected. Only one match is allowed, 1729 * the bonding is supported over multi-port IB device, 1730 * there should be no matches on representor PCI 1731 * functions or non VF LAG bonding devices with 1732 * specified address. 1733 */ 1734 if (nd) { 1735 DRV_LOG(ERR, 1736 "multiple PCI match on bonding device" 1737 "\"%s\" found", ibv_list[ret]->name); 1738 rte_errno = ENOENT; 1739 ret = -rte_errno; 1740 goto exit; 1741 } 1742 DRV_LOG(INFO, "PCI information matches for" 1743 " slave %d bonding device \"%s\"", 1744 bd, ibv_list[ret]->name); 1745 ibv_match[nd++] = ibv_list[ret]; 1746 break; 1747 } 1748 if (mlx5_dev_to_pci_addr 1749 (ibv_list[ret]->ibdev_path, &pci_addr)) 1750 continue; 1751 if (pci_dev->addr.domain != pci_addr.domain || 1752 pci_dev->addr.bus != pci_addr.bus || 1753 pci_dev->addr.devid != pci_addr.devid || 1754 pci_dev->addr.function != pci_addr.function) 1755 continue; 1756 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 1757 ibv_list[ret]->name); 1758 ibv_match[nd++] = ibv_list[ret]; 1759 } 1760 ibv_match[nd] = NULL; 1761 if (!nd) { 1762 /* No device matches, just complain and bail out. */ 1763 DRV_LOG(WARNING, 1764 "no Verbs device matches PCI device " PCI_PRI_FMT "," 1765 " are kernel drivers loaded?", 1766 pci_dev->addr.domain, pci_dev->addr.bus, 1767 pci_dev->addr.devid, pci_dev->addr.function); 1768 rte_errno = ENOENT; 1769 ret = -rte_errno; 1770 goto exit; 1771 } 1772 if (nd == 1) { 1773 /* 1774 * Found single matching device may have multiple ports. 1775 * Each port may be representor, we have to check the port 1776 * number and check the representors existence. 1777 */ 1778 if (nl_rdma >= 0) 1779 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 1780 if (!np) 1781 DRV_LOG(WARNING, "can not get IB device \"%s\"" 1782 " ports number", ibv_match[0]->name); 1783 if (bd >= 0 && !np) { 1784 DRV_LOG(ERR, "can not get ports" 1785 " for bonding device"); 1786 rte_errno = ENOENT; 1787 ret = -rte_errno; 1788 goto exit; 1789 } 1790 } 1791 #ifndef HAVE_MLX5DV_DR_DEVX_PORT 1792 if (bd >= 0) { 1793 /* 1794 * This may happen if there is VF LAG kernel support and 1795 * application is compiled with older rdma_core library. 1796 */ 1797 DRV_LOG(ERR, 1798 "No kernel/verbs support for VF LAG bonding found."); 1799 rte_errno = ENOTSUP; 1800 ret = -rte_errno; 1801 goto exit; 1802 } 1803 #endif 1804 /* 1805 * Now we can determine the maximal 1806 * amount of devices to be spawned. 1807 */ 1808 list = mlx5_malloc(MLX5_MEM_ZERO, 1809 sizeof(struct mlx5_dev_spawn_data) * 1810 (np ? np : nd), 1811 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1812 if (!list) { 1813 DRV_LOG(ERR, "spawn data array allocation failure"); 1814 rte_errno = ENOMEM; 1815 ret = -rte_errno; 1816 goto exit; 1817 } 1818 if (bd >= 0 || np > 1) { 1819 /* 1820 * Single IB device with multiple ports found, 1821 * it may be E-Switch master device and representors. 1822 * We have to perform identification through the ports. 1823 */ 1824 MLX5_ASSERT(nl_rdma >= 0); 1825 MLX5_ASSERT(ns == 0); 1826 MLX5_ASSERT(nd == 1); 1827 MLX5_ASSERT(np); 1828 for (i = 1; i <= np; ++i) { 1829 list[ns].max_port = np; 1830 list[ns].phys_port = i; 1831 list[ns].phys_dev = ibv_match[0]; 1832 list[ns].eth_dev = NULL; 1833 list[ns].pci_dev = pci_dev; 1834 list[ns].pf_bond = bd; 1835 list[ns].ifindex = mlx5_nl_ifindex 1836 (nl_rdma, 1837 mlx5_os_get_dev_device_name 1838 (list[ns].phys_dev), i); 1839 if (!list[ns].ifindex) { 1840 /* 1841 * No network interface index found for the 1842 * specified port, it means there is no 1843 * representor on this port. It's OK, 1844 * there can be disabled ports, for example 1845 * if sriov_numvfs < sriov_totalvfs. 1846 */ 1847 continue; 1848 } 1849 ret = -1; 1850 if (nl_route >= 0) 1851 ret = mlx5_nl_switch_info 1852 (nl_route, 1853 list[ns].ifindex, 1854 &list[ns].info); 1855 if (ret || (!list[ns].info.representor && 1856 !list[ns].info.master)) { 1857 /* 1858 * We failed to recognize representors with 1859 * Netlink, let's try to perform the task 1860 * with sysfs. 1861 */ 1862 ret = mlx5_sysfs_switch_info 1863 (list[ns].ifindex, 1864 &list[ns].info); 1865 } 1866 if (!ret && bd >= 0) { 1867 switch (list[ns].info.name_type) { 1868 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 1869 if (list[ns].info.port_name == bd) 1870 ns++; 1871 break; 1872 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1873 /* Fallthrough */ 1874 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 1875 if (list[ns].info.pf_num == bd) 1876 ns++; 1877 break; 1878 default: 1879 break; 1880 } 1881 continue; 1882 } 1883 if (!ret && (list[ns].info.representor ^ 1884 list[ns].info.master)) 1885 ns++; 1886 } 1887 if (!ns) { 1888 DRV_LOG(ERR, 1889 "unable to recognize master/representors" 1890 " on the IB device with multiple ports"); 1891 rte_errno = ENOENT; 1892 ret = -rte_errno; 1893 goto exit; 1894 } 1895 } else { 1896 /* 1897 * The existence of several matching entries (nd > 1) means 1898 * port representors have been instantiated. No existing Verbs 1899 * call nor sysfs entries can tell them apart, this can only 1900 * be done through Netlink calls assuming kernel drivers are 1901 * recent enough to support them. 1902 * 1903 * In the event of identification failure through Netlink, 1904 * try again through sysfs, then: 1905 * 1906 * 1. A single IB device matches (nd == 1) with single 1907 * port (np=0/1) and is not a representor, assume 1908 * no switch support. 1909 * 1910 * 2. Otherwise no safe assumptions can be made; 1911 * complain louder and bail out. 1912 */ 1913 for (i = 0; i != nd; ++i) { 1914 memset(&list[ns].info, 0, sizeof(list[ns].info)); 1915 list[ns].max_port = 1; 1916 list[ns].phys_port = 1; 1917 list[ns].phys_dev = ibv_match[i]; 1918 list[ns].eth_dev = NULL; 1919 list[ns].pci_dev = pci_dev; 1920 list[ns].pf_bond = -1; 1921 list[ns].ifindex = 0; 1922 if (nl_rdma >= 0) 1923 list[ns].ifindex = mlx5_nl_ifindex 1924 (nl_rdma, 1925 mlx5_os_get_dev_device_name 1926 (list[ns].phys_dev), 1); 1927 if (!list[ns].ifindex) { 1928 char ifname[IF_NAMESIZE]; 1929 1930 /* 1931 * Netlink failed, it may happen with old 1932 * ib_core kernel driver (before 4.16). 1933 * We can assume there is old driver because 1934 * here we are processing single ports IB 1935 * devices. Let's try sysfs to retrieve 1936 * the ifindex. The method works for 1937 * master device only. 1938 */ 1939 if (nd > 1) { 1940 /* 1941 * Multiple devices found, assume 1942 * representors, can not distinguish 1943 * master/representor and retrieve 1944 * ifindex via sysfs. 1945 */ 1946 continue; 1947 } 1948 ret = mlx5_get_ifname_sysfs 1949 (ibv_match[i]->ibdev_path, ifname); 1950 if (!ret) 1951 list[ns].ifindex = 1952 if_nametoindex(ifname); 1953 if (!list[ns].ifindex) { 1954 /* 1955 * No network interface index found 1956 * for the specified device, it means 1957 * there it is neither representor 1958 * nor master. 1959 */ 1960 continue; 1961 } 1962 } 1963 ret = -1; 1964 if (nl_route >= 0) 1965 ret = mlx5_nl_switch_info 1966 (nl_route, 1967 list[ns].ifindex, 1968 &list[ns].info); 1969 if (ret || (!list[ns].info.representor && 1970 !list[ns].info.master)) { 1971 /* 1972 * We failed to recognize representors with 1973 * Netlink, let's try to perform the task 1974 * with sysfs. 1975 */ 1976 ret = mlx5_sysfs_switch_info 1977 (list[ns].ifindex, 1978 &list[ns].info); 1979 } 1980 if (!ret && (list[ns].info.representor ^ 1981 list[ns].info.master)) { 1982 ns++; 1983 } else if ((nd == 1) && 1984 !list[ns].info.representor && 1985 !list[ns].info.master) { 1986 /* 1987 * Single IB device with 1988 * one physical port and 1989 * attached network device. 1990 * May be SRIOV is not enabled 1991 * or there is no representors. 1992 */ 1993 DRV_LOG(INFO, "no E-Switch support detected"); 1994 ns++; 1995 break; 1996 } 1997 } 1998 if (!ns) { 1999 DRV_LOG(ERR, 2000 "unable to recognize master/representors" 2001 " on the multiple IB devices"); 2002 rte_errno = ENOENT; 2003 ret = -rte_errno; 2004 goto exit; 2005 } 2006 } 2007 MLX5_ASSERT(ns); 2008 /* 2009 * Sort list to probe devices in natural order for users convenience 2010 * (i.e. master first, then representors from lowest to highest ID). 2011 */ 2012 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2013 /* Device specific configuration. */ 2014 switch (pci_dev->id.device_id) { 2015 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 2016 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 2017 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 2018 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 2019 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 2020 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 2021 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF: 2022 dev_config_vf = 1; 2023 break; 2024 default: 2025 dev_config_vf = 0; 2026 break; 2027 } 2028 for (i = 0; i != ns; ++i) { 2029 uint32_t restore; 2030 2031 /* Default configuration. */ 2032 memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); 2033 dev_config.vf = dev_config_vf; 2034 dev_config.mps = MLX5_ARG_UNSET; 2035 dev_config.dbnc = MLX5_ARG_UNSET; 2036 dev_config.rx_vec_en = 1; 2037 dev_config.txq_inline_max = MLX5_ARG_UNSET; 2038 dev_config.txq_inline_min = MLX5_ARG_UNSET; 2039 dev_config.txq_inline_mpw = MLX5_ARG_UNSET; 2040 dev_config.txqs_inline = MLX5_ARG_UNSET; 2041 dev_config.vf_nl_en = 1; 2042 dev_config.mr_ext_memseg_en = 1; 2043 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 2044 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 2045 dev_config.dv_esw_en = 1; 2046 dev_config.dv_flow_en = 1; 2047 dev_config.decap_en = 1; 2048 dev_config.log_hp_size = MLX5_ARG_UNSET; 2049 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, 2050 &list[i], 2051 &dev_config); 2052 if (!list[i].eth_dev) { 2053 if (rte_errno != EBUSY && rte_errno != EEXIST) 2054 break; 2055 /* Device is disabled or already spawned. Ignore it. */ 2056 continue; 2057 } 2058 restore = list[i].eth_dev->data->dev_flags; 2059 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2060 /* Restore non-PCI flags cleared by the above call. */ 2061 list[i].eth_dev->data->dev_flags |= restore; 2062 rte_eth_dev_probing_finish(list[i].eth_dev); 2063 } 2064 if (i != ns) { 2065 DRV_LOG(ERR, 2066 "probe of PCI device " PCI_PRI_FMT " aborted after" 2067 " encountering an error: %s", 2068 pci_dev->addr.domain, pci_dev->addr.bus, 2069 pci_dev->addr.devid, pci_dev->addr.function, 2070 strerror(rte_errno)); 2071 ret = -rte_errno; 2072 /* Roll back. */ 2073 while (i--) { 2074 if (!list[i].eth_dev) 2075 continue; 2076 mlx5_dev_close(list[i].eth_dev); 2077 /* mac_addrs must not be freed because in dev_private */ 2078 list[i].eth_dev->data->mac_addrs = NULL; 2079 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2080 } 2081 /* Restore original error. */ 2082 rte_errno = -ret; 2083 } else { 2084 ret = 0; 2085 } 2086 exit: 2087 /* 2088 * Do the routine cleanup: 2089 * - close opened Netlink sockets 2090 * - free allocated spawn data array 2091 * - free the Infiniband device list 2092 */ 2093 if (nl_rdma >= 0) 2094 close(nl_rdma); 2095 if (nl_route >= 0) 2096 close(nl_route); 2097 if (list) 2098 mlx5_free(list); 2099 MLX5_ASSERT(ibv_list); 2100 mlx5_glue->free_device_list(ibv_list); 2101 return ret; 2102 } 2103 2104 static int 2105 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) 2106 { 2107 char *env; 2108 int value; 2109 2110 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2111 /* Get environment variable to store. */ 2112 env = getenv(MLX5_SHUT_UP_BF); 2113 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; 2114 if (config->dbnc == MLX5_ARG_UNSET) 2115 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); 2116 else 2117 setenv(MLX5_SHUT_UP_BF, 2118 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); 2119 return value; 2120 } 2121 2122 static void 2123 mlx5_restore_doorbell_mapping_env(int value) 2124 { 2125 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2126 /* Restore the original environment variable state. */ 2127 if (value == MLX5_ARG_UNSET) 2128 unsetenv(MLX5_SHUT_UP_BF); 2129 else 2130 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); 2131 } 2132 2133 /** 2134 * Extract pdn of PD object using DV API. 2135 * 2136 * @param[in] pd 2137 * Pointer to the verbs PD object. 2138 * @param[out] pdn 2139 * Pointer to the PD object number variable. 2140 * 2141 * @return 2142 * 0 on success, error value otherwise. 2143 */ 2144 int 2145 mlx5_os_get_pdn(void *pd, uint32_t *pdn) 2146 { 2147 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 2148 struct mlx5dv_obj obj; 2149 struct mlx5dv_pd pd_info; 2150 int ret = 0; 2151 2152 obj.pd.in = pd; 2153 obj.pd.out = &pd_info; 2154 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 2155 if (ret) { 2156 DRV_LOG(DEBUG, "Fail to get PD object info"); 2157 return ret; 2158 } 2159 *pdn = pd_info.pdn; 2160 return 0; 2161 #else 2162 (void)pd; 2163 (void)pdn; 2164 return -ENOTSUP; 2165 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 2166 } 2167 2168 /** 2169 * Function API to open IB device. 2170 * 2171 * This function calls the Linux glue APIs to open a device. 2172 * 2173 * @param[in] spawn 2174 * Pointer to the IB device attributes (name, port, etc). 2175 * @param[out] config 2176 * Pointer to device configuration structure. 2177 * @param[out] sh 2178 * Pointer to shared context structure. 2179 * 2180 * @return 2181 * 0 on success, a positive error value otherwise. 2182 */ 2183 int 2184 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 2185 const struct mlx5_dev_config *config, 2186 struct mlx5_dev_ctx_shared *sh) 2187 { 2188 int dbmap_env; 2189 int err = 0; 2190 2191 sh->numa_node = spawn->pci_dev->device.numa_node; 2192 pthread_mutex_init(&sh->txpp.mutex, NULL); 2193 /* 2194 * Configure environment variable "MLX5_BF_SHUT_UP" 2195 * before the device creation. The rdma_core library 2196 * checks the variable at device creation and 2197 * stores the result internally. 2198 */ 2199 dbmap_env = mlx5_config_doorbell_mapping_env(config); 2200 /* Try to open IB device with DV first, then usual Verbs. */ 2201 errno = 0; 2202 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); 2203 if (sh->ctx) { 2204 sh->devx = 1; 2205 DRV_LOG(DEBUG, "DevX is supported"); 2206 /* The device is created, no need for environment. */ 2207 mlx5_restore_doorbell_mapping_env(dbmap_env); 2208 } else { 2209 /* The environment variable is still configured. */ 2210 sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 2211 err = errno ? errno : ENODEV; 2212 /* 2213 * The environment variable is not needed anymore, 2214 * all device creation attempts are completed. 2215 */ 2216 mlx5_restore_doorbell_mapping_env(dbmap_env); 2217 if (!sh->ctx) 2218 return err; 2219 DRV_LOG(DEBUG, "DevX is NOT supported"); 2220 err = 0; 2221 } 2222 return err; 2223 } 2224 2225 /** 2226 * Install shared asynchronous device events handler. 2227 * This function is implemented to support event sharing 2228 * between multiple ports of single IB device. 2229 * 2230 * @param sh 2231 * Pointer to mlx5_dev_ctx_shared object. 2232 */ 2233 void 2234 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2235 { 2236 int ret; 2237 int flags; 2238 2239 sh->intr_handle.fd = -1; 2240 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); 2241 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, 2242 F_SETFL, flags | O_NONBLOCK); 2243 if (ret) { 2244 DRV_LOG(INFO, "failed to change file descriptor async event" 2245 " queue"); 2246 } else { 2247 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; 2248 sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 2249 if (rte_intr_callback_register(&sh->intr_handle, 2250 mlx5_dev_interrupt_handler, sh)) { 2251 DRV_LOG(INFO, "Fail to install the shared interrupt."); 2252 sh->intr_handle.fd = -1; 2253 } 2254 } 2255 if (sh->devx) { 2256 #ifdef HAVE_IBV_DEVX_ASYNC 2257 sh->intr_handle_devx.fd = -1; 2258 sh->devx_comp = 2259 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); 2260 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 2261 if (!devx_comp) { 2262 DRV_LOG(INFO, "failed to allocate devx_comp."); 2263 return; 2264 } 2265 flags = fcntl(devx_comp->fd, F_GETFL); 2266 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 2267 if (ret) { 2268 DRV_LOG(INFO, "failed to change file descriptor" 2269 " devx comp"); 2270 return; 2271 } 2272 sh->intr_handle_devx.fd = devx_comp->fd; 2273 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 2274 if (rte_intr_callback_register(&sh->intr_handle_devx, 2275 mlx5_dev_interrupt_handler_devx, sh)) { 2276 DRV_LOG(INFO, "Fail to install the devx shared" 2277 " interrupt."); 2278 sh->intr_handle_devx.fd = -1; 2279 } 2280 #endif /* HAVE_IBV_DEVX_ASYNC */ 2281 } 2282 } 2283 2284 /** 2285 * Uninstall shared asynchronous device events handler. 2286 * This function is implemented to support event sharing 2287 * between multiple ports of single IB device. 2288 * 2289 * @param dev 2290 * Pointer to mlx5_dev_ctx_shared object. 2291 */ 2292 void 2293 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2294 { 2295 if (sh->intr_handle.fd >= 0) 2296 mlx5_intr_callback_unregister(&sh->intr_handle, 2297 mlx5_dev_interrupt_handler, sh); 2298 #ifdef HAVE_IBV_DEVX_ASYNC 2299 if (sh->intr_handle_devx.fd >= 0) 2300 rte_intr_callback_unregister(&sh->intr_handle_devx, 2301 mlx5_dev_interrupt_handler_devx, sh); 2302 if (sh->devx_comp) 2303 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2304 #endif 2305 } 2306 2307 /** 2308 * Read statistics by a named counter. 2309 * 2310 * @param[in] priv 2311 * Pointer to the private device data structure. 2312 * @param[in] ctr_name 2313 * Pointer to the name of the statistic counter to read 2314 * @param[out] stat 2315 * Pointer to read statistic value. 2316 * @return 2317 * 0 on success and stat is valud, 1 if failed to read the value 2318 * rte_errno is set. 2319 * 2320 */ 2321 int 2322 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2323 uint64_t *stat) 2324 { 2325 int fd; 2326 2327 if (priv->sh) { 2328 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2329 priv->sh->ibdev_path, 2330 priv->dev_port, 2331 ctr_name); 2332 fd = open(path, O_RDONLY); 2333 /* 2334 * in switchdev the file location is not per port 2335 * but rather in <ibdev_path>/hw_counters/<file_name>. 2336 */ 2337 if (fd == -1) { 2338 MKSTR(path1, "%s/hw_counters/%s", 2339 priv->sh->ibdev_path, 2340 ctr_name); 2341 fd = open(path1, O_RDONLY); 2342 } 2343 if (fd != -1) { 2344 char buf[21] = {'\0'}; 2345 ssize_t n = read(fd, buf, sizeof(buf)); 2346 2347 close(fd); 2348 if (n != -1) { 2349 *stat = strtoull(buf, NULL, 10); 2350 return 0; 2351 } 2352 } 2353 } 2354 *stat = 0; 2355 return 1; 2356 } 2357 2358 /** 2359 * Set the reg_mr and dereg_mr call backs 2360 * 2361 * @param reg_mr_cb[out] 2362 * Pointer to reg_mr func 2363 * @param dereg_mr_cb[out] 2364 * Pointer to dereg_mr func 2365 * 2366 */ 2367 void 2368 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 2369 mlx5_dereg_mr_t *dereg_mr_cb) 2370 { 2371 *reg_mr_cb = mlx5_verbs_ops.reg_mr; 2372 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; 2373 } 2374 2375 /** 2376 * Remove a MAC address from device 2377 * 2378 * @param dev 2379 * Pointer to Ethernet device structure. 2380 * @param index 2381 * MAC address index. 2382 */ 2383 void 2384 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2385 { 2386 struct mlx5_priv *priv = dev->data->dev_private; 2387 const int vf = priv->config.vf; 2388 2389 if (vf) 2390 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2391 mlx5_ifindex(dev), priv->mac_own, 2392 &dev->data->mac_addrs[index], index); 2393 } 2394 2395 /** 2396 * Adds a MAC address to the device 2397 * 2398 * @param dev 2399 * Pointer to Ethernet device structure. 2400 * @param mac_addr 2401 * MAC address to register. 2402 * @param index 2403 * MAC address index. 2404 * 2405 * @return 2406 * 0 on success, a negative errno value otherwise 2407 */ 2408 int 2409 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2410 uint32_t index) 2411 { 2412 struct mlx5_priv *priv = dev->data->dev_private; 2413 const int vf = priv->config.vf; 2414 int ret = 0; 2415 2416 if (vf) 2417 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2418 mlx5_ifindex(dev), priv->mac_own, 2419 mac, index); 2420 return ret; 2421 } 2422 2423 /** 2424 * Modify a VF MAC address 2425 * 2426 * @param priv 2427 * Pointer to device private data. 2428 * @param mac_addr 2429 * MAC address to modify into. 2430 * @param iface_idx 2431 * Net device interface index 2432 * @param vf_index 2433 * VF index 2434 * 2435 * @return 2436 * 0 on success, a negative errno value otherwise 2437 */ 2438 int 2439 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2440 unsigned int iface_idx, 2441 struct rte_ether_addr *mac_addr, 2442 int vf_index) 2443 { 2444 return mlx5_nl_vf_mac_addr_modify 2445 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2446 } 2447 2448 /** 2449 * Set device promiscuous mode 2450 * 2451 * @param dev 2452 * Pointer to Ethernet device structure. 2453 * @param enable 2454 * 0 - promiscuous is disabled, otherwise - enabled 2455 * 2456 * @return 2457 * 0 on success, a negative error value otherwise 2458 */ 2459 int 2460 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2461 { 2462 struct mlx5_priv *priv = dev->data->dev_private; 2463 2464 return mlx5_nl_promisc(priv->nl_socket_route, 2465 mlx5_ifindex(dev), !!enable); 2466 } 2467 2468 /** 2469 * Set device promiscuous mode 2470 * 2471 * @param dev 2472 * Pointer to Ethernet device structure. 2473 * @param enable 2474 * 0 - all multicase is disabled, otherwise - enabled 2475 * 2476 * @return 2477 * 0 on success, a negative error value otherwise 2478 */ 2479 int 2480 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2481 { 2482 struct mlx5_priv *priv = dev->data->dev_private; 2483 2484 return mlx5_nl_allmulti(priv->nl_socket_route, 2485 mlx5_ifindex(dev), !!enable); 2486 } 2487 2488 /** 2489 * Flush device MAC addresses 2490 * 2491 * @param dev 2492 * Pointer to Ethernet device structure. 2493 * 2494 */ 2495 void 2496 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2497 { 2498 struct mlx5_priv *priv = dev->data->dev_private; 2499 2500 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2501 dev->data->mac_addrs, 2502 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2503 } 2504 2505 const struct eth_dev_ops mlx5_os_dev_ops = { 2506 .dev_configure = mlx5_dev_configure, 2507 .dev_start = mlx5_dev_start, 2508 .dev_stop = mlx5_dev_stop, 2509 .dev_set_link_down = mlx5_set_link_down, 2510 .dev_set_link_up = mlx5_set_link_up, 2511 .dev_close = mlx5_dev_close, 2512 .promiscuous_enable = mlx5_promiscuous_enable, 2513 .promiscuous_disable = mlx5_promiscuous_disable, 2514 .allmulticast_enable = mlx5_allmulticast_enable, 2515 .allmulticast_disable = mlx5_allmulticast_disable, 2516 .link_update = mlx5_link_update, 2517 .stats_get = mlx5_stats_get, 2518 .stats_reset = mlx5_stats_reset, 2519 .xstats_get = mlx5_xstats_get, 2520 .xstats_reset = mlx5_xstats_reset, 2521 .xstats_get_names = mlx5_xstats_get_names, 2522 .fw_version_get = mlx5_fw_version_get, 2523 .dev_infos_get = mlx5_dev_infos_get, 2524 .read_clock = mlx5_txpp_read_clock, 2525 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2526 .vlan_filter_set = mlx5_vlan_filter_set, 2527 .rx_queue_setup = mlx5_rx_queue_setup, 2528 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2529 .tx_queue_setup = mlx5_tx_queue_setup, 2530 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2531 .rx_queue_release = mlx5_rx_queue_release, 2532 .tx_queue_release = mlx5_tx_queue_release, 2533 .rx_queue_start = mlx5_rx_queue_start, 2534 .rx_queue_stop = mlx5_rx_queue_stop, 2535 .tx_queue_start = mlx5_tx_queue_start, 2536 .tx_queue_stop = mlx5_tx_queue_stop, 2537 .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2538 .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2539 .mac_addr_remove = mlx5_mac_addr_remove, 2540 .mac_addr_add = mlx5_mac_addr_add, 2541 .mac_addr_set = mlx5_mac_addr_set, 2542 .set_mc_addr_list = mlx5_set_mc_addr_list, 2543 .mtu_set = mlx5_dev_set_mtu, 2544 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2545 .vlan_offload_set = mlx5_vlan_offload_set, 2546 .reta_update = mlx5_dev_rss_reta_update, 2547 .reta_query = mlx5_dev_rss_reta_query, 2548 .rss_hash_update = mlx5_rss_hash_update, 2549 .rss_hash_conf_get = mlx5_rss_hash_conf_get, 2550 .filter_ctrl = mlx5_dev_filter_ctrl, 2551 .rxq_info_get = mlx5_rxq_info_get, 2552 .txq_info_get = mlx5_txq_info_get, 2553 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2554 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2555 .rx_queue_intr_enable = mlx5_rx_intr_enable, 2556 .rx_queue_intr_disable = mlx5_rx_intr_disable, 2557 .is_removed = mlx5_is_removed, 2558 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, 2559 .get_module_info = mlx5_get_module_info, 2560 .get_module_eeprom = mlx5_get_module_eeprom, 2561 .hairpin_cap_get = mlx5_hairpin_cap_get, 2562 .mtr_ops_get = mlx5_flow_meter_ops_get, 2563 }; 2564 2565 /* Available operations from secondary process. */ 2566 const struct eth_dev_ops mlx5_os_dev_sec_ops = { 2567 .stats_get = mlx5_stats_get, 2568 .stats_reset = mlx5_stats_reset, 2569 .xstats_get = mlx5_xstats_get, 2570 .xstats_reset = mlx5_xstats_reset, 2571 .xstats_get_names = mlx5_xstats_get_names, 2572 .fw_version_get = mlx5_fw_version_get, 2573 .dev_infos_get = mlx5_dev_infos_get, 2574 .read_clock = mlx5_txpp_read_clock, 2575 .rx_queue_start = mlx5_rx_queue_start, 2576 .rx_queue_stop = mlx5_rx_queue_stop, 2577 .tx_queue_start = mlx5_tx_queue_start, 2578 .tx_queue_stop = mlx5_tx_queue_stop, 2579 .rxq_info_get = mlx5_rxq_info_get, 2580 .txq_info_get = mlx5_txq_info_get, 2581 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2582 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2583 .get_module_info = mlx5_get_module_info, 2584 .get_module_eeprom = mlx5_get_module_eeprom, 2585 }; 2586 2587 /* Available operations in flow isolated mode. */ 2588 const struct eth_dev_ops mlx5_os_dev_ops_isolate = { 2589 .dev_configure = mlx5_dev_configure, 2590 .dev_start = mlx5_dev_start, 2591 .dev_stop = mlx5_dev_stop, 2592 .dev_set_link_down = mlx5_set_link_down, 2593 .dev_set_link_up = mlx5_set_link_up, 2594 .dev_close = mlx5_dev_close, 2595 .promiscuous_enable = mlx5_promiscuous_enable, 2596 .promiscuous_disable = mlx5_promiscuous_disable, 2597 .allmulticast_enable = mlx5_allmulticast_enable, 2598 .allmulticast_disable = mlx5_allmulticast_disable, 2599 .link_update = mlx5_link_update, 2600 .stats_get = mlx5_stats_get, 2601 .stats_reset = mlx5_stats_reset, 2602 .xstats_get = mlx5_xstats_get, 2603 .xstats_reset = mlx5_xstats_reset, 2604 .xstats_get_names = mlx5_xstats_get_names, 2605 .fw_version_get = mlx5_fw_version_get, 2606 .dev_infos_get = mlx5_dev_infos_get, 2607 .read_clock = mlx5_txpp_read_clock, 2608 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2609 .vlan_filter_set = mlx5_vlan_filter_set, 2610 .rx_queue_setup = mlx5_rx_queue_setup, 2611 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2612 .tx_queue_setup = mlx5_tx_queue_setup, 2613 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2614 .rx_queue_release = mlx5_rx_queue_release, 2615 .tx_queue_release = mlx5_tx_queue_release, 2616 .rx_queue_start = mlx5_rx_queue_start, 2617 .rx_queue_stop = mlx5_rx_queue_stop, 2618 .tx_queue_start = mlx5_tx_queue_start, 2619 .tx_queue_stop = mlx5_tx_queue_stop, 2620 .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2621 .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2622 .mac_addr_remove = mlx5_mac_addr_remove, 2623 .mac_addr_add = mlx5_mac_addr_add, 2624 .mac_addr_set = mlx5_mac_addr_set, 2625 .set_mc_addr_list = mlx5_set_mc_addr_list, 2626 .mtu_set = mlx5_dev_set_mtu, 2627 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2628 .vlan_offload_set = mlx5_vlan_offload_set, 2629 .filter_ctrl = mlx5_dev_filter_ctrl, 2630 .rxq_info_get = mlx5_rxq_info_get, 2631 .txq_info_get = mlx5_txq_info_get, 2632 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2633 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2634 .rx_queue_intr_enable = mlx5_rx_intr_enable, 2635 .rx_queue_intr_disable = mlx5_rx_intr_disable, 2636 .is_removed = mlx5_is_removed, 2637 .get_module_info = mlx5_get_module_info, 2638 .get_module_eeprom = mlx5_get_module_eeprom, 2639 .hairpin_cap_get = mlx5_hairpin_cap_get, 2640 .mtr_ops_get = mlx5_flow_meter_ops_get, 2641 }; 2642