1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <ethdev_driver.h> 20 #include <ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <bus_driver.h> 23 #include <bus_pci_driver.h> 24 #include <bus_auxiliary_driver.h> 25 #include <rte_common.h> 26 #include <rte_kvargs.h> 27 #include <rte_rwlock.h> 28 #include <rte_spinlock.h> 29 #include <rte_string_fns.h> 30 #include <rte_alarm.h> 31 #include <rte_eal_paging.h> 32 33 #include <mlx5_glue.h> 34 #include <mlx5_devx_cmds.h> 35 #include <mlx5_common.h> 36 #include <mlx5_common_mp.h> 37 #include <mlx5_common_mr.h> 38 #include <mlx5_malloc.h> 39 40 #include "mlx5_defs.h" 41 #include "mlx5.h" 42 #include "mlx5_common_os.h" 43 #include "mlx5_utils.h" 44 #include "mlx5_rxtx.h" 45 #include "mlx5_rx.h" 46 #include "mlx5_tx.h" 47 #include "mlx5_autoconf.h" 48 #include "mlx5_flow.h" 49 #include "rte_pmd_mlx5.h" 50 #include "mlx5_verbs.h" 51 #include "mlx5_nl.h" 52 #include "mlx5_devx.h" 53 54 #ifndef HAVE_IBV_MLX5_MOD_MPW 55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 57 #endif 58 59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 61 #endif 62 63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 64 65 /* Spinlock for mlx5_shared_data allocation. */ 66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 67 68 /* Process local data for secondary processes. */ 69 static struct mlx5_local_data mlx5_local_data; 70 71 /* rte flow indexed pool configuration. */ 72 static struct mlx5_indexed_pool_config icfg[] = { 73 { 74 .size = sizeof(struct rte_flow), 75 .trunk_size = 64, 76 .need_lock = 1, 77 .release_mem_en = 0, 78 .malloc = mlx5_malloc, 79 .free = mlx5_free, 80 .per_core_cache = 0, 81 .type = "ctl_flow_ipool", 82 }, 83 { 84 .size = sizeof(struct rte_flow), 85 .trunk_size = 64, 86 .grow_trunk = 3, 87 .grow_shift = 2, 88 .need_lock = 1, 89 .release_mem_en = 0, 90 .malloc = mlx5_malloc, 91 .free = mlx5_free, 92 .per_core_cache = 1 << 14, 93 .type = "rte_flow_ipool", 94 }, 95 { 96 .size = sizeof(struct rte_flow), 97 .trunk_size = 64, 98 .grow_trunk = 3, 99 .grow_shift = 2, 100 .need_lock = 1, 101 .release_mem_en = 0, 102 .malloc = mlx5_malloc, 103 .free = mlx5_free, 104 .per_core_cache = 0, 105 .type = "mcp_flow_ipool", 106 }, 107 }; 108 109 /** 110 * Set the completion channel file descriptor interrupt as non-blocking. 111 * 112 * @param[in] rxq_obj 113 * Pointer to RQ channel object, which includes the channel fd 114 * 115 * @param[out] fd 116 * The file descriptor (representing the interrupt) used in this channel. 117 * 118 * @return 119 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 120 */ 121 int 122 mlx5_os_set_nonblock_channel_fd(int fd) 123 { 124 int flags; 125 126 flags = fcntl(fd, F_GETFL); 127 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 128 } 129 130 /** 131 * Get mlx5 device attributes. The glue function query_device_ex() is called 132 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 133 * device attributes from the glue out parameter. 134 * 135 * @param sh 136 * Pointer to shared device context. 137 * 138 * @return 139 * 0 on success, a negative errno value otherwise and rte_errno is set. 140 */ 141 int 142 mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) 143 { 144 int err; 145 struct mlx5_common_device *cdev = sh->cdev; 146 struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr; 147 struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 }; 148 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 149 150 err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex); 151 if (err) { 152 rte_errno = errno; 153 return -rte_errno; 154 } 155 #ifdef HAVE_IBV_MLX5_MOD_SWP 156 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 157 #endif 158 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 159 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 160 #endif 161 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 162 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 163 #endif 164 err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr); 165 if (err) { 166 rte_errno = errno; 167 return -rte_errno; 168 } 169 memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap)); 170 if (mlx5_dev_is_pci(cdev->dev)) 171 sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev)); 172 else 173 sh->dev_cap.sf = 1; 174 sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr; 175 sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge; 176 sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq; 177 sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp; 178 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 179 sh->dev_cap.dest_tir = 1; 180 #endif 181 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR) 182 DRV_LOG(DEBUG, "DV flow is supported."); 183 sh->dev_cap.dv_flow_en = 1; 184 #endif 185 #ifdef HAVE_MLX5DV_DR_ESWITCH 186 if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode) 187 sh->dev_cap.dv_esw_en = 1; 188 #endif 189 /* 190 * Multi-packet send is supported by ConnectX-4 Lx PF as well 191 * as all ConnectX-5 devices. 192 */ 193 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 194 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 195 DRV_LOG(DEBUG, "Enhanced MPW is supported."); 196 sh->dev_cap.mps = MLX5_MPW_ENHANCED; 197 } else { 198 DRV_LOG(DEBUG, "MPW is supported."); 199 sh->dev_cap.mps = MLX5_MPW; 200 } 201 } else { 202 DRV_LOG(DEBUG, "MPW isn't supported."); 203 sh->dev_cap.mps = MLX5_MPW_DISABLED; 204 } 205 #if (RTE_CACHE_LINE_SIZE == 128) 206 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP) 207 sh->dev_cap.cqe_comp = 1; 208 DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.", 209 sh->dev_cap.cqe_comp ? "" : "not "); 210 #else 211 sh->dev_cap.cqe_comp = 1; 212 #endif 213 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 214 sh->dev_cap.mpls_en = 215 ((dv_attr.tunnel_offloads_caps & 216 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 217 (dv_attr.tunnel_offloads_caps & 218 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 219 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.", 220 sh->dev_cap.mpls_en ? "" : "not "); 221 #else 222 DRV_LOG(WARNING, 223 "MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration"); 224 #endif 225 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 226 sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align; 227 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 228 sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex & 229 IBV_DEVICE_PCI_WRITE_END_PADDING); 230 #endif 231 sh->dev_cap.hw_csum = 232 !!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM); 233 DRV_LOG(DEBUG, "Checksum offloading is %ssupported.", 234 sh->dev_cap.hw_csum ? "" : "not "); 235 sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps & 236 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 237 DRV_LOG(DEBUG, "VLAN stripping is %ssupported.", 238 (sh->dev_cap.hw_vlan_strip ? "" : "not ")); 239 sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps & 240 IBV_RAW_PACKET_CAP_SCATTER_FCS); 241 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 242 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 243 DRV_LOG(DEBUG, "Counters are not supported."); 244 #endif 245 /* 246 * DPDK doesn't support larger/variable indirection tables. 247 * Once DPDK supports it, take max size from device attr. 248 */ 249 sh->dev_cap.ind_table_max_size = 250 RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size, 251 (unsigned int)RTE_ETH_RSS_RETA_SIZE_512); 252 DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u", 253 sh->dev_cap.ind_table_max_size); 254 sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 && 255 (attr_ex.tso_caps.supported_qpts & 256 (1 << IBV_QPT_RAW_PACKET))); 257 if (sh->dev_cap.tso) 258 sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso; 259 strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver, 260 sizeof(sh->dev_cap.fw_ver)); 261 #ifdef HAVE_IBV_MLX5_MOD_SWP 262 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 263 sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads & 264 (MLX5_SW_PARSING_CAP | 265 MLX5_SW_PARSING_CSUM_CAP | 266 MLX5_SW_PARSING_TSO_CAP); 267 DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp); 268 #endif 269 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 270 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 271 struct mlx5dv_striding_rq_caps *strd_rq_caps = 272 &dv_attr.striding_rq_caps; 273 274 sh->dev_cap.mprq.enabled = 1; 275 sh->dev_cap.mprq.log_min_stride_size = 276 strd_rq_caps->min_single_stride_log_num_of_bytes; 277 sh->dev_cap.mprq.log_max_stride_size = 278 strd_rq_caps->max_single_stride_log_num_of_bytes; 279 sh->dev_cap.mprq.log_min_stride_num = 280 strd_rq_caps->min_single_wqe_log_num_of_strides; 281 sh->dev_cap.mprq.log_max_stride_num = 282 strd_rq_caps->max_single_wqe_log_num_of_strides; 283 sh->dev_cap.mprq.log_min_stride_wqe_size = 284 cdev->config.devx ? 285 hca_attr->log_min_stride_wqe_sz : 286 MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 287 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u", 288 sh->dev_cap.mprq.log_min_stride_size); 289 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u", 290 sh->dev_cap.mprq.log_max_stride_size); 291 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u", 292 sh->dev_cap.mprq.log_min_stride_num); 293 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u", 294 sh->dev_cap.mprq.log_max_stride_num); 295 DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u", 296 sh->dev_cap.mprq.log_min_stride_wqe_size); 297 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 298 strd_rq_caps->supported_qpts); 299 DRV_LOG(DEBUG, "Device supports Multi-Packet RQ."); 300 } 301 #endif 302 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 303 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 304 sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps & 305 (MLX5_TUNNELED_OFFLOADS_VXLAN_CAP | 306 MLX5_TUNNELED_OFFLOADS_GRE_CAP | 307 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP); 308 } 309 if (sh->dev_cap.tunnel_en) { 310 DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s", 311 sh->dev_cap.tunnel_en & 312 MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "", 313 sh->dev_cap.tunnel_en & 314 MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "", 315 sh->dev_cap.tunnel_en & 316 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : ""); 317 } else { 318 DRV_LOG(DEBUG, "Tunnel offloading is not supported."); 319 } 320 #else 321 DRV_LOG(WARNING, 322 "Tunnel offloading disabled due to old OFED/rdma-core version"); 323 #endif 324 if (!sh->cdev->config.devx) 325 return 0; 326 /* Check capabilities for Packet Pacing. */ 327 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.", 328 hca_attr->dev_freq_khz); 329 DRV_LOG(DEBUG, "Packet pacing is %ssupported.", 330 hca_attr->qos.packet_pacing ? "" : "not "); 331 DRV_LOG(DEBUG, "Cross channel ops are %ssupported.", 332 hca_attr->cross_channel ? "" : "not "); 333 DRV_LOG(DEBUG, "WQE index ignore is %ssupported.", 334 hca_attr->wqe_index_ignore ? "" : "not "); 335 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.", 336 hca_attr->non_wire_sq ? "" : "not "); 337 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 338 hca_attr->log_max_static_sq_wq ? "" : "not ", 339 hca_attr->log_max_static_sq_wq); 340 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.", 341 hca_attr->qos.wqe_rate_pp ? "" : "not "); 342 sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing; 343 if (!hca_attr->cross_channel) { 344 DRV_LOG(DEBUG, 345 "Cross channel operations are required for packet pacing."); 346 sh->dev_cap.txpp_en = 0; 347 } 348 if (!hca_attr->wqe_index_ignore) { 349 DRV_LOG(DEBUG, 350 "WQE index ignore feature is required for packet pacing."); 351 sh->dev_cap.txpp_en = 0; 352 } 353 if (!hca_attr->non_wire_sq) { 354 DRV_LOG(DEBUG, 355 "Non-wire SQ feature is required for packet pacing."); 356 sh->dev_cap.txpp_en = 0; 357 } 358 if (!hca_attr->log_max_static_sq_wq) { 359 DRV_LOG(DEBUG, 360 "Static WQE SQ feature is required for packet pacing."); 361 sh->dev_cap.txpp_en = 0; 362 } 363 if (!hca_attr->qos.wqe_rate_pp) { 364 DRV_LOG(DEBUG, 365 "WQE rate mode is required for packet pacing."); 366 sh->dev_cap.txpp_en = 0; 367 } 368 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 369 DRV_LOG(DEBUG, 370 "DevX does not provide UAR offset, can't create queues for packet pacing."); 371 sh->dev_cap.txpp_en = 0; 372 #endif 373 sh->dev_cap.scatter_fcs_w_decap_disable = 374 hca_attr->scatter_fcs_w_decap_disable; 375 sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; 376 mlx5_rt_timestamp_config(sh, hca_attr); 377 return 0; 378 } 379 380 /** 381 * Detect misc5 support or not 382 * 383 * @param[in] priv 384 * Device private data pointer 385 */ 386 #ifdef HAVE_MLX5DV_DR 387 static void 388 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 389 { 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 391 /* Dummy VxLAN matcher to detect rdma-core misc5 cap 392 * Case: IPv4--->UDP--->VxLAN--->vni 393 */ 394 void *tbl; 395 struct mlx5_flow_dv_match_params matcher_mask; 396 void *match_m; 397 void *matcher; 398 void *headers_m; 399 void *misc5_m; 400 uint32_t *tunnel_header_m; 401 struct mlx5dv_flow_matcher_attr dv_attr; 402 403 memset(&matcher_mask, 0, sizeof(matcher_mask)); 404 matcher_mask.size = sizeof(matcher_mask.buf); 405 match_m = matcher_mask.buf; 406 headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 407 misc5_m = MLX5_ADDR_OF(fte_match_param, 408 match_m, misc_parameters_5); 409 tunnel_header_m = (uint32_t *) 410 MLX5_ADDR_OF(fte_match_set_misc5, 411 misc5_m, tunnel_header_1); 412 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 413 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 414 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 415 *tunnel_header_m = 0xffffff; 416 417 tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 418 if (!tbl) { 419 DRV_LOG(INFO, "No SW steering support"); 420 return; 421 } 422 dv_attr.type = IBV_FLOW_ATTR_NORMAL, 423 dv_attr.match_mask = (void *)&matcher_mask, 424 dv_attr.match_criteria_enable = 425 (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 426 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 427 dv_attr.priority = 3; 428 #ifdef HAVE_MLX5DV_DR_ESWITCH 429 void *misc2_m; 430 if (priv->sh->config.dv_esw_en) { 431 /* FDB enabled reg_c_0 */ 432 dv_attr.match_criteria_enable |= 433 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 434 misc2_m = MLX5_ADDR_OF(fte_match_param, 435 match_m, misc_parameters_2); 436 MLX5_SET(fte_match_set_misc2, misc2_m, 437 metadata_reg_c_0, 0xffff); 438 } 439 #endif 440 matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 441 &dv_attr, tbl); 442 if (matcher) { 443 priv->sh->misc5_cap = 1; 444 mlx5_glue->dv_destroy_flow_matcher(matcher); 445 } 446 mlx5_glue->dr_destroy_flow_tbl(tbl); 447 #else 448 RTE_SET_USED(priv); 449 #endif 450 } 451 #endif 452 453 /** 454 * Initialize DR related data within private structure. 455 * Routine checks the reference counter and does actual 456 * resources creation/initialization only if counter is zero. 457 * 458 * @param[in] priv 459 * Pointer to the private device data structure. 460 * 461 * @return 462 * Zero on success, positive error code otherwise. 463 */ 464 static int 465 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 466 { 467 struct mlx5_dev_ctx_shared *sh = priv->sh; 468 char s[MLX5_NAME_SIZE] __rte_unused; 469 int err; 470 471 MLX5_ASSERT(sh && sh->refcnt); 472 if (sh->refcnt > 1) 473 return 0; 474 err = mlx5_alloc_table_hash_list(priv); 475 if (err) 476 goto error; 477 /* The resources below are only valid with DV support. */ 478 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 479 /* Init shared flex parsers list, no need lcore_share */ 480 snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 481 sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 482 mlx5_flex_parser_create_cb, 483 mlx5_flex_parser_match_cb, 484 mlx5_flex_parser_remove_cb, 485 mlx5_flex_parser_clone_cb, 486 mlx5_flex_parser_clone_free_cb); 487 if (!sh->flex_parsers_dv) 488 goto error; 489 if (priv->sh->config.dv_flow_en == 2) 490 return 0; 491 /* Init port id action list. */ 492 snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 493 sh->port_id_action_list = mlx5_list_create(s, sh, true, 494 flow_dv_port_id_create_cb, 495 flow_dv_port_id_match_cb, 496 flow_dv_port_id_remove_cb, 497 flow_dv_port_id_clone_cb, 498 flow_dv_port_id_clone_free_cb); 499 if (!sh->port_id_action_list) 500 goto error; 501 /* Init push vlan action list. */ 502 snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 503 sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 504 flow_dv_push_vlan_create_cb, 505 flow_dv_push_vlan_match_cb, 506 flow_dv_push_vlan_remove_cb, 507 flow_dv_push_vlan_clone_cb, 508 flow_dv_push_vlan_clone_free_cb); 509 if (!sh->push_vlan_action_list) 510 goto error; 511 /* Init sample action list. */ 512 snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 513 sh->sample_action_list = mlx5_list_create(s, sh, true, 514 flow_dv_sample_create_cb, 515 flow_dv_sample_match_cb, 516 flow_dv_sample_remove_cb, 517 flow_dv_sample_clone_cb, 518 flow_dv_sample_clone_free_cb); 519 if (!sh->sample_action_list) 520 goto error; 521 /* Init dest array action list. */ 522 snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 523 sh->dest_array_list = mlx5_list_create(s, sh, true, 524 flow_dv_dest_array_create_cb, 525 flow_dv_dest_array_match_cb, 526 flow_dv_dest_array_remove_cb, 527 flow_dv_dest_array_clone_cb, 528 flow_dv_dest_array_clone_free_cb); 529 if (!sh->dest_array_list) 530 goto error; 531 #else 532 if (priv->sh->config.dv_flow_en == 2) 533 return 0; 534 #endif 535 #ifdef HAVE_MLX5DV_DR 536 void *domain; 537 538 /* Reference counter is zero, we should initialize structures. */ 539 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 540 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 541 if (!domain) { 542 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 543 err = errno; 544 goto error; 545 } 546 sh->rx_domain = domain; 547 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 548 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 549 if (!domain) { 550 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 551 err = errno; 552 goto error; 553 } 554 sh->tx_domain = domain; 555 #ifdef HAVE_MLX5DV_DR_ESWITCH 556 if (sh->config.dv_esw_en) { 557 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 558 MLX5DV_DR_DOMAIN_TYPE_FDB); 559 if (!domain) { 560 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 561 err = errno; 562 goto error; 563 } 564 sh->fdb_domain = domain; 565 } 566 /* 567 * The drop action is just some dummy placeholder in rdma-core. It 568 * does not belong to domains and has no any attributes, and, can be 569 * shared by the entire device. 570 */ 571 sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 572 if (!sh->dr_drop_action) { 573 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 574 err = errno; 575 goto error; 576 } 577 #endif 578 if (!sh->tunnel_hub && sh->config.dv_miss_info) 579 err = mlx5_alloc_tunnel_hub(sh); 580 if (err) { 581 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 582 goto error; 583 } 584 if (sh->config.reclaim_mode == MLX5_RCM_AGGR) { 585 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 586 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 587 if (sh->fdb_domain) 588 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 589 } 590 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 591 if (!sh->config.allow_duplicate_pattern) { 592 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 593 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 594 #endif 595 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 596 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 597 if (sh->fdb_domain) 598 mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 599 } 600 601 __mlx5_discovery_misc5_cap(priv); 602 #endif /* HAVE_MLX5DV_DR */ 603 sh->default_miss_action = 604 mlx5_glue->dr_create_flow_action_default_miss(); 605 if (!sh->default_miss_action) 606 DRV_LOG(WARNING, "Default miss action is not supported."); 607 LIST_INIT(&sh->shared_rxqs); 608 return 0; 609 error: 610 /* Rollback the created objects. */ 611 if (sh->rx_domain) { 612 mlx5_glue->dr_destroy_domain(sh->rx_domain); 613 sh->rx_domain = NULL; 614 } 615 if (sh->tx_domain) { 616 mlx5_glue->dr_destroy_domain(sh->tx_domain); 617 sh->tx_domain = NULL; 618 } 619 if (sh->fdb_domain) { 620 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 621 sh->fdb_domain = NULL; 622 } 623 if (sh->dr_drop_action) { 624 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 625 sh->dr_drop_action = NULL; 626 } 627 if (sh->pop_vlan_action) { 628 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 629 sh->pop_vlan_action = NULL; 630 } 631 if (sh->encaps_decaps) { 632 mlx5_hlist_destroy(sh->encaps_decaps); 633 sh->encaps_decaps = NULL; 634 } 635 if (sh->modify_cmds) { 636 mlx5_hlist_destroy(sh->modify_cmds); 637 sh->modify_cmds = NULL; 638 } 639 if (sh->tag_table) { 640 /* tags should be destroyed with flow before. */ 641 mlx5_hlist_destroy(sh->tag_table); 642 sh->tag_table = NULL; 643 } 644 if (sh->tunnel_hub) { 645 mlx5_release_tunnel_hub(sh, priv->dev_port); 646 sh->tunnel_hub = NULL; 647 } 648 mlx5_free_table_hash_list(priv); 649 if (sh->port_id_action_list) { 650 mlx5_list_destroy(sh->port_id_action_list); 651 sh->port_id_action_list = NULL; 652 } 653 if (sh->push_vlan_action_list) { 654 mlx5_list_destroy(sh->push_vlan_action_list); 655 sh->push_vlan_action_list = NULL; 656 } 657 if (sh->sample_action_list) { 658 mlx5_list_destroy(sh->sample_action_list); 659 sh->sample_action_list = NULL; 660 } 661 if (sh->dest_array_list) { 662 mlx5_list_destroy(sh->dest_array_list); 663 sh->dest_array_list = NULL; 664 } 665 return err; 666 } 667 668 /** 669 * Destroy DR related data within private structure. 670 * 671 * @param[in] priv 672 * Pointer to the private device data structure. 673 */ 674 void 675 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 676 { 677 struct mlx5_dev_ctx_shared *sh = priv->sh; 678 679 MLX5_ASSERT(sh && sh->refcnt); 680 if (sh->refcnt > 1) 681 return; 682 MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 683 #ifdef HAVE_MLX5DV_DR 684 if (sh->rx_domain) { 685 mlx5_glue->dr_destroy_domain(sh->rx_domain); 686 sh->rx_domain = NULL; 687 } 688 if (sh->tx_domain) { 689 mlx5_glue->dr_destroy_domain(sh->tx_domain); 690 sh->tx_domain = NULL; 691 } 692 #ifdef HAVE_MLX5DV_DR_ESWITCH 693 if (sh->fdb_domain) { 694 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 695 sh->fdb_domain = NULL; 696 } 697 if (sh->dr_drop_action) { 698 mlx5_glue->destroy_flow_action(sh->dr_drop_action); 699 sh->dr_drop_action = NULL; 700 } 701 #endif 702 if (sh->pop_vlan_action) { 703 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 704 sh->pop_vlan_action = NULL; 705 } 706 if (sh->send_to_kernel_action.action) { 707 void *action = sh->send_to_kernel_action.action; 708 709 mlx5_glue->destroy_flow_action(action); 710 sh->send_to_kernel_action.action = NULL; 711 } 712 if (sh->send_to_kernel_action.tbl) { 713 struct mlx5_flow_tbl_resource *tbl = 714 sh->send_to_kernel_action.tbl; 715 716 flow_dv_tbl_resource_release(sh, tbl); 717 sh->send_to_kernel_action.tbl = NULL; 718 } 719 #endif /* HAVE_MLX5DV_DR */ 720 if (sh->default_miss_action) 721 mlx5_glue->destroy_flow_action 722 (sh->default_miss_action); 723 if (sh->encaps_decaps) { 724 mlx5_hlist_destroy(sh->encaps_decaps); 725 sh->encaps_decaps = NULL; 726 } 727 if (sh->modify_cmds) { 728 mlx5_hlist_destroy(sh->modify_cmds); 729 sh->modify_cmds = NULL; 730 } 731 if (sh->tag_table) { 732 /* tags should be destroyed with flow before. */ 733 mlx5_hlist_destroy(sh->tag_table); 734 sh->tag_table = NULL; 735 } 736 if (sh->tunnel_hub) { 737 mlx5_release_tunnel_hub(sh, priv->dev_port); 738 sh->tunnel_hub = NULL; 739 } 740 mlx5_free_table_hash_list(priv); 741 if (sh->port_id_action_list) { 742 mlx5_list_destroy(sh->port_id_action_list); 743 sh->port_id_action_list = NULL; 744 } 745 if (sh->push_vlan_action_list) { 746 mlx5_list_destroy(sh->push_vlan_action_list); 747 sh->push_vlan_action_list = NULL; 748 } 749 if (sh->sample_action_list) { 750 mlx5_list_destroy(sh->sample_action_list); 751 sh->sample_action_list = NULL; 752 } 753 if (sh->dest_array_list) { 754 mlx5_list_destroy(sh->dest_array_list); 755 sh->dest_array_list = NULL; 756 } 757 } 758 759 /** 760 * Initialize shared data between primary and secondary process. 761 * 762 * A memzone is reserved by primary process and secondary processes attach to 763 * the memzone. 764 * 765 * @return 766 * 0 on success, a negative errno value otherwise and rte_errno is set. 767 */ 768 static int 769 mlx5_init_shared_data(void) 770 { 771 const struct rte_memzone *mz; 772 int ret = 0; 773 774 rte_spinlock_lock(&mlx5_shared_data_lock); 775 if (mlx5_shared_data == NULL) { 776 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 777 /* Allocate shared memory. */ 778 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 779 sizeof(*mlx5_shared_data), 780 SOCKET_ID_ANY, 0); 781 if (mz == NULL) { 782 DRV_LOG(ERR, 783 "Cannot allocate mlx5 shared data"); 784 ret = -rte_errno; 785 goto error; 786 } 787 mlx5_shared_data = mz->addr; 788 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 789 rte_spinlock_init(&mlx5_shared_data->lock); 790 } else { 791 /* Lookup allocated shared memory. */ 792 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 793 if (mz == NULL) { 794 DRV_LOG(ERR, 795 "Cannot attach mlx5 shared data"); 796 ret = -rte_errno; 797 goto error; 798 } 799 mlx5_shared_data = mz->addr; 800 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 801 } 802 } 803 error: 804 rte_spinlock_unlock(&mlx5_shared_data_lock); 805 return ret; 806 } 807 808 /** 809 * PMD global initialization. 810 * 811 * Independent from individual device, this function initializes global 812 * per-PMD data structures distinguishing primary and secondary processes. 813 * Hence, each initialization is called once per a process. 814 * 815 * @return 816 * 0 on success, a negative errno value otherwise and rte_errno is set. 817 */ 818 static int 819 mlx5_init_once(void) 820 { 821 struct mlx5_shared_data *sd; 822 struct mlx5_local_data *ld = &mlx5_local_data; 823 int ret = 0; 824 825 if (mlx5_init_shared_data()) 826 return -rte_errno; 827 sd = mlx5_shared_data; 828 MLX5_ASSERT(sd); 829 rte_spinlock_lock(&sd->lock); 830 switch (rte_eal_process_type()) { 831 case RTE_PROC_PRIMARY: 832 if (sd->init_done) 833 break; 834 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 835 mlx5_mp_os_primary_handle); 836 if (ret) 837 goto out; 838 sd->init_done = true; 839 break; 840 case RTE_PROC_SECONDARY: 841 if (ld->init_done) 842 break; 843 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 844 mlx5_mp_os_secondary_handle); 845 if (ret) 846 goto out; 847 ++sd->secondary_cnt; 848 ld->init_done = true; 849 break; 850 default: 851 break; 852 } 853 out: 854 rte_spinlock_unlock(&sd->lock); 855 return ret; 856 } 857 858 /** 859 * DR flow drop action support detect. 860 * 861 * @param dev 862 * Pointer to rte_eth_dev structure. 863 * 864 */ 865 static void 866 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 867 { 868 #ifdef HAVE_MLX5DV_DR 869 struct mlx5_priv *priv = dev->data->dev_private; 870 871 if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action) 872 return; 873 /** 874 * DR supports drop action placeholder when it is supported; 875 * otherwise, use the queue drop action. 876 */ 877 if (!priv->sh->drop_action_check_flag) { 878 if (!mlx5_flow_discover_dr_action_support(dev)) 879 priv->sh->dr_drop_action_en = 1; 880 priv->sh->drop_action_check_flag = 1; 881 } 882 if (priv->sh->dr_drop_action_en) 883 priv->root_drop_action = priv->sh->dr_drop_action; 884 else 885 priv->root_drop_action = priv->drop_queue.hrxq->action; 886 #endif 887 } 888 889 static void 890 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 891 { 892 struct mlx5_priv *priv = dev->data->dev_private; 893 void *ctx = priv->sh->cdev->ctx; 894 895 priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 896 if (!priv->q_counters) { 897 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 898 struct ibv_wq *wq; 899 900 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 901 "by DevX - fall-back to use the kernel driver global " 902 "queue counter.", dev->data->port_id); 903 /* Create WQ by kernel and query its queue counter ID. */ 904 if (cq) { 905 wq = mlx5_glue->create_wq(ctx, 906 &(struct ibv_wq_init_attr){ 907 .wq_type = IBV_WQT_RQ, 908 .max_wr = 1, 909 .max_sge = 1, 910 .pd = priv->sh->cdev->pd, 911 .cq = cq, 912 }); 913 if (wq) { 914 /* Counter is assigned only on RDY state. */ 915 int ret = mlx5_glue->modify_wq(wq, 916 &(struct ibv_wq_attr){ 917 .attr_mask = IBV_WQ_ATTR_STATE, 918 .wq_state = IBV_WQS_RDY, 919 }); 920 921 if (ret == 0) 922 mlx5_devx_cmd_wq_query(wq, 923 &priv->counter_set_id); 924 claim_zero(mlx5_glue->destroy_wq(wq)); 925 } 926 claim_zero(mlx5_glue->destroy_cq(cq)); 927 } 928 } else { 929 priv->counter_set_id = priv->q_counters->id; 930 } 931 if (priv->counter_set_id == 0) 932 DRV_LOG(INFO, "Part of the port %d statistics will not be " 933 "available.", dev->data->port_id); 934 } 935 936 /** 937 * Check if representor spawn info match devargs. 938 * 939 * @param spawn 940 * Verbs device parameters (name, port, switch_info) to spawn. 941 * @param eth_da 942 * Device devargs to probe. 943 * 944 * @return 945 * Match result. 946 */ 947 static bool 948 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 949 struct rte_eth_devargs *eth_da) 950 { 951 struct mlx5_switch_info *switch_info = &spawn->info; 952 unsigned int p, f; 953 uint16_t id; 954 uint16_t repr_id = mlx5_representor_id_encode(switch_info, 955 eth_da->type); 956 957 switch (eth_da->type) { 958 case RTE_ETH_REPRESENTOR_SF: 959 if (!(spawn->info.port_name == -1 && 960 switch_info->name_type == 961 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 962 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 963 rte_errno = EBUSY; 964 return false; 965 } 966 break; 967 case RTE_ETH_REPRESENTOR_VF: 968 /* Allows HPF representor index -1 as exception. */ 969 if (!(spawn->info.port_name == -1 && 970 switch_info->name_type == 971 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 972 switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 973 rte_errno = EBUSY; 974 return false; 975 } 976 break; 977 case RTE_ETH_REPRESENTOR_NONE: 978 rte_errno = EBUSY; 979 return false; 980 default: 981 rte_errno = ENOTSUP; 982 DRV_LOG(ERR, "unsupported representor type"); 983 return false; 984 } 985 /* Check representor ID: */ 986 for (p = 0; p < eth_da->nb_ports; ++p) { 987 if (spawn->pf_bond < 0) { 988 /* For non-LAG mode, allow and ignore pf. */ 989 switch_info->pf_num = eth_da->ports[p]; 990 repr_id = mlx5_representor_id_encode(switch_info, 991 eth_da->type); 992 } 993 for (f = 0; f < eth_da->nb_representor_ports; ++f) { 994 id = MLX5_REPRESENTOR_ID 995 (eth_da->ports[p], eth_da->type, 996 eth_da->representor_ports[f]); 997 if (repr_id == id) 998 return true; 999 } 1000 } 1001 rte_errno = EBUSY; 1002 return false; 1003 } 1004 1005 /** 1006 * Spawn an Ethernet device from Verbs information. 1007 * 1008 * @param dpdk_dev 1009 * Backing DPDK device. 1010 * @param spawn 1011 * Verbs device parameters (name, port, switch_info) to spawn. 1012 * @param eth_da 1013 * Device arguments. 1014 * @param mkvlist 1015 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1016 * 1017 * @return 1018 * A valid Ethernet device object on success, NULL otherwise and rte_errno 1019 * is set. The following errors are defined: 1020 * 1021 * EBUSY: device is not supposed to be spawned. 1022 * EEXIST: device is already spawned 1023 */ 1024 static struct rte_eth_dev * 1025 mlx5_dev_spawn(struct rte_device *dpdk_dev, 1026 struct mlx5_dev_spawn_data *spawn, 1027 struct rte_eth_devargs *eth_da, 1028 struct mlx5_kvargs_ctrl *mkvlist) 1029 { 1030 const struct mlx5_switch_info *switch_info = &spawn->info; 1031 struct mlx5_dev_ctx_shared *sh = NULL; 1032 struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 1033 struct rte_eth_dev *eth_dev = NULL; 1034 struct mlx5_priv *priv = NULL; 1035 int err = 0; 1036 struct rte_ether_addr mac; 1037 char name[RTE_ETH_NAME_MAX_LEN]; 1038 int own_domain_id = 0; 1039 uint16_t port_id; 1040 struct mlx5_port_info vport_info = { .query_flags = 0 }; 1041 int nl_rdma; 1042 int i; 1043 1044 /* Determine if this port representor is supposed to be spawned. */ 1045 if (switch_info->representor && dpdk_dev->devargs && 1046 !mlx5_representor_match(spawn, eth_da)) 1047 return NULL; 1048 /* Build device name. */ 1049 if (spawn->pf_bond < 0) { 1050 /* Single device. */ 1051 if (!switch_info->representor) 1052 strlcpy(name, dpdk_dev->name, sizeof(name)); 1053 else 1054 err = snprintf(name, sizeof(name), "%s_representor_%s%u", 1055 dpdk_dev->name, 1056 switch_info->name_type == 1057 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1058 switch_info->port_name); 1059 } else { 1060 /* Bonding device. */ 1061 if (!switch_info->representor) { 1062 err = snprintf(name, sizeof(name), "%s_%s", 1063 dpdk_dev->name, spawn->phys_dev_name); 1064 } else { 1065 err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 1066 dpdk_dev->name, spawn->phys_dev_name, 1067 switch_info->ctrl_num, 1068 switch_info->pf_num, 1069 switch_info->name_type == 1070 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 1071 switch_info->port_name); 1072 } 1073 } 1074 if (err >= (int)sizeof(name)) 1075 DRV_LOG(WARNING, "device name overflow %s", name); 1076 /* check if the device is already spawned */ 1077 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 1078 /* 1079 * When device is already spawned, its devargs should be set 1080 * as used. otherwise, mlx5_kvargs_validate() will fail. 1081 */ 1082 if (mkvlist) 1083 mlx5_port_args_set_used(name, port_id, mkvlist); 1084 rte_errno = EEXIST; 1085 return NULL; 1086 } 1087 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 1088 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 1089 struct mlx5_mp_id mp_id; 1090 int fd; 1091 1092 eth_dev = rte_eth_dev_attach_secondary(name); 1093 if (eth_dev == NULL) { 1094 DRV_LOG(ERR, "can not attach rte ethdev"); 1095 rte_errno = ENOMEM; 1096 return NULL; 1097 } 1098 eth_dev->device = dpdk_dev; 1099 eth_dev->dev_ops = &mlx5_dev_sec_ops; 1100 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1101 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1102 err = mlx5_proc_priv_init(eth_dev); 1103 if (err) 1104 return NULL; 1105 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 1106 /* Receive command fd from primary process */ 1107 fd = mlx5_mp_req_verbs_cmd_fd(&mp_id); 1108 if (fd < 0) 1109 goto err_secondary; 1110 /* Remap UAR for Tx queues. */ 1111 err = mlx5_tx_uar_init_secondary(eth_dev, fd); 1112 close(fd); 1113 if (err) 1114 goto err_secondary; 1115 /* 1116 * Ethdev pointer is still required as input since 1117 * the primary device is not accessible from the 1118 * secondary process. 1119 */ 1120 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 1121 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 1122 return eth_dev; 1123 err_secondary: 1124 mlx5_dev_close(eth_dev); 1125 return NULL; 1126 } 1127 sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist); 1128 if (!sh) 1129 return NULL; 1130 nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 1131 /* Check port status. */ 1132 if (spawn->phys_port <= UINT8_MAX) { 1133 /* Legacy Verbs api only support u8 port number. */ 1134 err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1135 &port_attr); 1136 if (err) { 1137 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 1138 goto error; 1139 } 1140 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 1141 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 1142 err = EINVAL; 1143 goto error; 1144 } 1145 } else if (nl_rdma >= 0) { 1146 /* IB doesn't allow more than 255 ports, must be Ethernet. */ 1147 err = mlx5_nl_port_state(nl_rdma, 1148 spawn->phys_dev_name, 1149 spawn->phys_port); 1150 if (err < 0) { 1151 DRV_LOG(INFO, "Failed to get netlink port state: %s", 1152 strerror(rte_errno)); 1153 err = -rte_errno; 1154 goto error; 1155 } 1156 port_attr.state = (enum ibv_port_state)err; 1157 } 1158 if (port_attr.state != IBV_PORT_ACTIVE) 1159 DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 1160 mlx5_glue->port_state_str(port_attr.state), 1161 port_attr.state); 1162 /* Allocate private eth device data. */ 1163 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1164 sizeof(*priv), 1165 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1166 if (priv == NULL) { 1167 DRV_LOG(ERR, "priv allocation failure"); 1168 err = ENOMEM; 1169 goto error; 1170 } 1171 /* 1172 * When user configures remote PD and CTX and device creates RxQ by 1173 * DevX, external RxQ is both supported and requested. 1174 */ 1175 if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) { 1176 priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 1177 sizeof(struct mlx5_external_rxq) * 1178 MLX5_MAX_EXT_RX_QUEUES, 0, 1179 SOCKET_ID_ANY); 1180 if (priv->ext_rxqs == NULL) { 1181 DRV_LOG(ERR, "Fail to allocate external RxQ array."); 1182 err = ENOMEM; 1183 goto error; 1184 } 1185 DRV_LOG(DEBUG, "External RxQ is supported."); 1186 } 1187 priv->sh = sh; 1188 priv->dev_port = spawn->phys_port; 1189 priv->pci_dev = spawn->pci_dev; 1190 priv->mtu = RTE_ETHER_MTU; 1191 /* Some internal functions rely on Netlink sockets, open them now. */ 1192 priv->nl_socket_rdma = nl_rdma; 1193 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE, 0); 1194 priv->representor = !!switch_info->representor; 1195 priv->master = !!switch_info->master; 1196 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 1197 priv->vport_meta_tag = 0; 1198 priv->vport_meta_mask = 0; 1199 priv->pf_bond = spawn->pf_bond; 1200 1201 DRV_LOG(DEBUG, 1202 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1203 priv->dev_port, dpdk_dev->bus->name, 1204 priv->pci_dev ? priv->pci_dev->name : "NONE", 1205 priv->master, priv->representor, priv->pf_bond); 1206 1207 /* 1208 * If we have E-Switch we should determine the vport attributes. 1209 * E-Switch may use either source vport field or reg_c[0] metadata 1210 * register to match on vport index. The engaged part of metadata 1211 * register is defined by mask. 1212 */ 1213 if (sh->esw_mode) { 1214 err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1215 spawn->phys_port, 1216 &vport_info); 1217 if (err) { 1218 DRV_LOG(WARNING, 1219 "Cannot query devx port %d on device %s", 1220 spawn->phys_port, spawn->phys_dev_name); 1221 vport_info.query_flags = 0; 1222 } 1223 } 1224 if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1225 priv->vport_meta_tag = vport_info.vport_meta_tag; 1226 priv->vport_meta_mask = vport_info.vport_meta_mask; 1227 if (!priv->vport_meta_mask) { 1228 DRV_LOG(ERR, 1229 "vport zero mask for port %d on bonding device %s", 1230 spawn->phys_port, spawn->phys_dev_name); 1231 err = ENOTSUP; 1232 goto error; 1233 } 1234 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1235 DRV_LOG(ERR, 1236 "Invalid vport tag for port %d on bonding device %s", 1237 spawn->phys_port, spawn->phys_dev_name); 1238 err = ENOTSUP; 1239 goto error; 1240 } 1241 } 1242 if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1243 priv->vport_id = vport_info.vport_id; 1244 } else if (spawn->pf_bond >= 0 && sh->esw_mode) { 1245 DRV_LOG(ERR, 1246 "Cannot deduce vport index for port %d on bonding device %s", 1247 spawn->phys_port, spawn->phys_dev_name); 1248 err = ENOTSUP; 1249 goto error; 1250 } else { 1251 /* 1252 * Suppose vport index in compatible way. Kernel/rdma_core 1253 * support single E-Switch per PF configurations only and 1254 * vport_id field contains the vport index for associated VF, 1255 * which is deduced from representor port name. 1256 * For example, let's have the IB device port 10, it has 1257 * attached network device eth0, which has port name attribute 1258 * pf0vf2, we can deduce the VF number as 2, and set vport index 1259 * as 3 (2+1). This assigning schema should be changed if the 1260 * multiple E-Switch instances per PF configurations or/and PCI 1261 * subfunctions are added. 1262 */ 1263 priv->vport_id = switch_info->representor ? 1264 switch_info->port_name + 1 : -1; 1265 } 1266 priv->representor_id = mlx5_representor_id_encode(switch_info, 1267 eth_da->type); 1268 /* 1269 * Look for sibling devices in order to reuse their switch domain 1270 * if any, otherwise allocate one. 1271 */ 1272 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1273 const struct mlx5_priv *opriv = 1274 rte_eth_devices[port_id].data->dev_private; 1275 1276 if (!opriv || 1277 opriv->sh != priv->sh || 1278 opriv->domain_id == 1279 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 1280 continue; 1281 priv->domain_id = opriv->domain_id; 1282 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1283 priv->dev_port, priv->domain_id); 1284 break; 1285 } 1286 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 1287 err = rte_eth_switch_domain_alloc(&priv->domain_id); 1288 if (err) { 1289 err = rte_errno; 1290 DRV_LOG(ERR, "unable to allocate switch domain: %s", 1291 strerror(rte_errno)); 1292 goto error; 1293 } 1294 own_domain_id = 1; 1295 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1296 priv->dev_port, priv->domain_id); 1297 } 1298 if (sh->cdev->config.devx) { 1299 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 1300 1301 sh->steering_format_version = hca_attr->steering_format_version; 1302 #if defined(HAVE_MLX5DV_DR) && \ 1303 (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ 1304 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) 1305 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1306 sh->config.dv_flow_en) { 1307 uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; 1308 /* 1309 * Meter needs two REG_C's for color match and pre-sfx 1310 * flow match. Here get the REG_C for color match. 1311 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1312 */ 1313 reg_c_mask &= 0xfc; 1314 if (__builtin_popcount(reg_c_mask) < 1) { 1315 priv->mtr_en = 0; 1316 DRV_LOG(WARNING, "No available register for" 1317 " meter."); 1318 } else { 1319 /* 1320 * The meter color register is used by the 1321 * flow-hit feature as well. 1322 * The flow-hit feature must use REG_C_3 1323 * Prefer REG_C_3 if it is available. 1324 */ 1325 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 1326 priv->mtr_color_reg = REG_C_3; 1327 else 1328 priv->mtr_color_reg = ffs(reg_c_mask) 1329 - 1 + REG_C_0; 1330 priv->mtr_en = 1; 1331 priv->mtr_reg_share = hca_attr->qos.flow_meter; 1332 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1333 priv->mtr_color_reg); 1334 } 1335 } 1336 if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 1337 uint32_t log_obj_size = 1338 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 1339 if (log_obj_size >= 1340 hca_attr->qos.log_meter_aso_granularity && 1341 log_obj_size <= 1342 hca_attr->qos.log_meter_aso_max_alloc) 1343 sh->meter_aso_en = 1; 1344 } 1345 if (priv->mtr_en) { 1346 err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 1347 if (err) { 1348 err = -err; 1349 goto error; 1350 } 1351 } 1352 if (hca_attr->flow.tunnel_header_0_1) 1353 sh->tunnel_header_0_1 = 1; 1354 if (hca_attr->flow.tunnel_header_2_3) 1355 sh->tunnel_header_2_3 = 1; 1356 #endif 1357 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 1358 if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { 1359 sh->flow_hit_aso_en = 1; 1360 err = mlx5_flow_aso_age_mng_init(sh); 1361 if (err) { 1362 err = -err; 1363 goto error; 1364 } 1365 DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 1366 } 1367 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1368 #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1369 defined (HAVE_MLX5_DR_ACTION_ASO_CT) 1370 /* HWS create CT ASO SQ based on HWS configure queue number. */ 1371 if (sh->config.dv_flow_en != 2 && 1372 hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { 1373 err = mlx5_flow_aso_ct_mng_init(sh); 1374 if (err) { 1375 err = -err; 1376 goto error; 1377 } 1378 DRV_LOG(DEBUG, "CT ASO is supported."); 1379 sh->ct_aso_en = 1; 1380 } 1381 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 1382 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1383 if (hca_attr->log_max_ft_sampler_num > 0 && 1384 sh->config.dv_flow_en) { 1385 priv->sampler_en = 1; 1386 DRV_LOG(DEBUG, "Sampler enabled!"); 1387 } else { 1388 priv->sampler_en = 0; 1389 if (!hca_attr->log_max_ft_sampler_num) 1390 DRV_LOG(WARNING, 1391 "No available register for sampler."); 1392 else 1393 DRV_LOG(DEBUG, "DV flow is not supported!"); 1394 } 1395 #endif 1396 if (hca_attr->lag_rx_port_affinity) { 1397 sh->lag_rx_port_affinity_en = 1; 1398 DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled"); 1399 } 1400 priv->num_lag_ports = hca_attr->num_lag_ports; 1401 DRV_LOG(DEBUG, "The number of lag ports is %d", priv->num_lag_ports); 1402 } 1403 /* Process parameters and store port configuration on priv structure. */ 1404 err = mlx5_port_args_config(priv, mkvlist, &priv->config); 1405 if (err) { 1406 err = rte_errno; 1407 DRV_LOG(ERR, "Failed to process port configure: %s", 1408 strerror(rte_errno)); 1409 goto error; 1410 } 1411 eth_dev = rte_eth_dev_allocate(name); 1412 if (eth_dev == NULL) { 1413 DRV_LOG(ERR, "can not allocate rte ethdev"); 1414 err = ENOMEM; 1415 goto error; 1416 } 1417 if (priv->representor) { 1418 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1419 eth_dev->data->representor_id = priv->representor_id; 1420 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1421 struct mlx5_priv *opriv = 1422 rte_eth_devices[port_id].data->dev_private; 1423 if (opriv && 1424 opriv->master && 1425 opriv->domain_id == priv->domain_id && 1426 opriv->sh == priv->sh) { 1427 eth_dev->data->backer_port_id = port_id; 1428 break; 1429 } 1430 } 1431 if (port_id >= RTE_MAX_ETHPORTS) 1432 eth_dev->data->backer_port_id = eth_dev->data->port_id; 1433 } 1434 priv->mp_id.port_id = eth_dev->data->port_id; 1435 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 1436 /* 1437 * Store associated network device interface index. This index 1438 * is permanent throughout the lifetime of device. So, we may store 1439 * the ifindex here and use the cached value further. 1440 */ 1441 MLX5_ASSERT(spawn->ifindex); 1442 priv->if_index = spawn->ifindex; 1443 priv->lag_affinity_idx = sh->refcnt - 1; 1444 eth_dev->data->dev_private = priv; 1445 priv->dev_data = eth_dev->data; 1446 eth_dev->data->mac_addrs = priv->mac; 1447 eth_dev->device = dpdk_dev; 1448 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1449 /* Configure the first MAC address by default. */ 1450 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1451 DRV_LOG(ERR, 1452 "port %u cannot get MAC address, is mlx5_en" 1453 " loaded? (errno: %s)", 1454 eth_dev->data->port_id, strerror(rte_errno)); 1455 err = ENODEV; 1456 goto error; 1457 } 1458 DRV_LOG(INFO, 1459 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1460 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 1461 #ifdef RTE_LIBRTE_MLX5_DEBUG 1462 { 1463 char ifname[MLX5_NAMESIZE]; 1464 1465 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1466 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1467 eth_dev->data->port_id, ifname); 1468 else 1469 DRV_LOG(DEBUG, "port %u ifname is unknown", 1470 eth_dev->data->port_id); 1471 } 1472 #endif 1473 /* Get actual MTU if possible. */ 1474 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1475 if (err) { 1476 err = rte_errno; 1477 goto error; 1478 } 1479 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1480 priv->mtu); 1481 /* Initialize burst functions to prevent crashes before link-up. */ 1482 eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1483 eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1484 eth_dev->dev_ops = &mlx5_dev_ops; 1485 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1486 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1487 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1488 /* Register MAC address. */ 1489 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1490 if (sh->dev_cap.vf && sh->config.vf_nl_en) 1491 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1492 mlx5_ifindex(eth_dev), 1493 eth_dev->data->mac_addrs, 1494 MLX5_MAX_MAC_ADDRESSES); 1495 priv->ctrl_flows = 0; 1496 rte_spinlock_init(&priv->flow_list_lock); 1497 TAILQ_INIT(&priv->flow_meters); 1498 priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1499 if (!priv->mtr_profile_tbl) 1500 goto error; 1501 /* Bring Ethernet device up. */ 1502 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1503 eth_dev->data->port_id); 1504 /* Read link status in case it is up and there will be no event. */ 1505 mlx5_link_update(eth_dev, 0); 1506 /* Watch LSC interrupts between port probe and port start. */ 1507 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1508 eth_dev->data->port_id; 1509 mlx5_set_link_up(eth_dev); 1510 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1511 icfg[i].release_mem_en = !!sh->config.reclaim_mode; 1512 if (sh->config.reclaim_mode) 1513 icfg[i].per_core_cache = 0; 1514 priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1515 if (!priv->flows[i]) 1516 goto error; 1517 } 1518 /* Create context for virtual machine VLAN workaround. */ 1519 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1520 if (sh->config.dv_flow_en) { 1521 err = mlx5_alloc_shared_dr(priv); 1522 if (err) 1523 goto error; 1524 if (mlx5_flex_item_port_init(eth_dev) < 0) 1525 goto error; 1526 } 1527 if (mlx5_devx_obj_ops_en(sh)) { 1528 priv->obj_ops = devx_obj_ops; 1529 mlx5_queue_counter_id_prepare(eth_dev); 1530 priv->obj_ops.lb_dummy_queue_create = 1531 mlx5_rxq_ibv_obj_dummy_lb_create; 1532 priv->obj_ops.lb_dummy_queue_release = 1533 mlx5_rxq_ibv_obj_dummy_lb_release; 1534 } else if (spawn->max_port > UINT8_MAX) { 1535 /* Verbs can't support ports larger than 255 by design. */ 1536 DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1537 err = ENOTSUP; 1538 goto error; 1539 } else { 1540 priv->obj_ops = ibv_obj_ops; 1541 } 1542 if (sh->config.tx_pp && 1543 priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1544 /* 1545 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1546 * packet pacing and already checked above. 1547 * Hence, we should only make sure the SQs will be created 1548 * with DevX, not with Verbs. 1549 * Verbs allocates the SQ UAR on its own and it can't be shared 1550 * with Clock Queue UAR as required for Tx scheduling. 1551 */ 1552 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1553 err = ENODEV; 1554 goto error; 1555 } 1556 priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 1557 if (!priv->drop_queue.hrxq) 1558 goto error; 1559 priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1560 mlx5_hrxq_create_cb, 1561 mlx5_hrxq_match_cb, 1562 mlx5_hrxq_remove_cb, 1563 mlx5_hrxq_clone_cb, 1564 mlx5_hrxq_clone_free_cb); 1565 if (!priv->hrxqs) 1566 goto error; 1567 mlx5_set_metadata_mask(eth_dev); 1568 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1569 !priv->sh->dv_regc0_mask) { 1570 DRV_LOG(ERR, "metadata mode %u is not supported " 1571 "(no metadata reg_c[0] is available)", 1572 sh->config.dv_xmeta_en); 1573 err = ENOTSUP; 1574 goto error; 1575 } 1576 rte_rwlock_init(&priv->ind_tbls_lock); 1577 if (priv->sh->config.dv_flow_en == 2) { 1578 #ifdef HAVE_MLX5_HWS_SUPPORT 1579 if (priv->sh->config.dv_esw_en) { 1580 uint32_t usable_bits; 1581 uint32_t required_bits; 1582 1583 if (priv->sh->dv_regc0_mask == UINT32_MAX) { 1584 DRV_LOG(ERR, "E-Switch port metadata is required when using HWS " 1585 "but it is disabled (configure it through devlink)"); 1586 err = ENOTSUP; 1587 goto error; 1588 } 1589 if (priv->sh->dv_regc0_mask == 0) { 1590 DRV_LOG(ERR, "E-Switch with HWS is not supported " 1591 "(no available bits in reg_c[0])"); 1592 err = ENOTSUP; 1593 goto error; 1594 } 1595 usable_bits = __builtin_popcount(priv->sh->dv_regc0_mask); 1596 required_bits = __builtin_popcount(priv->vport_meta_mask); 1597 if (usable_bits < required_bits) { 1598 DRV_LOG(ERR, "Not enough bits available in reg_c[0] to provide " 1599 "representor matching."); 1600 err = ENOTSUP; 1601 goto error; 1602 } 1603 } 1604 if (priv->vport_meta_mask) 1605 flow_hw_set_port_info(eth_dev); 1606 if (priv->sh->config.dv_esw_en && 1607 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1608 priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) { 1609 DRV_LOG(ERR, 1610 "metadata mode %u is not supported in HWS eswitch mode", 1611 priv->sh->config.dv_xmeta_en); 1612 err = ENOTSUP; 1613 goto error; 1614 } 1615 /* Only HWS requires this information. */ 1616 flow_hw_init_tags_set(eth_dev); 1617 flow_hw_init_flow_metadata_config(eth_dev); 1618 if (priv->sh->config.dv_esw_en && 1619 flow_hw_create_vport_action(eth_dev)) { 1620 DRV_LOG(ERR, "port %u failed to create vport action", 1621 eth_dev->data->port_id); 1622 err = EINVAL; 1623 goto error; 1624 } 1625 return eth_dev; 1626 #else 1627 DRV_LOG(ERR, "DV support is missing for HWS."); 1628 goto error; 1629 #endif 1630 } 1631 if (!priv->sh->flow_priority_check_flag) { 1632 /* Supported Verbs flow priority number detection. */ 1633 err = mlx5_flow_discover_priorities(eth_dev); 1634 priv->sh->flow_max_priority = err; 1635 priv->sh->flow_priority_check_flag = 1; 1636 } else { 1637 err = priv->sh->flow_max_priority; 1638 } 1639 if (err < 0) { 1640 err = -err; 1641 goto error; 1642 } 1643 /* Query availability of metadata reg_c's. */ 1644 if (!priv->sh->metadata_regc_check_flag) { 1645 err = mlx5_flow_discover_mreg_c(eth_dev); 1646 if (err < 0) { 1647 err = -err; 1648 goto error; 1649 } 1650 } 1651 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1652 DRV_LOG(DEBUG, 1653 "port %u extensive metadata register is not supported", 1654 eth_dev->data->port_id); 1655 if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1656 DRV_LOG(ERR, "metadata mode %u is not supported " 1657 "(no metadata registers available)", 1658 sh->config.dv_xmeta_en); 1659 err = ENOTSUP; 1660 goto error; 1661 } 1662 } 1663 if (sh->config.dv_flow_en && 1664 sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1665 mlx5_flow_ext_mreg_supported(eth_dev) && 1666 priv->sh->dv_regc0_mask) { 1667 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1668 MLX5_FLOW_MREG_HTABLE_SZ, 1669 false, true, eth_dev, 1670 flow_dv_mreg_create_cb, 1671 flow_dv_mreg_match_cb, 1672 flow_dv_mreg_remove_cb, 1673 flow_dv_mreg_clone_cb, 1674 flow_dv_mreg_clone_free_cb); 1675 if (!priv->mreg_cp_tbl) { 1676 err = ENOMEM; 1677 goto error; 1678 } 1679 } 1680 rte_spinlock_init(&priv->shared_act_sl); 1681 mlx5_flow_counter_mode_config(eth_dev); 1682 mlx5_flow_drop_action_config(eth_dev); 1683 if (sh->config.dv_flow_en) 1684 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 1685 return eth_dev; 1686 error: 1687 if (priv) { 1688 priv->sh->port[priv->dev_port - 1].nl_ih_port_id = 1689 RTE_MAX_ETHPORTS; 1690 rte_io_wmb(); 1691 #ifdef HAVE_MLX5_HWS_SUPPORT 1692 if (eth_dev && 1693 priv->sh && 1694 priv->sh->config.dv_flow_en == 2 && 1695 priv->sh->config.dv_esw_en) 1696 flow_hw_destroy_vport_action(eth_dev); 1697 #endif 1698 if (priv->mreg_cp_tbl) 1699 mlx5_hlist_destroy(priv->mreg_cp_tbl); 1700 if (priv->sh) 1701 mlx5_os_free_shared_dr(priv); 1702 if (priv->nl_socket_route >= 0) 1703 close(priv->nl_socket_route); 1704 if (priv->vmwa_context) 1705 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1706 if (eth_dev && priv->drop_queue.hrxq) 1707 mlx5_drop_action_destroy(eth_dev); 1708 if (priv->mtr_profile_tbl) 1709 mlx5_l3t_destroy(priv->mtr_profile_tbl); 1710 if (own_domain_id) 1711 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1712 if (priv->hrxqs) 1713 mlx5_list_destroy(priv->hrxqs); 1714 if (eth_dev && priv->flex_item_map) 1715 mlx5_flex_item_port_cleanup(eth_dev); 1716 mlx5_free(priv->ext_rxqs); 1717 mlx5_free(priv); 1718 if (eth_dev != NULL) 1719 eth_dev->data->dev_private = NULL; 1720 } 1721 if (eth_dev != NULL) { 1722 /* mac_addrs must not be freed alone because part of 1723 * dev_private 1724 **/ 1725 eth_dev->data->mac_addrs = NULL; 1726 rte_eth_dev_release_port(eth_dev); 1727 } 1728 if (sh) 1729 mlx5_free_shared_dev_ctx(sh); 1730 if (nl_rdma >= 0) 1731 close(nl_rdma); 1732 MLX5_ASSERT(err > 0); 1733 rte_errno = err; 1734 return NULL; 1735 } 1736 1737 /** 1738 * Comparison callback to sort device data. 1739 * 1740 * This is meant to be used with qsort(). 1741 * 1742 * @param a[in] 1743 * Pointer to pointer to first data object. 1744 * @param b[in] 1745 * Pointer to pointer to second data object. 1746 * 1747 * @return 1748 * 0 if both objects are equal, less than 0 if the first argument is less 1749 * than the second, greater than 0 otherwise. 1750 */ 1751 static int 1752 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1753 { 1754 const struct mlx5_switch_info *si_a = 1755 &((const struct mlx5_dev_spawn_data *)a)->info; 1756 const struct mlx5_switch_info *si_b = 1757 &((const struct mlx5_dev_spawn_data *)b)->info; 1758 int ret; 1759 1760 /* Master device first. */ 1761 ret = si_b->master - si_a->master; 1762 if (ret) 1763 return ret; 1764 /* Then representor devices. */ 1765 ret = si_b->representor - si_a->representor; 1766 if (ret) 1767 return ret; 1768 /* Unidentified devices come last in no specific order. */ 1769 if (!si_a->representor) 1770 return 0; 1771 /* Order representors by name. */ 1772 return si_a->port_name - si_b->port_name; 1773 } 1774 1775 /** 1776 * Match PCI information for possible slaves of bonding device. 1777 * 1778 * @param[in] ibdev_name 1779 * Name of Infiniband device. 1780 * @param[in] pci_dev 1781 * Pointer to primary PCI address structure to match. 1782 * @param[in] nl_rdma 1783 * Netlink RDMA group socket handle. 1784 * @param[in] owner 1785 * Representor owner PF index. 1786 * @param[out] bond_info 1787 * Pointer to bonding information. 1788 * 1789 * @return 1790 * negative value if no bonding device found, otherwise 1791 * positive index of slave PF in bonding. 1792 */ 1793 static int 1794 mlx5_device_bond_pci_match(const char *ibdev_name, 1795 const struct rte_pci_addr *pci_dev, 1796 int nl_rdma, uint16_t owner, 1797 struct mlx5_bond_info *bond_info) 1798 { 1799 char ifname[IF_NAMESIZE + 1]; 1800 unsigned int ifindex; 1801 unsigned int np, i; 1802 FILE *bond_file = NULL, *file; 1803 int pf = -1; 1804 int ret; 1805 uint8_t cur_guid[32] = {0}; 1806 uint8_t guid[32] = {0}; 1807 1808 /* 1809 * Try to get master device name. If something goes wrong suppose 1810 * the lack of kernel support and no bonding devices. 1811 */ 1812 memset(bond_info, 0, sizeof(*bond_info)); 1813 if (nl_rdma < 0) 1814 return -1; 1815 if (!strstr(ibdev_name, "bond")) 1816 return -1; 1817 np = mlx5_nl_portnum(nl_rdma, ibdev_name); 1818 if (!np) 1819 return -1; 1820 if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 1821 return -1; 1822 /* 1823 * The master device might not be on the predefined port(not on port 1824 * index 1, it is not guaranteed), we have to scan all Infiniband 1825 * device ports and find master. 1826 */ 1827 for (i = 1; i <= np; ++i) { 1828 /* Check whether Infiniband port is populated. */ 1829 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 1830 if (!ifindex) 1831 continue; 1832 if (!if_indextoname(ifindex, ifname)) 1833 continue; 1834 /* Try to read bonding slave names from sysfs. */ 1835 MKSTR(slaves, 1836 "/sys/class/net/%s/master/bonding/slaves", ifname); 1837 bond_file = fopen(slaves, "r"); 1838 if (bond_file) 1839 break; 1840 } 1841 if (!bond_file) 1842 return -1; 1843 /* Use safe format to check maximal buffer length. */ 1844 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1845 while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1846 char tmp_str[IF_NAMESIZE + 32]; 1847 struct rte_pci_addr pci_addr; 1848 struct mlx5_switch_info info; 1849 int ret; 1850 1851 /* Process slave interface names in the loop. */ 1852 snprintf(tmp_str, sizeof(tmp_str), 1853 "/sys/class/net/%s", ifname); 1854 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1855 DRV_LOG(WARNING, 1856 "Cannot get PCI address for netdev \"%s\".", 1857 ifname); 1858 continue; 1859 } 1860 /* Slave interface PCI address match found. */ 1861 snprintf(tmp_str, sizeof(tmp_str), 1862 "/sys/class/net/%s/phys_port_name", ifname); 1863 file = fopen(tmp_str, "rb"); 1864 if (!file) 1865 break; 1866 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1867 if (fscanf(file, "%32s", tmp_str) == 1) 1868 mlx5_translate_port_name(tmp_str, &info); 1869 fclose(file); 1870 /* Only process PF ports. */ 1871 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1872 info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1873 continue; 1874 /* Check max bonding member. */ 1875 if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1876 DRV_LOG(WARNING, "bonding index out of range, " 1877 "please increase MLX5_BOND_MAX_PORTS: %s", 1878 tmp_str); 1879 break; 1880 } 1881 /* Get ifindex. */ 1882 snprintf(tmp_str, sizeof(tmp_str), 1883 "/sys/class/net/%s/ifindex", ifname); 1884 file = fopen(tmp_str, "rb"); 1885 if (!file) 1886 break; 1887 ret = fscanf(file, "%u", &ifindex); 1888 fclose(file); 1889 if (ret != 1) 1890 break; 1891 /* Save bonding info. */ 1892 strncpy(bond_info->ports[info.port_name].ifname, ifname, 1893 sizeof(bond_info->ports[0].ifname)); 1894 bond_info->ports[info.port_name].pci_addr = pci_addr; 1895 bond_info->ports[info.port_name].ifindex = ifindex; 1896 bond_info->n_port++; 1897 /* 1898 * Under socket direct mode, bonding will use 1899 * system_image_guid as identification. 1900 * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 1901 * All bonding members should have the same guid even if driver 1902 * is using PCIe BDF. 1903 */ 1904 ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 1905 if (ret < 0) 1906 break; 1907 else if (ret > 0) { 1908 if (!memcmp(guid, cur_guid, sizeof(guid)) && 1909 owner == info.port_name && 1910 (owner != 0 || (owner == 0 && 1911 !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 1912 pf = info.port_name; 1913 } else if (pci_dev->domain == pci_addr.domain && 1914 pci_dev->bus == pci_addr.bus && 1915 pci_dev->devid == pci_addr.devid && 1916 ((pci_dev->function == 0 && 1917 pci_dev->function + owner == pci_addr.function) || 1918 (pci_dev->function == owner && 1919 pci_addr.function == owner))) 1920 pf = info.port_name; 1921 } 1922 if (pf >= 0) { 1923 /* Get bond interface info */ 1924 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1925 bond_info->ifname); 1926 if (ret) 1927 DRV_LOG(ERR, "unable to get bond info: %s", 1928 strerror(rte_errno)); 1929 else 1930 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1931 ifindex, bond_info->ifindex, bond_info->ifname); 1932 } 1933 if (owner == 0 && pf != 0) { 1934 DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", 1935 pci_dev->domain, pci_dev->bus, pci_dev->devid, 1936 pci_dev->function); 1937 } 1938 return pf; 1939 } 1940 1941 /** 1942 * Register a PCI device within bonding. 1943 * 1944 * This function spawns Ethernet devices out of a given PCI device and 1945 * bonding owner PF index. 1946 * 1947 * @param[in] cdev 1948 * Pointer to common mlx5 device structure. 1949 * @param[in] req_eth_da 1950 * Requested ethdev device argument. 1951 * @param[in] owner_id 1952 * Requested owner PF port ID within bonding device, default to 0. 1953 * @param[in, out] mkvlist 1954 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 1955 * 1956 * @return 1957 * 0 on success, a negative errno value otherwise and rte_errno is set. 1958 */ 1959 static int 1960 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 1961 struct rte_eth_devargs *req_eth_da, 1962 uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist) 1963 { 1964 struct ibv_device **ibv_list; 1965 /* 1966 * Number of found IB Devices matching with requested PCI BDF. 1967 * nd != 1 means there are multiple IB devices over the same 1968 * PCI device and we have representors and master. 1969 */ 1970 unsigned int nd = 0; 1971 /* 1972 * Number of found IB device Ports. nd = 1 and np = 1..n means 1973 * we have the single multiport IB device, and there may be 1974 * representors attached to some of found ports. 1975 */ 1976 unsigned int np = 0; 1977 /* 1978 * Number of DPDK ethernet devices to Spawn - either over 1979 * multiple IB devices or multiple ports of single IB device. 1980 * Actually this is the number of iterations to spawn. 1981 */ 1982 unsigned int ns = 0; 1983 /* 1984 * Bonding device 1985 * < 0 - no bonding device (single one) 1986 * >= 0 - bonding device (value is slave PF index) 1987 */ 1988 int bd = -1; 1989 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 1990 struct mlx5_dev_spawn_data *list = NULL; 1991 struct rte_eth_devargs eth_da = *req_eth_da; 1992 struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 1993 struct mlx5_bond_info bond_info; 1994 int ret = -1; 1995 1996 errno = 0; 1997 ibv_list = mlx5_glue->get_device_list(&ret); 1998 if (!ibv_list) { 1999 rte_errno = errno ? errno : ENOSYS; 2000 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 2001 return -rte_errno; 2002 } 2003 /* 2004 * First scan the list of all Infiniband devices to find 2005 * matching ones, gathering into the list. 2006 */ 2007 struct ibv_device *ibv_match[ret + 1]; 2008 int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0); 2009 int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0); 2010 unsigned int i; 2011 2012 while (ret-- > 0) { 2013 struct rte_pci_addr pci_addr; 2014 2015 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 2016 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 2017 nl_rdma, owner_id, &bond_info); 2018 if (bd >= 0) { 2019 /* 2020 * Bonding device detected. Only one match is allowed, 2021 * the bonding is supported over multi-port IB device, 2022 * there should be no matches on representor PCI 2023 * functions or non VF LAG bonding devices with 2024 * specified address. 2025 */ 2026 if (nd) { 2027 DRV_LOG(ERR, 2028 "multiple PCI match on bonding device" 2029 "\"%s\" found", ibv_list[ret]->name); 2030 rte_errno = ENOENT; 2031 ret = -rte_errno; 2032 goto exit; 2033 } 2034 /* Amend owner pci address if owner PF ID specified. */ 2035 if (eth_da.nb_representor_ports) 2036 owner_pci.function += owner_id; 2037 DRV_LOG(INFO, 2038 "PCI information matches for slave %d bonding device \"%s\"", 2039 bd, ibv_list[ret]->name); 2040 ibv_match[nd++] = ibv_list[ret]; 2041 break; 2042 } else { 2043 /* Bonding device not found. */ 2044 if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 2045 &pci_addr)) 2046 continue; 2047 if (owner_pci.domain != pci_addr.domain || 2048 owner_pci.bus != pci_addr.bus || 2049 owner_pci.devid != pci_addr.devid || 2050 owner_pci.function != pci_addr.function) 2051 continue; 2052 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 2053 ibv_list[ret]->name); 2054 ibv_match[nd++] = ibv_list[ret]; 2055 } 2056 } 2057 ibv_match[nd] = NULL; 2058 if (!nd) { 2059 /* No device matches, just complain and bail out. */ 2060 DRV_LOG(WARNING, 2061 "PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT "," 2062 " are kernel drivers loaded?", 2063 owner_id, owner_pci.domain, owner_pci.bus, 2064 owner_pci.devid, owner_pci.function); 2065 rte_errno = ENOENT; 2066 ret = -rte_errno; 2067 goto exit; 2068 } 2069 if (nd == 1) { 2070 /* 2071 * Found single matching device may have multiple ports. 2072 * Each port may be representor, we have to check the port 2073 * number and check the representors existence. 2074 */ 2075 if (nl_rdma >= 0) 2076 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 2077 if (!np) 2078 DRV_LOG(WARNING, 2079 "Cannot get IB device \"%s\" ports number.", 2080 ibv_match[0]->name); 2081 if (bd >= 0 && !np) { 2082 DRV_LOG(ERR, "Cannot get ports for bonding device."); 2083 rte_errno = ENOENT; 2084 ret = -rte_errno; 2085 goto exit; 2086 } 2087 } 2088 /* Now we can determine the maximal amount of devices to be spawned. */ 2089 list = mlx5_malloc(MLX5_MEM_ZERO, 2090 sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 2091 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 2092 if (!list) { 2093 DRV_LOG(ERR, "Spawn data array allocation failure."); 2094 rte_errno = ENOMEM; 2095 ret = -rte_errno; 2096 goto exit; 2097 } 2098 if (bd >= 0 || np > 1) { 2099 /* 2100 * Single IB device with multiple ports found, 2101 * it may be E-Switch master device and representors. 2102 * We have to perform identification through the ports. 2103 */ 2104 MLX5_ASSERT(nl_rdma >= 0); 2105 MLX5_ASSERT(ns == 0); 2106 MLX5_ASSERT(nd == 1); 2107 MLX5_ASSERT(np); 2108 for (i = 1; i <= np; ++i) { 2109 list[ns].bond_info = &bond_info; 2110 list[ns].max_port = np; 2111 list[ns].phys_port = i; 2112 list[ns].phys_dev_name = ibv_match[0]->name; 2113 list[ns].eth_dev = NULL; 2114 list[ns].pci_dev = pci_dev; 2115 list[ns].cdev = cdev; 2116 list[ns].pf_bond = bd; 2117 list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2118 ibv_match[0]->name, 2119 i); 2120 if (!list[ns].ifindex) { 2121 /* 2122 * No network interface index found for the 2123 * specified port, it means there is no 2124 * representor on this port. It's OK, 2125 * there can be disabled ports, for example 2126 * if sriov_numvfs < sriov_totalvfs. 2127 */ 2128 continue; 2129 } 2130 ret = -1; 2131 if (nl_route >= 0) 2132 ret = mlx5_nl_switch_info(nl_route, 2133 list[ns].ifindex, 2134 &list[ns].info); 2135 if (ret || (!list[ns].info.representor && 2136 !list[ns].info.master)) { 2137 /* 2138 * We failed to recognize representors with 2139 * Netlink, let's try to perform the task 2140 * with sysfs. 2141 */ 2142 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2143 &list[ns].info); 2144 } 2145 if (!ret && bd >= 0) { 2146 switch (list[ns].info.name_type) { 2147 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 2148 if (np == 1) { 2149 /* 2150 * Force standalone bonding 2151 * device for ROCE LAG 2152 * configurations. 2153 */ 2154 list[ns].info.master = 0; 2155 list[ns].info.representor = 0; 2156 } 2157 if (list[ns].info.port_name == bd) 2158 ns++; 2159 break; 2160 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2161 /* Fallthrough */ 2162 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2163 /* Fallthrough */ 2164 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 2165 if (list[ns].info.pf_num == bd) 2166 ns++; 2167 break; 2168 default: 2169 break; 2170 } 2171 continue; 2172 } 2173 if (!ret && (list[ns].info.representor ^ 2174 list[ns].info.master)) 2175 ns++; 2176 } 2177 if (!ns) { 2178 DRV_LOG(ERR, 2179 "Unable to recognize master/representors on the IB device with multiple ports."); 2180 rte_errno = ENOENT; 2181 ret = -rte_errno; 2182 goto exit; 2183 } 2184 } else { 2185 /* 2186 * The existence of several matching entries (nd > 1) means 2187 * port representors have been instantiated. No existing Verbs 2188 * call nor sysfs entries can tell them apart, this can only 2189 * be done through Netlink calls assuming kernel drivers are 2190 * recent enough to support them. 2191 * 2192 * In the event of identification failure through Netlink, 2193 * try again through sysfs, then: 2194 * 2195 * 1. A single IB device matches (nd == 1) with single 2196 * port (np=0/1) and is not a representor, assume 2197 * no switch support. 2198 * 2199 * 2. Otherwise no safe assumptions can be made; 2200 * complain louder and bail out. 2201 */ 2202 for (i = 0; i != nd; ++i) { 2203 memset(&list[ns].info, 0, sizeof(list[ns].info)); 2204 list[ns].bond_info = NULL; 2205 list[ns].max_port = 1; 2206 list[ns].phys_port = 1; 2207 list[ns].phys_dev_name = ibv_match[i]->name; 2208 list[ns].eth_dev = NULL; 2209 list[ns].pci_dev = pci_dev; 2210 list[ns].cdev = cdev; 2211 list[ns].pf_bond = -1; 2212 list[ns].ifindex = 0; 2213 if (nl_rdma >= 0) 2214 list[ns].ifindex = mlx5_nl_ifindex 2215 (nl_rdma, 2216 ibv_match[i]->name, 2217 1); 2218 if (!list[ns].ifindex) { 2219 char ifname[IF_NAMESIZE]; 2220 2221 /* 2222 * Netlink failed, it may happen with old 2223 * ib_core kernel driver (before 4.16). 2224 * We can assume there is old driver because 2225 * here we are processing single ports IB 2226 * devices. Let's try sysfs to retrieve 2227 * the ifindex. The method works for 2228 * master device only. 2229 */ 2230 if (nd > 1) { 2231 /* 2232 * Multiple devices found, assume 2233 * representors, can not distinguish 2234 * master/representor and retrieve 2235 * ifindex via sysfs. 2236 */ 2237 continue; 2238 } 2239 ret = mlx5_get_ifname_sysfs 2240 (ibv_match[i]->ibdev_path, ifname); 2241 if (!ret) 2242 list[ns].ifindex = 2243 if_nametoindex(ifname); 2244 if (!list[ns].ifindex) { 2245 /* 2246 * No network interface index found 2247 * for the specified device, it means 2248 * there it is neither representor 2249 * nor master. 2250 */ 2251 continue; 2252 } 2253 } 2254 ret = -1; 2255 if (nl_route >= 0) 2256 ret = mlx5_nl_switch_info(nl_route, 2257 list[ns].ifindex, 2258 &list[ns].info); 2259 if (ret || (!list[ns].info.representor && 2260 !list[ns].info.master)) { 2261 /* 2262 * We failed to recognize representors with 2263 * Netlink, let's try to perform the task 2264 * with sysfs. 2265 */ 2266 ret = mlx5_sysfs_switch_info(list[ns].ifindex, 2267 &list[ns].info); 2268 } 2269 if (!ret && (list[ns].info.representor ^ 2270 list[ns].info.master)) { 2271 ns++; 2272 } else if ((nd == 1) && 2273 !list[ns].info.representor && 2274 !list[ns].info.master) { 2275 /* 2276 * Single IB device with one physical port and 2277 * attached network device. 2278 * May be SRIOV is not enabled or there is no 2279 * representors. 2280 */ 2281 DRV_LOG(INFO, "No E-Switch support detected."); 2282 ns++; 2283 break; 2284 } 2285 } 2286 if (!ns) { 2287 DRV_LOG(ERR, 2288 "Unable to recognize master/representors on the multiple IB devices."); 2289 rte_errno = ENOENT; 2290 ret = -rte_errno; 2291 goto exit; 2292 } 2293 /* 2294 * New kernels may add the switch_id attribute for the case 2295 * there is no E-Switch and we wrongly recognized the only 2296 * device as master. Override this if there is the single 2297 * device with single port and new device name format present. 2298 */ 2299 if (nd == 1 && 2300 list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 2301 list[0].info.master = 0; 2302 list[0].info.representor = 0; 2303 } 2304 } 2305 MLX5_ASSERT(ns); 2306 /* 2307 * Sort list to probe devices in natural order for users convenience 2308 * (i.e. master first, then representors from lowest to highest ID). 2309 */ 2310 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2311 if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2312 /* Set devargs default values. */ 2313 if (eth_da.nb_mh_controllers == 0) { 2314 eth_da.nb_mh_controllers = 1; 2315 eth_da.mh_controllers[0] = 0; 2316 } 2317 if (eth_da.nb_ports == 0 && ns > 0) { 2318 if (list[0].pf_bond >= 0 && list[0].info.representor) 2319 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2320 pci_dev->device.devargs->args); 2321 eth_da.nb_ports = 1; 2322 eth_da.ports[0] = list[0].info.pf_num; 2323 } 2324 if (eth_da.nb_representor_ports == 0) { 2325 eth_da.nb_representor_ports = 1; 2326 eth_da.representor_ports[0] = 0; 2327 } 2328 } 2329 for (i = 0; i != ns; ++i) { 2330 uint32_t restore; 2331 2332 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], ð_da, 2333 mkvlist); 2334 if (!list[i].eth_dev) { 2335 if (rte_errno != EBUSY && rte_errno != EEXIST) 2336 break; 2337 /* Device is disabled or already spawned. Ignore it. */ 2338 continue; 2339 } 2340 restore = list[i].eth_dev->data->dev_flags; 2341 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2342 /** 2343 * Each representor has a dedicated interrupts vector. 2344 * rte_eth_copy_pci_info() assigns PF interrupts handle to 2345 * representor eth_dev object because representor and PF 2346 * share the same PCI address. 2347 * Override representor device with a dedicated 2348 * interrupts handle here. 2349 * Representor interrupts handle is released in mlx5_dev_stop(). 2350 */ 2351 if (list[i].info.representor) { 2352 struct rte_intr_handle *intr_handle = 2353 rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2354 if (intr_handle == NULL) { 2355 DRV_LOG(ERR, 2356 "port %u failed to allocate memory for interrupt handler " 2357 "Rx interrupts will not be supported", 2358 i); 2359 rte_errno = ENOMEM; 2360 ret = -rte_errno; 2361 goto exit; 2362 } 2363 list[i].eth_dev->intr_handle = intr_handle; 2364 } 2365 /* Restore non-PCI flags cleared by the above call. */ 2366 list[i].eth_dev->data->dev_flags |= restore; 2367 rte_eth_dev_probing_finish(list[i].eth_dev); 2368 } 2369 if (i != ns) { 2370 DRV_LOG(ERR, 2371 "probe of PCI device " PCI_PRI_FMT " aborted after" 2372 " encountering an error: %s", 2373 owner_pci.domain, owner_pci.bus, 2374 owner_pci.devid, owner_pci.function, 2375 strerror(rte_errno)); 2376 ret = -rte_errno; 2377 /* Roll back. */ 2378 while (i--) { 2379 if (!list[i].eth_dev) 2380 continue; 2381 mlx5_dev_close(list[i].eth_dev); 2382 /* mac_addrs must not be freed because in dev_private */ 2383 list[i].eth_dev->data->mac_addrs = NULL; 2384 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2385 } 2386 /* Restore original error. */ 2387 rte_errno = -ret; 2388 } else { 2389 ret = 0; 2390 } 2391 exit: 2392 /* 2393 * Do the routine cleanup: 2394 * - close opened Netlink sockets 2395 * - free allocated spawn data array 2396 * - free the Infiniband device list 2397 */ 2398 if (nl_rdma >= 0) 2399 close(nl_rdma); 2400 if (nl_route >= 0) 2401 close(nl_route); 2402 if (list) 2403 mlx5_free(list); 2404 MLX5_ASSERT(ibv_list); 2405 mlx5_glue->free_device_list(ibv_list); 2406 return ret; 2407 } 2408 2409 static int 2410 mlx5_os_parse_eth_devargs(struct rte_device *dev, 2411 struct rte_eth_devargs *eth_da) 2412 { 2413 int ret = 0; 2414 2415 if (dev->devargs == NULL) 2416 return 0; 2417 memset(eth_da, 0, sizeof(*eth_da)); 2418 /* Parse representor information first from class argument. */ 2419 if (dev->devargs->cls_str) 2420 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2421 if (ret != 0) { 2422 DRV_LOG(ERR, "failed to parse device arguments: %s", 2423 dev->devargs->cls_str); 2424 return -rte_errno; 2425 } 2426 if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) { 2427 /* Parse legacy device argument */ 2428 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2429 if (ret) { 2430 DRV_LOG(ERR, "failed to parse device arguments: %s", 2431 dev->devargs->args); 2432 return -rte_errno; 2433 } 2434 } 2435 return 0; 2436 } 2437 2438 /** 2439 * Callback to register a PCI device. 2440 * 2441 * This function spawns Ethernet devices out of a given PCI device. 2442 * 2443 * @param[in] cdev 2444 * Pointer to common mlx5 device structure. 2445 * @param[in, out] mkvlist 2446 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2447 * 2448 * @return 2449 * 0 on success, a negative errno value otherwise and rte_errno is set. 2450 */ 2451 static int 2452 mlx5_os_pci_probe(struct mlx5_common_device *cdev, 2453 struct mlx5_kvargs_ctrl *mkvlist) 2454 { 2455 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2456 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2457 int ret = 0; 2458 uint16_t p; 2459 2460 ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2461 if (ret != 0) 2462 return ret; 2463 2464 if (eth_da.nb_ports > 0) { 2465 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 2466 for (p = 0; p < eth_da.nb_ports; p++) { 2467 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 2468 eth_da.ports[p], mkvlist); 2469 if (ret) { 2470 DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " " 2471 "aborted due to proding failure of PF %u", 2472 pci_dev->addr.domain, pci_dev->addr.bus, 2473 pci_dev->addr.devid, pci_dev->addr.function, 2474 eth_da.ports[p]); 2475 mlx5_net_remove(cdev); 2476 if (p != 0) 2477 break; 2478 } 2479 } 2480 } else { 2481 ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0, mkvlist); 2482 } 2483 return ret; 2484 } 2485 2486 /* Probe a single SF device on auxiliary bus, no representor support. */ 2487 static int 2488 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, 2489 struct mlx5_kvargs_ctrl *mkvlist) 2490 { 2491 struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2492 struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 2493 struct rte_device *dev = cdev->dev; 2494 struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2495 struct rte_eth_dev *eth_dev; 2496 int ret = 0; 2497 2498 /* Parse ethdev devargs. */ 2499 ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2500 if (ret != 0) 2501 return ret; 2502 /* Init spawn data. */ 2503 spawn.max_port = 1; 2504 spawn.phys_port = 1; 2505 spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2506 ret = mlx5_auxiliary_get_ifindex(dev->name); 2507 if (ret < 0) { 2508 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2509 return ret; 2510 } 2511 spawn.ifindex = ret; 2512 spawn.cdev = cdev; 2513 /* Spawn device. */ 2514 eth_dev = mlx5_dev_spawn(dev, &spawn, ð_da, mkvlist); 2515 if (eth_dev == NULL) 2516 return -rte_errno; 2517 /* Post create. */ 2518 eth_dev->intr_handle = adev->intr_handle; 2519 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2520 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2521 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2522 eth_dev->data->numa_node = dev->numa_node; 2523 } 2524 rte_eth_dev_probing_finish(eth_dev); 2525 return 0; 2526 } 2527 2528 /** 2529 * Net class driver callback to probe a device. 2530 * 2531 * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2532 * 2533 * @param[in] cdev 2534 * Pointer to the common mlx5 device. 2535 * @param[in, out] mkvlist 2536 * Pointer to mlx5 kvargs control, can be NULL if there is no devargs. 2537 * 2538 * @return 2539 * 0 on success, a negative errno value otherwise and rte_errno is set. 2540 */ 2541 int 2542 mlx5_os_net_probe(struct mlx5_common_device *cdev, 2543 struct mlx5_kvargs_ctrl *mkvlist) 2544 { 2545 int ret; 2546 2547 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2548 mlx5_pmd_socket_init(); 2549 ret = mlx5_init_once(); 2550 if (ret) { 2551 DRV_LOG(ERR, "Unable to init PMD global data: %s", 2552 strerror(rte_errno)); 2553 return -rte_errno; 2554 } 2555 ret = mlx5_probe_again_args_validate(cdev, mkvlist); 2556 if (ret) { 2557 DRV_LOG(ERR, "Probe again parameters are not compatible : %s", 2558 strerror(rte_errno)); 2559 return -rte_errno; 2560 } 2561 if (mlx5_dev_is_pci(cdev->dev)) 2562 return mlx5_os_pci_probe(cdev, mkvlist); 2563 else 2564 return mlx5_os_auxiliary_probe(cdev, mkvlist); 2565 } 2566 2567 /** 2568 * Cleanup resources when the last device is closed. 2569 */ 2570 void 2571 mlx5_os_net_cleanup(void) 2572 { 2573 mlx5_pmd_socket_uninit(); 2574 } 2575 2576 /** 2577 * Install shared asynchronous device events handler. 2578 * This function is implemented to support event sharing 2579 * between multiple ports of single IB device. 2580 * 2581 * @param sh 2582 * Pointer to mlx5_dev_ctx_shared object. 2583 */ 2584 void 2585 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2586 { 2587 struct ibv_context *ctx = sh->cdev->ctx; 2588 int nlsk_fd; 2589 2590 sh->intr_handle = mlx5_os_interrupt_handler_create 2591 (RTE_INTR_INSTANCE_F_SHARED, true, 2592 ctx->async_fd, mlx5_dev_interrupt_handler, sh); 2593 if (!sh->intr_handle) { 2594 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2595 return; 2596 } 2597 nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK); 2598 if (nlsk_fd < 0) { 2599 DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s", 2600 rte_strerror(rte_errno)); 2601 return; 2602 } 2603 sh->intr_handle_nl = mlx5_os_interrupt_handler_create 2604 (RTE_INTR_INSTANCE_F_SHARED, true, 2605 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh); 2606 if (sh->intr_handle_nl == NULL) { 2607 DRV_LOG(ERR, "Fail to allocate intr_handle"); 2608 return; 2609 } 2610 if (sh->cdev->config.devx) { 2611 #ifdef HAVE_IBV_DEVX_ASYNC 2612 struct mlx5dv_devx_cmd_comp *devx_comp; 2613 2614 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 2615 devx_comp = sh->devx_comp; 2616 if (!devx_comp) { 2617 DRV_LOG(INFO, "failed to allocate devx_comp."); 2618 return; 2619 } 2620 sh->intr_handle_devx = mlx5_os_interrupt_handler_create 2621 (RTE_INTR_INSTANCE_F_SHARED, true, 2622 devx_comp->fd, 2623 mlx5_dev_interrupt_handler_devx, sh); 2624 if (!sh->intr_handle_devx) { 2625 DRV_LOG(ERR, "Failed to allocate intr_handle."); 2626 return; 2627 } 2628 #endif /* HAVE_IBV_DEVX_ASYNC */ 2629 } 2630 } 2631 2632 /** 2633 * Uninstall shared asynchronous device events handler. 2634 * This function is implemented to support event sharing 2635 * between multiple ports of single IB device. 2636 * 2637 * @param dev 2638 * Pointer to mlx5_dev_ctx_shared object. 2639 */ 2640 void 2641 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2642 { 2643 mlx5_os_interrupt_handler_destroy(sh->intr_handle, 2644 mlx5_dev_interrupt_handler, sh); 2645 mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl, 2646 mlx5_dev_interrupt_handler_nl, sh); 2647 #ifdef HAVE_IBV_DEVX_ASYNC 2648 mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx, 2649 mlx5_dev_interrupt_handler_devx, sh); 2650 if (sh->devx_comp) 2651 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2652 #endif 2653 } 2654 2655 /** 2656 * Read statistics by a named counter. 2657 * 2658 * @param[in] priv 2659 * Pointer to the private device data structure. 2660 * @param[in] ctr_name 2661 * Pointer to the name of the statistic counter to read 2662 * @param[out] stat 2663 * Pointer to read statistic value. 2664 * @return 2665 * 0 on success and stat is valud, 1 if failed to read the value 2666 * rte_errno is set. 2667 * 2668 */ 2669 int 2670 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2671 uint64_t *stat) 2672 { 2673 int fd; 2674 2675 if (priv->sh) { 2676 if (priv->q_counters != NULL && 2677 strcmp(ctr_name, "out_of_buffer") == 0) 2678 return mlx5_devx_cmd_queue_counter_query 2679 (priv->q_counters, 0, (uint32_t *)stat); 2680 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2681 priv->sh->ibdev_path, 2682 priv->dev_port, 2683 ctr_name); 2684 fd = open(path, O_RDONLY); 2685 /* 2686 * in switchdev the file location is not per port 2687 * but rather in <ibdev_path>/hw_counters/<file_name>. 2688 */ 2689 if (fd == -1) { 2690 MKSTR(path1, "%s/hw_counters/%s", 2691 priv->sh->ibdev_path, 2692 ctr_name); 2693 fd = open(path1, O_RDONLY); 2694 } 2695 if (fd != -1) { 2696 char buf[21] = {'\0'}; 2697 ssize_t n = read(fd, buf, sizeof(buf)); 2698 2699 close(fd); 2700 if (n != -1) { 2701 *stat = strtoull(buf, NULL, 10); 2702 return 0; 2703 } 2704 } 2705 } 2706 *stat = 0; 2707 return 1; 2708 } 2709 2710 /** 2711 * Remove a MAC address from device 2712 * 2713 * @param dev 2714 * Pointer to Ethernet device structure. 2715 * @param index 2716 * MAC address index. 2717 */ 2718 void 2719 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2720 { 2721 struct mlx5_priv *priv = dev->data->dev_private; 2722 const int vf = priv->sh->dev_cap.vf; 2723 2724 if (vf) 2725 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2726 mlx5_ifindex(dev), priv->mac_own, 2727 &dev->data->mac_addrs[index], index); 2728 } 2729 2730 /** 2731 * Adds a MAC address to the device 2732 * 2733 * @param dev 2734 * Pointer to Ethernet device structure. 2735 * @param mac_addr 2736 * MAC address to register. 2737 * @param index 2738 * MAC address index. 2739 * 2740 * @return 2741 * 0 on success, a negative errno value otherwise 2742 */ 2743 int 2744 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2745 uint32_t index) 2746 { 2747 struct mlx5_priv *priv = dev->data->dev_private; 2748 const int vf = priv->sh->dev_cap.vf; 2749 int ret = 0; 2750 2751 if (vf) 2752 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2753 mlx5_ifindex(dev), priv->mac_own, 2754 mac, index); 2755 return ret; 2756 } 2757 2758 /** 2759 * Modify a VF MAC address 2760 * 2761 * @param priv 2762 * Pointer to device private data. 2763 * @param mac_addr 2764 * MAC address to modify into. 2765 * @param iface_idx 2766 * Net device interface index 2767 * @param vf_index 2768 * VF index 2769 * 2770 * @return 2771 * 0 on success, a negative errno value otherwise 2772 */ 2773 int 2774 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2775 unsigned int iface_idx, 2776 struct rte_ether_addr *mac_addr, 2777 int vf_index) 2778 { 2779 return mlx5_nl_vf_mac_addr_modify 2780 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2781 } 2782 2783 /** 2784 * Set device promiscuous mode 2785 * 2786 * @param dev 2787 * Pointer to Ethernet device structure. 2788 * @param enable 2789 * 0 - promiscuous is disabled, otherwise - enabled 2790 * 2791 * @return 2792 * 0 on success, a negative error value otherwise 2793 */ 2794 int 2795 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2796 { 2797 struct mlx5_priv *priv = dev->data->dev_private; 2798 2799 return mlx5_nl_promisc(priv->nl_socket_route, 2800 mlx5_ifindex(dev), !!enable); 2801 } 2802 2803 /** 2804 * Set device promiscuous mode 2805 * 2806 * @param dev 2807 * Pointer to Ethernet device structure. 2808 * @param enable 2809 * 0 - all multicase is disabled, otherwise - enabled 2810 * 2811 * @return 2812 * 0 on success, a negative error value otherwise 2813 */ 2814 int 2815 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2816 { 2817 struct mlx5_priv *priv = dev->data->dev_private; 2818 2819 return mlx5_nl_allmulti(priv->nl_socket_route, 2820 mlx5_ifindex(dev), !!enable); 2821 } 2822 2823 /** 2824 * Flush device MAC addresses 2825 * 2826 * @param dev 2827 * Pointer to Ethernet device structure. 2828 * 2829 */ 2830 void 2831 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2832 { 2833 struct mlx5_priv *priv = dev->data->dev_private; 2834 2835 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2836 dev->data->mac_addrs, 2837 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2838 } 2839