1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2020 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 #include <net/if.h> 13 #include <linux/rtnetlink.h> 14 #include <linux/sockios.h> 15 #include <linux/ethtool.h> 16 #include <fcntl.h> 17 18 #include <rte_malloc.h> 19 #include <rte_ethdev_driver.h> 20 #include <rte_ethdev_pci.h> 21 #include <rte_pci.h> 22 #include <rte_bus_pci.h> 23 #include <rte_common.h> 24 #include <rte_kvargs.h> 25 #include <rte_rwlock.h> 26 #include <rte_spinlock.h> 27 #include <rte_string_fns.h> 28 #include <rte_alarm.h> 29 #include <rte_eal_paging.h> 30 31 #include <mlx5_glue.h> 32 #include <mlx5_devx_cmds.h> 33 #include <mlx5_common.h> 34 #include <mlx5_common_mp.h> 35 #include <mlx5_common_mr.h> 36 #include <mlx5_malloc.h> 37 38 #include "mlx5_defs.h" 39 #include "mlx5.h" 40 #include "mlx5_common_os.h" 41 #include "mlx5_utils.h" 42 #include "mlx5_rxtx.h" 43 #include "mlx5_autoconf.h" 44 #include "mlx5_mr.h" 45 #include "mlx5_flow.h" 46 #include "rte_pmd_mlx5.h" 47 #include "mlx5_verbs.h" 48 #include "mlx5_nl.h" 49 #include "mlx5_devx.h" 50 51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 52 53 #ifndef HAVE_IBV_MLX5_MOD_MPW 54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 56 #endif 57 58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 60 #endif 61 62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 63 64 /* Spinlock for mlx5_shared_data allocation. */ 65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 66 67 /* Process local data for secondary processes. */ 68 static struct mlx5_local_data mlx5_local_data; 69 70 /** 71 * Set the completion channel file descriptor interrupt as non-blocking. 72 * 73 * @param[in] rxq_obj 74 * Pointer to RQ channel object, which includes the channel fd 75 * 76 * @param[out] fd 77 * The file descriptor (representing the intetrrupt) used in this channel. 78 * 79 * @return 80 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 81 */ 82 int 83 mlx5_os_set_nonblock_channel_fd(int fd) 84 { 85 int flags; 86 87 flags = fcntl(fd, F_GETFL); 88 return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 89 } 90 91 /** 92 * Get mlx5 device attributes. The glue function query_device_ex() is called 93 * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 94 * device attributes from the glue out parameter. 95 * 96 * @param dev 97 * Pointer to ibv context. 98 * 99 * @param device_attr 100 * Pointer to mlx5 device attributes. 101 * 102 * @return 103 * 0 on success, non zero error number otherwise 104 */ 105 int 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 107 { 108 int err; 109 struct ibv_device_attr_ex attr_ex; 110 memset(device_attr, 0, sizeof(*device_attr)); 111 err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 112 if (err) 113 return err; 114 115 device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 116 device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 117 device_attr->max_sge = attr_ex.orig_attr.max_sge; 118 device_attr->max_cq = attr_ex.orig_attr.max_cq; 119 device_attr->max_qp = attr_ex.orig_attr.max_qp; 120 device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 121 device_attr->max_rwq_indirection_table_size = 122 attr_ex.rss_caps.max_rwq_indirection_table_size; 123 device_attr->max_tso = attr_ex.tso_caps.max_tso; 124 device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 125 126 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 127 err = mlx5_glue->dv_query_device(ctx, &dv_attr); 128 if (err) 129 return err; 130 131 device_attr->flags = dv_attr.flags; 132 device_attr->comp_mask = dv_attr.comp_mask; 133 #ifdef HAVE_IBV_MLX5_MOD_SWP 134 device_attr->sw_parsing_offloads = 135 dv_attr.sw_parsing_caps.sw_parsing_offloads; 136 #endif 137 device_attr->min_single_stride_log_num_of_bytes = 138 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 139 device_attr->max_single_stride_log_num_of_bytes = 140 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 141 device_attr->min_single_wqe_log_num_of_strides = 142 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 143 device_attr->max_single_wqe_log_num_of_strides = 144 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 145 device_attr->stride_supported_qpts = 146 dv_attr.striding_rq_caps.supported_qpts; 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 148 device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 149 #endif 150 151 return err; 152 } 153 154 /** 155 * Verbs callback to allocate a memory. This function should allocate the space 156 * according to the size provided residing inside a huge page. 157 * Please note that all allocation must respect the alignment from libmlx5 158 * (i.e. currently rte_mem_page_size()). 159 * 160 * @param[in] size 161 * The size in bytes of the memory to allocate. 162 * @param[in] data 163 * A pointer to the callback data. 164 * 165 * @return 166 * Allocated buffer, NULL otherwise and rte_errno is set. 167 */ 168 static void * 169 mlx5_alloc_verbs_buf(size_t size, void *data) 170 { 171 struct mlx5_priv *priv = data; 172 void *ret; 173 unsigned int socket = SOCKET_ID_ANY; 174 size_t alignment = rte_mem_page_size(); 175 if (alignment == (size_t)-1) { 176 DRV_LOG(ERR, "Failed to get mem page size"); 177 rte_errno = ENOMEM; 178 return NULL; 179 } 180 181 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { 182 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 183 184 socket = ctrl->socket; 185 } else if (priv->verbs_alloc_ctx.type == 186 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) { 187 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 188 189 socket = ctrl->socket; 190 } 191 MLX5_ASSERT(data != NULL); 192 ret = mlx5_malloc(0, size, alignment, socket); 193 if (!ret && size) 194 rte_errno = ENOMEM; 195 return ret; 196 } 197 198 /** 199 * Verbs callback to free a memory. 200 * 201 * @param[in] ptr 202 * A pointer to the memory to free. 203 * @param[in] data 204 * A pointer to the callback data. 205 */ 206 static void 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) 208 { 209 MLX5_ASSERT(data != NULL); 210 mlx5_free(ptr); 211 } 212 213 /** 214 * Initialize DR related data within private structure. 215 * Routine checks the reference counter and does actual 216 * resources creation/initialization only if counter is zero. 217 * 218 * @param[in] priv 219 * Pointer to the private device data structure. 220 * 221 * @return 222 * Zero on success, positive error code otherwise. 223 */ 224 static int 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 226 { 227 struct mlx5_dev_ctx_shared *sh = priv->sh; 228 char s[MLX5_HLIST_NAMESIZE]; 229 int err = 0; 230 231 if (!sh->flow_tbls) 232 err = mlx5_alloc_table_hash_list(priv); 233 else 234 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n", 235 (void *)sh->flow_tbls); 236 if (err) 237 return err; 238 /* Create tags hash list table. */ 239 snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); 240 sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE); 241 if (!sh->tag_table) { 242 DRV_LOG(ERR, "tags with hash creation failed."); 243 err = ENOMEM; 244 goto error; 245 } 246 snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); 247 sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ); 248 if (!sh->modify_cmds) { 249 DRV_LOG(ERR, "hdr modify hash creation failed"); 250 err = ENOMEM; 251 goto error; 252 } 253 snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name); 254 sh->encaps_decaps = mlx5_hlist_create(s, 255 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ); 256 if (!sh->encaps_decaps) { 257 DRV_LOG(ERR, "encap decap hash creation failed"); 258 err = ENOMEM; 259 goto error; 260 } 261 #ifdef HAVE_MLX5DV_DR 262 void *domain; 263 264 if (sh->dv_refcnt) { 265 /* Shared DV/DR structures is already initialized. */ 266 sh->dv_refcnt++; 267 priv->dr_shared = 1; 268 return 0; 269 } 270 /* Reference counter is zero, we should initialize structures. */ 271 domain = mlx5_glue->dr_create_domain(sh->ctx, 272 MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 273 if (!domain) { 274 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 275 err = errno; 276 goto error; 277 } 278 sh->rx_domain = domain; 279 domain = mlx5_glue->dr_create_domain(sh->ctx, 280 MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 281 if (!domain) { 282 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 283 err = errno; 284 goto error; 285 } 286 pthread_mutex_init(&sh->dv_mutex, NULL); 287 sh->tx_domain = domain; 288 #ifdef HAVE_MLX5DV_DR_ESWITCH 289 if (priv->config.dv_esw_en) { 290 domain = mlx5_glue->dr_create_domain 291 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); 292 if (!domain) { 293 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 294 err = errno; 295 goto error; 296 } 297 sh->fdb_domain = domain; 298 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); 299 } 300 #endif 301 if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 302 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 303 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 304 if (sh->fdb_domain) 305 mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 306 } 307 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 308 #endif /* HAVE_MLX5DV_DR */ 309 sh->dv_refcnt++; 310 priv->dr_shared = 1; 311 return 0; 312 error: 313 /* Rollback the created objects. */ 314 if (sh->rx_domain) { 315 mlx5_glue->dr_destroy_domain(sh->rx_domain); 316 sh->rx_domain = NULL; 317 } 318 if (sh->tx_domain) { 319 mlx5_glue->dr_destroy_domain(sh->tx_domain); 320 sh->tx_domain = NULL; 321 } 322 if (sh->fdb_domain) { 323 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 324 sh->fdb_domain = NULL; 325 } 326 if (sh->esw_drop_action) { 327 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 328 sh->esw_drop_action = NULL; 329 } 330 if (sh->pop_vlan_action) { 331 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 332 sh->pop_vlan_action = NULL; 333 } 334 if (sh->encaps_decaps) { 335 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL); 336 sh->encaps_decaps = NULL; 337 } 338 if (sh->modify_cmds) { 339 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 340 sh->modify_cmds = NULL; 341 } 342 if (sh->tag_table) { 343 /* tags should be destroyed with flow before. */ 344 mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 345 sh->tag_table = NULL; 346 } 347 mlx5_free_table_hash_list(priv); 348 return err; 349 } 350 351 /** 352 * Destroy DR related data within private structure. 353 * 354 * @param[in] priv 355 * Pointer to the private device data structure. 356 */ 357 void 358 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 359 { 360 struct mlx5_dev_ctx_shared *sh; 361 362 if (!priv->dr_shared) 363 return; 364 priv->dr_shared = 0; 365 sh = priv->sh; 366 MLX5_ASSERT(sh); 367 #ifdef HAVE_MLX5DV_DR 368 MLX5_ASSERT(sh->dv_refcnt); 369 if (sh->dv_refcnt && --sh->dv_refcnt) 370 return; 371 if (sh->rx_domain) { 372 mlx5_glue->dr_destroy_domain(sh->rx_domain); 373 sh->rx_domain = NULL; 374 } 375 if (sh->tx_domain) { 376 mlx5_glue->dr_destroy_domain(sh->tx_domain); 377 sh->tx_domain = NULL; 378 } 379 #ifdef HAVE_MLX5DV_DR_ESWITCH 380 if (sh->fdb_domain) { 381 mlx5_glue->dr_destroy_domain(sh->fdb_domain); 382 sh->fdb_domain = NULL; 383 } 384 if (sh->esw_drop_action) { 385 mlx5_glue->destroy_flow_action(sh->esw_drop_action); 386 sh->esw_drop_action = NULL; 387 } 388 #endif 389 if (sh->pop_vlan_action) { 390 mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 391 sh->pop_vlan_action = NULL; 392 } 393 pthread_mutex_destroy(&sh->dv_mutex); 394 #endif /* HAVE_MLX5DV_DR */ 395 if (sh->encaps_decaps) { 396 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL); 397 sh->encaps_decaps = NULL; 398 } 399 if (sh->modify_cmds) { 400 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 401 sh->modify_cmds = NULL; 402 } 403 if (sh->tag_table) { 404 /* tags should be destroyed with flow before. */ 405 mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 406 sh->tag_table = NULL; 407 } 408 mlx5_free_table_hash_list(priv); 409 } 410 411 /** 412 * Initialize shared data between primary and secondary process. 413 * 414 * A memzone is reserved by primary process and secondary processes attach to 415 * the memzone. 416 * 417 * @return 418 * 0 on success, a negative errno value otherwise and rte_errno is set. 419 */ 420 static int 421 mlx5_init_shared_data(void) 422 { 423 const struct rte_memzone *mz; 424 int ret = 0; 425 426 rte_spinlock_lock(&mlx5_shared_data_lock); 427 if (mlx5_shared_data == NULL) { 428 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 429 /* Allocate shared memory. */ 430 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 431 sizeof(*mlx5_shared_data), 432 SOCKET_ID_ANY, 0); 433 if (mz == NULL) { 434 DRV_LOG(ERR, 435 "Cannot allocate mlx5 shared data"); 436 ret = -rte_errno; 437 goto error; 438 } 439 mlx5_shared_data = mz->addr; 440 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 441 rte_spinlock_init(&mlx5_shared_data->lock); 442 } else { 443 /* Lookup allocated shared memory. */ 444 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 445 if (mz == NULL) { 446 DRV_LOG(ERR, 447 "Cannot attach mlx5 shared data"); 448 ret = -rte_errno; 449 goto error; 450 } 451 mlx5_shared_data = mz->addr; 452 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 453 } 454 } 455 error: 456 rte_spinlock_unlock(&mlx5_shared_data_lock); 457 return ret; 458 } 459 460 /** 461 * PMD global initialization. 462 * 463 * Independent from individual device, this function initializes global 464 * per-PMD data structures distinguishing primary and secondary processes. 465 * Hence, each initialization is called once per a process. 466 * 467 * @return 468 * 0 on success, a negative errno value otherwise and rte_errno is set. 469 */ 470 static int 471 mlx5_init_once(void) 472 { 473 struct mlx5_shared_data *sd; 474 struct mlx5_local_data *ld = &mlx5_local_data; 475 int ret = 0; 476 477 if (mlx5_init_shared_data()) 478 return -rte_errno; 479 sd = mlx5_shared_data; 480 MLX5_ASSERT(sd); 481 rte_spinlock_lock(&sd->lock); 482 switch (rte_eal_process_type()) { 483 case RTE_PROC_PRIMARY: 484 if (sd->init_done) 485 break; 486 LIST_INIT(&sd->mem_event_cb_list); 487 rte_rwlock_init(&sd->mem_event_rwlock); 488 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", 489 mlx5_mr_mem_event_cb, NULL); 490 ret = mlx5_mp_init_primary(MLX5_MP_NAME, 491 mlx5_mp_os_primary_handle); 492 if (ret) 493 goto out; 494 sd->init_done = true; 495 break; 496 case RTE_PROC_SECONDARY: 497 if (ld->init_done) 498 break; 499 ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 500 mlx5_mp_os_secondary_handle); 501 if (ret) 502 goto out; 503 ++sd->secondary_cnt; 504 ld->init_done = true; 505 break; 506 default: 507 break; 508 } 509 out: 510 rte_spinlock_unlock(&sd->lock); 511 return ret; 512 } 513 514 /** 515 * Create the Tx queue DevX/Verbs object. 516 * 517 * @param dev 518 * Pointer to Ethernet device. 519 * @param idx 520 * Queue index in DPDK Tx queue array. 521 * 522 * @return 523 * 0 on success, a negative errno value otherwise and rte_errno is set. 524 */ 525 static int 526 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx) 527 { 528 struct mlx5_priv *priv = dev->data->dev_private; 529 struct mlx5_txq_data *txq_data = (*priv->txqs)[idx]; 530 struct mlx5_txq_ctrl *txq_ctrl = 531 container_of(txq_data, struct mlx5_txq_ctrl, txq); 532 533 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) 534 return mlx5_txq_devx_obj_new(dev, idx); 535 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 536 if (!priv->config.dv_esw_en) 537 return mlx5_txq_devx_obj_new(dev, idx); 538 #endif 539 return mlx5_txq_ibv_obj_new(dev, idx); 540 } 541 542 /** 543 * Release an Tx DevX/verbs queue object. 544 * 545 * @param txq_obj 546 * DevX/Verbs Tx queue object. 547 */ 548 static void 549 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj) 550 { 551 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) { 552 mlx5_txq_devx_obj_release(txq_obj); 553 return; 554 } 555 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 556 if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) { 557 mlx5_txq_devx_obj_release(txq_obj); 558 return; 559 } 560 #endif 561 mlx5_txq_ibv_obj_release(txq_obj); 562 } 563 564 /** 565 * DV flow counter mode detect and config. 566 * 567 * @param dev 568 * Pointer to rte_eth_dev structure. 569 * 570 */ 571 static void 572 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) 573 { 574 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 575 struct mlx5_priv *priv = dev->data->dev_private; 576 struct mlx5_dev_ctx_shared *sh = priv->sh; 577 bool fallback; 578 579 #ifndef HAVE_IBV_DEVX_ASYNC 580 fallback = true; 581 #else 582 fallback = false; 583 if (!priv->config.devx || !priv->config.dv_flow_en || 584 !priv->config.hca_attr.flow_counters_dump || 585 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) || 586 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP)) 587 fallback = true; 588 #endif 589 if (fallback) 590 DRV_LOG(INFO, "Use fall-back DV counter management. Flow " 591 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.", 592 priv->config.hca_attr.flow_counters_dump, 593 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap); 594 /* Initialize fallback mode only on the port initializes sh. */ 595 if (sh->refcnt == 1) 596 sh->cmng.counter_fallback = fallback; 597 else if (fallback != sh->cmng.counter_fallback) 598 DRV_LOG(WARNING, "Port %d in sh has different fallback mode " 599 "with others:%d.", PORT_ID(priv), fallback); 600 #endif 601 } 602 603 /** 604 * Spawn an Ethernet device from Verbs information. 605 * 606 * @param dpdk_dev 607 * Backing DPDK device. 608 * @param spawn 609 * Verbs device parameters (name, port, switch_info) to spawn. 610 * @param config 611 * Device configuration parameters. 612 * 613 * @return 614 * A valid Ethernet device object on success, NULL otherwise and rte_errno 615 * is set. The following errors are defined: 616 * 617 * EBUSY: device is not supposed to be spawned. 618 * EEXIST: device is already spawned 619 */ 620 static struct rte_eth_dev * 621 mlx5_dev_spawn(struct rte_device *dpdk_dev, 622 struct mlx5_dev_spawn_data *spawn, 623 struct mlx5_dev_config *config) 624 { 625 const struct mlx5_switch_info *switch_info = &spawn->info; 626 struct mlx5_dev_ctx_shared *sh = NULL; 627 struct ibv_port_attr port_attr; 628 struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 629 struct rte_eth_dev *eth_dev = NULL; 630 struct mlx5_priv *priv = NULL; 631 int err = 0; 632 unsigned int hw_padding = 0; 633 unsigned int mps; 634 unsigned int cqe_comp; 635 unsigned int cqe_pad = 0; 636 unsigned int tunnel_en = 0; 637 unsigned int mpls_en = 0; 638 unsigned int swp = 0; 639 unsigned int mprq = 0; 640 unsigned int mprq_min_stride_size_n = 0; 641 unsigned int mprq_max_stride_size_n = 0; 642 unsigned int mprq_min_stride_num_n = 0; 643 unsigned int mprq_max_stride_num_n = 0; 644 struct rte_ether_addr mac; 645 char name[RTE_ETH_NAME_MAX_LEN]; 646 int own_domain_id = 0; 647 uint16_t port_id; 648 unsigned int i; 649 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 650 struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; 651 #endif 652 653 /* Determine if this port representor is supposed to be spawned. */ 654 if (switch_info->representor && dpdk_dev->devargs) { 655 struct rte_eth_devargs eth_da; 656 657 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); 658 if (err) { 659 rte_errno = -err; 660 DRV_LOG(ERR, "failed to process device arguments: %s", 661 strerror(rte_errno)); 662 return NULL; 663 } 664 for (i = 0; i < eth_da.nb_representor_ports; ++i) 665 if (eth_da.representor_ports[i] == 666 (uint16_t)switch_info->port_name) 667 break; 668 if (i == eth_da.nb_representor_ports) { 669 rte_errno = EBUSY; 670 return NULL; 671 } 672 } 673 /* Build device name. */ 674 if (spawn->pf_bond < 0) { 675 /* Single device. */ 676 if (!switch_info->representor) 677 strlcpy(name, dpdk_dev->name, sizeof(name)); 678 else 679 snprintf(name, sizeof(name), "%s_representor_%u", 680 dpdk_dev->name, switch_info->port_name); 681 } else { 682 /* Bonding device. */ 683 if (!switch_info->representor) 684 snprintf(name, sizeof(name), "%s_%s", 685 dpdk_dev->name, 686 mlx5_os_get_dev_device_name(spawn->phys_dev)); 687 else 688 snprintf(name, sizeof(name), "%s_%s_representor_%u", 689 dpdk_dev->name, 690 mlx5_os_get_dev_device_name(spawn->phys_dev), 691 switch_info->port_name); 692 } 693 /* check if the device is already spawned */ 694 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 695 rte_errno = EEXIST; 696 return NULL; 697 } 698 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 699 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 700 struct mlx5_mp_id mp_id; 701 702 eth_dev = rte_eth_dev_attach_secondary(name); 703 if (eth_dev == NULL) { 704 DRV_LOG(ERR, "can not attach rte ethdev"); 705 rte_errno = ENOMEM; 706 return NULL; 707 } 708 eth_dev->device = dpdk_dev; 709 eth_dev->dev_ops = &mlx5_os_dev_sec_ops; 710 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 711 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 712 err = mlx5_proc_priv_init(eth_dev); 713 if (err) 714 return NULL; 715 mp_id.port_id = eth_dev->data->port_id; 716 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 717 /* Receive command fd from primary process */ 718 err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 719 if (err < 0) 720 goto err_secondary; 721 /* Remap UAR for Tx queues. */ 722 err = mlx5_tx_uar_init_secondary(eth_dev, err); 723 if (err) 724 goto err_secondary; 725 /* 726 * Ethdev pointer is still required as input since 727 * the primary device is not accessible from the 728 * secondary process. 729 */ 730 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 731 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 732 return eth_dev; 733 err_secondary: 734 mlx5_dev_close(eth_dev); 735 return NULL; 736 } 737 /* 738 * Some parameters ("tx_db_nc" in particularly) are needed in 739 * advance to create dv/verbs device context. We proceed the 740 * devargs here to get ones, and later proceed devargs again 741 * to override some hardware settings. 742 */ 743 err = mlx5_args(config, dpdk_dev->devargs); 744 if (err) { 745 err = rte_errno; 746 DRV_LOG(ERR, "failed to process device arguments: %s", 747 strerror(rte_errno)); 748 goto error; 749 } 750 mlx5_malloc_mem_select(config->sys_mem_en); 751 sh = mlx5_alloc_shared_dev_ctx(spawn, config); 752 if (!sh) 753 return NULL; 754 config->devx = sh->devx; 755 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 756 config->dest_tir = 1; 757 #endif 758 #ifdef HAVE_IBV_MLX5_MOD_SWP 759 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 760 #endif 761 /* 762 * Multi-packet send is supported by ConnectX-4 Lx PF as well 763 * as all ConnectX-5 devices. 764 */ 765 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 766 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 767 #endif 768 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 769 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 770 #endif 771 mlx5_glue->dv_query_device(sh->ctx, &dv_attr); 772 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 773 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 774 DRV_LOG(DEBUG, "enhanced MPW is supported"); 775 mps = MLX5_MPW_ENHANCED; 776 } else { 777 DRV_LOG(DEBUG, "MPW is supported"); 778 mps = MLX5_MPW; 779 } 780 } else { 781 DRV_LOG(DEBUG, "MPW isn't supported"); 782 mps = MLX5_MPW_DISABLED; 783 } 784 #ifdef HAVE_IBV_MLX5_MOD_SWP 785 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 786 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; 787 DRV_LOG(DEBUG, "SWP support: %u", swp); 788 #endif 789 config->swp = !!swp; 790 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 791 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 792 struct mlx5dv_striding_rq_caps mprq_caps = 793 dv_attr.striding_rq_caps; 794 795 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 796 mprq_caps.min_single_stride_log_num_of_bytes); 797 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 798 mprq_caps.max_single_stride_log_num_of_bytes); 799 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 800 mprq_caps.min_single_wqe_log_num_of_strides); 801 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 802 mprq_caps.max_single_wqe_log_num_of_strides); 803 DRV_LOG(DEBUG, "\tsupported_qpts: %d", 804 mprq_caps.supported_qpts); 805 DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 806 mprq = 1; 807 mprq_min_stride_size_n = 808 mprq_caps.min_single_stride_log_num_of_bytes; 809 mprq_max_stride_size_n = 810 mprq_caps.max_single_stride_log_num_of_bytes; 811 mprq_min_stride_num_n = 812 mprq_caps.min_single_wqe_log_num_of_strides; 813 mprq_max_stride_num_n = 814 mprq_caps.max_single_wqe_log_num_of_strides; 815 } 816 #endif 817 if (RTE_CACHE_LINE_SIZE == 128 && 818 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) 819 cqe_comp = 0; 820 else 821 cqe_comp = 1; 822 config->cqe_comp = cqe_comp; 823 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD 824 /* Whether device supports 128B Rx CQE padding. */ 825 cqe_pad = RTE_CACHE_LINE_SIZE == 128 && 826 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); 827 #endif 828 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 829 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 830 tunnel_en = ((dv_attr.tunnel_offloads_caps & 831 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && 832 (dv_attr.tunnel_offloads_caps & 833 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && 834 (dv_attr.tunnel_offloads_caps & 835 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); 836 } 837 DRV_LOG(DEBUG, "tunnel offloading is %ssupported", 838 tunnel_en ? "" : "not "); 839 #else 840 DRV_LOG(WARNING, 841 "tunnel offloading disabled due to old OFED/rdma-core version"); 842 #endif 843 config->tunnel_en = tunnel_en; 844 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 845 mpls_en = ((dv_attr.tunnel_offloads_caps & 846 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 847 (dv_attr.tunnel_offloads_caps & 848 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 849 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 850 mpls_en ? "" : "not "); 851 #else 852 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 853 " old OFED/rdma-core version or firmware configuration"); 854 #endif 855 config->mpls_en = mpls_en; 856 /* Check port status. */ 857 err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); 858 if (err) { 859 DRV_LOG(ERR, "port query failed: %s", strerror(err)); 860 goto error; 861 } 862 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 863 DRV_LOG(ERR, "port is not configured in Ethernet mode"); 864 err = EINVAL; 865 goto error; 866 } 867 if (port_attr.state != IBV_PORT_ACTIVE) 868 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", 869 mlx5_glue->port_state_str(port_attr.state), 870 port_attr.state); 871 /* Allocate private eth device data. */ 872 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 873 sizeof(*priv), 874 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 875 if (priv == NULL) { 876 DRV_LOG(ERR, "priv allocation failure"); 877 err = ENOMEM; 878 goto error; 879 } 880 priv->sh = sh; 881 priv->dev_port = spawn->phys_port; 882 priv->pci_dev = spawn->pci_dev; 883 priv->mtu = RTE_ETHER_MTU; 884 priv->mp_id.port_id = port_id; 885 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 886 /* Some internal functions rely on Netlink sockets, open them now. */ 887 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); 888 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 889 priv->representor = !!switch_info->representor; 890 priv->master = !!switch_info->master; 891 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 892 priv->vport_meta_tag = 0; 893 priv->vport_meta_mask = 0; 894 priv->pf_bond = spawn->pf_bond; 895 #ifdef HAVE_MLX5DV_DR_DEVX_PORT 896 /* 897 * The DevX port query API is implemented. E-Switch may use 898 * either vport or reg_c[0] metadata register to match on 899 * vport index. The engaged part of metadata register is 900 * defined by mask. 901 */ 902 if (switch_info->representor || switch_info->master) { 903 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | 904 MLX5DV_DEVX_PORT_MATCH_REG_C_0; 905 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, 906 &devx_port); 907 if (err) { 908 DRV_LOG(WARNING, 909 "can't query devx port %d on device %s", 910 spawn->phys_port, 911 mlx5_os_get_dev_device_name(spawn->phys_dev)); 912 devx_port.comp_mask = 0; 913 } 914 } 915 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { 916 priv->vport_meta_tag = devx_port.reg_c_0.value; 917 priv->vport_meta_mask = devx_port.reg_c_0.mask; 918 if (!priv->vport_meta_mask) { 919 DRV_LOG(ERR, "vport zero mask for port %d" 920 " on bonding device %s", 921 spawn->phys_port, 922 mlx5_os_get_dev_device_name 923 (spawn->phys_dev)); 924 err = ENOTSUP; 925 goto error; 926 } 927 if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 928 DRV_LOG(ERR, "invalid vport tag for port %d" 929 " on bonding device %s", 930 spawn->phys_port, 931 mlx5_os_get_dev_device_name 932 (spawn->phys_dev)); 933 err = ENOTSUP; 934 goto error; 935 } 936 } 937 if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { 938 priv->vport_id = devx_port.vport_num; 939 } else if (spawn->pf_bond >= 0) { 940 DRV_LOG(ERR, "can't deduce vport index for port %d" 941 " on bonding device %s", 942 spawn->phys_port, 943 mlx5_os_get_dev_device_name(spawn->phys_dev)); 944 err = ENOTSUP; 945 goto error; 946 } else { 947 /* Suppose vport index in compatible way. */ 948 priv->vport_id = switch_info->representor ? 949 switch_info->port_name + 1 : -1; 950 } 951 #else 952 /* 953 * Kernel/rdma_core support single E-Switch per PF configurations 954 * only and vport_id field contains the vport index for 955 * associated VF, which is deduced from representor port name. 956 * For example, let's have the IB device port 10, it has 957 * attached network device eth0, which has port name attribute 958 * pf0vf2, we can deduce the VF number as 2, and set vport index 959 * as 3 (2+1). This assigning schema should be changed if the 960 * multiple E-Switch instances per PF configurations or/and PCI 961 * subfunctions are added. 962 */ 963 priv->vport_id = switch_info->representor ? 964 switch_info->port_name + 1 : -1; 965 #endif 966 /* representor_id field keeps the unmodified VF index. */ 967 priv->representor_id = switch_info->representor ? 968 switch_info->port_name : -1; 969 /* 970 * Look for sibling devices in order to reuse their switch domain 971 * if any, otherwise allocate one. 972 */ 973 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 974 const struct mlx5_priv *opriv = 975 rte_eth_devices[port_id].data->dev_private; 976 977 if (!opriv || 978 opriv->sh != priv->sh || 979 opriv->domain_id == 980 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 981 continue; 982 priv->domain_id = opriv->domain_id; 983 break; 984 } 985 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 986 err = rte_eth_switch_domain_alloc(&priv->domain_id); 987 if (err) { 988 err = rte_errno; 989 DRV_LOG(ERR, "unable to allocate switch domain: %s", 990 strerror(rte_errno)); 991 goto error; 992 } 993 own_domain_id = 1; 994 } 995 /* Override some values set by hardware configuration. */ 996 mlx5_args(config, dpdk_dev->devargs); 997 err = mlx5_dev_check_sibling_config(priv, config); 998 if (err) 999 goto error; 1000 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 1001 IBV_DEVICE_RAW_IP_CSUM); 1002 DRV_LOG(DEBUG, "checksum offloading is %ssupported", 1003 (config->hw_csum ? "" : "not ")); 1004 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 1005 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 1006 DRV_LOG(DEBUG, "counters are not supported"); 1007 #endif 1008 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 1009 if (config->dv_flow_en) { 1010 DRV_LOG(WARNING, "DV flow is not supported"); 1011 config->dv_flow_en = 0; 1012 } 1013 #endif 1014 config->ind_table_max_size = 1015 sh->device_attr.max_rwq_indirection_table_size; 1016 /* 1017 * Remove this check once DPDK supports larger/variable 1018 * indirection tables. 1019 */ 1020 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 1021 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; 1022 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 1023 config->ind_table_max_size); 1024 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 1025 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 1026 DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 1027 (config->hw_vlan_strip ? "" : "not ")); 1028 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 1029 IBV_RAW_PACKET_CAP_SCATTER_FCS); 1030 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 1031 hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 1032 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 1033 hw_padding = !!(sh->device_attr.device_cap_flags_ex & 1034 IBV_DEVICE_PCI_WRITE_END_PADDING); 1035 #endif 1036 if (config->hw_padding && !hw_padding) { 1037 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 1038 config->hw_padding = 0; 1039 } else if (config->hw_padding) { 1040 DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 1041 } 1042 config->tso = (sh->device_attr.max_tso > 0 && 1043 (sh->device_attr.tso_supported_qpts & 1044 (1 << IBV_QPT_RAW_PACKET))); 1045 if (config->tso) 1046 config->tso_max_payload_sz = sh->device_attr.max_tso; 1047 /* 1048 * MPW is disabled by default, while the Enhanced MPW is enabled 1049 * by default. 1050 */ 1051 if (config->mps == MLX5_ARG_UNSET) 1052 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 1053 MLX5_MPW_DISABLED; 1054 else 1055 config->mps = config->mps ? mps : MLX5_MPW_DISABLED; 1056 DRV_LOG(INFO, "%sMPS is %s", 1057 config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 1058 config->mps == MLX5_MPW ? "legacy " : "", 1059 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 1060 if (config->cqe_comp && !cqe_comp) { 1061 DRV_LOG(WARNING, "Rx CQE compression isn't supported"); 1062 config->cqe_comp = 0; 1063 } 1064 if (config->cqe_pad && !cqe_pad) { 1065 DRV_LOG(WARNING, "Rx CQE padding isn't supported"); 1066 config->cqe_pad = 0; 1067 } else if (config->cqe_pad) { 1068 DRV_LOG(INFO, "Rx CQE padding is enabled"); 1069 } 1070 if (config->devx) { 1071 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); 1072 if (err) { 1073 err = -err; 1074 goto error; 1075 } 1076 /* Check relax ordering support. */ 1077 if (config->hca_attr.relaxed_ordering_write && 1078 config->hca_attr.relaxed_ordering_read && 1079 !haswell_broadwell_cpu) 1080 sh->cmng.relaxed_ordering = 1; 1081 /* Check for LRO support. */ 1082 if (config->dest_tir && config->hca_attr.lro_cap && 1083 config->dv_flow_en) { 1084 /* TBD check tunnel lro caps. */ 1085 config->lro.supported = config->hca_attr.lro_cap; 1086 DRV_LOG(DEBUG, "Device supports LRO"); 1087 /* 1088 * If LRO timeout is not configured by application, 1089 * use the minimal supported value. 1090 */ 1091 if (!config->lro.timeout) 1092 config->lro.timeout = 1093 config->hca_attr.lro_timer_supported_periods[0]; 1094 DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 1095 config->lro.timeout); 1096 DRV_LOG(DEBUG, "LRO minimal size of TCP segment " 1097 "required for coalescing is %d bytes", 1098 config->hca_attr.lro_min_mss_size); 1099 } 1100 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) 1101 if (config->hca_attr.qos.sup && 1102 config->hca_attr.qos.srtcm_sup && 1103 config->dv_flow_en) { 1104 uint8_t reg_c_mask = 1105 config->hca_attr.qos.flow_meter_reg_c_ids; 1106 /* 1107 * Meter needs two REG_C's for color match and pre-sfx 1108 * flow match. Here get the REG_C for color match. 1109 * REG_C_0 and REG_C_1 is reserved for metadata feature. 1110 */ 1111 reg_c_mask &= 0xfc; 1112 if (__builtin_popcount(reg_c_mask) < 1) { 1113 priv->mtr_en = 0; 1114 DRV_LOG(WARNING, "No available register for" 1115 " meter."); 1116 } else { 1117 priv->mtr_color_reg = ffs(reg_c_mask) - 1 + 1118 REG_C_0; 1119 priv->mtr_en = 1; 1120 priv->mtr_reg_share = 1121 config->hca_attr.qos.flow_meter_reg_share; 1122 DRV_LOG(DEBUG, "The REG_C meter uses is %d", 1123 priv->mtr_color_reg); 1124 } 1125 } 1126 #endif 1127 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 1128 if (config->hca_attr.log_max_ft_sampler_num > 0 && 1129 config->dv_flow_en) { 1130 priv->sampler_en = 1; 1131 DRV_LOG(DEBUG, "The Sampler enabled!\n"); 1132 } else { 1133 priv->sampler_en = 0; 1134 if (!config->hca_attr.log_max_ft_sampler_num) 1135 DRV_LOG(WARNING, "No available register for" 1136 " Sampler."); 1137 else 1138 DRV_LOG(DEBUG, "DV flow is not supported!\n"); 1139 } 1140 #endif 1141 } 1142 if (config->tx_pp) { 1143 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 1144 config->hca_attr.dev_freq_khz); 1145 DRV_LOG(DEBUG, "Packet pacing is %ssupported", 1146 config->hca_attr.qos.packet_pacing ? "" : "not "); 1147 DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 1148 config->hca_attr.cross_channel ? "" : "not "); 1149 DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 1150 config->hca_attr.wqe_index_ignore ? "" : "not "); 1151 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 1152 config->hca_attr.non_wire_sq ? "" : "not "); 1153 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 1154 config->hca_attr.log_max_static_sq_wq ? "" : "not ", 1155 config->hca_attr.log_max_static_sq_wq); 1156 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 1157 config->hca_attr.qos.wqe_rate_pp ? "" : "not "); 1158 if (!config->devx) { 1159 DRV_LOG(ERR, "DevX is required for packet pacing"); 1160 err = ENODEV; 1161 goto error; 1162 } 1163 if (!config->hca_attr.qos.packet_pacing) { 1164 DRV_LOG(ERR, "Packet pacing is not supported"); 1165 err = ENODEV; 1166 goto error; 1167 } 1168 if (!config->hca_attr.cross_channel) { 1169 DRV_LOG(ERR, "Cross channel operations are" 1170 " required for packet pacing"); 1171 err = ENODEV; 1172 goto error; 1173 } 1174 if (!config->hca_attr.wqe_index_ignore) { 1175 DRV_LOG(ERR, "WQE index ignore feature is" 1176 " required for packet pacing"); 1177 err = ENODEV; 1178 goto error; 1179 } 1180 if (!config->hca_attr.non_wire_sq) { 1181 DRV_LOG(ERR, "Non-wire SQ feature is" 1182 " required for packet pacing"); 1183 err = ENODEV; 1184 goto error; 1185 } 1186 if (!config->hca_attr.log_max_static_sq_wq) { 1187 DRV_LOG(ERR, "Static WQE SQ feature is" 1188 " required for packet pacing"); 1189 err = ENODEV; 1190 goto error; 1191 } 1192 if (!config->hca_attr.qos.wqe_rate_pp) { 1193 DRV_LOG(ERR, "WQE rate mode is required" 1194 " for packet pacing"); 1195 err = ENODEV; 1196 goto error; 1197 } 1198 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 1199 DRV_LOG(ERR, "DevX does not provide UAR offset," 1200 " can't create queues for packet pacing"); 1201 err = ENODEV; 1202 goto error; 1203 #endif 1204 } 1205 if (config->devx) { 1206 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 1207 1208 err = config->hca_attr.access_register_user ? 1209 mlx5_devx_cmd_register_read 1210 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 1211 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; 1212 if (!err) { 1213 uint32_t ts_mode; 1214 1215 /* MTUTC register is read successfully. */ 1216 ts_mode = MLX5_GET(register_mtutc, reg, 1217 time_stamp_mode); 1218 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 1219 config->rt_timestamp = 1; 1220 } else { 1221 /* Kernel does not support register reading. */ 1222 if (config->hca_attr.dev_freq_khz == 1223 (NS_PER_S / MS_PER_S)) 1224 config->rt_timestamp = 1; 1225 } 1226 } 1227 /* 1228 * If HW has bug working with tunnel packet decapsulation and 1229 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 1230 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 1231 */ 1232 if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en) 1233 config->hw_fcs_strip = 0; 1234 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 1235 (config->hw_fcs_strip ? "" : "not ")); 1236 if (config->mprq.enabled && mprq) { 1237 if (config->mprq.stride_num_n && 1238 (config->mprq.stride_num_n > mprq_max_stride_num_n || 1239 config->mprq.stride_num_n < mprq_min_stride_num_n)) { 1240 config->mprq.stride_num_n = 1241 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, 1242 mprq_min_stride_num_n), 1243 mprq_max_stride_num_n); 1244 DRV_LOG(WARNING, 1245 "the number of strides" 1246 " for Multi-Packet RQ is out of range," 1247 " setting default value (%u)", 1248 1 << config->mprq.stride_num_n); 1249 } 1250 if (config->mprq.stride_size_n && 1251 (config->mprq.stride_size_n > mprq_max_stride_size_n || 1252 config->mprq.stride_size_n < mprq_min_stride_size_n)) { 1253 config->mprq.stride_size_n = 1254 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, 1255 mprq_min_stride_size_n), 1256 mprq_max_stride_size_n); 1257 DRV_LOG(WARNING, 1258 "the size of a stride" 1259 " for Multi-Packet RQ is out of range," 1260 " setting default value (%u)", 1261 1 << config->mprq.stride_size_n); 1262 } 1263 config->mprq.min_stride_size_n = mprq_min_stride_size_n; 1264 config->mprq.max_stride_size_n = mprq_max_stride_size_n; 1265 } else if (config->mprq.enabled && !mprq) { 1266 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 1267 config->mprq.enabled = 0; 1268 } 1269 if (config->max_dump_files_num == 0) 1270 config->max_dump_files_num = 128; 1271 eth_dev = rte_eth_dev_allocate(name); 1272 if (eth_dev == NULL) { 1273 DRV_LOG(ERR, "can not allocate rte ethdev"); 1274 err = ENOMEM; 1275 goto error; 1276 } 1277 if (priv->representor) { 1278 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 1279 eth_dev->data->representor_id = priv->representor_id; 1280 } 1281 /* 1282 * Store associated network device interface index. This index 1283 * is permanent throughout the lifetime of device. So, we may store 1284 * the ifindex here and use the cached value further. 1285 */ 1286 MLX5_ASSERT(spawn->ifindex); 1287 priv->if_index = spawn->ifindex; 1288 if (priv->pf_bond >= 0 && priv->master) { 1289 /* Get bond interface info */ 1290 err = mlx5_sysfs_bond_info(priv->if_index, 1291 &priv->bond_ifindex, 1292 priv->bond_name); 1293 if (err) 1294 DRV_LOG(ERR, "unable to get bond info: %s", 1295 strerror(rte_errno)); 1296 else 1297 DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1298 priv->if_index, priv->bond_ifindex, 1299 priv->bond_name); 1300 } 1301 eth_dev->data->dev_private = priv; 1302 priv->dev_data = eth_dev->data; 1303 eth_dev->data->mac_addrs = priv->mac; 1304 eth_dev->device = dpdk_dev; 1305 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1306 /* Configure the first MAC address by default. */ 1307 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 1308 DRV_LOG(ERR, 1309 "port %u cannot get MAC address, is mlx5_en" 1310 " loaded? (errno: %s)", 1311 eth_dev->data->port_id, strerror(rte_errno)); 1312 err = ENODEV; 1313 goto error; 1314 } 1315 DRV_LOG(INFO, 1316 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 1317 eth_dev->data->port_id, 1318 mac.addr_bytes[0], mac.addr_bytes[1], 1319 mac.addr_bytes[2], mac.addr_bytes[3], 1320 mac.addr_bytes[4], mac.addr_bytes[5]); 1321 #ifdef RTE_LIBRTE_MLX5_DEBUG 1322 { 1323 char ifname[IF_NAMESIZE]; 1324 1325 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 1326 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 1327 eth_dev->data->port_id, ifname); 1328 else 1329 DRV_LOG(DEBUG, "port %u ifname is unknown", 1330 eth_dev->data->port_id); 1331 } 1332 #endif 1333 /* Get actual MTU if possible. */ 1334 err = mlx5_get_mtu(eth_dev, &priv->mtu); 1335 if (err) { 1336 err = rte_errno; 1337 goto error; 1338 } 1339 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 1340 priv->mtu); 1341 /* Initialize burst functions to prevent crashes before link-up. */ 1342 eth_dev->rx_pkt_burst = removed_rx_burst; 1343 eth_dev->tx_pkt_burst = removed_tx_burst; 1344 eth_dev->dev_ops = &mlx5_os_dev_ops; 1345 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1346 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1347 eth_dev->rx_queue_count = mlx5_rx_queue_count; 1348 /* Register MAC address. */ 1349 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1350 if (config->vf && config->vf_nl_en) 1351 mlx5_nl_mac_addr_sync(priv->nl_socket_route, 1352 mlx5_ifindex(eth_dev), 1353 eth_dev->data->mac_addrs, 1354 MLX5_MAX_MAC_ADDRESSES); 1355 priv->flows = 0; 1356 priv->ctrl_flows = 0; 1357 TAILQ_INIT(&priv->flow_meters); 1358 TAILQ_INIT(&priv->flow_meter_profiles); 1359 /* Hint libmlx5 to use PMD allocator for data plane resources */ 1360 mlx5_glue->dv_set_context_attr(sh->ctx, 1361 MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 1362 (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 1363 .alloc = &mlx5_alloc_verbs_buf, 1364 .free = &mlx5_free_verbs_buf, 1365 .data = priv, 1366 })); 1367 /* Bring Ethernet device up. */ 1368 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 1369 eth_dev->data->port_id); 1370 mlx5_set_link_up(eth_dev); 1371 /* 1372 * Even though the interrupt handler is not installed yet, 1373 * interrupts will still trigger on the async_fd from 1374 * Verbs context returned by ibv_open_device(). 1375 */ 1376 mlx5_link_update(eth_dev, 0); 1377 #ifdef HAVE_MLX5DV_DR_ESWITCH 1378 if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && 1379 (switch_info->representor || switch_info->master))) 1380 config->dv_esw_en = 0; 1381 #else 1382 config->dv_esw_en = 0; 1383 #endif 1384 /* Detect minimal data bytes to inline. */ 1385 mlx5_set_min_inline(spawn, config); 1386 /* Store device configuration on private structure. */ 1387 priv->config = *config; 1388 /* Create context for virtual machine VLAN workaround. */ 1389 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1390 if (config->dv_flow_en) { 1391 err = mlx5_alloc_shared_dr(priv); 1392 if (err) 1393 goto error; 1394 /* 1395 * RSS id is shared with meter flow id. Meter flow id can only 1396 * use the 24 MSB of the register. 1397 */ 1398 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >> 1399 MLX5_MTR_COLOR_BITS); 1400 if (!priv->qrss_id_pool) { 1401 DRV_LOG(ERR, "can't create flow id pool"); 1402 err = ENOMEM; 1403 goto error; 1404 } 1405 } 1406 if (config->devx && config->dv_flow_en && config->dest_tir) { 1407 priv->obj_ops = devx_obj_ops; 1408 priv->obj_ops.drop_action_create = 1409 ibv_obj_ops.drop_action_create; 1410 priv->obj_ops.drop_action_destroy = 1411 ibv_obj_ops.drop_action_destroy; 1412 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 1413 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify; 1414 #else 1415 if (config->dv_esw_en) 1416 priv->obj_ops.txq_obj_modify = 1417 ibv_obj_ops.txq_obj_modify; 1418 #endif 1419 /* Use specific wrappers for Tx object. */ 1420 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new; 1421 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release; 1422 1423 } else { 1424 priv->obj_ops = ibv_obj_ops; 1425 } 1426 /* Supported Verbs flow priority number detection. */ 1427 err = mlx5_flow_discover_priorities(eth_dev); 1428 if (err < 0) { 1429 err = -err; 1430 goto error; 1431 } 1432 priv->config.flow_prio = err; 1433 if (!priv->config.dv_esw_en && 1434 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1435 DRV_LOG(WARNING, "metadata mode %u is not supported " 1436 "(no E-Switch)", priv->config.dv_xmeta_en); 1437 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 1438 } 1439 mlx5_set_metadata_mask(eth_dev); 1440 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1441 !priv->sh->dv_regc0_mask) { 1442 DRV_LOG(ERR, "metadata mode %u is not supported " 1443 "(no metadata reg_c[0] is available)", 1444 priv->config.dv_xmeta_en); 1445 err = ENOTSUP; 1446 goto error; 1447 } 1448 /* 1449 * Allocate the buffer for flow creating, just once. 1450 * The allocation must be done before any flow creating. 1451 */ 1452 mlx5_flow_alloc_intermediate(eth_dev); 1453 /* Query availability of metadata reg_c's. */ 1454 err = mlx5_flow_discover_mreg_c(eth_dev); 1455 if (err < 0) { 1456 err = -err; 1457 goto error; 1458 } 1459 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 1460 DRV_LOG(DEBUG, 1461 "port %u extensive metadata register is not supported", 1462 eth_dev->data->port_id); 1463 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1464 DRV_LOG(ERR, "metadata mode %u is not supported " 1465 "(no metadata registers available)", 1466 priv->config.dv_xmeta_en); 1467 err = ENOTSUP; 1468 goto error; 1469 } 1470 } 1471 if (priv->config.dv_flow_en && 1472 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1473 mlx5_flow_ext_mreg_supported(eth_dev) && 1474 priv->sh->dv_regc0_mask) { 1475 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1476 MLX5_FLOW_MREG_HTABLE_SZ); 1477 if (!priv->mreg_cp_tbl) { 1478 err = ENOMEM; 1479 goto error; 1480 } 1481 } 1482 mlx5_flow_counter_mode_config(eth_dev); 1483 return eth_dev; 1484 error: 1485 if (priv) { 1486 if (priv->mreg_cp_tbl) 1487 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL); 1488 if (priv->sh) 1489 mlx5_os_free_shared_dr(priv); 1490 if (priv->nl_socket_route >= 0) 1491 close(priv->nl_socket_route); 1492 if (priv->nl_socket_rdma >= 0) 1493 close(priv->nl_socket_rdma); 1494 if (priv->vmwa_context) 1495 mlx5_vlan_vmwa_exit(priv->vmwa_context); 1496 if (priv->qrss_id_pool) 1497 mlx5_flow_id_pool_release(priv->qrss_id_pool); 1498 if (own_domain_id) 1499 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1500 mlx5_free(priv); 1501 if (eth_dev != NULL) 1502 eth_dev->data->dev_private = NULL; 1503 } 1504 if (eth_dev != NULL) { 1505 /* mac_addrs must not be freed alone because part of 1506 * dev_private 1507 **/ 1508 eth_dev->data->mac_addrs = NULL; 1509 rte_eth_dev_release_port(eth_dev); 1510 } 1511 if (sh) 1512 mlx5_free_shared_dev_ctx(sh); 1513 MLX5_ASSERT(err > 0); 1514 rte_errno = err; 1515 return NULL; 1516 } 1517 1518 /** 1519 * Comparison callback to sort device data. 1520 * 1521 * This is meant to be used with qsort(). 1522 * 1523 * @param a[in] 1524 * Pointer to pointer to first data object. 1525 * @param b[in] 1526 * Pointer to pointer to second data object. 1527 * 1528 * @return 1529 * 0 if both objects are equal, less than 0 if the first argument is less 1530 * than the second, greater than 0 otherwise. 1531 */ 1532 static int 1533 mlx5_dev_spawn_data_cmp(const void *a, const void *b) 1534 { 1535 const struct mlx5_switch_info *si_a = 1536 &((const struct mlx5_dev_spawn_data *)a)->info; 1537 const struct mlx5_switch_info *si_b = 1538 &((const struct mlx5_dev_spawn_data *)b)->info; 1539 int ret; 1540 1541 /* Master device first. */ 1542 ret = si_b->master - si_a->master; 1543 if (ret) 1544 return ret; 1545 /* Then representor devices. */ 1546 ret = si_b->representor - si_a->representor; 1547 if (ret) 1548 return ret; 1549 /* Unidentified devices come last in no specific order. */ 1550 if (!si_a->representor) 1551 return 0; 1552 /* Order representors by name. */ 1553 return si_a->port_name - si_b->port_name; 1554 } 1555 1556 /** 1557 * Match PCI information for possible slaves of bonding device. 1558 * 1559 * @param[in] ibv_dev 1560 * Pointer to Infiniband device structure. 1561 * @param[in] pci_dev 1562 * Pointer to PCI device structure to match PCI address. 1563 * @param[in] nl_rdma 1564 * Netlink RDMA group socket handle. 1565 * 1566 * @return 1567 * negative value if no bonding device found, otherwise 1568 * positive index of slave PF in bonding. 1569 */ 1570 static int 1571 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, 1572 const struct rte_pci_device *pci_dev, 1573 int nl_rdma) 1574 { 1575 char ifname[IF_NAMESIZE + 1]; 1576 unsigned int ifindex; 1577 unsigned int np, i; 1578 FILE *file = NULL; 1579 int pf = -1; 1580 1581 /* 1582 * Try to get master device name. If something goes 1583 * wrong suppose the lack of kernel support and no 1584 * bonding devices. 1585 */ 1586 if (nl_rdma < 0) 1587 return -1; 1588 if (!strstr(ibv_dev->name, "bond")) 1589 return -1; 1590 np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); 1591 if (!np) 1592 return -1; 1593 /* 1594 * The Master device might not be on the predefined 1595 * port (not on port index 1, it is not garanted), 1596 * we have to scan all Infiniband device port and 1597 * find master. 1598 */ 1599 for (i = 1; i <= np; ++i) { 1600 /* Check whether Infiniband port is populated. */ 1601 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); 1602 if (!ifindex) 1603 continue; 1604 if (!if_indextoname(ifindex, ifname)) 1605 continue; 1606 /* Try to read bonding slave names from sysfs. */ 1607 MKSTR(slaves, 1608 "/sys/class/net/%s/master/bonding/slaves", ifname); 1609 file = fopen(slaves, "r"); 1610 if (file) 1611 break; 1612 } 1613 if (!file) 1614 return -1; 1615 /* Use safe format to check maximal buffer length. */ 1616 MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1617 while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 1618 char tmp_str[IF_NAMESIZE + 32]; 1619 struct rte_pci_addr pci_addr; 1620 struct mlx5_switch_info info; 1621 1622 /* Process slave interface names in the loop. */ 1623 snprintf(tmp_str, sizeof(tmp_str), 1624 "/sys/class/net/%s", ifname); 1625 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { 1626 DRV_LOG(WARNING, "can not get PCI address" 1627 " for netdev \"%s\"", ifname); 1628 continue; 1629 } 1630 if (pci_dev->addr.domain != pci_addr.domain || 1631 pci_dev->addr.bus != pci_addr.bus || 1632 pci_dev->addr.devid != pci_addr.devid || 1633 pci_dev->addr.function != pci_addr.function) 1634 continue; 1635 /* Slave interface PCI address match found. */ 1636 fclose(file); 1637 snprintf(tmp_str, sizeof(tmp_str), 1638 "/sys/class/net/%s/phys_port_name", ifname); 1639 file = fopen(tmp_str, "rb"); 1640 if (!file) 1641 break; 1642 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 1643 if (fscanf(file, "%32s", tmp_str) == 1) 1644 mlx5_translate_port_name(tmp_str, &info); 1645 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || 1646 info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1647 pf = info.port_name; 1648 break; 1649 } 1650 if (file) 1651 fclose(file); 1652 return pf; 1653 } 1654 1655 /** 1656 * DPDK callback to register a PCI device. 1657 * 1658 * This function spawns Ethernet devices out of a given PCI device. 1659 * 1660 * @param[in] pci_drv 1661 * PCI driver structure (mlx5_driver). 1662 * @param[in] pci_dev 1663 * PCI device information. 1664 * 1665 * @return 1666 * 0 on success, a negative errno value otherwise and rte_errno is set. 1667 */ 1668 int 1669 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1670 struct rte_pci_device *pci_dev) 1671 { 1672 struct ibv_device **ibv_list; 1673 /* 1674 * Number of found IB Devices matching with requested PCI BDF. 1675 * nd != 1 means there are multiple IB devices over the same 1676 * PCI device and we have representors and master. 1677 */ 1678 unsigned int nd = 0; 1679 /* 1680 * Number of found IB device Ports. nd = 1 and np = 1..n means 1681 * we have the single multiport IB device, and there may be 1682 * representors attached to some of found ports. 1683 */ 1684 unsigned int np = 0; 1685 /* 1686 * Number of DPDK ethernet devices to Spawn - either over 1687 * multiple IB devices or multiple ports of single IB device. 1688 * Actually this is the number of iterations to spawn. 1689 */ 1690 unsigned int ns = 0; 1691 /* 1692 * Bonding device 1693 * < 0 - no bonding device (single one) 1694 * >= 0 - bonding device (value is slave PF index) 1695 */ 1696 int bd = -1; 1697 struct mlx5_dev_spawn_data *list = NULL; 1698 struct mlx5_dev_config dev_config; 1699 unsigned int dev_config_vf; 1700 int ret; 1701 1702 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1703 mlx5_pmd_socket_init(); 1704 ret = mlx5_init_once(); 1705 if (ret) { 1706 DRV_LOG(ERR, "unable to init PMD global data: %s", 1707 strerror(rte_errno)); 1708 return -rte_errno; 1709 } 1710 errno = 0; 1711 ibv_list = mlx5_glue->get_device_list(&ret); 1712 if (!ibv_list) { 1713 rte_errno = errno ? errno : ENOSYS; 1714 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 1715 return -rte_errno; 1716 } 1717 /* 1718 * First scan the list of all Infiniband devices to find 1719 * matching ones, gathering into the list. 1720 */ 1721 struct ibv_device *ibv_match[ret + 1]; 1722 int nl_route = mlx5_nl_init(NETLINK_ROUTE); 1723 int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 1724 unsigned int i; 1725 1726 while (ret-- > 0) { 1727 struct rte_pci_addr pci_addr; 1728 1729 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); 1730 bd = mlx5_device_bond_pci_match 1731 (ibv_list[ret], pci_dev, nl_rdma); 1732 if (bd >= 0) { 1733 /* 1734 * Bonding device detected. Only one match is allowed, 1735 * the bonding is supported over multi-port IB device, 1736 * there should be no matches on representor PCI 1737 * functions or non VF LAG bonding devices with 1738 * specified address. 1739 */ 1740 if (nd) { 1741 DRV_LOG(ERR, 1742 "multiple PCI match on bonding device" 1743 "\"%s\" found", ibv_list[ret]->name); 1744 rte_errno = ENOENT; 1745 ret = -rte_errno; 1746 goto exit; 1747 } 1748 DRV_LOG(INFO, "PCI information matches for" 1749 " slave %d bonding device \"%s\"", 1750 bd, ibv_list[ret]->name); 1751 ibv_match[nd++] = ibv_list[ret]; 1752 break; 1753 } 1754 if (mlx5_dev_to_pci_addr 1755 (ibv_list[ret]->ibdev_path, &pci_addr)) 1756 continue; 1757 if (pci_dev->addr.domain != pci_addr.domain || 1758 pci_dev->addr.bus != pci_addr.bus || 1759 pci_dev->addr.devid != pci_addr.devid || 1760 pci_dev->addr.function != pci_addr.function) 1761 continue; 1762 DRV_LOG(INFO, "PCI information matches for device \"%s\"", 1763 ibv_list[ret]->name); 1764 ibv_match[nd++] = ibv_list[ret]; 1765 } 1766 ibv_match[nd] = NULL; 1767 if (!nd) { 1768 /* No device matches, just complain and bail out. */ 1769 DRV_LOG(WARNING, 1770 "no Verbs device matches PCI device " PCI_PRI_FMT "," 1771 " are kernel drivers loaded?", 1772 pci_dev->addr.domain, pci_dev->addr.bus, 1773 pci_dev->addr.devid, pci_dev->addr.function); 1774 rte_errno = ENOENT; 1775 ret = -rte_errno; 1776 goto exit; 1777 } 1778 if (nd == 1) { 1779 /* 1780 * Found single matching device may have multiple ports. 1781 * Each port may be representor, we have to check the port 1782 * number and check the representors existence. 1783 */ 1784 if (nl_rdma >= 0) 1785 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 1786 if (!np) 1787 DRV_LOG(WARNING, "can not get IB device \"%s\"" 1788 " ports number", ibv_match[0]->name); 1789 if (bd >= 0 && !np) { 1790 DRV_LOG(ERR, "can not get ports" 1791 " for bonding device"); 1792 rte_errno = ENOENT; 1793 ret = -rte_errno; 1794 goto exit; 1795 } 1796 } 1797 #ifndef HAVE_MLX5DV_DR_DEVX_PORT 1798 if (bd >= 0) { 1799 /* 1800 * This may happen if there is VF LAG kernel support and 1801 * application is compiled with older rdma_core library. 1802 */ 1803 DRV_LOG(ERR, 1804 "No kernel/verbs support for VF LAG bonding found."); 1805 rte_errno = ENOTSUP; 1806 ret = -rte_errno; 1807 goto exit; 1808 } 1809 #endif 1810 /* 1811 * Now we can determine the maximal 1812 * amount of devices to be spawned. 1813 */ 1814 list = mlx5_malloc(MLX5_MEM_ZERO, 1815 sizeof(struct mlx5_dev_spawn_data) * 1816 (np ? np : nd), 1817 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1818 if (!list) { 1819 DRV_LOG(ERR, "spawn data array allocation failure"); 1820 rte_errno = ENOMEM; 1821 ret = -rte_errno; 1822 goto exit; 1823 } 1824 if (bd >= 0 || np > 1) { 1825 /* 1826 * Single IB device with multiple ports found, 1827 * it may be E-Switch master device and representors. 1828 * We have to perform identification through the ports. 1829 */ 1830 MLX5_ASSERT(nl_rdma >= 0); 1831 MLX5_ASSERT(ns == 0); 1832 MLX5_ASSERT(nd == 1); 1833 MLX5_ASSERT(np); 1834 for (i = 1; i <= np; ++i) { 1835 list[ns].max_port = np; 1836 list[ns].phys_port = i; 1837 list[ns].phys_dev = ibv_match[0]; 1838 list[ns].eth_dev = NULL; 1839 list[ns].pci_dev = pci_dev; 1840 list[ns].pf_bond = bd; 1841 list[ns].ifindex = mlx5_nl_ifindex 1842 (nl_rdma, 1843 mlx5_os_get_dev_device_name 1844 (list[ns].phys_dev), i); 1845 if (!list[ns].ifindex) { 1846 /* 1847 * No network interface index found for the 1848 * specified port, it means there is no 1849 * representor on this port. It's OK, 1850 * there can be disabled ports, for example 1851 * if sriov_numvfs < sriov_totalvfs. 1852 */ 1853 continue; 1854 } 1855 ret = -1; 1856 if (nl_route >= 0) 1857 ret = mlx5_nl_switch_info 1858 (nl_route, 1859 list[ns].ifindex, 1860 &list[ns].info); 1861 if (ret || (!list[ns].info.representor && 1862 !list[ns].info.master)) { 1863 /* 1864 * We failed to recognize representors with 1865 * Netlink, let's try to perform the task 1866 * with sysfs. 1867 */ 1868 ret = mlx5_sysfs_switch_info 1869 (list[ns].ifindex, 1870 &list[ns].info); 1871 } 1872 if (!ret && bd >= 0) { 1873 switch (list[ns].info.name_type) { 1874 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 1875 if (list[ns].info.port_name == bd) 1876 ns++; 1877 break; 1878 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1879 /* Fallthrough */ 1880 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 1881 if (list[ns].info.pf_num == bd) 1882 ns++; 1883 break; 1884 default: 1885 break; 1886 } 1887 continue; 1888 } 1889 if (!ret && (list[ns].info.representor ^ 1890 list[ns].info.master)) 1891 ns++; 1892 } 1893 if (!ns) { 1894 DRV_LOG(ERR, 1895 "unable to recognize master/representors" 1896 " on the IB device with multiple ports"); 1897 rte_errno = ENOENT; 1898 ret = -rte_errno; 1899 goto exit; 1900 } 1901 } else { 1902 /* 1903 * The existence of several matching entries (nd > 1) means 1904 * port representors have been instantiated. No existing Verbs 1905 * call nor sysfs entries can tell them apart, this can only 1906 * be done through Netlink calls assuming kernel drivers are 1907 * recent enough to support them. 1908 * 1909 * In the event of identification failure through Netlink, 1910 * try again through sysfs, then: 1911 * 1912 * 1. A single IB device matches (nd == 1) with single 1913 * port (np=0/1) and is not a representor, assume 1914 * no switch support. 1915 * 1916 * 2. Otherwise no safe assumptions can be made; 1917 * complain louder and bail out. 1918 */ 1919 for (i = 0; i != nd; ++i) { 1920 memset(&list[ns].info, 0, sizeof(list[ns].info)); 1921 list[ns].max_port = 1; 1922 list[ns].phys_port = 1; 1923 list[ns].phys_dev = ibv_match[i]; 1924 list[ns].eth_dev = NULL; 1925 list[ns].pci_dev = pci_dev; 1926 list[ns].pf_bond = -1; 1927 list[ns].ifindex = 0; 1928 if (nl_rdma >= 0) 1929 list[ns].ifindex = mlx5_nl_ifindex 1930 (nl_rdma, 1931 mlx5_os_get_dev_device_name 1932 (list[ns].phys_dev), 1); 1933 if (!list[ns].ifindex) { 1934 char ifname[IF_NAMESIZE]; 1935 1936 /* 1937 * Netlink failed, it may happen with old 1938 * ib_core kernel driver (before 4.16). 1939 * We can assume there is old driver because 1940 * here we are processing single ports IB 1941 * devices. Let's try sysfs to retrieve 1942 * the ifindex. The method works for 1943 * master device only. 1944 */ 1945 if (nd > 1) { 1946 /* 1947 * Multiple devices found, assume 1948 * representors, can not distinguish 1949 * master/representor and retrieve 1950 * ifindex via sysfs. 1951 */ 1952 continue; 1953 } 1954 ret = mlx5_get_ifname_sysfs 1955 (ibv_match[i]->ibdev_path, ifname); 1956 if (!ret) 1957 list[ns].ifindex = 1958 if_nametoindex(ifname); 1959 if (!list[ns].ifindex) { 1960 /* 1961 * No network interface index found 1962 * for the specified device, it means 1963 * there it is neither representor 1964 * nor master. 1965 */ 1966 continue; 1967 } 1968 } 1969 ret = -1; 1970 if (nl_route >= 0) 1971 ret = mlx5_nl_switch_info 1972 (nl_route, 1973 list[ns].ifindex, 1974 &list[ns].info); 1975 if (ret || (!list[ns].info.representor && 1976 !list[ns].info.master)) { 1977 /* 1978 * We failed to recognize representors with 1979 * Netlink, let's try to perform the task 1980 * with sysfs. 1981 */ 1982 ret = mlx5_sysfs_switch_info 1983 (list[ns].ifindex, 1984 &list[ns].info); 1985 } 1986 if (!ret && (list[ns].info.representor ^ 1987 list[ns].info.master)) { 1988 ns++; 1989 } else if ((nd == 1) && 1990 !list[ns].info.representor && 1991 !list[ns].info.master) { 1992 /* 1993 * Single IB device with 1994 * one physical port and 1995 * attached network device. 1996 * May be SRIOV is not enabled 1997 * or there is no representors. 1998 */ 1999 DRV_LOG(INFO, "no E-Switch support detected"); 2000 ns++; 2001 break; 2002 } 2003 } 2004 if (!ns) { 2005 DRV_LOG(ERR, 2006 "unable to recognize master/representors" 2007 " on the multiple IB devices"); 2008 rte_errno = ENOENT; 2009 ret = -rte_errno; 2010 goto exit; 2011 } 2012 } 2013 MLX5_ASSERT(ns); 2014 /* 2015 * Sort list to probe devices in natural order for users convenience 2016 * (i.e. master first, then representors from lowest to highest ID). 2017 */ 2018 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2019 /* Device specific configuration. */ 2020 switch (pci_dev->id.device_id) { 2021 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 2022 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 2023 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 2024 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 2025 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 2026 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 2027 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF: 2028 dev_config_vf = 1; 2029 break; 2030 default: 2031 dev_config_vf = 0; 2032 break; 2033 } 2034 for (i = 0; i != ns; ++i) { 2035 uint32_t restore; 2036 2037 /* Default configuration. */ 2038 memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); 2039 dev_config.vf = dev_config_vf; 2040 dev_config.mps = MLX5_ARG_UNSET; 2041 dev_config.dbnc = MLX5_ARG_UNSET; 2042 dev_config.rx_vec_en = 1; 2043 dev_config.txq_inline_max = MLX5_ARG_UNSET; 2044 dev_config.txq_inline_min = MLX5_ARG_UNSET; 2045 dev_config.txq_inline_mpw = MLX5_ARG_UNSET; 2046 dev_config.txqs_inline = MLX5_ARG_UNSET; 2047 dev_config.vf_nl_en = 1; 2048 dev_config.mr_ext_memseg_en = 1; 2049 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 2050 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 2051 dev_config.dv_esw_en = 1; 2052 dev_config.dv_flow_en = 1; 2053 dev_config.decap_en = 1; 2054 dev_config.log_hp_size = MLX5_ARG_UNSET; 2055 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, 2056 &list[i], 2057 &dev_config); 2058 if (!list[i].eth_dev) { 2059 if (rte_errno != EBUSY && rte_errno != EEXIST) 2060 break; 2061 /* Device is disabled or already spawned. Ignore it. */ 2062 continue; 2063 } 2064 restore = list[i].eth_dev->data->dev_flags; 2065 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2066 /* Restore non-PCI flags cleared by the above call. */ 2067 list[i].eth_dev->data->dev_flags |= restore; 2068 rte_eth_dev_probing_finish(list[i].eth_dev); 2069 } 2070 if (i != ns) { 2071 DRV_LOG(ERR, 2072 "probe of PCI device " PCI_PRI_FMT " aborted after" 2073 " encountering an error: %s", 2074 pci_dev->addr.domain, pci_dev->addr.bus, 2075 pci_dev->addr.devid, pci_dev->addr.function, 2076 strerror(rte_errno)); 2077 ret = -rte_errno; 2078 /* Roll back. */ 2079 while (i--) { 2080 if (!list[i].eth_dev) 2081 continue; 2082 mlx5_dev_close(list[i].eth_dev); 2083 /* mac_addrs must not be freed because in dev_private */ 2084 list[i].eth_dev->data->mac_addrs = NULL; 2085 claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 2086 } 2087 /* Restore original error. */ 2088 rte_errno = -ret; 2089 } else { 2090 ret = 0; 2091 } 2092 exit: 2093 /* 2094 * Do the routine cleanup: 2095 * - close opened Netlink sockets 2096 * - free allocated spawn data array 2097 * - free the Infiniband device list 2098 */ 2099 if (nl_rdma >= 0) 2100 close(nl_rdma); 2101 if (nl_route >= 0) 2102 close(nl_route); 2103 if (list) 2104 mlx5_free(list); 2105 MLX5_ASSERT(ibv_list); 2106 mlx5_glue->free_device_list(ibv_list); 2107 return ret; 2108 } 2109 2110 static int 2111 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) 2112 { 2113 char *env; 2114 int value; 2115 2116 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2117 /* Get environment variable to store. */ 2118 env = getenv(MLX5_SHUT_UP_BF); 2119 value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; 2120 if (config->dbnc == MLX5_ARG_UNSET) 2121 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); 2122 else 2123 setenv(MLX5_SHUT_UP_BF, 2124 config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); 2125 return value; 2126 } 2127 2128 static void 2129 mlx5_restore_doorbell_mapping_env(int value) 2130 { 2131 MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 2132 /* Restore the original environment variable state. */ 2133 if (value == MLX5_ARG_UNSET) 2134 unsetenv(MLX5_SHUT_UP_BF); 2135 else 2136 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); 2137 } 2138 2139 /** 2140 * Extract pdn of PD object using DV API. 2141 * 2142 * @param[in] pd 2143 * Pointer to the verbs PD object. 2144 * @param[out] pdn 2145 * Pointer to the PD object number variable. 2146 * 2147 * @return 2148 * 0 on success, error value otherwise. 2149 */ 2150 int 2151 mlx5_os_get_pdn(void *pd, uint32_t *pdn) 2152 { 2153 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 2154 struct mlx5dv_obj obj; 2155 struct mlx5dv_pd pd_info; 2156 int ret = 0; 2157 2158 obj.pd.in = pd; 2159 obj.pd.out = &pd_info; 2160 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 2161 if (ret) { 2162 DRV_LOG(DEBUG, "Fail to get PD object info"); 2163 return ret; 2164 } 2165 *pdn = pd_info.pdn; 2166 return 0; 2167 #else 2168 (void)pd; 2169 (void)pdn; 2170 return -ENOTSUP; 2171 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 2172 } 2173 2174 /** 2175 * Function API to open IB device. 2176 * 2177 * This function calls the Linux glue APIs to open a device. 2178 * 2179 * @param[in] spawn 2180 * Pointer to the IB device attributes (name, port, etc). 2181 * @param[out] config 2182 * Pointer to device configuration structure. 2183 * @param[out] sh 2184 * Pointer to shared context structure. 2185 * 2186 * @return 2187 * 0 on success, a positive error value otherwise. 2188 */ 2189 int 2190 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 2191 const struct mlx5_dev_config *config, 2192 struct mlx5_dev_ctx_shared *sh) 2193 { 2194 int dbmap_env; 2195 int err = 0; 2196 2197 sh->numa_node = spawn->pci_dev->device.numa_node; 2198 pthread_mutex_init(&sh->txpp.mutex, NULL); 2199 /* 2200 * Configure environment variable "MLX5_BF_SHUT_UP" 2201 * before the device creation. The rdma_core library 2202 * checks the variable at device creation and 2203 * stores the result internally. 2204 */ 2205 dbmap_env = mlx5_config_doorbell_mapping_env(config); 2206 /* Try to open IB device with DV first, then usual Verbs. */ 2207 errno = 0; 2208 sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); 2209 if (sh->ctx) { 2210 sh->devx = 1; 2211 DRV_LOG(DEBUG, "DevX is supported"); 2212 /* The device is created, no need for environment. */ 2213 mlx5_restore_doorbell_mapping_env(dbmap_env); 2214 } else { 2215 /* The environment variable is still configured. */ 2216 sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 2217 err = errno ? errno : ENODEV; 2218 /* 2219 * The environment variable is not needed anymore, 2220 * all device creation attempts are completed. 2221 */ 2222 mlx5_restore_doorbell_mapping_env(dbmap_env); 2223 if (!sh->ctx) 2224 return err; 2225 DRV_LOG(DEBUG, "DevX is NOT supported"); 2226 err = 0; 2227 } 2228 return err; 2229 } 2230 2231 /** 2232 * Install shared asynchronous device events handler. 2233 * This function is implemented to support event sharing 2234 * between multiple ports of single IB device. 2235 * 2236 * @param sh 2237 * Pointer to mlx5_dev_ctx_shared object. 2238 */ 2239 void 2240 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 2241 { 2242 int ret; 2243 int flags; 2244 2245 sh->intr_handle.fd = -1; 2246 flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); 2247 ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, 2248 F_SETFL, flags | O_NONBLOCK); 2249 if (ret) { 2250 DRV_LOG(INFO, "failed to change file descriptor async event" 2251 " queue"); 2252 } else { 2253 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; 2254 sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 2255 if (rte_intr_callback_register(&sh->intr_handle, 2256 mlx5_dev_interrupt_handler, sh)) { 2257 DRV_LOG(INFO, "Fail to install the shared interrupt."); 2258 sh->intr_handle.fd = -1; 2259 } 2260 } 2261 if (sh->devx) { 2262 #ifdef HAVE_IBV_DEVX_ASYNC 2263 sh->intr_handle_devx.fd = -1; 2264 sh->devx_comp = 2265 (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); 2266 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 2267 if (!devx_comp) { 2268 DRV_LOG(INFO, "failed to allocate devx_comp."); 2269 return; 2270 } 2271 flags = fcntl(devx_comp->fd, F_GETFL); 2272 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 2273 if (ret) { 2274 DRV_LOG(INFO, "failed to change file descriptor" 2275 " devx comp"); 2276 return; 2277 } 2278 sh->intr_handle_devx.fd = devx_comp->fd; 2279 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 2280 if (rte_intr_callback_register(&sh->intr_handle_devx, 2281 mlx5_dev_interrupt_handler_devx, sh)) { 2282 DRV_LOG(INFO, "Fail to install the devx shared" 2283 " interrupt."); 2284 sh->intr_handle_devx.fd = -1; 2285 } 2286 #endif /* HAVE_IBV_DEVX_ASYNC */ 2287 } 2288 } 2289 2290 /** 2291 * Uninstall shared asynchronous device events handler. 2292 * This function is implemented to support event sharing 2293 * between multiple ports of single IB device. 2294 * 2295 * @param dev 2296 * Pointer to mlx5_dev_ctx_shared object. 2297 */ 2298 void 2299 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 2300 { 2301 if (sh->intr_handle.fd >= 0) 2302 mlx5_intr_callback_unregister(&sh->intr_handle, 2303 mlx5_dev_interrupt_handler, sh); 2304 #ifdef HAVE_IBV_DEVX_ASYNC 2305 if (sh->intr_handle_devx.fd >= 0) 2306 rte_intr_callback_unregister(&sh->intr_handle_devx, 2307 mlx5_dev_interrupt_handler_devx, sh); 2308 if (sh->devx_comp) 2309 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 2310 #endif 2311 } 2312 2313 /** 2314 * Read statistics by a named counter. 2315 * 2316 * @param[in] priv 2317 * Pointer to the private device data structure. 2318 * @param[in] ctr_name 2319 * Pointer to the name of the statistic counter to read 2320 * @param[out] stat 2321 * Pointer to read statistic value. 2322 * @return 2323 * 0 on success and stat is valud, 1 if failed to read the value 2324 * rte_errno is set. 2325 * 2326 */ 2327 int 2328 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 2329 uint64_t *stat) 2330 { 2331 int fd; 2332 2333 if (priv->sh) { 2334 MKSTR(path, "%s/ports/%d/hw_counters/%s", 2335 priv->sh->ibdev_path, 2336 priv->dev_port, 2337 ctr_name); 2338 fd = open(path, O_RDONLY); 2339 /* 2340 * in switchdev the file location is not per port 2341 * but rather in <ibdev_path>/hw_counters/<file_name>. 2342 */ 2343 if (fd == -1) { 2344 MKSTR(path1, "%s/hw_counters/%s", 2345 priv->sh->ibdev_path, 2346 ctr_name); 2347 fd = open(path1, O_RDONLY); 2348 } 2349 if (fd != -1) { 2350 char buf[21] = {'\0'}; 2351 ssize_t n = read(fd, buf, sizeof(buf)); 2352 2353 close(fd); 2354 if (n != -1) { 2355 *stat = strtoull(buf, NULL, 10); 2356 return 0; 2357 } 2358 } 2359 } 2360 *stat = 0; 2361 return 1; 2362 } 2363 2364 /** 2365 * Set the reg_mr and dereg_mr call backs 2366 * 2367 * @param reg_mr_cb[out] 2368 * Pointer to reg_mr func 2369 * @param dereg_mr_cb[out] 2370 * Pointer to dereg_mr func 2371 * 2372 */ 2373 void 2374 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 2375 mlx5_dereg_mr_t *dereg_mr_cb) 2376 { 2377 *reg_mr_cb = mlx5_verbs_ops.reg_mr; 2378 *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; 2379 } 2380 2381 /** 2382 * Remove a MAC address from device 2383 * 2384 * @param dev 2385 * Pointer to Ethernet device structure. 2386 * @param index 2387 * MAC address index. 2388 */ 2389 void 2390 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2391 { 2392 struct mlx5_priv *priv = dev->data->dev_private; 2393 const int vf = priv->config.vf; 2394 2395 if (vf) 2396 mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2397 mlx5_ifindex(dev), priv->mac_own, 2398 &dev->data->mac_addrs[index], index); 2399 } 2400 2401 /** 2402 * Adds a MAC address to the device 2403 * 2404 * @param dev 2405 * Pointer to Ethernet device structure. 2406 * @param mac_addr 2407 * MAC address to register. 2408 * @param index 2409 * MAC address index. 2410 * 2411 * @return 2412 * 0 on success, a negative errno value otherwise 2413 */ 2414 int 2415 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2416 uint32_t index) 2417 { 2418 struct mlx5_priv *priv = dev->data->dev_private; 2419 const int vf = priv->config.vf; 2420 int ret = 0; 2421 2422 if (vf) 2423 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2424 mlx5_ifindex(dev), priv->mac_own, 2425 mac, index); 2426 return ret; 2427 } 2428 2429 /** 2430 * Modify a VF MAC address 2431 * 2432 * @param priv 2433 * Pointer to device private data. 2434 * @param mac_addr 2435 * MAC address to modify into. 2436 * @param iface_idx 2437 * Net device interface index 2438 * @param vf_index 2439 * VF index 2440 * 2441 * @return 2442 * 0 on success, a negative errno value otherwise 2443 */ 2444 int 2445 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2446 unsigned int iface_idx, 2447 struct rte_ether_addr *mac_addr, 2448 int vf_index) 2449 { 2450 return mlx5_nl_vf_mac_addr_modify 2451 (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2452 } 2453 2454 /** 2455 * Set device promiscuous mode 2456 * 2457 * @param dev 2458 * Pointer to Ethernet device structure. 2459 * @param enable 2460 * 0 - promiscuous is disabled, otherwise - enabled 2461 * 2462 * @return 2463 * 0 on success, a negative error value otherwise 2464 */ 2465 int 2466 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 2467 { 2468 struct mlx5_priv *priv = dev->data->dev_private; 2469 2470 return mlx5_nl_promisc(priv->nl_socket_route, 2471 mlx5_ifindex(dev), !!enable); 2472 } 2473 2474 /** 2475 * Set device promiscuous mode 2476 * 2477 * @param dev 2478 * Pointer to Ethernet device structure. 2479 * @param enable 2480 * 0 - all multicase is disabled, otherwise - enabled 2481 * 2482 * @return 2483 * 0 on success, a negative error value otherwise 2484 */ 2485 int 2486 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 2487 { 2488 struct mlx5_priv *priv = dev->data->dev_private; 2489 2490 return mlx5_nl_allmulti(priv->nl_socket_route, 2491 mlx5_ifindex(dev), !!enable); 2492 } 2493 2494 /** 2495 * Flush device MAC addresses 2496 * 2497 * @param dev 2498 * Pointer to Ethernet device structure. 2499 * 2500 */ 2501 void 2502 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2503 { 2504 struct mlx5_priv *priv = dev->data->dev_private; 2505 2506 mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2507 dev->data->mac_addrs, 2508 MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2509 } 2510 2511 const struct eth_dev_ops mlx5_os_dev_ops = { 2512 .dev_configure = mlx5_dev_configure, 2513 .dev_start = mlx5_dev_start, 2514 .dev_stop = mlx5_dev_stop, 2515 .dev_set_link_down = mlx5_set_link_down, 2516 .dev_set_link_up = mlx5_set_link_up, 2517 .dev_close = mlx5_dev_close, 2518 .promiscuous_enable = mlx5_promiscuous_enable, 2519 .promiscuous_disable = mlx5_promiscuous_disable, 2520 .allmulticast_enable = mlx5_allmulticast_enable, 2521 .allmulticast_disable = mlx5_allmulticast_disable, 2522 .link_update = mlx5_link_update, 2523 .stats_get = mlx5_stats_get, 2524 .stats_reset = mlx5_stats_reset, 2525 .xstats_get = mlx5_xstats_get, 2526 .xstats_reset = mlx5_xstats_reset, 2527 .xstats_get_names = mlx5_xstats_get_names, 2528 .fw_version_get = mlx5_fw_version_get, 2529 .dev_infos_get = mlx5_dev_infos_get, 2530 .read_clock = mlx5_txpp_read_clock, 2531 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2532 .vlan_filter_set = mlx5_vlan_filter_set, 2533 .rx_queue_setup = mlx5_rx_queue_setup, 2534 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2535 .tx_queue_setup = mlx5_tx_queue_setup, 2536 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2537 .rx_queue_release = mlx5_rx_queue_release, 2538 .tx_queue_release = mlx5_tx_queue_release, 2539 .rx_queue_start = mlx5_rx_queue_start, 2540 .rx_queue_stop = mlx5_rx_queue_stop, 2541 .tx_queue_start = mlx5_tx_queue_start, 2542 .tx_queue_stop = mlx5_tx_queue_stop, 2543 .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2544 .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2545 .mac_addr_remove = mlx5_mac_addr_remove, 2546 .mac_addr_add = mlx5_mac_addr_add, 2547 .mac_addr_set = mlx5_mac_addr_set, 2548 .set_mc_addr_list = mlx5_set_mc_addr_list, 2549 .mtu_set = mlx5_dev_set_mtu, 2550 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2551 .vlan_offload_set = mlx5_vlan_offload_set, 2552 .reta_update = mlx5_dev_rss_reta_update, 2553 .reta_query = mlx5_dev_rss_reta_query, 2554 .rss_hash_update = mlx5_rss_hash_update, 2555 .rss_hash_conf_get = mlx5_rss_hash_conf_get, 2556 .filter_ctrl = mlx5_dev_filter_ctrl, 2557 .rxq_info_get = mlx5_rxq_info_get, 2558 .txq_info_get = mlx5_txq_info_get, 2559 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2560 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2561 .rx_queue_intr_enable = mlx5_rx_intr_enable, 2562 .rx_queue_intr_disable = mlx5_rx_intr_disable, 2563 .is_removed = mlx5_is_removed, 2564 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, 2565 .get_module_info = mlx5_get_module_info, 2566 .get_module_eeprom = mlx5_get_module_eeprom, 2567 .hairpin_cap_get = mlx5_hairpin_cap_get, 2568 .mtr_ops_get = mlx5_flow_meter_ops_get, 2569 }; 2570 2571 /* Available operations from secondary process. */ 2572 const struct eth_dev_ops mlx5_os_dev_sec_ops = { 2573 .stats_get = mlx5_stats_get, 2574 .stats_reset = mlx5_stats_reset, 2575 .xstats_get = mlx5_xstats_get, 2576 .xstats_reset = mlx5_xstats_reset, 2577 .xstats_get_names = mlx5_xstats_get_names, 2578 .fw_version_get = mlx5_fw_version_get, 2579 .dev_infos_get = mlx5_dev_infos_get, 2580 .read_clock = mlx5_txpp_read_clock, 2581 .rx_queue_start = mlx5_rx_queue_start, 2582 .rx_queue_stop = mlx5_rx_queue_stop, 2583 .tx_queue_start = mlx5_tx_queue_start, 2584 .tx_queue_stop = mlx5_tx_queue_stop, 2585 .rxq_info_get = mlx5_rxq_info_get, 2586 .txq_info_get = mlx5_txq_info_get, 2587 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2588 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2589 .get_module_info = mlx5_get_module_info, 2590 .get_module_eeprom = mlx5_get_module_eeprom, 2591 }; 2592 2593 /* Available operations in flow isolated mode. */ 2594 const struct eth_dev_ops mlx5_os_dev_ops_isolate = { 2595 .dev_configure = mlx5_dev_configure, 2596 .dev_start = mlx5_dev_start, 2597 .dev_stop = mlx5_dev_stop, 2598 .dev_set_link_down = mlx5_set_link_down, 2599 .dev_set_link_up = mlx5_set_link_up, 2600 .dev_close = mlx5_dev_close, 2601 .promiscuous_enable = mlx5_promiscuous_enable, 2602 .promiscuous_disable = mlx5_promiscuous_disable, 2603 .allmulticast_enable = mlx5_allmulticast_enable, 2604 .allmulticast_disable = mlx5_allmulticast_disable, 2605 .link_update = mlx5_link_update, 2606 .stats_get = mlx5_stats_get, 2607 .stats_reset = mlx5_stats_reset, 2608 .xstats_get = mlx5_xstats_get, 2609 .xstats_reset = mlx5_xstats_reset, 2610 .xstats_get_names = mlx5_xstats_get_names, 2611 .fw_version_get = mlx5_fw_version_get, 2612 .dev_infos_get = mlx5_dev_infos_get, 2613 .read_clock = mlx5_txpp_read_clock, 2614 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2615 .vlan_filter_set = mlx5_vlan_filter_set, 2616 .rx_queue_setup = mlx5_rx_queue_setup, 2617 .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2618 .tx_queue_setup = mlx5_tx_queue_setup, 2619 .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2620 .rx_queue_release = mlx5_rx_queue_release, 2621 .tx_queue_release = mlx5_tx_queue_release, 2622 .rx_queue_start = mlx5_rx_queue_start, 2623 .rx_queue_stop = mlx5_rx_queue_stop, 2624 .tx_queue_start = mlx5_tx_queue_start, 2625 .tx_queue_stop = mlx5_tx_queue_stop, 2626 .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2627 .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2628 .mac_addr_remove = mlx5_mac_addr_remove, 2629 .mac_addr_add = mlx5_mac_addr_add, 2630 .mac_addr_set = mlx5_mac_addr_set, 2631 .set_mc_addr_list = mlx5_set_mc_addr_list, 2632 .mtu_set = mlx5_dev_set_mtu, 2633 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2634 .vlan_offload_set = mlx5_vlan_offload_set, 2635 .filter_ctrl = mlx5_dev_filter_ctrl, 2636 .rxq_info_get = mlx5_rxq_info_get, 2637 .txq_info_get = mlx5_txq_info_get, 2638 .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2639 .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2640 .rx_queue_intr_enable = mlx5_rx_intr_enable, 2641 .rx_queue_intr_disable = mlx5_rx_intr_disable, 2642 .is_removed = mlx5_is_removed, 2643 .get_module_info = mlx5_get_module_info, 2644 .get_module_eeprom = mlx5_get_module_eeprom, 2645 .hairpin_cap_get = mlx5_hairpin_cap_get, 2646 .mtr_ops_get = mlx5_flow_meter_ops_get, 2647 }; 2648