xref: /dpdk/drivers/net/mlx5/linux/mlx5_os.c (revision f3020a331dcac0fba2423f34d53fa6cce1e1f4ea)
1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause
2f44b09f9SOphir Munk  * Copyright 2015 6WIND S.A.
3f44b09f9SOphir Munk  * Copyright 2020 Mellanox Technologies, Ltd
4f44b09f9SOphir Munk  */
5f44b09f9SOphir Munk 
6f44b09f9SOphir Munk #include <stddef.h>
7f44b09f9SOphir Munk #include <unistd.h>
8f44b09f9SOphir Munk #include <string.h>
9f44b09f9SOphir Munk #include <stdint.h>
10f44b09f9SOphir Munk #include <stdlib.h>
11f44b09f9SOphir Munk #include <errno.h>
12f44b09f9SOphir Munk #include <net/if.h>
13f44b09f9SOphir Munk #include <linux/rtnetlink.h>
1473bf9235SOphir Munk #include <linux/sockios.h>
1573bf9235SOphir Munk #include <linux/ethtool.h>
16f44b09f9SOphir Munk #include <fcntl.h>
17f44b09f9SOphir Munk 
18f44b09f9SOphir Munk #include <rte_malloc.h>
19df96fd0dSBruce Richardson #include <ethdev_driver.h>
20df96fd0dSBruce Richardson #include <ethdev_pci.h>
21f44b09f9SOphir Munk #include <rte_pci.h>
22f44b09f9SOphir Munk #include <rte_bus_pci.h>
23f44b09f9SOphir Munk #include <rte_common.h>
24f44b09f9SOphir Munk #include <rte_kvargs.h>
25f44b09f9SOphir Munk #include <rte_rwlock.h>
26f44b09f9SOphir Munk #include <rte_spinlock.h>
27f44b09f9SOphir Munk #include <rte_string_fns.h>
28f44b09f9SOphir Munk #include <rte_alarm.h>
292aba9fc7SOphir Munk #include <rte_eal_paging.h>
30f44b09f9SOphir Munk 
31f44b09f9SOphir Munk #include <mlx5_glue.h>
32f44b09f9SOphir Munk #include <mlx5_devx_cmds.h>
33f44b09f9SOphir Munk #include <mlx5_common.h>
342eb4d010SOphir Munk #include <mlx5_common_mp.h>
35d5ed8aa9SOphir Munk #include <mlx5_common_mr.h>
365522da6bSSuanming Mou #include <mlx5_malloc.h>
37f44b09f9SOphir Munk 
38f44b09f9SOphir Munk #include "mlx5_defs.h"
39f44b09f9SOphir Munk #include "mlx5.h"
40391b8bccSOphir Munk #include "mlx5_common_os.h"
41f44b09f9SOphir Munk #include "mlx5_utils.h"
42f44b09f9SOphir Munk #include "mlx5_rxtx.h"
43151cbe3aSMichael Baum #include "mlx5_rx.h"
44377b69fbSMichael Baum #include "mlx5_tx.h"
45f44b09f9SOphir Munk #include "mlx5_autoconf.h"
46f44b09f9SOphir Munk #include "mlx5_mr.h"
47f44b09f9SOphir Munk #include "mlx5_flow.h"
48f44b09f9SOphir Munk #include "rte_pmd_mlx5.h"
494f96d913SOphir Munk #include "mlx5_verbs.h"
50f00f6562SOphir Munk #include "mlx5_nl.h"
516deb19e1SMichael Baum #include "mlx5_devx.h"
52f44b09f9SOphir Munk 
532eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW
542eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
552eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
562eb4d010SOphir Munk #endif
572eb4d010SOphir Munk 
582eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
592eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
602eb4d010SOphir Munk #endif
612eb4d010SOphir Munk 
622e86c4e5SOphir Munk static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
632e86c4e5SOphir Munk 
642e86c4e5SOphir Munk /* Spinlock for mlx5_shared_data allocation. */
652e86c4e5SOphir Munk static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
662e86c4e5SOphir Munk 
672e86c4e5SOphir Munk /* Process local data for secondary processes. */
682e86c4e5SOphir Munk static struct mlx5_local_data mlx5_local_data;
692e86c4e5SOphir Munk 
70b4edeaf3SSuanming Mou /* rte flow indexed pool configuration. */
71b4edeaf3SSuanming Mou static struct mlx5_indexed_pool_config icfg[] = {
72b4edeaf3SSuanming Mou 	{
73b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
74b4edeaf3SSuanming Mou 		.trunk_size = 64,
75b4edeaf3SSuanming Mou 		.need_lock = 1,
76b4edeaf3SSuanming Mou 		.release_mem_en = 0,
77b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
78b4edeaf3SSuanming Mou 		.free = mlx5_free,
79b4edeaf3SSuanming Mou 		.per_core_cache = 0,
80b4edeaf3SSuanming Mou 		.type = "ctl_flow_ipool",
81b4edeaf3SSuanming Mou 	},
82b4edeaf3SSuanming Mou 	{
83b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
84b4edeaf3SSuanming Mou 		.trunk_size = 64,
85b4edeaf3SSuanming Mou 		.grow_trunk = 3,
86b4edeaf3SSuanming Mou 		.grow_shift = 2,
87b4edeaf3SSuanming Mou 		.need_lock = 1,
88b4edeaf3SSuanming Mou 		.release_mem_en = 0,
89b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
90b4edeaf3SSuanming Mou 		.free = mlx5_free,
91b4edeaf3SSuanming Mou 		.per_core_cache = 1 << 14,
92b4edeaf3SSuanming Mou 		.type = "rte_flow_ipool",
93b4edeaf3SSuanming Mou 	},
94b4edeaf3SSuanming Mou 	{
95b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
96b4edeaf3SSuanming Mou 		.trunk_size = 64,
97b4edeaf3SSuanming Mou 		.grow_trunk = 3,
98b4edeaf3SSuanming Mou 		.grow_shift = 2,
99b4edeaf3SSuanming Mou 		.need_lock = 1,
100b4edeaf3SSuanming Mou 		.release_mem_en = 0,
101b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
102b4edeaf3SSuanming Mou 		.free = mlx5_free,
103b4edeaf3SSuanming Mou 		.per_core_cache = 0,
104b4edeaf3SSuanming Mou 		.type = "mcp_flow_ipool",
105b4edeaf3SSuanming Mou 	},
106b4edeaf3SSuanming Mou };
107b4edeaf3SSuanming Mou 
108f44b09f9SOphir Munk /**
10908d1838fSDekel Peled  * Set the completion channel file descriptor interrupt as non-blocking.
11008d1838fSDekel Peled  *
11108d1838fSDekel Peled  * @param[in] rxq_obj
11208d1838fSDekel Peled  *   Pointer to RQ channel object, which includes the channel fd
11308d1838fSDekel Peled  *
11408d1838fSDekel Peled  * @param[out] fd
11508d1838fSDekel Peled  *   The file descriptor (representing the intetrrupt) used in this channel.
11608d1838fSDekel Peled  *
11708d1838fSDekel Peled  * @return
11808d1838fSDekel Peled  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
11908d1838fSDekel Peled  */
12008d1838fSDekel Peled int
12108d1838fSDekel Peled mlx5_os_set_nonblock_channel_fd(int fd)
12208d1838fSDekel Peled {
12308d1838fSDekel Peled 	int flags;
12408d1838fSDekel Peled 
12508d1838fSDekel Peled 	flags = fcntl(fd, F_GETFL);
12608d1838fSDekel Peled 	return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
12708d1838fSDekel Peled }
12808d1838fSDekel Peled 
12908d1838fSDekel Peled /**
130e85f623eSOphir Munk  * Get mlx5 device attributes. The glue function query_device_ex() is called
131e85f623eSOphir Munk  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
132e85f623eSOphir Munk  * device attributes from the glue out parameter.
133e85f623eSOphir Munk  *
134e85f623eSOphir Munk  * @param dev
135e85f623eSOphir Munk  *   Pointer to ibv context.
136e85f623eSOphir Munk  *
137e85f623eSOphir Munk  * @param device_attr
138e85f623eSOphir Munk  *   Pointer to mlx5 device attributes.
139e85f623eSOphir Munk  *
140e85f623eSOphir Munk  * @return
141e85f623eSOphir Munk  *   0 on success, non zero error number otherwise
142e85f623eSOphir Munk  */
143e85f623eSOphir Munk int
144e85f623eSOphir Munk mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
145e85f623eSOphir Munk {
146e85f623eSOphir Munk 	int err;
147e85f623eSOphir Munk 	struct ibv_device_attr_ex attr_ex;
148e85f623eSOphir Munk 	memset(device_attr, 0, sizeof(*device_attr));
149e85f623eSOphir Munk 	err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
150e85f623eSOphir Munk 	if (err)
151e85f623eSOphir Munk 		return err;
152e85f623eSOphir Munk 
153e85f623eSOphir Munk 	device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
154e85f623eSOphir Munk 	device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
155e85f623eSOphir Munk 	device_attr->max_sge = attr_ex.orig_attr.max_sge;
156e85f623eSOphir Munk 	device_attr->max_cq = attr_ex.orig_attr.max_cq;
1571f29d15eSOphir Munk 	device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
1581f29d15eSOphir Munk 	device_attr->max_mr = attr_ex.orig_attr.max_mr;
1591f29d15eSOphir Munk 	device_attr->max_pd = attr_ex.orig_attr.max_pd;
160e85f623eSOphir Munk 	device_attr->max_qp = attr_ex.orig_attr.max_qp;
1611f29d15eSOphir Munk 	device_attr->max_srq = attr_ex.orig_attr.max_srq;
1621f29d15eSOphir Munk 	device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
163e85f623eSOphir Munk 	device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
164e85f623eSOphir Munk 	device_attr->max_rwq_indirection_table_size =
165e85f623eSOphir Munk 		attr_ex.rss_caps.max_rwq_indirection_table_size;
166e85f623eSOphir Munk 	device_attr->max_tso = attr_ex.tso_caps.max_tso;
167e85f623eSOphir Munk 	device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
168e85f623eSOphir Munk 
169e85f623eSOphir Munk 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
170e85f623eSOphir Munk 	err = mlx5_glue->dv_query_device(ctx, &dv_attr);
171e85f623eSOphir Munk 	if (err)
172e85f623eSOphir Munk 		return err;
173e85f623eSOphir Munk 
174e85f623eSOphir Munk 	device_attr->flags = dv_attr.flags;
175e85f623eSOphir Munk 	device_attr->comp_mask = dv_attr.comp_mask;
176e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
177e85f623eSOphir Munk 	device_attr->sw_parsing_offloads =
178e85f623eSOphir Munk 		dv_attr.sw_parsing_caps.sw_parsing_offloads;
179e85f623eSOphir Munk #endif
180e85f623eSOphir Munk 	device_attr->min_single_stride_log_num_of_bytes =
181e85f623eSOphir Munk 		dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
182e85f623eSOphir Munk 	device_attr->max_single_stride_log_num_of_bytes =
183e85f623eSOphir Munk 		dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
184e85f623eSOphir Munk 	device_attr->min_single_wqe_log_num_of_strides =
185e85f623eSOphir Munk 		dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
186e85f623eSOphir Munk 	device_attr->max_single_wqe_log_num_of_strides =
187e85f623eSOphir Munk 		dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
188e85f623eSOphir Munk 	device_attr->stride_supported_qpts =
189e85f623eSOphir Munk 		dv_attr.striding_rq_caps.supported_qpts;
190e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
191e85f623eSOphir Munk 	device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
192e85f623eSOphir Munk #endif
193520e3f48SKamil Vojanec 	strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
194520e3f48SKamil Vojanec 		sizeof(device_attr->fw_ver));
195e85f623eSOphir Munk 
196e85f623eSOphir Munk 	return err;
197e85f623eSOphir Munk }
1982eb4d010SOphir Munk 
1992eb4d010SOphir Munk /**
2002eb4d010SOphir Munk  * Verbs callback to allocate a memory. This function should allocate the space
2012eb4d010SOphir Munk  * according to the size provided residing inside a huge page.
2022eb4d010SOphir Munk  * Please note that all allocation must respect the alignment from libmlx5
2032aba9fc7SOphir Munk  * (i.e. currently rte_mem_page_size()).
2042eb4d010SOphir Munk  *
2052eb4d010SOphir Munk  * @param[in] size
2062eb4d010SOphir Munk  *   The size in bytes of the memory to allocate.
2072eb4d010SOphir Munk  * @param[in] data
2082eb4d010SOphir Munk  *   A pointer to the callback data.
2092eb4d010SOphir Munk  *
2102eb4d010SOphir Munk  * @return
2112eb4d010SOphir Munk  *   Allocated buffer, NULL otherwise and rte_errno is set.
2122eb4d010SOphir Munk  */
2132eb4d010SOphir Munk static void *
2142eb4d010SOphir Munk mlx5_alloc_verbs_buf(size_t size, void *data)
2152eb4d010SOphir Munk {
21681c3b977SViacheslav Ovsiienko 	struct mlx5_dev_ctx_shared *sh = data;
2172eb4d010SOphir Munk 	void *ret;
2182aba9fc7SOphir Munk 	size_t alignment = rte_mem_page_size();
2192aba9fc7SOphir Munk 	if (alignment == (size_t)-1) {
2202aba9fc7SOphir Munk 		DRV_LOG(ERR, "Failed to get mem page size");
2212aba9fc7SOphir Munk 		rte_errno = ENOMEM;
2222aba9fc7SOphir Munk 		return NULL;
2232aba9fc7SOphir Munk 	}
2242eb4d010SOphir Munk 
2252eb4d010SOphir Munk 	MLX5_ASSERT(data != NULL);
22681c3b977SViacheslav Ovsiienko 	ret = mlx5_malloc(0, size, alignment, sh->numa_node);
2272eb4d010SOphir Munk 	if (!ret && size)
2282eb4d010SOphir Munk 		rte_errno = ENOMEM;
2292eb4d010SOphir Munk 	return ret;
2302eb4d010SOphir Munk }
2312eb4d010SOphir Munk 
2322eb4d010SOphir Munk /**
233630a587bSRongwei Liu  * Detect misc5 support or not
234630a587bSRongwei Liu  *
235630a587bSRongwei Liu  * @param[in] priv
236630a587bSRongwei Liu  *   Device private data pointer
237630a587bSRongwei Liu  */
238630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR
239630a587bSRongwei Liu static void
240630a587bSRongwei Liu __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
241630a587bSRongwei Liu {
242630a587bSRongwei Liu #ifdef HAVE_IBV_FLOW_DV_SUPPORT
243630a587bSRongwei Liu 	/* Dummy VxLAN matcher to detect rdma-core misc5 cap
244630a587bSRongwei Liu 	 * Case: IPv4--->UDP--->VxLAN--->vni
245630a587bSRongwei Liu 	 */
246630a587bSRongwei Liu 	void *tbl;
247630a587bSRongwei Liu 	struct mlx5_flow_dv_match_params matcher_mask;
248630a587bSRongwei Liu 	void *match_m;
249630a587bSRongwei Liu 	void *matcher;
250630a587bSRongwei Liu 	void *headers_m;
251630a587bSRongwei Liu 	void *misc5_m;
252630a587bSRongwei Liu 	uint32_t *tunnel_header_m;
253630a587bSRongwei Liu 	struct mlx5dv_flow_matcher_attr dv_attr;
254630a587bSRongwei Liu 
255630a587bSRongwei Liu 	memset(&matcher_mask, 0, sizeof(matcher_mask));
256630a587bSRongwei Liu 	matcher_mask.size = sizeof(matcher_mask.buf);
257630a587bSRongwei Liu 	match_m = matcher_mask.buf;
258630a587bSRongwei Liu 	headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
259630a587bSRongwei Liu 	misc5_m = MLX5_ADDR_OF(fte_match_param,
260630a587bSRongwei Liu 			       match_m, misc_parameters_5);
261630a587bSRongwei Liu 	tunnel_header_m = (uint32_t *)
262630a587bSRongwei Liu 				MLX5_ADDR_OF(fte_match_set_misc5,
263630a587bSRongwei Liu 				misc5_m, tunnel_header_1);
264630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
265630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
266630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
267630a587bSRongwei Liu 	*tunnel_header_m = 0xffffff;
268630a587bSRongwei Liu 
269630a587bSRongwei Liu 	tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
270630a587bSRongwei Liu 	if (!tbl) {
271630a587bSRongwei Liu 		DRV_LOG(INFO, "No SW steering support");
272630a587bSRongwei Liu 		return;
273630a587bSRongwei Liu 	}
274630a587bSRongwei Liu 	dv_attr.type = IBV_FLOW_ATTR_NORMAL,
275630a587bSRongwei Liu 	dv_attr.match_mask = (void *)&matcher_mask,
276630a587bSRongwei Liu 	dv_attr.match_criteria_enable =
277630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
278630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
279630a587bSRongwei Liu 	dv_attr.priority = 3;
280630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR_ESWITCH
281630a587bSRongwei Liu 	void *misc2_m;
282630a587bSRongwei Liu 	if (priv->config.dv_esw_en) {
283630a587bSRongwei Liu 		/* FDB enabled reg_c_0 */
284630a587bSRongwei Liu 		dv_attr.match_criteria_enable |=
285630a587bSRongwei Liu 				(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
286630a587bSRongwei Liu 		misc2_m = MLX5_ADDR_OF(fte_match_param,
287630a587bSRongwei Liu 				       match_m, misc_parameters_2);
288630a587bSRongwei Liu 		MLX5_SET(fte_match_set_misc2, misc2_m,
289630a587bSRongwei Liu 			 metadata_reg_c_0, 0xffff);
290630a587bSRongwei Liu 	}
291630a587bSRongwei Liu #endif
292630a587bSRongwei Liu 	matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->ctx,
293630a587bSRongwei Liu 						    &dv_attr, tbl);
294630a587bSRongwei Liu 	if (matcher) {
295630a587bSRongwei Liu 		priv->sh->misc5_cap = 1;
296630a587bSRongwei Liu 		mlx5_glue->dv_destroy_flow_matcher(matcher);
297630a587bSRongwei Liu 	}
298630a587bSRongwei Liu 	mlx5_glue->dr_destroy_flow_tbl(tbl);
299630a587bSRongwei Liu #else
300630a587bSRongwei Liu 	RTE_SET_USED(priv);
301630a587bSRongwei Liu #endif
302630a587bSRongwei Liu }
303630a587bSRongwei Liu #endif
304630a587bSRongwei Liu 
305630a587bSRongwei Liu /**
3062eb4d010SOphir Munk  * Verbs callback to free a memory.
3072eb4d010SOphir Munk  *
3082eb4d010SOphir Munk  * @param[in] ptr
3092eb4d010SOphir Munk  *   A pointer to the memory to free.
3102eb4d010SOphir Munk  * @param[in] data
3112eb4d010SOphir Munk  *   A pointer to the callback data.
3122eb4d010SOphir Munk  */
3132eb4d010SOphir Munk static void
3142eb4d010SOphir Munk mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
3152eb4d010SOphir Munk {
3162eb4d010SOphir Munk 	MLX5_ASSERT(data != NULL);
3172175c4dcSSuanming Mou 	mlx5_free(ptr);
3182eb4d010SOphir Munk }
3192eb4d010SOphir Munk 
3202eb4d010SOphir Munk /**
3212eb4d010SOphir Munk  * Initialize DR related data within private structure.
3222eb4d010SOphir Munk  * Routine checks the reference counter and does actual
3232eb4d010SOphir Munk  * resources creation/initialization only if counter is zero.
3242eb4d010SOphir Munk  *
3252eb4d010SOphir Munk  * @param[in] priv
3262eb4d010SOphir Munk  *   Pointer to the private device data structure.
3272eb4d010SOphir Munk  *
3282eb4d010SOphir Munk  * @return
3292eb4d010SOphir Munk  *   Zero on success, positive error code otherwise.
3302eb4d010SOphir Munk  */
3312eb4d010SOphir Munk static int
3322eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv)
3332eb4d010SOphir Munk {
3342eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = priv->sh;
335961b6774SMatan Azrad 	char s[MLX5_NAME_SIZE] __rte_unused;
33616dbba25SXueming Li 	int err;
3372eb4d010SOphir Munk 
33816dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
33916dbba25SXueming Li 	if (sh->refcnt > 1)
34016dbba25SXueming Li 		return 0;
3412eb4d010SOphir Munk 	err = mlx5_alloc_table_hash_list(priv);
3422eb4d010SOphir Munk 	if (err)
343291140c6SSuanming Mou 		goto error;
344291140c6SSuanming Mou 	/* The resources below are only valid with DV support. */
345291140c6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT
346491b7137SMatan Azrad 	/* Init port id action list. */
347e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
348d03b7860SSuanming Mou 	sh->port_id_action_list = mlx5_list_create(s, sh, true,
3490fd5f82aSXueming Li 						   flow_dv_port_id_create_cb,
3500fd5f82aSXueming Li 						   flow_dv_port_id_match_cb,
351491b7137SMatan Azrad 						   flow_dv_port_id_remove_cb,
352491b7137SMatan Azrad 						   flow_dv_port_id_clone_cb,
353491b7137SMatan Azrad 						 flow_dv_port_id_clone_free_cb);
354679f46c7SMatan Azrad 	if (!sh->port_id_action_list)
355679f46c7SMatan Azrad 		goto error;
356491b7137SMatan Azrad 	/* Init push vlan action list. */
357e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
358d03b7860SSuanming Mou 	sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
3593422af2aSXueming Li 						    flow_dv_push_vlan_create_cb,
3603422af2aSXueming Li 						    flow_dv_push_vlan_match_cb,
361491b7137SMatan Azrad 						    flow_dv_push_vlan_remove_cb,
362491b7137SMatan Azrad 						    flow_dv_push_vlan_clone_cb,
363491b7137SMatan Azrad 					       flow_dv_push_vlan_clone_free_cb);
364679f46c7SMatan Azrad 	if (!sh->push_vlan_action_list)
365679f46c7SMatan Azrad 		goto error;
366491b7137SMatan Azrad 	/* Init sample action list. */
367e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
368d03b7860SSuanming Mou 	sh->sample_action_list = mlx5_list_create(s, sh, true,
36919784141SSuanming Mou 						  flow_dv_sample_create_cb,
37019784141SSuanming Mou 						  flow_dv_sample_match_cb,
371491b7137SMatan Azrad 						  flow_dv_sample_remove_cb,
372491b7137SMatan Azrad 						  flow_dv_sample_clone_cb,
373491b7137SMatan Azrad 						  flow_dv_sample_clone_free_cb);
374679f46c7SMatan Azrad 	if (!sh->sample_action_list)
375679f46c7SMatan Azrad 		goto error;
376491b7137SMatan Azrad 	/* Init dest array action list. */
377e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
378d03b7860SSuanming Mou 	sh->dest_array_list = mlx5_list_create(s, sh, true,
37919784141SSuanming Mou 					       flow_dv_dest_array_create_cb,
38019784141SSuanming Mou 					       flow_dv_dest_array_match_cb,
381491b7137SMatan Azrad 					       flow_dv_dest_array_remove_cb,
382491b7137SMatan Azrad 					       flow_dv_dest_array_clone_cb,
383491b7137SMatan Azrad 					      flow_dv_dest_array_clone_free_cb);
384679f46c7SMatan Azrad 	if (!sh->dest_array_list)
385679f46c7SMatan Azrad 		goto error;
386291140c6SSuanming Mou #endif
3872eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
3882eb4d010SOphir Munk 	void *domain;
3892eb4d010SOphir Munk 
3902eb4d010SOphir Munk 	/* Reference counter is zero, we should initialize structures. */
3912eb4d010SOphir Munk 	domain = mlx5_glue->dr_create_domain(sh->ctx,
3922eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
3932eb4d010SOphir Munk 	if (!domain) {
3942eb4d010SOphir Munk 		DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
3952eb4d010SOphir Munk 		err = errno;
3962eb4d010SOphir Munk 		goto error;
3972eb4d010SOphir Munk 	}
3982eb4d010SOphir Munk 	sh->rx_domain = domain;
3992eb4d010SOphir Munk 	domain = mlx5_glue->dr_create_domain(sh->ctx,
4002eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
4012eb4d010SOphir Munk 	if (!domain) {
4022eb4d010SOphir Munk 		DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
4032eb4d010SOphir Munk 		err = errno;
4042eb4d010SOphir Munk 		goto error;
4052eb4d010SOphir Munk 	}
4062eb4d010SOphir Munk 	sh->tx_domain = domain;
4072eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
4082eb4d010SOphir Munk 	if (priv->config.dv_esw_en) {
4092eb4d010SOphir Munk 		domain  = mlx5_glue->dr_create_domain
4102eb4d010SOphir Munk 			(sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
4112eb4d010SOphir Munk 		if (!domain) {
4122eb4d010SOphir Munk 			DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
4132eb4d010SOphir Munk 			err = errno;
4142eb4d010SOphir Munk 			goto error;
4152eb4d010SOphir Munk 		}
4162eb4d010SOphir Munk 		sh->fdb_domain = domain;
417da845ae9SViacheslav Ovsiienko 	}
418da845ae9SViacheslav Ovsiienko 	/*
419da845ae9SViacheslav Ovsiienko 	 * The drop action is just some dummy placeholder in rdma-core. It
420da845ae9SViacheslav Ovsiienko 	 * does not belong to domains and has no any attributes, and, can be
421da845ae9SViacheslav Ovsiienko 	 * shared by the entire device.
422da845ae9SViacheslav Ovsiienko 	 */
423da845ae9SViacheslav Ovsiienko 	sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
424da845ae9SViacheslav Ovsiienko 	if (!sh->dr_drop_action) {
425da845ae9SViacheslav Ovsiienko 		DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
426da845ae9SViacheslav Ovsiienko 		err = errno;
427da845ae9SViacheslav Ovsiienko 		goto error;
4282eb4d010SOphir Munk 	}
4292eb4d010SOphir Munk #endif
430*f3020a33SSuanming Mou 	if (!sh->tunnel_hub && priv->config.dv_miss_info)
4314ec6360dSGregory Etelson 		err = mlx5_alloc_tunnel_hub(sh);
4324ec6360dSGregory Etelson 	if (err) {
4334ec6360dSGregory Etelson 		DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
4344ec6360dSGregory Etelson 		goto error;
4354ec6360dSGregory Etelson 	}
4362eb4d010SOphir Munk 	if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
4372eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
4382eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
4392eb4d010SOphir Munk 		if (sh->fdb_domain)
4402eb4d010SOphir Munk 			mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
4412eb4d010SOphir Munk 	}
4422eb4d010SOphir Munk 	sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
443e39226bdSJiawei Wang 	if (!priv->config.allow_duplicate_pattern) {
444e39226bdSJiawei Wang #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
445e39226bdSJiawei Wang 		DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
446e39226bdSJiawei Wang #endif
447e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
448e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
449e39226bdSJiawei Wang 		if (sh->fdb_domain)
450e39226bdSJiawei Wang 			mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
451e39226bdSJiawei Wang 	}
452630a587bSRongwei Liu 
453630a587bSRongwei Liu 	__mlx5_discovery_misc5_cap(priv);
4542eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
455b80726dcSSuanming Mou 	sh->default_miss_action =
456b80726dcSSuanming Mou 			mlx5_glue->dr_create_flow_action_default_miss();
457b80726dcSSuanming Mou 	if (!sh->default_miss_action)
458b80726dcSSuanming Mou 		DRV_LOG(WARNING, "Default miss action is not supported.");
4592eb4d010SOphir Munk 	return 0;
4602eb4d010SOphir Munk error:
4612eb4d010SOphir Munk 	/* Rollback the created objects. */
4622eb4d010SOphir Munk 	if (sh->rx_domain) {
4632eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
4642eb4d010SOphir Munk 		sh->rx_domain = NULL;
4652eb4d010SOphir Munk 	}
4662eb4d010SOphir Munk 	if (sh->tx_domain) {
4672eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
4682eb4d010SOphir Munk 		sh->tx_domain = NULL;
4692eb4d010SOphir Munk 	}
4702eb4d010SOphir Munk 	if (sh->fdb_domain) {
4712eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
4722eb4d010SOphir Munk 		sh->fdb_domain = NULL;
4732eb4d010SOphir Munk 	}
474da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
475da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
476da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
4772eb4d010SOphir Munk 	}
4782eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
4792eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
4802eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
4812eb4d010SOphir Munk 	}
482bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
483e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
484bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
485bf615b07SSuanming Mou 	}
4863fe88961SSuanming Mou 	if (sh->modify_cmds) {
487e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
4883fe88961SSuanming Mou 		sh->modify_cmds = NULL;
4893fe88961SSuanming Mou 	}
4902eb4d010SOphir Munk 	if (sh->tag_table) {
4912eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
492e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
4932eb4d010SOphir Munk 		sh->tag_table = NULL;
4942eb4d010SOphir Munk 	}
4954ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
4964ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
4974ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
4984ec6360dSGregory Etelson 	}
4992eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
500679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
501679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
502679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
503679f46c7SMatan Azrad 	}
504679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
505679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
506679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
507679f46c7SMatan Azrad 	}
508679f46c7SMatan Azrad 	if (sh->sample_action_list) {
509679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
510679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
511679f46c7SMatan Azrad 	}
512679f46c7SMatan Azrad 	if (sh->dest_array_list) {
513679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
514679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
515679f46c7SMatan Azrad 	}
5162eb4d010SOphir Munk 	return err;
5172eb4d010SOphir Munk }
5182eb4d010SOphir Munk 
5192eb4d010SOphir Munk /**
5202eb4d010SOphir Munk  * Destroy DR related data within private structure.
5212eb4d010SOphir Munk  *
5222eb4d010SOphir Munk  * @param[in] priv
5232eb4d010SOphir Munk  *   Pointer to the private device data structure.
5242eb4d010SOphir Munk  */
5252eb4d010SOphir Munk void
5262eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv)
5272eb4d010SOphir Munk {
52816dbba25SXueming Li 	struct mlx5_dev_ctx_shared *sh = priv->sh;
5292eb4d010SOphir Munk 
53016dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
53116dbba25SXueming Li 	if (sh->refcnt > 1)
5322eb4d010SOphir Munk 		return;
5332eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
5342eb4d010SOphir Munk 	if (sh->rx_domain) {
5352eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
5362eb4d010SOphir Munk 		sh->rx_domain = NULL;
5372eb4d010SOphir Munk 	}
5382eb4d010SOphir Munk 	if (sh->tx_domain) {
5392eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
5402eb4d010SOphir Munk 		sh->tx_domain = NULL;
5412eb4d010SOphir Munk 	}
5422eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
5432eb4d010SOphir Munk 	if (sh->fdb_domain) {
5442eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
5452eb4d010SOphir Munk 		sh->fdb_domain = NULL;
5462eb4d010SOphir Munk 	}
547da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
548da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
549da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
5502eb4d010SOphir Munk 	}
5512eb4d010SOphir Munk #endif
5522eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
5532eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
5542eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
5552eb4d010SOphir Munk 	}
5562eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
557b80726dcSSuanming Mou 	if (sh->default_miss_action)
558b80726dcSSuanming Mou 		mlx5_glue->destroy_flow_action
559b80726dcSSuanming Mou 				(sh->default_miss_action);
560bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
561e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
562bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
563bf615b07SSuanming Mou 	}
5643fe88961SSuanming Mou 	if (sh->modify_cmds) {
565e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
5663fe88961SSuanming Mou 		sh->modify_cmds = NULL;
5673fe88961SSuanming Mou 	}
5682eb4d010SOphir Munk 	if (sh->tag_table) {
5692eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
570e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
5712eb4d010SOphir Munk 		sh->tag_table = NULL;
5722eb4d010SOphir Munk 	}
5734ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
5744ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
5754ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
5764ec6360dSGregory Etelson 	}
5772eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
578679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
579679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
580679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
581679f46c7SMatan Azrad 	}
582679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
583679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
584679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
585679f46c7SMatan Azrad 	}
586679f46c7SMatan Azrad 	if (sh->sample_action_list) {
587679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
588679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
589679f46c7SMatan Azrad 	}
590679f46c7SMatan Azrad 	if (sh->dest_array_list) {
591679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
592679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
593679f46c7SMatan Azrad 	}
5942eb4d010SOphir Munk }
5952eb4d010SOphir Munk 
5962eb4d010SOphir Munk /**
5972e86c4e5SOphir Munk  * Initialize shared data between primary and secondary process.
5982e86c4e5SOphir Munk  *
5992e86c4e5SOphir Munk  * A memzone is reserved by primary process and secondary processes attach to
6002e86c4e5SOphir Munk  * the memzone.
6012e86c4e5SOphir Munk  *
6022e86c4e5SOphir Munk  * @return
6032e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
6042e86c4e5SOphir Munk  */
6052e86c4e5SOphir Munk static int
6062e86c4e5SOphir Munk mlx5_init_shared_data(void)
6072e86c4e5SOphir Munk {
6082e86c4e5SOphir Munk 	const struct rte_memzone *mz;
6092e86c4e5SOphir Munk 	int ret = 0;
6102e86c4e5SOphir Munk 
6112e86c4e5SOphir Munk 	rte_spinlock_lock(&mlx5_shared_data_lock);
6122e86c4e5SOphir Munk 	if (mlx5_shared_data == NULL) {
6132e86c4e5SOphir Munk 		if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
6142e86c4e5SOphir Munk 			/* Allocate shared memory. */
6152e86c4e5SOphir Munk 			mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
6162e86c4e5SOphir Munk 						 sizeof(*mlx5_shared_data),
6172e86c4e5SOphir Munk 						 SOCKET_ID_ANY, 0);
6182e86c4e5SOphir Munk 			if (mz == NULL) {
6192e86c4e5SOphir Munk 				DRV_LOG(ERR,
6202e86c4e5SOphir Munk 					"Cannot allocate mlx5 shared data");
6212e86c4e5SOphir Munk 				ret = -rte_errno;
6222e86c4e5SOphir Munk 				goto error;
6232e86c4e5SOphir Munk 			}
6242e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
6252e86c4e5SOphir Munk 			memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
6262e86c4e5SOphir Munk 			rte_spinlock_init(&mlx5_shared_data->lock);
6272e86c4e5SOphir Munk 		} else {
6282e86c4e5SOphir Munk 			/* Lookup allocated shared memory. */
6292e86c4e5SOphir Munk 			mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
6302e86c4e5SOphir Munk 			if (mz == NULL) {
6312e86c4e5SOphir Munk 				DRV_LOG(ERR,
6322e86c4e5SOphir Munk 					"Cannot attach mlx5 shared data");
6332e86c4e5SOphir Munk 				ret = -rte_errno;
6342e86c4e5SOphir Munk 				goto error;
6352e86c4e5SOphir Munk 			}
6362e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
6372e86c4e5SOphir Munk 			memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
6382e86c4e5SOphir Munk 		}
6392e86c4e5SOphir Munk 	}
6402e86c4e5SOphir Munk error:
6412e86c4e5SOphir Munk 	rte_spinlock_unlock(&mlx5_shared_data_lock);
6422e86c4e5SOphir Munk 	return ret;
6432e86c4e5SOphir Munk }
6442e86c4e5SOphir Munk 
6452e86c4e5SOphir Munk /**
6462e86c4e5SOphir Munk  * PMD global initialization.
6472e86c4e5SOphir Munk  *
6482e86c4e5SOphir Munk  * Independent from individual device, this function initializes global
6492e86c4e5SOphir Munk  * per-PMD data structures distinguishing primary and secondary processes.
6502e86c4e5SOphir Munk  * Hence, each initialization is called once per a process.
6512e86c4e5SOphir Munk  *
6522e86c4e5SOphir Munk  * @return
6532e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
6542e86c4e5SOphir Munk  */
6552e86c4e5SOphir Munk static int
6562e86c4e5SOphir Munk mlx5_init_once(void)
6572e86c4e5SOphir Munk {
6582e86c4e5SOphir Munk 	struct mlx5_shared_data *sd;
6592e86c4e5SOphir Munk 	struct mlx5_local_data *ld = &mlx5_local_data;
6602e86c4e5SOphir Munk 	int ret = 0;
6612e86c4e5SOphir Munk 
6622e86c4e5SOphir Munk 	if (mlx5_init_shared_data())
6632e86c4e5SOphir Munk 		return -rte_errno;
6642e86c4e5SOphir Munk 	sd = mlx5_shared_data;
6652e86c4e5SOphir Munk 	MLX5_ASSERT(sd);
6662e86c4e5SOphir Munk 	rte_spinlock_lock(&sd->lock);
6672e86c4e5SOphir Munk 	switch (rte_eal_process_type()) {
6682e86c4e5SOphir Munk 	case RTE_PROC_PRIMARY:
6692e86c4e5SOphir Munk 		if (sd->init_done)
6702e86c4e5SOphir Munk 			break;
6712e86c4e5SOphir Munk 		LIST_INIT(&sd->mem_event_cb_list);
6722e86c4e5SOphir Munk 		rte_rwlock_init(&sd->mem_event_rwlock);
6732e86c4e5SOphir Munk 		rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
6742e86c4e5SOphir Munk 						mlx5_mr_mem_event_cb, NULL);
6752e86c4e5SOphir Munk 		ret = mlx5_mp_init_primary(MLX5_MP_NAME,
6762e86c4e5SOphir Munk 					   mlx5_mp_os_primary_handle);
6772e86c4e5SOphir Munk 		if (ret)
6782e86c4e5SOphir Munk 			goto out;
6792e86c4e5SOphir Munk 		sd->init_done = true;
6802e86c4e5SOphir Munk 		break;
6812e86c4e5SOphir Munk 	case RTE_PROC_SECONDARY:
6822e86c4e5SOphir Munk 		if (ld->init_done)
6832e86c4e5SOphir Munk 			break;
6842e86c4e5SOphir Munk 		ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
6852e86c4e5SOphir Munk 					     mlx5_mp_os_secondary_handle);
6862e86c4e5SOphir Munk 		if (ret)
6872e86c4e5SOphir Munk 			goto out;
6882e86c4e5SOphir Munk 		++sd->secondary_cnt;
6892e86c4e5SOphir Munk 		ld->init_done = true;
6902e86c4e5SOphir Munk 		break;
6912e86c4e5SOphir Munk 	default:
6922e86c4e5SOphir Munk 		break;
6932e86c4e5SOphir Munk 	}
6942e86c4e5SOphir Munk out:
6952e86c4e5SOphir Munk 	rte_spinlock_unlock(&sd->lock);
6962e86c4e5SOphir Munk 	return ret;
6972e86c4e5SOphir Munk }
6982e86c4e5SOphir Munk 
6992e86c4e5SOphir Munk /**
70086d259ceSMichael Baum  * Create the Tx queue DevX/Verbs object.
70186d259ceSMichael Baum  *
70286d259ceSMichael Baum  * @param dev
70386d259ceSMichael Baum  *   Pointer to Ethernet device.
70486d259ceSMichael Baum  * @param idx
70586d259ceSMichael Baum  *   Queue index in DPDK Tx queue array.
70686d259ceSMichael Baum  *
70786d259ceSMichael Baum  * @return
708f49f4483SMichael Baum  *   0 on success, a negative errno value otherwise and rte_errno is set.
70986d259ceSMichael Baum  */
710f49f4483SMichael Baum static int
71186d259ceSMichael Baum mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
71286d259ceSMichael Baum {
71386d259ceSMichael Baum 	struct mlx5_priv *priv = dev->data->dev_private;
71486d259ceSMichael Baum 	struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
71586d259ceSMichael Baum 	struct mlx5_txq_ctrl *txq_ctrl =
71686d259ceSMichael Baum 			container_of(txq_data, struct mlx5_txq_ctrl, txq);
71786d259ceSMichael Baum 
71886d259ceSMichael Baum 	if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
71986d259ceSMichael Baum 		return mlx5_txq_devx_obj_new(dev, idx);
72086d259ceSMichael Baum #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
7213ec73abeSMatan Azrad 	if (!priv->config.dv_esw_en)
72286d259ceSMichael Baum 		return mlx5_txq_devx_obj_new(dev, idx);
72386d259ceSMichael Baum #endif
72486d259ceSMichael Baum 	return mlx5_txq_ibv_obj_new(dev, idx);
72586d259ceSMichael Baum }
72686d259ceSMichael Baum 
72786d259ceSMichael Baum /**
72886d259ceSMichael Baum  * Release an Tx DevX/verbs queue object.
72986d259ceSMichael Baum  *
73086d259ceSMichael Baum  * @param txq_obj
73186d259ceSMichael Baum  *   DevX/Verbs Tx queue object.
73286d259ceSMichael Baum  */
73386d259ceSMichael Baum static void
73486d259ceSMichael Baum mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
73586d259ceSMichael Baum {
73686d259ceSMichael Baum 	if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
73786d259ceSMichael Baum 		mlx5_txq_devx_obj_release(txq_obj);
73886d259ceSMichael Baum 		return;
73986d259ceSMichael Baum 	}
7403ec73abeSMatan Azrad #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
7413ec73abeSMatan Azrad 	if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
7423ec73abeSMatan Azrad 		mlx5_txq_devx_obj_release(txq_obj);
7433ec73abeSMatan Azrad 		return;
74486d259ceSMichael Baum 	}
7453ec73abeSMatan Azrad #endif
74686d259ceSMichael Baum 	mlx5_txq_ibv_obj_release(txq_obj);
74786d259ceSMichael Baum }
74886d259ceSMichael Baum 
74986d259ceSMichael Baum /**
750994829e6SSuanming Mou  * DV flow counter mode detect and config.
751994829e6SSuanming Mou  *
752994829e6SSuanming Mou  * @param dev
753994829e6SSuanming Mou  *   Pointer to rte_eth_dev structure.
754994829e6SSuanming Mou  *
755994829e6SSuanming Mou  */
756994829e6SSuanming Mou static void
757994829e6SSuanming Mou mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
758994829e6SSuanming Mou {
759994829e6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT
760994829e6SSuanming Mou 	struct mlx5_priv *priv = dev->data->dev_private;
7612b5b1aebSSuanming Mou 	struct mlx5_dev_ctx_shared *sh = priv->sh;
7622b5b1aebSSuanming Mou 	bool fallback;
763994829e6SSuanming Mou 
764994829e6SSuanming Mou #ifndef HAVE_IBV_DEVX_ASYNC
7652b5b1aebSSuanming Mou 	fallback = true;
766994829e6SSuanming Mou #else
7672b5b1aebSSuanming Mou 	fallback = false;
7682b5b1aebSSuanming Mou 	if (!priv->config.devx || !priv->config.dv_flow_en ||
7692b5b1aebSSuanming Mou 	    !priv->config.hca_attr.flow_counters_dump ||
770994829e6SSuanming Mou 	    !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
771994829e6SSuanming Mou 	    (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
7722b5b1aebSSuanming Mou 		fallback = true;
773994829e6SSuanming Mou #endif
7742b5b1aebSSuanming Mou 	if (fallback)
775994829e6SSuanming Mou 		DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
776994829e6SSuanming Mou 			"counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
777994829e6SSuanming Mou 			priv->config.hca_attr.flow_counters_dump,
778994829e6SSuanming Mou 			priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
7792b5b1aebSSuanming Mou 	/* Initialize fallback mode only on the port initializes sh. */
7802b5b1aebSSuanming Mou 	if (sh->refcnt == 1)
7812b5b1aebSSuanming Mou 		sh->cmng.counter_fallback = fallback;
7822b5b1aebSSuanming Mou 	else if (fallback != sh->cmng.counter_fallback)
7832b5b1aebSSuanming Mou 		DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
7842b5b1aebSSuanming Mou 			"with others:%d.", PORT_ID(priv), fallback);
785994829e6SSuanming Mou #endif
786994829e6SSuanming Mou }
787994829e6SSuanming Mou 
788e6988afdSMatan Azrad static void
789e6988afdSMatan Azrad mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
790e6988afdSMatan Azrad {
791e6988afdSMatan Azrad 	struct mlx5_priv *priv = dev->data->dev_private;
792e6988afdSMatan Azrad 	void *ctx = priv->sh->ctx;
793e6988afdSMatan Azrad 
794e6988afdSMatan Azrad 	priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
795e6988afdSMatan Azrad 	if (!priv->q_counters) {
796e6988afdSMatan Azrad 		struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
797e6988afdSMatan Azrad 		struct ibv_wq *wq;
798e6988afdSMatan Azrad 
799e6988afdSMatan Azrad 		DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
800e6988afdSMatan Azrad 			"by DevX - fall-back to use the kernel driver global "
801e6988afdSMatan Azrad 			"queue counter.", dev->data->port_id);
802e6988afdSMatan Azrad 		/* Create WQ by kernel and query its queue counter ID. */
803e6988afdSMatan Azrad 		if (cq) {
804e6988afdSMatan Azrad 			wq = mlx5_glue->create_wq(ctx,
805e6988afdSMatan Azrad 						  &(struct ibv_wq_init_attr){
806e6988afdSMatan Azrad 						    .wq_type = IBV_WQT_RQ,
807e6988afdSMatan Azrad 						    .max_wr = 1,
808e6988afdSMatan Azrad 						    .max_sge = 1,
809e6988afdSMatan Azrad 						    .pd = priv->sh->pd,
810e6988afdSMatan Azrad 						    .cq = cq,
811e6988afdSMatan Azrad 						});
812e6988afdSMatan Azrad 			if (wq) {
813e6988afdSMatan Azrad 				/* Counter is assigned only on RDY state. */
814e6988afdSMatan Azrad 				int ret = mlx5_glue->modify_wq(wq,
815e6988afdSMatan Azrad 						 &(struct ibv_wq_attr){
816e6988afdSMatan Azrad 						 .attr_mask = IBV_WQ_ATTR_STATE,
817e6988afdSMatan Azrad 						 .wq_state = IBV_WQS_RDY,
818e6988afdSMatan Azrad 						});
819e6988afdSMatan Azrad 
820e6988afdSMatan Azrad 				if (ret == 0)
821e6988afdSMatan Azrad 					mlx5_devx_cmd_wq_query(wq,
822e6988afdSMatan Azrad 							 &priv->counter_set_id);
823e6988afdSMatan Azrad 				claim_zero(mlx5_glue->destroy_wq(wq));
824e6988afdSMatan Azrad 			}
825e6988afdSMatan Azrad 			claim_zero(mlx5_glue->destroy_cq(cq));
826e6988afdSMatan Azrad 		}
827e6988afdSMatan Azrad 	} else {
828e6988afdSMatan Azrad 		priv->counter_set_id = priv->q_counters->id;
829e6988afdSMatan Azrad 	}
830e6988afdSMatan Azrad 	if (priv->counter_set_id == 0)
831e6988afdSMatan Azrad 		DRV_LOG(INFO, "Part of the port %d statistics will not be "
832e6988afdSMatan Azrad 			"available.", dev->data->port_id);
833e6988afdSMatan Azrad }
834e6988afdSMatan Azrad 
835994829e6SSuanming Mou /**
836f926cce3SXueming Li  * Check if representor spawn info match devargs.
837f926cce3SXueming Li  *
838f926cce3SXueming Li  * @param spawn
839f926cce3SXueming Li  *   Verbs device parameters (name, port, switch_info) to spawn.
840f926cce3SXueming Li  * @param eth_da
841f926cce3SXueming Li  *   Device devargs to probe.
842f926cce3SXueming Li  *
843f926cce3SXueming Li  * @return
844f926cce3SXueming Li  *   Match result.
845f926cce3SXueming Li  */
846f926cce3SXueming Li static bool
847f926cce3SXueming Li mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
848f926cce3SXueming Li 		       struct rte_eth_devargs *eth_da)
849f926cce3SXueming Li {
850f926cce3SXueming Li 	struct mlx5_switch_info *switch_info = &spawn->info;
851f926cce3SXueming Li 	unsigned int p, f;
852f926cce3SXueming Li 	uint16_t id;
85391766faeSXueming Li 	uint16_t repr_id = mlx5_representor_id_encode(switch_info,
85491766faeSXueming Li 						      eth_da->type);
855f926cce3SXueming Li 
856f926cce3SXueming Li 	switch (eth_da->type) {
857f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_SF:
85891766faeSXueming Li 		if (!(spawn->info.port_name == -1 &&
85991766faeSXueming Li 		      switch_info->name_type ==
86091766faeSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
86191766faeSXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
862f926cce3SXueming Li 			rte_errno = EBUSY;
863f926cce3SXueming Li 			return false;
864f926cce3SXueming Li 		}
865f926cce3SXueming Li 		break;
866f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_VF:
867f926cce3SXueming Li 		/* Allows HPF representor index -1 as exception. */
868f926cce3SXueming Li 		if (!(spawn->info.port_name == -1 &&
869f926cce3SXueming Li 		      switch_info->name_type ==
870f926cce3SXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
871f926cce3SXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
872f926cce3SXueming Li 			rte_errno = EBUSY;
873f926cce3SXueming Li 			return false;
874f926cce3SXueming Li 		}
875f926cce3SXueming Li 		break;
876f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_NONE:
877f926cce3SXueming Li 		rte_errno = EBUSY;
878f926cce3SXueming Li 		return false;
879f926cce3SXueming Li 	default:
880f926cce3SXueming Li 		rte_errno = ENOTSUP;
881f926cce3SXueming Li 		DRV_LOG(ERR, "unsupported representor type");
882f926cce3SXueming Li 		return false;
883f926cce3SXueming Li 	}
884f926cce3SXueming Li 	/* Check representor ID: */
885f926cce3SXueming Li 	for (p = 0; p < eth_da->nb_ports; ++p) {
886f926cce3SXueming Li 		if (spawn->pf_bond < 0) {
887f926cce3SXueming Li 			/* For non-LAG mode, allow and ignore pf. */
888f926cce3SXueming Li 			switch_info->pf_num = eth_da->ports[p];
88991766faeSXueming Li 			repr_id = mlx5_representor_id_encode(switch_info,
89091766faeSXueming Li 							     eth_da->type);
891f926cce3SXueming Li 		}
892f926cce3SXueming Li 		for (f = 0; f < eth_da->nb_representor_ports; ++f) {
893f926cce3SXueming Li 			id = MLX5_REPRESENTOR_ID
894f926cce3SXueming Li 				(eth_da->ports[p], eth_da->type,
895f926cce3SXueming Li 				 eth_da->representor_ports[f]);
896f926cce3SXueming Li 			if (repr_id == id)
897f926cce3SXueming Li 				return true;
898f926cce3SXueming Li 		}
899f926cce3SXueming Li 	}
900f926cce3SXueming Li 	rte_errno = EBUSY;
901f926cce3SXueming Li 	return false;
902f926cce3SXueming Li }
903f926cce3SXueming Li 
904f926cce3SXueming Li 
905f926cce3SXueming Li /**
9062eb4d010SOphir Munk  * Spawn an Ethernet device from Verbs information.
9072eb4d010SOphir Munk  *
9082eb4d010SOphir Munk  * @param dpdk_dev
9092eb4d010SOphir Munk  *   Backing DPDK device.
9102eb4d010SOphir Munk  * @param spawn
9112eb4d010SOphir Munk  *   Verbs device parameters (name, port, switch_info) to spawn.
9122eb4d010SOphir Munk  * @param config
9132eb4d010SOphir Munk  *   Device configuration parameters.
914cb95feefSXueming Li  * @param config
915cb95feefSXueming Li  *   Device arguments.
9162eb4d010SOphir Munk  *
9172eb4d010SOphir Munk  * @return
9182eb4d010SOphir Munk  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
9192eb4d010SOphir Munk  *   is set. The following errors are defined:
9202eb4d010SOphir Munk  *
9212eb4d010SOphir Munk  *   EBUSY: device is not supposed to be spawned.
9222eb4d010SOphir Munk  *   EEXIST: device is already spawned
9232eb4d010SOphir Munk  */
9242eb4d010SOphir Munk static struct rte_eth_dev *
9252eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev,
9262eb4d010SOphir Munk 	       struct mlx5_dev_spawn_data *spawn,
927cb95feefSXueming Li 	       struct mlx5_dev_config *config,
928cb95feefSXueming Li 	       struct rte_eth_devargs *eth_da)
9292eb4d010SOphir Munk {
9302eb4d010SOphir Munk 	const struct mlx5_switch_info *switch_info = &spawn->info;
9312eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = NULL;
9322eb4d010SOphir Munk 	struct ibv_port_attr port_attr;
9332eb4d010SOphir Munk 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
9342eb4d010SOphir Munk 	struct rte_eth_dev *eth_dev = NULL;
9352eb4d010SOphir Munk 	struct mlx5_priv *priv = NULL;
9362eb4d010SOphir Munk 	int err = 0;
9372eb4d010SOphir Munk 	unsigned int hw_padding = 0;
9382eb4d010SOphir Munk 	unsigned int mps;
9392eb4d010SOphir Munk 	unsigned int tunnel_en = 0;
9402eb4d010SOphir Munk 	unsigned int mpls_en = 0;
9412eb4d010SOphir Munk 	unsigned int swp = 0;
9422eb4d010SOphir Munk 	unsigned int mprq = 0;
9432eb4d010SOphir Munk 	unsigned int mprq_min_stride_size_n = 0;
9442eb4d010SOphir Munk 	unsigned int mprq_max_stride_size_n = 0;
9452eb4d010SOphir Munk 	unsigned int mprq_min_stride_num_n = 0;
9462eb4d010SOphir Munk 	unsigned int mprq_max_stride_num_n = 0;
9472eb4d010SOphir Munk 	struct rte_ether_addr mac;
9482eb4d010SOphir Munk 	char name[RTE_ETH_NAME_MAX_LEN];
9492eb4d010SOphir Munk 	int own_domain_id = 0;
9502eb4d010SOphir Munk 	uint16_t port_id;
951d0cf77e8SViacheslav Ovsiienko 	struct mlx5_port_info vport_info = { .query_flags = 0 };
952b4edeaf3SSuanming Mou 	int i;
9532eb4d010SOphir Munk 
9542eb4d010SOphir Munk 	/* Determine if this port representor is supposed to be spawned. */
955f926cce3SXueming Li 	if (switch_info->representor && dpdk_dev->devargs &&
956f926cce3SXueming Li 	    !mlx5_representor_match(spawn, eth_da))
957d6541676SXueming Li 		return NULL;
9582eb4d010SOphir Munk 	/* Build device name. */
9592eb4d010SOphir Munk 	if (spawn->pf_bond < 0) {
9602eb4d010SOphir Munk 		/* Single device. */
9612eb4d010SOphir Munk 		if (!switch_info->representor)
9622eb4d010SOphir Munk 			strlcpy(name, dpdk_dev->name, sizeof(name));
9632eb4d010SOphir Munk 		else
964f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_representor_%s%u",
965cb95feefSXueming Li 				 dpdk_dev->name,
966cb95feefSXueming Li 				 switch_info->name_type ==
967cb95feefSXueming Li 				 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
968cb95feefSXueming Li 				 switch_info->port_name);
9692eb4d010SOphir Munk 	} else {
9702eb4d010SOphir Munk 		/* Bonding device. */
971f926cce3SXueming Li 		if (!switch_info->representor) {
972f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s",
973834a9019SOphir Munk 				 dpdk_dev->name,
974834a9019SOphir Munk 				 mlx5_os_get_dev_device_name(spawn->phys_dev));
975f926cce3SXueming Li 		} else {
976f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
977834a9019SOphir Munk 				dpdk_dev->name,
978834a9019SOphir Munk 				mlx5_os_get_dev_device_name(spawn->phys_dev),
979f926cce3SXueming Li 				switch_info->ctrl_num,
980f926cce3SXueming Li 				switch_info->pf_num,
981cb95feefSXueming Li 				switch_info->name_type ==
982cb95feefSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
9832eb4d010SOphir Munk 				switch_info->port_name);
9842eb4d010SOphir Munk 		}
985f926cce3SXueming Li 	}
986f926cce3SXueming Li 	if (err >= (int)sizeof(name))
987f926cce3SXueming Li 		DRV_LOG(WARNING, "device name overflow %s", name);
9882eb4d010SOphir Munk 	/* check if the device is already spawned */
9892eb4d010SOphir Munk 	if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
9902eb4d010SOphir Munk 		rte_errno = EEXIST;
9912eb4d010SOphir Munk 		return NULL;
9922eb4d010SOphir Munk 	}
9932eb4d010SOphir Munk 	DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
9942eb4d010SOphir Munk 	if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
9952eb4d010SOphir Munk 		struct mlx5_mp_id mp_id;
9962eb4d010SOphir Munk 
9972eb4d010SOphir Munk 		eth_dev = rte_eth_dev_attach_secondary(name);
9982eb4d010SOphir Munk 		if (eth_dev == NULL) {
9992eb4d010SOphir Munk 			DRV_LOG(ERR, "can not attach rte ethdev");
10002eb4d010SOphir Munk 			rte_errno = ENOMEM;
10012eb4d010SOphir Munk 			return NULL;
10022eb4d010SOphir Munk 		}
10032eb4d010SOphir Munk 		eth_dev->device = dpdk_dev;
1004b012b4ceSOphir Munk 		eth_dev->dev_ops = &mlx5_dev_sec_ops;
1005cbfc6111SFerruh Yigit 		eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1006cbfc6111SFerruh Yigit 		eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
10072eb4d010SOphir Munk 		err = mlx5_proc_priv_init(eth_dev);
10082eb4d010SOphir Munk 		if (err)
10092eb4d010SOphir Munk 			return NULL;
10102eb4d010SOphir Munk 		mp_id.port_id = eth_dev->data->port_id;
10112eb4d010SOphir Munk 		strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
10122eb4d010SOphir Munk 		/* Receive command fd from primary process */
10132eb4d010SOphir Munk 		err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
10142eb4d010SOphir Munk 		if (err < 0)
10152eb4d010SOphir Munk 			goto err_secondary;
10162eb4d010SOphir Munk 		/* Remap UAR for Tx queues. */
10172eb4d010SOphir Munk 		err = mlx5_tx_uar_init_secondary(eth_dev, err);
10182eb4d010SOphir Munk 		if (err)
10192eb4d010SOphir Munk 			goto err_secondary;
10202eb4d010SOphir Munk 		/*
10212eb4d010SOphir Munk 		 * Ethdev pointer is still required as input since
10222eb4d010SOphir Munk 		 * the primary device is not accessible from the
10232eb4d010SOphir Munk 		 * secondary process.
10242eb4d010SOphir Munk 		 */
10252eb4d010SOphir Munk 		eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
10262eb4d010SOphir Munk 		eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
10272eb4d010SOphir Munk 		return eth_dev;
10282eb4d010SOphir Munk err_secondary:
10292eb4d010SOphir Munk 		mlx5_dev_close(eth_dev);
10302eb4d010SOphir Munk 		return NULL;
10312eb4d010SOphir Munk 	}
10322eb4d010SOphir Munk 	/*
10332eb4d010SOphir Munk 	 * Some parameters ("tx_db_nc" in particularly) are needed in
10342eb4d010SOphir Munk 	 * advance to create dv/verbs device context. We proceed the
10352eb4d010SOphir Munk 	 * devargs here to get ones, and later proceed devargs again
10362eb4d010SOphir Munk 	 * to override some hardware settings.
10372eb4d010SOphir Munk 	 */
1038d462a83cSMichael Baum 	err = mlx5_args(config, dpdk_dev->devargs);
10392eb4d010SOphir Munk 	if (err) {
10402eb4d010SOphir Munk 		err = rte_errno;
10412eb4d010SOphir Munk 		DRV_LOG(ERR, "failed to process device arguments: %s",
10422eb4d010SOphir Munk 			strerror(rte_errno));
10432eb4d010SOphir Munk 		goto error;
10442eb4d010SOphir Munk 	}
10454ec6360dSGregory Etelson 	if (config->dv_miss_info) {
10464ec6360dSGregory Etelson 		if (switch_info->master || switch_info->representor)
10474ec6360dSGregory Etelson 			config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
10484ec6360dSGregory Etelson 	}
1049d462a83cSMichael Baum 	mlx5_malloc_mem_select(config->sys_mem_en);
1050d462a83cSMichael Baum 	sh = mlx5_alloc_shared_dev_ctx(spawn, config);
10512eb4d010SOphir Munk 	if (!sh)
10522eb4d010SOphir Munk 		return NULL;
1053d462a83cSMichael Baum 	config->devx = sh->devx;
10542eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1055d462a83cSMichael Baum 	config->dest_tir = 1;
10562eb4d010SOphir Munk #endif
10572eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
10582eb4d010SOphir Munk 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
10592eb4d010SOphir Munk #endif
10602eb4d010SOphir Munk 	/*
10612eb4d010SOphir Munk 	 * Multi-packet send is supported by ConnectX-4 Lx PF as well
10622eb4d010SOphir Munk 	 * as all ConnectX-5 devices.
10632eb4d010SOphir Munk 	 */
10642eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10652eb4d010SOphir Munk 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
10662eb4d010SOphir Munk #endif
10672eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
10682eb4d010SOphir Munk 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
10692eb4d010SOphir Munk #endif
10702eb4d010SOphir Munk 	mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
10712eb4d010SOphir Munk 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
10722eb4d010SOphir Munk 		if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
10732eb4d010SOphir Munk 			DRV_LOG(DEBUG, "enhanced MPW is supported");
10742eb4d010SOphir Munk 			mps = MLX5_MPW_ENHANCED;
10752eb4d010SOphir Munk 		} else {
10762eb4d010SOphir Munk 			DRV_LOG(DEBUG, "MPW is supported");
10772eb4d010SOphir Munk 			mps = MLX5_MPW;
10782eb4d010SOphir Munk 		}
10792eb4d010SOphir Munk 	} else {
10802eb4d010SOphir Munk 		DRV_LOG(DEBUG, "MPW isn't supported");
10812eb4d010SOphir Munk 		mps = MLX5_MPW_DISABLED;
10822eb4d010SOphir Munk 	}
10832eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
10842eb4d010SOphir Munk 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
10852eb4d010SOphir Munk 		swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
10862eb4d010SOphir Munk 	DRV_LOG(DEBUG, "SWP support: %u", swp);
10872eb4d010SOphir Munk #endif
1088d462a83cSMichael Baum 	config->swp = !!swp;
10892eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
10902eb4d010SOphir Munk 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
10912eb4d010SOphir Munk 		struct mlx5dv_striding_rq_caps mprq_caps =
10922eb4d010SOphir Munk 			dv_attr.striding_rq_caps;
10932eb4d010SOphir Munk 
10942eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
10952eb4d010SOphir Munk 			mprq_caps.min_single_stride_log_num_of_bytes);
10962eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
10972eb4d010SOphir Munk 			mprq_caps.max_single_stride_log_num_of_bytes);
10982eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
10992eb4d010SOphir Munk 			mprq_caps.min_single_wqe_log_num_of_strides);
11002eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
11012eb4d010SOphir Munk 			mprq_caps.max_single_wqe_log_num_of_strides);
11022eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tsupported_qpts: %d",
11032eb4d010SOphir Munk 			mprq_caps.supported_qpts);
11042eb4d010SOphir Munk 		DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
11052eb4d010SOphir Munk 		mprq = 1;
11062eb4d010SOphir Munk 		mprq_min_stride_size_n =
11072eb4d010SOphir Munk 			mprq_caps.min_single_stride_log_num_of_bytes;
11082eb4d010SOphir Munk 		mprq_max_stride_size_n =
11092eb4d010SOphir Munk 			mprq_caps.max_single_stride_log_num_of_bytes;
11102eb4d010SOphir Munk 		mprq_min_stride_num_n =
11112eb4d010SOphir Munk 			mprq_caps.min_single_wqe_log_num_of_strides;
11122eb4d010SOphir Munk 		mprq_max_stride_num_n =
11132eb4d010SOphir Munk 			mprq_caps.max_single_wqe_log_num_of_strides;
11142eb4d010SOphir Munk 	}
11152eb4d010SOphir Munk #endif
11163d3f4e6dSAlexander Kozyrev 	/* Rx CQE compression is enabled by default. */
11173d3f4e6dSAlexander Kozyrev 	config->cqe_comp = 1;
11182eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
11192eb4d010SOphir Munk 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
11202eb4d010SOphir Munk 		tunnel_en = ((dv_attr.tunnel_offloads_caps &
11212eb4d010SOphir Munk 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
11222eb4d010SOphir Munk 			     (dv_attr.tunnel_offloads_caps &
11232eb4d010SOphir Munk 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
11242eb4d010SOphir Munk 			     (dv_attr.tunnel_offloads_caps &
11252eb4d010SOphir Munk 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
11262eb4d010SOphir Munk 	}
11272eb4d010SOphir Munk 	DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
11282eb4d010SOphir Munk 		tunnel_en ? "" : "not ");
11292eb4d010SOphir Munk #else
11302eb4d010SOphir Munk 	DRV_LOG(WARNING,
11312eb4d010SOphir Munk 		"tunnel offloading disabled due to old OFED/rdma-core version");
11322eb4d010SOphir Munk #endif
1133d462a83cSMichael Baum 	config->tunnel_en = tunnel_en;
11342eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
11352eb4d010SOphir Munk 	mpls_en = ((dv_attr.tunnel_offloads_caps &
11362eb4d010SOphir Munk 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
11372eb4d010SOphir Munk 		   (dv_attr.tunnel_offloads_caps &
11382eb4d010SOphir Munk 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
11392eb4d010SOphir Munk 	DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
11402eb4d010SOphir Munk 		mpls_en ? "" : "not ");
11412eb4d010SOphir Munk #else
11422eb4d010SOphir Munk 	DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
11432eb4d010SOphir Munk 		" old OFED/rdma-core version or firmware configuration");
11442eb4d010SOphir Munk #endif
1145d462a83cSMichael Baum 	config->mpls_en = mpls_en;
11462eb4d010SOphir Munk 	/* Check port status. */
1147834a9019SOphir Munk 	err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
11482eb4d010SOphir Munk 	if (err) {
11492eb4d010SOphir Munk 		DRV_LOG(ERR, "port query failed: %s", strerror(err));
11502eb4d010SOphir Munk 		goto error;
11512eb4d010SOphir Munk 	}
11522eb4d010SOphir Munk 	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
11532eb4d010SOphir Munk 		DRV_LOG(ERR, "port is not configured in Ethernet mode");
11542eb4d010SOphir Munk 		err = EINVAL;
11552eb4d010SOphir Munk 		goto error;
11562eb4d010SOphir Munk 	}
11572eb4d010SOphir Munk 	if (port_attr.state != IBV_PORT_ACTIVE)
11582eb4d010SOphir Munk 		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
11592eb4d010SOphir Munk 			mlx5_glue->port_state_str(port_attr.state),
11602eb4d010SOphir Munk 			port_attr.state);
11612eb4d010SOphir Munk 	/* Allocate private eth device data. */
11622175c4dcSSuanming Mou 	priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
11632eb4d010SOphir Munk 			   sizeof(*priv),
11642175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
11652eb4d010SOphir Munk 	if (priv == NULL) {
11662eb4d010SOphir Munk 		DRV_LOG(ERR, "priv allocation failure");
11672eb4d010SOphir Munk 		err = ENOMEM;
11682eb4d010SOphir Munk 		goto error;
11692eb4d010SOphir Munk 	}
11702eb4d010SOphir Munk 	priv->sh = sh;
117191389890SOphir Munk 	priv->dev_port = spawn->phys_port;
11722eb4d010SOphir Munk 	priv->pci_dev = spawn->pci_dev;
11732eb4d010SOphir Munk 	priv->mtu = RTE_ETHER_MTU;
11742eb4d010SOphir Munk 	/* Some internal functions rely on Netlink sockets, open them now. */
11752eb4d010SOphir Munk 	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
11762eb4d010SOphir Munk 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
11772eb4d010SOphir Munk 	priv->representor = !!switch_info->representor;
11782eb4d010SOphir Munk 	priv->master = !!switch_info->master;
11792eb4d010SOphir Munk 	priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
11802eb4d010SOphir Munk 	priv->vport_meta_tag = 0;
11812eb4d010SOphir Munk 	priv->vport_meta_mask = 0;
11822eb4d010SOphir Munk 	priv->pf_bond = spawn->pf_bond;
11832eb4d010SOphir Munk 	/*
1184d0cf77e8SViacheslav Ovsiienko 	 * If we have E-Switch we should determine the vport attributes.
1185d0cf77e8SViacheslav Ovsiienko 	 * E-Switch may use either source vport field or reg_c[0] metadata
1186d0cf77e8SViacheslav Ovsiienko 	 * register to match on vport index. The engaged part of metadata
1187d0cf77e8SViacheslav Ovsiienko 	 * register is defined by mask.
11882eb4d010SOphir Munk 	 */
11892eb4d010SOphir Munk 	if (switch_info->representor || switch_info->master) {
1190d0cf77e8SViacheslav Ovsiienko 		err = mlx5_glue->devx_port_query(sh->ctx,
1191d0cf77e8SViacheslav Ovsiienko 						 spawn->phys_port,
1192d0cf77e8SViacheslav Ovsiienko 						 &vport_info);
11932eb4d010SOphir Munk 		if (err) {
11942eb4d010SOphir Munk 			DRV_LOG(WARNING,
11952eb4d010SOphir Munk 				"can't query devx port %d on device %s",
1196834a9019SOphir Munk 				spawn->phys_port,
1197834a9019SOphir Munk 				mlx5_os_get_dev_device_name(spawn->phys_dev));
1198d0cf77e8SViacheslav Ovsiienko 			vport_info.query_flags = 0;
11992eb4d010SOphir Munk 		}
12002eb4d010SOphir Munk 	}
1201d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1202d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_tag = vport_info.vport_meta_tag;
1203d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_mask = vport_info.vport_meta_mask;
12042eb4d010SOphir Munk 		if (!priv->vport_meta_mask) {
12052eb4d010SOphir Munk 			DRV_LOG(ERR, "vport zero mask for port %d"
12062eb4d010SOphir Munk 				     " on bonding device %s",
1207834a9019SOphir Munk 				     spawn->phys_port,
1208834a9019SOphir Munk 				     mlx5_os_get_dev_device_name
1209834a9019SOphir Munk 							(spawn->phys_dev));
12102eb4d010SOphir Munk 			err = ENOTSUP;
12112eb4d010SOphir Munk 			goto error;
12122eb4d010SOphir Munk 		}
12132eb4d010SOphir Munk 		if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
12142eb4d010SOphir Munk 			DRV_LOG(ERR, "invalid vport tag for port %d"
12152eb4d010SOphir Munk 				     " on bonding device %s",
1216834a9019SOphir Munk 				     spawn->phys_port,
1217834a9019SOphir Munk 				     mlx5_os_get_dev_device_name
1218834a9019SOphir Munk 							(spawn->phys_dev));
12192eb4d010SOphir Munk 			err = ENOTSUP;
12202eb4d010SOphir Munk 			goto error;
12212eb4d010SOphir Munk 		}
12222eb4d010SOphir Munk 	}
1223d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1224d0cf77e8SViacheslav Ovsiienko 		priv->vport_id = vport_info.vport_id;
1225ecaee305SViacheslav Ovsiienko 	} else if (spawn->pf_bond >= 0 &&
1226ecaee305SViacheslav Ovsiienko 		   (switch_info->representor || switch_info->master)) {
12272eb4d010SOphir Munk 		DRV_LOG(ERR, "can't deduce vport index for port %d"
12282eb4d010SOphir Munk 			     " on bonding device %s",
1229834a9019SOphir Munk 			     spawn->phys_port,
1230834a9019SOphir Munk 			     mlx5_os_get_dev_device_name(spawn->phys_dev));
12312eb4d010SOphir Munk 		err = ENOTSUP;
12322eb4d010SOphir Munk 		goto error;
12332eb4d010SOphir Munk 	} else {
12342eb4d010SOphir Munk 		/*
1235d0cf77e8SViacheslav Ovsiienko 		 * Suppose vport index in compatible way. Kernel/rdma_core
1236d0cf77e8SViacheslav Ovsiienko 		 * support single E-Switch per PF configurations only and
1237d0cf77e8SViacheslav Ovsiienko 		 * vport_id field contains the vport index for associated VF,
1238d0cf77e8SViacheslav Ovsiienko 		 * which is deduced from representor port name.
12392eb4d010SOphir Munk 		 * For example, let's have the IB device port 10, it has
12402eb4d010SOphir Munk 		 * attached network device eth0, which has port name attribute
12412eb4d010SOphir Munk 		 * pf0vf2, we can deduce the VF number as 2, and set vport index
12422eb4d010SOphir Munk 		 * as 3 (2+1). This assigning schema should be changed if the
12432eb4d010SOphir Munk 		 * multiple E-Switch instances per PF configurations or/and PCI
12442eb4d010SOphir Munk 		 * subfunctions are added.
12452eb4d010SOphir Munk 		 */
12462eb4d010SOphir Munk 		priv->vport_id = switch_info->representor ?
12472eb4d010SOphir Munk 				 switch_info->port_name + 1 : -1;
1248d0cf77e8SViacheslav Ovsiienko 	}
124991766faeSXueming Li 	priv->representor_id = mlx5_representor_id_encode(switch_info,
125091766faeSXueming Li 							  eth_da->type);
12512eb4d010SOphir Munk 	/*
12522eb4d010SOphir Munk 	 * Look for sibling devices in order to reuse their switch domain
12532eb4d010SOphir Munk 	 * if any, otherwise allocate one.
12542eb4d010SOphir Munk 	 */
12552eb4d010SOphir Munk 	MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
12562eb4d010SOphir Munk 		const struct mlx5_priv *opriv =
12572eb4d010SOphir Munk 			rte_eth_devices[port_id].data->dev_private;
12582eb4d010SOphir Munk 
12592eb4d010SOphir Munk 		if (!opriv ||
12602eb4d010SOphir Munk 		    opriv->sh != priv->sh ||
12612eb4d010SOphir Munk 			opriv->domain_id ==
12622eb4d010SOphir Munk 			RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
12632eb4d010SOphir Munk 			continue;
12642eb4d010SOphir Munk 		priv->domain_id = opriv->domain_id;
12652eb4d010SOphir Munk 		break;
12662eb4d010SOphir Munk 	}
12672eb4d010SOphir Munk 	if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
12682eb4d010SOphir Munk 		err = rte_eth_switch_domain_alloc(&priv->domain_id);
12692eb4d010SOphir Munk 		if (err) {
12702eb4d010SOphir Munk 			err = rte_errno;
12712eb4d010SOphir Munk 			DRV_LOG(ERR, "unable to allocate switch domain: %s",
12722eb4d010SOphir Munk 				strerror(rte_errno));
12732eb4d010SOphir Munk 			goto error;
12742eb4d010SOphir Munk 		}
12752eb4d010SOphir Munk 		own_domain_id = 1;
12762eb4d010SOphir Munk 	}
12772eb4d010SOphir Munk 	/* Override some values set by hardware configuration. */
1278d462a83cSMichael Baum 	mlx5_args(config, dpdk_dev->devargs);
1279d462a83cSMichael Baum 	err = mlx5_dev_check_sibling_config(priv, config);
12802eb4d010SOphir Munk 	if (err)
12812eb4d010SOphir Munk 		goto error;
1282d462a83cSMichael Baum 	config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
12832eb4d010SOphir Munk 			    IBV_DEVICE_RAW_IP_CSUM);
12842eb4d010SOphir Munk 	DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1285d462a83cSMichael Baum 		(config->hw_csum ? "" : "not "));
12862eb4d010SOphir Munk #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
12872eb4d010SOphir Munk 	!defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
12882eb4d010SOphir Munk 	DRV_LOG(DEBUG, "counters are not supported");
12892eb4d010SOphir Munk #endif
12902eb4d010SOphir Munk #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1291d462a83cSMichael Baum 	if (config->dv_flow_en) {
12922eb4d010SOphir Munk 		DRV_LOG(WARNING, "DV flow is not supported");
1293d462a83cSMichael Baum 		config->dv_flow_en = 0;
12942eb4d010SOphir Munk 	}
12952eb4d010SOphir Munk #endif
1296d462a83cSMichael Baum 	config->ind_table_max_size =
12972eb4d010SOphir Munk 		sh->device_attr.max_rwq_indirection_table_size;
12982eb4d010SOphir Munk 	/*
12992eb4d010SOphir Munk 	 * Remove this check once DPDK supports larger/variable
13002eb4d010SOphir Munk 	 * indirection tables.
13012eb4d010SOphir Munk 	 */
1302d462a83cSMichael Baum 	if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1303d462a83cSMichael Baum 		config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
13042eb4d010SOphir Munk 	DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1305d462a83cSMichael Baum 		config->ind_table_max_size);
1306d462a83cSMichael Baum 	config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
13072eb4d010SOphir Munk 				  IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
13082eb4d010SOphir Munk 	DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1309d462a83cSMichael Baum 		(config->hw_vlan_strip ? "" : "not "));
1310d462a83cSMichael Baum 	config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
13112eb4d010SOphir Munk 				 IBV_RAW_PACKET_CAP_SCATTER_FCS);
13122eb4d010SOphir Munk #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
13132eb4d010SOphir Munk 	hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
13142eb4d010SOphir Munk #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
13152eb4d010SOphir Munk 	hw_padding = !!(sh->device_attr.device_cap_flags_ex &
13162eb4d010SOphir Munk 			IBV_DEVICE_PCI_WRITE_END_PADDING);
13172eb4d010SOphir Munk #endif
1318d462a83cSMichael Baum 	if (config->hw_padding && !hw_padding) {
13192eb4d010SOphir Munk 		DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1320d462a83cSMichael Baum 		config->hw_padding = 0;
1321d462a83cSMichael Baum 	} else if (config->hw_padding) {
13222eb4d010SOphir Munk 		DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
13232eb4d010SOphir Munk 	}
1324d462a83cSMichael Baum 	config->tso = (sh->device_attr.max_tso > 0 &&
13252eb4d010SOphir Munk 		      (sh->device_attr.tso_supported_qpts &
13262eb4d010SOphir Munk 		       (1 << IBV_QPT_RAW_PACKET)));
1327d462a83cSMichael Baum 	if (config->tso)
1328d462a83cSMichael Baum 		config->tso_max_payload_sz = sh->device_attr.max_tso;
13292eb4d010SOphir Munk 	/*
13302eb4d010SOphir Munk 	 * MPW is disabled by default, while the Enhanced MPW is enabled
13312eb4d010SOphir Munk 	 * by default.
13322eb4d010SOphir Munk 	 */
1333d462a83cSMichael Baum 	if (config->mps == MLX5_ARG_UNSET)
1334d462a83cSMichael Baum 		config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
13352eb4d010SOphir Munk 							  MLX5_MPW_DISABLED;
13362eb4d010SOphir Munk 	else
1337d462a83cSMichael Baum 		config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
13382eb4d010SOphir Munk 	DRV_LOG(INFO, "%sMPS is %s",
1339d462a83cSMichael Baum 		config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1340d462a83cSMichael Baum 		config->mps == MLX5_MPW ? "legacy " : "",
1341d462a83cSMichael Baum 		config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1342d462a83cSMichael Baum 	if (config->devx) {
1343d462a83cSMichael Baum 		err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
13442eb4d010SOphir Munk 		if (err) {
13452eb4d010SOphir Munk 			err = -err;
13462eb4d010SOphir Munk 			goto error;
13472eb4d010SOphir Munk 		}
13483aa27915SSuanming Mou 		/* Check relax ordering support. */
1349e82ddd28STal Shnaiderman 		if (!haswell_broadwell_cpu) {
1350e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_write =
1351e82ddd28STal Shnaiderman 				config->hca_attr.relaxed_ordering_write;
1352e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_read =
1353e82ddd28STal Shnaiderman 				config->hca_attr.relaxed_ordering_read;
1354e82ddd28STal Shnaiderman 		} else {
1355e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_read = 0;
1356e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_write = 0;
1357e82ddd28STal Shnaiderman 		}
1358d61381adSViacheslav Ovsiienko 		sh->rq_ts_format = config->hca_attr.rq_ts_format;
1359d61381adSViacheslav Ovsiienko 		sh->sq_ts_format = config->hca_attr.sq_ts_format;
1360d61381adSViacheslav Ovsiienko 		sh->qp_ts_format = config->hca_attr.qp_ts_format;
13612eb4d010SOphir Munk 		/* Check for LRO support. */
1362d462a83cSMichael Baum 		if (config->dest_tir && config->hca_attr.lro_cap &&
1363d462a83cSMichael Baum 		    config->dv_flow_en) {
13642eb4d010SOphir Munk 			/* TBD check tunnel lro caps. */
1365d462a83cSMichael Baum 			config->lro.supported = config->hca_attr.lro_cap;
13662eb4d010SOphir Munk 			DRV_LOG(DEBUG, "Device supports LRO");
13672eb4d010SOphir Munk 			/*
13682eb4d010SOphir Munk 			 * If LRO timeout is not configured by application,
13692eb4d010SOphir Munk 			 * use the minimal supported value.
13702eb4d010SOphir Munk 			 */
1371d462a83cSMichael Baum 			if (!config->lro.timeout)
1372d462a83cSMichael Baum 				config->lro.timeout =
1373d462a83cSMichael Baum 				config->hca_attr.lro_timer_supported_periods[0];
13742eb4d010SOphir Munk 			DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1375d462a83cSMichael Baum 				config->lro.timeout);
1376613d64e4SDekel Peled 			DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1377613d64e4SDekel Peled 				"required for coalescing is %d bytes",
1378613d64e4SDekel Peled 				config->hca_attr.lro_min_mss_size);
13792eb4d010SOphir Munk 		}
1380c99b4f8bSLi Zhang #if defined(HAVE_MLX5DV_DR) && \
1381c99b4f8bSLi Zhang 	(defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1382c99b4f8bSLi Zhang 	 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1383d462a83cSMichael Baum 		if (config->hca_attr.qos.sup &&
1384b6505738SDekel Peled 		    config->hca_attr.qos.flow_meter_old &&
1385d462a83cSMichael Baum 		    config->dv_flow_en) {
13862eb4d010SOphir Munk 			uint8_t reg_c_mask =
1387d462a83cSMichael Baum 				config->hca_attr.qos.flow_meter_reg_c_ids;
13882eb4d010SOphir Munk 			/*
13892eb4d010SOphir Munk 			 * Meter needs two REG_C's for color match and pre-sfx
13902eb4d010SOphir Munk 			 * flow match. Here get the REG_C for color match.
13912eb4d010SOphir Munk 			 * REG_C_0 and REG_C_1 is reserved for metadata feature.
13922eb4d010SOphir Munk 			 */
13932eb4d010SOphir Munk 			reg_c_mask &= 0xfc;
13942eb4d010SOphir Munk 			if (__builtin_popcount(reg_c_mask) < 1) {
13952eb4d010SOphir Munk 				priv->mtr_en = 0;
13962eb4d010SOphir Munk 				DRV_LOG(WARNING, "No available register for"
13972eb4d010SOphir Munk 					" meter.");
13982eb4d010SOphir Munk 			} else {
139931ef2982SDekel Peled 				/*
140031ef2982SDekel Peled 				 * The meter color register is used by the
140131ef2982SDekel Peled 				 * flow-hit feature as well.
140231ef2982SDekel Peled 				 * The flow-hit feature must use REG_C_3
140331ef2982SDekel Peled 				 * Prefer REG_C_3 if it is available.
140431ef2982SDekel Peled 				 */
140531ef2982SDekel Peled 				if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
140631ef2982SDekel Peled 					priv->mtr_color_reg = REG_C_3;
140731ef2982SDekel Peled 				else
140831ef2982SDekel Peled 					priv->mtr_color_reg = ffs(reg_c_mask)
140931ef2982SDekel Peled 							      - 1 + REG_C_0;
14102eb4d010SOphir Munk 				priv->mtr_en = 1;
14112eb4d010SOphir Munk 				priv->mtr_reg_share =
1412b6505738SDekel Peled 				      config->hca_attr.qos.flow_meter;
14132eb4d010SOphir Munk 				DRV_LOG(DEBUG, "The REG_C meter uses is %d",
14142eb4d010SOphir Munk 					priv->mtr_color_reg);
14152eb4d010SOphir Munk 			}
14162eb4d010SOphir Munk 		}
141729efa63aSLi Zhang 		if (config->hca_attr.qos.sup &&
141829efa63aSLi Zhang 			config->hca_attr.qos.flow_meter_aso_sup) {
141929efa63aSLi Zhang 			uint32_t log_obj_size =
142029efa63aSLi Zhang 				rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
142129efa63aSLi Zhang 			if (log_obj_size >=
142229efa63aSLi Zhang 			config->hca_attr.qos.log_meter_aso_granularity &&
142329efa63aSLi Zhang 			log_obj_size <=
142444432018SLi Zhang 			config->hca_attr.qos.log_meter_aso_max_alloc)
142529efa63aSLi Zhang 				sh->meter_aso_en = 1;
142644432018SLi Zhang 		}
142744432018SLi Zhang 		if (priv->mtr_en) {
1428afb4aa4fSLi Zhang 			err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
142929efa63aSLi Zhang 			if (err) {
143029efa63aSLi Zhang 				err = -err;
143129efa63aSLi Zhang 				goto error;
143229efa63aSLi Zhang 			}
143329efa63aSLi Zhang 		}
1434630a587bSRongwei Liu 		if (config->hca_attr.flow.tunnel_header_0_1)
1435630a587bSRongwei Liu 			sh->tunnel_header_0_1 = 1;
14362eb4d010SOphir Munk #endif
1437a2999c7bSDekel Peled #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
143831ef2982SDekel Peled 		if (config->hca_attr.flow_hit_aso &&
143931ef2982SDekel Peled 		    priv->mtr_color_reg == REG_C_3) {
144031ef2982SDekel Peled 			sh->flow_hit_aso_en = 1;
144131ef2982SDekel Peled 			err = mlx5_flow_aso_age_mng_init(sh);
144231ef2982SDekel Peled 			if (err) {
144331ef2982SDekel Peled 				err = -err;
144431ef2982SDekel Peled 				goto error;
144531ef2982SDekel Peled 			}
144631ef2982SDekel Peled 			DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
144731ef2982SDekel Peled 		}
1448a2999c7bSDekel Peled #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1449ee9e5fadSBing Zhao #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1450ee9e5fadSBing Zhao 	defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1451ee9e5fadSBing Zhao 		if (config->hca_attr.ct_offload &&
1452ee9e5fadSBing Zhao 		    priv->mtr_color_reg == REG_C_3) {
1453ee9e5fadSBing Zhao 			err = mlx5_flow_aso_ct_mng_init(sh);
1454ee9e5fadSBing Zhao 			if (err) {
1455ee9e5fadSBing Zhao 				err = -err;
1456ee9e5fadSBing Zhao 				goto error;
1457ee9e5fadSBing Zhao 			}
1458ee9e5fadSBing Zhao 			DRV_LOG(DEBUG, "CT ASO is supported.");
1459ee9e5fadSBing Zhao 			sh->ct_aso_en = 1;
1460ee9e5fadSBing Zhao 		}
1461ee9e5fadSBing Zhao #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
146296b1f027SJiawei Wang #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
146396b1f027SJiawei Wang 		if (config->hca_attr.log_max_ft_sampler_num > 0  &&
146496b1f027SJiawei Wang 		    config->dv_flow_en) {
146596b1f027SJiawei Wang 			priv->sampler_en = 1;
14661b9e9826SThomas Monjalon 			DRV_LOG(DEBUG, "Sampler enabled!");
146796b1f027SJiawei Wang 		} else {
146896b1f027SJiawei Wang 			priv->sampler_en = 0;
146996b1f027SJiawei Wang 			if (!config->hca_attr.log_max_ft_sampler_num)
14701b9e9826SThomas Monjalon 				DRV_LOG(WARNING,
14711b9e9826SThomas Monjalon 					"No available register for sampler.");
147296b1f027SJiawei Wang 			else
14731b9e9826SThomas Monjalon 				DRV_LOG(DEBUG, "DV flow is not supported!");
147496b1f027SJiawei Wang 		}
147596b1f027SJiawei Wang #endif
14762eb4d010SOphir Munk 	}
14773d3f4e6dSAlexander Kozyrev 	if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
14783d3f4e6dSAlexander Kozyrev 	    !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
14793d3f4e6dSAlexander Kozyrev 		DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
14803d3f4e6dSAlexander Kozyrev 		config->cqe_comp = 0;
14813d3f4e6dSAlexander Kozyrev 	}
14823d3f4e6dSAlexander Kozyrev 	if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
14833d3f4e6dSAlexander Kozyrev 	    (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
14843d3f4e6dSAlexander Kozyrev 		DRV_LOG(WARNING, "Flow Tag CQE compression"
14853d3f4e6dSAlexander Kozyrev 				 " format isn't supported.");
14863d3f4e6dSAlexander Kozyrev 		config->cqe_comp = 0;
14873d3f4e6dSAlexander Kozyrev 	}
14883d3f4e6dSAlexander Kozyrev 	if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
14893d3f4e6dSAlexander Kozyrev 	    (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
14903d3f4e6dSAlexander Kozyrev 		DRV_LOG(WARNING, "L3/L4 Header CQE compression"
14913d3f4e6dSAlexander Kozyrev 				 " format isn't supported.");
14923d3f4e6dSAlexander Kozyrev 		config->cqe_comp = 0;
14933d3f4e6dSAlexander Kozyrev 	}
14943d3f4e6dSAlexander Kozyrev 	DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
14953d3f4e6dSAlexander Kozyrev 			config->cqe_comp ? "" : "not ");
1496d462a83cSMichael Baum 	if (config->tx_pp) {
14978f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1498d462a83cSMichael Baum 			config->hca_attr.dev_freq_khz);
14998f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1500d462a83cSMichael Baum 			config->hca_attr.qos.packet_pacing ? "" : "not ");
15018f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1502d462a83cSMichael Baum 			config->hca_attr.cross_channel ? "" : "not ");
15038f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1504d462a83cSMichael Baum 			config->hca_attr.wqe_index_ignore ? "" : "not ");
15058f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1506d462a83cSMichael Baum 			config->hca_attr.non_wire_sq ? "" : "not ");
15078f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1508d462a83cSMichael Baum 			config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1509d462a83cSMichael Baum 			config->hca_attr.log_max_static_sq_wq);
15108f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1511d462a83cSMichael Baum 			config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1512d462a83cSMichael Baum 		if (!config->devx) {
15138f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "DevX is required for packet pacing");
15148f848f32SViacheslav Ovsiienko 			err = ENODEV;
15158f848f32SViacheslav Ovsiienko 			goto error;
15168f848f32SViacheslav Ovsiienko 		}
1517d462a83cSMichael Baum 		if (!config->hca_attr.qos.packet_pacing) {
15188f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Packet pacing is not supported");
15198f848f32SViacheslav Ovsiienko 			err = ENODEV;
15208f848f32SViacheslav Ovsiienko 			goto error;
15218f848f32SViacheslav Ovsiienko 		}
1522d462a83cSMichael Baum 		if (!config->hca_attr.cross_channel) {
15238f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Cross channel operations are"
15248f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15258f848f32SViacheslav Ovsiienko 			err = ENODEV;
15268f848f32SViacheslav Ovsiienko 			goto error;
15278f848f32SViacheslav Ovsiienko 		}
1528d462a83cSMichael Baum 		if (!config->hca_attr.wqe_index_ignore) {
15298f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "WQE index ignore feature is"
15308f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15318f848f32SViacheslav Ovsiienko 			err = ENODEV;
15328f848f32SViacheslav Ovsiienko 			goto error;
15338f848f32SViacheslav Ovsiienko 		}
1534d462a83cSMichael Baum 		if (!config->hca_attr.non_wire_sq) {
15358f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Non-wire SQ feature is"
15368f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15378f848f32SViacheslav Ovsiienko 			err = ENODEV;
15388f848f32SViacheslav Ovsiienko 			goto error;
15398f848f32SViacheslav Ovsiienko 		}
1540d462a83cSMichael Baum 		if (!config->hca_attr.log_max_static_sq_wq) {
15418f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Static WQE SQ feature is"
15428f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15438f848f32SViacheslav Ovsiienko 			err = ENODEV;
15448f848f32SViacheslav Ovsiienko 			goto error;
15458f848f32SViacheslav Ovsiienko 		}
1546d462a83cSMichael Baum 		if (!config->hca_attr.qos.wqe_rate_pp) {
15478f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "WQE rate mode is required"
15488f848f32SViacheslav Ovsiienko 				     " for packet pacing");
15498f848f32SViacheslav Ovsiienko 			err = ENODEV;
15508f848f32SViacheslav Ovsiienko 			goto error;
15518f848f32SViacheslav Ovsiienko 		}
15528f848f32SViacheslav Ovsiienko #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
15538f848f32SViacheslav Ovsiienko 		DRV_LOG(ERR, "DevX does not provide UAR offset,"
15548f848f32SViacheslav Ovsiienko 			     " can't create queues for packet pacing");
15558f848f32SViacheslav Ovsiienko 		err = ENODEV;
15568f848f32SViacheslav Ovsiienko 		goto error;
15578f848f32SViacheslav Ovsiienko #endif
15588f848f32SViacheslav Ovsiienko 	}
1559d462a83cSMichael Baum 	if (config->devx) {
1560a2854c4dSViacheslav Ovsiienko 		uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1561a2854c4dSViacheslav Ovsiienko 
1562972a1bf8SViacheslav Ovsiienko 		err = config->hca_attr.access_register_user ?
1563972a1bf8SViacheslav Ovsiienko 			mlx5_devx_cmd_register_read
1564a2854c4dSViacheslav Ovsiienko 				(sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1565972a1bf8SViacheslav Ovsiienko 				reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1566a2854c4dSViacheslav Ovsiienko 		if (!err) {
1567a2854c4dSViacheslav Ovsiienko 			uint32_t ts_mode;
1568a2854c4dSViacheslav Ovsiienko 
1569a2854c4dSViacheslav Ovsiienko 			/* MTUTC register is read successfully. */
1570a2854c4dSViacheslav Ovsiienko 			ts_mode = MLX5_GET(register_mtutc, reg,
1571a2854c4dSViacheslav Ovsiienko 					   time_stamp_mode);
1572a2854c4dSViacheslav Ovsiienko 			if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1573d462a83cSMichael Baum 				config->rt_timestamp = 1;
1574a2854c4dSViacheslav Ovsiienko 		} else {
1575a2854c4dSViacheslav Ovsiienko 			/* Kernel does not support register reading. */
1576d462a83cSMichael Baum 			if (config->hca_attr.dev_freq_khz ==
1577a2854c4dSViacheslav Ovsiienko 						 (NS_PER_S / MS_PER_S))
1578d462a83cSMichael Baum 				config->rt_timestamp = 1;
1579a2854c4dSViacheslav Ovsiienko 		}
1580a2854c4dSViacheslav Ovsiienko 	}
158150f95b23SSuanming Mou 	/*
158250f95b23SSuanming Mou 	 * If HW has bug working with tunnel packet decapsulation and
158350f95b23SSuanming Mou 	 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
158450f95b23SSuanming Mou 	 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
158550f95b23SSuanming Mou 	 */
1586d462a83cSMichael Baum 	if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1587d462a83cSMichael Baum 		config->hw_fcs_strip = 0;
158850f95b23SSuanming Mou 	DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1589d462a83cSMichael Baum 		(config->hw_fcs_strip ? "" : "not "));
1590d462a83cSMichael Baum 	if (config->mprq.enabled && mprq) {
1591d462a83cSMichael Baum 		if (config->mprq.stride_num_n &&
1592d462a83cSMichael Baum 		    (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1593d462a83cSMichael Baum 		     config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1594d462a83cSMichael Baum 			config->mprq.stride_num_n =
15952eb4d010SOphir Munk 				RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
15962eb4d010SOphir Munk 						mprq_min_stride_num_n),
15972eb4d010SOphir Munk 					mprq_max_stride_num_n);
15982eb4d010SOphir Munk 			DRV_LOG(WARNING,
15992eb4d010SOphir Munk 				"the number of strides"
16002eb4d010SOphir Munk 				" for Multi-Packet RQ is out of range,"
16012eb4d010SOphir Munk 				" setting default value (%u)",
1602d462a83cSMichael Baum 				1 << config->mprq.stride_num_n);
16032eb4d010SOphir Munk 		}
1604d462a83cSMichael Baum 		if (config->mprq.stride_size_n &&
1605d462a83cSMichael Baum 		    (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1606d462a83cSMichael Baum 		     config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1607d462a83cSMichael Baum 			config->mprq.stride_size_n =
16082eb4d010SOphir Munk 				RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
16092eb4d010SOphir Munk 						mprq_min_stride_size_n),
16102eb4d010SOphir Munk 					mprq_max_stride_size_n);
16112eb4d010SOphir Munk 			DRV_LOG(WARNING,
16122eb4d010SOphir Munk 				"the size of a stride"
16132eb4d010SOphir Munk 				" for Multi-Packet RQ is out of range,"
16142eb4d010SOphir Munk 				" setting default value (%u)",
1615d462a83cSMichael Baum 				1 << config->mprq.stride_size_n);
16162eb4d010SOphir Munk 		}
1617d462a83cSMichael Baum 		config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1618d462a83cSMichael Baum 		config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1619d462a83cSMichael Baum 	} else if (config->mprq.enabled && !mprq) {
16202eb4d010SOphir Munk 		DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1621d462a83cSMichael Baum 		config->mprq.enabled = 0;
16222eb4d010SOphir Munk 	}
1623d462a83cSMichael Baum 	if (config->max_dump_files_num == 0)
1624d462a83cSMichael Baum 		config->max_dump_files_num = 128;
16252eb4d010SOphir Munk 	eth_dev = rte_eth_dev_allocate(name);
16262eb4d010SOphir Munk 	if (eth_dev == NULL) {
16272eb4d010SOphir Munk 		DRV_LOG(ERR, "can not allocate rte ethdev");
16282eb4d010SOphir Munk 		err = ENOMEM;
16292eb4d010SOphir Munk 		goto error;
16302eb4d010SOphir Munk 	}
16312eb4d010SOphir Munk 	if (priv->representor) {
16322eb4d010SOphir Munk 		eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
16332eb4d010SOphir Munk 		eth_dev->data->representor_id = priv->representor_id;
16342eb4d010SOphir Munk 	}
163539ae7577SSuanming Mou 	priv->mp_id.port_id = eth_dev->data->port_id;
163639ae7577SSuanming Mou 	strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
16372eb4d010SOphir Munk 	/*
16382eb4d010SOphir Munk 	 * Store associated network device interface index. This index
16392eb4d010SOphir Munk 	 * is permanent throughout the lifetime of device. So, we may store
16402eb4d010SOphir Munk 	 * the ifindex here and use the cached value further.
16412eb4d010SOphir Munk 	 */
16422eb4d010SOphir Munk 	MLX5_ASSERT(spawn->ifindex);
16432eb4d010SOphir Munk 	priv->if_index = spawn->ifindex;
16442eb4d010SOphir Munk 	eth_dev->data->dev_private = priv;
16452eb4d010SOphir Munk 	priv->dev_data = eth_dev->data;
16462eb4d010SOphir Munk 	eth_dev->data->mac_addrs = priv->mac;
16472eb4d010SOphir Munk 	eth_dev->device = dpdk_dev;
1648f30e69b4SFerruh Yigit 	eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
16492eb4d010SOphir Munk 	/* Configure the first MAC address by default. */
16502eb4d010SOphir Munk 	if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
16512eb4d010SOphir Munk 		DRV_LOG(ERR,
16522eb4d010SOphir Munk 			"port %u cannot get MAC address, is mlx5_en"
16532eb4d010SOphir Munk 			" loaded? (errno: %s)",
16542eb4d010SOphir Munk 			eth_dev->data->port_id, strerror(rte_errno));
16552eb4d010SOphir Munk 		err = ENODEV;
16562eb4d010SOphir Munk 		goto error;
16572eb4d010SOphir Munk 	}
16582eb4d010SOphir Munk 	DRV_LOG(INFO,
16592eb4d010SOphir Munk 		"port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
16602eb4d010SOphir Munk 		eth_dev->data->port_id,
16612eb4d010SOphir Munk 		mac.addr_bytes[0], mac.addr_bytes[1],
16622eb4d010SOphir Munk 		mac.addr_bytes[2], mac.addr_bytes[3],
16632eb4d010SOphir Munk 		mac.addr_bytes[4], mac.addr_bytes[5]);
16642eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG
16652eb4d010SOphir Munk 	{
166628743807STal Shnaiderman 		char ifname[MLX5_NAMESIZE];
16672eb4d010SOphir Munk 
16682eb4d010SOphir Munk 		if (mlx5_get_ifname(eth_dev, &ifname) == 0)
16692eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
16702eb4d010SOphir Munk 				eth_dev->data->port_id, ifname);
16712eb4d010SOphir Munk 		else
16722eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is unknown",
16732eb4d010SOphir Munk 				eth_dev->data->port_id);
16742eb4d010SOphir Munk 	}
16752eb4d010SOphir Munk #endif
16762eb4d010SOphir Munk 	/* Get actual MTU if possible. */
16772eb4d010SOphir Munk 	err = mlx5_get_mtu(eth_dev, &priv->mtu);
16782eb4d010SOphir Munk 	if (err) {
16792eb4d010SOphir Munk 		err = rte_errno;
16802eb4d010SOphir Munk 		goto error;
16812eb4d010SOphir Munk 	}
16822eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
16832eb4d010SOphir Munk 		priv->mtu);
16842eb4d010SOphir Munk 	/* Initialize burst functions to prevent crashes before link-up. */
16852eb4d010SOphir Munk 	eth_dev->rx_pkt_burst = removed_rx_burst;
16862eb4d010SOphir Munk 	eth_dev->tx_pkt_burst = removed_tx_burst;
1687b012b4ceSOphir Munk 	eth_dev->dev_ops = &mlx5_dev_ops;
1688cbfc6111SFerruh Yigit 	eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1689cbfc6111SFerruh Yigit 	eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1690cbfc6111SFerruh Yigit 	eth_dev->rx_queue_count = mlx5_rx_queue_count;
16912eb4d010SOphir Munk 	/* Register MAC address. */
16922eb4d010SOphir Munk 	claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1693d462a83cSMichael Baum 	if (config->vf && config->vf_nl_en)
16942eb4d010SOphir Munk 		mlx5_nl_mac_addr_sync(priv->nl_socket_route,
16952eb4d010SOphir Munk 				      mlx5_ifindex(eth_dev),
16962eb4d010SOphir Munk 				      eth_dev->data->mac_addrs,
16972eb4d010SOphir Munk 				      MLX5_MAX_MAC_ADDRESSES);
16982eb4d010SOphir Munk 	priv->ctrl_flows = 0;
1699d163fc2dSXueming Li 	rte_spinlock_init(&priv->flow_list_lock);
17002eb4d010SOphir Munk 	TAILQ_INIT(&priv->flow_meters);
1701a295c69aSShun Hao 	priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1702a295c69aSShun Hao 	if (!priv->mtr_profile_tbl)
1703a295c69aSShun Hao 		goto error;
17042eb4d010SOphir Munk 	/* Hint libmlx5 to use PMD allocator for data plane resources */
170536dabceaSMichael Baum 	mlx5_glue->dv_set_context_attr(sh->ctx,
170636dabceaSMichael Baum 			MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
170736dabceaSMichael Baum 			(void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
17082eb4d010SOphir Munk 				.alloc = &mlx5_alloc_verbs_buf,
17092eb4d010SOphir Munk 				.free = &mlx5_free_verbs_buf,
171081c3b977SViacheslav Ovsiienko 				.data = sh,
171136dabceaSMichael Baum 			}));
17122eb4d010SOphir Munk 	/* Bring Ethernet device up. */
17132eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
17142eb4d010SOphir Munk 		eth_dev->data->port_id);
17152eb4d010SOphir Munk 	mlx5_set_link_up(eth_dev);
17162eb4d010SOphir Munk 	/*
17172eb4d010SOphir Munk 	 * Even though the interrupt handler is not installed yet,
17182eb4d010SOphir Munk 	 * interrupts will still trigger on the async_fd from
17192eb4d010SOphir Munk 	 * Verbs context returned by ibv_open_device().
17202eb4d010SOphir Munk 	 */
17212eb4d010SOphir Munk 	mlx5_link_update(eth_dev, 0);
17222eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
1723d462a83cSMichael Baum 	if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
17242eb4d010SOphir Munk 	      (switch_info->representor || switch_info->master)))
1725d462a83cSMichael Baum 		config->dv_esw_en = 0;
17262eb4d010SOphir Munk #else
1727d462a83cSMichael Baum 	config->dv_esw_en = 0;
17282eb4d010SOphir Munk #endif
17292eb4d010SOphir Munk 	/* Detect minimal data bytes to inline. */
1730d462a83cSMichael Baum 	mlx5_set_min_inline(spawn, config);
17312eb4d010SOphir Munk 	/* Store device configuration on private structure. */
1732d462a83cSMichael Baum 	priv->config = *config;
1733b4edeaf3SSuanming Mou 	for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1734b4edeaf3SSuanming Mou 		icfg[i].release_mem_en = !!config->reclaim_mode;
1735b4edeaf3SSuanming Mou 		if (config->reclaim_mode)
1736b4edeaf3SSuanming Mou 			icfg[i].per_core_cache = 0;
1737b4edeaf3SSuanming Mou 		priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1738b4edeaf3SSuanming Mou 		if (!priv->flows[i])
1739b4edeaf3SSuanming Mou 			goto error;
1740b4edeaf3SSuanming Mou 	}
17412eb4d010SOphir Munk 	/* Create context for virtual machine VLAN workaround. */
17422eb4d010SOphir Munk 	priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1743d462a83cSMichael Baum 	if (config->dv_flow_en) {
17442eb4d010SOphir Munk 		err = mlx5_alloc_shared_dr(priv);
17452eb4d010SOphir Munk 		if (err)
17462eb4d010SOphir Munk 			goto error;
17472eb4d010SOphir Munk 	}
17487aa9892fSMichael Baum 	if (config->devx && config->dv_flow_en && config->dest_tir) {
17495eaf882eSMichael Baum 		priv->obj_ops = devx_obj_ops;
17500c762e81SMichael Baum 		priv->obj_ops.drop_action_create =
17510c762e81SMichael Baum 						ibv_obj_ops.drop_action_create;
17520c762e81SMichael Baum 		priv->obj_ops.drop_action_destroy =
17530c762e81SMichael Baum 						ibv_obj_ops.drop_action_destroy;
17545d9f3c3fSMichael Baum #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
17555d9f3c3fSMichael Baum 		priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
17565d9f3c3fSMichael Baum #else
17573ec73abeSMatan Azrad 		if (config->dv_esw_en)
17585d9f3c3fSMichael Baum 			priv->obj_ops.txq_obj_modify =
17595d9f3c3fSMichael Baum 						ibv_obj_ops.txq_obj_modify;
17605d9f3c3fSMichael Baum #endif
17613ec73abeSMatan Azrad 		/* Use specific wrappers for Tx object. */
17623ec73abeSMatan Azrad 		priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
17633ec73abeSMatan Azrad 		priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1764e6988afdSMatan Azrad 		mlx5_queue_counter_id_prepare(eth_dev);
176523233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_create =
176623233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_create;
176723233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_release =
176823233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_release;
17695eaf882eSMichael Baum 	} else {
17705eaf882eSMichael Baum 		priv->obj_ops = ibv_obj_ops;
17715eaf882eSMichael Baum 	}
177265b3cd0dSSuanming Mou 	priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
177365b3cd0dSSuanming Mou 	if (!priv->drop_queue.hrxq)
177465b3cd0dSSuanming Mou 		goto error;
17752eb4d010SOphir Munk 	/* Supported Verbs flow priority number detection. */
17762eb4d010SOphir Munk 	err = mlx5_flow_discover_priorities(eth_dev);
17772eb4d010SOphir Munk 	if (err < 0) {
17782eb4d010SOphir Munk 		err = -err;
17792eb4d010SOphir Munk 		goto error;
17802eb4d010SOphir Munk 	}
17812eb4d010SOphir Munk 	priv->config.flow_prio = err;
17822eb4d010SOphir Munk 	if (!priv->config.dv_esw_en &&
17832eb4d010SOphir Munk 	    priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
17842eb4d010SOphir Munk 		DRV_LOG(WARNING, "metadata mode %u is not supported "
17852eb4d010SOphir Munk 				 "(no E-Switch)", priv->config.dv_xmeta_en);
17862eb4d010SOphir Munk 		priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
17872eb4d010SOphir Munk 	}
17882eb4d010SOphir Munk 	mlx5_set_metadata_mask(eth_dev);
17892eb4d010SOphir Munk 	if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
17902eb4d010SOphir Munk 	    !priv->sh->dv_regc0_mask) {
17912eb4d010SOphir Munk 		DRV_LOG(ERR, "metadata mode %u is not supported "
17922eb4d010SOphir Munk 			     "(no metadata reg_c[0] is available)",
17932eb4d010SOphir Munk 			     priv->config.dv_xmeta_en);
17942eb4d010SOphir Munk 			err = ENOTSUP;
17952eb4d010SOphir Munk 			goto error;
17962eb4d010SOphir Munk 	}
1797d03b7860SSuanming Mou 	priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1798d03b7860SSuanming Mou 				       mlx5_hrxq_create_cb,
1799e1592b6cSSuanming Mou 				       mlx5_hrxq_match_cb,
1800491b7137SMatan Azrad 				       mlx5_hrxq_remove_cb,
1801491b7137SMatan Azrad 				       mlx5_hrxq_clone_cb,
1802491b7137SMatan Azrad 				       mlx5_hrxq_clone_free_cb);
1803679f46c7SMatan Azrad 	if (!priv->hrxqs)
1804679f46c7SMatan Azrad 		goto error;
1805491b7137SMatan Azrad 	rte_rwlock_init(&priv->ind_tbls_lock);
18062eb4d010SOphir Munk 	/* Query availability of metadata reg_c's. */
18072eb4d010SOphir Munk 	err = mlx5_flow_discover_mreg_c(eth_dev);
18082eb4d010SOphir Munk 	if (err < 0) {
18092eb4d010SOphir Munk 		err = -err;
18102eb4d010SOphir Munk 		goto error;
18112eb4d010SOphir Munk 	}
18122eb4d010SOphir Munk 	if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
18132eb4d010SOphir Munk 		DRV_LOG(DEBUG,
18142eb4d010SOphir Munk 			"port %u extensive metadata register is not supported",
18152eb4d010SOphir Munk 			eth_dev->data->port_id);
18162eb4d010SOphir Munk 		if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
18172eb4d010SOphir Munk 			DRV_LOG(ERR, "metadata mode %u is not supported "
18182eb4d010SOphir Munk 				     "(no metadata registers available)",
18192eb4d010SOphir Munk 				     priv->config.dv_xmeta_en);
18202eb4d010SOphir Munk 			err = ENOTSUP;
18212eb4d010SOphir Munk 			goto error;
18222eb4d010SOphir Munk 		}
18232eb4d010SOphir Munk 	}
18242eb4d010SOphir Munk 	if (priv->config.dv_flow_en &&
18252eb4d010SOphir Munk 	    priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
18262eb4d010SOphir Munk 	    mlx5_flow_ext_mreg_supported(eth_dev) &&
18272eb4d010SOphir Munk 	    priv->sh->dv_regc0_mask) {
18282eb4d010SOphir Munk 		priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1829e69a5922SXueming Li 						      MLX5_FLOW_MREG_HTABLE_SZ,
1830961b6774SMatan Azrad 						      false, true, eth_dev,
1831f7f73ac1SXueming Li 						      flow_dv_mreg_create_cb,
1832f5b0aed2SSuanming Mou 						      flow_dv_mreg_match_cb,
1833961b6774SMatan Azrad 						      flow_dv_mreg_remove_cb,
1834961b6774SMatan Azrad 						      flow_dv_mreg_clone_cb,
1835961b6774SMatan Azrad 						    flow_dv_mreg_clone_free_cb);
18362eb4d010SOphir Munk 		if (!priv->mreg_cp_tbl) {
18372eb4d010SOphir Munk 			err = ENOMEM;
18382eb4d010SOphir Munk 			goto error;
18392eb4d010SOphir Munk 		}
18402eb4d010SOphir Munk 	}
1841cc608e4dSSuanming Mou 	rte_spinlock_init(&priv->shared_act_sl);
1842994829e6SSuanming Mou 	mlx5_flow_counter_mode_config(eth_dev);
18439fbe97f0SXueming Li 	if (priv->config.dv_flow_en)
18449fbe97f0SXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
18452eb4d010SOphir Munk 	return eth_dev;
18462eb4d010SOphir Munk error:
18472eb4d010SOphir Munk 	if (priv) {
18482eb4d010SOphir Munk 		if (priv->mreg_cp_tbl)
1849e69a5922SXueming Li 			mlx5_hlist_destroy(priv->mreg_cp_tbl);
18502eb4d010SOphir Munk 		if (priv->sh)
18512eb4d010SOphir Munk 			mlx5_os_free_shared_dr(priv);
18522eb4d010SOphir Munk 		if (priv->nl_socket_route >= 0)
18532eb4d010SOphir Munk 			close(priv->nl_socket_route);
18542eb4d010SOphir Munk 		if (priv->nl_socket_rdma >= 0)
18552eb4d010SOphir Munk 			close(priv->nl_socket_rdma);
18562eb4d010SOphir Munk 		if (priv->vmwa_context)
18572eb4d010SOphir Munk 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
185865b3cd0dSSuanming Mou 		if (eth_dev && priv->drop_queue.hrxq)
185965b3cd0dSSuanming Mou 			mlx5_drop_action_destroy(eth_dev);
1860a295c69aSShun Hao 		if (priv->mtr_profile_tbl)
1861a295c69aSShun Hao 			mlx5_l3t_destroy(priv->mtr_profile_tbl);
18622eb4d010SOphir Munk 		if (own_domain_id)
18632eb4d010SOphir Munk 			claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1864679f46c7SMatan Azrad 		if (priv->hrxqs)
1865679f46c7SMatan Azrad 			mlx5_list_destroy(priv->hrxqs);
18662175c4dcSSuanming Mou 		mlx5_free(priv);
18672eb4d010SOphir Munk 		if (eth_dev != NULL)
18682eb4d010SOphir Munk 			eth_dev->data->dev_private = NULL;
18692eb4d010SOphir Munk 	}
18702eb4d010SOphir Munk 	if (eth_dev != NULL) {
18712eb4d010SOphir Munk 		/* mac_addrs must not be freed alone because part of
18722eb4d010SOphir Munk 		 * dev_private
18732eb4d010SOphir Munk 		 **/
18742eb4d010SOphir Munk 		eth_dev->data->mac_addrs = NULL;
18752eb4d010SOphir Munk 		rte_eth_dev_release_port(eth_dev);
18762eb4d010SOphir Munk 	}
18772eb4d010SOphir Munk 	if (sh)
187891389890SOphir Munk 		mlx5_free_shared_dev_ctx(sh);
18792eb4d010SOphir Munk 	MLX5_ASSERT(err > 0);
18802eb4d010SOphir Munk 	rte_errno = err;
18812eb4d010SOphir Munk 	return NULL;
18822eb4d010SOphir Munk }
18832eb4d010SOphir Munk 
18842eb4d010SOphir Munk /**
18852eb4d010SOphir Munk  * Comparison callback to sort device data.
18862eb4d010SOphir Munk  *
18872eb4d010SOphir Munk  * This is meant to be used with qsort().
18882eb4d010SOphir Munk  *
18892eb4d010SOphir Munk  * @param a[in]
18902eb4d010SOphir Munk  *   Pointer to pointer to first data object.
18912eb4d010SOphir Munk  * @param b[in]
18922eb4d010SOphir Munk  *   Pointer to pointer to second data object.
18932eb4d010SOphir Munk  *
18942eb4d010SOphir Munk  * @return
18952eb4d010SOphir Munk  *   0 if both objects are equal, less than 0 if the first argument is less
18962eb4d010SOphir Munk  *   than the second, greater than 0 otherwise.
18972eb4d010SOphir Munk  */
18982eb4d010SOphir Munk static int
18992eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b)
19002eb4d010SOphir Munk {
19012eb4d010SOphir Munk 	const struct mlx5_switch_info *si_a =
19022eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)a)->info;
19032eb4d010SOphir Munk 	const struct mlx5_switch_info *si_b =
19042eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)b)->info;
19052eb4d010SOphir Munk 	int ret;
19062eb4d010SOphir Munk 
19072eb4d010SOphir Munk 	/* Master device first. */
19082eb4d010SOphir Munk 	ret = si_b->master - si_a->master;
19092eb4d010SOphir Munk 	if (ret)
19102eb4d010SOphir Munk 		return ret;
19112eb4d010SOphir Munk 	/* Then representor devices. */
19122eb4d010SOphir Munk 	ret = si_b->representor - si_a->representor;
19132eb4d010SOphir Munk 	if (ret)
19142eb4d010SOphir Munk 		return ret;
19152eb4d010SOphir Munk 	/* Unidentified devices come last in no specific order. */
19162eb4d010SOphir Munk 	if (!si_a->representor)
19172eb4d010SOphir Munk 		return 0;
19182eb4d010SOphir Munk 	/* Order representors by name. */
19192eb4d010SOphir Munk 	return si_a->port_name - si_b->port_name;
19202eb4d010SOphir Munk }
19212eb4d010SOphir Munk 
19222eb4d010SOphir Munk /**
19232eb4d010SOphir Munk  * Match PCI information for possible slaves of bonding device.
19242eb4d010SOphir Munk  *
19252eb4d010SOphir Munk  * @param[in] ibv_dev
19262eb4d010SOphir Munk  *   Pointer to Infiniband device structure.
19272eb4d010SOphir Munk  * @param[in] pci_dev
1928f926cce3SXueming Li  *   Pointer to primary PCI address structure to match.
19292eb4d010SOphir Munk  * @param[in] nl_rdma
19302eb4d010SOphir Munk  *   Netlink RDMA group socket handle.
1931f926cce3SXueming Li  * @param[in] owner
1932f926cce3SXueming Li  *   Rerepsentor owner PF index.
1933f5f4c482SXueming Li  * @param[out] bond_info
1934f5f4c482SXueming Li  *   Pointer to bonding information.
19352eb4d010SOphir Munk  *
19362eb4d010SOphir Munk  * @return
19372eb4d010SOphir Munk  *   negative value if no bonding device found, otherwise
19382eb4d010SOphir Munk  *   positive index of slave PF in bonding.
19392eb4d010SOphir Munk  */
19402eb4d010SOphir Munk static int
19412eb4d010SOphir Munk mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1942f926cce3SXueming Li 			   const struct rte_pci_addr *pci_dev,
1943f5f4c482SXueming Li 			   int nl_rdma, uint16_t owner,
1944f5f4c482SXueming Li 			   struct mlx5_bond_info *bond_info)
19452eb4d010SOphir Munk {
19462eb4d010SOphir Munk 	char ifname[IF_NAMESIZE + 1];
19472eb4d010SOphir Munk 	unsigned int ifindex;
19482eb4d010SOphir Munk 	unsigned int np, i;
1949f5f4c482SXueming Li 	FILE *bond_file = NULL, *file;
19502eb4d010SOphir Munk 	int pf = -1;
1951f5f4c482SXueming Li 	int ret;
19522eb4d010SOphir Munk 
19532eb4d010SOphir Munk 	/*
19542eb4d010SOphir Munk 	 * Try to get master device name. If something goes
19552eb4d010SOphir Munk 	 * wrong suppose the lack of kernel support and no
19562eb4d010SOphir Munk 	 * bonding devices.
19572eb4d010SOphir Munk 	 */
1958f5f4c482SXueming Li 	memset(bond_info, 0, sizeof(*bond_info));
19592eb4d010SOphir Munk 	if (nl_rdma < 0)
19602eb4d010SOphir Munk 		return -1;
19612eb4d010SOphir Munk 	if (!strstr(ibv_dev->name, "bond"))
19622eb4d010SOphir Munk 		return -1;
19632eb4d010SOphir Munk 	np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
19642eb4d010SOphir Munk 	if (!np)
19652eb4d010SOphir Munk 		return -1;
19662eb4d010SOphir Munk 	/*
19672eb4d010SOphir Munk 	 * The Master device might not be on the predefined
19682eb4d010SOphir Munk 	 * port (not on port index 1, it is not garanted),
19692eb4d010SOphir Munk 	 * we have to scan all Infiniband device port and
19702eb4d010SOphir Munk 	 * find master.
19712eb4d010SOphir Munk 	 */
19722eb4d010SOphir Munk 	for (i = 1; i <= np; ++i) {
19732eb4d010SOphir Munk 		/* Check whether Infiniband port is populated. */
19742eb4d010SOphir Munk 		ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
19752eb4d010SOphir Munk 		if (!ifindex)
19762eb4d010SOphir Munk 			continue;
19772eb4d010SOphir Munk 		if (!if_indextoname(ifindex, ifname))
19782eb4d010SOphir Munk 			continue;
19792eb4d010SOphir Munk 		/* Try to read bonding slave names from sysfs. */
19802eb4d010SOphir Munk 		MKSTR(slaves,
19812eb4d010SOphir Munk 		      "/sys/class/net/%s/master/bonding/slaves", ifname);
1982f5f4c482SXueming Li 		bond_file = fopen(slaves, "r");
1983f5f4c482SXueming Li 		if (bond_file)
19842eb4d010SOphir Munk 			break;
19852eb4d010SOphir Munk 	}
1986f5f4c482SXueming Li 	if (!bond_file)
19872eb4d010SOphir Munk 		return -1;
19882eb4d010SOphir Munk 	/* Use safe format to check maximal buffer length. */
19892eb4d010SOphir Munk 	MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1990f5f4c482SXueming Li 	while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
19912eb4d010SOphir Munk 		char tmp_str[IF_NAMESIZE + 32];
19922eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
19932eb4d010SOphir Munk 		struct mlx5_switch_info	info;
19942eb4d010SOphir Munk 
19952eb4d010SOphir Munk 		/* Process slave interface names in the loop. */
19962eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
19972eb4d010SOphir Munk 			 "/sys/class/net/%s", ifname);
19982eb4d010SOphir Munk 		if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
19992eb4d010SOphir Munk 			DRV_LOG(WARNING, "can not get PCI address"
20002eb4d010SOphir Munk 					 " for netdev \"%s\"", ifname);
20012eb4d010SOphir Munk 			continue;
20022eb4d010SOphir Munk 		}
20032eb4d010SOphir Munk 		/* Slave interface PCI address match found. */
20042eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
20052eb4d010SOphir Munk 			 "/sys/class/net/%s/phys_port_name", ifname);
20062eb4d010SOphir Munk 		file = fopen(tmp_str, "rb");
20072eb4d010SOphir Munk 		if (!file)
20082eb4d010SOphir Munk 			break;
20092eb4d010SOphir Munk 		info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
20102eb4d010SOphir Munk 		if (fscanf(file, "%32s", tmp_str) == 1)
20112eb4d010SOphir Munk 			mlx5_translate_port_name(tmp_str, &info);
2012f5f4c482SXueming Li 		fclose(file);
2013f5f4c482SXueming Li 		/* Only process PF ports. */
2014f5f4c482SXueming Li 		if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2015f5f4c482SXueming Li 		    info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2016f5f4c482SXueming Li 			continue;
2017f5f4c482SXueming Li 		/* Check max bonding member. */
2018f5f4c482SXueming Li 		if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2019f5f4c482SXueming Li 			DRV_LOG(WARNING, "bonding index out of range, "
2020f5f4c482SXueming Li 				"please increase MLX5_BOND_MAX_PORTS: %s",
2021f5f4c482SXueming Li 				tmp_str);
20222eb4d010SOphir Munk 			break;
20232eb4d010SOphir Munk 		}
2024d31a8971SXueming Li 		/* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2025f5f4c482SXueming Li 		if (pci_dev->domain == pci_addr.domain &&
2026f5f4c482SXueming Li 		    pci_dev->bus == pci_addr.bus &&
2027f5f4c482SXueming Li 		    pci_dev->devid == pci_addr.devid &&
2028d31a8971SXueming Li 		    ((pci_dev->function == 0 &&
2029d31a8971SXueming Li 		      pci_dev->function + owner == pci_addr.function) ||
2030d31a8971SXueming Li 		     (pci_dev->function == owner &&
2031d31a8971SXueming Li 		      pci_addr.function == owner)))
2032f5f4c482SXueming Li 			pf = info.port_name;
2033f5f4c482SXueming Li 		/* Get ifindex. */
2034f5f4c482SXueming Li 		snprintf(tmp_str, sizeof(tmp_str),
2035f5f4c482SXueming Li 			 "/sys/class/net/%s/ifindex", ifname);
2036f5f4c482SXueming Li 		file = fopen(tmp_str, "rb");
2037f5f4c482SXueming Li 		if (!file)
2038f5f4c482SXueming Li 			break;
2039f5f4c482SXueming Li 		ret = fscanf(file, "%u", &ifindex);
20402eb4d010SOphir Munk 		fclose(file);
2041f5f4c482SXueming Li 		if (ret != 1)
2042f5f4c482SXueming Li 			break;
2043f5f4c482SXueming Li 		/* Save bonding info. */
2044f5f4c482SXueming Li 		strncpy(bond_info->ports[info.port_name].ifname, ifname,
2045f5f4c482SXueming Li 			sizeof(bond_info->ports[0].ifname));
2046f5f4c482SXueming Li 		bond_info->ports[info.port_name].pci_addr = pci_addr;
2047f5f4c482SXueming Li 		bond_info->ports[info.port_name].ifindex = ifindex;
2048f5f4c482SXueming Li 		bond_info->n_port++;
2049f5f4c482SXueming Li 	}
2050f5f4c482SXueming Li 	if (pf >= 0) {
2051f5f4c482SXueming Li 		/* Get bond interface info */
2052f5f4c482SXueming Li 		ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2053f5f4c482SXueming Li 					   bond_info->ifname);
2054f5f4c482SXueming Li 		if (ret)
2055f5f4c482SXueming Li 			DRV_LOG(ERR, "unable to get bond info: %s",
2056f5f4c482SXueming Li 				strerror(rte_errno));
2057f5f4c482SXueming Li 		else
2058f5f4c482SXueming Li 			DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2059f5f4c482SXueming Li 				ifindex, bond_info->ifindex, bond_info->ifname);
2060f5f4c482SXueming Li 	}
20612eb4d010SOphir Munk 	return pf;
20622eb4d010SOphir Munk }
20632eb4d010SOphir Munk 
20642eb4d010SOphir Munk /**
206508c2772fSXueming Li  * Register a PCI device within bonding.
20662eb4d010SOphir Munk  *
206708c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device and
206808c2772fSXueming Li  * bonding owner PF index.
20692eb4d010SOphir Munk  *
20702eb4d010SOphir Munk  * @param[in] pci_dev
20712eb4d010SOphir Munk  *   PCI device information.
207208c2772fSXueming Li  * @param[in] req_eth_da
207308c2772fSXueming Li  *   Requested ethdev device argument.
207408c2772fSXueming Li  * @param[in] owner_id
207508c2772fSXueming Li  *   Requested owner PF port ID within bonding device, default to 0.
20762eb4d010SOphir Munk  *
20772eb4d010SOphir Munk  * @return
20782eb4d010SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
20792eb4d010SOphir Munk  */
208008c2772fSXueming Li static int
208108c2772fSXueming Li mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
208208c2772fSXueming Li 		     struct rte_eth_devargs *req_eth_da,
208308c2772fSXueming Li 		     uint16_t owner_id)
20842eb4d010SOphir Munk {
20852eb4d010SOphir Munk 	struct ibv_device **ibv_list;
20862eb4d010SOphir Munk 	/*
20872eb4d010SOphir Munk 	 * Number of found IB Devices matching with requested PCI BDF.
20882eb4d010SOphir Munk 	 * nd != 1 means there are multiple IB devices over the same
20892eb4d010SOphir Munk 	 * PCI device and we have representors and master.
20902eb4d010SOphir Munk 	 */
20912eb4d010SOphir Munk 	unsigned int nd = 0;
20922eb4d010SOphir Munk 	/*
20932eb4d010SOphir Munk 	 * Number of found IB device Ports. nd = 1 and np = 1..n means
20942eb4d010SOphir Munk 	 * we have the single multiport IB device, and there may be
20952eb4d010SOphir Munk 	 * representors attached to some of found ports.
20962eb4d010SOphir Munk 	 */
20972eb4d010SOphir Munk 	unsigned int np = 0;
20982eb4d010SOphir Munk 	/*
20992eb4d010SOphir Munk 	 * Number of DPDK ethernet devices to Spawn - either over
21002eb4d010SOphir Munk 	 * multiple IB devices or multiple ports of single IB device.
21012eb4d010SOphir Munk 	 * Actually this is the number of iterations to spawn.
21022eb4d010SOphir Munk 	 */
21032eb4d010SOphir Munk 	unsigned int ns = 0;
21042eb4d010SOphir Munk 	/*
21052eb4d010SOphir Munk 	 * Bonding device
21062eb4d010SOphir Munk 	 *   < 0 - no bonding device (single one)
21072eb4d010SOphir Munk 	 *  >= 0 - bonding device (value is slave PF index)
21082eb4d010SOphir Munk 	 */
21092eb4d010SOphir Munk 	int bd = -1;
21102eb4d010SOphir Munk 	struct mlx5_dev_spawn_data *list = NULL;
21112eb4d010SOphir Munk 	struct mlx5_dev_config dev_config;
2112d462a83cSMichael Baum 	unsigned int dev_config_vf;
211308c2772fSXueming Li 	struct rte_eth_devargs eth_da = *req_eth_da;
2114f926cce3SXueming Li 	struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2115f5f4c482SXueming Li 	struct mlx5_bond_info bond_info;
2116f926cce3SXueming Li 	int ret = -1;
21172eb4d010SOphir Munk 
21182eb4d010SOphir Munk 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
21192eb4d010SOphir Munk 		mlx5_pmd_socket_init();
21202eb4d010SOphir Munk 	ret = mlx5_init_once();
21212eb4d010SOphir Munk 	if (ret) {
21222eb4d010SOphir Munk 		DRV_LOG(ERR, "unable to init PMD global data: %s",
21232eb4d010SOphir Munk 			strerror(rte_errno));
21242eb4d010SOphir Munk 		return -rte_errno;
21252eb4d010SOphir Munk 	}
21262eb4d010SOphir Munk 	errno = 0;
21272eb4d010SOphir Munk 	ibv_list = mlx5_glue->get_device_list(&ret);
21282eb4d010SOphir Munk 	if (!ibv_list) {
21292eb4d010SOphir Munk 		rte_errno = errno ? errno : ENOSYS;
21302eb4d010SOphir Munk 		DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
21312eb4d010SOphir Munk 		return -rte_errno;
21322eb4d010SOphir Munk 	}
21332eb4d010SOphir Munk 	/*
21342eb4d010SOphir Munk 	 * First scan the list of all Infiniband devices to find
21352eb4d010SOphir Munk 	 * matching ones, gathering into the list.
21362eb4d010SOphir Munk 	 */
21372eb4d010SOphir Munk 	struct ibv_device *ibv_match[ret + 1];
21382eb4d010SOphir Munk 	int nl_route = mlx5_nl_init(NETLINK_ROUTE);
21392eb4d010SOphir Munk 	int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
21402eb4d010SOphir Munk 	unsigned int i;
21412eb4d010SOphir Munk 
21422eb4d010SOphir Munk 	while (ret-- > 0) {
21432eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
21442eb4d010SOphir Munk 
21452eb4d010SOphir Munk 		DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
21462eb4d010SOphir Munk 		bd = mlx5_device_bond_pci_match
2147f5f4c482SXueming Li 				(ibv_list[ret], &owner_pci, nl_rdma, owner_id,
2148f5f4c482SXueming Li 				 &bond_info);
21492eb4d010SOphir Munk 		if (bd >= 0) {
21502eb4d010SOphir Munk 			/*
21512eb4d010SOphir Munk 			 * Bonding device detected. Only one match is allowed,
21522eb4d010SOphir Munk 			 * the bonding is supported over multi-port IB device,
21532eb4d010SOphir Munk 			 * there should be no matches on representor PCI
21542eb4d010SOphir Munk 			 * functions or non VF LAG bonding devices with
21552eb4d010SOphir Munk 			 * specified address.
21562eb4d010SOphir Munk 			 */
21572eb4d010SOphir Munk 			if (nd) {
21582eb4d010SOphir Munk 				DRV_LOG(ERR,
21592eb4d010SOphir Munk 					"multiple PCI match on bonding device"
21602eb4d010SOphir Munk 					"\"%s\" found", ibv_list[ret]->name);
21612eb4d010SOphir Munk 				rte_errno = ENOENT;
21622eb4d010SOphir Munk 				ret = -rte_errno;
21632eb4d010SOphir Munk 				goto exit;
21642eb4d010SOphir Munk 			}
2165f926cce3SXueming Li 			/* Amend owner pci address if owner PF ID specified. */
2166f926cce3SXueming Li 			if (eth_da.nb_representor_ports)
216708c2772fSXueming Li 				owner_pci.function += owner_id;
21682eb4d010SOphir Munk 			DRV_LOG(INFO, "PCI information matches for"
21692eb4d010SOphir Munk 				      " slave %d bonding device \"%s\"",
21702eb4d010SOphir Munk 				      bd, ibv_list[ret]->name);
21712eb4d010SOphir Munk 			ibv_match[nd++] = ibv_list[ret];
21722eb4d010SOphir Munk 			break;
2173f926cce3SXueming Li 		} else {
2174f926cce3SXueming Li 			/* Bonding device not found. */
21752eb4d010SOphir Munk 			if (mlx5_dev_to_pci_addr
21762eb4d010SOphir Munk 				(ibv_list[ret]->ibdev_path, &pci_addr))
21772eb4d010SOphir Munk 				continue;
2178f926cce3SXueming Li 			if (owner_pci.domain != pci_addr.domain ||
2179f926cce3SXueming Li 			    owner_pci.bus != pci_addr.bus ||
2180f926cce3SXueming Li 			    owner_pci.devid != pci_addr.devid ||
2181f926cce3SXueming Li 			    owner_pci.function != pci_addr.function)
21822eb4d010SOphir Munk 				continue;
21832eb4d010SOphir Munk 			DRV_LOG(INFO, "PCI information matches for device \"%s\"",
21842eb4d010SOphir Munk 				ibv_list[ret]->name);
21852eb4d010SOphir Munk 			ibv_match[nd++] = ibv_list[ret];
21862eb4d010SOphir Munk 		}
2187f926cce3SXueming Li 	}
21882eb4d010SOphir Munk 	ibv_match[nd] = NULL;
21892eb4d010SOphir Munk 	if (!nd) {
21902eb4d010SOphir Munk 		/* No device matches, just complain and bail out. */
21912eb4d010SOphir Munk 		DRV_LOG(WARNING,
21922eb4d010SOphir Munk 			"no Verbs device matches PCI device " PCI_PRI_FMT ","
21932eb4d010SOphir Munk 			" are kernel drivers loaded?",
2194f926cce3SXueming Li 			owner_pci.domain, owner_pci.bus,
2195f926cce3SXueming Li 			owner_pci.devid, owner_pci.function);
21962eb4d010SOphir Munk 		rte_errno = ENOENT;
21972eb4d010SOphir Munk 		ret = -rte_errno;
21982eb4d010SOphir Munk 		goto exit;
21992eb4d010SOphir Munk 	}
22002eb4d010SOphir Munk 	if (nd == 1) {
22012eb4d010SOphir Munk 		/*
22022eb4d010SOphir Munk 		 * Found single matching device may have multiple ports.
22032eb4d010SOphir Munk 		 * Each port may be representor, we have to check the port
22042eb4d010SOphir Munk 		 * number and check the representors existence.
22052eb4d010SOphir Munk 		 */
22062eb4d010SOphir Munk 		if (nl_rdma >= 0)
22072eb4d010SOphir Munk 			np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
22082eb4d010SOphir Munk 		if (!np)
22092eb4d010SOphir Munk 			DRV_LOG(WARNING, "can not get IB device \"%s\""
22102eb4d010SOphir Munk 					 " ports number", ibv_match[0]->name);
22112eb4d010SOphir Munk 		if (bd >= 0 && !np) {
22122eb4d010SOphir Munk 			DRV_LOG(ERR, "can not get ports"
22132eb4d010SOphir Munk 				     " for bonding device");
22142eb4d010SOphir Munk 			rte_errno = ENOENT;
22152eb4d010SOphir Munk 			ret = -rte_errno;
22162eb4d010SOphir Munk 			goto exit;
22172eb4d010SOphir Munk 		}
22182eb4d010SOphir Munk 	}
22192eb4d010SOphir Munk #ifndef HAVE_MLX5DV_DR_DEVX_PORT
22202eb4d010SOphir Munk 	if (bd >= 0) {
22212eb4d010SOphir Munk 		/*
22222eb4d010SOphir Munk 		 * This may happen if there is VF LAG kernel support and
22232eb4d010SOphir Munk 		 * application is compiled with older rdma_core library.
22242eb4d010SOphir Munk 		 */
22252eb4d010SOphir Munk 		DRV_LOG(ERR,
22262eb4d010SOphir Munk 			"No kernel/verbs support for VF LAG bonding found.");
22272eb4d010SOphir Munk 		rte_errno = ENOTSUP;
22282eb4d010SOphir Munk 		ret = -rte_errno;
22292eb4d010SOphir Munk 		goto exit;
22302eb4d010SOphir Munk 	}
22312eb4d010SOphir Munk #endif
22322eb4d010SOphir Munk 	/*
22332eb4d010SOphir Munk 	 * Now we can determine the maximal
22342eb4d010SOphir Munk 	 * amount of devices to be spawned.
22352eb4d010SOphir Munk 	 */
22362175c4dcSSuanming Mou 	list = mlx5_malloc(MLX5_MEM_ZERO,
22372eb4d010SOphir Munk 			   sizeof(struct mlx5_dev_spawn_data) *
22382eb4d010SOphir Munk 			   (np ? np : nd),
22392175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
22402eb4d010SOphir Munk 	if (!list) {
22412eb4d010SOphir Munk 		DRV_LOG(ERR, "spawn data array allocation failure");
22422eb4d010SOphir Munk 		rte_errno = ENOMEM;
22432eb4d010SOphir Munk 		ret = -rte_errno;
22442eb4d010SOphir Munk 		goto exit;
22452eb4d010SOphir Munk 	}
22462eb4d010SOphir Munk 	if (bd >= 0 || np > 1) {
22472eb4d010SOphir Munk 		/*
22482eb4d010SOphir Munk 		 * Single IB device with multiple ports found,
22492eb4d010SOphir Munk 		 * it may be E-Switch master device and representors.
22502eb4d010SOphir Munk 		 * We have to perform identification through the ports.
22512eb4d010SOphir Munk 		 */
22522eb4d010SOphir Munk 		MLX5_ASSERT(nl_rdma >= 0);
22532eb4d010SOphir Munk 		MLX5_ASSERT(ns == 0);
22542eb4d010SOphir Munk 		MLX5_ASSERT(nd == 1);
22552eb4d010SOphir Munk 		MLX5_ASSERT(np);
22562eb4d010SOphir Munk 		for (i = 1; i <= np; ++i) {
2257f5f4c482SXueming Li 			list[ns].bond_info = &bond_info;
22582eb4d010SOphir Munk 			list[ns].max_port = np;
2259834a9019SOphir Munk 			list[ns].phys_port = i;
2260834a9019SOphir Munk 			list[ns].phys_dev = ibv_match[0];
22612eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
22622eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
22632eb4d010SOphir Munk 			list[ns].pf_bond = bd;
22642eb4d010SOphir Munk 			list[ns].ifindex = mlx5_nl_ifindex
2265834a9019SOphir Munk 				(nl_rdma,
2266834a9019SOphir Munk 				mlx5_os_get_dev_device_name
2267834a9019SOphir Munk 						(list[ns].phys_dev), i);
22682eb4d010SOphir Munk 			if (!list[ns].ifindex) {
22692eb4d010SOphir Munk 				/*
22702eb4d010SOphir Munk 				 * No network interface index found for the
22712eb4d010SOphir Munk 				 * specified port, it means there is no
22722eb4d010SOphir Munk 				 * representor on this port. It's OK,
22732eb4d010SOphir Munk 				 * there can be disabled ports, for example
22742eb4d010SOphir Munk 				 * if sriov_numvfs < sriov_totalvfs.
22752eb4d010SOphir Munk 				 */
22762eb4d010SOphir Munk 				continue;
22772eb4d010SOphir Munk 			}
22782eb4d010SOphir Munk 			ret = -1;
22792eb4d010SOphir Munk 			if (nl_route >= 0)
22802eb4d010SOphir Munk 				ret = mlx5_nl_switch_info
22812eb4d010SOphir Munk 					       (nl_route,
22822eb4d010SOphir Munk 						list[ns].ifindex,
22832eb4d010SOphir Munk 						&list[ns].info);
22842eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
22852eb4d010SOphir Munk 				    !list[ns].info.master)) {
22862eb4d010SOphir Munk 				/*
22872eb4d010SOphir Munk 				 * We failed to recognize representors with
22882eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
22892eb4d010SOphir Munk 				 * with sysfs.
22902eb4d010SOphir Munk 				 */
22912eb4d010SOphir Munk 				ret =  mlx5_sysfs_switch_info
22922eb4d010SOphir Munk 						(list[ns].ifindex,
22932eb4d010SOphir Munk 						 &list[ns].info);
22942eb4d010SOphir Munk 			}
22952a87415cSMichael Baum #ifdef HAVE_MLX5DV_DR_DEVX_PORT
22962eb4d010SOphir Munk 			if (!ret && bd >= 0) {
22972eb4d010SOphir Munk 				switch (list[ns].info.name_type) {
22982eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
22992eb4d010SOphir Munk 					if (list[ns].info.port_name == bd)
23002eb4d010SOphir Munk 						ns++;
23012eb4d010SOphir Munk 					break;
2302420bbdaeSViacheslav Ovsiienko 				case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2303420bbdaeSViacheslav Ovsiienko 					/* Fallthrough */
23042eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2305cb95feefSXueming Li 					/* Fallthrough */
2306cb95feefSXueming Li 				case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
23072eb4d010SOphir Munk 					if (list[ns].info.pf_num == bd)
23082eb4d010SOphir Munk 						ns++;
23092eb4d010SOphir Munk 					break;
23102eb4d010SOphir Munk 				default:
23112eb4d010SOphir Munk 					break;
23122eb4d010SOphir Munk 				}
23132eb4d010SOphir Munk 				continue;
23142eb4d010SOphir Munk 			}
23152a87415cSMichael Baum #endif
23162eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
23172eb4d010SOphir Munk 				     list[ns].info.master))
23182eb4d010SOphir Munk 				ns++;
23192eb4d010SOphir Munk 		}
23202eb4d010SOphir Munk 		if (!ns) {
23212eb4d010SOphir Munk 			DRV_LOG(ERR,
23222eb4d010SOphir Munk 				"unable to recognize master/representors"
23232eb4d010SOphir Munk 				" on the IB device with multiple ports");
23242eb4d010SOphir Munk 			rte_errno = ENOENT;
23252eb4d010SOphir Munk 			ret = -rte_errno;
23262eb4d010SOphir Munk 			goto exit;
23272eb4d010SOphir Munk 		}
23282eb4d010SOphir Munk 	} else {
23292eb4d010SOphir Munk 		/*
23302eb4d010SOphir Munk 		 * The existence of several matching entries (nd > 1) means
23312eb4d010SOphir Munk 		 * port representors have been instantiated. No existing Verbs
23322eb4d010SOphir Munk 		 * call nor sysfs entries can tell them apart, this can only
23332eb4d010SOphir Munk 		 * be done through Netlink calls assuming kernel drivers are
23342eb4d010SOphir Munk 		 * recent enough to support them.
23352eb4d010SOphir Munk 		 *
23362eb4d010SOphir Munk 		 * In the event of identification failure through Netlink,
23372eb4d010SOphir Munk 		 * try again through sysfs, then:
23382eb4d010SOphir Munk 		 *
23392eb4d010SOphir Munk 		 * 1. A single IB device matches (nd == 1) with single
23402eb4d010SOphir Munk 		 *    port (np=0/1) and is not a representor, assume
23412eb4d010SOphir Munk 		 *    no switch support.
23422eb4d010SOphir Munk 		 *
23432eb4d010SOphir Munk 		 * 2. Otherwise no safe assumptions can be made;
23442eb4d010SOphir Munk 		 *    complain louder and bail out.
23452eb4d010SOphir Munk 		 */
23462eb4d010SOphir Munk 		for (i = 0; i != nd; ++i) {
23472eb4d010SOphir Munk 			memset(&list[ns].info, 0, sizeof(list[ns].info));
2348f5f4c482SXueming Li 			list[ns].bond_info = NULL;
23492eb4d010SOphir Munk 			list[ns].max_port = 1;
2350834a9019SOphir Munk 			list[ns].phys_port = 1;
2351834a9019SOphir Munk 			list[ns].phys_dev = ibv_match[i];
23522eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
23532eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
23542eb4d010SOphir Munk 			list[ns].pf_bond = -1;
23552eb4d010SOphir Munk 			list[ns].ifindex = 0;
23562eb4d010SOphir Munk 			if (nl_rdma >= 0)
23572eb4d010SOphir Munk 				list[ns].ifindex = mlx5_nl_ifindex
2358834a9019SOphir Munk 				(nl_rdma,
2359834a9019SOphir Munk 				mlx5_os_get_dev_device_name
2360834a9019SOphir Munk 						(list[ns].phys_dev), 1);
23612eb4d010SOphir Munk 			if (!list[ns].ifindex) {
23622eb4d010SOphir Munk 				char ifname[IF_NAMESIZE];
23632eb4d010SOphir Munk 
23642eb4d010SOphir Munk 				/*
23652eb4d010SOphir Munk 				 * Netlink failed, it may happen with old
23662eb4d010SOphir Munk 				 * ib_core kernel driver (before 4.16).
23672eb4d010SOphir Munk 				 * We can assume there is old driver because
23682eb4d010SOphir Munk 				 * here we are processing single ports IB
23692eb4d010SOphir Munk 				 * devices. Let's try sysfs to retrieve
23702eb4d010SOphir Munk 				 * the ifindex. The method works for
23712eb4d010SOphir Munk 				 * master device only.
23722eb4d010SOphir Munk 				 */
23732eb4d010SOphir Munk 				if (nd > 1) {
23742eb4d010SOphir Munk 					/*
23752eb4d010SOphir Munk 					 * Multiple devices found, assume
23762eb4d010SOphir Munk 					 * representors, can not distinguish
23772eb4d010SOphir Munk 					 * master/representor and retrieve
23782eb4d010SOphir Munk 					 * ifindex via sysfs.
23792eb4d010SOphir Munk 					 */
23802eb4d010SOphir Munk 					continue;
23812eb4d010SOphir Munk 				}
2382aec086c9SMatan Azrad 				ret = mlx5_get_ifname_sysfs
2383aec086c9SMatan Azrad 					(ibv_match[i]->ibdev_path, ifname);
23842eb4d010SOphir Munk 				if (!ret)
23852eb4d010SOphir Munk 					list[ns].ifindex =
23862eb4d010SOphir Munk 						if_nametoindex(ifname);
23872eb4d010SOphir Munk 				if (!list[ns].ifindex) {
23882eb4d010SOphir Munk 					/*
23892eb4d010SOphir Munk 					 * No network interface index found
23902eb4d010SOphir Munk 					 * for the specified device, it means
23912eb4d010SOphir Munk 					 * there it is neither representor
23922eb4d010SOphir Munk 					 * nor master.
23932eb4d010SOphir Munk 					 */
23942eb4d010SOphir Munk 					continue;
23952eb4d010SOphir Munk 				}
23962eb4d010SOphir Munk 			}
23972eb4d010SOphir Munk 			ret = -1;
23982eb4d010SOphir Munk 			if (nl_route >= 0)
23992eb4d010SOphir Munk 				ret = mlx5_nl_switch_info
24002eb4d010SOphir Munk 					       (nl_route,
24012eb4d010SOphir Munk 						list[ns].ifindex,
24022eb4d010SOphir Munk 						&list[ns].info);
24032eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
24042eb4d010SOphir Munk 				    !list[ns].info.master)) {
24052eb4d010SOphir Munk 				/*
24062eb4d010SOphir Munk 				 * We failed to recognize representors with
24072eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
24082eb4d010SOphir Munk 				 * with sysfs.
24092eb4d010SOphir Munk 				 */
24102eb4d010SOphir Munk 				ret =  mlx5_sysfs_switch_info
24112eb4d010SOphir Munk 						(list[ns].ifindex,
24122eb4d010SOphir Munk 						 &list[ns].info);
24132eb4d010SOphir Munk 			}
24142eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
24152eb4d010SOphir Munk 				     list[ns].info.master)) {
24162eb4d010SOphir Munk 				ns++;
24172eb4d010SOphir Munk 			} else if ((nd == 1) &&
24182eb4d010SOphir Munk 				   !list[ns].info.representor &&
24192eb4d010SOphir Munk 				   !list[ns].info.master) {
24202eb4d010SOphir Munk 				/*
24212eb4d010SOphir Munk 				 * Single IB device with
24222eb4d010SOphir Munk 				 * one physical port and
24232eb4d010SOphir Munk 				 * attached network device.
24242eb4d010SOphir Munk 				 * May be SRIOV is not enabled
24252eb4d010SOphir Munk 				 * or there is no representors.
24262eb4d010SOphir Munk 				 */
24272eb4d010SOphir Munk 				DRV_LOG(INFO, "no E-Switch support detected");
24282eb4d010SOphir Munk 				ns++;
24292eb4d010SOphir Munk 				break;
24302eb4d010SOphir Munk 			}
24312eb4d010SOphir Munk 		}
24322eb4d010SOphir Munk 		if (!ns) {
24332eb4d010SOphir Munk 			DRV_LOG(ERR,
24342eb4d010SOphir Munk 				"unable to recognize master/representors"
24352eb4d010SOphir Munk 				" on the multiple IB devices");
24362eb4d010SOphir Munk 			rte_errno = ENOENT;
24372eb4d010SOphir Munk 			ret = -rte_errno;
24382eb4d010SOphir Munk 			goto exit;
24392eb4d010SOphir Munk 		}
24406b157f3bSViacheslav Ovsiienko 		/*
24416b157f3bSViacheslav Ovsiienko 		 * New kernels may add the switch_id attribute for the case
24426b157f3bSViacheslav Ovsiienko 		 * there is no E-Switch and we wrongly recognized the
24436b157f3bSViacheslav Ovsiienko 		 * only device as master. Override this if there is the
24446b157f3bSViacheslav Ovsiienko 		 * single device with single port and new device name
24456b157f3bSViacheslav Ovsiienko 		 * format present.
24466b157f3bSViacheslav Ovsiienko 		 */
24476b157f3bSViacheslav Ovsiienko 		if (nd == 1 &&
24486b157f3bSViacheslav Ovsiienko 		    list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
24496b157f3bSViacheslav Ovsiienko 			list[0].info.master = 0;
24506b157f3bSViacheslav Ovsiienko 			list[0].info.representor = 0;
24516b157f3bSViacheslav Ovsiienko 		}
24522eb4d010SOphir Munk 	}
24532eb4d010SOphir Munk 	MLX5_ASSERT(ns);
24542eb4d010SOphir Munk 	/*
24552eb4d010SOphir Munk 	 * Sort list to probe devices in natural order for users convenience
24562eb4d010SOphir Munk 	 * (i.e. master first, then representors from lowest to highest ID).
24572eb4d010SOphir Munk 	 */
24582eb4d010SOphir Munk 	qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
24592eb4d010SOphir Munk 	/* Device specific configuration. */
24602eb4d010SOphir Munk 	switch (pci_dev->id.device_id) {
24612eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
24622eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
24632eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
24642eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
24652eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
24662eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
24673ea12cadSRaslan Darawsheh 	case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2468d462a83cSMichael Baum 		dev_config_vf = 1;
24692eb4d010SOphir Munk 		break;
24702eb4d010SOphir Munk 	default:
2471d462a83cSMichael Baum 		dev_config_vf = 0;
24722eb4d010SOphir Munk 		break;
24732eb4d010SOphir Munk 	}
2474f926cce3SXueming Li 	if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2475f926cce3SXueming Li 		/* Set devargs default values. */
2476f926cce3SXueming Li 		if (eth_da.nb_mh_controllers == 0) {
2477f926cce3SXueming Li 			eth_da.nb_mh_controllers = 1;
2478f926cce3SXueming Li 			eth_da.mh_controllers[0] = 0;
2479f926cce3SXueming Li 		}
2480f926cce3SXueming Li 		if (eth_da.nb_ports == 0 && ns > 0) {
2481f926cce3SXueming Li 			if (list[0].pf_bond >= 0 && list[0].info.representor)
2482f926cce3SXueming Li 				DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2483f926cce3SXueming Li 					pci_dev->device.devargs->args);
2484f926cce3SXueming Li 			eth_da.nb_ports = 1;
2485f926cce3SXueming Li 			eth_da.ports[0] = list[0].info.pf_num;
2486f926cce3SXueming Li 		}
2487f926cce3SXueming Li 		if (eth_da.nb_representor_ports == 0) {
2488f926cce3SXueming Li 			eth_da.nb_representor_ports = 1;
2489f926cce3SXueming Li 			eth_da.representor_ports[0] = 0;
2490f926cce3SXueming Li 		}
2491f926cce3SXueming Li 	}
24922eb4d010SOphir Munk 	for (i = 0; i != ns; ++i) {
24932eb4d010SOphir Munk 		uint32_t restore;
24942eb4d010SOphir Munk 
2495d462a83cSMichael Baum 		/* Default configuration. */
2496d462a83cSMichael Baum 		memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2497d462a83cSMichael Baum 		dev_config.vf = dev_config_vf;
2498d462a83cSMichael Baum 		dev_config.mps = MLX5_ARG_UNSET;
2499d462a83cSMichael Baum 		dev_config.dbnc = MLX5_ARG_UNSET;
2500d462a83cSMichael Baum 		dev_config.rx_vec_en = 1;
2501d462a83cSMichael Baum 		dev_config.txq_inline_max = MLX5_ARG_UNSET;
2502d462a83cSMichael Baum 		dev_config.txq_inline_min = MLX5_ARG_UNSET;
2503d462a83cSMichael Baum 		dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2504d462a83cSMichael Baum 		dev_config.txqs_inline = MLX5_ARG_UNSET;
2505d462a83cSMichael Baum 		dev_config.vf_nl_en = 1;
2506d462a83cSMichael Baum 		dev_config.mr_ext_memseg_en = 1;
2507d462a83cSMichael Baum 		dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2508d462a83cSMichael Baum 		dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2509d462a83cSMichael Baum 		dev_config.dv_esw_en = 1;
2510d462a83cSMichael Baum 		dev_config.dv_flow_en = 1;
2511d462a83cSMichael Baum 		dev_config.decap_en = 1;
2512d462a83cSMichael Baum 		dev_config.log_hp_size = MLX5_ARG_UNSET;
2513e39226bdSJiawei Wang 		dev_config.allow_duplicate_pattern = 1;
25142eb4d010SOphir Munk 		list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
25152eb4d010SOphir Munk 						 &list[i],
2516cb95feefSXueming Li 						 &dev_config,
2517cb95feefSXueming Li 						 &eth_da);
25182eb4d010SOphir Munk 		if (!list[i].eth_dev) {
25192eb4d010SOphir Munk 			if (rte_errno != EBUSY && rte_errno != EEXIST)
25202eb4d010SOphir Munk 				break;
25212eb4d010SOphir Munk 			/* Device is disabled or already spawned. Ignore it. */
25222eb4d010SOphir Munk 			continue;
25232eb4d010SOphir Munk 		}
25242eb4d010SOphir Munk 		restore = list[i].eth_dev->data->dev_flags;
25252eb4d010SOphir Munk 		rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
25262eb4d010SOphir Munk 		/* Restore non-PCI flags cleared by the above call. */
25272eb4d010SOphir Munk 		list[i].eth_dev->data->dev_flags |= restore;
25282eb4d010SOphir Munk 		rte_eth_dev_probing_finish(list[i].eth_dev);
25292eb4d010SOphir Munk 	}
25302eb4d010SOphir Munk 	if (i != ns) {
25312eb4d010SOphir Munk 		DRV_LOG(ERR,
25322eb4d010SOphir Munk 			"probe of PCI device " PCI_PRI_FMT " aborted after"
25332eb4d010SOphir Munk 			" encountering an error: %s",
2534f926cce3SXueming Li 			owner_pci.domain, owner_pci.bus,
2535f926cce3SXueming Li 			owner_pci.devid, owner_pci.function,
25362eb4d010SOphir Munk 			strerror(rte_errno));
25372eb4d010SOphir Munk 		ret = -rte_errno;
25382eb4d010SOphir Munk 		/* Roll back. */
25392eb4d010SOphir Munk 		while (i--) {
25402eb4d010SOphir Munk 			if (!list[i].eth_dev)
25412eb4d010SOphir Munk 				continue;
25422eb4d010SOphir Munk 			mlx5_dev_close(list[i].eth_dev);
25432eb4d010SOphir Munk 			/* mac_addrs must not be freed because in dev_private */
25442eb4d010SOphir Munk 			list[i].eth_dev->data->mac_addrs = NULL;
25452eb4d010SOphir Munk 			claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
25462eb4d010SOphir Munk 		}
25472eb4d010SOphir Munk 		/* Restore original error. */
25482eb4d010SOphir Munk 		rte_errno = -ret;
25492eb4d010SOphir Munk 	} else {
25502eb4d010SOphir Munk 		ret = 0;
25512eb4d010SOphir Munk 	}
25522eb4d010SOphir Munk exit:
25532eb4d010SOphir Munk 	/*
25542eb4d010SOphir Munk 	 * Do the routine cleanup:
25552eb4d010SOphir Munk 	 * - close opened Netlink sockets
25562eb4d010SOphir Munk 	 * - free allocated spawn data array
25572eb4d010SOphir Munk 	 * - free the Infiniband device list
25582eb4d010SOphir Munk 	 */
25592eb4d010SOphir Munk 	if (nl_rdma >= 0)
25602eb4d010SOphir Munk 		close(nl_rdma);
25612eb4d010SOphir Munk 	if (nl_route >= 0)
25622eb4d010SOphir Munk 		close(nl_route);
25632eb4d010SOphir Munk 	if (list)
25642175c4dcSSuanming Mou 		mlx5_free(list);
25652eb4d010SOphir Munk 	MLX5_ASSERT(ibv_list);
25662eb4d010SOphir Munk 	mlx5_glue->free_device_list(ibv_list);
25672eb4d010SOphir Munk 	return ret;
25682eb4d010SOphir Munk }
25692eb4d010SOphir Munk 
257008c2772fSXueming Li /**
257108c2772fSXueming Li  * DPDK callback to register a PCI device.
257208c2772fSXueming Li  *
257308c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device.
257408c2772fSXueming Li  *
257508c2772fSXueming Li  * @param[in] pci_drv
257608c2772fSXueming Li  *   PCI driver structure (mlx5_driver).
257708c2772fSXueming Li  * @param[in] pci_dev
257808c2772fSXueming Li  *   PCI device information.
257908c2772fSXueming Li  *
258008c2772fSXueming Li  * @return
258108c2772fSXueming Li  *   0 on success, a negative errno value otherwise and rte_errno is set.
258208c2772fSXueming Li  */
258308c2772fSXueming Li int
258408c2772fSXueming Li mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
258508c2772fSXueming Li 		  struct rte_pci_device *pci_dev)
258608c2772fSXueming Li {
258708c2772fSXueming Li 	struct rte_eth_devargs eth_da = { .type = RTE_ETH_REPRESENTOR_NONE };
258808c2772fSXueming Li 	int ret = 0;
258908c2772fSXueming Li 	uint16_t p;
259008c2772fSXueming Li 
259108c2772fSXueming Li 	if (pci_dev->device.devargs) {
259208c2772fSXueming Li 		/* Parse representor information from device argument. */
259308c2772fSXueming Li 		if (pci_dev->device.devargs->cls_str)
259408c2772fSXueming Li 			ret = rte_eth_devargs_parse
259508c2772fSXueming Li 				(pci_dev->device.devargs->cls_str, &eth_da);
259608c2772fSXueming Li 		if (ret) {
259708c2772fSXueming Li 			DRV_LOG(ERR, "failed to parse device arguments: %s",
259808c2772fSXueming Li 				pci_dev->device.devargs->cls_str);
259908c2772fSXueming Li 			return -rte_errno;
260008c2772fSXueming Li 		}
260108c2772fSXueming Li 		if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
260208c2772fSXueming Li 			/* Support legacy device argument */
260308c2772fSXueming Li 			ret = rte_eth_devargs_parse
260408c2772fSXueming Li 				(pci_dev->device.devargs->args, &eth_da);
260508c2772fSXueming Li 			if (ret) {
260608c2772fSXueming Li 				DRV_LOG(ERR, "failed to parse device arguments: %s",
260708c2772fSXueming Li 					pci_dev->device.devargs->args);
260808c2772fSXueming Li 				return -rte_errno;
260908c2772fSXueming Li 			}
261008c2772fSXueming Li 		}
261108c2772fSXueming Li 	}
261208c2772fSXueming Li 
261308c2772fSXueming Li 	if (eth_da.nb_ports > 0) {
261408c2772fSXueming Li 		/* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
261508c2772fSXueming Li 		for (p = 0; p < eth_da.nb_ports; p++)
261608c2772fSXueming Li 			ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da,
261708c2772fSXueming Li 						   eth_da.ports[p]);
261808c2772fSXueming Li 	} else {
261908c2772fSXueming Li 		ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da, 0);
262008c2772fSXueming Li 	}
262108c2772fSXueming Li 	return ret;
262208c2772fSXueming Li }
262308c2772fSXueming Li 
26242eb4d010SOphir Munk static int
26252eb4d010SOphir Munk mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
26262eb4d010SOphir Munk {
26272eb4d010SOphir Munk 	char *env;
26282eb4d010SOphir Munk 	int value;
26292eb4d010SOphir Munk 
26302eb4d010SOphir Munk 	MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
26312eb4d010SOphir Munk 	/* Get environment variable to store. */
26322eb4d010SOphir Munk 	env = getenv(MLX5_SHUT_UP_BF);
26332eb4d010SOphir Munk 	value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
26342eb4d010SOphir Munk 	if (config->dbnc == MLX5_ARG_UNSET)
26352eb4d010SOphir Munk 		setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
26362eb4d010SOphir Munk 	else
26372eb4d010SOphir Munk 		setenv(MLX5_SHUT_UP_BF,
26382eb4d010SOphir Munk 		       config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
26392eb4d010SOphir Munk 	return value;
26402eb4d010SOphir Munk }
26412eb4d010SOphir Munk 
26422eb4d010SOphir Munk static void
26432eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(int value)
26442eb4d010SOphir Munk {
26452eb4d010SOphir Munk 	MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
26462eb4d010SOphir Munk 	/* Restore the original environment variable state. */
26472eb4d010SOphir Munk 	if (value == MLX5_ARG_UNSET)
26482eb4d010SOphir Munk 		unsetenv(MLX5_SHUT_UP_BF);
26492eb4d010SOphir Munk 	else
26502eb4d010SOphir Munk 		setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
26512eb4d010SOphir Munk }
26522eb4d010SOphir Munk 
26532eb4d010SOphir Munk /**
26542eb4d010SOphir Munk  * Extract pdn of PD object using DV API.
26552eb4d010SOphir Munk  *
26562eb4d010SOphir Munk  * @param[in] pd
26572eb4d010SOphir Munk  *   Pointer to the verbs PD object.
26582eb4d010SOphir Munk  * @param[out] pdn
26592eb4d010SOphir Munk  *   Pointer to the PD object number variable.
26602eb4d010SOphir Munk  *
26612eb4d010SOphir Munk  * @return
26622eb4d010SOphir Munk  *   0 on success, error value otherwise.
26632eb4d010SOphir Munk  */
26642eb4d010SOphir Munk int
26652eb4d010SOphir Munk mlx5_os_get_pdn(void *pd, uint32_t *pdn)
26662eb4d010SOphir Munk {
26672eb4d010SOphir Munk #ifdef HAVE_IBV_FLOW_DV_SUPPORT
26682eb4d010SOphir Munk 	struct mlx5dv_obj obj;
26692eb4d010SOphir Munk 	struct mlx5dv_pd pd_info;
26702eb4d010SOphir Munk 	int ret = 0;
26712eb4d010SOphir Munk 
26722eb4d010SOphir Munk 	obj.pd.in = pd;
26732eb4d010SOphir Munk 	obj.pd.out = &pd_info;
26742eb4d010SOphir Munk 	ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
26752eb4d010SOphir Munk 	if (ret) {
26762eb4d010SOphir Munk 		DRV_LOG(DEBUG, "Fail to get PD object info");
26772eb4d010SOphir Munk 		return ret;
26782eb4d010SOphir Munk 	}
26792eb4d010SOphir Munk 	*pdn = pd_info.pdn;
26802eb4d010SOphir Munk 	return 0;
26812eb4d010SOphir Munk #else
26822eb4d010SOphir Munk 	(void)pd;
26832eb4d010SOphir Munk 	(void)pdn;
26842eb4d010SOphir Munk 	return -ENOTSUP;
26852eb4d010SOphir Munk #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
26862eb4d010SOphir Munk }
26872eb4d010SOphir Munk 
26882eb4d010SOphir Munk /**
26892eb4d010SOphir Munk  * Function API to open IB device.
26902eb4d010SOphir Munk  *
26912eb4d010SOphir Munk  * This function calls the Linux glue APIs to open a device.
26922eb4d010SOphir Munk  *
26932eb4d010SOphir Munk  * @param[in] spawn
26942eb4d010SOphir Munk  *   Pointer to the IB device attributes (name, port, etc).
26952eb4d010SOphir Munk  * @param[out] config
26962eb4d010SOphir Munk  *   Pointer to device configuration structure.
26972eb4d010SOphir Munk  * @param[out] sh
26982eb4d010SOphir Munk  *   Pointer to shared context structure.
26992eb4d010SOphir Munk  *
27002eb4d010SOphir Munk  * @return
27012eb4d010SOphir Munk  *   0 on success, a positive error value otherwise.
27022eb4d010SOphir Munk  */
27032eb4d010SOphir Munk int
27042eb4d010SOphir Munk mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
27052eb4d010SOphir Munk 		     const struct mlx5_dev_config *config,
27062eb4d010SOphir Munk 		     struct mlx5_dev_ctx_shared *sh)
27072eb4d010SOphir Munk {
27082eb4d010SOphir Munk 	int dbmap_env;
27092eb4d010SOphir Munk 	int err = 0;
2710d133f4cdSViacheslav Ovsiienko 
2711d133f4cdSViacheslav Ovsiienko 	sh->numa_node = spawn->pci_dev->device.numa_node;
2712d133f4cdSViacheslav Ovsiienko 	pthread_mutex_init(&sh->txpp.mutex, NULL);
27132eb4d010SOphir Munk 	/*
27142eb4d010SOphir Munk 	 * Configure environment variable "MLX5_BF_SHUT_UP"
27152eb4d010SOphir Munk 	 * before the device creation. The rdma_core library
27162eb4d010SOphir Munk 	 * checks the variable at device creation and
27172eb4d010SOphir Munk 	 * stores the result internally.
27182eb4d010SOphir Munk 	 */
27192eb4d010SOphir Munk 	dbmap_env = mlx5_config_doorbell_mapping_env(config);
27202eb4d010SOphir Munk 	/* Try to open IB device with DV first, then usual Verbs. */
27212eb4d010SOphir Munk 	errno = 0;
2722834a9019SOphir Munk 	sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
27232eb4d010SOphir Munk 	if (sh->ctx) {
27242eb4d010SOphir Munk 		sh->devx = 1;
27252eb4d010SOphir Munk 		DRV_LOG(DEBUG, "DevX is supported");
27262eb4d010SOphir Munk 		/* The device is created, no need for environment. */
27272eb4d010SOphir Munk 		mlx5_restore_doorbell_mapping_env(dbmap_env);
27282eb4d010SOphir Munk 	} else {
27292eb4d010SOphir Munk 		/* The environment variable is still configured. */
2730834a9019SOphir Munk 		sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
27312eb4d010SOphir Munk 		err = errno ? errno : ENODEV;
27322eb4d010SOphir Munk 		/*
27332eb4d010SOphir Munk 		 * The environment variable is not needed anymore,
27342eb4d010SOphir Munk 		 * all device creation attempts are completed.
27352eb4d010SOphir Munk 		 */
27362eb4d010SOphir Munk 		mlx5_restore_doorbell_mapping_env(dbmap_env);
27372eb4d010SOphir Munk 		if (!sh->ctx)
27382eb4d010SOphir Munk 			return err;
27392eb4d010SOphir Munk 		DRV_LOG(DEBUG, "DevX is NOT supported");
27402eb4d010SOphir Munk 		err = 0;
27412eb4d010SOphir Munk 	}
274281c3b977SViacheslav Ovsiienko 	if (!err && sh->ctx) {
274381c3b977SViacheslav Ovsiienko 		/* Hint libmlx5 to use PMD allocator for data plane resources */
274481c3b977SViacheslav Ovsiienko 		mlx5_glue->dv_set_context_attr(sh->ctx,
274581c3b977SViacheslav Ovsiienko 			MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
274681c3b977SViacheslav Ovsiienko 			(void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
274781c3b977SViacheslav Ovsiienko 				.alloc = &mlx5_alloc_verbs_buf,
274881c3b977SViacheslav Ovsiienko 				.free = &mlx5_free_verbs_buf,
274981c3b977SViacheslav Ovsiienko 				.data = sh,
275081c3b977SViacheslav Ovsiienko 			}));
275181c3b977SViacheslav Ovsiienko 	}
27522eb4d010SOphir Munk 	return err;
27532eb4d010SOphir Munk }
27542eb4d010SOphir Munk 
27552eb4d010SOphir Munk /**
27562eb4d010SOphir Munk  * Install shared asynchronous device events handler.
27572eb4d010SOphir Munk  * This function is implemented to support event sharing
27582eb4d010SOphir Munk  * between multiple ports of single IB device.
27592eb4d010SOphir Munk  *
27602eb4d010SOphir Munk  * @param sh
27612eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
27622eb4d010SOphir Munk  */
27632eb4d010SOphir Munk void
27642eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
27652eb4d010SOphir Munk {
27662eb4d010SOphir Munk 	int ret;
27672eb4d010SOphir Munk 	int flags;
27682eb4d010SOphir Munk 
27692eb4d010SOphir Munk 	sh->intr_handle.fd = -1;
27702eb4d010SOphir Munk 	flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
27712eb4d010SOphir Munk 	ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
27722eb4d010SOphir Munk 		    F_SETFL, flags | O_NONBLOCK);
27732eb4d010SOphir Munk 	if (ret) {
27742eb4d010SOphir Munk 		DRV_LOG(INFO, "failed to change file descriptor async event"
27752eb4d010SOphir Munk 			" queue");
27762eb4d010SOphir Munk 	} else {
27772eb4d010SOphir Munk 		sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
27782eb4d010SOphir Munk 		sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
27792eb4d010SOphir Munk 		if (rte_intr_callback_register(&sh->intr_handle,
27802eb4d010SOphir Munk 					mlx5_dev_interrupt_handler, sh)) {
27812eb4d010SOphir Munk 			DRV_LOG(INFO, "Fail to install the shared interrupt.");
27822eb4d010SOphir Munk 			sh->intr_handle.fd = -1;
27832eb4d010SOphir Munk 		}
27842eb4d010SOphir Munk 	}
27852eb4d010SOphir Munk 	if (sh->devx) {
27862eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
27872eb4d010SOphir Munk 		sh->intr_handle_devx.fd = -1;
278821b7c452SOphir Munk 		sh->devx_comp =
278921b7c452SOphir Munk 			(void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
279021b7c452SOphir Munk 		struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
279121b7c452SOphir Munk 		if (!devx_comp) {
27922eb4d010SOphir Munk 			DRV_LOG(INFO, "failed to allocate devx_comp.");
27932eb4d010SOphir Munk 			return;
27942eb4d010SOphir Munk 		}
279521b7c452SOphir Munk 		flags = fcntl(devx_comp->fd, F_GETFL);
279621b7c452SOphir Munk 		ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
27972eb4d010SOphir Munk 		if (ret) {
27982eb4d010SOphir Munk 			DRV_LOG(INFO, "failed to change file descriptor"
27992eb4d010SOphir Munk 				" devx comp");
28002eb4d010SOphir Munk 			return;
28012eb4d010SOphir Munk 		}
280221b7c452SOphir Munk 		sh->intr_handle_devx.fd = devx_comp->fd;
28032eb4d010SOphir Munk 		sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
28042eb4d010SOphir Munk 		if (rte_intr_callback_register(&sh->intr_handle_devx,
28052eb4d010SOphir Munk 					mlx5_dev_interrupt_handler_devx, sh)) {
28062eb4d010SOphir Munk 			DRV_LOG(INFO, "Fail to install the devx shared"
28072eb4d010SOphir Munk 				" interrupt.");
28082eb4d010SOphir Munk 			sh->intr_handle_devx.fd = -1;
28092eb4d010SOphir Munk 		}
28102eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */
28112eb4d010SOphir Munk 	}
28122eb4d010SOphir Munk }
28132eb4d010SOphir Munk 
28142eb4d010SOphir Munk /**
28152eb4d010SOphir Munk  * Uninstall shared asynchronous device events handler.
28162eb4d010SOphir Munk  * This function is implemented to support event sharing
28172eb4d010SOphir Munk  * between multiple ports of single IB device.
28182eb4d010SOphir Munk  *
28192eb4d010SOphir Munk  * @param dev
28202eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
28212eb4d010SOphir Munk  */
28222eb4d010SOphir Munk void
28232eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
28242eb4d010SOphir Munk {
28252eb4d010SOphir Munk 	if (sh->intr_handle.fd >= 0)
28262eb4d010SOphir Munk 		mlx5_intr_callback_unregister(&sh->intr_handle,
28272eb4d010SOphir Munk 					      mlx5_dev_interrupt_handler, sh);
28282eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
28292eb4d010SOphir Munk 	if (sh->intr_handle_devx.fd >= 0)
28302eb4d010SOphir Munk 		rte_intr_callback_unregister(&sh->intr_handle_devx,
28312eb4d010SOphir Munk 				  mlx5_dev_interrupt_handler_devx, sh);
28322eb4d010SOphir Munk 	if (sh->devx_comp)
28332eb4d010SOphir Munk 		mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
28342eb4d010SOphir Munk #endif
28352eb4d010SOphir Munk }
2836042f5c94SOphir Munk 
283773bf9235SOphir Munk /**
283873bf9235SOphir Munk  * Read statistics by a named counter.
283973bf9235SOphir Munk  *
284073bf9235SOphir Munk  * @param[in] priv
284173bf9235SOphir Munk  *   Pointer to the private device data structure.
284273bf9235SOphir Munk  * @param[in] ctr_name
284373bf9235SOphir Munk  *   Pointer to the name of the statistic counter to read
284473bf9235SOphir Munk  * @param[out] stat
284573bf9235SOphir Munk  *   Pointer to read statistic value.
284673bf9235SOphir Munk  * @return
284773bf9235SOphir Munk  *   0 on success and stat is valud, 1 if failed to read the value
284873bf9235SOphir Munk  *   rte_errno is set.
284973bf9235SOphir Munk  *
285073bf9235SOphir Munk  */
285173bf9235SOphir Munk int
285273bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
285373bf9235SOphir Munk 		      uint64_t *stat)
285473bf9235SOphir Munk {
285573bf9235SOphir Munk 	int fd;
285673bf9235SOphir Munk 
285773bf9235SOphir Munk 	if (priv->sh) {
2858e6988afdSMatan Azrad 		if (priv->q_counters != NULL &&
2859e6988afdSMatan Azrad 		    strcmp(ctr_name, "out_of_buffer") == 0)
2860978a0303SViacheslav Ovsiienko 			return mlx5_devx_cmd_queue_counter_query
2861978a0303SViacheslav Ovsiienko 					(priv->q_counters, 0, (uint32_t *)stat);
286273bf9235SOphir Munk 		MKSTR(path, "%s/ports/%d/hw_counters/%s",
286373bf9235SOphir Munk 		      priv->sh->ibdev_path,
286473bf9235SOphir Munk 		      priv->dev_port,
286573bf9235SOphir Munk 		      ctr_name);
286673bf9235SOphir Munk 		fd = open(path, O_RDONLY);
2867038e7fc0SShy Shyman 		/*
2868038e7fc0SShy Shyman 		 * in switchdev the file location is not per port
2869038e7fc0SShy Shyman 		 * but rather in <ibdev_path>/hw_counters/<file_name>.
2870038e7fc0SShy Shyman 		 */
2871038e7fc0SShy Shyman 		if (fd == -1) {
2872038e7fc0SShy Shyman 			MKSTR(path1, "%s/hw_counters/%s",
2873038e7fc0SShy Shyman 			      priv->sh->ibdev_path,
2874038e7fc0SShy Shyman 			      ctr_name);
2875038e7fc0SShy Shyman 			fd = open(path1, O_RDONLY);
2876038e7fc0SShy Shyman 		}
287773bf9235SOphir Munk 		if (fd != -1) {
287873bf9235SOphir Munk 			char buf[21] = {'\0'};
287973bf9235SOphir Munk 			ssize_t n = read(fd, buf, sizeof(buf));
288073bf9235SOphir Munk 
288173bf9235SOphir Munk 			close(fd);
288273bf9235SOphir Munk 			if (n != -1) {
288373bf9235SOphir Munk 				*stat = strtoull(buf, NULL, 10);
288473bf9235SOphir Munk 				return 0;
288573bf9235SOphir Munk 			}
288673bf9235SOphir Munk 		}
288773bf9235SOphir Munk 	}
288873bf9235SOphir Munk 	*stat = 0;
288973bf9235SOphir Munk 	return 1;
289073bf9235SOphir Munk }
289173bf9235SOphir Munk 
289273bf9235SOphir Munk /**
2893d5ed8aa9SOphir Munk  * Set the reg_mr and dereg_mr call backs
2894d5ed8aa9SOphir Munk  *
2895d5ed8aa9SOphir Munk  * @param reg_mr_cb[out]
2896d5ed8aa9SOphir Munk  *   Pointer to reg_mr func
2897d5ed8aa9SOphir Munk  * @param dereg_mr_cb[out]
2898d5ed8aa9SOphir Munk  *   Pointer to dereg_mr func
2899d5ed8aa9SOphir Munk  *
2900d5ed8aa9SOphir Munk  */
2901d5ed8aa9SOphir Munk void
2902d5ed8aa9SOphir Munk mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2903d5ed8aa9SOphir Munk 		      mlx5_dereg_mr_t *dereg_mr_cb)
2904d5ed8aa9SOphir Munk {
2905db12615bSOphir Munk 	*reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2906db12615bSOphir Munk 	*dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2907d5ed8aa9SOphir Munk }
2908d5ed8aa9SOphir Munk 
2909ab27cdd9SOphir Munk /**
2910ab27cdd9SOphir Munk  * Remove a MAC address from device
2911ab27cdd9SOphir Munk  *
2912ab27cdd9SOphir Munk  * @param dev
2913ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
2914ab27cdd9SOphir Munk  * @param index
2915ab27cdd9SOphir Munk  *   MAC address index.
2916ab27cdd9SOphir Munk  */
2917ab27cdd9SOphir Munk void
2918ab27cdd9SOphir Munk mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2919ab27cdd9SOphir Munk {
2920ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
2921ab27cdd9SOphir Munk 	const int vf = priv->config.vf;
2922ab27cdd9SOphir Munk 
2923ab27cdd9SOphir Munk 	if (vf)
2924ab27cdd9SOphir Munk 		mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2925ab27cdd9SOphir Munk 					mlx5_ifindex(dev), priv->mac_own,
2926ab27cdd9SOphir Munk 					&dev->data->mac_addrs[index], index);
2927ab27cdd9SOphir Munk }
2928ab27cdd9SOphir Munk 
2929ab27cdd9SOphir Munk /**
2930ab27cdd9SOphir Munk  * Adds a MAC address to the device
2931ab27cdd9SOphir Munk  *
2932ab27cdd9SOphir Munk  * @param dev
2933ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
2934ab27cdd9SOphir Munk  * @param mac_addr
2935ab27cdd9SOphir Munk  *   MAC address to register.
2936ab27cdd9SOphir Munk  * @param index
2937ab27cdd9SOphir Munk  *   MAC address index.
2938ab27cdd9SOphir Munk  *
2939ab27cdd9SOphir Munk  * @return
2940ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
2941ab27cdd9SOphir Munk  */
2942ab27cdd9SOphir Munk int
2943ab27cdd9SOphir Munk mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2944ab27cdd9SOphir Munk 		     uint32_t index)
2945ab27cdd9SOphir Munk {
2946ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
2947ab27cdd9SOphir Munk 	const int vf = priv->config.vf;
2948ab27cdd9SOphir Munk 	int ret = 0;
2949ab27cdd9SOphir Munk 
2950ab27cdd9SOphir Munk 	if (vf)
2951ab27cdd9SOphir Munk 		ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2952ab27cdd9SOphir Munk 					   mlx5_ifindex(dev), priv->mac_own,
2953ab27cdd9SOphir Munk 					   mac, index);
2954ab27cdd9SOphir Munk 	return ret;
2955ab27cdd9SOphir Munk }
2956ab27cdd9SOphir Munk 
2957ab27cdd9SOphir Munk /**
2958ab27cdd9SOphir Munk  * Modify a VF MAC address
2959ab27cdd9SOphir Munk  *
2960ab27cdd9SOphir Munk  * @param priv
2961ab27cdd9SOphir Munk  *   Pointer to device private data.
2962ab27cdd9SOphir Munk  * @param mac_addr
2963ab27cdd9SOphir Munk  *   MAC address to modify into.
2964ab27cdd9SOphir Munk  * @param iface_idx
2965ab27cdd9SOphir Munk  *   Net device interface index
2966ab27cdd9SOphir Munk  * @param vf_index
2967ab27cdd9SOphir Munk  *   VF index
2968ab27cdd9SOphir Munk  *
2969ab27cdd9SOphir Munk  * @return
2970ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
2971ab27cdd9SOphir Munk  */
2972ab27cdd9SOphir Munk int
2973ab27cdd9SOphir Munk mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2974ab27cdd9SOphir Munk 			   unsigned int iface_idx,
2975ab27cdd9SOphir Munk 			   struct rte_ether_addr *mac_addr,
2976ab27cdd9SOphir Munk 			   int vf_index)
2977ab27cdd9SOphir Munk {
2978ab27cdd9SOphir Munk 	return mlx5_nl_vf_mac_addr_modify
2979ab27cdd9SOphir Munk 		(priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2980ab27cdd9SOphir Munk }
2981ab27cdd9SOphir Munk 
29824d18abd1SOphir Munk /**
29834d18abd1SOphir Munk  * Set device promiscuous mode
29844d18abd1SOphir Munk  *
29854d18abd1SOphir Munk  * @param dev
29864d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
29874d18abd1SOphir Munk  * @param enable
29884d18abd1SOphir Munk  *   0 - promiscuous is disabled, otherwise - enabled
29894d18abd1SOphir Munk  *
29904d18abd1SOphir Munk  * @return
29914d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
29924d18abd1SOphir Munk  */
29934d18abd1SOphir Munk int
29944d18abd1SOphir Munk mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
29954d18abd1SOphir Munk {
29964d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
29974d18abd1SOphir Munk 
29984d18abd1SOphir Munk 	return mlx5_nl_promisc(priv->nl_socket_route,
29994d18abd1SOphir Munk 			       mlx5_ifindex(dev), !!enable);
30004d18abd1SOphir Munk }
30014d18abd1SOphir Munk 
30024d18abd1SOphir Munk /**
30034d18abd1SOphir Munk  * Set device promiscuous mode
30044d18abd1SOphir Munk  *
30054d18abd1SOphir Munk  * @param dev
30064d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
30074d18abd1SOphir Munk  * @param enable
30084d18abd1SOphir Munk  *   0 - all multicase is disabled, otherwise - enabled
30094d18abd1SOphir Munk  *
30104d18abd1SOphir Munk  * @return
30114d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
30124d18abd1SOphir Munk  */
30134d18abd1SOphir Munk int
30144d18abd1SOphir Munk mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
30154d18abd1SOphir Munk {
30164d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
30174d18abd1SOphir Munk 
30184d18abd1SOphir Munk 	return mlx5_nl_allmulti(priv->nl_socket_route,
30194d18abd1SOphir Munk 				mlx5_ifindex(dev), !!enable);
30204d18abd1SOphir Munk }
30214d18abd1SOphir Munk 
3022f00f6562SOphir Munk /**
3023f00f6562SOphir Munk  * Flush device MAC addresses
3024f00f6562SOphir Munk  *
3025f00f6562SOphir Munk  * @param dev
3026f00f6562SOphir Munk  *   Pointer to Ethernet device structure.
3027f00f6562SOphir Munk  *
3028f00f6562SOphir Munk  */
3029f00f6562SOphir Munk void
3030f00f6562SOphir Munk mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3031f00f6562SOphir Munk {
3032f00f6562SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
3033f00f6562SOphir Munk 
3034f00f6562SOphir Munk 	mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3035f00f6562SOphir Munk 			       dev->data->mac_addrs,
3036f00f6562SOphir Munk 			       MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
3037f00f6562SOphir Munk }
3038