1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause 2f44b09f9SOphir Munk * Copyright 2015 6WIND S.A. 3f44b09f9SOphir Munk * Copyright 2020 Mellanox Technologies, Ltd 4f44b09f9SOphir Munk */ 5f44b09f9SOphir Munk 6f44b09f9SOphir Munk #include <stddef.h> 7f44b09f9SOphir Munk #include <unistd.h> 8f44b09f9SOphir Munk #include <string.h> 9f44b09f9SOphir Munk #include <stdint.h> 10f44b09f9SOphir Munk #include <stdlib.h> 11f44b09f9SOphir Munk #include <errno.h> 12f44b09f9SOphir Munk #include <net/if.h> 13f44b09f9SOphir Munk #include <linux/rtnetlink.h> 1473bf9235SOphir Munk #include <linux/sockios.h> 1573bf9235SOphir Munk #include <linux/ethtool.h> 16f44b09f9SOphir Munk #include <fcntl.h> 17f44b09f9SOphir Munk 18f44b09f9SOphir Munk #include <rte_malloc.h> 19df96fd0dSBruce Richardson #include <ethdev_driver.h> 20df96fd0dSBruce Richardson #include <ethdev_pci.h> 21f44b09f9SOphir Munk #include <rte_pci.h> 22f44b09f9SOphir Munk #include <rte_bus_pci.h> 23919488fbSXueming Li #include <rte_bus_auxiliary.h> 24f44b09f9SOphir Munk #include <rte_common.h> 25f44b09f9SOphir Munk #include <rte_kvargs.h> 26f44b09f9SOphir Munk #include <rte_rwlock.h> 27f44b09f9SOphir Munk #include <rte_spinlock.h> 28f44b09f9SOphir Munk #include <rte_string_fns.h> 29f44b09f9SOphir Munk #include <rte_alarm.h> 302aba9fc7SOphir Munk #include <rte_eal_paging.h> 31f44b09f9SOphir Munk 32f44b09f9SOphir Munk #include <mlx5_glue.h> 33f44b09f9SOphir Munk #include <mlx5_devx_cmds.h> 34f44b09f9SOphir Munk #include <mlx5_common.h> 352eb4d010SOphir Munk #include <mlx5_common_mp.h> 36d5ed8aa9SOphir Munk #include <mlx5_common_mr.h> 375522da6bSSuanming Mou #include <mlx5_malloc.h> 38f44b09f9SOphir Munk 39f44b09f9SOphir Munk #include "mlx5_defs.h" 40f44b09f9SOphir Munk #include "mlx5.h" 41391b8bccSOphir Munk #include "mlx5_common_os.h" 42f44b09f9SOphir Munk #include "mlx5_utils.h" 43f44b09f9SOphir Munk #include "mlx5_rxtx.h" 44151cbe3aSMichael Baum #include "mlx5_rx.h" 45377b69fbSMichael Baum #include "mlx5_tx.h" 46f44b09f9SOphir Munk #include "mlx5_autoconf.h" 47f44b09f9SOphir Munk #include "mlx5_flow.h" 48f44b09f9SOphir Munk #include "rte_pmd_mlx5.h" 494f96d913SOphir Munk #include "mlx5_verbs.h" 50f00f6562SOphir Munk #include "mlx5_nl.h" 516deb19e1SMichael Baum #include "mlx5_devx.h" 52f44b09f9SOphir Munk 532eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW 542eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 552eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 562eb4d010SOphir Munk #endif 572eb4d010SOphir Munk 582eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 592eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 602eb4d010SOphir Munk #endif 612eb4d010SOphir Munk 622e86c4e5SOphir Munk static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 632e86c4e5SOphir Munk 642e86c4e5SOphir Munk /* Spinlock for mlx5_shared_data allocation. */ 652e86c4e5SOphir Munk static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 662e86c4e5SOphir Munk 672e86c4e5SOphir Munk /* Process local data for secondary processes. */ 682e86c4e5SOphir Munk static struct mlx5_local_data mlx5_local_data; 692e86c4e5SOphir Munk 70b4edeaf3SSuanming Mou /* rte flow indexed pool configuration. */ 71b4edeaf3SSuanming Mou static struct mlx5_indexed_pool_config icfg[] = { 72b4edeaf3SSuanming Mou { 73b4edeaf3SSuanming Mou .size = sizeof(struct rte_flow), 74b4edeaf3SSuanming Mou .trunk_size = 64, 75b4edeaf3SSuanming Mou .need_lock = 1, 76b4edeaf3SSuanming Mou .release_mem_en = 0, 77b4edeaf3SSuanming Mou .malloc = mlx5_malloc, 78b4edeaf3SSuanming Mou .free = mlx5_free, 79b4edeaf3SSuanming Mou .per_core_cache = 0, 80b4edeaf3SSuanming Mou .type = "ctl_flow_ipool", 81b4edeaf3SSuanming Mou }, 82b4edeaf3SSuanming Mou { 83b4edeaf3SSuanming Mou .size = sizeof(struct rte_flow), 84b4edeaf3SSuanming Mou .trunk_size = 64, 85b4edeaf3SSuanming Mou .grow_trunk = 3, 86b4edeaf3SSuanming Mou .grow_shift = 2, 87b4edeaf3SSuanming Mou .need_lock = 1, 88b4edeaf3SSuanming Mou .release_mem_en = 0, 89b4edeaf3SSuanming Mou .malloc = mlx5_malloc, 90b4edeaf3SSuanming Mou .free = mlx5_free, 91b4edeaf3SSuanming Mou .per_core_cache = 1 << 14, 92b4edeaf3SSuanming Mou .type = "rte_flow_ipool", 93b4edeaf3SSuanming Mou }, 94b4edeaf3SSuanming Mou { 95b4edeaf3SSuanming Mou .size = sizeof(struct rte_flow), 96b4edeaf3SSuanming Mou .trunk_size = 64, 97b4edeaf3SSuanming Mou .grow_trunk = 3, 98b4edeaf3SSuanming Mou .grow_shift = 2, 99b4edeaf3SSuanming Mou .need_lock = 1, 100b4edeaf3SSuanming Mou .release_mem_en = 0, 101b4edeaf3SSuanming Mou .malloc = mlx5_malloc, 102b4edeaf3SSuanming Mou .free = mlx5_free, 103b4edeaf3SSuanming Mou .per_core_cache = 0, 104b4edeaf3SSuanming Mou .type = "mcp_flow_ipool", 105b4edeaf3SSuanming Mou }, 106b4edeaf3SSuanming Mou }; 107b4edeaf3SSuanming Mou 108f44b09f9SOphir Munk /** 10908d1838fSDekel Peled * Set the completion channel file descriptor interrupt as non-blocking. 11008d1838fSDekel Peled * 11108d1838fSDekel Peled * @param[in] rxq_obj 11208d1838fSDekel Peled * Pointer to RQ channel object, which includes the channel fd 11308d1838fSDekel Peled * 11408d1838fSDekel Peled * @param[out] fd 1157be78d02SJosh Soref * The file descriptor (representing the interrupt) used in this channel. 11608d1838fSDekel Peled * 11708d1838fSDekel Peled * @return 11808d1838fSDekel Peled * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 11908d1838fSDekel Peled */ 12008d1838fSDekel Peled int 12108d1838fSDekel Peled mlx5_os_set_nonblock_channel_fd(int fd) 12208d1838fSDekel Peled { 12308d1838fSDekel Peled int flags; 12408d1838fSDekel Peled 12508d1838fSDekel Peled flags = fcntl(fd, F_GETFL); 12608d1838fSDekel Peled return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 12708d1838fSDekel Peled } 12808d1838fSDekel Peled 12908d1838fSDekel Peled /** 130e85f623eSOphir Munk * Get mlx5 device attributes. The glue function query_device_ex() is called 131e85f623eSOphir Munk * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 132e85f623eSOphir Munk * device attributes from the glue out parameter. 133e85f623eSOphir Munk * 134fe46b20cSMichael Baum * @param cdev 135fe46b20cSMichael Baum * Pointer to mlx5 device. 136e85f623eSOphir Munk * 137e85f623eSOphir Munk * @param device_attr 138e85f623eSOphir Munk * Pointer to mlx5 device attributes. 139e85f623eSOphir Munk * 140e85f623eSOphir Munk * @return 1416be4c57aSMichael Baum * 0 on success, a negative errno value otherwise and rte_errno is set. 142e85f623eSOphir Munk */ 143e85f623eSOphir Munk int 144fe46b20cSMichael Baum mlx5_os_get_dev_attr(struct mlx5_common_device *cdev, 145fe46b20cSMichael Baum struct mlx5_dev_attr *device_attr) 146e85f623eSOphir Munk { 147e85f623eSOphir Munk int err; 148fe46b20cSMichael Baum struct ibv_context *ctx = cdev->ctx; 149e85f623eSOphir Munk struct ibv_device_attr_ex attr_ex; 150fe46b20cSMichael Baum 151e85f623eSOphir Munk memset(device_attr, 0, sizeof(*device_attr)); 152e85f623eSOphir Munk err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 1536be4c57aSMichael Baum if (err) { 1546be4c57aSMichael Baum rte_errno = errno; 1556be4c57aSMichael Baum return -rte_errno; 1566be4c57aSMichael Baum } 157e85f623eSOphir Munk device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 158e85f623eSOphir Munk device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 159e85f623eSOphir Munk device_attr->max_sge = attr_ex.orig_attr.max_sge; 160e85f623eSOphir Munk device_attr->max_cq = attr_ex.orig_attr.max_cq; 1611f29d15eSOphir Munk device_attr->max_cqe = attr_ex.orig_attr.max_cqe; 1621f29d15eSOphir Munk device_attr->max_mr = attr_ex.orig_attr.max_mr; 1631f29d15eSOphir Munk device_attr->max_pd = attr_ex.orig_attr.max_pd; 164e85f623eSOphir Munk device_attr->max_qp = attr_ex.orig_attr.max_qp; 1651f29d15eSOphir Munk device_attr->max_srq = attr_ex.orig_attr.max_srq; 1661f29d15eSOphir Munk device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr; 167e85f623eSOphir Munk device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 168e85f623eSOphir Munk device_attr->max_rwq_indirection_table_size = 169e85f623eSOphir Munk attr_ex.rss_caps.max_rwq_indirection_table_size; 170e85f623eSOphir Munk device_attr->max_tso = attr_ex.tso_caps.max_tso; 171e85f623eSOphir Munk device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 172e85f623eSOphir Munk 173e85f623eSOphir Munk struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 1748f464810SMichael Baum #ifdef HAVE_IBV_MLX5_MOD_SWP 1758f464810SMichael Baum dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 1768f464810SMichael Baum #endif 1778f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1788f464810SMichael Baum dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 1798f464810SMichael Baum #endif 1808f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 1818f464810SMichael Baum dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 1828f464810SMichael Baum #endif 183e85f623eSOphir Munk err = mlx5_glue->dv_query_device(ctx, &dv_attr); 1846be4c57aSMichael Baum if (err) { 1856be4c57aSMichael Baum rte_errno = errno; 1866be4c57aSMichael Baum return -rte_errno; 1876be4c57aSMichael Baum } 188e85f623eSOphir Munk 189e85f623eSOphir Munk device_attr->flags = dv_attr.flags; 190e85f623eSOphir Munk device_attr->comp_mask = dv_attr.comp_mask; 191e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 192e85f623eSOphir Munk device_attr->sw_parsing_offloads = 193e85f623eSOphir Munk dv_attr.sw_parsing_caps.sw_parsing_offloads; 194e85f623eSOphir Munk #endif 1958f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 196e85f623eSOphir Munk device_attr->min_single_stride_log_num_of_bytes = 197e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 198e85f623eSOphir Munk device_attr->max_single_stride_log_num_of_bytes = 199e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 200e85f623eSOphir Munk device_attr->min_single_wqe_log_num_of_strides = 201e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 202e85f623eSOphir Munk device_attr->max_single_wqe_log_num_of_strides = 203e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 204e85f623eSOphir Munk device_attr->stride_supported_qpts = 205e85f623eSOphir Munk dv_attr.striding_rq_caps.supported_qpts; 2068f464810SMichael Baum #endif 207e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 208e85f623eSOphir Munk device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 209e85f623eSOphir Munk #endif 210520e3f48SKamil Vojanec strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver, 211520e3f48SKamil Vojanec sizeof(device_attr->fw_ver)); 212e85f623eSOphir Munk 2136be4c57aSMichael Baum return 0; 214e85f623eSOphir Munk } 2152eb4d010SOphir Munk 2162eb4d010SOphir Munk /** 217630a587bSRongwei Liu * Detect misc5 support or not 218630a587bSRongwei Liu * 219630a587bSRongwei Liu * @param[in] priv 220630a587bSRongwei Liu * Device private data pointer 221630a587bSRongwei Liu */ 222630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR 223630a587bSRongwei Liu static void 224630a587bSRongwei Liu __mlx5_discovery_misc5_cap(struct mlx5_priv *priv) 225630a587bSRongwei Liu { 226630a587bSRongwei Liu #ifdef HAVE_IBV_FLOW_DV_SUPPORT 227630a587bSRongwei Liu /* Dummy VxLAN matcher to detect rdma-core misc5 cap 228630a587bSRongwei Liu * Case: IPv4--->UDP--->VxLAN--->vni 229630a587bSRongwei Liu */ 230630a587bSRongwei Liu void *tbl; 231630a587bSRongwei Liu struct mlx5_flow_dv_match_params matcher_mask; 232630a587bSRongwei Liu void *match_m; 233630a587bSRongwei Liu void *matcher; 234630a587bSRongwei Liu void *headers_m; 235630a587bSRongwei Liu void *misc5_m; 236630a587bSRongwei Liu uint32_t *tunnel_header_m; 237630a587bSRongwei Liu struct mlx5dv_flow_matcher_attr dv_attr; 238630a587bSRongwei Liu 239630a587bSRongwei Liu memset(&matcher_mask, 0, sizeof(matcher_mask)); 240630a587bSRongwei Liu matcher_mask.size = sizeof(matcher_mask.buf); 241630a587bSRongwei Liu match_m = matcher_mask.buf; 242630a587bSRongwei Liu headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers); 243630a587bSRongwei Liu misc5_m = MLX5_ADDR_OF(fte_match_param, 244630a587bSRongwei Liu match_m, misc_parameters_5); 245630a587bSRongwei Liu tunnel_header_m = (uint32_t *) 246630a587bSRongwei Liu MLX5_ADDR_OF(fte_match_set_misc5, 247630a587bSRongwei Liu misc5_m, tunnel_header_1); 248630a587bSRongwei Liu MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff); 249630a587bSRongwei Liu MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4); 250630a587bSRongwei Liu MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff); 251630a587bSRongwei Liu *tunnel_header_m = 0xffffff; 252630a587bSRongwei Liu 253630a587bSRongwei Liu tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1); 254630a587bSRongwei Liu if (!tbl) { 255630a587bSRongwei Liu DRV_LOG(INFO, "No SW steering support"); 256630a587bSRongwei Liu return; 257630a587bSRongwei Liu } 258630a587bSRongwei Liu dv_attr.type = IBV_FLOW_ATTR_NORMAL, 259630a587bSRongwei Liu dv_attr.match_mask = (void *)&matcher_mask, 260630a587bSRongwei Liu dv_attr.match_criteria_enable = 261630a587bSRongwei Liu (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) | 262630a587bSRongwei Liu (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT); 263630a587bSRongwei Liu dv_attr.priority = 3; 264630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR_ESWITCH 265630a587bSRongwei Liu void *misc2_m; 266630a587bSRongwei Liu if (priv->config.dv_esw_en) { 267630a587bSRongwei Liu /* FDB enabled reg_c_0 */ 268630a587bSRongwei Liu dv_attr.match_criteria_enable |= 269630a587bSRongwei Liu (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT); 270630a587bSRongwei Liu misc2_m = MLX5_ADDR_OF(fte_match_param, 271630a587bSRongwei Liu match_m, misc_parameters_2); 272630a587bSRongwei Liu MLX5_SET(fte_match_set_misc2, misc2_m, 273630a587bSRongwei Liu metadata_reg_c_0, 0xffff); 274630a587bSRongwei Liu } 275630a587bSRongwei Liu #endif 276ca1418ceSMichael Baum matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx, 277630a587bSRongwei Liu &dv_attr, tbl); 278630a587bSRongwei Liu if (matcher) { 279630a587bSRongwei Liu priv->sh->misc5_cap = 1; 280630a587bSRongwei Liu mlx5_glue->dv_destroy_flow_matcher(matcher); 281630a587bSRongwei Liu } 282630a587bSRongwei Liu mlx5_glue->dr_destroy_flow_tbl(tbl); 283630a587bSRongwei Liu #else 284630a587bSRongwei Liu RTE_SET_USED(priv); 285630a587bSRongwei Liu #endif 286630a587bSRongwei Liu } 287630a587bSRongwei Liu #endif 288630a587bSRongwei Liu 289630a587bSRongwei Liu /** 2902eb4d010SOphir Munk * Initialize DR related data within private structure. 2912eb4d010SOphir Munk * Routine checks the reference counter and does actual 2922eb4d010SOphir Munk * resources creation/initialization only if counter is zero. 2932eb4d010SOphir Munk * 2942eb4d010SOphir Munk * @param[in] priv 2952eb4d010SOphir Munk * Pointer to the private device data structure. 2962eb4d010SOphir Munk * 2972eb4d010SOphir Munk * @return 2982eb4d010SOphir Munk * Zero on success, positive error code otherwise. 2992eb4d010SOphir Munk */ 3002eb4d010SOphir Munk static int 3012eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv) 3022eb4d010SOphir Munk { 3032eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = priv->sh; 304961b6774SMatan Azrad char s[MLX5_NAME_SIZE] __rte_unused; 30516dbba25SXueming Li int err; 3062eb4d010SOphir Munk 30716dbba25SXueming Li MLX5_ASSERT(sh && sh->refcnt); 30816dbba25SXueming Li if (sh->refcnt > 1) 30916dbba25SXueming Li return 0; 3102eb4d010SOphir Munk err = mlx5_alloc_table_hash_list(priv); 3112eb4d010SOphir Munk if (err) 312291140c6SSuanming Mou goto error; 313291140c6SSuanming Mou /* The resources below are only valid with DV support. */ 314291140c6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT 315491b7137SMatan Azrad /* Init port id action list. */ 316e78e5408SMatan Azrad snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name); 317d03b7860SSuanming Mou sh->port_id_action_list = mlx5_list_create(s, sh, true, 3180fd5f82aSXueming Li flow_dv_port_id_create_cb, 3190fd5f82aSXueming Li flow_dv_port_id_match_cb, 320491b7137SMatan Azrad flow_dv_port_id_remove_cb, 321491b7137SMatan Azrad flow_dv_port_id_clone_cb, 322491b7137SMatan Azrad flow_dv_port_id_clone_free_cb); 323679f46c7SMatan Azrad if (!sh->port_id_action_list) 324679f46c7SMatan Azrad goto error; 325491b7137SMatan Azrad /* Init push vlan action list. */ 326e78e5408SMatan Azrad snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name); 327d03b7860SSuanming Mou sh->push_vlan_action_list = mlx5_list_create(s, sh, true, 3283422af2aSXueming Li flow_dv_push_vlan_create_cb, 3293422af2aSXueming Li flow_dv_push_vlan_match_cb, 330491b7137SMatan Azrad flow_dv_push_vlan_remove_cb, 331491b7137SMatan Azrad flow_dv_push_vlan_clone_cb, 332491b7137SMatan Azrad flow_dv_push_vlan_clone_free_cb); 333679f46c7SMatan Azrad if (!sh->push_vlan_action_list) 334679f46c7SMatan Azrad goto error; 335491b7137SMatan Azrad /* Init sample action list. */ 336e78e5408SMatan Azrad snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name); 337d03b7860SSuanming Mou sh->sample_action_list = mlx5_list_create(s, sh, true, 33819784141SSuanming Mou flow_dv_sample_create_cb, 33919784141SSuanming Mou flow_dv_sample_match_cb, 340491b7137SMatan Azrad flow_dv_sample_remove_cb, 341491b7137SMatan Azrad flow_dv_sample_clone_cb, 342491b7137SMatan Azrad flow_dv_sample_clone_free_cb); 343679f46c7SMatan Azrad if (!sh->sample_action_list) 344679f46c7SMatan Azrad goto error; 345491b7137SMatan Azrad /* Init dest array action list. */ 346e78e5408SMatan Azrad snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name); 347d03b7860SSuanming Mou sh->dest_array_list = mlx5_list_create(s, sh, true, 34819784141SSuanming Mou flow_dv_dest_array_create_cb, 34919784141SSuanming Mou flow_dv_dest_array_match_cb, 350491b7137SMatan Azrad flow_dv_dest_array_remove_cb, 351491b7137SMatan Azrad flow_dv_dest_array_clone_cb, 352491b7137SMatan Azrad flow_dv_dest_array_clone_free_cb); 353679f46c7SMatan Azrad if (!sh->dest_array_list) 354679f46c7SMatan Azrad goto error; 3559086ac09SGregory Etelson /* Init shared flex parsers list, no need lcore_share */ 3569086ac09SGregory Etelson snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name); 3579086ac09SGregory Etelson sh->flex_parsers_dv = mlx5_list_create(s, sh, false, 3589086ac09SGregory Etelson mlx5_flex_parser_create_cb, 3599086ac09SGregory Etelson mlx5_flex_parser_match_cb, 3609086ac09SGregory Etelson mlx5_flex_parser_remove_cb, 3619086ac09SGregory Etelson mlx5_flex_parser_clone_cb, 3629086ac09SGregory Etelson mlx5_flex_parser_clone_free_cb); 3639086ac09SGregory Etelson if (!sh->flex_parsers_dv) 3649086ac09SGregory Etelson goto error; 365291140c6SSuanming Mou #endif 3662eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 3672eb4d010SOphir Munk void *domain; 3682eb4d010SOphir Munk 3692eb4d010SOphir Munk /* Reference counter is zero, we should initialize structures. */ 370ca1418ceSMichael Baum domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 3712eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 3722eb4d010SOphir Munk if (!domain) { 3732eb4d010SOphir Munk DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 3742eb4d010SOphir Munk err = errno; 3752eb4d010SOphir Munk goto error; 3762eb4d010SOphir Munk } 3772eb4d010SOphir Munk sh->rx_domain = domain; 378ca1418ceSMichael Baum domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 3792eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 3802eb4d010SOphir Munk if (!domain) { 3812eb4d010SOphir Munk DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 3822eb4d010SOphir Munk err = errno; 3832eb4d010SOphir Munk goto error; 3842eb4d010SOphir Munk } 3852eb4d010SOphir Munk sh->tx_domain = domain; 3862eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 3872eb4d010SOphir Munk if (priv->config.dv_esw_en) { 388ca1418ceSMichael Baum domain = mlx5_glue->dr_create_domain(sh->cdev->ctx, 389ca1418ceSMichael Baum MLX5DV_DR_DOMAIN_TYPE_FDB); 3902eb4d010SOphir Munk if (!domain) { 3912eb4d010SOphir Munk DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 3922eb4d010SOphir Munk err = errno; 3932eb4d010SOphir Munk goto error; 3942eb4d010SOphir Munk } 3952eb4d010SOphir Munk sh->fdb_domain = domain; 396da845ae9SViacheslav Ovsiienko } 397da845ae9SViacheslav Ovsiienko /* 398da845ae9SViacheslav Ovsiienko * The drop action is just some dummy placeholder in rdma-core. It 399da845ae9SViacheslav Ovsiienko * does not belong to domains and has no any attributes, and, can be 400da845ae9SViacheslav Ovsiienko * shared by the entire device. 401da845ae9SViacheslav Ovsiienko */ 402da845ae9SViacheslav Ovsiienko sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop(); 403da845ae9SViacheslav Ovsiienko if (!sh->dr_drop_action) { 404da845ae9SViacheslav Ovsiienko DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop"); 405da845ae9SViacheslav Ovsiienko err = errno; 406da845ae9SViacheslav Ovsiienko goto error; 4072eb4d010SOphir Munk } 4082eb4d010SOphir Munk #endif 409f3020a33SSuanming Mou if (!sh->tunnel_hub && priv->config.dv_miss_info) 4104ec6360dSGregory Etelson err = mlx5_alloc_tunnel_hub(sh); 4114ec6360dSGregory Etelson if (err) { 4124ec6360dSGregory Etelson DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 4134ec6360dSGregory Etelson goto error; 4144ec6360dSGregory Etelson } 4152eb4d010SOphir Munk if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 4162eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 4172eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 4182eb4d010SOphir Munk if (sh->fdb_domain) 4192eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 4202eb4d010SOphir Munk } 4212eb4d010SOphir Munk sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 422e39226bdSJiawei Wang if (!priv->config.allow_duplicate_pattern) { 423e39226bdSJiawei Wang #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE 424e39226bdSJiawei Wang DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?"); 425e39226bdSJiawei Wang #endif 426e39226bdSJiawei Wang mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0); 427e39226bdSJiawei Wang mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0); 428e39226bdSJiawei Wang if (sh->fdb_domain) 429e39226bdSJiawei Wang mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0); 430e39226bdSJiawei Wang } 431630a587bSRongwei Liu 432630a587bSRongwei Liu __mlx5_discovery_misc5_cap(priv); 4332eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 434b80726dcSSuanming Mou sh->default_miss_action = 435b80726dcSSuanming Mou mlx5_glue->dr_create_flow_action_default_miss(); 436b80726dcSSuanming Mou if (!sh->default_miss_action) 437b80726dcSSuanming Mou DRV_LOG(WARNING, "Default miss action is not supported."); 43809c25553SXueming Li LIST_INIT(&sh->shared_rxqs); 4392eb4d010SOphir Munk return 0; 4402eb4d010SOphir Munk error: 4412eb4d010SOphir Munk /* Rollback the created objects. */ 4422eb4d010SOphir Munk if (sh->rx_domain) { 4432eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 4442eb4d010SOphir Munk sh->rx_domain = NULL; 4452eb4d010SOphir Munk } 4462eb4d010SOphir Munk if (sh->tx_domain) { 4472eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 4482eb4d010SOphir Munk sh->tx_domain = NULL; 4492eb4d010SOphir Munk } 4502eb4d010SOphir Munk if (sh->fdb_domain) { 4512eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 4522eb4d010SOphir Munk sh->fdb_domain = NULL; 4532eb4d010SOphir Munk } 454da845ae9SViacheslav Ovsiienko if (sh->dr_drop_action) { 455da845ae9SViacheslav Ovsiienko mlx5_glue->destroy_flow_action(sh->dr_drop_action); 456da845ae9SViacheslav Ovsiienko sh->dr_drop_action = NULL; 4572eb4d010SOphir Munk } 4582eb4d010SOphir Munk if (sh->pop_vlan_action) { 4592eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 4602eb4d010SOphir Munk sh->pop_vlan_action = NULL; 4612eb4d010SOphir Munk } 462bf615b07SSuanming Mou if (sh->encaps_decaps) { 463e69a5922SXueming Li mlx5_hlist_destroy(sh->encaps_decaps); 464bf615b07SSuanming Mou sh->encaps_decaps = NULL; 465bf615b07SSuanming Mou } 4663fe88961SSuanming Mou if (sh->modify_cmds) { 467e69a5922SXueming Li mlx5_hlist_destroy(sh->modify_cmds); 4683fe88961SSuanming Mou sh->modify_cmds = NULL; 4693fe88961SSuanming Mou } 4702eb4d010SOphir Munk if (sh->tag_table) { 4712eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 472e69a5922SXueming Li mlx5_hlist_destroy(sh->tag_table); 4732eb4d010SOphir Munk sh->tag_table = NULL; 4742eb4d010SOphir Munk } 4754ec6360dSGregory Etelson if (sh->tunnel_hub) { 4764ec6360dSGregory Etelson mlx5_release_tunnel_hub(sh, priv->dev_port); 4774ec6360dSGregory Etelson sh->tunnel_hub = NULL; 4784ec6360dSGregory Etelson } 4792eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 480679f46c7SMatan Azrad if (sh->port_id_action_list) { 481679f46c7SMatan Azrad mlx5_list_destroy(sh->port_id_action_list); 482679f46c7SMatan Azrad sh->port_id_action_list = NULL; 483679f46c7SMatan Azrad } 484679f46c7SMatan Azrad if (sh->push_vlan_action_list) { 485679f46c7SMatan Azrad mlx5_list_destroy(sh->push_vlan_action_list); 486679f46c7SMatan Azrad sh->push_vlan_action_list = NULL; 487679f46c7SMatan Azrad } 488679f46c7SMatan Azrad if (sh->sample_action_list) { 489679f46c7SMatan Azrad mlx5_list_destroy(sh->sample_action_list); 490679f46c7SMatan Azrad sh->sample_action_list = NULL; 491679f46c7SMatan Azrad } 492679f46c7SMatan Azrad if (sh->dest_array_list) { 493679f46c7SMatan Azrad mlx5_list_destroy(sh->dest_array_list); 494679f46c7SMatan Azrad sh->dest_array_list = NULL; 495679f46c7SMatan Azrad } 4962eb4d010SOphir Munk return err; 4972eb4d010SOphir Munk } 4982eb4d010SOphir Munk 4992eb4d010SOphir Munk /** 5002eb4d010SOphir Munk * Destroy DR related data within private structure. 5012eb4d010SOphir Munk * 5022eb4d010SOphir Munk * @param[in] priv 5032eb4d010SOphir Munk * Pointer to the private device data structure. 5042eb4d010SOphir Munk */ 5052eb4d010SOphir Munk void 5062eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv) 5072eb4d010SOphir Munk { 50816dbba25SXueming Li struct mlx5_dev_ctx_shared *sh = priv->sh; 5092eb4d010SOphir Munk 51016dbba25SXueming Li MLX5_ASSERT(sh && sh->refcnt); 51116dbba25SXueming Li if (sh->refcnt > 1) 5122eb4d010SOphir Munk return; 51309c25553SXueming Li MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs)); 5142eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 5152eb4d010SOphir Munk if (sh->rx_domain) { 5162eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 5172eb4d010SOphir Munk sh->rx_domain = NULL; 5182eb4d010SOphir Munk } 5192eb4d010SOphir Munk if (sh->tx_domain) { 5202eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 5212eb4d010SOphir Munk sh->tx_domain = NULL; 5222eb4d010SOphir Munk } 5232eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 5242eb4d010SOphir Munk if (sh->fdb_domain) { 5252eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 5262eb4d010SOphir Munk sh->fdb_domain = NULL; 5272eb4d010SOphir Munk } 528da845ae9SViacheslav Ovsiienko if (sh->dr_drop_action) { 529da845ae9SViacheslav Ovsiienko mlx5_glue->destroy_flow_action(sh->dr_drop_action); 530da845ae9SViacheslav Ovsiienko sh->dr_drop_action = NULL; 5312eb4d010SOphir Munk } 5322eb4d010SOphir Munk #endif 5332eb4d010SOphir Munk if (sh->pop_vlan_action) { 5342eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 5352eb4d010SOphir Munk sh->pop_vlan_action = NULL; 5362eb4d010SOphir Munk } 5372eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 538b80726dcSSuanming Mou if (sh->default_miss_action) 539b80726dcSSuanming Mou mlx5_glue->destroy_flow_action 540b80726dcSSuanming Mou (sh->default_miss_action); 541bf615b07SSuanming Mou if (sh->encaps_decaps) { 542e69a5922SXueming Li mlx5_hlist_destroy(sh->encaps_decaps); 543bf615b07SSuanming Mou sh->encaps_decaps = NULL; 544bf615b07SSuanming Mou } 5453fe88961SSuanming Mou if (sh->modify_cmds) { 546e69a5922SXueming Li mlx5_hlist_destroy(sh->modify_cmds); 5473fe88961SSuanming Mou sh->modify_cmds = NULL; 5483fe88961SSuanming Mou } 5492eb4d010SOphir Munk if (sh->tag_table) { 5502eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 551e69a5922SXueming Li mlx5_hlist_destroy(sh->tag_table); 5522eb4d010SOphir Munk sh->tag_table = NULL; 5532eb4d010SOphir Munk } 5544ec6360dSGregory Etelson if (sh->tunnel_hub) { 5554ec6360dSGregory Etelson mlx5_release_tunnel_hub(sh, priv->dev_port); 5564ec6360dSGregory Etelson sh->tunnel_hub = NULL; 5574ec6360dSGregory Etelson } 5582eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 559679f46c7SMatan Azrad if (sh->port_id_action_list) { 560679f46c7SMatan Azrad mlx5_list_destroy(sh->port_id_action_list); 561679f46c7SMatan Azrad sh->port_id_action_list = NULL; 562679f46c7SMatan Azrad } 563679f46c7SMatan Azrad if (sh->push_vlan_action_list) { 564679f46c7SMatan Azrad mlx5_list_destroy(sh->push_vlan_action_list); 565679f46c7SMatan Azrad sh->push_vlan_action_list = NULL; 566679f46c7SMatan Azrad } 567679f46c7SMatan Azrad if (sh->sample_action_list) { 568679f46c7SMatan Azrad mlx5_list_destroy(sh->sample_action_list); 569679f46c7SMatan Azrad sh->sample_action_list = NULL; 570679f46c7SMatan Azrad } 571679f46c7SMatan Azrad if (sh->dest_array_list) { 572679f46c7SMatan Azrad mlx5_list_destroy(sh->dest_array_list); 573679f46c7SMatan Azrad sh->dest_array_list = NULL; 574679f46c7SMatan Azrad } 5752eb4d010SOphir Munk } 5762eb4d010SOphir Munk 5772eb4d010SOphir Munk /** 5782e86c4e5SOphir Munk * Initialize shared data between primary and secondary process. 5792e86c4e5SOphir Munk * 5802e86c4e5SOphir Munk * A memzone is reserved by primary process and secondary processes attach to 5812e86c4e5SOphir Munk * the memzone. 5822e86c4e5SOphir Munk * 5832e86c4e5SOphir Munk * @return 5842e86c4e5SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 5852e86c4e5SOphir Munk */ 5862e86c4e5SOphir Munk static int 5872e86c4e5SOphir Munk mlx5_init_shared_data(void) 5882e86c4e5SOphir Munk { 5892e86c4e5SOphir Munk const struct rte_memzone *mz; 5902e86c4e5SOphir Munk int ret = 0; 5912e86c4e5SOphir Munk 5922e86c4e5SOphir Munk rte_spinlock_lock(&mlx5_shared_data_lock); 5932e86c4e5SOphir Munk if (mlx5_shared_data == NULL) { 5942e86c4e5SOphir Munk if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 5952e86c4e5SOphir Munk /* Allocate shared memory. */ 5962e86c4e5SOphir Munk mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 5972e86c4e5SOphir Munk sizeof(*mlx5_shared_data), 5982e86c4e5SOphir Munk SOCKET_ID_ANY, 0); 5992e86c4e5SOphir Munk if (mz == NULL) { 6002e86c4e5SOphir Munk DRV_LOG(ERR, 6012e86c4e5SOphir Munk "Cannot allocate mlx5 shared data"); 6022e86c4e5SOphir Munk ret = -rte_errno; 6032e86c4e5SOphir Munk goto error; 6042e86c4e5SOphir Munk } 6052e86c4e5SOphir Munk mlx5_shared_data = mz->addr; 6062e86c4e5SOphir Munk memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 6072e86c4e5SOphir Munk rte_spinlock_init(&mlx5_shared_data->lock); 6082e86c4e5SOphir Munk } else { 6092e86c4e5SOphir Munk /* Lookup allocated shared memory. */ 6102e86c4e5SOphir Munk mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 6112e86c4e5SOphir Munk if (mz == NULL) { 6122e86c4e5SOphir Munk DRV_LOG(ERR, 6132e86c4e5SOphir Munk "Cannot attach mlx5 shared data"); 6142e86c4e5SOphir Munk ret = -rte_errno; 6152e86c4e5SOphir Munk goto error; 6162e86c4e5SOphir Munk } 6172e86c4e5SOphir Munk mlx5_shared_data = mz->addr; 6182e86c4e5SOphir Munk memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 6192e86c4e5SOphir Munk } 6202e86c4e5SOphir Munk } 6212e86c4e5SOphir Munk error: 6222e86c4e5SOphir Munk rte_spinlock_unlock(&mlx5_shared_data_lock); 6232e86c4e5SOphir Munk return ret; 6242e86c4e5SOphir Munk } 6252e86c4e5SOphir Munk 6262e86c4e5SOphir Munk /** 6272e86c4e5SOphir Munk * PMD global initialization. 6282e86c4e5SOphir Munk * 6292e86c4e5SOphir Munk * Independent from individual device, this function initializes global 6302e86c4e5SOphir Munk * per-PMD data structures distinguishing primary and secondary processes. 6312e86c4e5SOphir Munk * Hence, each initialization is called once per a process. 6322e86c4e5SOphir Munk * 6332e86c4e5SOphir Munk * @return 6342e86c4e5SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 6352e86c4e5SOphir Munk */ 6362e86c4e5SOphir Munk static int 6372e86c4e5SOphir Munk mlx5_init_once(void) 6382e86c4e5SOphir Munk { 6392e86c4e5SOphir Munk struct mlx5_shared_data *sd; 6402e86c4e5SOphir Munk struct mlx5_local_data *ld = &mlx5_local_data; 6412e86c4e5SOphir Munk int ret = 0; 6422e86c4e5SOphir Munk 6432e86c4e5SOphir Munk if (mlx5_init_shared_data()) 6442e86c4e5SOphir Munk return -rte_errno; 6452e86c4e5SOphir Munk sd = mlx5_shared_data; 6462e86c4e5SOphir Munk MLX5_ASSERT(sd); 6472e86c4e5SOphir Munk rte_spinlock_lock(&sd->lock); 6482e86c4e5SOphir Munk switch (rte_eal_process_type()) { 6492e86c4e5SOphir Munk case RTE_PROC_PRIMARY: 6502e86c4e5SOphir Munk if (sd->init_done) 6512e86c4e5SOphir Munk break; 6522e86c4e5SOphir Munk ret = mlx5_mp_init_primary(MLX5_MP_NAME, 6532e86c4e5SOphir Munk mlx5_mp_os_primary_handle); 6542e86c4e5SOphir Munk if (ret) 6552e86c4e5SOphir Munk goto out; 6562e86c4e5SOphir Munk sd->init_done = true; 6572e86c4e5SOphir Munk break; 6582e86c4e5SOphir Munk case RTE_PROC_SECONDARY: 6592e86c4e5SOphir Munk if (ld->init_done) 6602e86c4e5SOphir Munk break; 6612e86c4e5SOphir Munk ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 6622e86c4e5SOphir Munk mlx5_mp_os_secondary_handle); 6632e86c4e5SOphir Munk if (ret) 6642e86c4e5SOphir Munk goto out; 6652e86c4e5SOphir Munk ++sd->secondary_cnt; 6662e86c4e5SOphir Munk ld->init_done = true; 6672e86c4e5SOphir Munk break; 6682e86c4e5SOphir Munk default: 6692e86c4e5SOphir Munk break; 6702e86c4e5SOphir Munk } 6712e86c4e5SOphir Munk out: 6722e86c4e5SOphir Munk rte_spinlock_unlock(&sd->lock); 6732e86c4e5SOphir Munk return ret; 6742e86c4e5SOphir Munk } 6752e86c4e5SOphir Munk 6762e86c4e5SOphir Munk /** 677994829e6SSuanming Mou * DV flow counter mode detect and config. 678994829e6SSuanming Mou * 679994829e6SSuanming Mou * @param dev 680994829e6SSuanming Mou * Pointer to rte_eth_dev structure. 681994829e6SSuanming Mou * 682994829e6SSuanming Mou */ 683994829e6SSuanming Mou static void 684994829e6SSuanming Mou mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) 685994829e6SSuanming Mou { 686994829e6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT 687994829e6SSuanming Mou struct mlx5_priv *priv = dev->data->dev_private; 6882b5b1aebSSuanming Mou struct mlx5_dev_ctx_shared *sh = priv->sh; 68953820561SMichael Baum struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr; 6902b5b1aebSSuanming Mou bool fallback; 691994829e6SSuanming Mou 692994829e6SSuanming Mou #ifndef HAVE_IBV_DEVX_ASYNC 6932b5b1aebSSuanming Mou fallback = true; 694994829e6SSuanming Mou #else 6952b5b1aebSSuanming Mou fallback = false; 6966dc0cbc6SMichael Baum if (!sh->cdev->config.devx || !priv->config.dv_flow_en || 69753820561SMichael Baum !hca_attr->flow_counters_dump || 69853820561SMichael Baum !(hca_attr->flow_counter_bulk_alloc_bitmap & 0x4) || 699994829e6SSuanming Mou (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP)) 7002b5b1aebSSuanming Mou fallback = true; 701994829e6SSuanming Mou #endif 7022b5b1aebSSuanming Mou if (fallback) 703994829e6SSuanming Mou DRV_LOG(INFO, "Use fall-back DV counter management. Flow " 704994829e6SSuanming Mou "counter dump:%d, bulk_alloc_bitmap:0x%hhx.", 70553820561SMichael Baum hca_attr->flow_counters_dump, 70653820561SMichael Baum hca_attr->flow_counter_bulk_alloc_bitmap); 7072b5b1aebSSuanming Mou /* Initialize fallback mode only on the port initializes sh. */ 7082b5b1aebSSuanming Mou if (sh->refcnt == 1) 7092b5b1aebSSuanming Mou sh->cmng.counter_fallback = fallback; 7102b5b1aebSSuanming Mou else if (fallback != sh->cmng.counter_fallback) 7112b5b1aebSSuanming Mou DRV_LOG(WARNING, "Port %d in sh has different fallback mode " 7122b5b1aebSSuanming Mou "with others:%d.", PORT_ID(priv), fallback); 713994829e6SSuanming Mou #endif 714994829e6SSuanming Mou } 715994829e6SSuanming Mou 71645633c46SSuanming Mou /** 71745633c46SSuanming Mou * DR flow drop action support detect. 71845633c46SSuanming Mou * 71945633c46SSuanming Mou * @param dev 72045633c46SSuanming Mou * Pointer to rte_eth_dev structure. 72145633c46SSuanming Mou * 72245633c46SSuanming Mou */ 72345633c46SSuanming Mou static void 72445633c46SSuanming Mou mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused) 72545633c46SSuanming Mou { 72645633c46SSuanming Mou #ifdef HAVE_MLX5DV_DR 72745633c46SSuanming Mou struct mlx5_priv *priv = dev->data->dev_private; 72845633c46SSuanming Mou 72945633c46SSuanming Mou if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action) 73045633c46SSuanming Mou return; 73145633c46SSuanming Mou /** 73245633c46SSuanming Mou * DR supports drop action placeholder when it is supported; 73345633c46SSuanming Mou * otherwise, use the queue drop action. 73445633c46SSuanming Mou */ 7353c4338a4SJiawei Wang if (!priv->sh->drop_action_check_flag) { 7363c4338a4SJiawei Wang if (!mlx5_flow_discover_dr_action_support(dev)) 7373c4338a4SJiawei Wang priv->sh->dr_drop_action_en = 1; 7383c4338a4SJiawei Wang priv->sh->drop_action_check_flag = 1; 7393c4338a4SJiawei Wang } 7403c4338a4SJiawei Wang if (priv->sh->dr_drop_action_en) 74145633c46SSuanming Mou priv->root_drop_action = priv->sh->dr_drop_action; 7423c4338a4SJiawei Wang else 7433c4338a4SJiawei Wang priv->root_drop_action = priv->drop_queue.hrxq->action; 74445633c46SSuanming Mou #endif 74545633c46SSuanming Mou } 74645633c46SSuanming Mou 747e6988afdSMatan Azrad static void 748e6988afdSMatan Azrad mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev) 749e6988afdSMatan Azrad { 750e6988afdSMatan Azrad struct mlx5_priv *priv = dev->data->dev_private; 751ca1418ceSMichael Baum void *ctx = priv->sh->cdev->ctx; 752e6988afdSMatan Azrad 753e6988afdSMatan Azrad priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx); 754e6988afdSMatan Azrad if (!priv->q_counters) { 755e6988afdSMatan Azrad struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0); 756e6988afdSMatan Azrad struct ibv_wq *wq; 757e6988afdSMatan Azrad 758e6988afdSMatan Azrad DRV_LOG(DEBUG, "Port %d queue counter object cannot be created " 759e6988afdSMatan Azrad "by DevX - fall-back to use the kernel driver global " 760e6988afdSMatan Azrad "queue counter.", dev->data->port_id); 761e6988afdSMatan Azrad /* Create WQ by kernel and query its queue counter ID. */ 762e6988afdSMatan Azrad if (cq) { 763e6988afdSMatan Azrad wq = mlx5_glue->create_wq(ctx, 764e6988afdSMatan Azrad &(struct ibv_wq_init_attr){ 765e6988afdSMatan Azrad .wq_type = IBV_WQT_RQ, 766e6988afdSMatan Azrad .max_wr = 1, 767e6988afdSMatan Azrad .max_sge = 1, 768e35ccf24SMichael Baum .pd = priv->sh->cdev->pd, 769e6988afdSMatan Azrad .cq = cq, 770e6988afdSMatan Azrad }); 771e6988afdSMatan Azrad if (wq) { 772e6988afdSMatan Azrad /* Counter is assigned only on RDY state. */ 773e6988afdSMatan Azrad int ret = mlx5_glue->modify_wq(wq, 774e6988afdSMatan Azrad &(struct ibv_wq_attr){ 775e6988afdSMatan Azrad .attr_mask = IBV_WQ_ATTR_STATE, 776e6988afdSMatan Azrad .wq_state = IBV_WQS_RDY, 777e6988afdSMatan Azrad }); 778e6988afdSMatan Azrad 779e6988afdSMatan Azrad if (ret == 0) 780e6988afdSMatan Azrad mlx5_devx_cmd_wq_query(wq, 781e6988afdSMatan Azrad &priv->counter_set_id); 782e6988afdSMatan Azrad claim_zero(mlx5_glue->destroy_wq(wq)); 783e6988afdSMatan Azrad } 784e6988afdSMatan Azrad claim_zero(mlx5_glue->destroy_cq(cq)); 785e6988afdSMatan Azrad } 786e6988afdSMatan Azrad } else { 787e6988afdSMatan Azrad priv->counter_set_id = priv->q_counters->id; 788e6988afdSMatan Azrad } 789e6988afdSMatan Azrad if (priv->counter_set_id == 0) 790e6988afdSMatan Azrad DRV_LOG(INFO, "Part of the port %d statistics will not be " 791e6988afdSMatan Azrad "available.", dev->data->port_id); 792e6988afdSMatan Azrad } 793e6988afdSMatan Azrad 794994829e6SSuanming Mou /** 795f926cce3SXueming Li * Check if representor spawn info match devargs. 796f926cce3SXueming Li * 797f926cce3SXueming Li * @param spawn 798f926cce3SXueming Li * Verbs device parameters (name, port, switch_info) to spawn. 799f926cce3SXueming Li * @param eth_da 800f926cce3SXueming Li * Device devargs to probe. 801f926cce3SXueming Li * 802f926cce3SXueming Li * @return 803f926cce3SXueming Li * Match result. 804f926cce3SXueming Li */ 805f926cce3SXueming Li static bool 806f926cce3SXueming Li mlx5_representor_match(struct mlx5_dev_spawn_data *spawn, 807f926cce3SXueming Li struct rte_eth_devargs *eth_da) 808f926cce3SXueming Li { 809f926cce3SXueming Li struct mlx5_switch_info *switch_info = &spawn->info; 810f926cce3SXueming Li unsigned int p, f; 811f926cce3SXueming Li uint16_t id; 81291766faeSXueming Li uint16_t repr_id = mlx5_representor_id_encode(switch_info, 81391766faeSXueming Li eth_da->type); 814f926cce3SXueming Li 815f926cce3SXueming Li switch (eth_da->type) { 816f926cce3SXueming Li case RTE_ETH_REPRESENTOR_SF: 81791766faeSXueming Li if (!(spawn->info.port_name == -1 && 81891766faeSXueming Li switch_info->name_type == 81991766faeSXueming Li MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 82091766faeSXueming Li switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) { 821f926cce3SXueming Li rte_errno = EBUSY; 822f926cce3SXueming Li return false; 823f926cce3SXueming Li } 824f926cce3SXueming Li break; 825f926cce3SXueming Li case RTE_ETH_REPRESENTOR_VF: 826f926cce3SXueming Li /* Allows HPF representor index -1 as exception. */ 827f926cce3SXueming Li if (!(spawn->info.port_name == -1 && 828f926cce3SXueming Li switch_info->name_type == 829f926cce3SXueming Li MLX5_PHYS_PORT_NAME_TYPE_PFHPF) && 830f926cce3SXueming Li switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) { 831f926cce3SXueming Li rte_errno = EBUSY; 832f926cce3SXueming Li return false; 833f926cce3SXueming Li } 834f926cce3SXueming Li break; 835f926cce3SXueming Li case RTE_ETH_REPRESENTOR_NONE: 836f926cce3SXueming Li rte_errno = EBUSY; 837f926cce3SXueming Li return false; 838f926cce3SXueming Li default: 839f926cce3SXueming Li rte_errno = ENOTSUP; 840f926cce3SXueming Li DRV_LOG(ERR, "unsupported representor type"); 841f926cce3SXueming Li return false; 842f926cce3SXueming Li } 843f926cce3SXueming Li /* Check representor ID: */ 844f926cce3SXueming Li for (p = 0; p < eth_da->nb_ports; ++p) { 845f926cce3SXueming Li if (spawn->pf_bond < 0) { 846f926cce3SXueming Li /* For non-LAG mode, allow and ignore pf. */ 847f926cce3SXueming Li switch_info->pf_num = eth_da->ports[p]; 84891766faeSXueming Li repr_id = mlx5_representor_id_encode(switch_info, 84991766faeSXueming Li eth_da->type); 850f926cce3SXueming Li } 851f926cce3SXueming Li for (f = 0; f < eth_da->nb_representor_ports; ++f) { 852f926cce3SXueming Li id = MLX5_REPRESENTOR_ID 853f926cce3SXueming Li (eth_da->ports[p], eth_da->type, 854f926cce3SXueming Li eth_da->representor_ports[f]); 855f926cce3SXueming Li if (repr_id == id) 856f926cce3SXueming Li return true; 857f926cce3SXueming Li } 858f926cce3SXueming Li } 859f926cce3SXueming Li rte_errno = EBUSY; 860f926cce3SXueming Li return false; 861f926cce3SXueming Li } 862f926cce3SXueming Li 863f926cce3SXueming Li /** 8642eb4d010SOphir Munk * Spawn an Ethernet device from Verbs information. 8652eb4d010SOphir Munk * 8662eb4d010SOphir Munk * @param dpdk_dev 8672eb4d010SOphir Munk * Backing DPDK device. 8682eb4d010SOphir Munk * @param spawn 8692eb4d010SOphir Munk * Verbs device parameters (name, port, switch_info) to spawn. 8702eb4d010SOphir Munk * @param config 8712eb4d010SOphir Munk * Device configuration parameters. 872887183efSMichael Baum * @param eth_da 873cb95feefSXueming Li * Device arguments. 8742eb4d010SOphir Munk * 8752eb4d010SOphir Munk * @return 8762eb4d010SOphir Munk * A valid Ethernet device object on success, NULL otherwise and rte_errno 8772eb4d010SOphir Munk * is set. The following errors are defined: 8782eb4d010SOphir Munk * 8792eb4d010SOphir Munk * EBUSY: device is not supposed to be spawned. 8802eb4d010SOphir Munk * EEXIST: device is already spawned 8812eb4d010SOphir Munk */ 8822eb4d010SOphir Munk static struct rte_eth_dev * 8832eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev, 8842eb4d010SOphir Munk struct mlx5_dev_spawn_data *spawn, 885cb95feefSXueming Li struct mlx5_dev_config *config, 886cb95feefSXueming Li struct rte_eth_devargs *eth_da) 8872eb4d010SOphir Munk { 8882eb4d010SOphir Munk const struct mlx5_switch_info *switch_info = &spawn->info; 8892eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = NULL; 89053820561SMichael Baum struct mlx5_hca_attr *hca_attr = &spawn->cdev->config.hca_attr; 8913fd2961eSXueming Li struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP }; 8922eb4d010SOphir Munk struct rte_eth_dev *eth_dev = NULL; 8932eb4d010SOphir Munk struct mlx5_priv *priv = NULL; 8942eb4d010SOphir Munk int err = 0; 8952eb4d010SOphir Munk unsigned int hw_padding = 0; 8962eb4d010SOphir Munk unsigned int mps; 8972eb4d010SOphir Munk unsigned int mpls_en = 0; 8982eb4d010SOphir Munk unsigned int swp = 0; 8992eb4d010SOphir Munk unsigned int mprq = 0; 9002eb4d010SOphir Munk struct rte_ether_addr mac; 9012eb4d010SOphir Munk char name[RTE_ETH_NAME_MAX_LEN]; 9022eb4d010SOphir Munk int own_domain_id = 0; 9032eb4d010SOphir Munk uint16_t port_id; 904d0cf77e8SViacheslav Ovsiienko struct mlx5_port_info vport_info = { .query_flags = 0 }; 9053fd2961eSXueming Li int nl_rdma = -1; 906b4edeaf3SSuanming Mou int i; 9072eb4d010SOphir Munk 9082eb4d010SOphir Munk /* Determine if this port representor is supposed to be spawned. */ 909f926cce3SXueming Li if (switch_info->representor && dpdk_dev->devargs && 910f926cce3SXueming Li !mlx5_representor_match(spawn, eth_da)) 911d6541676SXueming Li return NULL; 9122eb4d010SOphir Munk /* Build device name. */ 9132eb4d010SOphir Munk if (spawn->pf_bond < 0) { 9142eb4d010SOphir Munk /* Single device. */ 9152eb4d010SOphir Munk if (!switch_info->representor) 9162eb4d010SOphir Munk strlcpy(name, dpdk_dev->name, sizeof(name)); 9172eb4d010SOphir Munk else 918f926cce3SXueming Li err = snprintf(name, sizeof(name), "%s_representor_%s%u", 919cb95feefSXueming Li dpdk_dev->name, 920cb95feefSXueming Li switch_info->name_type == 921cb95feefSXueming Li MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 922cb95feefSXueming Li switch_info->port_name); 9232eb4d010SOphir Munk } else { 9242eb4d010SOphir Munk /* Bonding device. */ 925f926cce3SXueming Li if (!switch_info->representor) { 926f926cce3SXueming Li err = snprintf(name, sizeof(name), "%s_%s", 927887183efSMichael Baum dpdk_dev->name, spawn->phys_dev_name); 928f926cce3SXueming Li } else { 929f926cce3SXueming Li err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u", 930887183efSMichael Baum dpdk_dev->name, spawn->phys_dev_name, 931f926cce3SXueming Li switch_info->ctrl_num, 932f926cce3SXueming Li switch_info->pf_num, 933cb95feefSXueming Li switch_info->name_type == 934cb95feefSXueming Li MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf", 9352eb4d010SOphir Munk switch_info->port_name); 9362eb4d010SOphir Munk } 937f926cce3SXueming Li } 938f926cce3SXueming Li if (err >= (int)sizeof(name)) 939f926cce3SXueming Li DRV_LOG(WARNING, "device name overflow %s", name); 9402eb4d010SOphir Munk /* check if the device is already spawned */ 9412eb4d010SOphir Munk if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 9422eb4d010SOphir Munk rte_errno = EEXIST; 9432eb4d010SOphir Munk return NULL; 9442eb4d010SOphir Munk } 9452eb4d010SOphir Munk DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 9462eb4d010SOphir Munk if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 9472eb4d010SOphir Munk struct mlx5_mp_id mp_id; 9482eb4d010SOphir Munk 9492eb4d010SOphir Munk eth_dev = rte_eth_dev_attach_secondary(name); 9502eb4d010SOphir Munk if (eth_dev == NULL) { 9512eb4d010SOphir Munk DRV_LOG(ERR, "can not attach rte ethdev"); 9522eb4d010SOphir Munk rte_errno = ENOMEM; 9532eb4d010SOphir Munk return NULL; 9542eb4d010SOphir Munk } 9552eb4d010SOphir Munk eth_dev->device = dpdk_dev; 956b012b4ceSOphir Munk eth_dev->dev_ops = &mlx5_dev_sec_ops; 957cbfc6111SFerruh Yigit eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 958cbfc6111SFerruh Yigit eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 9592eb4d010SOphir Munk err = mlx5_proc_priv_init(eth_dev); 9602eb4d010SOphir Munk if (err) 9612eb4d010SOphir Munk return NULL; 962fec28ca0SDmitry Kozlyuk mlx5_mp_id_init(&mp_id, eth_dev->data->port_id); 9632eb4d010SOphir Munk /* Receive command fd from primary process */ 9642eb4d010SOphir Munk err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 9652eb4d010SOphir Munk if (err < 0) 9662eb4d010SOphir Munk goto err_secondary; 9672eb4d010SOphir Munk /* Remap UAR for Tx queues. */ 9682eb4d010SOphir Munk err = mlx5_tx_uar_init_secondary(eth_dev, err); 9692eb4d010SOphir Munk if (err) 9702eb4d010SOphir Munk goto err_secondary; 9712eb4d010SOphir Munk /* 9722eb4d010SOphir Munk * Ethdev pointer is still required as input since 9732eb4d010SOphir Munk * the primary device is not accessible from the 9742eb4d010SOphir Munk * secondary process. 9752eb4d010SOphir Munk */ 9762eb4d010SOphir Munk eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 9772eb4d010SOphir Munk eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 9782eb4d010SOphir Munk return eth_dev; 9792eb4d010SOphir Munk err_secondary: 9802eb4d010SOphir Munk mlx5_dev_close(eth_dev); 9812eb4d010SOphir Munk return NULL; 9822eb4d010SOphir Munk } 983cfe0639bSMichael Baum /* Process parameters. */ 984d462a83cSMichael Baum err = mlx5_args(config, dpdk_dev->devargs); 9852eb4d010SOphir Munk if (err) { 9862eb4d010SOphir Munk DRV_LOG(ERR, "failed to process device arguments: %s", 9872eb4d010SOphir Munk strerror(rte_errno)); 988cfe0639bSMichael Baum return NULL; 9892eb4d010SOphir Munk } 990d462a83cSMichael Baum sh = mlx5_alloc_shared_dev_ctx(spawn, config); 9912eb4d010SOphir Munk if (!sh) 9922eb4d010SOphir Munk return NULL; 993cfe0639bSMichael Baum /* Update final values for devargs before check sibling config. */ 994cfe0639bSMichael Baum if (config->dv_miss_info) { 995cfe0639bSMichael Baum if (switch_info->master || switch_info->representor) 996cfe0639bSMichael Baum config->dv_xmeta_en = MLX5_XMETA_MODE_META16; 997cfe0639bSMichael Baum } 998cfe0639bSMichael Baum #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 999cfe0639bSMichael Baum if (config->dv_flow_en) { 1000cfe0639bSMichael Baum DRV_LOG(WARNING, "DV flow is not supported."); 1001cfe0639bSMichael Baum config->dv_flow_en = 0; 1002cfe0639bSMichael Baum } 1003cfe0639bSMichael Baum #endif 1004cfe0639bSMichael Baum #ifdef HAVE_MLX5DV_DR_ESWITCH 100553820561SMichael Baum if (!(hca_attr->eswitch_manager && config->dv_flow_en && 1006cfe0639bSMichael Baum (switch_info->representor || switch_info->master))) 1007cfe0639bSMichael Baum config->dv_esw_en = 0; 1008cfe0639bSMichael Baum #else 1009cfe0639bSMichael Baum config->dv_esw_en = 0; 1010cfe0639bSMichael Baum #endif 1011cfe0639bSMichael Baum if (!config->dv_esw_en && 1012cfe0639bSMichael Baum config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 1013cfe0639bSMichael Baum DRV_LOG(WARNING, 1014cfe0639bSMichael Baum "Metadata mode %u is not supported (no E-Switch).", 1015cfe0639bSMichael Baum config->dv_xmeta_en); 1016cfe0639bSMichael Baum config->dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 1017cfe0639bSMichael Baum } 1018cfe0639bSMichael Baum /* Check sibling device configurations. */ 1019cfe0639bSMichael Baum err = mlx5_dev_check_sibling_config(sh, config, dpdk_dev); 1020cfe0639bSMichael Baum if (err) 1021cfe0639bSMichael Baum goto error; 10222eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 1023d462a83cSMichael Baum config->dest_tir = 1; 10242eb4d010SOphir Munk #endif 10252eb4d010SOphir Munk /* 10262eb4d010SOphir Munk * Multi-packet send is supported by ConnectX-4 Lx PF as well 10272eb4d010SOphir Munk * as all ConnectX-5 devices. 10282eb4d010SOphir Munk */ 10298f464810SMichael Baum if (sh->device_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 10308f464810SMichael Baum if (sh->device_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 10312eb4d010SOphir Munk DRV_LOG(DEBUG, "enhanced MPW is supported"); 10322eb4d010SOphir Munk mps = MLX5_MPW_ENHANCED; 10332eb4d010SOphir Munk } else { 10342eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW is supported"); 10352eb4d010SOphir Munk mps = MLX5_MPW; 10362eb4d010SOphir Munk } 10372eb4d010SOphir Munk } else { 10382eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW isn't supported"); 10392eb4d010SOphir Munk mps = MLX5_MPW_DISABLED; 10402eb4d010SOphir Munk } 10412eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 10428f464810SMichael Baum if (sh->device_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 10438f464810SMichael Baum swp = sh->device_attr.sw_parsing_offloads; 10442eb4d010SOphir Munk DRV_LOG(DEBUG, "SWP support: %u", swp); 10452eb4d010SOphir Munk #endif 1046accf3cfcSTal Shnaiderman config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP | 1047accf3cfcSTal Shnaiderman MLX5_SW_PARSING_TSO_CAP); 10482eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 10498f464810SMichael Baum if (sh->device_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 10502eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 10518f464810SMichael Baum sh->device_attr.min_single_stride_log_num_of_bytes); 10522eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 10538f464810SMichael Baum sh->device_attr.max_single_stride_log_num_of_bytes); 10542eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 10558f464810SMichael Baum sh->device_attr.min_single_wqe_log_num_of_strides); 10562eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 10578f464810SMichael Baum sh->device_attr.max_single_wqe_log_num_of_strides); 10582eb4d010SOphir Munk DRV_LOG(DEBUG, "\tsupported_qpts: %d", 10598f464810SMichael Baum sh->device_attr.stride_supported_qpts); 106034776af6SMichael Baum DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %d", 106134776af6SMichael Baum config->mprq.log_min_stride_wqe_size); 10622eb4d010SOphir Munk DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 10632eb4d010SOphir Munk mprq = 1; 106434776af6SMichael Baum config->mprq.log_min_stride_size = 10658f464810SMichael Baum sh->device_attr.min_single_stride_log_num_of_bytes; 106634776af6SMichael Baum config->mprq.log_max_stride_size = 10678f464810SMichael Baum sh->device_attr.max_single_stride_log_num_of_bytes; 106834776af6SMichael Baum config->mprq.log_min_stride_num = 10698f464810SMichael Baum sh->device_attr.min_single_wqe_log_num_of_strides; 107034776af6SMichael Baum config->mprq.log_max_stride_num = 10718f464810SMichael Baum sh->device_attr.max_single_wqe_log_num_of_strides; 10722eb4d010SOphir Munk } 10732eb4d010SOphir Munk #endif 10742eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 10758f464810SMichael Baum if (sh->device_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 10768f464810SMichael Baum config->tunnel_en = sh->device_attr.tunnel_offloads_caps & 1077c1a320bfSTal Shnaiderman (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN | 1078c1a320bfSTal Shnaiderman MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE | 1079c1a320bfSTal Shnaiderman MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE); 10802eb4d010SOphir Munk } 1081c1a320bfSTal Shnaiderman if (config->tunnel_en) { 1082c1a320bfSTal Shnaiderman DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s", 1083c1a320bfSTal Shnaiderman config->tunnel_en & 1084c1a320bfSTal Shnaiderman MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "", 1085c1a320bfSTal Shnaiderman config->tunnel_en & 1086c1a320bfSTal Shnaiderman MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "", 1087c1a320bfSTal Shnaiderman config->tunnel_en & 1088c1a320bfSTal Shnaiderman MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : "" 1089c1a320bfSTal Shnaiderman ); 1090c1a320bfSTal Shnaiderman } else { 1091c1a320bfSTal Shnaiderman DRV_LOG(DEBUG, "tunnel offloading is not supported"); 1092c1a320bfSTal Shnaiderman } 10932eb4d010SOphir Munk #else 10942eb4d010SOphir Munk DRV_LOG(WARNING, 10952eb4d010SOphir Munk "tunnel offloading disabled due to old OFED/rdma-core version"); 10962eb4d010SOphir Munk #endif 10972eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 10988f464810SMichael Baum mpls_en = ((sh->device_attr.tunnel_offloads_caps & 10992eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 11008f464810SMichael Baum (sh->device_attr.tunnel_offloads_caps & 11012eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 11022eb4d010SOphir Munk DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 11032eb4d010SOphir Munk mpls_en ? "" : "not "); 11042eb4d010SOphir Munk #else 11052eb4d010SOphir Munk DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 11062eb4d010SOphir Munk " old OFED/rdma-core version or firmware configuration"); 11072eb4d010SOphir Munk #endif 1108d462a83cSMichael Baum config->mpls_en = mpls_en; 11093fd2961eSXueming Li nl_rdma = mlx5_nl_init(NETLINK_RDMA); 11102eb4d010SOphir Munk /* Check port status. */ 11113fd2961eSXueming Li if (spawn->phys_port <= UINT8_MAX) { 11123fd2961eSXueming Li /* Legacy Verbs api only support u8 port number. */ 1113ca1418ceSMichael Baum err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port, 1114ca1418ceSMichael Baum &port_attr); 11152eb4d010SOphir Munk if (err) { 11162eb4d010SOphir Munk DRV_LOG(ERR, "port query failed: %s", strerror(err)); 11172eb4d010SOphir Munk goto error; 11182eb4d010SOphir Munk } 11192eb4d010SOphir Munk if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 11202eb4d010SOphir Munk DRV_LOG(ERR, "port is not configured in Ethernet mode"); 11212eb4d010SOphir Munk err = EINVAL; 11222eb4d010SOphir Munk goto error; 11232eb4d010SOphir Munk } 11243fd2961eSXueming Li } else if (nl_rdma >= 0) { 11253fd2961eSXueming Li /* IB doesn't allow more than 255 ports, must be Ethernet. */ 11263fd2961eSXueming Li err = mlx5_nl_port_state(nl_rdma, 11273fd2961eSXueming Li spawn->phys_dev_name, 11283fd2961eSXueming Li spawn->phys_port); 11293fd2961eSXueming Li if (err < 0) { 11303fd2961eSXueming Li DRV_LOG(INFO, "Failed to get netlink port state: %s", 11313fd2961eSXueming Li strerror(rte_errno)); 11323fd2961eSXueming Li err = -rte_errno; 11333fd2961eSXueming Li goto error; 11343fd2961eSXueming Li } 11353fd2961eSXueming Li port_attr.state = (enum ibv_port_state)err; 11363fd2961eSXueming Li } 11372eb4d010SOphir Munk if (port_attr.state != IBV_PORT_ACTIVE) 11383fd2961eSXueming Li DRV_LOG(INFO, "port is not active: \"%s\" (%d)", 11392eb4d010SOphir Munk mlx5_glue->port_state_str(port_attr.state), 11402eb4d010SOphir Munk port_attr.state); 11412eb4d010SOphir Munk /* Allocate private eth device data. */ 11422175c4dcSSuanming Mou priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 11432eb4d010SOphir Munk sizeof(*priv), 11442175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 11452eb4d010SOphir Munk if (priv == NULL) { 11462eb4d010SOphir Munk DRV_LOG(ERR, "priv allocation failure"); 11472eb4d010SOphir Munk err = ENOMEM; 11482eb4d010SOphir Munk goto error; 11492eb4d010SOphir Munk } 11502eb4d010SOphir Munk priv->sh = sh; 115191389890SOphir Munk priv->dev_port = spawn->phys_port; 11522eb4d010SOphir Munk priv->pci_dev = spawn->pci_dev; 11532eb4d010SOphir Munk priv->mtu = RTE_ETHER_MTU; 11542eb4d010SOphir Munk /* Some internal functions rely on Netlink sockets, open them now. */ 11553fd2961eSXueming Li priv->nl_socket_rdma = nl_rdma; 11562eb4d010SOphir Munk priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 11572eb4d010SOphir Munk priv->representor = !!switch_info->representor; 11582eb4d010SOphir Munk priv->master = !!switch_info->master; 11592eb4d010SOphir Munk priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 11602eb4d010SOphir Munk priv->vport_meta_tag = 0; 11612eb4d010SOphir Munk priv->vport_meta_mask = 0; 11622eb4d010SOphir Munk priv->pf_bond = spawn->pf_bond; 1163ce4062cbSGregory Etelson 1164ce4062cbSGregory Etelson DRV_LOG(DEBUG, 1165ce4062cbSGregory Etelson "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n", 1166ce4062cbSGregory Etelson priv->dev_port, dpdk_dev->bus->name, 1167ce4062cbSGregory Etelson priv->pci_dev ? priv->pci_dev->name : "NONE", 1168ce4062cbSGregory Etelson priv->master, priv->representor, priv->pf_bond); 1169ce4062cbSGregory Etelson 11702eb4d010SOphir Munk /* 1171d0cf77e8SViacheslav Ovsiienko * If we have E-Switch we should determine the vport attributes. 1172d0cf77e8SViacheslav Ovsiienko * E-Switch may use either source vport field or reg_c[0] metadata 1173d0cf77e8SViacheslav Ovsiienko * register to match on vport index. The engaged part of metadata 1174d0cf77e8SViacheslav Ovsiienko * register is defined by mask. 11752eb4d010SOphir Munk */ 11762eb4d010SOphir Munk if (switch_info->representor || switch_info->master) { 1177ca1418ceSMichael Baum err = mlx5_glue->devx_port_query(sh->cdev->ctx, 1178d0cf77e8SViacheslav Ovsiienko spawn->phys_port, 1179d0cf77e8SViacheslav Ovsiienko &vport_info); 11802eb4d010SOphir Munk if (err) { 11812eb4d010SOphir Munk DRV_LOG(WARNING, 1182887183efSMichael Baum "Cannot query devx port %d on device %s", 1183887183efSMichael Baum spawn->phys_port, spawn->phys_dev_name); 1184d0cf77e8SViacheslav Ovsiienko vport_info.query_flags = 0; 11852eb4d010SOphir Munk } 11862eb4d010SOphir Munk } 1187d0cf77e8SViacheslav Ovsiienko if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) { 1188d0cf77e8SViacheslav Ovsiienko priv->vport_meta_tag = vport_info.vport_meta_tag; 1189d0cf77e8SViacheslav Ovsiienko priv->vport_meta_mask = vport_info.vport_meta_mask; 11902eb4d010SOphir Munk if (!priv->vport_meta_mask) { 1191887183efSMichael Baum DRV_LOG(ERR, 1192887183efSMichael Baum "vport zero mask for port %d on bonding device %s", 1193887183efSMichael Baum spawn->phys_port, spawn->phys_dev_name); 11942eb4d010SOphir Munk err = ENOTSUP; 11952eb4d010SOphir Munk goto error; 11962eb4d010SOphir Munk } 11972eb4d010SOphir Munk if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 1198887183efSMichael Baum DRV_LOG(ERR, 1199887183efSMichael Baum "Invalid vport tag for port %d on bonding device %s", 1200887183efSMichael Baum spawn->phys_port, spawn->phys_dev_name); 12012eb4d010SOphir Munk err = ENOTSUP; 12022eb4d010SOphir Munk goto error; 12032eb4d010SOphir Munk } 12042eb4d010SOphir Munk } 1205d0cf77e8SViacheslav Ovsiienko if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) { 1206d0cf77e8SViacheslav Ovsiienko priv->vport_id = vport_info.vport_id; 1207ecaee305SViacheslav Ovsiienko } else if (spawn->pf_bond >= 0 && 1208ecaee305SViacheslav Ovsiienko (switch_info->representor || switch_info->master)) { 1209887183efSMichael Baum DRV_LOG(ERR, 1210887183efSMichael Baum "Cannot deduce vport index for port %d on bonding device %s", 1211887183efSMichael Baum spawn->phys_port, spawn->phys_dev_name); 12122eb4d010SOphir Munk err = ENOTSUP; 12132eb4d010SOphir Munk goto error; 12142eb4d010SOphir Munk } else { 12152eb4d010SOphir Munk /* 1216d0cf77e8SViacheslav Ovsiienko * Suppose vport index in compatible way. Kernel/rdma_core 1217d0cf77e8SViacheslav Ovsiienko * support single E-Switch per PF configurations only and 1218d0cf77e8SViacheslav Ovsiienko * vport_id field contains the vport index for associated VF, 1219d0cf77e8SViacheslav Ovsiienko * which is deduced from representor port name. 12202eb4d010SOphir Munk * For example, let's have the IB device port 10, it has 12212eb4d010SOphir Munk * attached network device eth0, which has port name attribute 12222eb4d010SOphir Munk * pf0vf2, we can deduce the VF number as 2, and set vport index 12232eb4d010SOphir Munk * as 3 (2+1). This assigning schema should be changed if the 12242eb4d010SOphir Munk * multiple E-Switch instances per PF configurations or/and PCI 12252eb4d010SOphir Munk * subfunctions are added. 12262eb4d010SOphir Munk */ 12272eb4d010SOphir Munk priv->vport_id = switch_info->representor ? 12282eb4d010SOphir Munk switch_info->port_name + 1 : -1; 1229d0cf77e8SViacheslav Ovsiienko } 123091766faeSXueming Li priv->representor_id = mlx5_representor_id_encode(switch_info, 123191766faeSXueming Li eth_da->type); 12322eb4d010SOphir Munk /* 12332eb4d010SOphir Munk * Look for sibling devices in order to reuse their switch domain 12342eb4d010SOphir Munk * if any, otherwise allocate one. 12352eb4d010SOphir Munk */ 1236ce4062cbSGregory Etelson MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 12372eb4d010SOphir Munk const struct mlx5_priv *opriv = 12382eb4d010SOphir Munk rte_eth_devices[port_id].data->dev_private; 12392eb4d010SOphir Munk 12402eb4d010SOphir Munk if (!opriv || 12412eb4d010SOphir Munk opriv->sh != priv->sh || 12422eb4d010SOphir Munk opriv->domain_id == 12432eb4d010SOphir Munk RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 12442eb4d010SOphir Munk continue; 12452eb4d010SOphir Munk priv->domain_id = opriv->domain_id; 1246ce4062cbSGregory Etelson DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n", 1247ce4062cbSGregory Etelson priv->dev_port, priv->domain_id); 12482eb4d010SOphir Munk break; 12492eb4d010SOphir Munk } 12502eb4d010SOphir Munk if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 12512eb4d010SOphir Munk err = rte_eth_switch_domain_alloc(&priv->domain_id); 12522eb4d010SOphir Munk if (err) { 12532eb4d010SOphir Munk err = rte_errno; 12542eb4d010SOphir Munk DRV_LOG(ERR, "unable to allocate switch domain: %s", 12552eb4d010SOphir Munk strerror(rte_errno)); 12562eb4d010SOphir Munk goto error; 12572eb4d010SOphir Munk } 12582eb4d010SOphir Munk own_domain_id = 1; 1259ce4062cbSGregory Etelson DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n", 1260ce4062cbSGregory Etelson priv->dev_port, priv->domain_id); 12612eb4d010SOphir Munk } 1262d462a83cSMichael Baum config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 12632eb4d010SOphir Munk IBV_DEVICE_RAW_IP_CSUM); 12642eb4d010SOphir Munk DRV_LOG(DEBUG, "checksum offloading is %ssupported", 1265d462a83cSMichael Baum (config->hw_csum ? "" : "not ")); 12662eb4d010SOphir Munk #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 12672eb4d010SOphir Munk !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 12682eb4d010SOphir Munk DRV_LOG(DEBUG, "counters are not supported"); 12692eb4d010SOphir Munk #endif 1270d462a83cSMichael Baum config->ind_table_max_size = 12712eb4d010SOphir Munk sh->device_attr.max_rwq_indirection_table_size; 12722eb4d010SOphir Munk /* 12732eb4d010SOphir Munk * Remove this check once DPDK supports larger/variable 12742eb4d010SOphir Munk * indirection tables. 12752eb4d010SOphir Munk */ 1276295968d1SFerruh Yigit if (config->ind_table_max_size > (unsigned int)RTE_ETH_RSS_RETA_SIZE_512) 1277295968d1SFerruh Yigit config->ind_table_max_size = RTE_ETH_RSS_RETA_SIZE_512; 12782eb4d010SOphir Munk DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 1279d462a83cSMichael Baum config->ind_table_max_size); 1280d462a83cSMichael Baum config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 12812eb4d010SOphir Munk IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 12822eb4d010SOphir Munk DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 1283d462a83cSMichael Baum (config->hw_vlan_strip ? "" : "not ")); 1284d462a83cSMichael Baum config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 12852eb4d010SOphir Munk IBV_RAW_PACKET_CAP_SCATTER_FCS); 12862eb4d010SOphir Munk #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 12872eb4d010SOphir Munk hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 12882eb4d010SOphir Munk #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 12892eb4d010SOphir Munk hw_padding = !!(sh->device_attr.device_cap_flags_ex & 12902eb4d010SOphir Munk IBV_DEVICE_PCI_WRITE_END_PADDING); 12912eb4d010SOphir Munk #endif 1292d462a83cSMichael Baum if (config->hw_padding && !hw_padding) { 12932eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 1294d462a83cSMichael Baum config->hw_padding = 0; 1295d462a83cSMichael Baum } else if (config->hw_padding) { 12962eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 12972eb4d010SOphir Munk } 1298d462a83cSMichael Baum config->tso = (sh->device_attr.max_tso > 0 && 12992eb4d010SOphir Munk (sh->device_attr.tso_supported_qpts & 13002eb4d010SOphir Munk (1 << IBV_QPT_RAW_PACKET))); 1301d462a83cSMichael Baum if (config->tso) 1302d462a83cSMichael Baum config->tso_max_payload_sz = sh->device_attr.max_tso; 13032eb4d010SOphir Munk /* 13042eb4d010SOphir Munk * MPW is disabled by default, while the Enhanced MPW is enabled 13052eb4d010SOphir Munk * by default. 13062eb4d010SOphir Munk */ 1307d462a83cSMichael Baum if (config->mps == MLX5_ARG_UNSET) 1308d462a83cSMichael Baum config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 13092eb4d010SOphir Munk MLX5_MPW_DISABLED; 13102eb4d010SOphir Munk else 1311d462a83cSMichael Baum config->mps = config->mps ? mps : MLX5_MPW_DISABLED; 13122eb4d010SOphir Munk DRV_LOG(INFO, "%sMPS is %s", 1313d462a83cSMichael Baum config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 1314d462a83cSMichael Baum config->mps == MLX5_MPW ? "legacy " : "", 1315d462a83cSMichael Baum config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 13166dc0cbc6SMichael Baum if (sh->cdev->config.devx) { 131753820561SMichael Baum sh->steering_format_version = hca_attr->steering_format_version; 13182eb4d010SOphir Munk /* Check for LRO support. */ 131953820561SMichael Baum if (config->dest_tir && hca_attr->lro_cap && 1320d462a83cSMichael Baum config->dv_flow_en) { 13212eb4d010SOphir Munk /* TBD check tunnel lro caps. */ 132253820561SMichael Baum config->lro.supported = hca_attr->lro_cap; 13232eb4d010SOphir Munk DRV_LOG(DEBUG, "Device supports LRO"); 13242eb4d010SOphir Munk /* 13252eb4d010SOphir Munk * If LRO timeout is not configured by application, 13262eb4d010SOphir Munk * use the minimal supported value. 13272eb4d010SOphir Munk */ 1328d462a83cSMichael Baum if (!config->lro.timeout) 1329d462a83cSMichael Baum config->lro.timeout = 133053820561SMichael Baum hca_attr->lro_timer_supported_periods[0]; 13312eb4d010SOphir Munk DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 1332d462a83cSMichael Baum config->lro.timeout); 1333613d64e4SDekel Peled DRV_LOG(DEBUG, "LRO minimal size of TCP segment " 1334613d64e4SDekel Peled "required for coalescing is %d bytes", 133553820561SMichael Baum hca_attr->lro_min_mss_size); 13362eb4d010SOphir Munk } 1337c99b4f8bSLi Zhang #if defined(HAVE_MLX5DV_DR) && \ 1338c99b4f8bSLi Zhang (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \ 1339c99b4f8bSLi Zhang defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)) 134053820561SMichael Baum if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old && 1341d462a83cSMichael Baum config->dv_flow_en) { 134253820561SMichael Baum uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids; 13432eb4d010SOphir Munk /* 13442eb4d010SOphir Munk * Meter needs two REG_C's for color match and pre-sfx 13452eb4d010SOphir Munk * flow match. Here get the REG_C for color match. 13462eb4d010SOphir Munk * REG_C_0 and REG_C_1 is reserved for metadata feature. 13472eb4d010SOphir Munk */ 13482eb4d010SOphir Munk reg_c_mask &= 0xfc; 13492eb4d010SOphir Munk if (__builtin_popcount(reg_c_mask) < 1) { 13502eb4d010SOphir Munk priv->mtr_en = 0; 13512eb4d010SOphir Munk DRV_LOG(WARNING, "No available register for" 13522eb4d010SOphir Munk " meter."); 13532eb4d010SOphir Munk } else { 135431ef2982SDekel Peled /* 135531ef2982SDekel Peled * The meter color register is used by the 135631ef2982SDekel Peled * flow-hit feature as well. 135731ef2982SDekel Peled * The flow-hit feature must use REG_C_3 135831ef2982SDekel Peled * Prefer REG_C_3 if it is available. 135931ef2982SDekel Peled */ 136031ef2982SDekel Peled if (reg_c_mask & (1 << (REG_C_3 - REG_C_0))) 136131ef2982SDekel Peled priv->mtr_color_reg = REG_C_3; 136231ef2982SDekel Peled else 136331ef2982SDekel Peled priv->mtr_color_reg = ffs(reg_c_mask) 136431ef2982SDekel Peled - 1 + REG_C_0; 13652eb4d010SOphir Munk priv->mtr_en = 1; 136653820561SMichael Baum priv->mtr_reg_share = hca_attr->qos.flow_meter; 13672eb4d010SOphir Munk DRV_LOG(DEBUG, "The REG_C meter uses is %d", 13682eb4d010SOphir Munk priv->mtr_color_reg); 13692eb4d010SOphir Munk } 13702eb4d010SOphir Munk } 137153820561SMichael Baum if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) { 137229efa63aSLi Zhang uint32_t log_obj_size = 137329efa63aSLi Zhang rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1); 137429efa63aSLi Zhang if (log_obj_size >= 137553820561SMichael Baum hca_attr->qos.log_meter_aso_granularity && 137629efa63aSLi Zhang log_obj_size <= 137753820561SMichael Baum hca_attr->qos.log_meter_aso_max_alloc) 137829efa63aSLi Zhang sh->meter_aso_en = 1; 137944432018SLi Zhang } 138044432018SLi Zhang if (priv->mtr_en) { 1381afb4aa4fSLi Zhang err = mlx5_aso_flow_mtrs_mng_init(priv->sh); 138229efa63aSLi Zhang if (err) { 138329efa63aSLi Zhang err = -err; 138429efa63aSLi Zhang goto error; 138529efa63aSLi Zhang } 138629efa63aSLi Zhang } 138753820561SMichael Baum if (hca_attr->flow.tunnel_header_0_1) 1388630a587bSRongwei Liu sh->tunnel_header_0_1 = 1; 13892eb4d010SOphir Munk #endif 1390a2999c7bSDekel Peled #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO 139153820561SMichael Baum if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) { 139231ef2982SDekel Peled sh->flow_hit_aso_en = 1; 139331ef2982SDekel Peled err = mlx5_flow_aso_age_mng_init(sh); 139431ef2982SDekel Peled if (err) { 139531ef2982SDekel Peled err = -err; 139631ef2982SDekel Peled goto error; 139731ef2982SDekel Peled } 139831ef2982SDekel Peled DRV_LOG(DEBUG, "Flow Hit ASO is supported."); 139931ef2982SDekel Peled } 1400a2999c7bSDekel Peled #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */ 1401ee9e5fadSBing Zhao #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \ 1402ee9e5fadSBing Zhao defined(HAVE_MLX5_DR_ACTION_ASO_CT) 140353820561SMichael Baum if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) { 1404ee9e5fadSBing Zhao err = mlx5_flow_aso_ct_mng_init(sh); 1405ee9e5fadSBing Zhao if (err) { 1406ee9e5fadSBing Zhao err = -err; 1407ee9e5fadSBing Zhao goto error; 1408ee9e5fadSBing Zhao } 1409ee9e5fadSBing Zhao DRV_LOG(DEBUG, "CT ASO is supported."); 1410ee9e5fadSBing Zhao sh->ct_aso_en = 1; 1411ee9e5fadSBing Zhao } 1412ee9e5fadSBing Zhao #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */ 141396b1f027SJiawei Wang #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 141453820561SMichael Baum if (hca_attr->log_max_ft_sampler_num > 0 && 141596b1f027SJiawei Wang config->dv_flow_en) { 141696b1f027SJiawei Wang priv->sampler_en = 1; 14171b9e9826SThomas Monjalon DRV_LOG(DEBUG, "Sampler enabled!"); 141896b1f027SJiawei Wang } else { 141996b1f027SJiawei Wang priv->sampler_en = 0; 142053820561SMichael Baum if (!hca_attr->log_max_ft_sampler_num) 14211b9e9826SThomas Monjalon DRV_LOG(WARNING, 14221b9e9826SThomas Monjalon "No available register for sampler."); 142396b1f027SJiawei Wang else 14241b9e9826SThomas Monjalon DRV_LOG(DEBUG, "DV flow is not supported!"); 142596b1f027SJiawei Wang } 142696b1f027SJiawei Wang #endif 14272eb4d010SOphir Munk } 14283d3f4e6dSAlexander Kozyrev if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 && 14298f464810SMichael Baum !(sh->device_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) { 14303d3f4e6dSAlexander Kozyrev DRV_LOG(WARNING, "Rx CQE 128B compression is not supported"); 14313d3f4e6dSAlexander Kozyrev config->cqe_comp = 0; 14323d3f4e6dSAlexander Kozyrev } 14333d3f4e6dSAlexander Kozyrev if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX && 14346dc0cbc6SMichael Baum (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_flow_tag)) { 14353d3f4e6dSAlexander Kozyrev DRV_LOG(WARNING, "Flow Tag CQE compression" 14363d3f4e6dSAlexander Kozyrev " format isn't supported."); 14373d3f4e6dSAlexander Kozyrev config->cqe_comp = 0; 14383d3f4e6dSAlexander Kozyrev } 14393d3f4e6dSAlexander Kozyrev if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX && 14406dc0cbc6SMichael Baum (!sh->cdev->config.devx || !hca_attr->mini_cqe_resp_l3_l4_tag)) { 14413d3f4e6dSAlexander Kozyrev DRV_LOG(WARNING, "L3/L4 Header CQE compression" 14423d3f4e6dSAlexander Kozyrev " format isn't supported."); 14433d3f4e6dSAlexander Kozyrev config->cqe_comp = 0; 14443d3f4e6dSAlexander Kozyrev } 14453d3f4e6dSAlexander Kozyrev DRV_LOG(DEBUG, "Rx CQE compression is %ssupported", 14463d3f4e6dSAlexander Kozyrev config->cqe_comp ? "" : "not "); 1447d462a83cSMichael Baum if (config->tx_pp) { 14488f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 144953820561SMichael Baum hca_attr->dev_freq_khz); 14508f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Packet pacing is %ssupported", 145153820561SMichael Baum hca_attr->qos.packet_pacing ? "" : "not "); 14528f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 145353820561SMichael Baum hca_attr->cross_channel ? "" : "not "); 14548f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 145553820561SMichael Baum hca_attr->wqe_index_ignore ? "" : "not "); 14568f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 145753820561SMichael Baum hca_attr->non_wire_sq ? "" : "not "); 14588f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 145953820561SMichael Baum hca_attr->log_max_static_sq_wq ? "" : "not ", 146053820561SMichael Baum hca_attr->log_max_static_sq_wq); 14618f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 146253820561SMichael Baum hca_attr->qos.wqe_rate_pp ? "" : "not "); 14636dc0cbc6SMichael Baum if (!sh->cdev->config.devx) { 14648f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX is required for packet pacing"); 14658f848f32SViacheslav Ovsiienko err = ENODEV; 14668f848f32SViacheslav Ovsiienko goto error; 14678f848f32SViacheslav Ovsiienko } 146853820561SMichael Baum if (!hca_attr->qos.packet_pacing) { 14698f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Packet pacing is not supported"); 14708f848f32SViacheslav Ovsiienko err = ENODEV; 14718f848f32SViacheslav Ovsiienko goto error; 14728f848f32SViacheslav Ovsiienko } 147353820561SMichael Baum if (!hca_attr->cross_channel) { 14748f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Cross channel operations are" 14758f848f32SViacheslav Ovsiienko " required for packet pacing"); 14768f848f32SViacheslav Ovsiienko err = ENODEV; 14778f848f32SViacheslav Ovsiienko goto error; 14788f848f32SViacheslav Ovsiienko } 147953820561SMichael Baum if (!hca_attr->wqe_index_ignore) { 14808f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE index ignore feature is" 14818f848f32SViacheslav Ovsiienko " required for packet pacing"); 14828f848f32SViacheslav Ovsiienko err = ENODEV; 14838f848f32SViacheslav Ovsiienko goto error; 14848f848f32SViacheslav Ovsiienko } 148553820561SMichael Baum if (!hca_attr->non_wire_sq) { 14868f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Non-wire SQ feature is" 14878f848f32SViacheslav Ovsiienko " required for packet pacing"); 14888f848f32SViacheslav Ovsiienko err = ENODEV; 14898f848f32SViacheslav Ovsiienko goto error; 14908f848f32SViacheslav Ovsiienko } 149153820561SMichael Baum if (!hca_attr->log_max_static_sq_wq) { 14928f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Static WQE SQ feature is" 14938f848f32SViacheslav Ovsiienko " required for packet pacing"); 14948f848f32SViacheslav Ovsiienko err = ENODEV; 14958f848f32SViacheslav Ovsiienko goto error; 14968f848f32SViacheslav Ovsiienko } 149753820561SMichael Baum if (!hca_attr->qos.wqe_rate_pp) { 14988f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE rate mode is required" 14998f848f32SViacheslav Ovsiienko " for packet pacing"); 15008f848f32SViacheslav Ovsiienko err = ENODEV; 15018f848f32SViacheslav Ovsiienko goto error; 15028f848f32SViacheslav Ovsiienko } 15038f848f32SViacheslav Ovsiienko #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 15048f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX does not provide UAR offset," 15058f848f32SViacheslav Ovsiienko " can't create queues for packet pacing"); 15068f848f32SViacheslav Ovsiienko err = ENODEV; 15078f848f32SViacheslav Ovsiienko goto error; 15088f848f32SViacheslav Ovsiienko #endif 15098f848f32SViacheslav Ovsiienko } 1510febcac7bSBing Zhao if (config->std_delay_drop || config->hp_delay_drop) { 151153820561SMichael Baum if (!hca_attr->rq_delay_drop) { 1512febcac7bSBing Zhao config->std_delay_drop = 0; 1513febcac7bSBing Zhao config->hp_delay_drop = 0; 1514febcac7bSBing Zhao DRV_LOG(WARNING, 1515febcac7bSBing Zhao "dev_port-%u: Rxq delay drop is not supported", 1516febcac7bSBing Zhao priv->dev_port); 1517febcac7bSBing Zhao } 1518febcac7bSBing Zhao } 1519*e3032e9cSMichael Baum if (sh->cdev->config.devx) 1520*e3032e9cSMichael Baum mlx5_rt_timestamp_config(sh, config, hca_attr); 152150f95b23SSuanming Mou /* 152250f95b23SSuanming Mou * If HW has bug working with tunnel packet decapsulation and 152350f95b23SSuanming Mou * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 1524295968d1SFerruh Yigit * bit. Then RTE_ETH_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 152550f95b23SSuanming Mou */ 152653820561SMichael Baum if (hca_attr->scatter_fcs_w_decap_disable && config->decap_en) 1527d462a83cSMichael Baum config->hw_fcs_strip = 0; 152850f95b23SSuanming Mou DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 1529d462a83cSMichael Baum (config->hw_fcs_strip ? "" : "not ")); 153034776af6SMichael Baum if (config->mprq.enabled && !mprq) { 15312eb4d010SOphir Munk DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 1532d462a83cSMichael Baum config->mprq.enabled = 0; 15332eb4d010SOphir Munk } 1534d462a83cSMichael Baum if (config->max_dump_files_num == 0) 1535d462a83cSMichael Baum config->max_dump_files_num = 128; 15362eb4d010SOphir Munk eth_dev = rte_eth_dev_allocate(name); 15372eb4d010SOphir Munk if (eth_dev == NULL) { 15382eb4d010SOphir Munk DRV_LOG(ERR, "can not allocate rte ethdev"); 15392eb4d010SOphir Munk err = ENOMEM; 15402eb4d010SOphir Munk goto error; 15412eb4d010SOphir Munk } 15422eb4d010SOphir Munk if (priv->representor) { 15432eb4d010SOphir Munk eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 15442eb4d010SOphir Munk eth_dev->data->representor_id = priv->representor_id; 1545ff4e52efSViacheslav Galaktionov MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) { 1546ff4e52efSViacheslav Galaktionov struct mlx5_priv *opriv = 1547ff4e52efSViacheslav Galaktionov rte_eth_devices[port_id].data->dev_private; 1548ff4e52efSViacheslav Galaktionov if (opriv && 1549ff4e52efSViacheslav Galaktionov opriv->master && 1550ff4e52efSViacheslav Galaktionov opriv->domain_id == priv->domain_id && 1551ff4e52efSViacheslav Galaktionov opriv->sh == priv->sh) { 1552ff4e52efSViacheslav Galaktionov eth_dev->data->backer_port_id = port_id; 1553ff4e52efSViacheslav Galaktionov break; 1554ff4e52efSViacheslav Galaktionov } 1555ff4e52efSViacheslav Galaktionov } 1556ff4e52efSViacheslav Galaktionov if (port_id >= RTE_MAX_ETHPORTS) 1557ff4e52efSViacheslav Galaktionov eth_dev->data->backer_port_id = eth_dev->data->port_id; 15582eb4d010SOphir Munk } 155939ae7577SSuanming Mou priv->mp_id.port_id = eth_dev->data->port_id; 156039ae7577SSuanming Mou strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 15612eb4d010SOphir Munk /* 15622eb4d010SOphir Munk * Store associated network device interface index. This index 15632eb4d010SOphir Munk * is permanent throughout the lifetime of device. So, we may store 15642eb4d010SOphir Munk * the ifindex here and use the cached value further. 15652eb4d010SOphir Munk */ 15662eb4d010SOphir Munk MLX5_ASSERT(spawn->ifindex); 15672eb4d010SOphir Munk priv->if_index = spawn->ifindex; 1568a89f6433SRongwei Liu priv->lag_affinity_idx = sh->refcnt - 1; 15692eb4d010SOphir Munk eth_dev->data->dev_private = priv; 15702eb4d010SOphir Munk priv->dev_data = eth_dev->data; 15712eb4d010SOphir Munk eth_dev->data->mac_addrs = priv->mac; 15722eb4d010SOphir Munk eth_dev->device = dpdk_dev; 1573f30e69b4SFerruh Yigit eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 15742eb4d010SOphir Munk /* Configure the first MAC address by default. */ 15752eb4d010SOphir Munk if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 15762eb4d010SOphir Munk DRV_LOG(ERR, 15772eb4d010SOphir Munk "port %u cannot get MAC address, is mlx5_en" 15782eb4d010SOphir Munk " loaded? (errno: %s)", 15792eb4d010SOphir Munk eth_dev->data->port_id, strerror(rte_errno)); 15802eb4d010SOphir Munk err = ENODEV; 15812eb4d010SOphir Munk goto error; 15822eb4d010SOphir Munk } 15832eb4d010SOphir Munk DRV_LOG(INFO, 1584c2c4f87bSAman Deep Singh "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT, 1585a7db3afcSAman Deep Singh eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac)); 15862eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG 15872eb4d010SOphir Munk { 158828743807STal Shnaiderman char ifname[MLX5_NAMESIZE]; 15892eb4d010SOphir Munk 15902eb4d010SOphir Munk if (mlx5_get_ifname(eth_dev, &ifname) == 0) 15912eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 15922eb4d010SOphir Munk eth_dev->data->port_id, ifname); 15932eb4d010SOphir Munk else 15942eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is unknown", 15952eb4d010SOphir Munk eth_dev->data->port_id); 15962eb4d010SOphir Munk } 15972eb4d010SOphir Munk #endif 15982eb4d010SOphir Munk /* Get actual MTU if possible. */ 15992eb4d010SOphir Munk err = mlx5_get_mtu(eth_dev, &priv->mtu); 16002eb4d010SOphir Munk if (err) { 16012eb4d010SOphir Munk err = rte_errno; 16022eb4d010SOphir Munk goto error; 16032eb4d010SOphir Munk } 16042eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 16052eb4d010SOphir Munk priv->mtu); 16062eb4d010SOphir Munk /* Initialize burst functions to prevent crashes before link-up. */ 1607a41f593fSFerruh Yigit eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy; 1608a41f593fSFerruh Yigit eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy; 1609b012b4ceSOphir Munk eth_dev->dev_ops = &mlx5_dev_ops; 1610cbfc6111SFerruh Yigit eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1611cbfc6111SFerruh Yigit eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1612cbfc6111SFerruh Yigit eth_dev->rx_queue_count = mlx5_rx_queue_count; 16132eb4d010SOphir Munk /* Register MAC address. */ 16142eb4d010SOphir Munk claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1615d462a83cSMichael Baum if (config->vf && config->vf_nl_en) 16162eb4d010SOphir Munk mlx5_nl_mac_addr_sync(priv->nl_socket_route, 16172eb4d010SOphir Munk mlx5_ifindex(eth_dev), 16182eb4d010SOphir Munk eth_dev->data->mac_addrs, 16192eb4d010SOphir Munk MLX5_MAX_MAC_ADDRESSES); 16202eb4d010SOphir Munk priv->ctrl_flows = 0; 1621d163fc2dSXueming Li rte_spinlock_init(&priv->flow_list_lock); 16222eb4d010SOphir Munk TAILQ_INIT(&priv->flow_meters); 1623a295c69aSShun Hao priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR); 1624a295c69aSShun Hao if (!priv->mtr_profile_tbl) 1625a295c69aSShun Hao goto error; 16262eb4d010SOphir Munk /* Bring Ethernet device up. */ 16272eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 16282eb4d010SOphir Munk eth_dev->data->port_id); 16292eb4d010SOphir Munk mlx5_set_link_up(eth_dev); 16302eb4d010SOphir Munk /* 16312eb4d010SOphir Munk * Even though the interrupt handler is not installed yet, 16322eb4d010SOphir Munk * interrupts will still trigger on the async_fd from 16332eb4d010SOphir Munk * Verbs context returned by ibv_open_device(). 16342eb4d010SOphir Munk */ 16352eb4d010SOphir Munk mlx5_link_update(eth_dev, 0); 16362eb4d010SOphir Munk /* Detect minimal data bytes to inline. */ 1637d462a83cSMichael Baum mlx5_set_min_inline(spawn, config); 16382eb4d010SOphir Munk /* Store device configuration on private structure. */ 1639d462a83cSMichael Baum priv->config = *config; 1640b4edeaf3SSuanming Mou for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) { 1641b4edeaf3SSuanming Mou icfg[i].release_mem_en = !!config->reclaim_mode; 1642b4edeaf3SSuanming Mou if (config->reclaim_mode) 1643b4edeaf3SSuanming Mou icfg[i].per_core_cache = 0; 1644b4edeaf3SSuanming Mou priv->flows[i] = mlx5_ipool_create(&icfg[i]); 1645b4edeaf3SSuanming Mou if (!priv->flows[i]) 1646b4edeaf3SSuanming Mou goto error; 1647b4edeaf3SSuanming Mou } 16482eb4d010SOphir Munk /* Create context for virtual machine VLAN workaround. */ 16492eb4d010SOphir Munk priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1650d462a83cSMichael Baum if (config->dv_flow_en) { 16512eb4d010SOphir Munk err = mlx5_alloc_shared_dr(priv); 16522eb4d010SOphir Munk if (err) 16532eb4d010SOphir Munk goto error; 1654db25cadcSViacheslav Ovsiienko if (mlx5_flex_item_port_init(eth_dev) < 0) 1655db25cadcSViacheslav Ovsiienko goto error; 16562eb4d010SOphir Munk } 16576dc0cbc6SMichael Baum if (sh->cdev->config.devx && config->dv_flow_en && config->dest_tir) { 16585eaf882eSMichael Baum priv->obj_ops = devx_obj_ops; 1659e6988afdSMatan Azrad mlx5_queue_counter_id_prepare(eth_dev); 166023233fd6SBing Zhao priv->obj_ops.lb_dummy_queue_create = 166123233fd6SBing Zhao mlx5_rxq_ibv_obj_dummy_lb_create; 166223233fd6SBing Zhao priv->obj_ops.lb_dummy_queue_release = 166323233fd6SBing Zhao mlx5_rxq_ibv_obj_dummy_lb_release; 1664614966c2SXueming Li } else if (spawn->max_port > UINT8_MAX) { 1665614966c2SXueming Li /* Verbs can't support ports larger than 255 by design. */ 1666614966c2SXueming Li DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); 1667614966c2SXueming Li err = ENOTSUP; 1668614966c2SXueming Li goto error; 16695eaf882eSMichael Baum } else { 16705eaf882eSMichael Baum priv->obj_ops = ibv_obj_ops; 16715eaf882eSMichael Baum } 1672f17e4b4fSViacheslav Ovsiienko if (config->tx_pp && 167311cfe349SViacheslav Ovsiienko priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) { 1674f17e4b4fSViacheslav Ovsiienko /* 1675f17e4b4fSViacheslav Ovsiienko * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support 1676f17e4b4fSViacheslav Ovsiienko * packet pacing and already checked above. 1677f17e4b4fSViacheslav Ovsiienko * Hence, we should only make sure the SQs will be created 1678f17e4b4fSViacheslav Ovsiienko * with DevX, not with Verbs. 1679f17e4b4fSViacheslav Ovsiienko * Verbs allocates the SQ UAR on its own and it can't be shared 1680f17e4b4fSViacheslav Ovsiienko * with Clock Queue UAR as required for Tx scheduling. 1681f17e4b4fSViacheslav Ovsiienko */ 1682f17e4b4fSViacheslav Ovsiienko DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing"); 1683f17e4b4fSViacheslav Ovsiienko err = ENODEV; 1684f17e4b4fSViacheslav Ovsiienko goto error; 1685f17e4b4fSViacheslav Ovsiienko } 168665b3cd0dSSuanming Mou priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 168765b3cd0dSSuanming Mou if (!priv->drop_queue.hrxq) 168865b3cd0dSSuanming Mou goto error; 16897be78d02SJosh Soref /* Port representor shares the same max priority with pf port. */ 16903c4338a4SJiawei Wang if (!priv->sh->flow_priority_check_flag) { 16912eb4d010SOphir Munk /* Supported Verbs flow priority number detection. */ 16922eb4d010SOphir Munk err = mlx5_flow_discover_priorities(eth_dev); 16933c4338a4SJiawei Wang priv->sh->flow_max_priority = err; 16943c4338a4SJiawei Wang priv->sh->flow_priority_check_flag = 1; 16953c4338a4SJiawei Wang } else { 16963c4338a4SJiawei Wang err = priv->sh->flow_max_priority; 16973c4338a4SJiawei Wang } 16982eb4d010SOphir Munk if (err < 0) { 16992eb4d010SOphir Munk err = -err; 17002eb4d010SOphir Munk goto error; 17012eb4d010SOphir Munk } 17022eb4d010SOphir Munk mlx5_set_metadata_mask(eth_dev); 17032eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 17042eb4d010SOphir Munk !priv->sh->dv_regc0_mask) { 17052eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 17062eb4d010SOphir Munk "(no metadata reg_c[0] is available)", 17072eb4d010SOphir Munk priv->config.dv_xmeta_en); 17082eb4d010SOphir Munk err = ENOTSUP; 17092eb4d010SOphir Munk goto error; 17102eb4d010SOphir Munk } 1711d03b7860SSuanming Mou priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true, 1712d03b7860SSuanming Mou mlx5_hrxq_create_cb, 1713e1592b6cSSuanming Mou mlx5_hrxq_match_cb, 1714491b7137SMatan Azrad mlx5_hrxq_remove_cb, 1715491b7137SMatan Azrad mlx5_hrxq_clone_cb, 1716491b7137SMatan Azrad mlx5_hrxq_clone_free_cb); 1717679f46c7SMatan Azrad if (!priv->hrxqs) 1718679f46c7SMatan Azrad goto error; 1719491b7137SMatan Azrad rte_rwlock_init(&priv->ind_tbls_lock); 17202eb4d010SOphir Munk /* Query availability of metadata reg_c's. */ 17213c4338a4SJiawei Wang if (!priv->sh->metadata_regc_check_flag) { 17222eb4d010SOphir Munk err = mlx5_flow_discover_mreg_c(eth_dev); 17232eb4d010SOphir Munk if (err < 0) { 17242eb4d010SOphir Munk err = -err; 17252eb4d010SOphir Munk goto error; 17262eb4d010SOphir Munk } 17273c4338a4SJiawei Wang } 17282eb4d010SOphir Munk if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 17292eb4d010SOphir Munk DRV_LOG(DEBUG, 17302eb4d010SOphir Munk "port %u extensive metadata register is not supported", 17312eb4d010SOphir Munk eth_dev->data->port_id); 17322eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 17332eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 17342eb4d010SOphir Munk "(no metadata registers available)", 17352eb4d010SOphir Munk priv->config.dv_xmeta_en); 17362eb4d010SOphir Munk err = ENOTSUP; 17372eb4d010SOphir Munk goto error; 17382eb4d010SOphir Munk } 17392eb4d010SOphir Munk } 17402eb4d010SOphir Munk if (priv->config.dv_flow_en && 17412eb4d010SOphir Munk priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 17422eb4d010SOphir Munk mlx5_flow_ext_mreg_supported(eth_dev) && 17432eb4d010SOphir Munk priv->sh->dv_regc0_mask) { 17442eb4d010SOphir Munk priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1745e69a5922SXueming Li MLX5_FLOW_MREG_HTABLE_SZ, 1746961b6774SMatan Azrad false, true, eth_dev, 1747f7f73ac1SXueming Li flow_dv_mreg_create_cb, 1748f5b0aed2SSuanming Mou flow_dv_mreg_match_cb, 1749961b6774SMatan Azrad flow_dv_mreg_remove_cb, 1750961b6774SMatan Azrad flow_dv_mreg_clone_cb, 1751961b6774SMatan Azrad flow_dv_mreg_clone_free_cb); 17522eb4d010SOphir Munk if (!priv->mreg_cp_tbl) { 17532eb4d010SOphir Munk err = ENOMEM; 17542eb4d010SOphir Munk goto error; 17552eb4d010SOphir Munk } 17562eb4d010SOphir Munk } 1757cc608e4dSSuanming Mou rte_spinlock_init(&priv->shared_act_sl); 1758994829e6SSuanming Mou mlx5_flow_counter_mode_config(eth_dev); 175945633c46SSuanming Mou mlx5_flow_drop_action_config(eth_dev); 17609fbe97f0SXueming Li if (priv->config.dv_flow_en) 17619fbe97f0SXueming Li eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE; 17622eb4d010SOphir Munk return eth_dev; 17632eb4d010SOphir Munk error: 17642eb4d010SOphir Munk if (priv) { 17652eb4d010SOphir Munk if (priv->mreg_cp_tbl) 1766e69a5922SXueming Li mlx5_hlist_destroy(priv->mreg_cp_tbl); 17672eb4d010SOphir Munk if (priv->sh) 17682eb4d010SOphir Munk mlx5_os_free_shared_dr(priv); 17692eb4d010SOphir Munk if (priv->nl_socket_route >= 0) 17702eb4d010SOphir Munk close(priv->nl_socket_route); 17712eb4d010SOphir Munk if (priv->vmwa_context) 17722eb4d010SOphir Munk mlx5_vlan_vmwa_exit(priv->vmwa_context); 177365b3cd0dSSuanming Mou if (eth_dev && priv->drop_queue.hrxq) 177465b3cd0dSSuanming Mou mlx5_drop_action_destroy(eth_dev); 1775a295c69aSShun Hao if (priv->mtr_profile_tbl) 1776a295c69aSShun Hao mlx5_l3t_destroy(priv->mtr_profile_tbl); 17772eb4d010SOphir Munk if (own_domain_id) 17782eb4d010SOphir Munk claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 1779679f46c7SMatan Azrad if (priv->hrxqs) 1780679f46c7SMatan Azrad mlx5_list_destroy(priv->hrxqs); 1781db25cadcSViacheslav Ovsiienko if (eth_dev && priv->flex_item_map) 1782db25cadcSViacheslav Ovsiienko mlx5_flex_item_port_cleanup(eth_dev); 17832175c4dcSSuanming Mou mlx5_free(priv); 17842eb4d010SOphir Munk if (eth_dev != NULL) 17852eb4d010SOphir Munk eth_dev->data->dev_private = NULL; 17862eb4d010SOphir Munk } 17872eb4d010SOphir Munk if (eth_dev != NULL) { 17882eb4d010SOphir Munk /* mac_addrs must not be freed alone because part of 17892eb4d010SOphir Munk * dev_private 17902eb4d010SOphir Munk **/ 17912eb4d010SOphir Munk eth_dev->data->mac_addrs = NULL; 17922eb4d010SOphir Munk rte_eth_dev_release_port(eth_dev); 17932eb4d010SOphir Munk } 17942eb4d010SOphir Munk if (sh) 179591389890SOphir Munk mlx5_free_shared_dev_ctx(sh); 17963fd2961eSXueming Li if (nl_rdma >= 0) 17973fd2961eSXueming Li close(nl_rdma); 17982eb4d010SOphir Munk MLX5_ASSERT(err > 0); 17992eb4d010SOphir Munk rte_errno = err; 18002eb4d010SOphir Munk return NULL; 18012eb4d010SOphir Munk } 18022eb4d010SOphir Munk 18032eb4d010SOphir Munk /** 18042eb4d010SOphir Munk * Comparison callback to sort device data. 18052eb4d010SOphir Munk * 18062eb4d010SOphir Munk * This is meant to be used with qsort(). 18072eb4d010SOphir Munk * 18082eb4d010SOphir Munk * @param a[in] 18092eb4d010SOphir Munk * Pointer to pointer to first data object. 18102eb4d010SOphir Munk * @param b[in] 18112eb4d010SOphir Munk * Pointer to pointer to second data object. 18122eb4d010SOphir Munk * 18132eb4d010SOphir Munk * @return 18142eb4d010SOphir Munk * 0 if both objects are equal, less than 0 if the first argument is less 18152eb4d010SOphir Munk * than the second, greater than 0 otherwise. 18162eb4d010SOphir Munk */ 18172eb4d010SOphir Munk static int 18182eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b) 18192eb4d010SOphir Munk { 18202eb4d010SOphir Munk const struct mlx5_switch_info *si_a = 18212eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)a)->info; 18222eb4d010SOphir Munk const struct mlx5_switch_info *si_b = 18232eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)b)->info; 18242eb4d010SOphir Munk int ret; 18252eb4d010SOphir Munk 18262eb4d010SOphir Munk /* Master device first. */ 18272eb4d010SOphir Munk ret = si_b->master - si_a->master; 18282eb4d010SOphir Munk if (ret) 18292eb4d010SOphir Munk return ret; 18302eb4d010SOphir Munk /* Then representor devices. */ 18312eb4d010SOphir Munk ret = si_b->representor - si_a->representor; 18322eb4d010SOphir Munk if (ret) 18332eb4d010SOphir Munk return ret; 18342eb4d010SOphir Munk /* Unidentified devices come last in no specific order. */ 18352eb4d010SOphir Munk if (!si_a->representor) 18362eb4d010SOphir Munk return 0; 18372eb4d010SOphir Munk /* Order representors by name. */ 18382eb4d010SOphir Munk return si_a->port_name - si_b->port_name; 18392eb4d010SOphir Munk } 18402eb4d010SOphir Munk 18412eb4d010SOphir Munk /** 18422eb4d010SOphir Munk * Match PCI information for possible slaves of bonding device. 18432eb4d010SOphir Munk * 1844ca1418ceSMichael Baum * @param[in] ibdev_name 1845ca1418ceSMichael Baum * Name of Infiniband device. 18462eb4d010SOphir Munk * @param[in] pci_dev 1847f926cce3SXueming Li * Pointer to primary PCI address structure to match. 18482eb4d010SOphir Munk * @param[in] nl_rdma 18492eb4d010SOphir Munk * Netlink RDMA group socket handle. 1850f926cce3SXueming Li * @param[in] owner 1851ca1418ceSMichael Baum * Representor owner PF index. 1852f5f4c482SXueming Li * @param[out] bond_info 1853f5f4c482SXueming Li * Pointer to bonding information. 18542eb4d010SOphir Munk * 18552eb4d010SOphir Munk * @return 18562eb4d010SOphir Munk * negative value if no bonding device found, otherwise 18572eb4d010SOphir Munk * positive index of slave PF in bonding. 18582eb4d010SOphir Munk */ 18592eb4d010SOphir Munk static int 1860ca1418ceSMichael Baum mlx5_device_bond_pci_match(const char *ibdev_name, 1861f926cce3SXueming Li const struct rte_pci_addr *pci_dev, 1862f5f4c482SXueming Li int nl_rdma, uint16_t owner, 1863f5f4c482SXueming Li struct mlx5_bond_info *bond_info) 18642eb4d010SOphir Munk { 18652eb4d010SOphir Munk char ifname[IF_NAMESIZE + 1]; 18662eb4d010SOphir Munk unsigned int ifindex; 18672eb4d010SOphir Munk unsigned int np, i; 1868f5f4c482SXueming Li FILE *bond_file = NULL, *file; 18692eb4d010SOphir Munk int pf = -1; 1870f5f4c482SXueming Li int ret; 18717299ab68SRongwei Liu uint8_t cur_guid[32] = {0}; 18727299ab68SRongwei Liu uint8_t guid[32] = {0}; 18732eb4d010SOphir Munk 18742eb4d010SOphir Munk /* 1875ca1418ceSMichael Baum * Try to get master device name. If something goes wrong suppose 1876ca1418ceSMichael Baum * the lack of kernel support and no bonding devices. 18772eb4d010SOphir Munk */ 1878f5f4c482SXueming Li memset(bond_info, 0, sizeof(*bond_info)); 18792eb4d010SOphir Munk if (nl_rdma < 0) 18802eb4d010SOphir Munk return -1; 1881ca1418ceSMichael Baum if (!strstr(ibdev_name, "bond")) 18822eb4d010SOphir Munk return -1; 1883ca1418ceSMichael Baum np = mlx5_nl_portnum(nl_rdma, ibdev_name); 18842eb4d010SOphir Munk if (!np) 18852eb4d010SOphir Munk return -1; 18867299ab68SRongwei Liu if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0) 18877299ab68SRongwei Liu return -1; 18882eb4d010SOphir Munk /* 1889ca1418ceSMichael Baum * The master device might not be on the predefined port(not on port 1890ca1418ceSMichael Baum * index 1, it is not guaranteed), we have to scan all Infiniband 1891ca1418ceSMichael Baum * device ports and find master. 18922eb4d010SOphir Munk */ 18932eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 18942eb4d010SOphir Munk /* Check whether Infiniband port is populated. */ 1895ca1418ceSMichael Baum ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i); 18962eb4d010SOphir Munk if (!ifindex) 18972eb4d010SOphir Munk continue; 18982eb4d010SOphir Munk if (!if_indextoname(ifindex, ifname)) 18992eb4d010SOphir Munk continue; 19002eb4d010SOphir Munk /* Try to read bonding slave names from sysfs. */ 19012eb4d010SOphir Munk MKSTR(slaves, 19022eb4d010SOphir Munk "/sys/class/net/%s/master/bonding/slaves", ifname); 1903f5f4c482SXueming Li bond_file = fopen(slaves, "r"); 1904f5f4c482SXueming Li if (bond_file) 19052eb4d010SOphir Munk break; 19062eb4d010SOphir Munk } 1907f5f4c482SXueming Li if (!bond_file) 19082eb4d010SOphir Munk return -1; 19092eb4d010SOphir Munk /* Use safe format to check maximal buffer length. */ 19102eb4d010SOphir Munk MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 1911f5f4c482SXueming Li while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 19122eb4d010SOphir Munk char tmp_str[IF_NAMESIZE + 32]; 19132eb4d010SOphir Munk struct rte_pci_addr pci_addr; 19142eb4d010SOphir Munk struct mlx5_switch_info info; 19157299ab68SRongwei Liu int ret; 19162eb4d010SOphir Munk 19172eb4d010SOphir Munk /* Process slave interface names in the loop. */ 19182eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 19192eb4d010SOphir Munk "/sys/class/net/%s", ifname); 19204d567938SThomas Monjalon if (mlx5_get_pci_addr(tmp_str, &pci_addr)) { 1921ca1418ceSMichael Baum DRV_LOG(WARNING, 1922ca1418ceSMichael Baum "Cannot get PCI address for netdev \"%s\".", 1923ca1418ceSMichael Baum ifname); 19242eb4d010SOphir Munk continue; 19252eb4d010SOphir Munk } 19262eb4d010SOphir Munk /* Slave interface PCI address match found. */ 19272eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 19282eb4d010SOphir Munk "/sys/class/net/%s/phys_port_name", ifname); 19292eb4d010SOphir Munk file = fopen(tmp_str, "rb"); 19302eb4d010SOphir Munk if (!file) 19312eb4d010SOphir Munk break; 19322eb4d010SOphir Munk info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 19332eb4d010SOphir Munk if (fscanf(file, "%32s", tmp_str) == 1) 19342eb4d010SOphir Munk mlx5_translate_port_name(tmp_str, &info); 1935f5f4c482SXueming Li fclose(file); 1936f5f4c482SXueming Li /* Only process PF ports. */ 1937f5f4c482SXueming Li if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY && 1938f5f4c482SXueming Li info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 1939f5f4c482SXueming Li continue; 1940f5f4c482SXueming Li /* Check max bonding member. */ 1941f5f4c482SXueming Li if (info.port_name >= MLX5_BOND_MAX_PORTS) { 1942f5f4c482SXueming Li DRV_LOG(WARNING, "bonding index out of range, " 1943f5f4c482SXueming Li "please increase MLX5_BOND_MAX_PORTS: %s", 1944f5f4c482SXueming Li tmp_str); 19452eb4d010SOphir Munk break; 19462eb4d010SOphir Munk } 1947f5f4c482SXueming Li /* Get ifindex. */ 1948f5f4c482SXueming Li snprintf(tmp_str, sizeof(tmp_str), 1949f5f4c482SXueming Li "/sys/class/net/%s/ifindex", ifname); 1950f5f4c482SXueming Li file = fopen(tmp_str, "rb"); 1951f5f4c482SXueming Li if (!file) 1952f5f4c482SXueming Li break; 1953f5f4c482SXueming Li ret = fscanf(file, "%u", &ifindex); 19542eb4d010SOphir Munk fclose(file); 1955f5f4c482SXueming Li if (ret != 1) 1956f5f4c482SXueming Li break; 1957f5f4c482SXueming Li /* Save bonding info. */ 1958f5f4c482SXueming Li strncpy(bond_info->ports[info.port_name].ifname, ifname, 1959f5f4c482SXueming Li sizeof(bond_info->ports[0].ifname)); 1960f5f4c482SXueming Li bond_info->ports[info.port_name].pci_addr = pci_addr; 1961f5f4c482SXueming Li bond_info->ports[info.port_name].ifindex = ifindex; 1962f5f4c482SXueming Li bond_info->n_port++; 19637299ab68SRongwei Liu /* 19647299ab68SRongwei Liu * Under socket direct mode, bonding will use 19657299ab68SRongwei Liu * system_image_guid as identification. 19667299ab68SRongwei Liu * After OFED 5.4, guid is readable (ret >= 0) under sysfs. 19677299ab68SRongwei Liu * All bonding members should have the same guid even if driver 19687299ab68SRongwei Liu * is using PCIe BDF. 19697299ab68SRongwei Liu */ 19707299ab68SRongwei Liu ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid)); 19717299ab68SRongwei Liu if (ret < 0) 19727299ab68SRongwei Liu break; 19737299ab68SRongwei Liu else if (ret > 0) { 19747299ab68SRongwei Liu if (!memcmp(guid, cur_guid, sizeof(guid)) && 19757299ab68SRongwei Liu owner == info.port_name && 19767299ab68SRongwei Liu (owner != 0 || (owner == 0 && 19777299ab68SRongwei Liu !rte_pci_addr_cmp(pci_dev, &pci_addr)))) 19787299ab68SRongwei Liu pf = info.port_name; 19797299ab68SRongwei Liu } else if (pci_dev->domain == pci_addr.domain && 19807299ab68SRongwei Liu pci_dev->bus == pci_addr.bus && 19817299ab68SRongwei Liu pci_dev->devid == pci_addr.devid && 19827299ab68SRongwei Liu ((pci_dev->function == 0 && 19837299ab68SRongwei Liu pci_dev->function + owner == pci_addr.function) || 19847299ab68SRongwei Liu (pci_dev->function == owner && 19857299ab68SRongwei Liu pci_addr.function == owner))) 19867299ab68SRongwei Liu pf = info.port_name; 1987f5f4c482SXueming Li } 1988f5f4c482SXueming Li if (pf >= 0) { 1989f5f4c482SXueming Li /* Get bond interface info */ 1990f5f4c482SXueming Li ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex, 1991f5f4c482SXueming Li bond_info->ifname); 1992f5f4c482SXueming Li if (ret) 1993f5f4c482SXueming Li DRV_LOG(ERR, "unable to get bond info: %s", 1994f5f4c482SXueming Li strerror(rte_errno)); 1995f5f4c482SXueming Li else 1996f5f4c482SXueming Li DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1997f5f4c482SXueming Li ifindex, bond_info->ifindex, bond_info->ifname); 1998f5f4c482SXueming Li } 19997299ab68SRongwei Liu if (owner == 0 && pf != 0) { 20007299ab68SRongwei Liu DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner", 20017299ab68SRongwei Liu pci_dev->domain, pci_dev->bus, pci_dev->devid, 20027299ab68SRongwei Liu pci_dev->function); 20037299ab68SRongwei Liu } 20042eb4d010SOphir Munk return pf; 20052eb4d010SOphir Munk } 20062eb4d010SOphir Munk 2007919488fbSXueming Li static void 200834776af6SMichael Baum mlx5_os_config_default(struct mlx5_dev_config *config, 200934776af6SMichael Baum struct mlx5_common_dev_config *cconf) 2010919488fbSXueming Li { 2011919488fbSXueming Li memset(config, 0, sizeof(*config)); 2012919488fbSXueming Li config->mps = MLX5_ARG_UNSET; 2013cfe0639bSMichael Baum config->cqe_comp = 1; 2014919488fbSXueming Li config->rx_vec_en = 1; 2015919488fbSXueming Li config->txq_inline_max = MLX5_ARG_UNSET; 2016919488fbSXueming Li config->txq_inline_min = MLX5_ARG_UNSET; 2017919488fbSXueming Li config->txq_inline_mpw = MLX5_ARG_UNSET; 2018919488fbSXueming Li config->txqs_inline = MLX5_ARG_UNSET; 2019919488fbSXueming Li config->vf_nl_en = 1; 2020919488fbSXueming Li config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 2021919488fbSXueming Li config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 202234776af6SMichael Baum config->mprq.log_min_stride_wqe_size = cconf->devx ? 202334776af6SMichael Baum cconf->hca_attr.log_min_stride_wqe_sz : 202434776af6SMichael Baum MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE; 202534776af6SMichael Baum config->mprq.log_stride_num = MLX5_MPRQ_DEFAULT_LOG_STRIDE_NUM; 2026919488fbSXueming Li config->dv_esw_en = 1; 2027919488fbSXueming Li config->dv_flow_en = 1; 2028919488fbSXueming Li config->decap_en = 1; 2029919488fbSXueming Li config->log_hp_size = MLX5_ARG_UNSET; 203097c9b0aaSMichael Baum config->allow_duplicate_pattern = 1; 2031febcac7bSBing Zhao config->std_delay_drop = 0; 2032febcac7bSBing Zhao config->hp_delay_drop = 0; 2033919488fbSXueming Li } 2034919488fbSXueming Li 20352eb4d010SOphir Munk /** 203608c2772fSXueming Li * Register a PCI device within bonding. 20372eb4d010SOphir Munk * 203808c2772fSXueming Li * This function spawns Ethernet devices out of a given PCI device and 203908c2772fSXueming Li * bonding owner PF index. 20402eb4d010SOphir Munk * 20417af08c8fSMichael Baum * @param[in] cdev 20427af08c8fSMichael Baum * Pointer to common mlx5 device structure. 204308c2772fSXueming Li * @param[in] req_eth_da 204408c2772fSXueming Li * Requested ethdev device argument. 204508c2772fSXueming Li * @param[in] owner_id 204608c2772fSXueming Li * Requested owner PF port ID within bonding device, default to 0. 20472eb4d010SOphir Munk * 20482eb4d010SOphir Munk * @return 20492eb4d010SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 20502eb4d010SOphir Munk */ 205108c2772fSXueming Li static int 2052ca1418ceSMichael Baum mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, 205308c2772fSXueming Li struct rte_eth_devargs *req_eth_da, 205408c2772fSXueming Li uint16_t owner_id) 20552eb4d010SOphir Munk { 20562eb4d010SOphir Munk struct ibv_device **ibv_list; 20572eb4d010SOphir Munk /* 20582eb4d010SOphir Munk * Number of found IB Devices matching with requested PCI BDF. 20592eb4d010SOphir Munk * nd != 1 means there are multiple IB devices over the same 20602eb4d010SOphir Munk * PCI device and we have representors and master. 20612eb4d010SOphir Munk */ 20622eb4d010SOphir Munk unsigned int nd = 0; 20632eb4d010SOphir Munk /* 20642eb4d010SOphir Munk * Number of found IB device Ports. nd = 1 and np = 1..n means 20652eb4d010SOphir Munk * we have the single multiport IB device, and there may be 20662eb4d010SOphir Munk * representors attached to some of found ports. 20672eb4d010SOphir Munk */ 20682eb4d010SOphir Munk unsigned int np = 0; 20692eb4d010SOphir Munk /* 20702eb4d010SOphir Munk * Number of DPDK ethernet devices to Spawn - either over 20712eb4d010SOphir Munk * multiple IB devices or multiple ports of single IB device. 20722eb4d010SOphir Munk * Actually this is the number of iterations to spawn. 20732eb4d010SOphir Munk */ 20742eb4d010SOphir Munk unsigned int ns = 0; 20752eb4d010SOphir Munk /* 20762eb4d010SOphir Munk * Bonding device 20772eb4d010SOphir Munk * < 0 - no bonding device (single one) 20782eb4d010SOphir Munk * >= 0 - bonding device (value is slave PF index) 20792eb4d010SOphir Munk */ 20802eb4d010SOphir Munk int bd = -1; 20817af08c8fSMichael Baum struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 20822eb4d010SOphir Munk struct mlx5_dev_spawn_data *list = NULL; 20832eb4d010SOphir Munk struct mlx5_dev_config dev_config; 208408c2772fSXueming Li struct rte_eth_devargs eth_da = *req_eth_da; 2085f926cce3SXueming Li struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */ 2086f5f4c482SXueming Li struct mlx5_bond_info bond_info; 2087f926cce3SXueming Li int ret = -1; 20882eb4d010SOphir Munk 20892eb4d010SOphir Munk errno = 0; 20902eb4d010SOphir Munk ibv_list = mlx5_glue->get_device_list(&ret); 20912eb4d010SOphir Munk if (!ibv_list) { 20922eb4d010SOphir Munk rte_errno = errno ? errno : ENOSYS; 2093887183efSMichael Baum DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?"); 20942eb4d010SOphir Munk return -rte_errno; 20952eb4d010SOphir Munk } 20962eb4d010SOphir Munk /* 20972eb4d010SOphir Munk * First scan the list of all Infiniband devices to find 20982eb4d010SOphir Munk * matching ones, gathering into the list. 20992eb4d010SOphir Munk */ 21002eb4d010SOphir Munk struct ibv_device *ibv_match[ret + 1]; 21012eb4d010SOphir Munk int nl_route = mlx5_nl_init(NETLINK_ROUTE); 21022eb4d010SOphir Munk int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 21032eb4d010SOphir Munk unsigned int i; 21042eb4d010SOphir Munk 21052eb4d010SOphir Munk while (ret-- > 0) { 21062eb4d010SOphir Munk struct rte_pci_addr pci_addr; 21072eb4d010SOphir Munk 2108887183efSMichael Baum DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name); 2109ca1418ceSMichael Baum bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci, 2110ca1418ceSMichael Baum nl_rdma, owner_id, &bond_info); 21112eb4d010SOphir Munk if (bd >= 0) { 21122eb4d010SOphir Munk /* 21132eb4d010SOphir Munk * Bonding device detected. Only one match is allowed, 21142eb4d010SOphir Munk * the bonding is supported over multi-port IB device, 21152eb4d010SOphir Munk * there should be no matches on representor PCI 21162eb4d010SOphir Munk * functions or non VF LAG bonding devices with 21172eb4d010SOphir Munk * specified address. 21182eb4d010SOphir Munk */ 21192eb4d010SOphir Munk if (nd) { 21202eb4d010SOphir Munk DRV_LOG(ERR, 21212eb4d010SOphir Munk "multiple PCI match on bonding device" 21222eb4d010SOphir Munk "\"%s\" found", ibv_list[ret]->name); 21232eb4d010SOphir Munk rte_errno = ENOENT; 21242eb4d010SOphir Munk ret = -rte_errno; 21252eb4d010SOphir Munk goto exit; 21262eb4d010SOphir Munk } 2127f926cce3SXueming Li /* Amend owner pci address if owner PF ID specified. */ 2128f926cce3SXueming Li if (eth_da.nb_representor_ports) 212908c2772fSXueming Li owner_pci.function += owner_id; 2130ca1418ceSMichael Baum DRV_LOG(INFO, 2131ca1418ceSMichael Baum "PCI information matches for slave %d bonding device \"%s\"", 21322eb4d010SOphir Munk bd, ibv_list[ret]->name); 21332eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 21342eb4d010SOphir Munk break; 2135f926cce3SXueming Li } else { 2136f926cce3SXueming Li /* Bonding device not found. */ 21374d567938SThomas Monjalon if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path, 21384d567938SThomas Monjalon &pci_addr)) 21392eb4d010SOphir Munk continue; 2140f926cce3SXueming Li if (owner_pci.domain != pci_addr.domain || 2141f926cce3SXueming Li owner_pci.bus != pci_addr.bus || 2142f926cce3SXueming Li owner_pci.devid != pci_addr.devid || 2143f926cce3SXueming Li owner_pci.function != pci_addr.function) 21442eb4d010SOphir Munk continue; 21452eb4d010SOphir Munk DRV_LOG(INFO, "PCI information matches for device \"%s\"", 21462eb4d010SOphir Munk ibv_list[ret]->name); 21472eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 21482eb4d010SOphir Munk } 2149f926cce3SXueming Li } 21502eb4d010SOphir Munk ibv_match[nd] = NULL; 21512eb4d010SOphir Munk if (!nd) { 21522eb4d010SOphir Munk /* No device matches, just complain and bail out. */ 21532eb4d010SOphir Munk DRV_LOG(WARNING, 2154887183efSMichael Baum "No Verbs device matches PCI device " PCI_PRI_FMT "," 21552eb4d010SOphir Munk " are kernel drivers loaded?", 2156f926cce3SXueming Li owner_pci.domain, owner_pci.bus, 2157f926cce3SXueming Li owner_pci.devid, owner_pci.function); 21582eb4d010SOphir Munk rte_errno = ENOENT; 21592eb4d010SOphir Munk ret = -rte_errno; 21602eb4d010SOphir Munk goto exit; 21612eb4d010SOphir Munk } 21622eb4d010SOphir Munk if (nd == 1) { 21632eb4d010SOphir Munk /* 21642eb4d010SOphir Munk * Found single matching device may have multiple ports. 21652eb4d010SOphir Munk * Each port may be representor, we have to check the port 21662eb4d010SOphir Munk * number and check the representors existence. 21672eb4d010SOphir Munk */ 21682eb4d010SOphir Munk if (nl_rdma >= 0) 21692eb4d010SOphir Munk np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 21702eb4d010SOphir Munk if (!np) 2171887183efSMichael Baum DRV_LOG(WARNING, 2172887183efSMichael Baum "Cannot get IB device \"%s\" ports number.", 2173887183efSMichael Baum ibv_match[0]->name); 21742eb4d010SOphir Munk if (bd >= 0 && !np) { 2175887183efSMichael Baum DRV_LOG(ERR, "Cannot get ports for bonding device."); 21762eb4d010SOphir Munk rte_errno = ENOENT; 21772eb4d010SOphir Munk ret = -rte_errno; 21782eb4d010SOphir Munk goto exit; 21792eb4d010SOphir Munk } 21802eb4d010SOphir Munk } 2181887183efSMichael Baum /* Now we can determine the maximal amount of devices to be spawned. */ 21822175c4dcSSuanming Mou list = mlx5_malloc(MLX5_MEM_ZERO, 2183887183efSMichael Baum sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd), 21842175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 21852eb4d010SOphir Munk if (!list) { 2186887183efSMichael Baum DRV_LOG(ERR, "Spawn data array allocation failure."); 21872eb4d010SOphir Munk rte_errno = ENOMEM; 21882eb4d010SOphir Munk ret = -rte_errno; 21892eb4d010SOphir Munk goto exit; 21902eb4d010SOphir Munk } 21912eb4d010SOphir Munk if (bd >= 0 || np > 1) { 21922eb4d010SOphir Munk /* 21932eb4d010SOphir Munk * Single IB device with multiple ports found, 21942eb4d010SOphir Munk * it may be E-Switch master device and representors. 21952eb4d010SOphir Munk * We have to perform identification through the ports. 21962eb4d010SOphir Munk */ 21972eb4d010SOphir Munk MLX5_ASSERT(nl_rdma >= 0); 21982eb4d010SOphir Munk MLX5_ASSERT(ns == 0); 21992eb4d010SOphir Munk MLX5_ASSERT(nd == 1); 22002eb4d010SOphir Munk MLX5_ASSERT(np); 22012eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 2202f5f4c482SXueming Li list[ns].bond_info = &bond_info; 22032eb4d010SOphir Munk list[ns].max_port = np; 2204834a9019SOphir Munk list[ns].phys_port = i; 2205887183efSMichael Baum list[ns].phys_dev_name = ibv_match[0]->name; 22062eb4d010SOphir Munk list[ns].eth_dev = NULL; 22072eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 22087af08c8fSMichael Baum list[ns].cdev = cdev; 22092eb4d010SOphir Munk list[ns].pf_bond = bd; 2210887183efSMichael Baum list[ns].ifindex = mlx5_nl_ifindex(nl_rdma, 2211887183efSMichael Baum ibv_match[0]->name, 2212887183efSMichael Baum i); 22132eb4d010SOphir Munk if (!list[ns].ifindex) { 22142eb4d010SOphir Munk /* 22152eb4d010SOphir Munk * No network interface index found for the 22162eb4d010SOphir Munk * specified port, it means there is no 22172eb4d010SOphir Munk * representor on this port. It's OK, 22182eb4d010SOphir Munk * there can be disabled ports, for example 22192eb4d010SOphir Munk * if sriov_numvfs < sriov_totalvfs. 22202eb4d010SOphir Munk */ 22212eb4d010SOphir Munk continue; 22222eb4d010SOphir Munk } 22232eb4d010SOphir Munk ret = -1; 22242eb4d010SOphir Munk if (nl_route >= 0) 2225887183efSMichael Baum ret = mlx5_nl_switch_info(nl_route, 22262eb4d010SOphir Munk list[ns].ifindex, 22272eb4d010SOphir Munk &list[ns].info); 22282eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 22292eb4d010SOphir Munk !list[ns].info.master)) { 22302eb4d010SOphir Munk /* 22312eb4d010SOphir Munk * We failed to recognize representors with 22322eb4d010SOphir Munk * Netlink, let's try to perform the task 22332eb4d010SOphir Munk * with sysfs. 22342eb4d010SOphir Munk */ 2235887183efSMichael Baum ret = mlx5_sysfs_switch_info(list[ns].ifindex, 22362eb4d010SOphir Munk &list[ns].info); 22372eb4d010SOphir Munk } 22382eb4d010SOphir Munk if (!ret && bd >= 0) { 22392eb4d010SOphir Munk switch (list[ns].info.name_type) { 22402eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 22419f430dd7SViacheslav Ovsiienko if (np == 1) { 22429f430dd7SViacheslav Ovsiienko /* 22439f430dd7SViacheslav Ovsiienko * Force standalone bonding 22449f430dd7SViacheslav Ovsiienko * device for ROCE LAG 22457be78d02SJosh Soref * configurations. 22469f430dd7SViacheslav Ovsiienko */ 22479f430dd7SViacheslav Ovsiienko list[ns].info.master = 0; 22489f430dd7SViacheslav Ovsiienko list[ns].info.representor = 0; 22499f430dd7SViacheslav Ovsiienko } 22502eb4d010SOphir Munk if (list[ns].info.port_name == bd) 22512eb4d010SOphir Munk ns++; 22522eb4d010SOphir Munk break; 2253420bbdaeSViacheslav Ovsiienko case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 2254420bbdaeSViacheslav Ovsiienko /* Fallthrough */ 22552eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 2256cb95feefSXueming Li /* Fallthrough */ 2257cb95feefSXueming Li case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 22582eb4d010SOphir Munk if (list[ns].info.pf_num == bd) 22592eb4d010SOphir Munk ns++; 22602eb4d010SOphir Munk break; 22612eb4d010SOphir Munk default: 22622eb4d010SOphir Munk break; 22632eb4d010SOphir Munk } 22642eb4d010SOphir Munk continue; 22652eb4d010SOphir Munk } 22662eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 22672eb4d010SOphir Munk list[ns].info.master)) 22682eb4d010SOphir Munk ns++; 22692eb4d010SOphir Munk } 22702eb4d010SOphir Munk if (!ns) { 22712eb4d010SOphir Munk DRV_LOG(ERR, 2272887183efSMichael Baum "Unable to recognize master/representors on the IB device with multiple ports."); 22732eb4d010SOphir Munk rte_errno = ENOENT; 22742eb4d010SOphir Munk ret = -rte_errno; 22752eb4d010SOphir Munk goto exit; 22762eb4d010SOphir Munk } 22772eb4d010SOphir Munk } else { 22782eb4d010SOphir Munk /* 22792eb4d010SOphir Munk * The existence of several matching entries (nd > 1) means 22802eb4d010SOphir Munk * port representors have been instantiated. No existing Verbs 22812eb4d010SOphir Munk * call nor sysfs entries can tell them apart, this can only 22822eb4d010SOphir Munk * be done through Netlink calls assuming kernel drivers are 22832eb4d010SOphir Munk * recent enough to support them. 22842eb4d010SOphir Munk * 22852eb4d010SOphir Munk * In the event of identification failure through Netlink, 22862eb4d010SOphir Munk * try again through sysfs, then: 22872eb4d010SOphir Munk * 22882eb4d010SOphir Munk * 1. A single IB device matches (nd == 1) with single 22892eb4d010SOphir Munk * port (np=0/1) and is not a representor, assume 22902eb4d010SOphir Munk * no switch support. 22912eb4d010SOphir Munk * 22922eb4d010SOphir Munk * 2. Otherwise no safe assumptions can be made; 22932eb4d010SOphir Munk * complain louder and bail out. 22942eb4d010SOphir Munk */ 22952eb4d010SOphir Munk for (i = 0; i != nd; ++i) { 22962eb4d010SOphir Munk memset(&list[ns].info, 0, sizeof(list[ns].info)); 2297f5f4c482SXueming Li list[ns].bond_info = NULL; 22982eb4d010SOphir Munk list[ns].max_port = 1; 2299834a9019SOphir Munk list[ns].phys_port = 1; 2300887183efSMichael Baum list[ns].phys_dev_name = ibv_match[i]->name; 23012eb4d010SOphir Munk list[ns].eth_dev = NULL; 23022eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 23037af08c8fSMichael Baum list[ns].cdev = cdev; 23042eb4d010SOphir Munk list[ns].pf_bond = -1; 23052eb4d010SOphir Munk list[ns].ifindex = 0; 23062eb4d010SOphir Munk if (nl_rdma >= 0) 23072eb4d010SOphir Munk list[ns].ifindex = mlx5_nl_ifindex 2308834a9019SOphir Munk (nl_rdma, 2309887183efSMichael Baum ibv_match[i]->name, 2310887183efSMichael Baum 1); 23112eb4d010SOphir Munk if (!list[ns].ifindex) { 23122eb4d010SOphir Munk char ifname[IF_NAMESIZE]; 23132eb4d010SOphir Munk 23142eb4d010SOphir Munk /* 23152eb4d010SOphir Munk * Netlink failed, it may happen with old 23162eb4d010SOphir Munk * ib_core kernel driver (before 4.16). 23172eb4d010SOphir Munk * We can assume there is old driver because 23182eb4d010SOphir Munk * here we are processing single ports IB 23192eb4d010SOphir Munk * devices. Let's try sysfs to retrieve 23202eb4d010SOphir Munk * the ifindex. The method works for 23212eb4d010SOphir Munk * master device only. 23222eb4d010SOphir Munk */ 23232eb4d010SOphir Munk if (nd > 1) { 23242eb4d010SOphir Munk /* 23252eb4d010SOphir Munk * Multiple devices found, assume 23262eb4d010SOphir Munk * representors, can not distinguish 23272eb4d010SOphir Munk * master/representor and retrieve 23282eb4d010SOphir Munk * ifindex via sysfs. 23292eb4d010SOphir Munk */ 23302eb4d010SOphir Munk continue; 23312eb4d010SOphir Munk } 2332aec086c9SMatan Azrad ret = mlx5_get_ifname_sysfs 2333aec086c9SMatan Azrad (ibv_match[i]->ibdev_path, ifname); 23342eb4d010SOphir Munk if (!ret) 23352eb4d010SOphir Munk list[ns].ifindex = 23362eb4d010SOphir Munk if_nametoindex(ifname); 23372eb4d010SOphir Munk if (!list[ns].ifindex) { 23382eb4d010SOphir Munk /* 23392eb4d010SOphir Munk * No network interface index found 23402eb4d010SOphir Munk * for the specified device, it means 23412eb4d010SOphir Munk * there it is neither representor 23422eb4d010SOphir Munk * nor master. 23432eb4d010SOphir Munk */ 23442eb4d010SOphir Munk continue; 23452eb4d010SOphir Munk } 23462eb4d010SOphir Munk } 23472eb4d010SOphir Munk ret = -1; 23482eb4d010SOphir Munk if (nl_route >= 0) 2349ca1418ceSMichael Baum ret = mlx5_nl_switch_info(nl_route, 23502eb4d010SOphir Munk list[ns].ifindex, 23512eb4d010SOphir Munk &list[ns].info); 23522eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 23532eb4d010SOphir Munk !list[ns].info.master)) { 23542eb4d010SOphir Munk /* 23552eb4d010SOphir Munk * We failed to recognize representors with 23562eb4d010SOphir Munk * Netlink, let's try to perform the task 23572eb4d010SOphir Munk * with sysfs. 23582eb4d010SOphir Munk */ 2359887183efSMichael Baum ret = mlx5_sysfs_switch_info(list[ns].ifindex, 23602eb4d010SOphir Munk &list[ns].info); 23612eb4d010SOphir Munk } 23622eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 23632eb4d010SOphir Munk list[ns].info.master)) { 23642eb4d010SOphir Munk ns++; 23652eb4d010SOphir Munk } else if ((nd == 1) && 23662eb4d010SOphir Munk !list[ns].info.representor && 23672eb4d010SOphir Munk !list[ns].info.master) { 23682eb4d010SOphir Munk /* 2369887183efSMichael Baum * Single IB device with one physical port and 23702eb4d010SOphir Munk * attached network device. 2371887183efSMichael Baum * May be SRIOV is not enabled or there is no 2372887183efSMichael Baum * representors. 23732eb4d010SOphir Munk */ 2374887183efSMichael Baum DRV_LOG(INFO, "No E-Switch support detected."); 23752eb4d010SOphir Munk ns++; 23762eb4d010SOphir Munk break; 23772eb4d010SOphir Munk } 23782eb4d010SOphir Munk } 23792eb4d010SOphir Munk if (!ns) { 23802eb4d010SOphir Munk DRV_LOG(ERR, 2381887183efSMichael Baum "Unable to recognize master/representors on the multiple IB devices."); 23822eb4d010SOphir Munk rte_errno = ENOENT; 23832eb4d010SOphir Munk ret = -rte_errno; 23842eb4d010SOphir Munk goto exit; 23852eb4d010SOphir Munk } 23866b157f3bSViacheslav Ovsiienko /* 23876b157f3bSViacheslav Ovsiienko * New kernels may add the switch_id attribute for the case 2388ca1418ceSMichael Baum * there is no E-Switch and we wrongly recognized the only 2389ca1418ceSMichael Baum * device as master. Override this if there is the single 2390ca1418ceSMichael Baum * device with single port and new device name format present. 23916b157f3bSViacheslav Ovsiienko */ 23926b157f3bSViacheslav Ovsiienko if (nd == 1 && 23936b157f3bSViacheslav Ovsiienko list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) { 23946b157f3bSViacheslav Ovsiienko list[0].info.master = 0; 23956b157f3bSViacheslav Ovsiienko list[0].info.representor = 0; 23966b157f3bSViacheslav Ovsiienko } 23972eb4d010SOphir Munk } 23982eb4d010SOphir Munk MLX5_ASSERT(ns); 23992eb4d010SOphir Munk /* 24002eb4d010SOphir Munk * Sort list to probe devices in natural order for users convenience 24012eb4d010SOphir Munk * (i.e. master first, then representors from lowest to highest ID). 24022eb4d010SOphir Munk */ 24032eb4d010SOphir Munk qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 2404f926cce3SXueming Li if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) { 2405f926cce3SXueming Li /* Set devargs default values. */ 2406f926cce3SXueming Li if (eth_da.nb_mh_controllers == 0) { 2407f926cce3SXueming Li eth_da.nb_mh_controllers = 1; 2408f926cce3SXueming Li eth_da.mh_controllers[0] = 0; 2409f926cce3SXueming Li } 2410f926cce3SXueming Li if (eth_da.nb_ports == 0 && ns > 0) { 2411f926cce3SXueming Li if (list[0].pf_bond >= 0 && list[0].info.representor) 2412f926cce3SXueming Li DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s", 2413f926cce3SXueming Li pci_dev->device.devargs->args); 2414f926cce3SXueming Li eth_da.nb_ports = 1; 2415f926cce3SXueming Li eth_da.ports[0] = list[0].info.pf_num; 2416f926cce3SXueming Li } 2417f926cce3SXueming Li if (eth_da.nb_representor_ports == 0) { 2418f926cce3SXueming Li eth_da.nb_representor_ports = 1; 2419f926cce3SXueming Li eth_da.representor_ports[0] = 0; 2420f926cce3SXueming Li } 2421f926cce3SXueming Li } 24222eb4d010SOphir Munk for (i = 0; i != ns; ++i) { 24232eb4d010SOphir Munk uint32_t restore; 24242eb4d010SOphir Munk 2425d462a83cSMichael Baum /* Default configuration. */ 242634776af6SMichael Baum mlx5_os_config_default(&dev_config, &cdev->config); 2427c4c3e8afSMichael Baum dev_config.vf = mlx5_dev_is_vf_pci(pci_dev); 24287af08c8fSMichael Baum list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], 24297af08c8fSMichael Baum &dev_config, ð_da); 24302eb4d010SOphir Munk if (!list[i].eth_dev) { 24312eb4d010SOphir Munk if (rte_errno != EBUSY && rte_errno != EEXIST) 24322eb4d010SOphir Munk break; 24332eb4d010SOphir Munk /* Device is disabled or already spawned. Ignore it. */ 24342eb4d010SOphir Munk continue; 24352eb4d010SOphir Munk } 24362eb4d010SOphir Munk restore = list[i].eth_dev->data->dev_flags; 24372eb4d010SOphir Munk rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 2438494d6863SGregory Etelson /** 2439494d6863SGregory Etelson * Each representor has a dedicated interrupts vector. 2440494d6863SGregory Etelson * rte_eth_copy_pci_info() assigns PF interrupts handle to 2441494d6863SGregory Etelson * representor eth_dev object because representor and PF 2442494d6863SGregory Etelson * share the same PCI address. 2443494d6863SGregory Etelson * Override representor device with a dedicated 2444494d6863SGregory Etelson * interrupts handle here. 2445494d6863SGregory Etelson * Representor interrupts handle is released in mlx5_dev_stop(). 2446494d6863SGregory Etelson */ 2447494d6863SGregory Etelson if (list[i].info.representor) { 2448d61138d4SHarman Kalra struct rte_intr_handle *intr_handle = 2449d61138d4SHarman Kalra rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2450d61138d4SHarman Kalra if (intr_handle == NULL) { 2451494d6863SGregory Etelson DRV_LOG(ERR, 2452494d6863SGregory Etelson "port %u failed to allocate memory for interrupt handler " 2453494d6863SGregory Etelson "Rx interrupts will not be supported", 2454494d6863SGregory Etelson i); 2455494d6863SGregory Etelson rte_errno = ENOMEM; 2456494d6863SGregory Etelson ret = -rte_errno; 2457494d6863SGregory Etelson goto exit; 2458494d6863SGregory Etelson } 2459494d6863SGregory Etelson list[i].eth_dev->intr_handle = intr_handle; 2460494d6863SGregory Etelson } 24612eb4d010SOphir Munk /* Restore non-PCI flags cleared by the above call. */ 24622eb4d010SOphir Munk list[i].eth_dev->data->dev_flags |= restore; 24632eb4d010SOphir Munk rte_eth_dev_probing_finish(list[i].eth_dev); 24642eb4d010SOphir Munk } 24652eb4d010SOphir Munk if (i != ns) { 24662eb4d010SOphir Munk DRV_LOG(ERR, 24672eb4d010SOphir Munk "probe of PCI device " PCI_PRI_FMT " aborted after" 24682eb4d010SOphir Munk " encountering an error: %s", 2469f926cce3SXueming Li owner_pci.domain, owner_pci.bus, 2470f926cce3SXueming Li owner_pci.devid, owner_pci.function, 24712eb4d010SOphir Munk strerror(rte_errno)); 24722eb4d010SOphir Munk ret = -rte_errno; 24732eb4d010SOphir Munk /* Roll back. */ 24742eb4d010SOphir Munk while (i--) { 24752eb4d010SOphir Munk if (!list[i].eth_dev) 24762eb4d010SOphir Munk continue; 24772eb4d010SOphir Munk mlx5_dev_close(list[i].eth_dev); 24782eb4d010SOphir Munk /* mac_addrs must not be freed because in dev_private */ 24792eb4d010SOphir Munk list[i].eth_dev->data->mac_addrs = NULL; 24802eb4d010SOphir Munk claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 24812eb4d010SOphir Munk } 24822eb4d010SOphir Munk /* Restore original error. */ 24832eb4d010SOphir Munk rte_errno = -ret; 24842eb4d010SOphir Munk } else { 24852eb4d010SOphir Munk ret = 0; 24862eb4d010SOphir Munk } 24872eb4d010SOphir Munk exit: 24882eb4d010SOphir Munk /* 24892eb4d010SOphir Munk * Do the routine cleanup: 24902eb4d010SOphir Munk * - close opened Netlink sockets 24912eb4d010SOphir Munk * - free allocated spawn data array 24922eb4d010SOphir Munk * - free the Infiniband device list 24932eb4d010SOphir Munk */ 24942eb4d010SOphir Munk if (nl_rdma >= 0) 24952eb4d010SOphir Munk close(nl_rdma); 24962eb4d010SOphir Munk if (nl_route >= 0) 24972eb4d010SOphir Munk close(nl_route); 24982eb4d010SOphir Munk if (list) 24992175c4dcSSuanming Mou mlx5_free(list); 25002eb4d010SOphir Munk MLX5_ASSERT(ibv_list); 25012eb4d010SOphir Munk mlx5_glue->free_device_list(ibv_list); 25022eb4d010SOphir Munk return ret; 25032eb4d010SOphir Munk } 25042eb4d010SOphir Munk 2505919488fbSXueming Li static int 2506919488fbSXueming Li mlx5_os_parse_eth_devargs(struct rte_device *dev, 2507919488fbSXueming Li struct rte_eth_devargs *eth_da) 2508919488fbSXueming Li { 2509919488fbSXueming Li int ret = 0; 2510919488fbSXueming Li 2511919488fbSXueming Li if (dev->devargs == NULL) 2512919488fbSXueming Li return 0; 2513919488fbSXueming Li memset(eth_da, 0, sizeof(*eth_da)); 2514919488fbSXueming Li /* Parse representor information first from class argument. */ 2515919488fbSXueming Li if (dev->devargs->cls_str) 2516919488fbSXueming Li ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da); 2517919488fbSXueming Li if (ret != 0) { 2518919488fbSXueming Li DRV_LOG(ERR, "failed to parse device arguments: %s", 2519919488fbSXueming Li dev->devargs->cls_str); 2520919488fbSXueming Li return -rte_errno; 2521919488fbSXueming Li } 2522919488fbSXueming Li if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) { 2523919488fbSXueming Li /* Parse legacy device argument */ 2524919488fbSXueming Li ret = rte_eth_devargs_parse(dev->devargs->args, eth_da); 2525919488fbSXueming Li if (ret) { 2526919488fbSXueming Li DRV_LOG(ERR, "failed to parse device arguments: %s", 2527919488fbSXueming Li dev->devargs->args); 2528919488fbSXueming Li return -rte_errno; 2529919488fbSXueming Li } 2530919488fbSXueming Li } 2531919488fbSXueming Li return 0; 2532919488fbSXueming Li } 2533919488fbSXueming Li 253408c2772fSXueming Li /** 2535a7f34989SXueming Li * Callback to register a PCI device. 253608c2772fSXueming Li * 253708c2772fSXueming Li * This function spawns Ethernet devices out of a given PCI device. 253808c2772fSXueming Li * 25397af08c8fSMichael Baum * @param[in] cdev 25407af08c8fSMichael Baum * Pointer to common mlx5 device structure. 254108c2772fSXueming Li * 254208c2772fSXueming Li * @return 254308c2772fSXueming Li * 0 on success, a negative errno value otherwise and rte_errno is set. 254408c2772fSXueming Li */ 2545a7f34989SXueming Li static int 2546ca1418ceSMichael Baum mlx5_os_pci_probe(struct mlx5_common_device *cdev) 254708c2772fSXueming Li { 25487af08c8fSMichael Baum struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev); 2549919488fbSXueming Li struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 255008c2772fSXueming Li int ret = 0; 255108c2772fSXueming Li uint16_t p; 255208c2772fSXueming Li 25537af08c8fSMichael Baum ret = mlx5_os_parse_eth_devargs(cdev->dev, ð_da); 2554919488fbSXueming Li if (ret != 0) 2555919488fbSXueming Li return ret; 255608c2772fSXueming Li 255708c2772fSXueming Li if (eth_da.nb_ports > 0) { 255808c2772fSXueming Li /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */ 25596856efa5SMichael Baum for (p = 0; p < eth_da.nb_ports; p++) { 2560ca1418ceSMichael Baum ret = mlx5_os_pci_probe_pf(cdev, ð_da, 256108c2772fSXueming Li eth_da.ports[p]); 25626856efa5SMichael Baum if (ret) 25636856efa5SMichael Baum break; 25646856efa5SMichael Baum } 25656856efa5SMichael Baum if (ret) { 25666856efa5SMichael Baum DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " " 25677be78d02SJosh Soref "aborted due to prodding failure of PF %u", 25686856efa5SMichael Baum pci_dev->addr.domain, pci_dev->addr.bus, 25696856efa5SMichael Baum pci_dev->addr.devid, pci_dev->addr.function, 25706856efa5SMichael Baum eth_da.ports[p]); 25717af08c8fSMichael Baum mlx5_net_remove(cdev); 25726856efa5SMichael Baum } 257308c2772fSXueming Li } else { 2574ca1418ceSMichael Baum ret = mlx5_os_pci_probe_pf(cdev, ð_da, 0); 257508c2772fSXueming Li } 257608c2772fSXueming Li return ret; 257708c2772fSXueming Li } 257808c2772fSXueming Li 2579919488fbSXueming Li /* Probe a single SF device on auxiliary bus, no representor support. */ 2580919488fbSXueming Li static int 2581ca1418ceSMichael Baum mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev) 2582919488fbSXueming Li { 2583919488fbSXueming Li struct rte_eth_devargs eth_da = { .nb_ports = 0 }; 2584919488fbSXueming Li struct mlx5_dev_config config; 2585919488fbSXueming Li struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 }; 25867af08c8fSMichael Baum struct rte_device *dev = cdev->dev; 2587919488fbSXueming Li struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev); 2588919488fbSXueming Li struct rte_eth_dev *eth_dev; 2589919488fbSXueming Li int ret = 0; 2590919488fbSXueming Li 2591919488fbSXueming Li /* Parse ethdev devargs. */ 2592919488fbSXueming Li ret = mlx5_os_parse_eth_devargs(dev, ð_da); 2593919488fbSXueming Li if (ret != 0) 2594919488fbSXueming Li return ret; 2595919488fbSXueming Li /* Set default config data. */ 259634776af6SMichael Baum mlx5_os_config_default(&config, &cdev->config); 2597919488fbSXueming Li config.sf = 1; 2598919488fbSXueming Li /* Init spawn data. */ 2599919488fbSXueming Li spawn.max_port = 1; 2600919488fbSXueming Li spawn.phys_port = 1; 2601ca1418ceSMichael Baum spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx); 2602919488fbSXueming Li ret = mlx5_auxiliary_get_ifindex(dev->name); 2603919488fbSXueming Li if (ret < 0) { 2604919488fbSXueming Li DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name); 2605919488fbSXueming Li return ret; 2606919488fbSXueming Li } 2607919488fbSXueming Li spawn.ifindex = ret; 26087af08c8fSMichael Baum spawn.cdev = cdev; 2609919488fbSXueming Li /* Spawn device. */ 2610919488fbSXueming Li eth_dev = mlx5_dev_spawn(dev, &spawn, &config, ð_da); 2611919488fbSXueming Li if (eth_dev == NULL) 2612919488fbSXueming Li return -rte_errno; 2613919488fbSXueming Li /* Post create. */ 2614d61138d4SHarman Kalra eth_dev->intr_handle = adev->intr_handle; 2615919488fbSXueming Li if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2616919488fbSXueming Li eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2617919488fbSXueming Li eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV; 2618919488fbSXueming Li eth_dev->data->numa_node = dev->numa_node; 2619919488fbSXueming Li } 2620919488fbSXueming Li rte_eth_dev_probing_finish(eth_dev); 2621919488fbSXueming Li return 0; 2622919488fbSXueming Li } 2623919488fbSXueming Li 2624a7f34989SXueming Li /** 2625a7f34989SXueming Li * Net class driver callback to probe a device. 2626a7f34989SXueming Li * 2627919488fbSXueming Li * This function probe PCI bus device(s) or a single SF on auxiliary bus. 2628a7f34989SXueming Li * 26297af08c8fSMichael Baum * @param[in] cdev 26307af08c8fSMichael Baum * Pointer to the common mlx5 device. 2631a7f34989SXueming Li * 2632a7f34989SXueming Li * @return 26337af08c8fSMichael Baum * 0 on success, a negative errno value otherwise and rte_errno is set. 2634a7f34989SXueming Li */ 2635a7f34989SXueming Li int 26367af08c8fSMichael Baum mlx5_os_net_probe(struct mlx5_common_device *cdev) 2637a7f34989SXueming Li { 2638a7f34989SXueming Li int ret; 2639a7f34989SXueming Li 2640ca1418ceSMichael Baum if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2641a7f34989SXueming Li mlx5_pmd_socket_init(); 2642a7f34989SXueming Li ret = mlx5_init_once(); 2643a7f34989SXueming Li if (ret) { 26447af08c8fSMichael Baum DRV_LOG(ERR, "Unable to init PMD global data: %s", 2645a7f34989SXueming Li strerror(rte_errno)); 2646a7f34989SXueming Li return -rte_errno; 2647a7f34989SXueming Li } 26487af08c8fSMichael Baum if (mlx5_dev_is_pci(cdev->dev)) 2649ca1418ceSMichael Baum return mlx5_os_pci_probe(cdev); 2650919488fbSXueming Li else 2651ca1418ceSMichael Baum return mlx5_os_auxiliary_probe(cdev); 26522eb4d010SOphir Munk } 26532eb4d010SOphir Munk 26542eb4d010SOphir Munk /** 2655ea823b2cSDmitry Kozlyuk * Cleanup resources when the last device is closed. 2656ea823b2cSDmitry Kozlyuk */ 2657ea823b2cSDmitry Kozlyuk void 2658ea823b2cSDmitry Kozlyuk mlx5_os_net_cleanup(void) 2659ea823b2cSDmitry Kozlyuk { 2660ea823b2cSDmitry Kozlyuk mlx5_pmd_socket_uninit(); 2661ea823b2cSDmitry Kozlyuk } 2662ea823b2cSDmitry Kozlyuk 2663ea823b2cSDmitry Kozlyuk /** 26642eb4d010SOphir Munk * Install shared asynchronous device events handler. 26652eb4d010SOphir Munk * This function is implemented to support event sharing 26662eb4d010SOphir Munk * between multiple ports of single IB device. 26672eb4d010SOphir Munk * 26682eb4d010SOphir Munk * @param sh 26692eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 26702eb4d010SOphir Munk */ 26712eb4d010SOphir Munk void 26722eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 26732eb4d010SOphir Munk { 26742eb4d010SOphir Munk int ret; 26752eb4d010SOphir Munk int flags; 2676ca1418ceSMichael Baum struct ibv_context *ctx = sh->cdev->ctx; 26772eb4d010SOphir Munk 2678d61138d4SHarman Kalra sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2679d61138d4SHarman Kalra if (sh->intr_handle == NULL) { 2680d61138d4SHarman Kalra DRV_LOG(ERR, "Fail to allocate intr_handle"); 2681d61138d4SHarman Kalra rte_errno = ENOMEM; 2682d61138d4SHarman Kalra return; 2683d61138d4SHarman Kalra } 2684d61138d4SHarman Kalra rte_intr_fd_set(sh->intr_handle, -1); 2685d61138d4SHarman Kalra 2686ca1418ceSMichael Baum flags = fcntl(ctx->async_fd, F_GETFL); 2687ca1418ceSMichael Baum ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK); 26882eb4d010SOphir Munk if (ret) { 26892eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor async event" 26902eb4d010SOphir Munk " queue"); 26912eb4d010SOphir Munk } else { 2692d61138d4SHarman Kalra rte_intr_fd_set(sh->intr_handle, ctx->async_fd); 2693d61138d4SHarman Kalra rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT); 2694d61138d4SHarman Kalra if (rte_intr_callback_register(sh->intr_handle, 26952eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh)) { 26962eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the shared interrupt."); 2697d61138d4SHarman Kalra rte_intr_fd_set(sh->intr_handle, -1); 26982eb4d010SOphir Munk } 26992eb4d010SOphir Munk } 27006dc0cbc6SMichael Baum if (sh->cdev->config.devx) { 27012eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 2702d61138d4SHarman Kalra sh->intr_handle_devx = 2703d61138d4SHarman Kalra rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED); 2704d61138d4SHarman Kalra if (!sh->intr_handle_devx) { 2705d61138d4SHarman Kalra DRV_LOG(ERR, "Fail to allocate intr_handle"); 2706d61138d4SHarman Kalra rte_errno = ENOMEM; 2707d61138d4SHarman Kalra return; 2708d61138d4SHarman Kalra } 2709d61138d4SHarman Kalra rte_intr_fd_set(sh->intr_handle_devx, -1); 2710ca1418ceSMichael Baum sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx); 271121b7c452SOphir Munk struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 271221b7c452SOphir Munk if (!devx_comp) { 27132eb4d010SOphir Munk DRV_LOG(INFO, "failed to allocate devx_comp."); 27142eb4d010SOphir Munk return; 27152eb4d010SOphir Munk } 271621b7c452SOphir Munk flags = fcntl(devx_comp->fd, F_GETFL); 271721b7c452SOphir Munk ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 27182eb4d010SOphir Munk if (ret) { 27192eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor" 27202eb4d010SOphir Munk " devx comp"); 27212eb4d010SOphir Munk return; 27222eb4d010SOphir Munk } 2723d61138d4SHarman Kalra rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd); 2724d61138d4SHarman Kalra rte_intr_type_set(sh->intr_handle_devx, 2725d61138d4SHarman Kalra RTE_INTR_HANDLE_EXT); 2726d61138d4SHarman Kalra if (rte_intr_callback_register(sh->intr_handle_devx, 27272eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh)) { 27282eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the devx shared" 27292eb4d010SOphir Munk " interrupt."); 2730d61138d4SHarman Kalra rte_intr_fd_set(sh->intr_handle_devx, -1); 27312eb4d010SOphir Munk } 27322eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */ 27332eb4d010SOphir Munk } 27342eb4d010SOphir Munk } 27352eb4d010SOphir Munk 27362eb4d010SOphir Munk /** 27372eb4d010SOphir Munk * Uninstall shared asynchronous device events handler. 27382eb4d010SOphir Munk * This function is implemented to support event sharing 27392eb4d010SOphir Munk * between multiple ports of single IB device. 27402eb4d010SOphir Munk * 27412eb4d010SOphir Munk * @param dev 27422eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 27432eb4d010SOphir Munk */ 27442eb4d010SOphir Munk void 27452eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 27462eb4d010SOphir Munk { 2747d61138d4SHarman Kalra if (rte_intr_fd_get(sh->intr_handle) >= 0) 2748d61138d4SHarman Kalra mlx5_intr_callback_unregister(sh->intr_handle, 27492eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh); 2750d61138d4SHarman Kalra rte_intr_instance_free(sh->intr_handle); 27512eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 2752d61138d4SHarman Kalra if (rte_intr_fd_get(sh->intr_handle_devx) >= 0) 2753d61138d4SHarman Kalra rte_intr_callback_unregister(sh->intr_handle_devx, 27542eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh); 2755d61138d4SHarman Kalra rte_intr_instance_free(sh->intr_handle_devx); 27562eb4d010SOphir Munk if (sh->devx_comp) 27572eb4d010SOphir Munk mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 27582eb4d010SOphir Munk #endif 27592eb4d010SOphir Munk } 2760042f5c94SOphir Munk 276173bf9235SOphir Munk /** 276273bf9235SOphir Munk * Read statistics by a named counter. 276373bf9235SOphir Munk * 276473bf9235SOphir Munk * @param[in] priv 276573bf9235SOphir Munk * Pointer to the private device data structure. 276673bf9235SOphir Munk * @param[in] ctr_name 276773bf9235SOphir Munk * Pointer to the name of the statistic counter to read 276873bf9235SOphir Munk * @param[out] stat 276973bf9235SOphir Munk * Pointer to read statistic value. 277073bf9235SOphir Munk * @return 277173bf9235SOphir Munk * 0 on success and stat is valud, 1 if failed to read the value 277273bf9235SOphir Munk * rte_errno is set. 277373bf9235SOphir Munk * 277473bf9235SOphir Munk */ 277573bf9235SOphir Munk int 277673bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 277773bf9235SOphir Munk uint64_t *stat) 277873bf9235SOphir Munk { 277973bf9235SOphir Munk int fd; 278073bf9235SOphir Munk 278173bf9235SOphir Munk if (priv->sh) { 2782e6988afdSMatan Azrad if (priv->q_counters != NULL && 2783e6988afdSMatan Azrad strcmp(ctr_name, "out_of_buffer") == 0) 2784978a0303SViacheslav Ovsiienko return mlx5_devx_cmd_queue_counter_query 2785978a0303SViacheslav Ovsiienko (priv->q_counters, 0, (uint32_t *)stat); 278673bf9235SOphir Munk MKSTR(path, "%s/ports/%d/hw_counters/%s", 278773bf9235SOphir Munk priv->sh->ibdev_path, 278873bf9235SOphir Munk priv->dev_port, 278973bf9235SOphir Munk ctr_name); 279073bf9235SOphir Munk fd = open(path, O_RDONLY); 2791038e7fc0SShy Shyman /* 2792038e7fc0SShy Shyman * in switchdev the file location is not per port 2793038e7fc0SShy Shyman * but rather in <ibdev_path>/hw_counters/<file_name>. 2794038e7fc0SShy Shyman */ 2795038e7fc0SShy Shyman if (fd == -1) { 2796038e7fc0SShy Shyman MKSTR(path1, "%s/hw_counters/%s", 2797038e7fc0SShy Shyman priv->sh->ibdev_path, 2798038e7fc0SShy Shyman ctr_name); 2799038e7fc0SShy Shyman fd = open(path1, O_RDONLY); 2800038e7fc0SShy Shyman } 280173bf9235SOphir Munk if (fd != -1) { 280273bf9235SOphir Munk char buf[21] = {'\0'}; 280373bf9235SOphir Munk ssize_t n = read(fd, buf, sizeof(buf)); 280473bf9235SOphir Munk 280573bf9235SOphir Munk close(fd); 280673bf9235SOphir Munk if (n != -1) { 280773bf9235SOphir Munk *stat = strtoull(buf, NULL, 10); 280873bf9235SOphir Munk return 0; 280973bf9235SOphir Munk } 281073bf9235SOphir Munk } 281173bf9235SOphir Munk } 281273bf9235SOphir Munk *stat = 0; 281373bf9235SOphir Munk return 1; 281473bf9235SOphir Munk } 281573bf9235SOphir Munk 281673bf9235SOphir Munk /** 2817ab27cdd9SOphir Munk * Remove a MAC address from device 2818ab27cdd9SOphir Munk * 2819ab27cdd9SOphir Munk * @param dev 2820ab27cdd9SOphir Munk * Pointer to Ethernet device structure. 2821ab27cdd9SOphir Munk * @param index 2822ab27cdd9SOphir Munk * MAC address index. 2823ab27cdd9SOphir Munk */ 2824ab27cdd9SOphir Munk void 2825ab27cdd9SOphir Munk mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2826ab27cdd9SOphir Munk { 2827ab27cdd9SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2828ab27cdd9SOphir Munk const int vf = priv->config.vf; 2829ab27cdd9SOphir Munk 2830ab27cdd9SOphir Munk if (vf) 2831ab27cdd9SOphir Munk mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2832ab27cdd9SOphir Munk mlx5_ifindex(dev), priv->mac_own, 2833ab27cdd9SOphir Munk &dev->data->mac_addrs[index], index); 2834ab27cdd9SOphir Munk } 2835ab27cdd9SOphir Munk 2836ab27cdd9SOphir Munk /** 2837ab27cdd9SOphir Munk * Adds a MAC address to the device 2838ab27cdd9SOphir Munk * 2839ab27cdd9SOphir Munk * @param dev 2840ab27cdd9SOphir Munk * Pointer to Ethernet device structure. 2841ab27cdd9SOphir Munk * @param mac_addr 2842ab27cdd9SOphir Munk * MAC address to register. 2843ab27cdd9SOphir Munk * @param index 2844ab27cdd9SOphir Munk * MAC address index. 2845ab27cdd9SOphir Munk * 2846ab27cdd9SOphir Munk * @return 2847ab27cdd9SOphir Munk * 0 on success, a negative errno value otherwise 2848ab27cdd9SOphir Munk */ 2849ab27cdd9SOphir Munk int 2850ab27cdd9SOphir Munk mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2851ab27cdd9SOphir Munk uint32_t index) 2852ab27cdd9SOphir Munk { 2853ab27cdd9SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2854ab27cdd9SOphir Munk const int vf = priv->config.vf; 2855ab27cdd9SOphir Munk int ret = 0; 2856ab27cdd9SOphir Munk 2857ab27cdd9SOphir Munk if (vf) 2858ab27cdd9SOphir Munk ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2859ab27cdd9SOphir Munk mlx5_ifindex(dev), priv->mac_own, 2860ab27cdd9SOphir Munk mac, index); 2861ab27cdd9SOphir Munk return ret; 2862ab27cdd9SOphir Munk } 2863ab27cdd9SOphir Munk 2864ab27cdd9SOphir Munk /** 2865ab27cdd9SOphir Munk * Modify a VF MAC address 2866ab27cdd9SOphir Munk * 2867ab27cdd9SOphir Munk * @param priv 2868ab27cdd9SOphir Munk * Pointer to device private data. 2869ab27cdd9SOphir Munk * @param mac_addr 2870ab27cdd9SOphir Munk * MAC address to modify into. 2871ab27cdd9SOphir Munk * @param iface_idx 2872ab27cdd9SOphir Munk * Net device interface index 2873ab27cdd9SOphir Munk * @param vf_index 2874ab27cdd9SOphir Munk * VF index 2875ab27cdd9SOphir Munk * 2876ab27cdd9SOphir Munk * @return 2877ab27cdd9SOphir Munk * 0 on success, a negative errno value otherwise 2878ab27cdd9SOphir Munk */ 2879ab27cdd9SOphir Munk int 2880ab27cdd9SOphir Munk mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2881ab27cdd9SOphir Munk unsigned int iface_idx, 2882ab27cdd9SOphir Munk struct rte_ether_addr *mac_addr, 2883ab27cdd9SOphir Munk int vf_index) 2884ab27cdd9SOphir Munk { 2885ab27cdd9SOphir Munk return mlx5_nl_vf_mac_addr_modify 2886ab27cdd9SOphir Munk (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2887ab27cdd9SOphir Munk } 2888ab27cdd9SOphir Munk 28894d18abd1SOphir Munk /** 28904d18abd1SOphir Munk * Set device promiscuous mode 28914d18abd1SOphir Munk * 28924d18abd1SOphir Munk * @param dev 28934d18abd1SOphir Munk * Pointer to Ethernet device structure. 28944d18abd1SOphir Munk * @param enable 28954d18abd1SOphir Munk * 0 - promiscuous is disabled, otherwise - enabled 28964d18abd1SOphir Munk * 28974d18abd1SOphir Munk * @return 28984d18abd1SOphir Munk * 0 on success, a negative error value otherwise 28994d18abd1SOphir Munk */ 29004d18abd1SOphir Munk int 29014d18abd1SOphir Munk mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 29024d18abd1SOphir Munk { 29034d18abd1SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 29044d18abd1SOphir Munk 29054d18abd1SOphir Munk return mlx5_nl_promisc(priv->nl_socket_route, 29064d18abd1SOphir Munk mlx5_ifindex(dev), !!enable); 29074d18abd1SOphir Munk } 29084d18abd1SOphir Munk 29094d18abd1SOphir Munk /** 29104d18abd1SOphir Munk * Set device promiscuous mode 29114d18abd1SOphir Munk * 29124d18abd1SOphir Munk * @param dev 29134d18abd1SOphir Munk * Pointer to Ethernet device structure. 29144d18abd1SOphir Munk * @param enable 29154d18abd1SOphir Munk * 0 - all multicase is disabled, otherwise - enabled 29164d18abd1SOphir Munk * 29174d18abd1SOphir Munk * @return 29184d18abd1SOphir Munk * 0 on success, a negative error value otherwise 29194d18abd1SOphir Munk */ 29204d18abd1SOphir Munk int 29214d18abd1SOphir Munk mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 29224d18abd1SOphir Munk { 29234d18abd1SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 29244d18abd1SOphir Munk 29254d18abd1SOphir Munk return mlx5_nl_allmulti(priv->nl_socket_route, 29264d18abd1SOphir Munk mlx5_ifindex(dev), !!enable); 29274d18abd1SOphir Munk } 29284d18abd1SOphir Munk 2929f00f6562SOphir Munk /** 2930f00f6562SOphir Munk * Flush device MAC addresses 2931f00f6562SOphir Munk * 2932f00f6562SOphir Munk * @param dev 2933f00f6562SOphir Munk * Pointer to Ethernet device structure. 2934f00f6562SOphir Munk * 2935f00f6562SOphir Munk */ 2936f00f6562SOphir Munk void 2937f00f6562SOphir Munk mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2938f00f6562SOphir Munk { 2939f00f6562SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2940f00f6562SOphir Munk 2941f00f6562SOphir Munk mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2942f00f6562SOphir Munk dev->data->mac_addrs, 2943f00f6562SOphir Munk MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2944f00f6562SOphir Munk } 2945