xref: /dpdk/drivers/net/mlx5/linux/mlx5_os.c (revision d84c3cf7662c6abca83df803aaa5136b73d3831d)
1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause
2f44b09f9SOphir Munk  * Copyright 2015 6WIND S.A.
3f44b09f9SOphir Munk  * Copyright 2020 Mellanox Technologies, Ltd
4f44b09f9SOphir Munk  */
5f44b09f9SOphir Munk 
6f44b09f9SOphir Munk #include <stddef.h>
7f44b09f9SOphir Munk #include <unistd.h>
8f44b09f9SOphir Munk #include <string.h>
9f44b09f9SOphir Munk #include <stdint.h>
10f44b09f9SOphir Munk #include <stdlib.h>
11f44b09f9SOphir Munk #include <errno.h>
12f44b09f9SOphir Munk #include <net/if.h>
13f44b09f9SOphir Munk #include <linux/rtnetlink.h>
1473bf9235SOphir Munk #include <linux/sockios.h>
1573bf9235SOphir Munk #include <linux/ethtool.h>
16f44b09f9SOphir Munk #include <fcntl.h>
17f44b09f9SOphir Munk 
18f44b09f9SOphir Munk #include <rte_malloc.h>
19df96fd0dSBruce Richardson #include <ethdev_driver.h>
20df96fd0dSBruce Richardson #include <ethdev_pci.h>
21f44b09f9SOphir Munk #include <rte_pci.h>
22f44b09f9SOphir Munk #include <rte_bus_pci.h>
23919488fbSXueming Li #include <rte_bus_auxiliary.h>
24f44b09f9SOphir Munk #include <rte_common.h>
25f44b09f9SOphir Munk #include <rte_kvargs.h>
26f44b09f9SOphir Munk #include <rte_rwlock.h>
27f44b09f9SOphir Munk #include <rte_spinlock.h>
28f44b09f9SOphir Munk #include <rte_string_fns.h>
29f44b09f9SOphir Munk #include <rte_alarm.h>
302aba9fc7SOphir Munk #include <rte_eal_paging.h>
31f44b09f9SOphir Munk 
32f44b09f9SOphir Munk #include <mlx5_glue.h>
33f44b09f9SOphir Munk #include <mlx5_devx_cmds.h>
34f44b09f9SOphir Munk #include <mlx5_common.h>
352eb4d010SOphir Munk #include <mlx5_common_mp.h>
36d5ed8aa9SOphir Munk #include <mlx5_common_mr.h>
375522da6bSSuanming Mou #include <mlx5_malloc.h>
38f44b09f9SOphir Munk 
39f44b09f9SOphir Munk #include "mlx5_defs.h"
40f44b09f9SOphir Munk #include "mlx5.h"
41391b8bccSOphir Munk #include "mlx5_common_os.h"
42f44b09f9SOphir Munk #include "mlx5_utils.h"
43f44b09f9SOphir Munk #include "mlx5_rxtx.h"
44151cbe3aSMichael Baum #include "mlx5_rx.h"
45377b69fbSMichael Baum #include "mlx5_tx.h"
46f44b09f9SOphir Munk #include "mlx5_autoconf.h"
47f44b09f9SOphir Munk #include "mlx5_flow.h"
48f44b09f9SOphir Munk #include "rte_pmd_mlx5.h"
494f96d913SOphir Munk #include "mlx5_verbs.h"
50f00f6562SOphir Munk #include "mlx5_nl.h"
516deb19e1SMichael Baum #include "mlx5_devx.h"
52f44b09f9SOphir Munk 
532eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW
542eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
552eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
562eb4d010SOphir Munk #endif
572eb4d010SOphir Munk 
582eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
592eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
602eb4d010SOphir Munk #endif
612eb4d010SOphir Munk 
622e86c4e5SOphir Munk static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
632e86c4e5SOphir Munk 
642e86c4e5SOphir Munk /* Spinlock for mlx5_shared_data allocation. */
652e86c4e5SOphir Munk static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
662e86c4e5SOphir Munk 
672e86c4e5SOphir Munk /* Process local data for secondary processes. */
682e86c4e5SOphir Munk static struct mlx5_local_data mlx5_local_data;
692e86c4e5SOphir Munk 
70b4edeaf3SSuanming Mou /* rte flow indexed pool configuration. */
71b4edeaf3SSuanming Mou static struct mlx5_indexed_pool_config icfg[] = {
72b4edeaf3SSuanming Mou 	{
73b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
74b4edeaf3SSuanming Mou 		.trunk_size = 64,
75b4edeaf3SSuanming Mou 		.need_lock = 1,
76b4edeaf3SSuanming Mou 		.release_mem_en = 0,
77b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
78b4edeaf3SSuanming Mou 		.free = mlx5_free,
79b4edeaf3SSuanming Mou 		.per_core_cache = 0,
80b4edeaf3SSuanming Mou 		.type = "ctl_flow_ipool",
81b4edeaf3SSuanming Mou 	},
82b4edeaf3SSuanming Mou 	{
83b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
84b4edeaf3SSuanming Mou 		.trunk_size = 64,
85b4edeaf3SSuanming Mou 		.grow_trunk = 3,
86b4edeaf3SSuanming Mou 		.grow_shift = 2,
87b4edeaf3SSuanming Mou 		.need_lock = 1,
88b4edeaf3SSuanming Mou 		.release_mem_en = 0,
89b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
90b4edeaf3SSuanming Mou 		.free = mlx5_free,
91b4edeaf3SSuanming Mou 		.per_core_cache = 1 << 14,
92b4edeaf3SSuanming Mou 		.type = "rte_flow_ipool",
93b4edeaf3SSuanming Mou 	},
94b4edeaf3SSuanming Mou 	{
95b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
96b4edeaf3SSuanming Mou 		.trunk_size = 64,
97b4edeaf3SSuanming Mou 		.grow_trunk = 3,
98b4edeaf3SSuanming Mou 		.grow_shift = 2,
99b4edeaf3SSuanming Mou 		.need_lock = 1,
100b4edeaf3SSuanming Mou 		.release_mem_en = 0,
101b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
102b4edeaf3SSuanming Mou 		.free = mlx5_free,
103b4edeaf3SSuanming Mou 		.per_core_cache = 0,
104b4edeaf3SSuanming Mou 		.type = "mcp_flow_ipool",
105b4edeaf3SSuanming Mou 	},
106b4edeaf3SSuanming Mou };
107b4edeaf3SSuanming Mou 
108f44b09f9SOphir Munk /**
10908d1838fSDekel Peled  * Set the completion channel file descriptor interrupt as non-blocking.
11008d1838fSDekel Peled  *
11108d1838fSDekel Peled  * @param[in] rxq_obj
11208d1838fSDekel Peled  *   Pointer to RQ channel object, which includes the channel fd
11308d1838fSDekel Peled  *
11408d1838fSDekel Peled  * @param[out] fd
1157be78d02SJosh Soref  *   The file descriptor (representing the interrupt) used in this channel.
11608d1838fSDekel Peled  *
11708d1838fSDekel Peled  * @return
11808d1838fSDekel Peled  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
11908d1838fSDekel Peled  */
12008d1838fSDekel Peled int
12108d1838fSDekel Peled mlx5_os_set_nonblock_channel_fd(int fd)
12208d1838fSDekel Peled {
12308d1838fSDekel Peled 	int flags;
12408d1838fSDekel Peled 
12508d1838fSDekel Peled 	flags = fcntl(fd, F_GETFL);
12608d1838fSDekel Peled 	return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
12708d1838fSDekel Peled }
12808d1838fSDekel Peled 
12908d1838fSDekel Peled /**
130e85f623eSOphir Munk  * Get mlx5 device attributes. The glue function query_device_ex() is called
131e85f623eSOphir Munk  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
132e85f623eSOphir Munk  * device attributes from the glue out parameter.
133e85f623eSOphir Munk  *
13491d1cfafSMichael Baum  * @param sh
13591d1cfafSMichael Baum  *   Pointer to shared device context.
136e85f623eSOphir Munk  *
137e85f623eSOphir Munk  * @return
1386be4c57aSMichael Baum  *   0 on success, a negative errno value otherwise and rte_errno is set.
139e85f623eSOphir Munk  */
140e85f623eSOphir Munk int
14191d1cfafSMichael Baum mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
142e85f623eSOphir Munk {
143e85f623eSOphir Munk 	int err;
14487af0d1eSMichael Baum 	struct mlx5_common_device *cdev = sh->cdev;
14587af0d1eSMichael Baum 	struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
14691d1cfafSMichael Baum 	struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
14791d1cfafSMichael Baum 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
148fe46b20cSMichael Baum 
14987af0d1eSMichael Baum 	err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
1506be4c57aSMichael Baum 	if (err) {
1516be4c57aSMichael Baum 		rte_errno = errno;
1526be4c57aSMichael Baum 		return -rte_errno;
1536be4c57aSMichael Baum 	}
1548f464810SMichael Baum #ifdef HAVE_IBV_MLX5_MOD_SWP
1558f464810SMichael Baum 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1568f464810SMichael Baum #endif
1578f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1588f464810SMichael Baum 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1598f464810SMichael Baum #endif
1608f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1618f464810SMichael Baum 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1628f464810SMichael Baum #endif
16387af0d1eSMichael Baum 	err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
1646be4c57aSMichael Baum 	if (err) {
1656be4c57aSMichael Baum 		rte_errno = errno;
1666be4c57aSMichael Baum 		return -rte_errno;
1676be4c57aSMichael Baum 	}
16891d1cfafSMichael Baum 	memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
16987af0d1eSMichael Baum 	if (mlx5_dev_is_pci(cdev->dev))
17087af0d1eSMichael Baum 		sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));
17187af0d1eSMichael Baum 	else
17287af0d1eSMichael Baum 		sh->dev_cap.sf = 1;
17391d1cfafSMichael Baum 	sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
17491d1cfafSMichael Baum 	sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
17591d1cfafSMichael Baum 	sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
17691d1cfafSMichael Baum 	sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
17787af0d1eSMichael Baum #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
17887af0d1eSMichael Baum 	sh->dev_cap.dest_tir = 1;
17987af0d1eSMichael Baum #endif
18087af0d1eSMichael Baum #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
18187af0d1eSMichael Baum 	DRV_LOG(DEBUG, "DV flow is supported.");
18287af0d1eSMichael Baum 	sh->dev_cap.dv_flow_en = 1;
18387af0d1eSMichael Baum #endif
18487af0d1eSMichael Baum #ifdef HAVE_MLX5DV_DR_ESWITCH
18587af0d1eSMichael Baum 	if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
18687af0d1eSMichael Baum 		sh->dev_cap.dv_esw_en = 1;
18787af0d1eSMichael Baum #endif
18887af0d1eSMichael Baum 	/*
18987af0d1eSMichael Baum 	 * Multi-packet send is supported by ConnectX-4 Lx PF as well
19087af0d1eSMichael Baum 	 * as all ConnectX-5 devices.
19187af0d1eSMichael Baum 	 */
19287af0d1eSMichael Baum 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
19387af0d1eSMichael Baum 		if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
19487af0d1eSMichael Baum 			DRV_LOG(DEBUG, "Enhanced MPW is supported.");
19587af0d1eSMichael Baum 			sh->dev_cap.mps = MLX5_MPW_ENHANCED;
19687af0d1eSMichael Baum 		} else {
19787af0d1eSMichael Baum 			DRV_LOG(DEBUG, "MPW is supported.");
19887af0d1eSMichael Baum 			sh->dev_cap.mps = MLX5_MPW;
19987af0d1eSMichael Baum 		}
20087af0d1eSMichael Baum 	} else {
20187af0d1eSMichael Baum 		DRV_LOG(DEBUG, "MPW isn't supported.");
20287af0d1eSMichael Baum 		sh->dev_cap.mps = MLX5_MPW_DISABLED;
20387af0d1eSMichael Baum 	}
20487af0d1eSMichael Baum #if (RTE_CACHE_LINE_SIZE == 128)
20587af0d1eSMichael Baum 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
20687af0d1eSMichael Baum 		sh->dev_cap.cqe_comp = 1;
20787af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
20887af0d1eSMichael Baum 		sh->dev_cap.cqe_comp ? "" : "not ");
20987af0d1eSMichael Baum #else
21087af0d1eSMichael Baum 	sh->dev_cap.cqe_comp = 1;
21187af0d1eSMichael Baum #endif
21287af0d1eSMichael Baum #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
21387af0d1eSMichael Baum 	sh->dev_cap.mpls_en =
21487af0d1eSMichael Baum 		((dv_attr.tunnel_offloads_caps &
21587af0d1eSMichael Baum 		  MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
21687af0d1eSMichael Baum 		 (dv_attr.tunnel_offloads_caps &
21787af0d1eSMichael Baum 		  MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
21887af0d1eSMichael Baum 	DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
21987af0d1eSMichael Baum 		sh->dev_cap.mpls_en ? "" : "not ");
22087af0d1eSMichael Baum #else
22187af0d1eSMichael Baum 	DRV_LOG(WARNING,
22287af0d1eSMichael Baum 		"MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
22387af0d1eSMichael Baum #endif
22487af0d1eSMichael Baum #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
22587af0d1eSMichael Baum 	sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
22687af0d1eSMichael Baum #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
22787af0d1eSMichael Baum 	sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
22887af0d1eSMichael Baum 				    IBV_DEVICE_PCI_WRITE_END_PADDING);
22987af0d1eSMichael Baum #endif
23087af0d1eSMichael Baum 	sh->dev_cap.hw_csum =
23187af0d1eSMichael Baum 		!!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
23287af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
23387af0d1eSMichael Baum 		sh->dev_cap.hw_csum ? "" : "not ");
23487af0d1eSMichael Baum 	sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
23587af0d1eSMichael Baum 				       IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
23687af0d1eSMichael Baum 	DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
23787af0d1eSMichael Baum 		(sh->dev_cap.hw_vlan_strip ? "" : "not "));
23887af0d1eSMichael Baum 	sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
23987af0d1eSMichael Baum 				      IBV_RAW_PACKET_CAP_SCATTER_FCS);
24087af0d1eSMichael Baum #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
24187af0d1eSMichael Baum 	!defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
24287af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Counters are not supported.");
24387af0d1eSMichael Baum #endif
24487af0d1eSMichael Baum 	/*
24587af0d1eSMichael Baum 	 * DPDK doesn't support larger/variable indirection tables.
24687af0d1eSMichael Baum 	 * Once DPDK supports it, take max size from device attr.
24787af0d1eSMichael Baum 	 */
24887af0d1eSMichael Baum 	sh->dev_cap.ind_table_max_size =
24987af0d1eSMichael Baum 			RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
25087af0d1eSMichael Baum 				(unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
25187af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
25287af0d1eSMichael Baum 		sh->dev_cap.ind_table_max_size);
25387af0d1eSMichael Baum 	sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
25487af0d1eSMichael Baum 			   (attr_ex.tso_caps.supported_qpts &
25587af0d1eSMichael Baum 			    (1 << IBV_QPT_RAW_PACKET)));
25687af0d1eSMichael Baum 	if (sh->dev_cap.tso)
25787af0d1eSMichael Baum 		sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
25891d1cfafSMichael Baum 	strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
25991d1cfafSMichael Baum 		sizeof(sh->dev_cap.fw_ver));
260e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
26187af0d1eSMichael Baum 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
26287af0d1eSMichael Baum 		sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
26387af0d1eSMichael Baum 				  (MLX5_SW_PARSING_CAP |
26487af0d1eSMichael Baum 				   MLX5_SW_PARSING_CSUM_CAP |
26587af0d1eSMichael Baum 				   MLX5_SW_PARSING_TSO_CAP);
26687af0d1eSMichael Baum 	DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
267e85f623eSOphir Munk #endif
2688f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
26987af0d1eSMichael Baum 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
27087af0d1eSMichael Baum 		struct mlx5dv_striding_rq_caps *strd_rq_caps =
27187af0d1eSMichael Baum 				&dv_attr.striding_rq_caps;
27287af0d1eSMichael Baum 
27387af0d1eSMichael Baum 		sh->dev_cap.mprq.enabled = 1;
27487af0d1eSMichael Baum 		sh->dev_cap.mprq.log_min_stride_size =
27587af0d1eSMichael Baum 			strd_rq_caps->min_single_stride_log_num_of_bytes;
27687af0d1eSMichael Baum 		sh->dev_cap.mprq.log_max_stride_size =
27787af0d1eSMichael Baum 			strd_rq_caps->max_single_stride_log_num_of_bytes;
27887af0d1eSMichael Baum 		sh->dev_cap.mprq.log_min_stride_num =
27987af0d1eSMichael Baum 			strd_rq_caps->min_single_wqe_log_num_of_strides;
28087af0d1eSMichael Baum 		sh->dev_cap.mprq.log_max_stride_num =
28187af0d1eSMichael Baum 			strd_rq_caps->max_single_wqe_log_num_of_strides;
28287af0d1eSMichael Baum 		sh->dev_cap.mprq.log_min_stride_wqe_size =
28387af0d1eSMichael Baum 					cdev->config.devx ?
28487af0d1eSMichael Baum 					hca_attr->log_min_stride_wqe_sz :
28587af0d1eSMichael Baum 					MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
28687af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
28787af0d1eSMichael Baum 			sh->dev_cap.mprq.log_min_stride_size);
28887af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
28987af0d1eSMichael Baum 			sh->dev_cap.mprq.log_max_stride_size);
29087af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
29187af0d1eSMichael Baum 			sh->dev_cap.mprq.log_min_stride_num);
29287af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
29387af0d1eSMichael Baum 			sh->dev_cap.mprq.log_max_stride_num);
29487af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
29587af0d1eSMichael Baum 			sh->dev_cap.mprq.log_min_stride_wqe_size);
29687af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tsupported_qpts: %d",
29787af0d1eSMichael Baum 			strd_rq_caps->supported_qpts);
29887af0d1eSMichael Baum 		DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
29987af0d1eSMichael Baum 	}
3008f464810SMichael Baum #endif
301e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
30287af0d1eSMichael Baum 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
30387af0d1eSMichael Baum 		sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
30487af0d1eSMichael Baum 					(MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
30587af0d1eSMichael Baum 					 MLX5_TUNNELED_OFFLOADS_GRE_CAP |
30687af0d1eSMichael Baum 					 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
30787af0d1eSMichael Baum 	}
30887af0d1eSMichael Baum 	if (sh->dev_cap.tunnel_en) {
30987af0d1eSMichael Baum 		DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
31087af0d1eSMichael Baum 			sh->dev_cap.tunnel_en &
31187af0d1eSMichael Baum 			MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
31287af0d1eSMichael Baum 			sh->dev_cap.tunnel_en &
31387af0d1eSMichael Baum 			MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
31487af0d1eSMichael Baum 			sh->dev_cap.tunnel_en &
31587af0d1eSMichael Baum 			MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
31687af0d1eSMichael Baum 	} else {
31787af0d1eSMichael Baum 		DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
31887af0d1eSMichael Baum 	}
31987af0d1eSMichael Baum #else
32087af0d1eSMichael Baum 	DRV_LOG(WARNING,
32187af0d1eSMichael Baum 		"Tunnel offloading disabled due to old OFED/rdma-core version");
322e85f623eSOphir Munk #endif
32387af0d1eSMichael Baum 	if (!sh->cdev->config.devx)
32487af0d1eSMichael Baum 		return 0;
32587af0d1eSMichael Baum 	/* Check capabilities for Packet Pacing. */
32687af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
32787af0d1eSMichael Baum 		hca_attr->dev_freq_khz);
32887af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
32987af0d1eSMichael Baum 		hca_attr->qos.packet_pacing ? "" : "not ");
33087af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
33187af0d1eSMichael Baum 		hca_attr->cross_channel ? "" : "not ");
33287af0d1eSMichael Baum 	DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
33387af0d1eSMichael Baum 		hca_attr->wqe_index_ignore ? "" : "not ");
33487af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
33587af0d1eSMichael Baum 		hca_attr->non_wire_sq ? "" : "not ");
33687af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
33787af0d1eSMichael Baum 		hca_attr->log_max_static_sq_wq ? "" : "not ",
33887af0d1eSMichael Baum 		hca_attr->log_max_static_sq_wq);
33987af0d1eSMichael Baum 	DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
34087af0d1eSMichael Baum 		hca_attr->qos.wqe_rate_pp ? "" : "not ");
34187af0d1eSMichael Baum 	sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
34287af0d1eSMichael Baum 	if (!hca_attr->cross_channel) {
34387af0d1eSMichael Baum 		DRV_LOG(DEBUG,
34487af0d1eSMichael Baum 			"Cross channel operations are required for packet pacing.");
34587af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
34687af0d1eSMichael Baum 	}
34787af0d1eSMichael Baum 	if (!hca_attr->wqe_index_ignore) {
34887af0d1eSMichael Baum 		DRV_LOG(DEBUG,
34987af0d1eSMichael Baum 			"WQE index ignore feature is required for packet pacing.");
35087af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
35187af0d1eSMichael Baum 	}
35287af0d1eSMichael Baum 	if (!hca_attr->non_wire_sq) {
35387af0d1eSMichael Baum 		DRV_LOG(DEBUG,
35487af0d1eSMichael Baum 			"Non-wire SQ feature is required for packet pacing.");
35587af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
35687af0d1eSMichael Baum 	}
35787af0d1eSMichael Baum 	if (!hca_attr->log_max_static_sq_wq) {
35887af0d1eSMichael Baum 		DRV_LOG(DEBUG,
35987af0d1eSMichael Baum 			"Static WQE SQ feature is required for packet pacing.");
36087af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
36187af0d1eSMichael Baum 	}
36287af0d1eSMichael Baum 	if (!hca_attr->qos.wqe_rate_pp) {
36387af0d1eSMichael Baum 		DRV_LOG(DEBUG,
36487af0d1eSMichael Baum 			"WQE rate mode is required for packet pacing.");
36587af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
36687af0d1eSMichael Baum 	}
36787af0d1eSMichael Baum #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
36887af0d1eSMichael Baum 	DRV_LOG(DEBUG,
36987af0d1eSMichael Baum 		"DevX does not provide UAR offset, can't create queues for packet pacing.");
37087af0d1eSMichael Baum 	sh->dev_cap.txpp_en = 0;
37187af0d1eSMichael Baum #endif
37287af0d1eSMichael Baum 	/* Check for LRO support. */
373c4b86201SMichael Baum 	if (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) {
37487af0d1eSMichael Baum 		/* TBD check tunnel lro caps. */
37587af0d1eSMichael Baum 		sh->dev_cap.lro_supported = 1;
37687af0d1eSMichael Baum 		DRV_LOG(DEBUG, "Device supports LRO.");
37787af0d1eSMichael Baum 		DRV_LOG(DEBUG,
37887af0d1eSMichael Baum 			"LRO minimal size of TCP segment required for coalescing is %d bytes.",
37987af0d1eSMichael Baum 			hca_attr->lro_min_mss_size);
38087af0d1eSMichael Baum 	}
38187af0d1eSMichael Baum 	sh->dev_cap.scatter_fcs_w_decap_disable =
38287af0d1eSMichael Baum 					hca_attr->scatter_fcs_w_decap_disable;
38387af0d1eSMichael Baum 	sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
38487af0d1eSMichael Baum 	mlx5_rt_timestamp_config(sh, hca_attr);
3856be4c57aSMichael Baum 	return 0;
386e85f623eSOphir Munk }
3872eb4d010SOphir Munk 
3882eb4d010SOphir Munk /**
389630a587bSRongwei Liu  * Detect misc5 support or not
390630a587bSRongwei Liu  *
391630a587bSRongwei Liu  * @param[in] priv
392630a587bSRongwei Liu  *   Device private data pointer
393630a587bSRongwei Liu  */
394630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR
395630a587bSRongwei Liu static void
396630a587bSRongwei Liu __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
397630a587bSRongwei Liu {
398630a587bSRongwei Liu #ifdef HAVE_IBV_FLOW_DV_SUPPORT
399630a587bSRongwei Liu 	/* Dummy VxLAN matcher to detect rdma-core misc5 cap
400630a587bSRongwei Liu 	 * Case: IPv4--->UDP--->VxLAN--->vni
401630a587bSRongwei Liu 	 */
402630a587bSRongwei Liu 	void *tbl;
403630a587bSRongwei Liu 	struct mlx5_flow_dv_match_params matcher_mask;
404630a587bSRongwei Liu 	void *match_m;
405630a587bSRongwei Liu 	void *matcher;
406630a587bSRongwei Liu 	void *headers_m;
407630a587bSRongwei Liu 	void *misc5_m;
408630a587bSRongwei Liu 	uint32_t *tunnel_header_m;
409630a587bSRongwei Liu 	struct mlx5dv_flow_matcher_attr dv_attr;
410630a587bSRongwei Liu 
411630a587bSRongwei Liu 	memset(&matcher_mask, 0, sizeof(matcher_mask));
412630a587bSRongwei Liu 	matcher_mask.size = sizeof(matcher_mask.buf);
413630a587bSRongwei Liu 	match_m = matcher_mask.buf;
414630a587bSRongwei Liu 	headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
415630a587bSRongwei Liu 	misc5_m = MLX5_ADDR_OF(fte_match_param,
416630a587bSRongwei Liu 			       match_m, misc_parameters_5);
417630a587bSRongwei Liu 	tunnel_header_m = (uint32_t *)
418630a587bSRongwei Liu 				MLX5_ADDR_OF(fte_match_set_misc5,
419630a587bSRongwei Liu 				misc5_m, tunnel_header_1);
420630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
421630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
422630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
423630a587bSRongwei Liu 	*tunnel_header_m = 0xffffff;
424630a587bSRongwei Liu 
425630a587bSRongwei Liu 	tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
426630a587bSRongwei Liu 	if (!tbl) {
427630a587bSRongwei Liu 		DRV_LOG(INFO, "No SW steering support");
428630a587bSRongwei Liu 		return;
429630a587bSRongwei Liu 	}
430630a587bSRongwei Liu 	dv_attr.type = IBV_FLOW_ATTR_NORMAL,
431630a587bSRongwei Liu 	dv_attr.match_mask = (void *)&matcher_mask,
432630a587bSRongwei Liu 	dv_attr.match_criteria_enable =
433630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
434630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
435630a587bSRongwei Liu 	dv_attr.priority = 3;
436630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR_ESWITCH
437630a587bSRongwei Liu 	void *misc2_m;
438a13ec19cSMichael Baum 	if (priv->sh->config.dv_esw_en) {
439630a587bSRongwei Liu 		/* FDB enabled reg_c_0 */
440630a587bSRongwei Liu 		dv_attr.match_criteria_enable |=
441630a587bSRongwei Liu 				(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
442630a587bSRongwei Liu 		misc2_m = MLX5_ADDR_OF(fte_match_param,
443630a587bSRongwei Liu 				       match_m, misc_parameters_2);
444630a587bSRongwei Liu 		MLX5_SET(fte_match_set_misc2, misc2_m,
445630a587bSRongwei Liu 			 metadata_reg_c_0, 0xffff);
446630a587bSRongwei Liu 	}
447630a587bSRongwei Liu #endif
448ca1418ceSMichael Baum 	matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
449630a587bSRongwei Liu 						    &dv_attr, tbl);
450630a587bSRongwei Liu 	if (matcher) {
451630a587bSRongwei Liu 		priv->sh->misc5_cap = 1;
452630a587bSRongwei Liu 		mlx5_glue->dv_destroy_flow_matcher(matcher);
453630a587bSRongwei Liu 	}
454630a587bSRongwei Liu 	mlx5_glue->dr_destroy_flow_tbl(tbl);
455630a587bSRongwei Liu #else
456630a587bSRongwei Liu 	RTE_SET_USED(priv);
457630a587bSRongwei Liu #endif
458630a587bSRongwei Liu }
459630a587bSRongwei Liu #endif
460630a587bSRongwei Liu 
461630a587bSRongwei Liu /**
4622eb4d010SOphir Munk  * Initialize DR related data within private structure.
4632eb4d010SOphir Munk  * Routine checks the reference counter and does actual
4642eb4d010SOphir Munk  * resources creation/initialization only if counter is zero.
4652eb4d010SOphir Munk  *
4662eb4d010SOphir Munk  * @param[in] priv
4672eb4d010SOphir Munk  *   Pointer to the private device data structure.
4682eb4d010SOphir Munk  *
4692eb4d010SOphir Munk  * @return
4702eb4d010SOphir Munk  *   Zero on success, positive error code otherwise.
4712eb4d010SOphir Munk  */
4722eb4d010SOphir Munk static int
4732eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv)
4742eb4d010SOphir Munk {
4752eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = priv->sh;
476961b6774SMatan Azrad 	char s[MLX5_NAME_SIZE] __rte_unused;
47716dbba25SXueming Li 	int err;
4782eb4d010SOphir Munk 
47916dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
48016dbba25SXueming Li 	if (sh->refcnt > 1)
48116dbba25SXueming Li 		return 0;
4822eb4d010SOphir Munk 	err = mlx5_alloc_table_hash_list(priv);
4832eb4d010SOphir Munk 	if (err)
484291140c6SSuanming Mou 		goto error;
485*d84c3cf7SSuanming Mou 	if (priv->sh->config.dv_flow_en == 2)
486*d84c3cf7SSuanming Mou 		return 0;
487291140c6SSuanming Mou 	/* The resources below are only valid with DV support. */
488291140c6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT
489491b7137SMatan Azrad 	/* Init port id action list. */
490e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
491d03b7860SSuanming Mou 	sh->port_id_action_list = mlx5_list_create(s, sh, true,
4920fd5f82aSXueming Li 						   flow_dv_port_id_create_cb,
4930fd5f82aSXueming Li 						   flow_dv_port_id_match_cb,
494491b7137SMatan Azrad 						   flow_dv_port_id_remove_cb,
495491b7137SMatan Azrad 						   flow_dv_port_id_clone_cb,
496491b7137SMatan Azrad 						 flow_dv_port_id_clone_free_cb);
497679f46c7SMatan Azrad 	if (!sh->port_id_action_list)
498679f46c7SMatan Azrad 		goto error;
499491b7137SMatan Azrad 	/* Init push vlan action list. */
500e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
501d03b7860SSuanming Mou 	sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
5023422af2aSXueming Li 						    flow_dv_push_vlan_create_cb,
5033422af2aSXueming Li 						    flow_dv_push_vlan_match_cb,
504491b7137SMatan Azrad 						    flow_dv_push_vlan_remove_cb,
505491b7137SMatan Azrad 						    flow_dv_push_vlan_clone_cb,
506491b7137SMatan Azrad 					       flow_dv_push_vlan_clone_free_cb);
507679f46c7SMatan Azrad 	if (!sh->push_vlan_action_list)
508679f46c7SMatan Azrad 		goto error;
509491b7137SMatan Azrad 	/* Init sample action list. */
510e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
511d03b7860SSuanming Mou 	sh->sample_action_list = mlx5_list_create(s, sh, true,
51219784141SSuanming Mou 						  flow_dv_sample_create_cb,
51319784141SSuanming Mou 						  flow_dv_sample_match_cb,
514491b7137SMatan Azrad 						  flow_dv_sample_remove_cb,
515491b7137SMatan Azrad 						  flow_dv_sample_clone_cb,
516491b7137SMatan Azrad 						  flow_dv_sample_clone_free_cb);
517679f46c7SMatan Azrad 	if (!sh->sample_action_list)
518679f46c7SMatan Azrad 		goto error;
519491b7137SMatan Azrad 	/* Init dest array action list. */
520e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
521d03b7860SSuanming Mou 	sh->dest_array_list = mlx5_list_create(s, sh, true,
52219784141SSuanming Mou 					       flow_dv_dest_array_create_cb,
52319784141SSuanming Mou 					       flow_dv_dest_array_match_cb,
524491b7137SMatan Azrad 					       flow_dv_dest_array_remove_cb,
525491b7137SMatan Azrad 					       flow_dv_dest_array_clone_cb,
526491b7137SMatan Azrad 					      flow_dv_dest_array_clone_free_cb);
527679f46c7SMatan Azrad 	if (!sh->dest_array_list)
528679f46c7SMatan Azrad 		goto error;
5299086ac09SGregory Etelson 	/* Init shared flex parsers list, no need lcore_share */
5309086ac09SGregory Etelson 	snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
5319086ac09SGregory Etelson 	sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
5329086ac09SGregory Etelson 					       mlx5_flex_parser_create_cb,
5339086ac09SGregory Etelson 					       mlx5_flex_parser_match_cb,
5349086ac09SGregory Etelson 					       mlx5_flex_parser_remove_cb,
5359086ac09SGregory Etelson 					       mlx5_flex_parser_clone_cb,
5369086ac09SGregory Etelson 					       mlx5_flex_parser_clone_free_cb);
5379086ac09SGregory Etelson 	if (!sh->flex_parsers_dv)
5389086ac09SGregory Etelson 		goto error;
539291140c6SSuanming Mou #endif
5402eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
5412eb4d010SOphir Munk 	void *domain;
5422eb4d010SOphir Munk 
5432eb4d010SOphir Munk 	/* Reference counter is zero, we should initialize structures. */
544ca1418ceSMichael Baum 	domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
5452eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
5462eb4d010SOphir Munk 	if (!domain) {
5472eb4d010SOphir Munk 		DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
5482eb4d010SOphir Munk 		err = errno;
5492eb4d010SOphir Munk 		goto error;
5502eb4d010SOphir Munk 	}
5512eb4d010SOphir Munk 	sh->rx_domain = domain;
552ca1418ceSMichael Baum 	domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
5532eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
5542eb4d010SOphir Munk 	if (!domain) {
5552eb4d010SOphir Munk 		DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
5562eb4d010SOphir Munk 		err = errno;
5572eb4d010SOphir Munk 		goto error;
5582eb4d010SOphir Munk 	}
5592eb4d010SOphir Munk 	sh->tx_domain = domain;
5602eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
561a13ec19cSMichael Baum 	if (sh->config.dv_esw_en) {
562ca1418ceSMichael Baum 		domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
563ca1418ceSMichael Baum 						     MLX5DV_DR_DOMAIN_TYPE_FDB);
5642eb4d010SOphir Munk 		if (!domain) {
5652eb4d010SOphir Munk 			DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
5662eb4d010SOphir Munk 			err = errno;
5672eb4d010SOphir Munk 			goto error;
5682eb4d010SOphir Munk 		}
5692eb4d010SOphir Munk 		sh->fdb_domain = domain;
570da845ae9SViacheslav Ovsiienko 	}
571da845ae9SViacheslav Ovsiienko 	/*
572da845ae9SViacheslav Ovsiienko 	 * The drop action is just some dummy placeholder in rdma-core. It
573da845ae9SViacheslav Ovsiienko 	 * does not belong to domains and has no any attributes, and, can be
574da845ae9SViacheslav Ovsiienko 	 * shared by the entire device.
575da845ae9SViacheslav Ovsiienko 	 */
576da845ae9SViacheslav Ovsiienko 	sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
577da845ae9SViacheslav Ovsiienko 	if (!sh->dr_drop_action) {
578da845ae9SViacheslav Ovsiienko 		DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
579da845ae9SViacheslav Ovsiienko 		err = errno;
580da845ae9SViacheslav Ovsiienko 		goto error;
5812eb4d010SOphir Munk 	}
5822eb4d010SOphir Munk #endif
583a13ec19cSMichael Baum 	if (!sh->tunnel_hub && sh->config.dv_miss_info)
5844ec6360dSGregory Etelson 		err = mlx5_alloc_tunnel_hub(sh);
5854ec6360dSGregory Etelson 	if (err) {
5864ec6360dSGregory Etelson 		DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
5874ec6360dSGregory Etelson 		goto error;
5884ec6360dSGregory Etelson 	}
589a13ec19cSMichael Baum 	if (sh->config.reclaim_mode == MLX5_RCM_AGGR) {
5902eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
5912eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
5922eb4d010SOphir Munk 		if (sh->fdb_domain)
5932eb4d010SOphir Munk 			mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
5942eb4d010SOphir Munk 	}
5952eb4d010SOphir Munk 	sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
596a13ec19cSMichael Baum 	if (!sh->config.allow_duplicate_pattern) {
597e39226bdSJiawei Wang #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
598e39226bdSJiawei Wang 		DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
599e39226bdSJiawei Wang #endif
600e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
601e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
602e39226bdSJiawei Wang 		if (sh->fdb_domain)
603e39226bdSJiawei Wang 			mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
604e39226bdSJiawei Wang 	}
605630a587bSRongwei Liu 
606630a587bSRongwei Liu 	__mlx5_discovery_misc5_cap(priv);
6072eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
608b80726dcSSuanming Mou 	sh->default_miss_action =
609b80726dcSSuanming Mou 			mlx5_glue->dr_create_flow_action_default_miss();
610b80726dcSSuanming Mou 	if (!sh->default_miss_action)
611b80726dcSSuanming Mou 		DRV_LOG(WARNING, "Default miss action is not supported.");
61209c25553SXueming Li 	LIST_INIT(&sh->shared_rxqs);
6132eb4d010SOphir Munk 	return 0;
6142eb4d010SOphir Munk error:
6152eb4d010SOphir Munk 	/* Rollback the created objects. */
6162eb4d010SOphir Munk 	if (sh->rx_domain) {
6172eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
6182eb4d010SOphir Munk 		sh->rx_domain = NULL;
6192eb4d010SOphir Munk 	}
6202eb4d010SOphir Munk 	if (sh->tx_domain) {
6212eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
6222eb4d010SOphir Munk 		sh->tx_domain = NULL;
6232eb4d010SOphir Munk 	}
6242eb4d010SOphir Munk 	if (sh->fdb_domain) {
6252eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
6262eb4d010SOphir Munk 		sh->fdb_domain = NULL;
6272eb4d010SOphir Munk 	}
628da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
629da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
630da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
6312eb4d010SOphir Munk 	}
6322eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
6332eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
6342eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
6352eb4d010SOphir Munk 	}
636bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
637e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
638bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
639bf615b07SSuanming Mou 	}
6403fe88961SSuanming Mou 	if (sh->modify_cmds) {
641e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
6423fe88961SSuanming Mou 		sh->modify_cmds = NULL;
6433fe88961SSuanming Mou 	}
6442eb4d010SOphir Munk 	if (sh->tag_table) {
6452eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
646e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
6472eb4d010SOphir Munk 		sh->tag_table = NULL;
6482eb4d010SOphir Munk 	}
6494ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
6504ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
6514ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
6524ec6360dSGregory Etelson 	}
6532eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
654679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
655679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
656679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
657679f46c7SMatan Azrad 	}
658679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
659679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
660679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
661679f46c7SMatan Azrad 	}
662679f46c7SMatan Azrad 	if (sh->sample_action_list) {
663679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
664679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
665679f46c7SMatan Azrad 	}
666679f46c7SMatan Azrad 	if (sh->dest_array_list) {
667679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
668679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
669679f46c7SMatan Azrad 	}
6702eb4d010SOphir Munk 	return err;
6712eb4d010SOphir Munk }
6722eb4d010SOphir Munk 
6732eb4d010SOphir Munk /**
6742eb4d010SOphir Munk  * Destroy DR related data within private structure.
6752eb4d010SOphir Munk  *
6762eb4d010SOphir Munk  * @param[in] priv
6772eb4d010SOphir Munk  *   Pointer to the private device data structure.
6782eb4d010SOphir Munk  */
6792eb4d010SOphir Munk void
6802eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv)
6812eb4d010SOphir Munk {
68216dbba25SXueming Li 	struct mlx5_dev_ctx_shared *sh = priv->sh;
6832eb4d010SOphir Munk 
68416dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
68516dbba25SXueming Li 	if (sh->refcnt > 1)
6862eb4d010SOphir Munk 		return;
68709c25553SXueming Li 	MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
6882eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
6892eb4d010SOphir Munk 	if (sh->rx_domain) {
6902eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
6912eb4d010SOphir Munk 		sh->rx_domain = NULL;
6922eb4d010SOphir Munk 	}
6932eb4d010SOphir Munk 	if (sh->tx_domain) {
6942eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
6952eb4d010SOphir Munk 		sh->tx_domain = NULL;
6962eb4d010SOphir Munk 	}
6972eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
6982eb4d010SOphir Munk 	if (sh->fdb_domain) {
6992eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
7002eb4d010SOphir Munk 		sh->fdb_domain = NULL;
7012eb4d010SOphir Munk 	}
702da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
703da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
704da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
7052eb4d010SOphir Munk 	}
7062eb4d010SOphir Munk #endif
7072eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
7082eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
7092eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
7102eb4d010SOphir Munk 	}
7112eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
712b80726dcSSuanming Mou 	if (sh->default_miss_action)
713b80726dcSSuanming Mou 		mlx5_glue->destroy_flow_action
714b80726dcSSuanming Mou 				(sh->default_miss_action);
715bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
716e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
717bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
718bf615b07SSuanming Mou 	}
7193fe88961SSuanming Mou 	if (sh->modify_cmds) {
720e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
7213fe88961SSuanming Mou 		sh->modify_cmds = NULL;
7223fe88961SSuanming Mou 	}
7232eb4d010SOphir Munk 	if (sh->tag_table) {
7242eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
725e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
7262eb4d010SOphir Munk 		sh->tag_table = NULL;
7272eb4d010SOphir Munk 	}
7284ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
7294ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
7304ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
7314ec6360dSGregory Etelson 	}
7322eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
733679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
734679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
735679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
736679f46c7SMatan Azrad 	}
737679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
738679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
739679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
740679f46c7SMatan Azrad 	}
741679f46c7SMatan Azrad 	if (sh->sample_action_list) {
742679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
743679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
744679f46c7SMatan Azrad 	}
745679f46c7SMatan Azrad 	if (sh->dest_array_list) {
746679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
747679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
748679f46c7SMatan Azrad 	}
7492eb4d010SOphir Munk }
7502eb4d010SOphir Munk 
7512eb4d010SOphir Munk /**
7522e86c4e5SOphir Munk  * Initialize shared data between primary and secondary process.
7532e86c4e5SOphir Munk  *
7542e86c4e5SOphir Munk  * A memzone is reserved by primary process and secondary processes attach to
7552e86c4e5SOphir Munk  * the memzone.
7562e86c4e5SOphir Munk  *
7572e86c4e5SOphir Munk  * @return
7582e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
7592e86c4e5SOphir Munk  */
7602e86c4e5SOphir Munk static int
7612e86c4e5SOphir Munk mlx5_init_shared_data(void)
7622e86c4e5SOphir Munk {
7632e86c4e5SOphir Munk 	const struct rte_memzone *mz;
7642e86c4e5SOphir Munk 	int ret = 0;
7652e86c4e5SOphir Munk 
7662e86c4e5SOphir Munk 	rte_spinlock_lock(&mlx5_shared_data_lock);
7672e86c4e5SOphir Munk 	if (mlx5_shared_data == NULL) {
7682e86c4e5SOphir Munk 		if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
7692e86c4e5SOphir Munk 			/* Allocate shared memory. */
7702e86c4e5SOphir Munk 			mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
7712e86c4e5SOphir Munk 						 sizeof(*mlx5_shared_data),
7722e86c4e5SOphir Munk 						 SOCKET_ID_ANY, 0);
7732e86c4e5SOphir Munk 			if (mz == NULL) {
7742e86c4e5SOphir Munk 				DRV_LOG(ERR,
7752e86c4e5SOphir Munk 					"Cannot allocate mlx5 shared data");
7762e86c4e5SOphir Munk 				ret = -rte_errno;
7772e86c4e5SOphir Munk 				goto error;
7782e86c4e5SOphir Munk 			}
7792e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
7802e86c4e5SOphir Munk 			memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
7812e86c4e5SOphir Munk 			rte_spinlock_init(&mlx5_shared_data->lock);
7822e86c4e5SOphir Munk 		} else {
7832e86c4e5SOphir Munk 			/* Lookup allocated shared memory. */
7842e86c4e5SOphir Munk 			mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
7852e86c4e5SOphir Munk 			if (mz == NULL) {
7862e86c4e5SOphir Munk 				DRV_LOG(ERR,
7872e86c4e5SOphir Munk 					"Cannot attach mlx5 shared data");
7882e86c4e5SOphir Munk 				ret = -rte_errno;
7892e86c4e5SOphir Munk 				goto error;
7902e86c4e5SOphir Munk 			}
7912e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
7922e86c4e5SOphir Munk 			memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
7932e86c4e5SOphir Munk 		}
7942e86c4e5SOphir Munk 	}
7952e86c4e5SOphir Munk error:
7962e86c4e5SOphir Munk 	rte_spinlock_unlock(&mlx5_shared_data_lock);
7972e86c4e5SOphir Munk 	return ret;
7982e86c4e5SOphir Munk }
7992e86c4e5SOphir Munk 
8002e86c4e5SOphir Munk /**
8012e86c4e5SOphir Munk  * PMD global initialization.
8022e86c4e5SOphir Munk  *
8032e86c4e5SOphir Munk  * Independent from individual device, this function initializes global
8042e86c4e5SOphir Munk  * per-PMD data structures distinguishing primary and secondary processes.
8052e86c4e5SOphir Munk  * Hence, each initialization is called once per a process.
8062e86c4e5SOphir Munk  *
8072e86c4e5SOphir Munk  * @return
8082e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
8092e86c4e5SOphir Munk  */
8102e86c4e5SOphir Munk static int
8112e86c4e5SOphir Munk mlx5_init_once(void)
8122e86c4e5SOphir Munk {
8132e86c4e5SOphir Munk 	struct mlx5_shared_data *sd;
8142e86c4e5SOphir Munk 	struct mlx5_local_data *ld = &mlx5_local_data;
8152e86c4e5SOphir Munk 	int ret = 0;
8162e86c4e5SOphir Munk 
8172e86c4e5SOphir Munk 	if (mlx5_init_shared_data())
8182e86c4e5SOphir Munk 		return -rte_errno;
8192e86c4e5SOphir Munk 	sd = mlx5_shared_data;
8202e86c4e5SOphir Munk 	MLX5_ASSERT(sd);
8212e86c4e5SOphir Munk 	rte_spinlock_lock(&sd->lock);
8222e86c4e5SOphir Munk 	switch (rte_eal_process_type()) {
8232e86c4e5SOphir Munk 	case RTE_PROC_PRIMARY:
8242e86c4e5SOphir Munk 		if (sd->init_done)
8252e86c4e5SOphir Munk 			break;
8262e86c4e5SOphir Munk 		ret = mlx5_mp_init_primary(MLX5_MP_NAME,
8272e86c4e5SOphir Munk 					   mlx5_mp_os_primary_handle);
8282e86c4e5SOphir Munk 		if (ret)
8292e86c4e5SOphir Munk 			goto out;
8302e86c4e5SOphir Munk 		sd->init_done = true;
8312e86c4e5SOphir Munk 		break;
8322e86c4e5SOphir Munk 	case RTE_PROC_SECONDARY:
8332e86c4e5SOphir Munk 		if (ld->init_done)
8342e86c4e5SOphir Munk 			break;
8352e86c4e5SOphir Munk 		ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
8362e86c4e5SOphir Munk 					     mlx5_mp_os_secondary_handle);
8372e86c4e5SOphir Munk 		if (ret)
8382e86c4e5SOphir Munk 			goto out;
8392e86c4e5SOphir Munk 		++sd->secondary_cnt;
8402e86c4e5SOphir Munk 		ld->init_done = true;
8412e86c4e5SOphir Munk 		break;
8422e86c4e5SOphir Munk 	default:
8432e86c4e5SOphir Munk 		break;
8442e86c4e5SOphir Munk 	}
8452e86c4e5SOphir Munk out:
8462e86c4e5SOphir Munk 	rte_spinlock_unlock(&sd->lock);
8472e86c4e5SOphir Munk 	return ret;
8482e86c4e5SOphir Munk }
8492e86c4e5SOphir Munk 
8502e86c4e5SOphir Munk /**
85145633c46SSuanming Mou  * DR flow drop action support detect.
85245633c46SSuanming Mou  *
85345633c46SSuanming Mou  * @param dev
85445633c46SSuanming Mou  *   Pointer to rte_eth_dev structure.
85545633c46SSuanming Mou  *
85645633c46SSuanming Mou  */
85745633c46SSuanming Mou static void
85845633c46SSuanming Mou mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
85945633c46SSuanming Mou {
86045633c46SSuanming Mou #ifdef HAVE_MLX5DV_DR
86145633c46SSuanming Mou 	struct mlx5_priv *priv = dev->data->dev_private;
86245633c46SSuanming Mou 
863a13ec19cSMichael Baum 	if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)
86445633c46SSuanming Mou 		return;
86545633c46SSuanming Mou 	/**
86645633c46SSuanming Mou 	 * DR supports drop action placeholder when it is supported;
86745633c46SSuanming Mou 	 * otherwise, use the queue drop action.
86845633c46SSuanming Mou 	 */
8693c4338a4SJiawei Wang 	if (!priv->sh->drop_action_check_flag) {
8703c4338a4SJiawei Wang 		if (!mlx5_flow_discover_dr_action_support(dev))
8713c4338a4SJiawei Wang 			priv->sh->dr_drop_action_en = 1;
8723c4338a4SJiawei Wang 		priv->sh->drop_action_check_flag = 1;
8733c4338a4SJiawei Wang 	}
8743c4338a4SJiawei Wang 	if (priv->sh->dr_drop_action_en)
87545633c46SSuanming Mou 		priv->root_drop_action = priv->sh->dr_drop_action;
8763c4338a4SJiawei Wang 	else
8773c4338a4SJiawei Wang 		priv->root_drop_action = priv->drop_queue.hrxq->action;
87845633c46SSuanming Mou #endif
87945633c46SSuanming Mou }
88045633c46SSuanming Mou 
881e6988afdSMatan Azrad static void
882e6988afdSMatan Azrad mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
883e6988afdSMatan Azrad {
884e6988afdSMatan Azrad 	struct mlx5_priv *priv = dev->data->dev_private;
885ca1418ceSMichael Baum 	void *ctx = priv->sh->cdev->ctx;
886e6988afdSMatan Azrad 
887e6988afdSMatan Azrad 	priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
888e6988afdSMatan Azrad 	if (!priv->q_counters) {
889e6988afdSMatan Azrad 		struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
890e6988afdSMatan Azrad 		struct ibv_wq *wq;
891e6988afdSMatan Azrad 
892e6988afdSMatan Azrad 		DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
893e6988afdSMatan Azrad 			"by DevX - fall-back to use the kernel driver global "
894e6988afdSMatan Azrad 			"queue counter.", dev->data->port_id);
895e6988afdSMatan Azrad 		/* Create WQ by kernel and query its queue counter ID. */
896e6988afdSMatan Azrad 		if (cq) {
897e6988afdSMatan Azrad 			wq = mlx5_glue->create_wq(ctx,
898e6988afdSMatan Azrad 						  &(struct ibv_wq_init_attr){
899e6988afdSMatan Azrad 						    .wq_type = IBV_WQT_RQ,
900e6988afdSMatan Azrad 						    .max_wr = 1,
901e6988afdSMatan Azrad 						    .max_sge = 1,
902e35ccf24SMichael Baum 						    .pd = priv->sh->cdev->pd,
903e6988afdSMatan Azrad 						    .cq = cq,
904e6988afdSMatan Azrad 						});
905e6988afdSMatan Azrad 			if (wq) {
906e6988afdSMatan Azrad 				/* Counter is assigned only on RDY state. */
907e6988afdSMatan Azrad 				int ret = mlx5_glue->modify_wq(wq,
908e6988afdSMatan Azrad 						 &(struct ibv_wq_attr){
909e6988afdSMatan Azrad 						 .attr_mask = IBV_WQ_ATTR_STATE,
910e6988afdSMatan Azrad 						 .wq_state = IBV_WQS_RDY,
911e6988afdSMatan Azrad 						});
912e6988afdSMatan Azrad 
913e6988afdSMatan Azrad 				if (ret == 0)
914e6988afdSMatan Azrad 					mlx5_devx_cmd_wq_query(wq,
915e6988afdSMatan Azrad 							 &priv->counter_set_id);
916e6988afdSMatan Azrad 				claim_zero(mlx5_glue->destroy_wq(wq));
917e6988afdSMatan Azrad 			}
918e6988afdSMatan Azrad 			claim_zero(mlx5_glue->destroy_cq(cq));
919e6988afdSMatan Azrad 		}
920e6988afdSMatan Azrad 	} else {
921e6988afdSMatan Azrad 		priv->counter_set_id = priv->q_counters->id;
922e6988afdSMatan Azrad 	}
923e6988afdSMatan Azrad 	if (priv->counter_set_id == 0)
924e6988afdSMatan Azrad 		DRV_LOG(INFO, "Part of the port %d statistics will not be "
925e6988afdSMatan Azrad 			"available.", dev->data->port_id);
926e6988afdSMatan Azrad }
927e6988afdSMatan Azrad 
928994829e6SSuanming Mou /**
929f926cce3SXueming Li  * Check if representor spawn info match devargs.
930f926cce3SXueming Li  *
931f926cce3SXueming Li  * @param spawn
932f926cce3SXueming Li  *   Verbs device parameters (name, port, switch_info) to spawn.
933f926cce3SXueming Li  * @param eth_da
934f926cce3SXueming Li  *   Device devargs to probe.
935f926cce3SXueming Li  *
936f926cce3SXueming Li  * @return
937f926cce3SXueming Li  *   Match result.
938f926cce3SXueming Li  */
939f926cce3SXueming Li static bool
940f926cce3SXueming Li mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
941f926cce3SXueming Li 		       struct rte_eth_devargs *eth_da)
942f926cce3SXueming Li {
943f926cce3SXueming Li 	struct mlx5_switch_info *switch_info = &spawn->info;
944f926cce3SXueming Li 	unsigned int p, f;
945f926cce3SXueming Li 	uint16_t id;
94691766faeSXueming Li 	uint16_t repr_id = mlx5_representor_id_encode(switch_info,
94791766faeSXueming Li 						      eth_da->type);
948f926cce3SXueming Li 
949f926cce3SXueming Li 	switch (eth_da->type) {
950f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_SF:
95191766faeSXueming Li 		if (!(spawn->info.port_name == -1 &&
95291766faeSXueming Li 		      switch_info->name_type ==
95391766faeSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
95491766faeSXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
955f926cce3SXueming Li 			rte_errno = EBUSY;
956f926cce3SXueming Li 			return false;
957f926cce3SXueming Li 		}
958f926cce3SXueming Li 		break;
959f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_VF:
960f926cce3SXueming Li 		/* Allows HPF representor index -1 as exception. */
961f926cce3SXueming Li 		if (!(spawn->info.port_name == -1 &&
962f926cce3SXueming Li 		      switch_info->name_type ==
963f926cce3SXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
964f926cce3SXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
965f926cce3SXueming Li 			rte_errno = EBUSY;
966f926cce3SXueming Li 			return false;
967f926cce3SXueming Li 		}
968f926cce3SXueming Li 		break;
969f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_NONE:
970f926cce3SXueming Li 		rte_errno = EBUSY;
971f926cce3SXueming Li 		return false;
972f926cce3SXueming Li 	default:
973f926cce3SXueming Li 		rte_errno = ENOTSUP;
974f926cce3SXueming Li 		DRV_LOG(ERR, "unsupported representor type");
975f926cce3SXueming Li 		return false;
976f926cce3SXueming Li 	}
977f926cce3SXueming Li 	/* Check representor ID: */
978f926cce3SXueming Li 	for (p = 0; p < eth_da->nb_ports; ++p) {
979f926cce3SXueming Li 		if (spawn->pf_bond < 0) {
980f926cce3SXueming Li 			/* For non-LAG mode, allow and ignore pf. */
981f926cce3SXueming Li 			switch_info->pf_num = eth_da->ports[p];
98291766faeSXueming Li 			repr_id = mlx5_representor_id_encode(switch_info,
98391766faeSXueming Li 							     eth_da->type);
984f926cce3SXueming Li 		}
985f926cce3SXueming Li 		for (f = 0; f < eth_da->nb_representor_ports; ++f) {
986f926cce3SXueming Li 			id = MLX5_REPRESENTOR_ID
987f926cce3SXueming Li 				(eth_da->ports[p], eth_da->type,
988f926cce3SXueming Li 				 eth_da->representor_ports[f]);
989f926cce3SXueming Li 			if (repr_id == id)
990f926cce3SXueming Li 				return true;
991f926cce3SXueming Li 		}
992f926cce3SXueming Li 	}
993f926cce3SXueming Li 	rte_errno = EBUSY;
994f926cce3SXueming Li 	return false;
995f926cce3SXueming Li }
996f926cce3SXueming Li 
997f926cce3SXueming Li /**
9982eb4d010SOphir Munk  * Spawn an Ethernet device from Verbs information.
9992eb4d010SOphir Munk  *
10002eb4d010SOphir Munk  * @param dpdk_dev
10012eb4d010SOphir Munk  *   Backing DPDK device.
10022eb4d010SOphir Munk  * @param spawn
10032eb4d010SOphir Munk  *   Verbs device parameters (name, port, switch_info) to spawn.
1004887183efSMichael Baum  * @param eth_da
1005cb95feefSXueming Li  *   Device arguments.
1006a729d2f0SMichael Baum  * @param mkvlist
1007a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
10082eb4d010SOphir Munk  *
10092eb4d010SOphir Munk  * @return
10102eb4d010SOphir Munk  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
10112eb4d010SOphir Munk  *   is set. The following errors are defined:
10122eb4d010SOphir Munk  *
10132eb4d010SOphir Munk  *   EBUSY: device is not supposed to be spawned.
10142eb4d010SOphir Munk  *   EEXIST: device is already spawned
10152eb4d010SOphir Munk  */
10162eb4d010SOphir Munk static struct rte_eth_dev *
10172eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev,
10182eb4d010SOphir Munk 	       struct mlx5_dev_spawn_data *spawn,
1019a729d2f0SMichael Baum 	       struct rte_eth_devargs *eth_da,
1020a729d2f0SMichael Baum 	       struct mlx5_kvargs_ctrl *mkvlist)
10212eb4d010SOphir Munk {
10222eb4d010SOphir Munk 	const struct mlx5_switch_info *switch_info = &spawn->info;
10232eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = NULL;
10243fd2961eSXueming Li 	struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
10252eb4d010SOphir Munk 	struct rte_eth_dev *eth_dev = NULL;
10262eb4d010SOphir Munk 	struct mlx5_priv *priv = NULL;
10272eb4d010SOphir Munk 	int err = 0;
10282eb4d010SOphir Munk 	struct rte_ether_addr mac;
10292eb4d010SOphir Munk 	char name[RTE_ETH_NAME_MAX_LEN];
10302eb4d010SOphir Munk 	int own_domain_id = 0;
10312eb4d010SOphir Munk 	uint16_t port_id;
1032d0cf77e8SViacheslav Ovsiienko 	struct mlx5_port_info vport_info = { .query_flags = 0 };
103345a6df80SMichael Baum 	int nl_rdma;
1034b4edeaf3SSuanming Mou 	int i;
10352eb4d010SOphir Munk 
10362eb4d010SOphir Munk 	/* Determine if this port representor is supposed to be spawned. */
1037f926cce3SXueming Li 	if (switch_info->representor && dpdk_dev->devargs &&
1038f926cce3SXueming Li 	    !mlx5_representor_match(spawn, eth_da))
1039d6541676SXueming Li 		return NULL;
10402eb4d010SOphir Munk 	/* Build device name. */
10412eb4d010SOphir Munk 	if (spawn->pf_bond < 0) {
10422eb4d010SOphir Munk 		/* Single device. */
10432eb4d010SOphir Munk 		if (!switch_info->representor)
10442eb4d010SOphir Munk 			strlcpy(name, dpdk_dev->name, sizeof(name));
10452eb4d010SOphir Munk 		else
1046f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_representor_%s%u",
1047cb95feefSXueming Li 				 dpdk_dev->name,
1048cb95feefSXueming Li 				 switch_info->name_type ==
1049cb95feefSXueming Li 				 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1050cb95feefSXueming Li 				 switch_info->port_name);
10512eb4d010SOphir Munk 	} else {
10522eb4d010SOphir Munk 		/* Bonding device. */
1053f926cce3SXueming Li 		if (!switch_info->representor) {
1054f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s",
1055887183efSMichael Baum 				       dpdk_dev->name, spawn->phys_dev_name);
1056f926cce3SXueming Li 		} else {
1057f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1058887183efSMichael Baum 				dpdk_dev->name, spawn->phys_dev_name,
1059f926cce3SXueming Li 				switch_info->ctrl_num,
1060f926cce3SXueming Li 				switch_info->pf_num,
1061cb95feefSXueming Li 				switch_info->name_type ==
1062cb95feefSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
10632eb4d010SOphir Munk 				switch_info->port_name);
10642eb4d010SOphir Munk 		}
1065f926cce3SXueming Li 	}
1066f926cce3SXueming Li 	if (err >= (int)sizeof(name))
1067f926cce3SXueming Li 		DRV_LOG(WARNING, "device name overflow %s", name);
10682eb4d010SOphir Munk 	/* check if the device is already spawned */
10692eb4d010SOphir Munk 	if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1070a729d2f0SMichael Baum 		/*
1071a729d2f0SMichael Baum 		 * When device is already spawned, its devargs should be set
1072a729d2f0SMichael Baum 		 * as used. otherwise, mlx5_kvargs_validate() will fail.
1073a729d2f0SMichael Baum 		 */
1074a729d2f0SMichael Baum 		if (mkvlist)
1075a729d2f0SMichael Baum 			mlx5_port_args_set_used(name, port_id, mkvlist);
10762eb4d010SOphir Munk 		rte_errno = EEXIST;
10772eb4d010SOphir Munk 		return NULL;
10782eb4d010SOphir Munk 	}
10792eb4d010SOphir Munk 	DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
10802eb4d010SOphir Munk 	if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
10812eb4d010SOphir Munk 		struct mlx5_mp_id mp_id;
10822eb4d010SOphir Munk 
10832eb4d010SOphir Munk 		eth_dev = rte_eth_dev_attach_secondary(name);
10842eb4d010SOphir Munk 		if (eth_dev == NULL) {
10852eb4d010SOphir Munk 			DRV_LOG(ERR, "can not attach rte ethdev");
10862eb4d010SOphir Munk 			rte_errno = ENOMEM;
10872eb4d010SOphir Munk 			return NULL;
10882eb4d010SOphir Munk 		}
10892eb4d010SOphir Munk 		eth_dev->device = dpdk_dev;
1090b012b4ceSOphir Munk 		eth_dev->dev_ops = &mlx5_dev_sec_ops;
1091cbfc6111SFerruh Yigit 		eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1092cbfc6111SFerruh Yigit 		eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
10932eb4d010SOphir Munk 		err = mlx5_proc_priv_init(eth_dev);
10942eb4d010SOphir Munk 		if (err)
10952eb4d010SOphir Munk 			return NULL;
1096fec28ca0SDmitry Kozlyuk 		mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
10972eb4d010SOphir Munk 		/* Receive command fd from primary process */
10982eb4d010SOphir Munk 		err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
10992eb4d010SOphir Munk 		if (err < 0)
11002eb4d010SOphir Munk 			goto err_secondary;
11012eb4d010SOphir Munk 		/* Remap UAR for Tx queues. */
11022eb4d010SOphir Munk 		err = mlx5_tx_uar_init_secondary(eth_dev, err);
11032eb4d010SOphir Munk 		if (err)
11042eb4d010SOphir Munk 			goto err_secondary;
11052eb4d010SOphir Munk 		/*
11062eb4d010SOphir Munk 		 * Ethdev pointer is still required as input since
11072eb4d010SOphir Munk 		 * the primary device is not accessible from the
11082eb4d010SOphir Munk 		 * secondary process.
11092eb4d010SOphir Munk 		 */
11102eb4d010SOphir Munk 		eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
11112eb4d010SOphir Munk 		eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
11122eb4d010SOphir Munk 		return eth_dev;
11132eb4d010SOphir Munk err_secondary:
11142eb4d010SOphir Munk 		mlx5_dev_close(eth_dev);
11152eb4d010SOphir Munk 		return NULL;
11162eb4d010SOphir Munk 	}
1117a729d2f0SMichael Baum 	sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);
11182eb4d010SOphir Munk 	if (!sh)
11192eb4d010SOphir Munk 		return NULL;
11203fd2961eSXueming Li 	nl_rdma = mlx5_nl_init(NETLINK_RDMA);
11212eb4d010SOphir Munk 	/* Check port status. */
11223fd2961eSXueming Li 	if (spawn->phys_port <= UINT8_MAX) {
11233fd2961eSXueming Li 		/* Legacy Verbs api only support u8 port number. */
1124ca1418ceSMichael Baum 		err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1125ca1418ceSMichael Baum 					    &port_attr);
11262eb4d010SOphir Munk 		if (err) {
11272eb4d010SOphir Munk 			DRV_LOG(ERR, "port query failed: %s", strerror(err));
11282eb4d010SOphir Munk 			goto error;
11292eb4d010SOphir Munk 		}
11302eb4d010SOphir Munk 		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
11312eb4d010SOphir Munk 			DRV_LOG(ERR, "port is not configured in Ethernet mode");
11322eb4d010SOphir Munk 			err = EINVAL;
11332eb4d010SOphir Munk 			goto error;
11342eb4d010SOphir Munk 		}
11353fd2961eSXueming Li 	} else if (nl_rdma >= 0) {
11363fd2961eSXueming Li 		/* IB doesn't allow more than 255 ports, must be Ethernet. */
11373fd2961eSXueming Li 		err = mlx5_nl_port_state(nl_rdma,
11383fd2961eSXueming Li 			spawn->phys_dev_name,
11393fd2961eSXueming Li 			spawn->phys_port);
11403fd2961eSXueming Li 		if (err < 0) {
11413fd2961eSXueming Li 			DRV_LOG(INFO, "Failed to get netlink port state: %s",
11423fd2961eSXueming Li 				strerror(rte_errno));
11433fd2961eSXueming Li 			err = -rte_errno;
11443fd2961eSXueming Li 			goto error;
11453fd2961eSXueming Li 		}
11463fd2961eSXueming Li 		port_attr.state = (enum ibv_port_state)err;
11473fd2961eSXueming Li 	}
11482eb4d010SOphir Munk 	if (port_attr.state != IBV_PORT_ACTIVE)
11493fd2961eSXueming Li 		DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
11502eb4d010SOphir Munk 			mlx5_glue->port_state_str(port_attr.state),
11512eb4d010SOphir Munk 			port_attr.state);
11522eb4d010SOphir Munk 	/* Allocate private eth device data. */
11532175c4dcSSuanming Mou 	priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
11542eb4d010SOphir Munk 			   sizeof(*priv),
11552175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
11562eb4d010SOphir Munk 	if (priv == NULL) {
11572eb4d010SOphir Munk 		DRV_LOG(ERR, "priv allocation failure");
11582eb4d010SOphir Munk 		err = ENOMEM;
11592eb4d010SOphir Munk 		goto error;
11602eb4d010SOphir Munk 	}
11612eb4d010SOphir Munk 	priv->sh = sh;
116291389890SOphir Munk 	priv->dev_port = spawn->phys_port;
11632eb4d010SOphir Munk 	priv->pci_dev = spawn->pci_dev;
11642eb4d010SOphir Munk 	priv->mtu = RTE_ETHER_MTU;
11652eb4d010SOphir Munk 	/* Some internal functions rely on Netlink sockets, open them now. */
11663fd2961eSXueming Li 	priv->nl_socket_rdma = nl_rdma;
11672eb4d010SOphir Munk 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
11682eb4d010SOphir Munk 	priv->representor = !!switch_info->representor;
11692eb4d010SOphir Munk 	priv->master = !!switch_info->master;
11702eb4d010SOphir Munk 	priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
11712eb4d010SOphir Munk 	priv->vport_meta_tag = 0;
11722eb4d010SOphir Munk 	priv->vport_meta_mask = 0;
11732eb4d010SOphir Munk 	priv->pf_bond = spawn->pf_bond;
1174ce4062cbSGregory Etelson 
1175ce4062cbSGregory Etelson 	DRV_LOG(DEBUG,
1176ce4062cbSGregory Etelson 		"dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1177ce4062cbSGregory Etelson 		priv->dev_port, dpdk_dev->bus->name,
1178ce4062cbSGregory Etelson 		priv->pci_dev ? priv->pci_dev->name : "NONE",
1179ce4062cbSGregory Etelson 		priv->master, priv->representor, priv->pf_bond);
1180ce4062cbSGregory Etelson 
11812eb4d010SOphir Munk 	/*
1182d0cf77e8SViacheslav Ovsiienko 	 * If we have E-Switch we should determine the vport attributes.
1183d0cf77e8SViacheslav Ovsiienko 	 * E-Switch may use either source vport field or reg_c[0] metadata
1184d0cf77e8SViacheslav Ovsiienko 	 * register to match on vport index. The engaged part of metadata
1185d0cf77e8SViacheslav Ovsiienko 	 * register is defined by mask.
11862eb4d010SOphir Munk 	 */
1187cf004fd3SMichael Baum 	if (sh->esw_mode) {
1188ca1418ceSMichael Baum 		err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1189d0cf77e8SViacheslav Ovsiienko 						 spawn->phys_port,
1190d0cf77e8SViacheslav Ovsiienko 						 &vport_info);
11912eb4d010SOphir Munk 		if (err) {
11922eb4d010SOphir Munk 			DRV_LOG(WARNING,
1193887183efSMichael Baum 				"Cannot query devx port %d on device %s",
1194887183efSMichael Baum 				spawn->phys_port, spawn->phys_dev_name);
1195d0cf77e8SViacheslav Ovsiienko 			vport_info.query_flags = 0;
11962eb4d010SOphir Munk 		}
11972eb4d010SOphir Munk 	}
1198d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1199d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_tag = vport_info.vport_meta_tag;
1200d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_mask = vport_info.vport_meta_mask;
12012eb4d010SOphir Munk 		if (!priv->vport_meta_mask) {
1202887183efSMichael Baum 			DRV_LOG(ERR,
1203887183efSMichael Baum 				"vport zero mask for port %d on bonding device %s",
1204887183efSMichael Baum 				spawn->phys_port, spawn->phys_dev_name);
12052eb4d010SOphir Munk 			err = ENOTSUP;
12062eb4d010SOphir Munk 			goto error;
12072eb4d010SOphir Munk 		}
12082eb4d010SOphir Munk 		if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1209887183efSMichael Baum 			DRV_LOG(ERR,
1210887183efSMichael Baum 				"Invalid vport tag for port %d on bonding device %s",
1211887183efSMichael Baum 				spawn->phys_port, spawn->phys_dev_name);
12122eb4d010SOphir Munk 			err = ENOTSUP;
12132eb4d010SOphir Munk 			goto error;
12142eb4d010SOphir Munk 		}
12152eb4d010SOphir Munk 	}
1216d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1217d0cf77e8SViacheslav Ovsiienko 		priv->vport_id = vport_info.vport_id;
1218cf004fd3SMichael Baum 	} else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1219887183efSMichael Baum 		DRV_LOG(ERR,
1220887183efSMichael Baum 			"Cannot deduce vport index for port %d on bonding device %s",
1221887183efSMichael Baum 			spawn->phys_port, spawn->phys_dev_name);
12222eb4d010SOphir Munk 		err = ENOTSUP;
12232eb4d010SOphir Munk 		goto error;
12242eb4d010SOphir Munk 	} else {
12252eb4d010SOphir Munk 		/*
1226d0cf77e8SViacheslav Ovsiienko 		 * Suppose vport index in compatible way. Kernel/rdma_core
1227d0cf77e8SViacheslav Ovsiienko 		 * support single E-Switch per PF configurations only and
1228d0cf77e8SViacheslav Ovsiienko 		 * vport_id field contains the vport index for associated VF,
1229d0cf77e8SViacheslav Ovsiienko 		 * which is deduced from representor port name.
12302eb4d010SOphir Munk 		 * For example, let's have the IB device port 10, it has
12312eb4d010SOphir Munk 		 * attached network device eth0, which has port name attribute
12322eb4d010SOphir Munk 		 * pf0vf2, we can deduce the VF number as 2, and set vport index
12332eb4d010SOphir Munk 		 * as 3 (2+1). This assigning schema should be changed if the
12342eb4d010SOphir Munk 		 * multiple E-Switch instances per PF configurations or/and PCI
12352eb4d010SOphir Munk 		 * subfunctions are added.
12362eb4d010SOphir Munk 		 */
12372eb4d010SOphir Munk 		priv->vport_id = switch_info->representor ?
12382eb4d010SOphir Munk 				 switch_info->port_name + 1 : -1;
1239d0cf77e8SViacheslav Ovsiienko 	}
124091766faeSXueming Li 	priv->representor_id = mlx5_representor_id_encode(switch_info,
124191766faeSXueming Li 							  eth_da->type);
12422eb4d010SOphir Munk 	/*
12432eb4d010SOphir Munk 	 * Look for sibling devices in order to reuse their switch domain
12442eb4d010SOphir Munk 	 * if any, otherwise allocate one.
12452eb4d010SOphir Munk 	 */
1246ce4062cbSGregory Etelson 	MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
12472eb4d010SOphir Munk 		const struct mlx5_priv *opriv =
12482eb4d010SOphir Munk 			rte_eth_devices[port_id].data->dev_private;
12492eb4d010SOphir Munk 
12502eb4d010SOphir Munk 		if (!opriv ||
12512eb4d010SOphir Munk 		    opriv->sh != priv->sh ||
12522eb4d010SOphir Munk 			opriv->domain_id ==
12532eb4d010SOphir Munk 			RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
12542eb4d010SOphir Munk 			continue;
12552eb4d010SOphir Munk 		priv->domain_id = opriv->domain_id;
1256ce4062cbSGregory Etelson 		DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1257ce4062cbSGregory Etelson 			priv->dev_port, priv->domain_id);
12582eb4d010SOphir Munk 		break;
12592eb4d010SOphir Munk 	}
12602eb4d010SOphir Munk 	if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
12612eb4d010SOphir Munk 		err = rte_eth_switch_domain_alloc(&priv->domain_id);
12622eb4d010SOphir Munk 		if (err) {
12632eb4d010SOphir Munk 			err = rte_errno;
12642eb4d010SOphir Munk 			DRV_LOG(ERR, "unable to allocate switch domain: %s",
12652eb4d010SOphir Munk 				strerror(rte_errno));
12662eb4d010SOphir Munk 			goto error;
12672eb4d010SOphir Munk 		}
12682eb4d010SOphir Munk 		own_domain_id = 1;
1269ce4062cbSGregory Etelson 		DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1270ce4062cbSGregory Etelson 			priv->dev_port, priv->domain_id);
12712eb4d010SOphir Munk 	}
12726dc0cbc6SMichael Baum 	if (sh->cdev->config.devx) {
127345a6df80SMichael Baum 		struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
127445a6df80SMichael Baum 
127553820561SMichael Baum 		sh->steering_format_version = hca_attr->steering_format_version;
1276c99b4f8bSLi Zhang #if defined(HAVE_MLX5DV_DR) && \
1277c99b4f8bSLi Zhang 	(defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1278c99b4f8bSLi Zhang 	 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
127953820561SMichael Baum 		if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1280a13ec19cSMichael Baum 		    sh->config.dv_flow_en) {
128153820561SMichael Baum 			uint8_t reg_c_mask = hca_attr->qos.flow_meter_reg_c_ids;
12822eb4d010SOphir Munk 			/*
12832eb4d010SOphir Munk 			 * Meter needs two REG_C's for color match and pre-sfx
12842eb4d010SOphir Munk 			 * flow match. Here get the REG_C for color match.
12852eb4d010SOphir Munk 			 * REG_C_0 and REG_C_1 is reserved for metadata feature.
12862eb4d010SOphir Munk 			 */
12872eb4d010SOphir Munk 			reg_c_mask &= 0xfc;
12882eb4d010SOphir Munk 			if (__builtin_popcount(reg_c_mask) < 1) {
12892eb4d010SOphir Munk 				priv->mtr_en = 0;
12902eb4d010SOphir Munk 				DRV_LOG(WARNING, "No available register for"
12912eb4d010SOphir Munk 					" meter.");
12922eb4d010SOphir Munk 			} else {
129331ef2982SDekel Peled 				/*
129431ef2982SDekel Peled 				 * The meter color register is used by the
129531ef2982SDekel Peled 				 * flow-hit feature as well.
129631ef2982SDekel Peled 				 * The flow-hit feature must use REG_C_3
129731ef2982SDekel Peled 				 * Prefer REG_C_3 if it is available.
129831ef2982SDekel Peled 				 */
129931ef2982SDekel Peled 				if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
130031ef2982SDekel Peled 					priv->mtr_color_reg = REG_C_3;
130131ef2982SDekel Peled 				else
130231ef2982SDekel Peled 					priv->mtr_color_reg = ffs(reg_c_mask)
130331ef2982SDekel Peled 							      - 1 + REG_C_0;
13042eb4d010SOphir Munk 				priv->mtr_en = 1;
130553820561SMichael Baum 				priv->mtr_reg_share = hca_attr->qos.flow_meter;
13062eb4d010SOphir Munk 				DRV_LOG(DEBUG, "The REG_C meter uses is %d",
13072eb4d010SOphir Munk 					priv->mtr_color_reg);
13082eb4d010SOphir Munk 			}
13092eb4d010SOphir Munk 		}
131053820561SMichael Baum 		if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
131129efa63aSLi Zhang 			uint32_t log_obj_size =
131229efa63aSLi Zhang 				rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
131329efa63aSLi Zhang 			if (log_obj_size >=
131453820561SMichael Baum 			    hca_attr->qos.log_meter_aso_granularity &&
131529efa63aSLi Zhang 			    log_obj_size <=
131653820561SMichael Baum 			    hca_attr->qos.log_meter_aso_max_alloc)
131729efa63aSLi Zhang 				sh->meter_aso_en = 1;
131844432018SLi Zhang 		}
131944432018SLi Zhang 		if (priv->mtr_en) {
1320afb4aa4fSLi Zhang 			err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
132129efa63aSLi Zhang 			if (err) {
132229efa63aSLi Zhang 				err = -err;
132329efa63aSLi Zhang 				goto error;
132429efa63aSLi Zhang 			}
132529efa63aSLi Zhang 		}
132653820561SMichael Baum 		if (hca_attr->flow.tunnel_header_0_1)
1327630a587bSRongwei Liu 			sh->tunnel_header_0_1 = 1;
13282eb4d010SOphir Munk #endif
1329a2999c7bSDekel Peled #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
133053820561SMichael Baum 		if (hca_attr->flow_hit_aso && priv->mtr_color_reg == REG_C_3) {
133131ef2982SDekel Peled 			sh->flow_hit_aso_en = 1;
133231ef2982SDekel Peled 			err = mlx5_flow_aso_age_mng_init(sh);
133331ef2982SDekel Peled 			if (err) {
133431ef2982SDekel Peled 				err = -err;
133531ef2982SDekel Peled 				goto error;
133631ef2982SDekel Peled 			}
133731ef2982SDekel Peled 			DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
133831ef2982SDekel Peled 		}
1339a2999c7bSDekel Peled #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1340ee9e5fadSBing Zhao #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1341ee9e5fadSBing Zhao 	defined(HAVE_MLX5_DR_ACTION_ASO_CT)
134253820561SMichael Baum 		if (hca_attr->ct_offload && priv->mtr_color_reg == REG_C_3) {
1343ee9e5fadSBing Zhao 			err = mlx5_flow_aso_ct_mng_init(sh);
1344ee9e5fadSBing Zhao 			if (err) {
1345ee9e5fadSBing Zhao 				err = -err;
1346ee9e5fadSBing Zhao 				goto error;
1347ee9e5fadSBing Zhao 			}
1348ee9e5fadSBing Zhao 			DRV_LOG(DEBUG, "CT ASO is supported.");
1349ee9e5fadSBing Zhao 			sh->ct_aso_en = 1;
1350ee9e5fadSBing Zhao 		}
1351ee9e5fadSBing Zhao #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
135296b1f027SJiawei Wang #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
135353820561SMichael Baum 		if (hca_attr->log_max_ft_sampler_num > 0  &&
1354a13ec19cSMichael Baum 		    sh->config.dv_flow_en) {
135596b1f027SJiawei Wang 			priv->sampler_en = 1;
13561b9e9826SThomas Monjalon 			DRV_LOG(DEBUG, "Sampler enabled!");
135796b1f027SJiawei Wang 		} else {
135896b1f027SJiawei Wang 			priv->sampler_en = 0;
135953820561SMichael Baum 			if (!hca_attr->log_max_ft_sampler_num)
13601b9e9826SThomas Monjalon 				DRV_LOG(WARNING,
13611b9e9826SThomas Monjalon 					"No available register for sampler.");
136296b1f027SJiawei Wang 			else
13631b9e9826SThomas Monjalon 				DRV_LOG(DEBUG, "DV flow is not supported!");
136496b1f027SJiawei Wang 		}
136596b1f027SJiawei Wang #endif
13662eb4d010SOphir Munk 	}
136745a6df80SMichael Baum 	/* Process parameters and store port configuration on priv structure. */
1368a729d2f0SMichael Baum 	err = mlx5_port_args_config(priv, mkvlist, &priv->config);
136945a6df80SMichael Baum 	if (err) {
137045a6df80SMichael Baum 		err = rte_errno;
137145a6df80SMichael Baum 		DRV_LOG(ERR, "Failed to process port configure: %s",
137245a6df80SMichael Baum 			strerror(rte_errno));
137345a6df80SMichael Baum 		goto error;
13743d3f4e6dSAlexander Kozyrev 	}
13752eb4d010SOphir Munk 	eth_dev = rte_eth_dev_allocate(name);
13762eb4d010SOphir Munk 	if (eth_dev == NULL) {
13772eb4d010SOphir Munk 		DRV_LOG(ERR, "can not allocate rte ethdev");
13782eb4d010SOphir Munk 		err = ENOMEM;
13792eb4d010SOphir Munk 		goto error;
13802eb4d010SOphir Munk 	}
13812eb4d010SOphir Munk 	if (priv->representor) {
13822eb4d010SOphir Munk 		eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
13832eb4d010SOphir Munk 		eth_dev->data->representor_id = priv->representor_id;
1384ff4e52efSViacheslav Galaktionov 		MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1385ff4e52efSViacheslav Galaktionov 			struct mlx5_priv *opriv =
1386ff4e52efSViacheslav Galaktionov 				rte_eth_devices[port_id].data->dev_private;
1387ff4e52efSViacheslav Galaktionov 			if (opriv &&
1388ff4e52efSViacheslav Galaktionov 			    opriv->master &&
1389ff4e52efSViacheslav Galaktionov 			    opriv->domain_id == priv->domain_id &&
1390ff4e52efSViacheslav Galaktionov 			    opriv->sh == priv->sh) {
1391ff4e52efSViacheslav Galaktionov 				eth_dev->data->backer_port_id = port_id;
1392ff4e52efSViacheslav Galaktionov 				break;
1393ff4e52efSViacheslav Galaktionov 			}
1394ff4e52efSViacheslav Galaktionov 		}
1395ff4e52efSViacheslav Galaktionov 		if (port_id >= RTE_MAX_ETHPORTS)
1396ff4e52efSViacheslav Galaktionov 			eth_dev->data->backer_port_id = eth_dev->data->port_id;
13972eb4d010SOphir Munk 	}
139839ae7577SSuanming Mou 	priv->mp_id.port_id = eth_dev->data->port_id;
139939ae7577SSuanming Mou 	strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
14002eb4d010SOphir Munk 	/*
14012eb4d010SOphir Munk 	 * Store associated network device interface index. This index
14022eb4d010SOphir Munk 	 * is permanent throughout the lifetime of device. So, we may store
14032eb4d010SOphir Munk 	 * the ifindex here and use the cached value further.
14042eb4d010SOphir Munk 	 */
14052eb4d010SOphir Munk 	MLX5_ASSERT(spawn->ifindex);
14062eb4d010SOphir Munk 	priv->if_index = spawn->ifindex;
1407a89f6433SRongwei Liu 	priv->lag_affinity_idx = sh->refcnt - 1;
14082eb4d010SOphir Munk 	eth_dev->data->dev_private = priv;
14092eb4d010SOphir Munk 	priv->dev_data = eth_dev->data;
14102eb4d010SOphir Munk 	eth_dev->data->mac_addrs = priv->mac;
14112eb4d010SOphir Munk 	eth_dev->device = dpdk_dev;
1412f30e69b4SFerruh Yigit 	eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
14132eb4d010SOphir Munk 	/* Configure the first MAC address by default. */
14142eb4d010SOphir Munk 	if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
14152eb4d010SOphir Munk 		DRV_LOG(ERR,
14162eb4d010SOphir Munk 			"port %u cannot get MAC address, is mlx5_en"
14172eb4d010SOphir Munk 			" loaded? (errno: %s)",
14182eb4d010SOphir Munk 			eth_dev->data->port_id, strerror(rte_errno));
14192eb4d010SOphir Munk 		err = ENODEV;
14202eb4d010SOphir Munk 		goto error;
14212eb4d010SOphir Munk 	}
14222eb4d010SOphir Munk 	DRV_LOG(INFO,
1423c2c4f87bSAman Deep Singh 		"port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1424a7db3afcSAman Deep Singh 		eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
14252eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG
14262eb4d010SOphir Munk 	{
142728743807STal Shnaiderman 		char ifname[MLX5_NAMESIZE];
14282eb4d010SOphir Munk 
14292eb4d010SOphir Munk 		if (mlx5_get_ifname(eth_dev, &ifname) == 0)
14302eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
14312eb4d010SOphir Munk 				eth_dev->data->port_id, ifname);
14322eb4d010SOphir Munk 		else
14332eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is unknown",
14342eb4d010SOphir Munk 				eth_dev->data->port_id);
14352eb4d010SOphir Munk 	}
14362eb4d010SOphir Munk #endif
14372eb4d010SOphir Munk 	/* Get actual MTU if possible. */
14382eb4d010SOphir Munk 	err = mlx5_get_mtu(eth_dev, &priv->mtu);
14392eb4d010SOphir Munk 	if (err) {
14402eb4d010SOphir Munk 		err = rte_errno;
14412eb4d010SOphir Munk 		goto error;
14422eb4d010SOphir Munk 	}
14432eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
14442eb4d010SOphir Munk 		priv->mtu);
14452eb4d010SOphir Munk 	/* Initialize burst functions to prevent crashes before link-up. */
1446a41f593fSFerruh Yigit 	eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1447a41f593fSFerruh Yigit 	eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1448b012b4ceSOphir Munk 	eth_dev->dev_ops = &mlx5_dev_ops;
1449cbfc6111SFerruh Yigit 	eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1450cbfc6111SFerruh Yigit 	eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1451cbfc6111SFerruh Yigit 	eth_dev->rx_queue_count = mlx5_rx_queue_count;
14522eb4d010SOphir Munk 	/* Register MAC address. */
14532eb4d010SOphir Munk 	claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1454a13ec19cSMichael Baum 	if (sh->dev_cap.vf && sh->config.vf_nl_en)
14552eb4d010SOphir Munk 		mlx5_nl_mac_addr_sync(priv->nl_socket_route,
14562eb4d010SOphir Munk 				      mlx5_ifindex(eth_dev),
14572eb4d010SOphir Munk 				      eth_dev->data->mac_addrs,
14582eb4d010SOphir Munk 				      MLX5_MAX_MAC_ADDRESSES);
14592eb4d010SOphir Munk 	priv->ctrl_flows = 0;
1460d163fc2dSXueming Li 	rte_spinlock_init(&priv->flow_list_lock);
14612eb4d010SOphir Munk 	TAILQ_INIT(&priv->flow_meters);
1462a295c69aSShun Hao 	priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1463a295c69aSShun Hao 	if (!priv->mtr_profile_tbl)
1464a295c69aSShun Hao 		goto error;
14652eb4d010SOphir Munk 	/* Bring Ethernet device up. */
14662eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
14672eb4d010SOphir Munk 		eth_dev->data->port_id);
14682eb4d010SOphir Munk 	mlx5_set_link_up(eth_dev);
14692eb4d010SOphir Munk 	/*
14702eb4d010SOphir Munk 	 * Even though the interrupt handler is not installed yet,
14712eb4d010SOphir Munk 	 * interrupts will still trigger on the async_fd from
14722eb4d010SOphir Munk 	 * Verbs context returned by ibv_open_device().
14732eb4d010SOphir Munk 	 */
14742eb4d010SOphir Munk 	mlx5_link_update(eth_dev, 0);
1475b4edeaf3SSuanming Mou 	for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1476a13ec19cSMichael Baum 		icfg[i].release_mem_en = !!sh->config.reclaim_mode;
1477a13ec19cSMichael Baum 		if (sh->config.reclaim_mode)
1478b4edeaf3SSuanming Mou 			icfg[i].per_core_cache = 0;
1479b4edeaf3SSuanming Mou 		priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1480b4edeaf3SSuanming Mou 		if (!priv->flows[i])
1481b4edeaf3SSuanming Mou 			goto error;
1482b4edeaf3SSuanming Mou 	}
14832eb4d010SOphir Munk 	/* Create context for virtual machine VLAN workaround. */
14842eb4d010SOphir Munk 	priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1485a13ec19cSMichael Baum 	if (sh->config.dv_flow_en) {
14862eb4d010SOphir Munk 		err = mlx5_alloc_shared_dr(priv);
14872eb4d010SOphir Munk 		if (err)
14882eb4d010SOphir Munk 			goto error;
1489db25cadcSViacheslav Ovsiienko 		if (mlx5_flex_item_port_init(eth_dev) < 0)
1490db25cadcSViacheslav Ovsiienko 			goto error;
14912eb4d010SOphir Munk 	}
1492c4b86201SMichael Baum 	if (mlx5_devx_obj_ops_en(sh)) {
14935eaf882eSMichael Baum 		priv->obj_ops = devx_obj_ops;
1494e6988afdSMatan Azrad 		mlx5_queue_counter_id_prepare(eth_dev);
149523233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_create =
149623233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_create;
149723233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_release =
149823233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_release;
1499614966c2SXueming Li 	} else if (spawn->max_port > UINT8_MAX) {
1500614966c2SXueming Li 		/* Verbs can't support ports larger than 255 by design. */
1501614966c2SXueming Li 		DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1502614966c2SXueming Li 		err = ENOTSUP;
1503614966c2SXueming Li 		goto error;
15045eaf882eSMichael Baum 	} else {
15055eaf882eSMichael Baum 		priv->obj_ops = ibv_obj_ops;
15065eaf882eSMichael Baum 	}
1507a13ec19cSMichael Baum 	if (sh->config.tx_pp &&
150811cfe349SViacheslav Ovsiienko 	    priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1509f17e4b4fSViacheslav Ovsiienko 		/*
1510f17e4b4fSViacheslav Ovsiienko 		 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1511f17e4b4fSViacheslav Ovsiienko 		 * packet pacing and already checked above.
1512f17e4b4fSViacheslav Ovsiienko 		 * Hence, we should only make sure the SQs will be created
1513f17e4b4fSViacheslav Ovsiienko 		 * with DevX, not with Verbs.
1514f17e4b4fSViacheslav Ovsiienko 		 * Verbs allocates the SQ UAR on its own and it can't be shared
1515f17e4b4fSViacheslav Ovsiienko 		 * with Clock Queue UAR as required for Tx scheduling.
1516f17e4b4fSViacheslav Ovsiienko 		 */
1517f17e4b4fSViacheslav Ovsiienko 		DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1518f17e4b4fSViacheslav Ovsiienko 		err = ENODEV;
1519f17e4b4fSViacheslav Ovsiienko 		goto error;
1520f17e4b4fSViacheslav Ovsiienko 	}
152165b3cd0dSSuanming Mou 	priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
152265b3cd0dSSuanming Mou 	if (!priv->drop_queue.hrxq)
152365b3cd0dSSuanming Mou 		goto error;
1524*d84c3cf7SSuanming Mou 	if (priv->sh->config.dv_flow_en == 2)
1525*d84c3cf7SSuanming Mou 		return eth_dev;
15267be78d02SJosh Soref 	/* Port representor shares the same max priority with pf port. */
15273c4338a4SJiawei Wang 	if (!priv->sh->flow_priority_check_flag) {
15282eb4d010SOphir Munk 		/* Supported Verbs flow priority number detection. */
15292eb4d010SOphir Munk 		err = mlx5_flow_discover_priorities(eth_dev);
15303c4338a4SJiawei Wang 		priv->sh->flow_max_priority = err;
15313c4338a4SJiawei Wang 		priv->sh->flow_priority_check_flag = 1;
15323c4338a4SJiawei Wang 	} else {
15333c4338a4SJiawei Wang 		err = priv->sh->flow_max_priority;
15343c4338a4SJiawei Wang 	}
15352eb4d010SOphir Munk 	if (err < 0) {
15362eb4d010SOphir Munk 		err = -err;
15372eb4d010SOphir Munk 		goto error;
15382eb4d010SOphir Munk 	}
15392eb4d010SOphir Munk 	mlx5_set_metadata_mask(eth_dev);
1540a13ec19cSMichael Baum 	if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
15412eb4d010SOphir Munk 	    !priv->sh->dv_regc0_mask) {
15422eb4d010SOphir Munk 		DRV_LOG(ERR, "metadata mode %u is not supported "
15432eb4d010SOphir Munk 			     "(no metadata reg_c[0] is available)",
1544a13ec19cSMichael Baum 			     sh->config.dv_xmeta_en);
15452eb4d010SOphir Munk 			err = ENOTSUP;
15462eb4d010SOphir Munk 			goto error;
15472eb4d010SOphir Munk 	}
1548d03b7860SSuanming Mou 	priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1549d03b7860SSuanming Mou 				       mlx5_hrxq_create_cb,
1550e1592b6cSSuanming Mou 				       mlx5_hrxq_match_cb,
1551491b7137SMatan Azrad 				       mlx5_hrxq_remove_cb,
1552491b7137SMatan Azrad 				       mlx5_hrxq_clone_cb,
1553491b7137SMatan Azrad 				       mlx5_hrxq_clone_free_cb);
1554679f46c7SMatan Azrad 	if (!priv->hrxqs)
1555679f46c7SMatan Azrad 		goto error;
1556491b7137SMatan Azrad 	rte_rwlock_init(&priv->ind_tbls_lock);
15572eb4d010SOphir Munk 	/* Query availability of metadata reg_c's. */
15583c4338a4SJiawei Wang 	if (!priv->sh->metadata_regc_check_flag) {
15592eb4d010SOphir Munk 		err = mlx5_flow_discover_mreg_c(eth_dev);
15602eb4d010SOphir Munk 		if (err < 0) {
15612eb4d010SOphir Munk 			err = -err;
15622eb4d010SOphir Munk 			goto error;
15632eb4d010SOphir Munk 		}
15643c4338a4SJiawei Wang 	}
15652eb4d010SOphir Munk 	if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
15662eb4d010SOphir Munk 		DRV_LOG(DEBUG,
15672eb4d010SOphir Munk 			"port %u extensive metadata register is not supported",
15682eb4d010SOphir Munk 			eth_dev->data->port_id);
1569a13ec19cSMichael Baum 		if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
15702eb4d010SOphir Munk 			DRV_LOG(ERR, "metadata mode %u is not supported "
15712eb4d010SOphir Munk 				     "(no metadata registers available)",
1572a13ec19cSMichael Baum 				     sh->config.dv_xmeta_en);
15732eb4d010SOphir Munk 			err = ENOTSUP;
15742eb4d010SOphir Munk 			goto error;
15752eb4d010SOphir Munk 		}
15762eb4d010SOphir Munk 	}
1577a13ec19cSMichael Baum 	if (sh->config.dv_flow_en &&
1578a13ec19cSMichael Baum 	    sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
15792eb4d010SOphir Munk 	    mlx5_flow_ext_mreg_supported(eth_dev) &&
15802eb4d010SOphir Munk 	    priv->sh->dv_regc0_mask) {
15812eb4d010SOphir Munk 		priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1582e69a5922SXueming Li 						      MLX5_FLOW_MREG_HTABLE_SZ,
1583961b6774SMatan Azrad 						      false, true, eth_dev,
1584f7f73ac1SXueming Li 						      flow_dv_mreg_create_cb,
1585f5b0aed2SSuanming Mou 						      flow_dv_mreg_match_cb,
1586961b6774SMatan Azrad 						      flow_dv_mreg_remove_cb,
1587961b6774SMatan Azrad 						      flow_dv_mreg_clone_cb,
1588961b6774SMatan Azrad 						    flow_dv_mreg_clone_free_cb);
15892eb4d010SOphir Munk 		if (!priv->mreg_cp_tbl) {
15902eb4d010SOphir Munk 			err = ENOMEM;
15912eb4d010SOphir Munk 			goto error;
15922eb4d010SOphir Munk 		}
15932eb4d010SOphir Munk 	}
1594cc608e4dSSuanming Mou 	rte_spinlock_init(&priv->shared_act_sl);
1595994829e6SSuanming Mou 	mlx5_flow_counter_mode_config(eth_dev);
159645633c46SSuanming Mou 	mlx5_flow_drop_action_config(eth_dev);
1597a13ec19cSMichael Baum 	if (sh->config.dv_flow_en)
15989fbe97f0SXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
15992eb4d010SOphir Munk 	return eth_dev;
16002eb4d010SOphir Munk error:
16012eb4d010SOphir Munk 	if (priv) {
16022eb4d010SOphir Munk 		if (priv->mreg_cp_tbl)
1603e69a5922SXueming Li 			mlx5_hlist_destroy(priv->mreg_cp_tbl);
16042eb4d010SOphir Munk 		if (priv->sh)
16052eb4d010SOphir Munk 			mlx5_os_free_shared_dr(priv);
16062eb4d010SOphir Munk 		if (priv->nl_socket_route >= 0)
16072eb4d010SOphir Munk 			close(priv->nl_socket_route);
16082eb4d010SOphir Munk 		if (priv->vmwa_context)
16092eb4d010SOphir Munk 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
161065b3cd0dSSuanming Mou 		if (eth_dev && priv->drop_queue.hrxq)
161165b3cd0dSSuanming Mou 			mlx5_drop_action_destroy(eth_dev);
1612a295c69aSShun Hao 		if (priv->mtr_profile_tbl)
1613a295c69aSShun Hao 			mlx5_l3t_destroy(priv->mtr_profile_tbl);
16142eb4d010SOphir Munk 		if (own_domain_id)
16152eb4d010SOphir Munk 			claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1616679f46c7SMatan Azrad 		if (priv->hrxqs)
1617679f46c7SMatan Azrad 			mlx5_list_destroy(priv->hrxqs);
1618db25cadcSViacheslav Ovsiienko 		if (eth_dev && priv->flex_item_map)
1619db25cadcSViacheslav Ovsiienko 			mlx5_flex_item_port_cleanup(eth_dev);
16202175c4dcSSuanming Mou 		mlx5_free(priv);
16212eb4d010SOphir Munk 		if (eth_dev != NULL)
16222eb4d010SOphir Munk 			eth_dev->data->dev_private = NULL;
16232eb4d010SOphir Munk 	}
16242eb4d010SOphir Munk 	if (eth_dev != NULL) {
16252eb4d010SOphir Munk 		/* mac_addrs must not be freed alone because part of
16262eb4d010SOphir Munk 		 * dev_private
16272eb4d010SOphir Munk 		 **/
16282eb4d010SOphir Munk 		eth_dev->data->mac_addrs = NULL;
16292eb4d010SOphir Munk 		rte_eth_dev_release_port(eth_dev);
16302eb4d010SOphir Munk 	}
16312eb4d010SOphir Munk 	if (sh)
163291389890SOphir Munk 		mlx5_free_shared_dev_ctx(sh);
16333fd2961eSXueming Li 	if (nl_rdma >= 0)
16343fd2961eSXueming Li 		close(nl_rdma);
16352eb4d010SOphir Munk 	MLX5_ASSERT(err > 0);
16362eb4d010SOphir Munk 	rte_errno = err;
16372eb4d010SOphir Munk 	return NULL;
16382eb4d010SOphir Munk }
16392eb4d010SOphir Munk 
16402eb4d010SOphir Munk /**
16412eb4d010SOphir Munk  * Comparison callback to sort device data.
16422eb4d010SOphir Munk  *
16432eb4d010SOphir Munk  * This is meant to be used with qsort().
16442eb4d010SOphir Munk  *
16452eb4d010SOphir Munk  * @param a[in]
16462eb4d010SOphir Munk  *   Pointer to pointer to first data object.
16472eb4d010SOphir Munk  * @param b[in]
16482eb4d010SOphir Munk  *   Pointer to pointer to second data object.
16492eb4d010SOphir Munk  *
16502eb4d010SOphir Munk  * @return
16512eb4d010SOphir Munk  *   0 if both objects are equal, less than 0 if the first argument is less
16522eb4d010SOphir Munk  *   than the second, greater than 0 otherwise.
16532eb4d010SOphir Munk  */
16542eb4d010SOphir Munk static int
16552eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b)
16562eb4d010SOphir Munk {
16572eb4d010SOphir Munk 	const struct mlx5_switch_info *si_a =
16582eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)a)->info;
16592eb4d010SOphir Munk 	const struct mlx5_switch_info *si_b =
16602eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)b)->info;
16612eb4d010SOphir Munk 	int ret;
16622eb4d010SOphir Munk 
16632eb4d010SOphir Munk 	/* Master device first. */
16642eb4d010SOphir Munk 	ret = si_b->master - si_a->master;
16652eb4d010SOphir Munk 	if (ret)
16662eb4d010SOphir Munk 		return ret;
16672eb4d010SOphir Munk 	/* Then representor devices. */
16682eb4d010SOphir Munk 	ret = si_b->representor - si_a->representor;
16692eb4d010SOphir Munk 	if (ret)
16702eb4d010SOphir Munk 		return ret;
16712eb4d010SOphir Munk 	/* Unidentified devices come last in no specific order. */
16722eb4d010SOphir Munk 	if (!si_a->representor)
16732eb4d010SOphir Munk 		return 0;
16742eb4d010SOphir Munk 	/* Order representors by name. */
16752eb4d010SOphir Munk 	return si_a->port_name - si_b->port_name;
16762eb4d010SOphir Munk }
16772eb4d010SOphir Munk 
16782eb4d010SOphir Munk /**
16792eb4d010SOphir Munk  * Match PCI information for possible slaves of bonding device.
16802eb4d010SOphir Munk  *
1681ca1418ceSMichael Baum  * @param[in] ibdev_name
1682ca1418ceSMichael Baum  *   Name of Infiniband device.
16832eb4d010SOphir Munk  * @param[in] pci_dev
1684f926cce3SXueming Li  *   Pointer to primary PCI address structure to match.
16852eb4d010SOphir Munk  * @param[in] nl_rdma
16862eb4d010SOphir Munk  *   Netlink RDMA group socket handle.
1687f926cce3SXueming Li  * @param[in] owner
1688ca1418ceSMichael Baum  *   Representor owner PF index.
1689f5f4c482SXueming Li  * @param[out] bond_info
1690f5f4c482SXueming Li  *   Pointer to bonding information.
16912eb4d010SOphir Munk  *
16922eb4d010SOphir Munk  * @return
16932eb4d010SOphir Munk  *   negative value if no bonding device found, otherwise
16942eb4d010SOphir Munk  *   positive index of slave PF in bonding.
16952eb4d010SOphir Munk  */
16962eb4d010SOphir Munk static int
1697ca1418ceSMichael Baum mlx5_device_bond_pci_match(const char *ibdev_name,
1698f926cce3SXueming Li 			   const struct rte_pci_addr *pci_dev,
1699f5f4c482SXueming Li 			   int nl_rdma, uint16_t owner,
1700f5f4c482SXueming Li 			   struct mlx5_bond_info *bond_info)
17012eb4d010SOphir Munk {
17022eb4d010SOphir Munk 	char ifname[IF_NAMESIZE + 1];
17032eb4d010SOphir Munk 	unsigned int ifindex;
17042eb4d010SOphir Munk 	unsigned int np, i;
1705f5f4c482SXueming Li 	FILE *bond_file = NULL, *file;
17062eb4d010SOphir Munk 	int pf = -1;
1707f5f4c482SXueming Li 	int ret;
17087299ab68SRongwei Liu 	uint8_t cur_guid[32] = {0};
17097299ab68SRongwei Liu 	uint8_t guid[32] = {0};
17102eb4d010SOphir Munk 
17112eb4d010SOphir Munk 	/*
1712ca1418ceSMichael Baum 	 * Try to get master device name. If something goes wrong suppose
1713ca1418ceSMichael Baum 	 * the lack of kernel support and no bonding devices.
17142eb4d010SOphir Munk 	 */
1715f5f4c482SXueming Li 	memset(bond_info, 0, sizeof(*bond_info));
17162eb4d010SOphir Munk 	if (nl_rdma < 0)
17172eb4d010SOphir Munk 		return -1;
1718ca1418ceSMichael Baum 	if (!strstr(ibdev_name, "bond"))
17192eb4d010SOphir Munk 		return -1;
1720ca1418ceSMichael Baum 	np = mlx5_nl_portnum(nl_rdma, ibdev_name);
17212eb4d010SOphir Munk 	if (!np)
17222eb4d010SOphir Munk 		return -1;
17237299ab68SRongwei Liu 	if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
17247299ab68SRongwei Liu 		return -1;
17252eb4d010SOphir Munk 	/*
1726ca1418ceSMichael Baum 	 * The master device might not be on the predefined port(not on port
1727ca1418ceSMichael Baum 	 * index 1, it is not guaranteed), we have to scan all Infiniband
1728ca1418ceSMichael Baum 	 * device ports and find master.
17292eb4d010SOphir Munk 	 */
17302eb4d010SOphir Munk 	for (i = 1; i <= np; ++i) {
17312eb4d010SOphir Munk 		/* Check whether Infiniband port is populated. */
1732ca1418ceSMichael Baum 		ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
17332eb4d010SOphir Munk 		if (!ifindex)
17342eb4d010SOphir Munk 			continue;
17352eb4d010SOphir Munk 		if (!if_indextoname(ifindex, ifname))
17362eb4d010SOphir Munk 			continue;
17372eb4d010SOphir Munk 		/* Try to read bonding slave names from sysfs. */
17382eb4d010SOphir Munk 		MKSTR(slaves,
17392eb4d010SOphir Munk 		      "/sys/class/net/%s/master/bonding/slaves", ifname);
1740f5f4c482SXueming Li 		bond_file = fopen(slaves, "r");
1741f5f4c482SXueming Li 		if (bond_file)
17422eb4d010SOphir Munk 			break;
17432eb4d010SOphir Munk 	}
1744f5f4c482SXueming Li 	if (!bond_file)
17452eb4d010SOphir Munk 		return -1;
17462eb4d010SOphir Munk 	/* Use safe format to check maximal buffer length. */
17472eb4d010SOphir Munk 	MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1748f5f4c482SXueming Li 	while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
17492eb4d010SOphir Munk 		char tmp_str[IF_NAMESIZE + 32];
17502eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
17512eb4d010SOphir Munk 		struct mlx5_switch_info	info;
17527299ab68SRongwei Liu 		int ret;
17532eb4d010SOphir Munk 
17542eb4d010SOphir Munk 		/* Process slave interface names in the loop. */
17552eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
17562eb4d010SOphir Munk 			 "/sys/class/net/%s", ifname);
17574d567938SThomas Monjalon 		if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1758ca1418ceSMichael Baum 			DRV_LOG(WARNING,
1759ca1418ceSMichael Baum 				"Cannot get PCI address for netdev \"%s\".",
1760ca1418ceSMichael Baum 				ifname);
17612eb4d010SOphir Munk 			continue;
17622eb4d010SOphir Munk 		}
17632eb4d010SOphir Munk 		/* Slave interface PCI address match found. */
17642eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
17652eb4d010SOphir Munk 			 "/sys/class/net/%s/phys_port_name", ifname);
17662eb4d010SOphir Munk 		file = fopen(tmp_str, "rb");
17672eb4d010SOphir Munk 		if (!file)
17682eb4d010SOphir Munk 			break;
17692eb4d010SOphir Munk 		info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
17702eb4d010SOphir Munk 		if (fscanf(file, "%32s", tmp_str) == 1)
17712eb4d010SOphir Munk 			mlx5_translate_port_name(tmp_str, &info);
1772f5f4c482SXueming Li 		fclose(file);
1773f5f4c482SXueming Li 		/* Only process PF ports. */
1774f5f4c482SXueming Li 		if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1775f5f4c482SXueming Li 		    info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1776f5f4c482SXueming Li 			continue;
1777f5f4c482SXueming Li 		/* Check max bonding member. */
1778f5f4c482SXueming Li 		if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1779f5f4c482SXueming Li 			DRV_LOG(WARNING, "bonding index out of range, "
1780f5f4c482SXueming Li 				"please increase MLX5_BOND_MAX_PORTS: %s",
1781f5f4c482SXueming Li 				tmp_str);
17822eb4d010SOphir Munk 			break;
17832eb4d010SOphir Munk 		}
1784f5f4c482SXueming Li 		/* Get ifindex. */
1785f5f4c482SXueming Li 		snprintf(tmp_str, sizeof(tmp_str),
1786f5f4c482SXueming Li 			 "/sys/class/net/%s/ifindex", ifname);
1787f5f4c482SXueming Li 		file = fopen(tmp_str, "rb");
1788f5f4c482SXueming Li 		if (!file)
1789f5f4c482SXueming Li 			break;
1790f5f4c482SXueming Li 		ret = fscanf(file, "%u", &ifindex);
17912eb4d010SOphir Munk 		fclose(file);
1792f5f4c482SXueming Li 		if (ret != 1)
1793f5f4c482SXueming Li 			break;
1794f5f4c482SXueming Li 		/* Save bonding info. */
1795f5f4c482SXueming Li 		strncpy(bond_info->ports[info.port_name].ifname, ifname,
1796f5f4c482SXueming Li 			sizeof(bond_info->ports[0].ifname));
1797f5f4c482SXueming Li 		bond_info->ports[info.port_name].pci_addr = pci_addr;
1798f5f4c482SXueming Li 		bond_info->ports[info.port_name].ifindex = ifindex;
1799f5f4c482SXueming Li 		bond_info->n_port++;
18007299ab68SRongwei Liu 		/*
18017299ab68SRongwei Liu 		 * Under socket direct mode, bonding will use
18027299ab68SRongwei Liu 		 * system_image_guid as identification.
18037299ab68SRongwei Liu 		 * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
18047299ab68SRongwei Liu 		 * All bonding members should have the same guid even if driver
18057299ab68SRongwei Liu 		 * is using PCIe BDF.
18067299ab68SRongwei Liu 		 */
18077299ab68SRongwei Liu 		ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
18087299ab68SRongwei Liu 		if (ret < 0)
18097299ab68SRongwei Liu 			break;
18107299ab68SRongwei Liu 		else if (ret > 0) {
18117299ab68SRongwei Liu 			if (!memcmp(guid, cur_guid, sizeof(guid)) &&
18127299ab68SRongwei Liu 			    owner == info.port_name &&
18137299ab68SRongwei Liu 			    (owner != 0 || (owner == 0 &&
18147299ab68SRongwei Liu 			    !rte_pci_addr_cmp(pci_dev, &pci_addr))))
18157299ab68SRongwei Liu 				pf = info.port_name;
18167299ab68SRongwei Liu 		} else if (pci_dev->domain == pci_addr.domain &&
18177299ab68SRongwei Liu 		    pci_dev->bus == pci_addr.bus &&
18187299ab68SRongwei Liu 		    pci_dev->devid == pci_addr.devid &&
18197299ab68SRongwei Liu 		    ((pci_dev->function == 0 &&
18207299ab68SRongwei Liu 		      pci_dev->function + owner == pci_addr.function) ||
18217299ab68SRongwei Liu 		     (pci_dev->function == owner &&
18227299ab68SRongwei Liu 		      pci_addr.function == owner)))
18237299ab68SRongwei Liu 			pf = info.port_name;
1824f5f4c482SXueming Li 	}
1825f5f4c482SXueming Li 	if (pf >= 0) {
1826f5f4c482SXueming Li 		/* Get bond interface info */
1827f5f4c482SXueming Li 		ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1828f5f4c482SXueming Li 					   bond_info->ifname);
1829f5f4c482SXueming Li 		if (ret)
1830f5f4c482SXueming Li 			DRV_LOG(ERR, "unable to get bond info: %s",
1831f5f4c482SXueming Li 				strerror(rte_errno));
1832f5f4c482SXueming Li 		else
1833f5f4c482SXueming Li 			DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1834f5f4c482SXueming Li 				ifindex, bond_info->ifindex, bond_info->ifname);
1835f5f4c482SXueming Li 	}
18367299ab68SRongwei Liu 	if (owner == 0 && pf != 0) {
18377299ab68SRongwei Liu 		DRV_LOG(INFO, "PCIe instance %04x:%02x:%02x.%x isn't bonding owner",
18387299ab68SRongwei Liu 				pci_dev->domain, pci_dev->bus, pci_dev->devid,
18397299ab68SRongwei Liu 				pci_dev->function);
18407299ab68SRongwei Liu 	}
18412eb4d010SOphir Munk 	return pf;
18422eb4d010SOphir Munk }
18432eb4d010SOphir Munk 
18442eb4d010SOphir Munk /**
184508c2772fSXueming Li  * Register a PCI device within bonding.
18462eb4d010SOphir Munk  *
184708c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device and
184808c2772fSXueming Li  * bonding owner PF index.
18492eb4d010SOphir Munk  *
18507af08c8fSMichael Baum  * @param[in] cdev
18517af08c8fSMichael Baum  *   Pointer to common mlx5 device structure.
185208c2772fSXueming Li  * @param[in] req_eth_da
185308c2772fSXueming Li  *   Requested ethdev device argument.
185408c2772fSXueming Li  * @param[in] owner_id
185508c2772fSXueming Li  *   Requested owner PF port ID within bonding device, default to 0.
1856a729d2f0SMichael Baum  * @param[in, out] mkvlist
1857a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
18582eb4d010SOphir Munk  *
18592eb4d010SOphir Munk  * @return
18602eb4d010SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
18612eb4d010SOphir Munk  */
186208c2772fSXueming Li static int
1863ca1418ceSMichael Baum mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
186408c2772fSXueming Li 		     struct rte_eth_devargs *req_eth_da,
1865a729d2f0SMichael Baum 		     uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist)
18662eb4d010SOphir Munk {
18672eb4d010SOphir Munk 	struct ibv_device **ibv_list;
18682eb4d010SOphir Munk 	/*
18692eb4d010SOphir Munk 	 * Number of found IB Devices matching with requested PCI BDF.
18702eb4d010SOphir Munk 	 * nd != 1 means there are multiple IB devices over the same
18712eb4d010SOphir Munk 	 * PCI device and we have representors and master.
18722eb4d010SOphir Munk 	 */
18732eb4d010SOphir Munk 	unsigned int nd = 0;
18742eb4d010SOphir Munk 	/*
18752eb4d010SOphir Munk 	 * Number of found IB device Ports. nd = 1 and np = 1..n means
18762eb4d010SOphir Munk 	 * we have the single multiport IB device, and there may be
18772eb4d010SOphir Munk 	 * representors attached to some of found ports.
18782eb4d010SOphir Munk 	 */
18792eb4d010SOphir Munk 	unsigned int np = 0;
18802eb4d010SOphir Munk 	/*
18812eb4d010SOphir Munk 	 * Number of DPDK ethernet devices to Spawn - either over
18822eb4d010SOphir Munk 	 * multiple IB devices or multiple ports of single IB device.
18832eb4d010SOphir Munk 	 * Actually this is the number of iterations to spawn.
18842eb4d010SOphir Munk 	 */
18852eb4d010SOphir Munk 	unsigned int ns = 0;
18862eb4d010SOphir Munk 	/*
18872eb4d010SOphir Munk 	 * Bonding device
18882eb4d010SOphir Munk 	 *   < 0 - no bonding device (single one)
18892eb4d010SOphir Munk 	 *  >= 0 - bonding device (value is slave PF index)
18902eb4d010SOphir Munk 	 */
18912eb4d010SOphir Munk 	int bd = -1;
18927af08c8fSMichael Baum 	struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
18932eb4d010SOphir Munk 	struct mlx5_dev_spawn_data *list = NULL;
189408c2772fSXueming Li 	struct rte_eth_devargs eth_da = *req_eth_da;
1895f926cce3SXueming Li 	struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
1896f5f4c482SXueming Li 	struct mlx5_bond_info bond_info;
1897f926cce3SXueming Li 	int ret = -1;
18982eb4d010SOphir Munk 
18992eb4d010SOphir Munk 	errno = 0;
19002eb4d010SOphir Munk 	ibv_list = mlx5_glue->get_device_list(&ret);
19012eb4d010SOphir Munk 	if (!ibv_list) {
19022eb4d010SOphir Munk 		rte_errno = errno ? errno : ENOSYS;
1903887183efSMichael Baum 		DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
19042eb4d010SOphir Munk 		return -rte_errno;
19052eb4d010SOphir Munk 	}
19062eb4d010SOphir Munk 	/*
19072eb4d010SOphir Munk 	 * First scan the list of all Infiniband devices to find
19082eb4d010SOphir Munk 	 * matching ones, gathering into the list.
19092eb4d010SOphir Munk 	 */
19102eb4d010SOphir Munk 	struct ibv_device *ibv_match[ret + 1];
19112eb4d010SOphir Munk 	int nl_route = mlx5_nl_init(NETLINK_ROUTE);
19122eb4d010SOphir Munk 	int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
19132eb4d010SOphir Munk 	unsigned int i;
19142eb4d010SOphir Munk 
19152eb4d010SOphir Munk 	while (ret-- > 0) {
19162eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
19172eb4d010SOphir Munk 
1918887183efSMichael Baum 		DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
1919ca1418ceSMichael Baum 		bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
1920ca1418ceSMichael Baum 						nl_rdma, owner_id, &bond_info);
19212eb4d010SOphir Munk 		if (bd >= 0) {
19222eb4d010SOphir Munk 			/*
19232eb4d010SOphir Munk 			 * Bonding device detected. Only one match is allowed,
19242eb4d010SOphir Munk 			 * the bonding is supported over multi-port IB device,
19252eb4d010SOphir Munk 			 * there should be no matches on representor PCI
19262eb4d010SOphir Munk 			 * functions or non VF LAG bonding devices with
19272eb4d010SOphir Munk 			 * specified address.
19282eb4d010SOphir Munk 			 */
19292eb4d010SOphir Munk 			if (nd) {
19302eb4d010SOphir Munk 				DRV_LOG(ERR,
19312eb4d010SOphir Munk 					"multiple PCI match on bonding device"
19322eb4d010SOphir Munk 					"\"%s\" found", ibv_list[ret]->name);
19332eb4d010SOphir Munk 				rte_errno = ENOENT;
19342eb4d010SOphir Munk 				ret = -rte_errno;
19352eb4d010SOphir Munk 				goto exit;
19362eb4d010SOphir Munk 			}
1937f926cce3SXueming Li 			/* Amend owner pci address if owner PF ID specified. */
1938f926cce3SXueming Li 			if (eth_da.nb_representor_ports)
193908c2772fSXueming Li 				owner_pci.function += owner_id;
1940ca1418ceSMichael Baum 			DRV_LOG(INFO,
1941ca1418ceSMichael Baum 				"PCI information matches for slave %d bonding device \"%s\"",
19422eb4d010SOphir Munk 				bd, ibv_list[ret]->name);
19432eb4d010SOphir Munk 			ibv_match[nd++] = ibv_list[ret];
19442eb4d010SOphir Munk 			break;
1945f926cce3SXueming Li 		} else {
1946f926cce3SXueming Li 			/* Bonding device not found. */
19474d567938SThomas Monjalon 			if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
19484d567938SThomas Monjalon 					      &pci_addr))
19492eb4d010SOphir Munk 				continue;
1950f926cce3SXueming Li 			if (owner_pci.domain != pci_addr.domain ||
1951f926cce3SXueming Li 			    owner_pci.bus != pci_addr.bus ||
1952f926cce3SXueming Li 			    owner_pci.devid != pci_addr.devid ||
1953f926cce3SXueming Li 			    owner_pci.function != pci_addr.function)
19542eb4d010SOphir Munk 				continue;
19552eb4d010SOphir Munk 			DRV_LOG(INFO, "PCI information matches for device \"%s\"",
19562eb4d010SOphir Munk 				ibv_list[ret]->name);
19572eb4d010SOphir Munk 			ibv_match[nd++] = ibv_list[ret];
19582eb4d010SOphir Munk 		}
1959f926cce3SXueming Li 	}
19602eb4d010SOphir Munk 	ibv_match[nd] = NULL;
19612eb4d010SOphir Munk 	if (!nd) {
19622eb4d010SOphir Munk 		/* No device matches, just complain and bail out. */
19632eb4d010SOphir Munk 		DRV_LOG(WARNING,
1964887183efSMichael Baum 			"No Verbs device matches PCI device " PCI_PRI_FMT ","
19652eb4d010SOphir Munk 			" are kernel drivers loaded?",
1966f926cce3SXueming Li 			owner_pci.domain, owner_pci.bus,
1967f926cce3SXueming Li 			owner_pci.devid, owner_pci.function);
19682eb4d010SOphir Munk 		rte_errno = ENOENT;
19692eb4d010SOphir Munk 		ret = -rte_errno;
19702eb4d010SOphir Munk 		goto exit;
19712eb4d010SOphir Munk 	}
19722eb4d010SOphir Munk 	if (nd == 1) {
19732eb4d010SOphir Munk 		/*
19742eb4d010SOphir Munk 		 * Found single matching device may have multiple ports.
19752eb4d010SOphir Munk 		 * Each port may be representor, we have to check the port
19762eb4d010SOphir Munk 		 * number and check the representors existence.
19772eb4d010SOphir Munk 		 */
19782eb4d010SOphir Munk 		if (nl_rdma >= 0)
19792eb4d010SOphir Munk 			np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
19802eb4d010SOphir Munk 		if (!np)
1981887183efSMichael Baum 			DRV_LOG(WARNING,
1982887183efSMichael Baum 				"Cannot get IB device \"%s\" ports number.",
1983887183efSMichael Baum 				ibv_match[0]->name);
19842eb4d010SOphir Munk 		if (bd >= 0 && !np) {
1985887183efSMichael Baum 			DRV_LOG(ERR, "Cannot get ports for bonding device.");
19862eb4d010SOphir Munk 			rte_errno = ENOENT;
19872eb4d010SOphir Munk 			ret = -rte_errno;
19882eb4d010SOphir Munk 			goto exit;
19892eb4d010SOphir Munk 		}
19902eb4d010SOphir Munk 	}
1991887183efSMichael Baum 	/* Now we can determine the maximal amount of devices to be spawned. */
19922175c4dcSSuanming Mou 	list = mlx5_malloc(MLX5_MEM_ZERO,
1993887183efSMichael Baum 			   sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
19942175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
19952eb4d010SOphir Munk 	if (!list) {
1996887183efSMichael Baum 		DRV_LOG(ERR, "Spawn data array allocation failure.");
19972eb4d010SOphir Munk 		rte_errno = ENOMEM;
19982eb4d010SOphir Munk 		ret = -rte_errno;
19992eb4d010SOphir Munk 		goto exit;
20002eb4d010SOphir Munk 	}
20012eb4d010SOphir Munk 	if (bd >= 0 || np > 1) {
20022eb4d010SOphir Munk 		/*
20032eb4d010SOphir Munk 		 * Single IB device with multiple ports found,
20042eb4d010SOphir Munk 		 * it may be E-Switch master device and representors.
20052eb4d010SOphir Munk 		 * We have to perform identification through the ports.
20062eb4d010SOphir Munk 		 */
20072eb4d010SOphir Munk 		MLX5_ASSERT(nl_rdma >= 0);
20082eb4d010SOphir Munk 		MLX5_ASSERT(ns == 0);
20092eb4d010SOphir Munk 		MLX5_ASSERT(nd == 1);
20102eb4d010SOphir Munk 		MLX5_ASSERT(np);
20112eb4d010SOphir Munk 		for (i = 1; i <= np; ++i) {
2012f5f4c482SXueming Li 			list[ns].bond_info = &bond_info;
20132eb4d010SOphir Munk 			list[ns].max_port = np;
2014834a9019SOphir Munk 			list[ns].phys_port = i;
2015887183efSMichael Baum 			list[ns].phys_dev_name = ibv_match[0]->name;
20162eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
20172eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
20187af08c8fSMichael Baum 			list[ns].cdev = cdev;
20192eb4d010SOphir Munk 			list[ns].pf_bond = bd;
2020887183efSMichael Baum 			list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2021887183efSMichael Baum 							   ibv_match[0]->name,
2022887183efSMichael Baum 							   i);
20232eb4d010SOphir Munk 			if (!list[ns].ifindex) {
20242eb4d010SOphir Munk 				/*
20252eb4d010SOphir Munk 				 * No network interface index found for the
20262eb4d010SOphir Munk 				 * specified port, it means there is no
20272eb4d010SOphir Munk 				 * representor on this port. It's OK,
20282eb4d010SOphir Munk 				 * there can be disabled ports, for example
20292eb4d010SOphir Munk 				 * if sriov_numvfs < sriov_totalvfs.
20302eb4d010SOphir Munk 				 */
20312eb4d010SOphir Munk 				continue;
20322eb4d010SOphir Munk 			}
20332eb4d010SOphir Munk 			ret = -1;
20342eb4d010SOphir Munk 			if (nl_route >= 0)
2035887183efSMichael Baum 				ret = mlx5_nl_switch_info(nl_route,
20362eb4d010SOphir Munk 							  list[ns].ifindex,
20372eb4d010SOphir Munk 							  &list[ns].info);
20382eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
20392eb4d010SOphir Munk 				    !list[ns].info.master)) {
20402eb4d010SOphir Munk 				/*
20412eb4d010SOphir Munk 				 * We failed to recognize representors with
20422eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
20432eb4d010SOphir Munk 				 * with sysfs.
20442eb4d010SOphir Munk 				 */
2045887183efSMichael Baum 				ret = mlx5_sysfs_switch_info(list[ns].ifindex,
20462eb4d010SOphir Munk 							     &list[ns].info);
20472eb4d010SOphir Munk 			}
20482eb4d010SOphir Munk 			if (!ret && bd >= 0) {
20492eb4d010SOphir Munk 				switch (list[ns].info.name_type) {
20502eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
20519f430dd7SViacheslav Ovsiienko 					if (np == 1) {
20529f430dd7SViacheslav Ovsiienko 						/*
20539f430dd7SViacheslav Ovsiienko 						 * Force standalone bonding
20549f430dd7SViacheslav Ovsiienko 						 * device for ROCE LAG
20557be78d02SJosh Soref 						 * configurations.
20569f430dd7SViacheslav Ovsiienko 						 */
20579f430dd7SViacheslav Ovsiienko 						list[ns].info.master = 0;
20589f430dd7SViacheslav Ovsiienko 						list[ns].info.representor = 0;
20599f430dd7SViacheslav Ovsiienko 					}
20602eb4d010SOphir Munk 					if (list[ns].info.port_name == bd)
20612eb4d010SOphir Munk 						ns++;
20622eb4d010SOphir Munk 					break;
2063420bbdaeSViacheslav Ovsiienko 				case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2064420bbdaeSViacheslav Ovsiienko 					/* Fallthrough */
20652eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2066cb95feefSXueming Li 					/* Fallthrough */
2067cb95feefSXueming Li 				case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
20682eb4d010SOphir Munk 					if (list[ns].info.pf_num == bd)
20692eb4d010SOphir Munk 						ns++;
20702eb4d010SOphir Munk 					break;
20712eb4d010SOphir Munk 				default:
20722eb4d010SOphir Munk 					break;
20732eb4d010SOphir Munk 				}
20742eb4d010SOphir Munk 				continue;
20752eb4d010SOphir Munk 			}
20762eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
20772eb4d010SOphir Munk 				     list[ns].info.master))
20782eb4d010SOphir Munk 				ns++;
20792eb4d010SOphir Munk 		}
20802eb4d010SOphir Munk 		if (!ns) {
20812eb4d010SOphir Munk 			DRV_LOG(ERR,
2082887183efSMichael Baum 				"Unable to recognize master/representors on the IB device with multiple ports.");
20832eb4d010SOphir Munk 			rte_errno = ENOENT;
20842eb4d010SOphir Munk 			ret = -rte_errno;
20852eb4d010SOphir Munk 			goto exit;
20862eb4d010SOphir Munk 		}
20872eb4d010SOphir Munk 	} else {
20882eb4d010SOphir Munk 		/*
20892eb4d010SOphir Munk 		 * The existence of several matching entries (nd > 1) means
20902eb4d010SOphir Munk 		 * port representors have been instantiated. No existing Verbs
20912eb4d010SOphir Munk 		 * call nor sysfs entries can tell them apart, this can only
20922eb4d010SOphir Munk 		 * be done through Netlink calls assuming kernel drivers are
20932eb4d010SOphir Munk 		 * recent enough to support them.
20942eb4d010SOphir Munk 		 *
20952eb4d010SOphir Munk 		 * In the event of identification failure through Netlink,
20962eb4d010SOphir Munk 		 * try again through sysfs, then:
20972eb4d010SOphir Munk 		 *
20982eb4d010SOphir Munk 		 * 1. A single IB device matches (nd == 1) with single
20992eb4d010SOphir Munk 		 *    port (np=0/1) and is not a representor, assume
21002eb4d010SOphir Munk 		 *    no switch support.
21012eb4d010SOphir Munk 		 *
21022eb4d010SOphir Munk 		 * 2. Otherwise no safe assumptions can be made;
21032eb4d010SOphir Munk 		 *    complain louder and bail out.
21042eb4d010SOphir Munk 		 */
21052eb4d010SOphir Munk 		for (i = 0; i != nd; ++i) {
21062eb4d010SOphir Munk 			memset(&list[ns].info, 0, sizeof(list[ns].info));
2107f5f4c482SXueming Li 			list[ns].bond_info = NULL;
21082eb4d010SOphir Munk 			list[ns].max_port = 1;
2109834a9019SOphir Munk 			list[ns].phys_port = 1;
2110887183efSMichael Baum 			list[ns].phys_dev_name = ibv_match[i]->name;
21112eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
21122eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
21137af08c8fSMichael Baum 			list[ns].cdev = cdev;
21142eb4d010SOphir Munk 			list[ns].pf_bond = -1;
21152eb4d010SOphir Munk 			list[ns].ifindex = 0;
21162eb4d010SOphir Munk 			if (nl_rdma >= 0)
21172eb4d010SOphir Munk 				list[ns].ifindex = mlx5_nl_ifindex
2118834a9019SOphir Munk 							    (nl_rdma,
2119887183efSMichael Baum 							     ibv_match[i]->name,
2120887183efSMichael Baum 							     1);
21212eb4d010SOphir Munk 			if (!list[ns].ifindex) {
21222eb4d010SOphir Munk 				char ifname[IF_NAMESIZE];
21232eb4d010SOphir Munk 
21242eb4d010SOphir Munk 				/*
21252eb4d010SOphir Munk 				 * Netlink failed, it may happen with old
21262eb4d010SOphir Munk 				 * ib_core kernel driver (before 4.16).
21272eb4d010SOphir Munk 				 * We can assume there is old driver because
21282eb4d010SOphir Munk 				 * here we are processing single ports IB
21292eb4d010SOphir Munk 				 * devices. Let's try sysfs to retrieve
21302eb4d010SOphir Munk 				 * the ifindex. The method works for
21312eb4d010SOphir Munk 				 * master device only.
21322eb4d010SOphir Munk 				 */
21332eb4d010SOphir Munk 				if (nd > 1) {
21342eb4d010SOphir Munk 					/*
21352eb4d010SOphir Munk 					 * Multiple devices found, assume
21362eb4d010SOphir Munk 					 * representors, can not distinguish
21372eb4d010SOphir Munk 					 * master/representor and retrieve
21382eb4d010SOphir Munk 					 * ifindex via sysfs.
21392eb4d010SOphir Munk 					 */
21402eb4d010SOphir Munk 					continue;
21412eb4d010SOphir Munk 				}
2142aec086c9SMatan Azrad 				ret = mlx5_get_ifname_sysfs
2143aec086c9SMatan Azrad 					(ibv_match[i]->ibdev_path, ifname);
21442eb4d010SOphir Munk 				if (!ret)
21452eb4d010SOphir Munk 					list[ns].ifindex =
21462eb4d010SOphir Munk 						if_nametoindex(ifname);
21472eb4d010SOphir Munk 				if (!list[ns].ifindex) {
21482eb4d010SOphir Munk 					/*
21492eb4d010SOphir Munk 					 * No network interface index found
21502eb4d010SOphir Munk 					 * for the specified device, it means
21512eb4d010SOphir Munk 					 * there it is neither representor
21522eb4d010SOphir Munk 					 * nor master.
21532eb4d010SOphir Munk 					 */
21542eb4d010SOphir Munk 					continue;
21552eb4d010SOphir Munk 				}
21562eb4d010SOphir Munk 			}
21572eb4d010SOphir Munk 			ret = -1;
21582eb4d010SOphir Munk 			if (nl_route >= 0)
2159ca1418ceSMichael Baum 				ret = mlx5_nl_switch_info(nl_route,
21602eb4d010SOphir Munk 							  list[ns].ifindex,
21612eb4d010SOphir Munk 							  &list[ns].info);
21622eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
21632eb4d010SOphir Munk 				    !list[ns].info.master)) {
21642eb4d010SOphir Munk 				/*
21652eb4d010SOphir Munk 				 * We failed to recognize representors with
21662eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
21672eb4d010SOphir Munk 				 * with sysfs.
21682eb4d010SOphir Munk 				 */
2169887183efSMichael Baum 				ret = mlx5_sysfs_switch_info(list[ns].ifindex,
21702eb4d010SOphir Munk 							     &list[ns].info);
21712eb4d010SOphir Munk 			}
21722eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
21732eb4d010SOphir Munk 				     list[ns].info.master)) {
21742eb4d010SOphir Munk 				ns++;
21752eb4d010SOphir Munk 			} else if ((nd == 1) &&
21762eb4d010SOphir Munk 				   !list[ns].info.representor &&
21772eb4d010SOphir Munk 				   !list[ns].info.master) {
21782eb4d010SOphir Munk 				/*
2179887183efSMichael Baum 				 * Single IB device with one physical port and
21802eb4d010SOphir Munk 				 * attached network device.
2181887183efSMichael Baum 				 * May be SRIOV is not enabled or there is no
2182887183efSMichael Baum 				 * representors.
21832eb4d010SOphir Munk 				 */
2184887183efSMichael Baum 				DRV_LOG(INFO, "No E-Switch support detected.");
21852eb4d010SOphir Munk 				ns++;
21862eb4d010SOphir Munk 				break;
21872eb4d010SOphir Munk 			}
21882eb4d010SOphir Munk 		}
21892eb4d010SOphir Munk 		if (!ns) {
21902eb4d010SOphir Munk 			DRV_LOG(ERR,
2191887183efSMichael Baum 				"Unable to recognize master/representors on the multiple IB devices.");
21922eb4d010SOphir Munk 			rte_errno = ENOENT;
21932eb4d010SOphir Munk 			ret = -rte_errno;
21942eb4d010SOphir Munk 			goto exit;
21952eb4d010SOphir Munk 		}
21966b157f3bSViacheslav Ovsiienko 		/*
21976b157f3bSViacheslav Ovsiienko 		 * New kernels may add the switch_id attribute for the case
2198ca1418ceSMichael Baum 		 * there is no E-Switch and we wrongly recognized the only
2199ca1418ceSMichael Baum 		 * device as master. Override this if there is the single
2200ca1418ceSMichael Baum 		 * device with single port and new device name format present.
22016b157f3bSViacheslav Ovsiienko 		 */
22026b157f3bSViacheslav Ovsiienko 		if (nd == 1 &&
22036b157f3bSViacheslav Ovsiienko 		    list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
22046b157f3bSViacheslav Ovsiienko 			list[0].info.master = 0;
22056b157f3bSViacheslav Ovsiienko 			list[0].info.representor = 0;
22066b157f3bSViacheslav Ovsiienko 		}
22072eb4d010SOphir Munk 	}
22082eb4d010SOphir Munk 	MLX5_ASSERT(ns);
22092eb4d010SOphir Munk 	/*
22102eb4d010SOphir Munk 	 * Sort list to probe devices in natural order for users convenience
22112eb4d010SOphir Munk 	 * (i.e. master first, then representors from lowest to highest ID).
22122eb4d010SOphir Munk 	 */
22132eb4d010SOphir Munk 	qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2214f926cce3SXueming Li 	if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2215f926cce3SXueming Li 		/* Set devargs default values. */
2216f926cce3SXueming Li 		if (eth_da.nb_mh_controllers == 0) {
2217f926cce3SXueming Li 			eth_da.nb_mh_controllers = 1;
2218f926cce3SXueming Li 			eth_da.mh_controllers[0] = 0;
2219f926cce3SXueming Li 		}
2220f926cce3SXueming Li 		if (eth_da.nb_ports == 0 && ns > 0) {
2221f926cce3SXueming Li 			if (list[0].pf_bond >= 0 && list[0].info.representor)
2222f926cce3SXueming Li 				DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2223f926cce3SXueming Li 					pci_dev->device.devargs->args);
2224f926cce3SXueming Li 			eth_da.nb_ports = 1;
2225f926cce3SXueming Li 			eth_da.ports[0] = list[0].info.pf_num;
2226f926cce3SXueming Li 		}
2227f926cce3SXueming Li 		if (eth_da.nb_representor_ports == 0) {
2228f926cce3SXueming Li 			eth_da.nb_representor_ports = 1;
2229f926cce3SXueming Li 			eth_da.representor_ports[0] = 0;
2230f926cce3SXueming Li 		}
2231f926cce3SXueming Li 	}
22322eb4d010SOphir Munk 	for (i = 0; i != ns; ++i) {
22332eb4d010SOphir Munk 		uint32_t restore;
22342eb4d010SOphir Munk 
2235a729d2f0SMichael Baum 		list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], &eth_da,
2236a729d2f0SMichael Baum 						 mkvlist);
22372eb4d010SOphir Munk 		if (!list[i].eth_dev) {
22382eb4d010SOphir Munk 			if (rte_errno != EBUSY && rte_errno != EEXIST)
22392eb4d010SOphir Munk 				break;
22402eb4d010SOphir Munk 			/* Device is disabled or already spawned. Ignore it. */
22412eb4d010SOphir Munk 			continue;
22422eb4d010SOphir Munk 		}
22432eb4d010SOphir Munk 		restore = list[i].eth_dev->data->dev_flags;
22442eb4d010SOphir Munk 		rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2245494d6863SGregory Etelson 		/**
2246494d6863SGregory Etelson 		 * Each representor has a dedicated interrupts vector.
2247494d6863SGregory Etelson 		 * rte_eth_copy_pci_info() assigns PF interrupts handle to
2248494d6863SGregory Etelson 		 * representor eth_dev object because representor and PF
2249494d6863SGregory Etelson 		 * share the same PCI address.
2250494d6863SGregory Etelson 		 * Override representor device with a dedicated
2251494d6863SGregory Etelson 		 * interrupts handle here.
2252494d6863SGregory Etelson 		 * Representor interrupts handle is released in mlx5_dev_stop().
2253494d6863SGregory Etelson 		 */
2254494d6863SGregory Etelson 		if (list[i].info.representor) {
2255d61138d4SHarman Kalra 			struct rte_intr_handle *intr_handle =
2256d61138d4SHarman Kalra 				rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2257d61138d4SHarman Kalra 			if (intr_handle == NULL) {
2258494d6863SGregory Etelson 				DRV_LOG(ERR,
2259494d6863SGregory Etelson 					"port %u failed to allocate memory for interrupt handler "
2260494d6863SGregory Etelson 					"Rx interrupts will not be supported",
2261494d6863SGregory Etelson 					i);
2262494d6863SGregory Etelson 				rte_errno = ENOMEM;
2263494d6863SGregory Etelson 				ret = -rte_errno;
2264494d6863SGregory Etelson 				goto exit;
2265494d6863SGregory Etelson 			}
2266494d6863SGregory Etelson 			list[i].eth_dev->intr_handle = intr_handle;
2267494d6863SGregory Etelson 		}
22682eb4d010SOphir Munk 		/* Restore non-PCI flags cleared by the above call. */
22692eb4d010SOphir Munk 		list[i].eth_dev->data->dev_flags |= restore;
22702eb4d010SOphir Munk 		rte_eth_dev_probing_finish(list[i].eth_dev);
22712eb4d010SOphir Munk 	}
22722eb4d010SOphir Munk 	if (i != ns) {
22732eb4d010SOphir Munk 		DRV_LOG(ERR,
22742eb4d010SOphir Munk 			"probe of PCI device " PCI_PRI_FMT " aborted after"
22752eb4d010SOphir Munk 			" encountering an error: %s",
2276f926cce3SXueming Li 			owner_pci.domain, owner_pci.bus,
2277f926cce3SXueming Li 			owner_pci.devid, owner_pci.function,
22782eb4d010SOphir Munk 			strerror(rte_errno));
22792eb4d010SOphir Munk 		ret = -rte_errno;
22802eb4d010SOphir Munk 		/* Roll back. */
22812eb4d010SOphir Munk 		while (i--) {
22822eb4d010SOphir Munk 			if (!list[i].eth_dev)
22832eb4d010SOphir Munk 				continue;
22842eb4d010SOphir Munk 			mlx5_dev_close(list[i].eth_dev);
22852eb4d010SOphir Munk 			/* mac_addrs must not be freed because in dev_private */
22862eb4d010SOphir Munk 			list[i].eth_dev->data->mac_addrs = NULL;
22872eb4d010SOphir Munk 			claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
22882eb4d010SOphir Munk 		}
22892eb4d010SOphir Munk 		/* Restore original error. */
22902eb4d010SOphir Munk 		rte_errno = -ret;
22912eb4d010SOphir Munk 	} else {
22922eb4d010SOphir Munk 		ret = 0;
22932eb4d010SOphir Munk 	}
22942eb4d010SOphir Munk exit:
22952eb4d010SOphir Munk 	/*
22962eb4d010SOphir Munk 	 * Do the routine cleanup:
22972eb4d010SOphir Munk 	 * - close opened Netlink sockets
22982eb4d010SOphir Munk 	 * - free allocated spawn data array
22992eb4d010SOphir Munk 	 * - free the Infiniband device list
23002eb4d010SOphir Munk 	 */
23012eb4d010SOphir Munk 	if (nl_rdma >= 0)
23022eb4d010SOphir Munk 		close(nl_rdma);
23032eb4d010SOphir Munk 	if (nl_route >= 0)
23042eb4d010SOphir Munk 		close(nl_route);
23052eb4d010SOphir Munk 	if (list)
23062175c4dcSSuanming Mou 		mlx5_free(list);
23072eb4d010SOphir Munk 	MLX5_ASSERT(ibv_list);
23082eb4d010SOphir Munk 	mlx5_glue->free_device_list(ibv_list);
23092eb4d010SOphir Munk 	return ret;
23102eb4d010SOphir Munk }
23112eb4d010SOphir Munk 
2312919488fbSXueming Li static int
2313919488fbSXueming Li mlx5_os_parse_eth_devargs(struct rte_device *dev,
2314919488fbSXueming Li 			  struct rte_eth_devargs *eth_da)
2315919488fbSXueming Li {
2316919488fbSXueming Li 	int ret = 0;
2317919488fbSXueming Li 
2318919488fbSXueming Li 	if (dev->devargs == NULL)
2319919488fbSXueming Li 		return 0;
2320919488fbSXueming Li 	memset(eth_da, 0, sizeof(*eth_da));
2321919488fbSXueming Li 	/* Parse representor information first from class argument. */
2322919488fbSXueming Li 	if (dev->devargs->cls_str)
2323919488fbSXueming Li 		ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2324919488fbSXueming Li 	if (ret != 0) {
2325919488fbSXueming Li 		DRV_LOG(ERR, "failed to parse device arguments: %s",
2326919488fbSXueming Li 			dev->devargs->cls_str);
2327919488fbSXueming Li 		return -rte_errno;
2328919488fbSXueming Li 	}
2329919488fbSXueming Li 	if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2330919488fbSXueming Li 		/* Parse legacy device argument */
2331919488fbSXueming Li 		ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2332919488fbSXueming Li 		if (ret) {
2333919488fbSXueming Li 			DRV_LOG(ERR, "failed to parse device arguments: %s",
2334919488fbSXueming Li 				dev->devargs->args);
2335919488fbSXueming Li 			return -rte_errno;
2336919488fbSXueming Li 		}
2337919488fbSXueming Li 	}
2338919488fbSXueming Li 	return 0;
2339919488fbSXueming Li }
2340919488fbSXueming Li 
234108c2772fSXueming Li /**
2342a7f34989SXueming Li  * Callback to register a PCI device.
234308c2772fSXueming Li  *
234408c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device.
234508c2772fSXueming Li  *
23467af08c8fSMichael Baum  * @param[in] cdev
23477af08c8fSMichael Baum  *   Pointer to common mlx5 device structure.
2348a729d2f0SMichael Baum  * @param[in, out] mkvlist
2349a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
235008c2772fSXueming Li  *
235108c2772fSXueming Li  * @return
235208c2772fSXueming Li  *   0 on success, a negative errno value otherwise and rte_errno is set.
235308c2772fSXueming Li  */
2354a7f34989SXueming Li static int
2355a729d2f0SMichael Baum mlx5_os_pci_probe(struct mlx5_common_device *cdev,
2356a729d2f0SMichael Baum 		  struct mlx5_kvargs_ctrl *mkvlist)
235708c2772fSXueming Li {
23587af08c8fSMichael Baum 	struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2359919488fbSXueming Li 	struct rte_eth_devargs eth_da = { .nb_ports = 0 };
236008c2772fSXueming Li 	int ret = 0;
236108c2772fSXueming Li 	uint16_t p;
236208c2772fSXueming Li 
23637af08c8fSMichael Baum 	ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2364919488fbSXueming Li 	if (ret != 0)
2365919488fbSXueming Li 		return ret;
236608c2772fSXueming Li 
236708c2772fSXueming Li 	if (eth_da.nb_ports > 0) {
236808c2772fSXueming Li 		/* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
23696856efa5SMichael Baum 		for (p = 0; p < eth_da.nb_ports; p++) {
2370ca1418ceSMichael Baum 			ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2371a729d2f0SMichael Baum 						   eth_da.ports[p], mkvlist);
23726856efa5SMichael Baum 			if (ret)
23736856efa5SMichael Baum 				break;
23746856efa5SMichael Baum 		}
23756856efa5SMichael Baum 		if (ret) {
23766856efa5SMichael Baum 			DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
23777be78d02SJosh Soref 				"aborted due to prodding failure of PF %u",
23786856efa5SMichael Baum 				pci_dev->addr.domain, pci_dev->addr.bus,
23796856efa5SMichael Baum 				pci_dev->addr.devid, pci_dev->addr.function,
23806856efa5SMichael Baum 				eth_da.ports[p]);
23817af08c8fSMichael Baum 			mlx5_net_remove(cdev);
23826856efa5SMichael Baum 		}
238308c2772fSXueming Li 	} else {
2384a729d2f0SMichael Baum 		ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0, mkvlist);
238508c2772fSXueming Li 	}
238608c2772fSXueming Li 	return ret;
238708c2772fSXueming Li }
238808c2772fSXueming Li 
2389919488fbSXueming Li /* Probe a single SF device on auxiliary bus, no representor support. */
2390919488fbSXueming Li static int
2391a729d2f0SMichael Baum mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev,
2392a729d2f0SMichael Baum 			struct mlx5_kvargs_ctrl *mkvlist)
2393919488fbSXueming Li {
2394919488fbSXueming Li 	struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2395919488fbSXueming Li 	struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
23967af08c8fSMichael Baum 	struct rte_device *dev = cdev->dev;
2397919488fbSXueming Li 	struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2398919488fbSXueming Li 	struct rte_eth_dev *eth_dev;
2399919488fbSXueming Li 	int ret = 0;
2400919488fbSXueming Li 
2401919488fbSXueming Li 	/* Parse ethdev devargs. */
2402919488fbSXueming Li 	ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2403919488fbSXueming Li 	if (ret != 0)
2404919488fbSXueming Li 		return ret;
2405919488fbSXueming Li 	/* Init spawn data. */
2406919488fbSXueming Li 	spawn.max_port = 1;
2407919488fbSXueming Li 	spawn.phys_port = 1;
2408ca1418ceSMichael Baum 	spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2409919488fbSXueming Li 	ret = mlx5_auxiliary_get_ifindex(dev->name);
2410919488fbSXueming Li 	if (ret < 0) {
2411919488fbSXueming Li 		DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2412919488fbSXueming Li 		return ret;
2413919488fbSXueming Li 	}
2414919488fbSXueming Li 	spawn.ifindex = ret;
24157af08c8fSMichael Baum 	spawn.cdev = cdev;
2416919488fbSXueming Li 	/* Spawn device. */
2417a729d2f0SMichael Baum 	eth_dev = mlx5_dev_spawn(dev, &spawn, &eth_da, mkvlist);
2418919488fbSXueming Li 	if (eth_dev == NULL)
2419919488fbSXueming Li 		return -rte_errno;
2420919488fbSXueming Li 	/* Post create. */
2421d61138d4SHarman Kalra 	eth_dev->intr_handle = adev->intr_handle;
2422919488fbSXueming Li 	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2423919488fbSXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2424919488fbSXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2425919488fbSXueming Li 		eth_dev->data->numa_node = dev->numa_node;
2426919488fbSXueming Li 	}
2427919488fbSXueming Li 	rte_eth_dev_probing_finish(eth_dev);
2428919488fbSXueming Li 	return 0;
2429919488fbSXueming Li }
2430919488fbSXueming Li 
2431a7f34989SXueming Li /**
2432a7f34989SXueming Li  * Net class driver callback to probe a device.
2433a7f34989SXueming Li  *
2434919488fbSXueming Li  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2435a7f34989SXueming Li  *
24367af08c8fSMichael Baum  * @param[in] cdev
24377af08c8fSMichael Baum  *   Pointer to the common mlx5 device.
2438a729d2f0SMichael Baum  * @param[in, out] mkvlist
2439a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2440a7f34989SXueming Li  *
2441a7f34989SXueming Li  * @return
24427af08c8fSMichael Baum  *   0 on success, a negative errno value otherwise and rte_errno is set.
2443a7f34989SXueming Li  */
2444a7f34989SXueming Li int
2445a729d2f0SMichael Baum mlx5_os_net_probe(struct mlx5_common_device *cdev,
2446a729d2f0SMichael Baum 		  struct mlx5_kvargs_ctrl *mkvlist)
2447a7f34989SXueming Li {
2448a7f34989SXueming Li 	int ret;
2449a7f34989SXueming Li 
2450ca1418ceSMichael Baum 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2451a7f34989SXueming Li 		mlx5_pmd_socket_init();
2452a7f34989SXueming Li 	ret = mlx5_init_once();
2453a7f34989SXueming Li 	if (ret) {
24547af08c8fSMichael Baum 		DRV_LOG(ERR, "Unable to init PMD global data: %s",
2455a7f34989SXueming Li 			strerror(rte_errno));
2456a7f34989SXueming Li 		return -rte_errno;
2457a7f34989SXueming Li 	}
2458a729d2f0SMichael Baum 	ret = mlx5_probe_again_args_validate(cdev, mkvlist);
2459a13ec19cSMichael Baum 	if (ret) {
2460a13ec19cSMichael Baum 		DRV_LOG(ERR, "Probe again parameters are not compatible : %s",
2461a13ec19cSMichael Baum 			strerror(rte_errno));
2462a13ec19cSMichael Baum 		return -rte_errno;
2463a13ec19cSMichael Baum 	}
24647af08c8fSMichael Baum 	if (mlx5_dev_is_pci(cdev->dev))
2465a729d2f0SMichael Baum 		return mlx5_os_pci_probe(cdev, mkvlist);
2466919488fbSXueming Li 	else
2467a729d2f0SMichael Baum 		return mlx5_os_auxiliary_probe(cdev, mkvlist);
24682eb4d010SOphir Munk }
24692eb4d010SOphir Munk 
24702eb4d010SOphir Munk /**
2471ea823b2cSDmitry Kozlyuk  * Cleanup resources when the last device is closed.
2472ea823b2cSDmitry Kozlyuk  */
2473ea823b2cSDmitry Kozlyuk void
2474ea823b2cSDmitry Kozlyuk mlx5_os_net_cleanup(void)
2475ea823b2cSDmitry Kozlyuk {
2476ea823b2cSDmitry Kozlyuk 	mlx5_pmd_socket_uninit();
2477ea823b2cSDmitry Kozlyuk }
2478ea823b2cSDmitry Kozlyuk 
2479ea823b2cSDmitry Kozlyuk /**
24802eb4d010SOphir Munk  * Install shared asynchronous device events handler.
24812eb4d010SOphir Munk  * This function is implemented to support event sharing
24822eb4d010SOphir Munk  * between multiple ports of single IB device.
24832eb4d010SOphir Munk  *
24842eb4d010SOphir Munk  * @param sh
24852eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
24862eb4d010SOphir Munk  */
24872eb4d010SOphir Munk void
24882eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
24892eb4d010SOphir Munk {
24902eb4d010SOphir Munk 	int ret;
24912eb4d010SOphir Munk 	int flags;
2492ca1418ceSMichael Baum 	struct ibv_context *ctx = sh->cdev->ctx;
24932eb4d010SOphir Munk 
2494d61138d4SHarman Kalra 	sh->intr_handle = rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2495d61138d4SHarman Kalra 	if (sh->intr_handle == NULL) {
2496d61138d4SHarman Kalra 		DRV_LOG(ERR, "Fail to allocate intr_handle");
2497d61138d4SHarman Kalra 		rte_errno = ENOMEM;
2498d61138d4SHarman Kalra 		return;
2499d61138d4SHarman Kalra 	}
2500d61138d4SHarman Kalra 	rte_intr_fd_set(sh->intr_handle, -1);
2501d61138d4SHarman Kalra 
2502ca1418ceSMichael Baum 	flags = fcntl(ctx->async_fd, F_GETFL);
2503ca1418ceSMichael Baum 	ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
25042eb4d010SOphir Munk 	if (ret) {
25052eb4d010SOphir Munk 		DRV_LOG(INFO, "failed to change file descriptor async event"
25062eb4d010SOphir Munk 			" queue");
25072eb4d010SOphir Munk 	} else {
2508d61138d4SHarman Kalra 		rte_intr_fd_set(sh->intr_handle, ctx->async_fd);
2509d61138d4SHarman Kalra 		rte_intr_type_set(sh->intr_handle, RTE_INTR_HANDLE_EXT);
2510d61138d4SHarman Kalra 		if (rte_intr_callback_register(sh->intr_handle,
25112eb4d010SOphir Munk 					mlx5_dev_interrupt_handler, sh)) {
25122eb4d010SOphir Munk 			DRV_LOG(INFO, "Fail to install the shared interrupt.");
2513d61138d4SHarman Kalra 			rte_intr_fd_set(sh->intr_handle, -1);
25142eb4d010SOphir Munk 		}
25152eb4d010SOphir Munk 	}
25166dc0cbc6SMichael Baum 	if (sh->cdev->config.devx) {
25172eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
2518d61138d4SHarman Kalra 		sh->intr_handle_devx =
2519d61138d4SHarman Kalra 			rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2520d61138d4SHarman Kalra 		if (!sh->intr_handle_devx) {
2521d61138d4SHarman Kalra 			DRV_LOG(ERR, "Fail to allocate intr_handle");
2522d61138d4SHarman Kalra 			rte_errno = ENOMEM;
2523d61138d4SHarman Kalra 			return;
2524d61138d4SHarman Kalra 		}
2525d61138d4SHarman Kalra 		rte_intr_fd_set(sh->intr_handle_devx, -1);
2526ca1418ceSMichael Baum 		sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
252721b7c452SOphir Munk 		struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
252821b7c452SOphir Munk 		if (!devx_comp) {
25292eb4d010SOphir Munk 			DRV_LOG(INFO, "failed to allocate devx_comp.");
25302eb4d010SOphir Munk 			return;
25312eb4d010SOphir Munk 		}
253221b7c452SOphir Munk 		flags = fcntl(devx_comp->fd, F_GETFL);
253321b7c452SOphir Munk 		ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
25342eb4d010SOphir Munk 		if (ret) {
25352eb4d010SOphir Munk 			DRV_LOG(INFO, "failed to change file descriptor"
25362eb4d010SOphir Munk 				" devx comp");
25372eb4d010SOphir Munk 			return;
25382eb4d010SOphir Munk 		}
2539d61138d4SHarman Kalra 		rte_intr_fd_set(sh->intr_handle_devx, devx_comp->fd);
2540d61138d4SHarman Kalra 		rte_intr_type_set(sh->intr_handle_devx,
2541d61138d4SHarman Kalra 					 RTE_INTR_HANDLE_EXT);
2542d61138d4SHarman Kalra 		if (rte_intr_callback_register(sh->intr_handle_devx,
25432eb4d010SOphir Munk 					mlx5_dev_interrupt_handler_devx, sh)) {
25442eb4d010SOphir Munk 			DRV_LOG(INFO, "Fail to install the devx shared"
25452eb4d010SOphir Munk 				" interrupt.");
2546d61138d4SHarman Kalra 			rte_intr_fd_set(sh->intr_handle_devx, -1);
25472eb4d010SOphir Munk 		}
25482eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */
25492eb4d010SOphir Munk 	}
25502eb4d010SOphir Munk }
25512eb4d010SOphir Munk 
25522eb4d010SOphir Munk /**
25532eb4d010SOphir Munk  * Uninstall shared asynchronous device events handler.
25542eb4d010SOphir Munk  * This function is implemented to support event sharing
25552eb4d010SOphir Munk  * between multiple ports of single IB device.
25562eb4d010SOphir Munk  *
25572eb4d010SOphir Munk  * @param dev
25582eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
25592eb4d010SOphir Munk  */
25602eb4d010SOphir Munk void
25612eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
25622eb4d010SOphir Munk {
2563d61138d4SHarman Kalra 	if (rte_intr_fd_get(sh->intr_handle) >= 0)
2564d61138d4SHarman Kalra 		mlx5_intr_callback_unregister(sh->intr_handle,
25652eb4d010SOphir Munk 					      mlx5_dev_interrupt_handler, sh);
2566d61138d4SHarman Kalra 	rte_intr_instance_free(sh->intr_handle);
25672eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
2568d61138d4SHarman Kalra 	if (rte_intr_fd_get(sh->intr_handle_devx) >= 0)
2569d61138d4SHarman Kalra 		rte_intr_callback_unregister(sh->intr_handle_devx,
25702eb4d010SOphir Munk 				  mlx5_dev_interrupt_handler_devx, sh);
2571d61138d4SHarman Kalra 	rte_intr_instance_free(sh->intr_handle_devx);
25722eb4d010SOphir Munk 	if (sh->devx_comp)
25732eb4d010SOphir Munk 		mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
25742eb4d010SOphir Munk #endif
25752eb4d010SOphir Munk }
2576042f5c94SOphir Munk 
257773bf9235SOphir Munk /**
257873bf9235SOphir Munk  * Read statistics by a named counter.
257973bf9235SOphir Munk  *
258073bf9235SOphir Munk  * @param[in] priv
258173bf9235SOphir Munk  *   Pointer to the private device data structure.
258273bf9235SOphir Munk  * @param[in] ctr_name
258373bf9235SOphir Munk  *   Pointer to the name of the statistic counter to read
258473bf9235SOphir Munk  * @param[out] stat
258573bf9235SOphir Munk  *   Pointer to read statistic value.
258673bf9235SOphir Munk  * @return
258773bf9235SOphir Munk  *   0 on success and stat is valud, 1 if failed to read the value
258873bf9235SOphir Munk  *   rte_errno is set.
258973bf9235SOphir Munk  *
259073bf9235SOphir Munk  */
259173bf9235SOphir Munk int
259273bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
259373bf9235SOphir Munk 		      uint64_t *stat)
259473bf9235SOphir Munk {
259573bf9235SOphir Munk 	int fd;
259673bf9235SOphir Munk 
259773bf9235SOphir Munk 	if (priv->sh) {
2598e6988afdSMatan Azrad 		if (priv->q_counters != NULL &&
2599e6988afdSMatan Azrad 		    strcmp(ctr_name, "out_of_buffer") == 0)
2600978a0303SViacheslav Ovsiienko 			return mlx5_devx_cmd_queue_counter_query
2601978a0303SViacheslav Ovsiienko 					(priv->q_counters, 0, (uint32_t *)stat);
260273bf9235SOphir Munk 		MKSTR(path, "%s/ports/%d/hw_counters/%s",
260373bf9235SOphir Munk 		      priv->sh->ibdev_path,
260473bf9235SOphir Munk 		      priv->dev_port,
260573bf9235SOphir Munk 		      ctr_name);
260673bf9235SOphir Munk 		fd = open(path, O_RDONLY);
2607038e7fc0SShy Shyman 		/*
2608038e7fc0SShy Shyman 		 * in switchdev the file location is not per port
2609038e7fc0SShy Shyman 		 * but rather in <ibdev_path>/hw_counters/<file_name>.
2610038e7fc0SShy Shyman 		 */
2611038e7fc0SShy Shyman 		if (fd == -1) {
2612038e7fc0SShy Shyman 			MKSTR(path1, "%s/hw_counters/%s",
2613038e7fc0SShy Shyman 			      priv->sh->ibdev_path,
2614038e7fc0SShy Shyman 			      ctr_name);
2615038e7fc0SShy Shyman 			fd = open(path1, O_RDONLY);
2616038e7fc0SShy Shyman 		}
261773bf9235SOphir Munk 		if (fd != -1) {
261873bf9235SOphir Munk 			char buf[21] = {'\0'};
261973bf9235SOphir Munk 			ssize_t n = read(fd, buf, sizeof(buf));
262073bf9235SOphir Munk 
262173bf9235SOphir Munk 			close(fd);
262273bf9235SOphir Munk 			if (n != -1) {
262373bf9235SOphir Munk 				*stat = strtoull(buf, NULL, 10);
262473bf9235SOphir Munk 				return 0;
262573bf9235SOphir Munk 			}
262673bf9235SOphir Munk 		}
262773bf9235SOphir Munk 	}
262873bf9235SOphir Munk 	*stat = 0;
262973bf9235SOphir Munk 	return 1;
263073bf9235SOphir Munk }
263173bf9235SOphir Munk 
263273bf9235SOphir Munk /**
2633ab27cdd9SOphir Munk  * Remove a MAC address from device
2634ab27cdd9SOphir Munk  *
2635ab27cdd9SOphir Munk  * @param dev
2636ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
2637ab27cdd9SOphir Munk  * @param index
2638ab27cdd9SOphir Munk  *   MAC address index.
2639ab27cdd9SOphir Munk  */
2640ab27cdd9SOphir Munk void
2641ab27cdd9SOphir Munk mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2642ab27cdd9SOphir Munk {
2643ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
264487af0d1eSMichael Baum 	const int vf = priv->sh->dev_cap.vf;
2645ab27cdd9SOphir Munk 
2646ab27cdd9SOphir Munk 	if (vf)
2647ab27cdd9SOphir Munk 		mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2648ab27cdd9SOphir Munk 					mlx5_ifindex(dev), priv->mac_own,
2649ab27cdd9SOphir Munk 					&dev->data->mac_addrs[index], index);
2650ab27cdd9SOphir Munk }
2651ab27cdd9SOphir Munk 
2652ab27cdd9SOphir Munk /**
2653ab27cdd9SOphir Munk  * Adds a MAC address to the device
2654ab27cdd9SOphir Munk  *
2655ab27cdd9SOphir Munk  * @param dev
2656ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
2657ab27cdd9SOphir Munk  * @param mac_addr
2658ab27cdd9SOphir Munk  *   MAC address to register.
2659ab27cdd9SOphir Munk  * @param index
2660ab27cdd9SOphir Munk  *   MAC address index.
2661ab27cdd9SOphir Munk  *
2662ab27cdd9SOphir Munk  * @return
2663ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
2664ab27cdd9SOphir Munk  */
2665ab27cdd9SOphir Munk int
2666ab27cdd9SOphir Munk mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2667ab27cdd9SOphir Munk 		     uint32_t index)
2668ab27cdd9SOphir Munk {
2669ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
267087af0d1eSMichael Baum 	const int vf = priv->sh->dev_cap.vf;
2671ab27cdd9SOphir Munk 	int ret = 0;
2672ab27cdd9SOphir Munk 
2673ab27cdd9SOphir Munk 	if (vf)
2674ab27cdd9SOphir Munk 		ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2675ab27cdd9SOphir Munk 					   mlx5_ifindex(dev), priv->mac_own,
2676ab27cdd9SOphir Munk 					   mac, index);
2677ab27cdd9SOphir Munk 	return ret;
2678ab27cdd9SOphir Munk }
2679ab27cdd9SOphir Munk 
2680ab27cdd9SOphir Munk /**
2681ab27cdd9SOphir Munk  * Modify a VF MAC address
2682ab27cdd9SOphir Munk  *
2683ab27cdd9SOphir Munk  * @param priv
2684ab27cdd9SOphir Munk  *   Pointer to device private data.
2685ab27cdd9SOphir Munk  * @param mac_addr
2686ab27cdd9SOphir Munk  *   MAC address to modify into.
2687ab27cdd9SOphir Munk  * @param iface_idx
2688ab27cdd9SOphir Munk  *   Net device interface index
2689ab27cdd9SOphir Munk  * @param vf_index
2690ab27cdd9SOphir Munk  *   VF index
2691ab27cdd9SOphir Munk  *
2692ab27cdd9SOphir Munk  * @return
2693ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
2694ab27cdd9SOphir Munk  */
2695ab27cdd9SOphir Munk int
2696ab27cdd9SOphir Munk mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2697ab27cdd9SOphir Munk 			   unsigned int iface_idx,
2698ab27cdd9SOphir Munk 			   struct rte_ether_addr *mac_addr,
2699ab27cdd9SOphir Munk 			   int vf_index)
2700ab27cdd9SOphir Munk {
2701ab27cdd9SOphir Munk 	return mlx5_nl_vf_mac_addr_modify
2702ab27cdd9SOphir Munk 		(priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2703ab27cdd9SOphir Munk }
2704ab27cdd9SOphir Munk 
27054d18abd1SOphir Munk /**
27064d18abd1SOphir Munk  * Set device promiscuous mode
27074d18abd1SOphir Munk  *
27084d18abd1SOphir Munk  * @param dev
27094d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
27104d18abd1SOphir Munk  * @param enable
27114d18abd1SOphir Munk  *   0 - promiscuous is disabled, otherwise - enabled
27124d18abd1SOphir Munk  *
27134d18abd1SOphir Munk  * @return
27144d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
27154d18abd1SOphir Munk  */
27164d18abd1SOphir Munk int
27174d18abd1SOphir Munk mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
27184d18abd1SOphir Munk {
27194d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
27204d18abd1SOphir Munk 
27214d18abd1SOphir Munk 	return mlx5_nl_promisc(priv->nl_socket_route,
27224d18abd1SOphir Munk 			       mlx5_ifindex(dev), !!enable);
27234d18abd1SOphir Munk }
27244d18abd1SOphir Munk 
27254d18abd1SOphir Munk /**
27264d18abd1SOphir Munk  * Set device promiscuous mode
27274d18abd1SOphir Munk  *
27284d18abd1SOphir Munk  * @param dev
27294d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
27304d18abd1SOphir Munk  * @param enable
27314d18abd1SOphir Munk  *   0 - all multicase is disabled, otherwise - enabled
27324d18abd1SOphir Munk  *
27334d18abd1SOphir Munk  * @return
27344d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
27354d18abd1SOphir Munk  */
27364d18abd1SOphir Munk int
27374d18abd1SOphir Munk mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
27384d18abd1SOphir Munk {
27394d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
27404d18abd1SOphir Munk 
27414d18abd1SOphir Munk 	return mlx5_nl_allmulti(priv->nl_socket_route,
27424d18abd1SOphir Munk 				mlx5_ifindex(dev), !!enable);
27434d18abd1SOphir Munk }
27444d18abd1SOphir Munk 
2745f00f6562SOphir Munk /**
2746f00f6562SOphir Munk  * Flush device MAC addresses
2747f00f6562SOphir Munk  *
2748f00f6562SOphir Munk  * @param dev
2749f00f6562SOphir Munk  *   Pointer to Ethernet device structure.
2750f00f6562SOphir Munk  *
2751f00f6562SOphir Munk  */
2752f00f6562SOphir Munk void
2753f00f6562SOphir Munk mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2754f00f6562SOphir Munk {
2755f00f6562SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
2756f00f6562SOphir Munk 
2757f00f6562SOphir Munk 	mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2758f00f6562SOphir Munk 			       dev->data->mac_addrs,
2759f00f6562SOphir Munk 			       MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2760f00f6562SOphir Munk }
2761