xref: /dpdk/drivers/net/mlx5/linux/mlx5_os.c (revision cdfdb82d0b361d9e0848917b0ed6e9cf30e46dd1)
1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause
2f44b09f9SOphir Munk  * Copyright 2015 6WIND S.A.
3f44b09f9SOphir Munk  * Copyright 2020 Mellanox Technologies, Ltd
4f44b09f9SOphir Munk  */
5f44b09f9SOphir Munk 
6f44b09f9SOphir Munk #include <stddef.h>
7f44b09f9SOphir Munk #include <unistd.h>
8f44b09f9SOphir Munk #include <string.h>
9f44b09f9SOphir Munk #include <stdint.h>
10f44b09f9SOphir Munk #include <stdlib.h>
11f44b09f9SOphir Munk #include <errno.h>
12f44b09f9SOphir Munk #include <net/if.h>
13f44b09f9SOphir Munk #include <linux/rtnetlink.h>
1473bf9235SOphir Munk #include <linux/sockios.h>
1573bf9235SOphir Munk #include <linux/ethtool.h>
16f44b09f9SOphir Munk #include <fcntl.h>
17f44b09f9SOphir Munk 
18f44b09f9SOphir Munk #include <rte_malloc.h>
19df96fd0dSBruce Richardson #include <ethdev_driver.h>
20df96fd0dSBruce Richardson #include <ethdev_pci.h>
21f44b09f9SOphir Munk #include <rte_pci.h>
22f44b09f9SOphir Munk #include <rte_bus_pci.h>
23919488fbSXueming Li #include <rte_bus_auxiliary.h>
24f44b09f9SOphir Munk #include <rte_common.h>
25f44b09f9SOphir Munk #include <rte_kvargs.h>
26f44b09f9SOphir Munk #include <rte_rwlock.h>
27f44b09f9SOphir Munk #include <rte_spinlock.h>
28f44b09f9SOphir Munk #include <rte_string_fns.h>
29f44b09f9SOphir Munk #include <rte_alarm.h>
302aba9fc7SOphir Munk #include <rte_eal_paging.h>
31f44b09f9SOphir Munk 
32f44b09f9SOphir Munk #include <mlx5_glue.h>
33f44b09f9SOphir Munk #include <mlx5_devx_cmds.h>
34f44b09f9SOphir Munk #include <mlx5_common.h>
352eb4d010SOphir Munk #include <mlx5_common_mp.h>
36d5ed8aa9SOphir Munk #include <mlx5_common_mr.h>
375522da6bSSuanming Mou #include <mlx5_malloc.h>
38f44b09f9SOphir Munk 
39f44b09f9SOphir Munk #include "mlx5_defs.h"
40f44b09f9SOphir Munk #include "mlx5.h"
41391b8bccSOphir Munk #include "mlx5_common_os.h"
42f44b09f9SOphir Munk #include "mlx5_utils.h"
43f44b09f9SOphir Munk #include "mlx5_rxtx.h"
44151cbe3aSMichael Baum #include "mlx5_rx.h"
45377b69fbSMichael Baum #include "mlx5_tx.h"
46f44b09f9SOphir Munk #include "mlx5_autoconf.h"
47f44b09f9SOphir Munk #include "mlx5_mr.h"
48f44b09f9SOphir Munk #include "mlx5_flow.h"
49f44b09f9SOphir Munk #include "rte_pmd_mlx5.h"
504f96d913SOphir Munk #include "mlx5_verbs.h"
51f00f6562SOphir Munk #include "mlx5_nl.h"
526deb19e1SMichael Baum #include "mlx5_devx.h"
53f44b09f9SOphir Munk 
542eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW
552eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
562eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
572eb4d010SOphir Munk #endif
582eb4d010SOphir Munk 
592eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
602eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
612eb4d010SOphir Munk #endif
622eb4d010SOphir Munk 
632e86c4e5SOphir Munk static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
642e86c4e5SOphir Munk 
652e86c4e5SOphir Munk /* Spinlock for mlx5_shared_data allocation. */
662e86c4e5SOphir Munk static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
672e86c4e5SOphir Munk 
682e86c4e5SOphir Munk /* Process local data for secondary processes. */
692e86c4e5SOphir Munk static struct mlx5_local_data mlx5_local_data;
702e86c4e5SOphir Munk 
71b4edeaf3SSuanming Mou /* rte flow indexed pool configuration. */
72b4edeaf3SSuanming Mou static struct mlx5_indexed_pool_config icfg[] = {
73b4edeaf3SSuanming Mou 	{
74b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
75b4edeaf3SSuanming Mou 		.trunk_size = 64,
76b4edeaf3SSuanming Mou 		.need_lock = 1,
77b4edeaf3SSuanming Mou 		.release_mem_en = 0,
78b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
79b4edeaf3SSuanming Mou 		.free = mlx5_free,
80b4edeaf3SSuanming Mou 		.per_core_cache = 0,
81b4edeaf3SSuanming Mou 		.type = "ctl_flow_ipool",
82b4edeaf3SSuanming Mou 	},
83b4edeaf3SSuanming Mou 	{
84b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
85b4edeaf3SSuanming Mou 		.trunk_size = 64,
86b4edeaf3SSuanming Mou 		.grow_trunk = 3,
87b4edeaf3SSuanming Mou 		.grow_shift = 2,
88b4edeaf3SSuanming Mou 		.need_lock = 1,
89b4edeaf3SSuanming Mou 		.release_mem_en = 0,
90b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
91b4edeaf3SSuanming Mou 		.free = mlx5_free,
92b4edeaf3SSuanming Mou 		.per_core_cache = 1 << 14,
93b4edeaf3SSuanming Mou 		.type = "rte_flow_ipool",
94b4edeaf3SSuanming Mou 	},
95b4edeaf3SSuanming Mou 	{
96b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
97b4edeaf3SSuanming Mou 		.trunk_size = 64,
98b4edeaf3SSuanming Mou 		.grow_trunk = 3,
99b4edeaf3SSuanming Mou 		.grow_shift = 2,
100b4edeaf3SSuanming Mou 		.need_lock = 1,
101b4edeaf3SSuanming Mou 		.release_mem_en = 0,
102b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
103b4edeaf3SSuanming Mou 		.free = mlx5_free,
104b4edeaf3SSuanming Mou 		.per_core_cache = 0,
105b4edeaf3SSuanming Mou 		.type = "mcp_flow_ipool",
106b4edeaf3SSuanming Mou 	},
107b4edeaf3SSuanming Mou };
108b4edeaf3SSuanming Mou 
109f44b09f9SOphir Munk /**
11008d1838fSDekel Peled  * Set the completion channel file descriptor interrupt as non-blocking.
11108d1838fSDekel Peled  *
11208d1838fSDekel Peled  * @param[in] rxq_obj
11308d1838fSDekel Peled  *   Pointer to RQ channel object, which includes the channel fd
11408d1838fSDekel Peled  *
11508d1838fSDekel Peled  * @param[out] fd
11608d1838fSDekel Peled  *   The file descriptor (representing the intetrrupt) used in this channel.
11708d1838fSDekel Peled  *
11808d1838fSDekel Peled  * @return
11908d1838fSDekel Peled  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
12008d1838fSDekel Peled  */
12108d1838fSDekel Peled int
12208d1838fSDekel Peled mlx5_os_set_nonblock_channel_fd(int fd)
12308d1838fSDekel Peled {
12408d1838fSDekel Peled 	int flags;
12508d1838fSDekel Peled 
12608d1838fSDekel Peled 	flags = fcntl(fd, F_GETFL);
12708d1838fSDekel Peled 	return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
12808d1838fSDekel Peled }
12908d1838fSDekel Peled 
13008d1838fSDekel Peled /**
131e85f623eSOphir Munk  * Get mlx5 device attributes. The glue function query_device_ex() is called
132e85f623eSOphir Munk  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
133e85f623eSOphir Munk  * device attributes from the glue out parameter.
134e85f623eSOphir Munk  *
135e85f623eSOphir Munk  * @param dev
136e85f623eSOphir Munk  *   Pointer to ibv context.
137e85f623eSOphir Munk  *
138e85f623eSOphir Munk  * @param device_attr
139e85f623eSOphir Munk  *   Pointer to mlx5 device attributes.
140e85f623eSOphir Munk  *
141e85f623eSOphir Munk  * @return
142e85f623eSOphir Munk  *   0 on success, non zero error number otherwise
143e85f623eSOphir Munk  */
144e85f623eSOphir Munk int
145e85f623eSOphir Munk mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
146e85f623eSOphir Munk {
147e85f623eSOphir Munk 	int err;
148e85f623eSOphir Munk 	struct ibv_device_attr_ex attr_ex;
149e85f623eSOphir Munk 	memset(device_attr, 0, sizeof(*device_attr));
150e85f623eSOphir Munk 	err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
151e85f623eSOphir Munk 	if (err)
152e85f623eSOphir Munk 		return err;
153e85f623eSOphir Munk 
154e85f623eSOphir Munk 	device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
155e85f623eSOphir Munk 	device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
156e85f623eSOphir Munk 	device_attr->max_sge = attr_ex.orig_attr.max_sge;
157e85f623eSOphir Munk 	device_attr->max_cq = attr_ex.orig_attr.max_cq;
1581f29d15eSOphir Munk 	device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
1591f29d15eSOphir Munk 	device_attr->max_mr = attr_ex.orig_attr.max_mr;
1601f29d15eSOphir Munk 	device_attr->max_pd = attr_ex.orig_attr.max_pd;
161e85f623eSOphir Munk 	device_attr->max_qp = attr_ex.orig_attr.max_qp;
1621f29d15eSOphir Munk 	device_attr->max_srq = attr_ex.orig_attr.max_srq;
1631f29d15eSOphir Munk 	device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
164e85f623eSOphir Munk 	device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
165e85f623eSOphir Munk 	device_attr->max_rwq_indirection_table_size =
166e85f623eSOphir Munk 		attr_ex.rss_caps.max_rwq_indirection_table_size;
167e85f623eSOphir Munk 	device_attr->max_tso = attr_ex.tso_caps.max_tso;
168e85f623eSOphir Munk 	device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
169e85f623eSOphir Munk 
170e85f623eSOphir Munk 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
171e85f623eSOphir Munk 	err = mlx5_glue->dv_query_device(ctx, &dv_attr);
172e85f623eSOphir Munk 	if (err)
173e85f623eSOphir Munk 		return err;
174e85f623eSOphir Munk 
175e85f623eSOphir Munk 	device_attr->flags = dv_attr.flags;
176e85f623eSOphir Munk 	device_attr->comp_mask = dv_attr.comp_mask;
177e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
178e85f623eSOphir Munk 	device_attr->sw_parsing_offloads =
179e85f623eSOphir Munk 		dv_attr.sw_parsing_caps.sw_parsing_offloads;
180e85f623eSOphir Munk #endif
181e85f623eSOphir Munk 	device_attr->min_single_stride_log_num_of_bytes =
182e85f623eSOphir Munk 		dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
183e85f623eSOphir Munk 	device_attr->max_single_stride_log_num_of_bytes =
184e85f623eSOphir Munk 		dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
185e85f623eSOphir Munk 	device_attr->min_single_wqe_log_num_of_strides =
186e85f623eSOphir Munk 		dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
187e85f623eSOphir Munk 	device_attr->max_single_wqe_log_num_of_strides =
188e85f623eSOphir Munk 		dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
189e85f623eSOphir Munk 	device_attr->stride_supported_qpts =
190e85f623eSOphir Munk 		dv_attr.striding_rq_caps.supported_qpts;
191e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
192e85f623eSOphir Munk 	device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
193e85f623eSOphir Munk #endif
194520e3f48SKamil Vojanec 	strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
195520e3f48SKamil Vojanec 		sizeof(device_attr->fw_ver));
196e85f623eSOphir Munk 
197e85f623eSOphir Munk 	return err;
198e85f623eSOphir Munk }
1992eb4d010SOphir Munk 
2002eb4d010SOphir Munk /**
2012eb4d010SOphir Munk  * Verbs callback to allocate a memory. This function should allocate the space
2022eb4d010SOphir Munk  * according to the size provided residing inside a huge page.
2032eb4d010SOphir Munk  * Please note that all allocation must respect the alignment from libmlx5
2042aba9fc7SOphir Munk  * (i.e. currently rte_mem_page_size()).
2052eb4d010SOphir Munk  *
2062eb4d010SOphir Munk  * @param[in] size
2072eb4d010SOphir Munk  *   The size in bytes of the memory to allocate.
2082eb4d010SOphir Munk  * @param[in] data
2092eb4d010SOphir Munk  *   A pointer to the callback data.
2102eb4d010SOphir Munk  *
2112eb4d010SOphir Munk  * @return
2122eb4d010SOphir Munk  *   Allocated buffer, NULL otherwise and rte_errno is set.
2132eb4d010SOphir Munk  */
2142eb4d010SOphir Munk static void *
2152eb4d010SOphir Munk mlx5_alloc_verbs_buf(size_t size, void *data)
2162eb4d010SOphir Munk {
21781c3b977SViacheslav Ovsiienko 	struct mlx5_dev_ctx_shared *sh = data;
2182eb4d010SOphir Munk 	void *ret;
2192aba9fc7SOphir Munk 	size_t alignment = rte_mem_page_size();
2202aba9fc7SOphir Munk 	if (alignment == (size_t)-1) {
2212aba9fc7SOphir Munk 		DRV_LOG(ERR, "Failed to get mem page size");
2222aba9fc7SOphir Munk 		rte_errno = ENOMEM;
2232aba9fc7SOphir Munk 		return NULL;
2242aba9fc7SOphir Munk 	}
2252eb4d010SOphir Munk 
2262eb4d010SOphir Munk 	MLX5_ASSERT(data != NULL);
22781c3b977SViacheslav Ovsiienko 	ret = mlx5_malloc(0, size, alignment, sh->numa_node);
2282eb4d010SOphir Munk 	if (!ret && size)
2292eb4d010SOphir Munk 		rte_errno = ENOMEM;
2302eb4d010SOphir Munk 	return ret;
2312eb4d010SOphir Munk }
2322eb4d010SOphir Munk 
2332eb4d010SOphir Munk /**
234630a587bSRongwei Liu  * Detect misc5 support or not
235630a587bSRongwei Liu  *
236630a587bSRongwei Liu  * @param[in] priv
237630a587bSRongwei Liu  *   Device private data pointer
238630a587bSRongwei Liu  */
239630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR
240630a587bSRongwei Liu static void
241630a587bSRongwei Liu __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
242630a587bSRongwei Liu {
243630a587bSRongwei Liu #ifdef HAVE_IBV_FLOW_DV_SUPPORT
244630a587bSRongwei Liu 	/* Dummy VxLAN matcher to detect rdma-core misc5 cap
245630a587bSRongwei Liu 	 * Case: IPv4--->UDP--->VxLAN--->vni
246630a587bSRongwei Liu 	 */
247630a587bSRongwei Liu 	void *tbl;
248630a587bSRongwei Liu 	struct mlx5_flow_dv_match_params matcher_mask;
249630a587bSRongwei Liu 	void *match_m;
250630a587bSRongwei Liu 	void *matcher;
251630a587bSRongwei Liu 	void *headers_m;
252630a587bSRongwei Liu 	void *misc5_m;
253630a587bSRongwei Liu 	uint32_t *tunnel_header_m;
254630a587bSRongwei Liu 	struct mlx5dv_flow_matcher_attr dv_attr;
255630a587bSRongwei Liu 
256630a587bSRongwei Liu 	memset(&matcher_mask, 0, sizeof(matcher_mask));
257630a587bSRongwei Liu 	matcher_mask.size = sizeof(matcher_mask.buf);
258630a587bSRongwei Liu 	match_m = matcher_mask.buf;
259630a587bSRongwei Liu 	headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
260630a587bSRongwei Liu 	misc5_m = MLX5_ADDR_OF(fte_match_param,
261630a587bSRongwei Liu 			       match_m, misc_parameters_5);
262630a587bSRongwei Liu 	tunnel_header_m = (uint32_t *)
263630a587bSRongwei Liu 				MLX5_ADDR_OF(fte_match_set_misc5,
264630a587bSRongwei Liu 				misc5_m, tunnel_header_1);
265630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
266630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
267630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
268630a587bSRongwei Liu 	*tunnel_header_m = 0xffffff;
269630a587bSRongwei Liu 
270630a587bSRongwei Liu 	tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
271630a587bSRongwei Liu 	if (!tbl) {
272630a587bSRongwei Liu 		DRV_LOG(INFO, "No SW steering support");
273630a587bSRongwei Liu 		return;
274630a587bSRongwei Liu 	}
275630a587bSRongwei Liu 	dv_attr.type = IBV_FLOW_ATTR_NORMAL,
276630a587bSRongwei Liu 	dv_attr.match_mask = (void *)&matcher_mask,
277630a587bSRongwei Liu 	dv_attr.match_criteria_enable =
278630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
279630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
280630a587bSRongwei Liu 	dv_attr.priority = 3;
281630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR_ESWITCH
282630a587bSRongwei Liu 	void *misc2_m;
283630a587bSRongwei Liu 	if (priv->config.dv_esw_en) {
284630a587bSRongwei Liu 		/* FDB enabled reg_c_0 */
285630a587bSRongwei Liu 		dv_attr.match_criteria_enable |=
286630a587bSRongwei Liu 				(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
287630a587bSRongwei Liu 		misc2_m = MLX5_ADDR_OF(fte_match_param,
288630a587bSRongwei Liu 				       match_m, misc_parameters_2);
289630a587bSRongwei Liu 		MLX5_SET(fte_match_set_misc2, misc2_m,
290630a587bSRongwei Liu 			 metadata_reg_c_0, 0xffff);
291630a587bSRongwei Liu 	}
292630a587bSRongwei Liu #endif
293630a587bSRongwei Liu 	matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->ctx,
294630a587bSRongwei Liu 						    &dv_attr, tbl);
295630a587bSRongwei Liu 	if (matcher) {
296630a587bSRongwei Liu 		priv->sh->misc5_cap = 1;
297630a587bSRongwei Liu 		mlx5_glue->dv_destroy_flow_matcher(matcher);
298630a587bSRongwei Liu 	}
299630a587bSRongwei Liu 	mlx5_glue->dr_destroy_flow_tbl(tbl);
300630a587bSRongwei Liu #else
301630a587bSRongwei Liu 	RTE_SET_USED(priv);
302630a587bSRongwei Liu #endif
303630a587bSRongwei Liu }
304630a587bSRongwei Liu #endif
305630a587bSRongwei Liu 
306630a587bSRongwei Liu /**
3072eb4d010SOphir Munk  * Verbs callback to free a memory.
3082eb4d010SOphir Munk  *
3092eb4d010SOphir Munk  * @param[in] ptr
3102eb4d010SOphir Munk  *   A pointer to the memory to free.
3112eb4d010SOphir Munk  * @param[in] data
3122eb4d010SOphir Munk  *   A pointer to the callback data.
3132eb4d010SOphir Munk  */
3142eb4d010SOphir Munk static void
3152eb4d010SOphir Munk mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
3162eb4d010SOphir Munk {
3172eb4d010SOphir Munk 	MLX5_ASSERT(data != NULL);
3182175c4dcSSuanming Mou 	mlx5_free(ptr);
3192eb4d010SOphir Munk }
3202eb4d010SOphir Munk 
3212eb4d010SOphir Munk /**
3222eb4d010SOphir Munk  * Initialize DR related data within private structure.
3232eb4d010SOphir Munk  * Routine checks the reference counter and does actual
3242eb4d010SOphir Munk  * resources creation/initialization only if counter is zero.
3252eb4d010SOphir Munk  *
3262eb4d010SOphir Munk  * @param[in] priv
3272eb4d010SOphir Munk  *   Pointer to the private device data structure.
3282eb4d010SOphir Munk  *
3292eb4d010SOphir Munk  * @return
3302eb4d010SOphir Munk  *   Zero on success, positive error code otherwise.
3312eb4d010SOphir Munk  */
3322eb4d010SOphir Munk static int
3332eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv)
3342eb4d010SOphir Munk {
3352eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = priv->sh;
336961b6774SMatan Azrad 	char s[MLX5_NAME_SIZE] __rte_unused;
33716dbba25SXueming Li 	int err;
3382eb4d010SOphir Munk 
33916dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
34016dbba25SXueming Li 	if (sh->refcnt > 1)
34116dbba25SXueming Li 		return 0;
3422eb4d010SOphir Munk 	err = mlx5_alloc_table_hash_list(priv);
3432eb4d010SOphir Munk 	if (err)
344291140c6SSuanming Mou 		goto error;
345291140c6SSuanming Mou 	/* The resources below are only valid with DV support. */
346291140c6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT
347491b7137SMatan Azrad 	/* Init port id action list. */
348e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
349d03b7860SSuanming Mou 	sh->port_id_action_list = mlx5_list_create(s, sh, true,
3500fd5f82aSXueming Li 						   flow_dv_port_id_create_cb,
3510fd5f82aSXueming Li 						   flow_dv_port_id_match_cb,
352491b7137SMatan Azrad 						   flow_dv_port_id_remove_cb,
353491b7137SMatan Azrad 						   flow_dv_port_id_clone_cb,
354491b7137SMatan Azrad 						 flow_dv_port_id_clone_free_cb);
355679f46c7SMatan Azrad 	if (!sh->port_id_action_list)
356679f46c7SMatan Azrad 		goto error;
357491b7137SMatan Azrad 	/* Init push vlan action list. */
358e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
359d03b7860SSuanming Mou 	sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
3603422af2aSXueming Li 						    flow_dv_push_vlan_create_cb,
3613422af2aSXueming Li 						    flow_dv_push_vlan_match_cb,
362491b7137SMatan Azrad 						    flow_dv_push_vlan_remove_cb,
363491b7137SMatan Azrad 						    flow_dv_push_vlan_clone_cb,
364491b7137SMatan Azrad 					       flow_dv_push_vlan_clone_free_cb);
365679f46c7SMatan Azrad 	if (!sh->push_vlan_action_list)
366679f46c7SMatan Azrad 		goto error;
367491b7137SMatan Azrad 	/* Init sample action list. */
368e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
369d03b7860SSuanming Mou 	sh->sample_action_list = mlx5_list_create(s, sh, true,
37019784141SSuanming Mou 						  flow_dv_sample_create_cb,
37119784141SSuanming Mou 						  flow_dv_sample_match_cb,
372491b7137SMatan Azrad 						  flow_dv_sample_remove_cb,
373491b7137SMatan Azrad 						  flow_dv_sample_clone_cb,
374491b7137SMatan Azrad 						  flow_dv_sample_clone_free_cb);
375679f46c7SMatan Azrad 	if (!sh->sample_action_list)
376679f46c7SMatan Azrad 		goto error;
377491b7137SMatan Azrad 	/* Init dest array action list. */
378e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
379d03b7860SSuanming Mou 	sh->dest_array_list = mlx5_list_create(s, sh, true,
38019784141SSuanming Mou 					       flow_dv_dest_array_create_cb,
38119784141SSuanming Mou 					       flow_dv_dest_array_match_cb,
382491b7137SMatan Azrad 					       flow_dv_dest_array_remove_cb,
383491b7137SMatan Azrad 					       flow_dv_dest_array_clone_cb,
384491b7137SMatan Azrad 					      flow_dv_dest_array_clone_free_cb);
385679f46c7SMatan Azrad 	if (!sh->dest_array_list)
386679f46c7SMatan Azrad 		goto error;
387291140c6SSuanming Mou #endif
3882eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
3892eb4d010SOphir Munk 	void *domain;
3902eb4d010SOphir Munk 
3912eb4d010SOphir Munk 	/* Reference counter is zero, we should initialize structures. */
3922eb4d010SOphir Munk 	domain = mlx5_glue->dr_create_domain(sh->ctx,
3932eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
3942eb4d010SOphir Munk 	if (!domain) {
3952eb4d010SOphir Munk 		DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
3962eb4d010SOphir Munk 		err = errno;
3972eb4d010SOphir Munk 		goto error;
3982eb4d010SOphir Munk 	}
3992eb4d010SOphir Munk 	sh->rx_domain = domain;
4002eb4d010SOphir Munk 	domain = mlx5_glue->dr_create_domain(sh->ctx,
4012eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
4022eb4d010SOphir Munk 	if (!domain) {
4032eb4d010SOphir Munk 		DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
4042eb4d010SOphir Munk 		err = errno;
4052eb4d010SOphir Munk 		goto error;
4062eb4d010SOphir Munk 	}
4072eb4d010SOphir Munk 	sh->tx_domain = domain;
4082eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
4092eb4d010SOphir Munk 	if (priv->config.dv_esw_en) {
4102eb4d010SOphir Munk 		domain  = mlx5_glue->dr_create_domain
4112eb4d010SOphir Munk 			(sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
4122eb4d010SOphir Munk 		if (!domain) {
4132eb4d010SOphir Munk 			DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
4142eb4d010SOphir Munk 			err = errno;
4152eb4d010SOphir Munk 			goto error;
4162eb4d010SOphir Munk 		}
4172eb4d010SOphir Munk 		sh->fdb_domain = domain;
418da845ae9SViacheslav Ovsiienko 	}
419da845ae9SViacheslav Ovsiienko 	/*
420da845ae9SViacheslav Ovsiienko 	 * The drop action is just some dummy placeholder in rdma-core. It
421da845ae9SViacheslav Ovsiienko 	 * does not belong to domains and has no any attributes, and, can be
422da845ae9SViacheslav Ovsiienko 	 * shared by the entire device.
423da845ae9SViacheslav Ovsiienko 	 */
424da845ae9SViacheslav Ovsiienko 	sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
425da845ae9SViacheslav Ovsiienko 	if (!sh->dr_drop_action) {
426da845ae9SViacheslav Ovsiienko 		DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
427da845ae9SViacheslav Ovsiienko 		err = errno;
428da845ae9SViacheslav Ovsiienko 		goto error;
4292eb4d010SOphir Munk 	}
4302eb4d010SOphir Munk #endif
431f3020a33SSuanming Mou 	if (!sh->tunnel_hub && priv->config.dv_miss_info)
4324ec6360dSGregory Etelson 		err = mlx5_alloc_tunnel_hub(sh);
4334ec6360dSGregory Etelson 	if (err) {
4344ec6360dSGregory Etelson 		DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
4354ec6360dSGregory Etelson 		goto error;
4364ec6360dSGregory Etelson 	}
4372eb4d010SOphir Munk 	if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
4382eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
4392eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
4402eb4d010SOphir Munk 		if (sh->fdb_domain)
4412eb4d010SOphir Munk 			mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
4422eb4d010SOphir Munk 	}
4432eb4d010SOphir Munk 	sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
444e39226bdSJiawei Wang 	if (!priv->config.allow_duplicate_pattern) {
445e39226bdSJiawei Wang #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
446e39226bdSJiawei Wang 		DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
447e39226bdSJiawei Wang #endif
448e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
449e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
450e39226bdSJiawei Wang 		if (sh->fdb_domain)
451e39226bdSJiawei Wang 			mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
452e39226bdSJiawei Wang 	}
453630a587bSRongwei Liu 
454630a587bSRongwei Liu 	__mlx5_discovery_misc5_cap(priv);
4552eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
456b80726dcSSuanming Mou 	sh->default_miss_action =
457b80726dcSSuanming Mou 			mlx5_glue->dr_create_flow_action_default_miss();
458b80726dcSSuanming Mou 	if (!sh->default_miss_action)
459b80726dcSSuanming Mou 		DRV_LOG(WARNING, "Default miss action is not supported.");
4602eb4d010SOphir Munk 	return 0;
4612eb4d010SOphir Munk error:
4622eb4d010SOphir Munk 	/* Rollback the created objects. */
4632eb4d010SOphir Munk 	if (sh->rx_domain) {
4642eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
4652eb4d010SOphir Munk 		sh->rx_domain = NULL;
4662eb4d010SOphir Munk 	}
4672eb4d010SOphir Munk 	if (sh->tx_domain) {
4682eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
4692eb4d010SOphir Munk 		sh->tx_domain = NULL;
4702eb4d010SOphir Munk 	}
4712eb4d010SOphir Munk 	if (sh->fdb_domain) {
4722eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
4732eb4d010SOphir Munk 		sh->fdb_domain = NULL;
4742eb4d010SOphir Munk 	}
475da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
476da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
477da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
4782eb4d010SOphir Munk 	}
4792eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
4802eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
4812eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
4822eb4d010SOphir Munk 	}
483bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
484e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
485bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
486bf615b07SSuanming Mou 	}
4873fe88961SSuanming Mou 	if (sh->modify_cmds) {
488e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
4893fe88961SSuanming Mou 		sh->modify_cmds = NULL;
4903fe88961SSuanming Mou 	}
4912eb4d010SOphir Munk 	if (sh->tag_table) {
4922eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
493e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
4942eb4d010SOphir Munk 		sh->tag_table = NULL;
4952eb4d010SOphir Munk 	}
4964ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
4974ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
4984ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
4994ec6360dSGregory Etelson 	}
5002eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
501679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
502679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
503679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
504679f46c7SMatan Azrad 	}
505679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
506679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
507679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
508679f46c7SMatan Azrad 	}
509679f46c7SMatan Azrad 	if (sh->sample_action_list) {
510679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
511679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
512679f46c7SMatan Azrad 	}
513679f46c7SMatan Azrad 	if (sh->dest_array_list) {
514679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
515679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
516679f46c7SMatan Azrad 	}
5172eb4d010SOphir Munk 	return err;
5182eb4d010SOphir Munk }
5192eb4d010SOphir Munk 
5202eb4d010SOphir Munk /**
5212eb4d010SOphir Munk  * Destroy DR related data within private structure.
5222eb4d010SOphir Munk  *
5232eb4d010SOphir Munk  * @param[in] priv
5242eb4d010SOphir Munk  *   Pointer to the private device data structure.
5252eb4d010SOphir Munk  */
5262eb4d010SOphir Munk void
5272eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv)
5282eb4d010SOphir Munk {
52916dbba25SXueming Li 	struct mlx5_dev_ctx_shared *sh = priv->sh;
5302eb4d010SOphir Munk 
53116dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
53216dbba25SXueming Li 	if (sh->refcnt > 1)
5332eb4d010SOphir Munk 		return;
5342eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
5352eb4d010SOphir Munk 	if (sh->rx_domain) {
5362eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
5372eb4d010SOphir Munk 		sh->rx_domain = NULL;
5382eb4d010SOphir Munk 	}
5392eb4d010SOphir Munk 	if (sh->tx_domain) {
5402eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
5412eb4d010SOphir Munk 		sh->tx_domain = NULL;
5422eb4d010SOphir Munk 	}
5432eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
5442eb4d010SOphir Munk 	if (sh->fdb_domain) {
5452eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
5462eb4d010SOphir Munk 		sh->fdb_domain = NULL;
5472eb4d010SOphir Munk 	}
548da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
549da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
550da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
5512eb4d010SOphir Munk 	}
5522eb4d010SOphir Munk #endif
5532eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
5542eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
5552eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
5562eb4d010SOphir Munk 	}
5572eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
558b80726dcSSuanming Mou 	if (sh->default_miss_action)
559b80726dcSSuanming Mou 		mlx5_glue->destroy_flow_action
560b80726dcSSuanming Mou 				(sh->default_miss_action);
561bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
562e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
563bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
564bf615b07SSuanming Mou 	}
5653fe88961SSuanming Mou 	if (sh->modify_cmds) {
566e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
5673fe88961SSuanming Mou 		sh->modify_cmds = NULL;
5683fe88961SSuanming Mou 	}
5692eb4d010SOphir Munk 	if (sh->tag_table) {
5702eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
571e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
5722eb4d010SOphir Munk 		sh->tag_table = NULL;
5732eb4d010SOphir Munk 	}
5744ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
5754ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
5764ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
5774ec6360dSGregory Etelson 	}
5782eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
579679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
580679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
581679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
582679f46c7SMatan Azrad 	}
583679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
584679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
585679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
586679f46c7SMatan Azrad 	}
587679f46c7SMatan Azrad 	if (sh->sample_action_list) {
588679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
589679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
590679f46c7SMatan Azrad 	}
591679f46c7SMatan Azrad 	if (sh->dest_array_list) {
592679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
593679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
594679f46c7SMatan Azrad 	}
5952eb4d010SOphir Munk }
5962eb4d010SOphir Munk 
5972eb4d010SOphir Munk /**
5982e86c4e5SOphir Munk  * Initialize shared data between primary and secondary process.
5992e86c4e5SOphir Munk  *
6002e86c4e5SOphir Munk  * A memzone is reserved by primary process and secondary processes attach to
6012e86c4e5SOphir Munk  * the memzone.
6022e86c4e5SOphir Munk  *
6032e86c4e5SOphir Munk  * @return
6042e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
6052e86c4e5SOphir Munk  */
6062e86c4e5SOphir Munk static int
6072e86c4e5SOphir Munk mlx5_init_shared_data(void)
6082e86c4e5SOphir Munk {
6092e86c4e5SOphir Munk 	const struct rte_memzone *mz;
6102e86c4e5SOphir Munk 	int ret = 0;
6112e86c4e5SOphir Munk 
6122e86c4e5SOphir Munk 	rte_spinlock_lock(&mlx5_shared_data_lock);
6132e86c4e5SOphir Munk 	if (mlx5_shared_data == NULL) {
6142e86c4e5SOphir Munk 		if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
6152e86c4e5SOphir Munk 			/* Allocate shared memory. */
6162e86c4e5SOphir Munk 			mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
6172e86c4e5SOphir Munk 						 sizeof(*mlx5_shared_data),
6182e86c4e5SOphir Munk 						 SOCKET_ID_ANY, 0);
6192e86c4e5SOphir Munk 			if (mz == NULL) {
6202e86c4e5SOphir Munk 				DRV_LOG(ERR,
6212e86c4e5SOphir Munk 					"Cannot allocate mlx5 shared data");
6222e86c4e5SOphir Munk 				ret = -rte_errno;
6232e86c4e5SOphir Munk 				goto error;
6242e86c4e5SOphir Munk 			}
6252e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
6262e86c4e5SOphir Munk 			memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
6272e86c4e5SOphir Munk 			rte_spinlock_init(&mlx5_shared_data->lock);
6282e86c4e5SOphir Munk 		} else {
6292e86c4e5SOphir Munk 			/* Lookup allocated shared memory. */
6302e86c4e5SOphir Munk 			mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
6312e86c4e5SOphir Munk 			if (mz == NULL) {
6322e86c4e5SOphir Munk 				DRV_LOG(ERR,
6332e86c4e5SOphir Munk 					"Cannot attach mlx5 shared data");
6342e86c4e5SOphir Munk 				ret = -rte_errno;
6352e86c4e5SOphir Munk 				goto error;
6362e86c4e5SOphir Munk 			}
6372e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
6382e86c4e5SOphir Munk 			memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
6392e86c4e5SOphir Munk 		}
6402e86c4e5SOphir Munk 	}
6412e86c4e5SOphir Munk error:
6422e86c4e5SOphir Munk 	rte_spinlock_unlock(&mlx5_shared_data_lock);
6432e86c4e5SOphir Munk 	return ret;
6442e86c4e5SOphir Munk }
6452e86c4e5SOphir Munk 
6462e86c4e5SOphir Munk /**
6472e86c4e5SOphir Munk  * PMD global initialization.
6482e86c4e5SOphir Munk  *
6492e86c4e5SOphir Munk  * Independent from individual device, this function initializes global
6502e86c4e5SOphir Munk  * per-PMD data structures distinguishing primary and secondary processes.
6512e86c4e5SOphir Munk  * Hence, each initialization is called once per a process.
6522e86c4e5SOphir Munk  *
6532e86c4e5SOphir Munk  * @return
6542e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
6552e86c4e5SOphir Munk  */
6562e86c4e5SOphir Munk static int
6572e86c4e5SOphir Munk mlx5_init_once(void)
6582e86c4e5SOphir Munk {
6592e86c4e5SOphir Munk 	struct mlx5_shared_data *sd;
6602e86c4e5SOphir Munk 	struct mlx5_local_data *ld = &mlx5_local_data;
6612e86c4e5SOphir Munk 	int ret = 0;
6622e86c4e5SOphir Munk 
6632e86c4e5SOphir Munk 	if (mlx5_init_shared_data())
6642e86c4e5SOphir Munk 		return -rte_errno;
6652e86c4e5SOphir Munk 	sd = mlx5_shared_data;
6662e86c4e5SOphir Munk 	MLX5_ASSERT(sd);
6672e86c4e5SOphir Munk 	rte_spinlock_lock(&sd->lock);
6682e86c4e5SOphir Munk 	switch (rte_eal_process_type()) {
6692e86c4e5SOphir Munk 	case RTE_PROC_PRIMARY:
6702e86c4e5SOphir Munk 		if (sd->init_done)
6712e86c4e5SOphir Munk 			break;
6722e86c4e5SOphir Munk 		LIST_INIT(&sd->mem_event_cb_list);
6732e86c4e5SOphir Munk 		rte_rwlock_init(&sd->mem_event_rwlock);
6742e86c4e5SOphir Munk 		rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
6752e86c4e5SOphir Munk 						mlx5_mr_mem_event_cb, NULL);
6762e86c4e5SOphir Munk 		ret = mlx5_mp_init_primary(MLX5_MP_NAME,
6772e86c4e5SOphir Munk 					   mlx5_mp_os_primary_handle);
6782e86c4e5SOphir Munk 		if (ret)
6792e86c4e5SOphir Munk 			goto out;
6802e86c4e5SOphir Munk 		sd->init_done = true;
6812e86c4e5SOphir Munk 		break;
6822e86c4e5SOphir Munk 	case RTE_PROC_SECONDARY:
6832e86c4e5SOphir Munk 		if (ld->init_done)
6842e86c4e5SOphir Munk 			break;
6852e86c4e5SOphir Munk 		ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
6862e86c4e5SOphir Munk 					     mlx5_mp_os_secondary_handle);
6872e86c4e5SOphir Munk 		if (ret)
6882e86c4e5SOphir Munk 			goto out;
6892e86c4e5SOphir Munk 		++sd->secondary_cnt;
6902e86c4e5SOphir Munk 		ld->init_done = true;
6912e86c4e5SOphir Munk 		break;
6922e86c4e5SOphir Munk 	default:
6932e86c4e5SOphir Munk 		break;
6942e86c4e5SOphir Munk 	}
6952e86c4e5SOphir Munk out:
6962e86c4e5SOphir Munk 	rte_spinlock_unlock(&sd->lock);
6972e86c4e5SOphir Munk 	return ret;
6982e86c4e5SOphir Munk }
6992e86c4e5SOphir Munk 
7002e86c4e5SOphir Munk /**
70186d259ceSMichael Baum  * Create the Tx queue DevX/Verbs object.
70286d259ceSMichael Baum  *
70386d259ceSMichael Baum  * @param dev
70486d259ceSMichael Baum  *   Pointer to Ethernet device.
70586d259ceSMichael Baum  * @param idx
70686d259ceSMichael Baum  *   Queue index in DPDK Tx queue array.
70786d259ceSMichael Baum  *
70886d259ceSMichael Baum  * @return
709f49f4483SMichael Baum  *   0 on success, a negative errno value otherwise and rte_errno is set.
71086d259ceSMichael Baum  */
711f49f4483SMichael Baum static int
71286d259ceSMichael Baum mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
71386d259ceSMichael Baum {
71486d259ceSMichael Baum 	struct mlx5_priv *priv = dev->data->dev_private;
71586d259ceSMichael Baum 	struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
71686d259ceSMichael Baum 	struct mlx5_txq_ctrl *txq_ctrl =
71786d259ceSMichael Baum 			container_of(txq_data, struct mlx5_txq_ctrl, txq);
71886d259ceSMichael Baum 
71986d259ceSMichael Baum 	if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
72086d259ceSMichael Baum 		return mlx5_txq_devx_obj_new(dev, idx);
72186d259ceSMichael Baum #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
7223ec73abeSMatan Azrad 	if (!priv->config.dv_esw_en)
72386d259ceSMichael Baum 		return mlx5_txq_devx_obj_new(dev, idx);
72486d259ceSMichael Baum #endif
72586d259ceSMichael Baum 	return mlx5_txq_ibv_obj_new(dev, idx);
72686d259ceSMichael Baum }
72786d259ceSMichael Baum 
72886d259ceSMichael Baum /**
72986d259ceSMichael Baum  * Release an Tx DevX/verbs queue object.
73086d259ceSMichael Baum  *
73186d259ceSMichael Baum  * @param txq_obj
73286d259ceSMichael Baum  *   DevX/Verbs Tx queue object.
73386d259ceSMichael Baum  */
73486d259ceSMichael Baum static void
73586d259ceSMichael Baum mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
73686d259ceSMichael Baum {
73786d259ceSMichael Baum 	if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
73886d259ceSMichael Baum 		mlx5_txq_devx_obj_release(txq_obj);
73986d259ceSMichael Baum 		return;
74086d259ceSMichael Baum 	}
7413ec73abeSMatan Azrad #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
7423ec73abeSMatan Azrad 	if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
7433ec73abeSMatan Azrad 		mlx5_txq_devx_obj_release(txq_obj);
7443ec73abeSMatan Azrad 		return;
74586d259ceSMichael Baum 	}
7463ec73abeSMatan Azrad #endif
74786d259ceSMichael Baum 	mlx5_txq_ibv_obj_release(txq_obj);
74886d259ceSMichael Baum }
74986d259ceSMichael Baum 
75086d259ceSMichael Baum /**
751994829e6SSuanming Mou  * DV flow counter mode detect and config.
752994829e6SSuanming Mou  *
753994829e6SSuanming Mou  * @param dev
754994829e6SSuanming Mou  *   Pointer to rte_eth_dev structure.
755994829e6SSuanming Mou  *
756994829e6SSuanming Mou  */
757994829e6SSuanming Mou static void
758994829e6SSuanming Mou mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
759994829e6SSuanming Mou {
760994829e6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT
761994829e6SSuanming Mou 	struct mlx5_priv *priv = dev->data->dev_private;
7622b5b1aebSSuanming Mou 	struct mlx5_dev_ctx_shared *sh = priv->sh;
7632b5b1aebSSuanming Mou 	bool fallback;
764994829e6SSuanming Mou 
765994829e6SSuanming Mou #ifndef HAVE_IBV_DEVX_ASYNC
7662b5b1aebSSuanming Mou 	fallback = true;
767994829e6SSuanming Mou #else
7682b5b1aebSSuanming Mou 	fallback = false;
7692b5b1aebSSuanming Mou 	if (!priv->config.devx || !priv->config.dv_flow_en ||
7702b5b1aebSSuanming Mou 	    !priv->config.hca_attr.flow_counters_dump ||
771994829e6SSuanming Mou 	    !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
772994829e6SSuanming Mou 	    (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
7732b5b1aebSSuanming Mou 		fallback = true;
774994829e6SSuanming Mou #endif
7752b5b1aebSSuanming Mou 	if (fallback)
776994829e6SSuanming Mou 		DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
777994829e6SSuanming Mou 			"counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
778994829e6SSuanming Mou 			priv->config.hca_attr.flow_counters_dump,
779994829e6SSuanming Mou 			priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
7802b5b1aebSSuanming Mou 	/* Initialize fallback mode only on the port initializes sh. */
7812b5b1aebSSuanming Mou 	if (sh->refcnt == 1)
7822b5b1aebSSuanming Mou 		sh->cmng.counter_fallback = fallback;
7832b5b1aebSSuanming Mou 	else if (fallback != sh->cmng.counter_fallback)
7842b5b1aebSSuanming Mou 		DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
7852b5b1aebSSuanming Mou 			"with others:%d.", PORT_ID(priv), fallback);
786994829e6SSuanming Mou #endif
787994829e6SSuanming Mou }
788994829e6SSuanming Mou 
789e6988afdSMatan Azrad static void
790e6988afdSMatan Azrad mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
791e6988afdSMatan Azrad {
792e6988afdSMatan Azrad 	struct mlx5_priv *priv = dev->data->dev_private;
793e6988afdSMatan Azrad 	void *ctx = priv->sh->ctx;
794e6988afdSMatan Azrad 
795e6988afdSMatan Azrad 	priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
796e6988afdSMatan Azrad 	if (!priv->q_counters) {
797e6988afdSMatan Azrad 		struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
798e6988afdSMatan Azrad 		struct ibv_wq *wq;
799e6988afdSMatan Azrad 
800e6988afdSMatan Azrad 		DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
801e6988afdSMatan Azrad 			"by DevX - fall-back to use the kernel driver global "
802e6988afdSMatan Azrad 			"queue counter.", dev->data->port_id);
803e6988afdSMatan Azrad 		/* Create WQ by kernel and query its queue counter ID. */
804e6988afdSMatan Azrad 		if (cq) {
805e6988afdSMatan Azrad 			wq = mlx5_glue->create_wq(ctx,
806e6988afdSMatan Azrad 						  &(struct ibv_wq_init_attr){
807e6988afdSMatan Azrad 						    .wq_type = IBV_WQT_RQ,
808e6988afdSMatan Azrad 						    .max_wr = 1,
809e6988afdSMatan Azrad 						    .max_sge = 1,
810e6988afdSMatan Azrad 						    .pd = priv->sh->pd,
811e6988afdSMatan Azrad 						    .cq = cq,
812e6988afdSMatan Azrad 						});
813e6988afdSMatan Azrad 			if (wq) {
814e6988afdSMatan Azrad 				/* Counter is assigned only on RDY state. */
815e6988afdSMatan Azrad 				int ret = mlx5_glue->modify_wq(wq,
816e6988afdSMatan Azrad 						 &(struct ibv_wq_attr){
817e6988afdSMatan Azrad 						 .attr_mask = IBV_WQ_ATTR_STATE,
818e6988afdSMatan Azrad 						 .wq_state = IBV_WQS_RDY,
819e6988afdSMatan Azrad 						});
820e6988afdSMatan Azrad 
821e6988afdSMatan Azrad 				if (ret == 0)
822e6988afdSMatan Azrad 					mlx5_devx_cmd_wq_query(wq,
823e6988afdSMatan Azrad 							 &priv->counter_set_id);
824e6988afdSMatan Azrad 				claim_zero(mlx5_glue->destroy_wq(wq));
825e6988afdSMatan Azrad 			}
826e6988afdSMatan Azrad 			claim_zero(mlx5_glue->destroy_cq(cq));
827e6988afdSMatan Azrad 		}
828e6988afdSMatan Azrad 	} else {
829e6988afdSMatan Azrad 		priv->counter_set_id = priv->q_counters->id;
830e6988afdSMatan Azrad 	}
831e6988afdSMatan Azrad 	if (priv->counter_set_id == 0)
832e6988afdSMatan Azrad 		DRV_LOG(INFO, "Part of the port %d statistics will not be "
833e6988afdSMatan Azrad 			"available.", dev->data->port_id);
834e6988afdSMatan Azrad }
835e6988afdSMatan Azrad 
836994829e6SSuanming Mou /**
837f926cce3SXueming Li  * Check if representor spawn info match devargs.
838f926cce3SXueming Li  *
839f926cce3SXueming Li  * @param spawn
840f926cce3SXueming Li  *   Verbs device parameters (name, port, switch_info) to spawn.
841f926cce3SXueming Li  * @param eth_da
842f926cce3SXueming Li  *   Device devargs to probe.
843f926cce3SXueming Li  *
844f926cce3SXueming Li  * @return
845f926cce3SXueming Li  *   Match result.
846f926cce3SXueming Li  */
847f926cce3SXueming Li static bool
848f926cce3SXueming Li mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
849f926cce3SXueming Li 		       struct rte_eth_devargs *eth_da)
850f926cce3SXueming Li {
851f926cce3SXueming Li 	struct mlx5_switch_info *switch_info = &spawn->info;
852f926cce3SXueming Li 	unsigned int p, f;
853f926cce3SXueming Li 	uint16_t id;
85491766faeSXueming Li 	uint16_t repr_id = mlx5_representor_id_encode(switch_info,
85591766faeSXueming Li 						      eth_da->type);
856f926cce3SXueming Li 
857f926cce3SXueming Li 	switch (eth_da->type) {
858f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_SF:
85991766faeSXueming Li 		if (!(spawn->info.port_name == -1 &&
86091766faeSXueming Li 		      switch_info->name_type ==
86191766faeSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
86291766faeSXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
863f926cce3SXueming Li 			rte_errno = EBUSY;
864f926cce3SXueming Li 			return false;
865f926cce3SXueming Li 		}
866f926cce3SXueming Li 		break;
867f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_VF:
868f926cce3SXueming Li 		/* Allows HPF representor index -1 as exception. */
869f926cce3SXueming Li 		if (!(spawn->info.port_name == -1 &&
870f926cce3SXueming Li 		      switch_info->name_type ==
871f926cce3SXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
872f926cce3SXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
873f926cce3SXueming Li 			rte_errno = EBUSY;
874f926cce3SXueming Li 			return false;
875f926cce3SXueming Li 		}
876f926cce3SXueming Li 		break;
877f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_NONE:
878f926cce3SXueming Li 		rte_errno = EBUSY;
879f926cce3SXueming Li 		return false;
880f926cce3SXueming Li 	default:
881f926cce3SXueming Li 		rte_errno = ENOTSUP;
882f926cce3SXueming Li 		DRV_LOG(ERR, "unsupported representor type");
883f926cce3SXueming Li 		return false;
884f926cce3SXueming Li 	}
885f926cce3SXueming Li 	/* Check representor ID: */
886f926cce3SXueming Li 	for (p = 0; p < eth_da->nb_ports; ++p) {
887f926cce3SXueming Li 		if (spawn->pf_bond < 0) {
888f926cce3SXueming Li 			/* For non-LAG mode, allow and ignore pf. */
889f926cce3SXueming Li 			switch_info->pf_num = eth_da->ports[p];
89091766faeSXueming Li 			repr_id = mlx5_representor_id_encode(switch_info,
89191766faeSXueming Li 							     eth_da->type);
892f926cce3SXueming Li 		}
893f926cce3SXueming Li 		for (f = 0; f < eth_da->nb_representor_ports; ++f) {
894f926cce3SXueming Li 			id = MLX5_REPRESENTOR_ID
895f926cce3SXueming Li 				(eth_da->ports[p], eth_da->type,
896f926cce3SXueming Li 				 eth_da->representor_ports[f]);
897f926cce3SXueming Li 			if (repr_id == id)
898f926cce3SXueming Li 				return true;
899f926cce3SXueming Li 		}
900f926cce3SXueming Li 	}
901f926cce3SXueming Li 	rte_errno = EBUSY;
902f926cce3SXueming Li 	return false;
903f926cce3SXueming Li }
904f926cce3SXueming Li 
905f926cce3SXueming Li 
906f926cce3SXueming Li /**
9072eb4d010SOphir Munk  * Spawn an Ethernet device from Verbs information.
9082eb4d010SOphir Munk  *
9092eb4d010SOphir Munk  * @param dpdk_dev
9102eb4d010SOphir Munk  *   Backing DPDK device.
9112eb4d010SOphir Munk  * @param spawn
9122eb4d010SOphir Munk  *   Verbs device parameters (name, port, switch_info) to spawn.
9132eb4d010SOphir Munk  * @param config
9142eb4d010SOphir Munk  *   Device configuration parameters.
915cb95feefSXueming Li  * @param config
916cb95feefSXueming Li  *   Device arguments.
9172eb4d010SOphir Munk  *
9182eb4d010SOphir Munk  * @return
9192eb4d010SOphir Munk  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
9202eb4d010SOphir Munk  *   is set. The following errors are defined:
9212eb4d010SOphir Munk  *
9222eb4d010SOphir Munk  *   EBUSY: device is not supposed to be spawned.
9232eb4d010SOphir Munk  *   EEXIST: device is already spawned
9242eb4d010SOphir Munk  */
9252eb4d010SOphir Munk static struct rte_eth_dev *
9262eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev,
9272eb4d010SOphir Munk 	       struct mlx5_dev_spawn_data *spawn,
928cb95feefSXueming Li 	       struct mlx5_dev_config *config,
929cb95feefSXueming Li 	       struct rte_eth_devargs *eth_da)
9302eb4d010SOphir Munk {
9312eb4d010SOphir Munk 	const struct mlx5_switch_info *switch_info = &spawn->info;
9322eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = NULL;
9332eb4d010SOphir Munk 	struct ibv_port_attr port_attr;
9342eb4d010SOphir Munk 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
9352eb4d010SOphir Munk 	struct rte_eth_dev *eth_dev = NULL;
9362eb4d010SOphir Munk 	struct mlx5_priv *priv = NULL;
9372eb4d010SOphir Munk 	int err = 0;
9382eb4d010SOphir Munk 	unsigned int hw_padding = 0;
9392eb4d010SOphir Munk 	unsigned int mps;
9402eb4d010SOphir Munk 	unsigned int tunnel_en = 0;
9412eb4d010SOphir Munk 	unsigned int mpls_en = 0;
9422eb4d010SOphir Munk 	unsigned int swp = 0;
9432eb4d010SOphir Munk 	unsigned int mprq = 0;
9442eb4d010SOphir Munk 	unsigned int mprq_min_stride_size_n = 0;
9452eb4d010SOphir Munk 	unsigned int mprq_max_stride_size_n = 0;
9462eb4d010SOphir Munk 	unsigned int mprq_min_stride_num_n = 0;
9472eb4d010SOphir Munk 	unsigned int mprq_max_stride_num_n = 0;
9482eb4d010SOphir Munk 	struct rte_ether_addr mac;
9492eb4d010SOphir Munk 	char name[RTE_ETH_NAME_MAX_LEN];
9502eb4d010SOphir Munk 	int own_domain_id = 0;
9512eb4d010SOphir Munk 	uint16_t port_id;
952d0cf77e8SViacheslav Ovsiienko 	struct mlx5_port_info vport_info = { .query_flags = 0 };
953b4edeaf3SSuanming Mou 	int i;
9542eb4d010SOphir Munk 
9552eb4d010SOphir Munk 	/* Determine if this port representor is supposed to be spawned. */
956f926cce3SXueming Li 	if (switch_info->representor && dpdk_dev->devargs &&
957f926cce3SXueming Li 	    !mlx5_representor_match(spawn, eth_da))
958d6541676SXueming Li 		return NULL;
9592eb4d010SOphir Munk 	/* Build device name. */
9602eb4d010SOphir Munk 	if (spawn->pf_bond < 0) {
9612eb4d010SOphir Munk 		/* Single device. */
9622eb4d010SOphir Munk 		if (!switch_info->representor)
9632eb4d010SOphir Munk 			strlcpy(name, dpdk_dev->name, sizeof(name));
9642eb4d010SOphir Munk 		else
965f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_representor_%s%u",
966cb95feefSXueming Li 				 dpdk_dev->name,
967cb95feefSXueming Li 				 switch_info->name_type ==
968cb95feefSXueming Li 				 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
969cb95feefSXueming Li 				 switch_info->port_name);
9702eb4d010SOphir Munk 	} else {
9712eb4d010SOphir Munk 		/* Bonding device. */
972f926cce3SXueming Li 		if (!switch_info->representor) {
973f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s",
974834a9019SOphir Munk 				 dpdk_dev->name,
975834a9019SOphir Munk 				 mlx5_os_get_dev_device_name(spawn->phys_dev));
976f926cce3SXueming Li 		} else {
977f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
978834a9019SOphir Munk 				dpdk_dev->name,
979834a9019SOphir Munk 				mlx5_os_get_dev_device_name(spawn->phys_dev),
980f926cce3SXueming Li 				switch_info->ctrl_num,
981f926cce3SXueming Li 				switch_info->pf_num,
982cb95feefSXueming Li 				switch_info->name_type ==
983cb95feefSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
9842eb4d010SOphir Munk 				switch_info->port_name);
9852eb4d010SOphir Munk 		}
986f926cce3SXueming Li 	}
987f926cce3SXueming Li 	if (err >= (int)sizeof(name))
988f926cce3SXueming Li 		DRV_LOG(WARNING, "device name overflow %s", name);
9892eb4d010SOphir Munk 	/* check if the device is already spawned */
9902eb4d010SOphir Munk 	if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
9912eb4d010SOphir Munk 		rte_errno = EEXIST;
9922eb4d010SOphir Munk 		return NULL;
9932eb4d010SOphir Munk 	}
9942eb4d010SOphir Munk 	DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
9952eb4d010SOphir Munk 	if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
9962eb4d010SOphir Munk 		struct mlx5_mp_id mp_id;
9972eb4d010SOphir Munk 
9982eb4d010SOphir Munk 		eth_dev = rte_eth_dev_attach_secondary(name);
9992eb4d010SOphir Munk 		if (eth_dev == NULL) {
10002eb4d010SOphir Munk 			DRV_LOG(ERR, "can not attach rte ethdev");
10012eb4d010SOphir Munk 			rte_errno = ENOMEM;
10022eb4d010SOphir Munk 			return NULL;
10032eb4d010SOphir Munk 		}
10042eb4d010SOphir Munk 		eth_dev->device = dpdk_dev;
1005b012b4ceSOphir Munk 		eth_dev->dev_ops = &mlx5_dev_sec_ops;
1006cbfc6111SFerruh Yigit 		eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1007cbfc6111SFerruh Yigit 		eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
10082eb4d010SOphir Munk 		err = mlx5_proc_priv_init(eth_dev);
10092eb4d010SOphir Munk 		if (err)
10102eb4d010SOphir Munk 			return NULL;
10112eb4d010SOphir Munk 		mp_id.port_id = eth_dev->data->port_id;
10122eb4d010SOphir Munk 		strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
10132eb4d010SOphir Munk 		/* Receive command fd from primary process */
10142eb4d010SOphir Munk 		err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
10152eb4d010SOphir Munk 		if (err < 0)
10162eb4d010SOphir Munk 			goto err_secondary;
10172eb4d010SOphir Munk 		/* Remap UAR for Tx queues. */
10182eb4d010SOphir Munk 		err = mlx5_tx_uar_init_secondary(eth_dev, err);
10192eb4d010SOphir Munk 		if (err)
10202eb4d010SOphir Munk 			goto err_secondary;
10212eb4d010SOphir Munk 		/*
10222eb4d010SOphir Munk 		 * Ethdev pointer is still required as input since
10232eb4d010SOphir Munk 		 * the primary device is not accessible from the
10242eb4d010SOphir Munk 		 * secondary process.
10252eb4d010SOphir Munk 		 */
10262eb4d010SOphir Munk 		eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
10272eb4d010SOphir Munk 		eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
10282eb4d010SOphir Munk 		return eth_dev;
10292eb4d010SOphir Munk err_secondary:
10302eb4d010SOphir Munk 		mlx5_dev_close(eth_dev);
10312eb4d010SOphir Munk 		return NULL;
10322eb4d010SOphir Munk 	}
10332eb4d010SOphir Munk 	/*
10342eb4d010SOphir Munk 	 * Some parameters ("tx_db_nc" in particularly) are needed in
10352eb4d010SOphir Munk 	 * advance to create dv/verbs device context. We proceed the
10362eb4d010SOphir Munk 	 * devargs here to get ones, and later proceed devargs again
10372eb4d010SOphir Munk 	 * to override some hardware settings.
10382eb4d010SOphir Munk 	 */
1039d462a83cSMichael Baum 	err = mlx5_args(config, dpdk_dev->devargs);
10402eb4d010SOphir Munk 	if (err) {
10412eb4d010SOphir Munk 		err = rte_errno;
10422eb4d010SOphir Munk 		DRV_LOG(ERR, "failed to process device arguments: %s",
10432eb4d010SOphir Munk 			strerror(rte_errno));
10442eb4d010SOphir Munk 		goto error;
10452eb4d010SOphir Munk 	}
10464ec6360dSGregory Etelson 	if (config->dv_miss_info) {
10474ec6360dSGregory Etelson 		if (switch_info->master || switch_info->representor)
10484ec6360dSGregory Etelson 			config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
10494ec6360dSGregory Etelson 	}
1050d462a83cSMichael Baum 	mlx5_malloc_mem_select(config->sys_mem_en);
1051d462a83cSMichael Baum 	sh = mlx5_alloc_shared_dev_ctx(spawn, config);
10522eb4d010SOphir Munk 	if (!sh)
10532eb4d010SOphir Munk 		return NULL;
1054d462a83cSMichael Baum 	config->devx = sh->devx;
10552eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1056d462a83cSMichael Baum 	config->dest_tir = 1;
10572eb4d010SOphir Munk #endif
10582eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
10592eb4d010SOphir Munk 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
10602eb4d010SOphir Munk #endif
10612eb4d010SOphir Munk 	/*
10622eb4d010SOphir Munk 	 * Multi-packet send is supported by ConnectX-4 Lx PF as well
10632eb4d010SOphir Munk 	 * as all ConnectX-5 devices.
10642eb4d010SOphir Munk 	 */
10652eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10662eb4d010SOphir Munk 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
10672eb4d010SOphir Munk #endif
10682eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
10692eb4d010SOphir Munk 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
10702eb4d010SOphir Munk #endif
10712eb4d010SOphir Munk 	mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
10722eb4d010SOphir Munk 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
10732eb4d010SOphir Munk 		if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
10742eb4d010SOphir Munk 			DRV_LOG(DEBUG, "enhanced MPW is supported");
10752eb4d010SOphir Munk 			mps = MLX5_MPW_ENHANCED;
10762eb4d010SOphir Munk 		} else {
10772eb4d010SOphir Munk 			DRV_LOG(DEBUG, "MPW is supported");
10782eb4d010SOphir Munk 			mps = MLX5_MPW;
10792eb4d010SOphir Munk 		}
10802eb4d010SOphir Munk 	} else {
10812eb4d010SOphir Munk 		DRV_LOG(DEBUG, "MPW isn't supported");
10822eb4d010SOphir Munk 		mps = MLX5_MPW_DISABLED;
10832eb4d010SOphir Munk 	}
10842eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
10852eb4d010SOphir Munk 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
10862eb4d010SOphir Munk 		swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
10872eb4d010SOphir Munk 	DRV_LOG(DEBUG, "SWP support: %u", swp);
10882eb4d010SOphir Munk #endif
1089d462a83cSMichael Baum 	config->swp = !!swp;
10902eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
10912eb4d010SOphir Munk 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
10922eb4d010SOphir Munk 		struct mlx5dv_striding_rq_caps mprq_caps =
10932eb4d010SOphir Munk 			dv_attr.striding_rq_caps;
10942eb4d010SOphir Munk 
10952eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
10962eb4d010SOphir Munk 			mprq_caps.min_single_stride_log_num_of_bytes);
10972eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
10982eb4d010SOphir Munk 			mprq_caps.max_single_stride_log_num_of_bytes);
10992eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
11002eb4d010SOphir Munk 			mprq_caps.min_single_wqe_log_num_of_strides);
11012eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
11022eb4d010SOphir Munk 			mprq_caps.max_single_wqe_log_num_of_strides);
11032eb4d010SOphir Munk 		DRV_LOG(DEBUG, "\tsupported_qpts: %d",
11042eb4d010SOphir Munk 			mprq_caps.supported_qpts);
11052eb4d010SOphir Munk 		DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
11062eb4d010SOphir Munk 		mprq = 1;
11072eb4d010SOphir Munk 		mprq_min_stride_size_n =
11082eb4d010SOphir Munk 			mprq_caps.min_single_stride_log_num_of_bytes;
11092eb4d010SOphir Munk 		mprq_max_stride_size_n =
11102eb4d010SOphir Munk 			mprq_caps.max_single_stride_log_num_of_bytes;
11112eb4d010SOphir Munk 		mprq_min_stride_num_n =
11122eb4d010SOphir Munk 			mprq_caps.min_single_wqe_log_num_of_strides;
11132eb4d010SOphir Munk 		mprq_max_stride_num_n =
11142eb4d010SOphir Munk 			mprq_caps.max_single_wqe_log_num_of_strides;
11152eb4d010SOphir Munk 	}
11162eb4d010SOphir Munk #endif
11173d3f4e6dSAlexander Kozyrev 	/* Rx CQE compression is enabled by default. */
11183d3f4e6dSAlexander Kozyrev 	config->cqe_comp = 1;
11192eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
11202eb4d010SOphir Munk 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
11212eb4d010SOphir Munk 		tunnel_en = ((dv_attr.tunnel_offloads_caps &
11222eb4d010SOphir Munk 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
11232eb4d010SOphir Munk 			     (dv_attr.tunnel_offloads_caps &
11242eb4d010SOphir Munk 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
11252eb4d010SOphir Munk 			     (dv_attr.tunnel_offloads_caps &
11262eb4d010SOphir Munk 			      MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
11272eb4d010SOphir Munk 	}
11282eb4d010SOphir Munk 	DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
11292eb4d010SOphir Munk 		tunnel_en ? "" : "not ");
11302eb4d010SOphir Munk #else
11312eb4d010SOphir Munk 	DRV_LOG(WARNING,
11322eb4d010SOphir Munk 		"tunnel offloading disabled due to old OFED/rdma-core version");
11332eb4d010SOphir Munk #endif
1134d462a83cSMichael Baum 	config->tunnel_en = tunnel_en;
11352eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
11362eb4d010SOphir Munk 	mpls_en = ((dv_attr.tunnel_offloads_caps &
11372eb4d010SOphir Munk 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
11382eb4d010SOphir Munk 		   (dv_attr.tunnel_offloads_caps &
11392eb4d010SOphir Munk 		    MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
11402eb4d010SOphir Munk 	DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
11412eb4d010SOphir Munk 		mpls_en ? "" : "not ");
11422eb4d010SOphir Munk #else
11432eb4d010SOphir Munk 	DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
11442eb4d010SOphir Munk 		" old OFED/rdma-core version or firmware configuration");
11452eb4d010SOphir Munk #endif
1146d462a83cSMichael Baum 	config->mpls_en = mpls_en;
11472eb4d010SOphir Munk 	/* Check port status. */
1148834a9019SOphir Munk 	err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
11492eb4d010SOphir Munk 	if (err) {
11502eb4d010SOphir Munk 		DRV_LOG(ERR, "port query failed: %s", strerror(err));
11512eb4d010SOphir Munk 		goto error;
11522eb4d010SOphir Munk 	}
11532eb4d010SOphir Munk 	if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
11542eb4d010SOphir Munk 		DRV_LOG(ERR, "port is not configured in Ethernet mode");
11552eb4d010SOphir Munk 		err = EINVAL;
11562eb4d010SOphir Munk 		goto error;
11572eb4d010SOphir Munk 	}
11582eb4d010SOphir Munk 	if (port_attr.state != IBV_PORT_ACTIVE)
11592eb4d010SOphir Munk 		DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
11602eb4d010SOphir Munk 			mlx5_glue->port_state_str(port_attr.state),
11612eb4d010SOphir Munk 			port_attr.state);
11622eb4d010SOphir Munk 	/* Allocate private eth device data. */
11632175c4dcSSuanming Mou 	priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
11642eb4d010SOphir Munk 			   sizeof(*priv),
11652175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
11662eb4d010SOphir Munk 	if (priv == NULL) {
11672eb4d010SOphir Munk 		DRV_LOG(ERR, "priv allocation failure");
11682eb4d010SOphir Munk 		err = ENOMEM;
11692eb4d010SOphir Munk 		goto error;
11702eb4d010SOphir Munk 	}
11712eb4d010SOphir Munk 	priv->sh = sh;
117291389890SOphir Munk 	priv->dev_port = spawn->phys_port;
11732eb4d010SOphir Munk 	priv->pci_dev = spawn->pci_dev;
11742eb4d010SOphir Munk 	priv->mtu = RTE_ETHER_MTU;
11752eb4d010SOphir Munk 	/* Some internal functions rely on Netlink sockets, open them now. */
11762eb4d010SOphir Munk 	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
11772eb4d010SOphir Munk 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
11782eb4d010SOphir Munk 	priv->representor = !!switch_info->representor;
11792eb4d010SOphir Munk 	priv->master = !!switch_info->master;
11802eb4d010SOphir Munk 	priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
11812eb4d010SOphir Munk 	priv->vport_meta_tag = 0;
11822eb4d010SOphir Munk 	priv->vport_meta_mask = 0;
11832eb4d010SOphir Munk 	priv->pf_bond = spawn->pf_bond;
11842eb4d010SOphir Munk 	/*
1185d0cf77e8SViacheslav Ovsiienko 	 * If we have E-Switch we should determine the vport attributes.
1186d0cf77e8SViacheslav Ovsiienko 	 * E-Switch may use either source vport field or reg_c[0] metadata
1187d0cf77e8SViacheslav Ovsiienko 	 * register to match on vport index. The engaged part of metadata
1188d0cf77e8SViacheslav Ovsiienko 	 * register is defined by mask.
11892eb4d010SOphir Munk 	 */
11902eb4d010SOphir Munk 	if (switch_info->representor || switch_info->master) {
1191d0cf77e8SViacheslav Ovsiienko 		err = mlx5_glue->devx_port_query(sh->ctx,
1192d0cf77e8SViacheslav Ovsiienko 						 spawn->phys_port,
1193d0cf77e8SViacheslav Ovsiienko 						 &vport_info);
11942eb4d010SOphir Munk 		if (err) {
11952eb4d010SOphir Munk 			DRV_LOG(WARNING,
11962eb4d010SOphir Munk 				"can't query devx port %d on device %s",
1197834a9019SOphir Munk 				spawn->phys_port,
1198834a9019SOphir Munk 				mlx5_os_get_dev_device_name(spawn->phys_dev));
1199d0cf77e8SViacheslav Ovsiienko 			vport_info.query_flags = 0;
12002eb4d010SOphir Munk 		}
12012eb4d010SOphir Munk 	}
1202d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1203d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_tag = vport_info.vport_meta_tag;
1204d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_mask = vport_info.vport_meta_mask;
12052eb4d010SOphir Munk 		if (!priv->vport_meta_mask) {
12062eb4d010SOphir Munk 			DRV_LOG(ERR, "vport zero mask for port %d"
12072eb4d010SOphir Munk 				     " on bonding device %s",
1208834a9019SOphir Munk 				     spawn->phys_port,
1209834a9019SOphir Munk 				     mlx5_os_get_dev_device_name
1210834a9019SOphir Munk 							(spawn->phys_dev));
12112eb4d010SOphir Munk 			err = ENOTSUP;
12122eb4d010SOphir Munk 			goto error;
12132eb4d010SOphir Munk 		}
12142eb4d010SOphir Munk 		if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
12152eb4d010SOphir Munk 			DRV_LOG(ERR, "invalid vport tag for port %d"
12162eb4d010SOphir Munk 				     " on bonding device %s",
1217834a9019SOphir Munk 				     spawn->phys_port,
1218834a9019SOphir Munk 				     mlx5_os_get_dev_device_name
1219834a9019SOphir Munk 							(spawn->phys_dev));
12202eb4d010SOphir Munk 			err = ENOTSUP;
12212eb4d010SOphir Munk 			goto error;
12222eb4d010SOphir Munk 		}
12232eb4d010SOphir Munk 	}
1224d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1225d0cf77e8SViacheslav Ovsiienko 		priv->vport_id = vport_info.vport_id;
1226ecaee305SViacheslav Ovsiienko 	} else if (spawn->pf_bond >= 0 &&
1227ecaee305SViacheslav Ovsiienko 		   (switch_info->representor || switch_info->master)) {
12282eb4d010SOphir Munk 		DRV_LOG(ERR, "can't deduce vport index for port %d"
12292eb4d010SOphir Munk 			     " on bonding device %s",
1230834a9019SOphir Munk 			     spawn->phys_port,
1231834a9019SOphir Munk 			     mlx5_os_get_dev_device_name(spawn->phys_dev));
12322eb4d010SOphir Munk 		err = ENOTSUP;
12332eb4d010SOphir Munk 		goto error;
12342eb4d010SOphir Munk 	} else {
12352eb4d010SOphir Munk 		/*
1236d0cf77e8SViacheslav Ovsiienko 		 * Suppose vport index in compatible way. Kernel/rdma_core
1237d0cf77e8SViacheslav Ovsiienko 		 * support single E-Switch per PF configurations only and
1238d0cf77e8SViacheslav Ovsiienko 		 * vport_id field contains the vport index for associated VF,
1239d0cf77e8SViacheslav Ovsiienko 		 * which is deduced from representor port name.
12402eb4d010SOphir Munk 		 * For example, let's have the IB device port 10, it has
12412eb4d010SOphir Munk 		 * attached network device eth0, which has port name attribute
12422eb4d010SOphir Munk 		 * pf0vf2, we can deduce the VF number as 2, and set vport index
12432eb4d010SOphir Munk 		 * as 3 (2+1). This assigning schema should be changed if the
12442eb4d010SOphir Munk 		 * multiple E-Switch instances per PF configurations or/and PCI
12452eb4d010SOphir Munk 		 * subfunctions are added.
12462eb4d010SOphir Munk 		 */
12472eb4d010SOphir Munk 		priv->vport_id = switch_info->representor ?
12482eb4d010SOphir Munk 				 switch_info->port_name + 1 : -1;
1249d0cf77e8SViacheslav Ovsiienko 	}
125091766faeSXueming Li 	priv->representor_id = mlx5_representor_id_encode(switch_info,
125191766faeSXueming Li 							  eth_da->type);
12522eb4d010SOphir Munk 	/*
12532eb4d010SOphir Munk 	 * Look for sibling devices in order to reuse their switch domain
12542eb4d010SOphir Munk 	 * if any, otherwise allocate one.
12552eb4d010SOphir Munk 	 */
125656bb3c84SXueming Li 	MLX5_ETH_FOREACH_DEV(port_id, NULL) {
12572eb4d010SOphir Munk 		const struct mlx5_priv *opriv =
12582eb4d010SOphir Munk 			rte_eth_devices[port_id].data->dev_private;
12592eb4d010SOphir Munk 
12602eb4d010SOphir Munk 		if (!opriv ||
12612eb4d010SOphir Munk 		    opriv->sh != priv->sh ||
12622eb4d010SOphir Munk 			opriv->domain_id ==
12632eb4d010SOphir Munk 			RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
12642eb4d010SOphir Munk 			continue;
12652eb4d010SOphir Munk 		priv->domain_id = opriv->domain_id;
12662eb4d010SOphir Munk 		break;
12672eb4d010SOphir Munk 	}
12682eb4d010SOphir Munk 	if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
12692eb4d010SOphir Munk 		err = rte_eth_switch_domain_alloc(&priv->domain_id);
12702eb4d010SOphir Munk 		if (err) {
12712eb4d010SOphir Munk 			err = rte_errno;
12722eb4d010SOphir Munk 			DRV_LOG(ERR, "unable to allocate switch domain: %s",
12732eb4d010SOphir Munk 				strerror(rte_errno));
12742eb4d010SOphir Munk 			goto error;
12752eb4d010SOphir Munk 		}
12762eb4d010SOphir Munk 		own_domain_id = 1;
12772eb4d010SOphir Munk 	}
12782eb4d010SOphir Munk 	/* Override some values set by hardware configuration. */
1279d462a83cSMichael Baum 	mlx5_args(config, dpdk_dev->devargs);
1280d462a83cSMichael Baum 	err = mlx5_dev_check_sibling_config(priv, config);
12812eb4d010SOphir Munk 	if (err)
12822eb4d010SOphir Munk 		goto error;
1283d462a83cSMichael Baum 	config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
12842eb4d010SOphir Munk 			    IBV_DEVICE_RAW_IP_CSUM);
12852eb4d010SOphir Munk 	DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1286d462a83cSMichael Baum 		(config->hw_csum ? "" : "not "));
12872eb4d010SOphir Munk #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
12882eb4d010SOphir Munk 	!defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
12892eb4d010SOphir Munk 	DRV_LOG(DEBUG, "counters are not supported");
12902eb4d010SOphir Munk #endif
12912eb4d010SOphir Munk #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1292d462a83cSMichael Baum 	if (config->dv_flow_en) {
12932eb4d010SOphir Munk 		DRV_LOG(WARNING, "DV flow is not supported");
1294d462a83cSMichael Baum 		config->dv_flow_en = 0;
12952eb4d010SOphir Munk 	}
12962eb4d010SOphir Munk #endif
1297*cdfdb82dSXueming Li 	if (spawn->max_port > UINT8_MAX) {
1298*cdfdb82dSXueming Li 		/* Verbs can't support ports larger than 255 by design. */
1299*cdfdb82dSXueming Li 		DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1300*cdfdb82dSXueming Li 		err = EINVAL;
1301*cdfdb82dSXueming Li 		goto error;
1302*cdfdb82dSXueming Li 	}
1303d462a83cSMichael Baum 	config->ind_table_max_size =
13042eb4d010SOphir Munk 		sh->device_attr.max_rwq_indirection_table_size;
13052eb4d010SOphir Munk 	/*
13062eb4d010SOphir Munk 	 * Remove this check once DPDK supports larger/variable
13072eb4d010SOphir Munk 	 * indirection tables.
13082eb4d010SOphir Munk 	 */
1309d462a83cSMichael Baum 	if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1310d462a83cSMichael Baum 		config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
13112eb4d010SOphir Munk 	DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1312d462a83cSMichael Baum 		config->ind_table_max_size);
1313d462a83cSMichael Baum 	config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
13142eb4d010SOphir Munk 				  IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
13152eb4d010SOphir Munk 	DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1316d462a83cSMichael Baum 		(config->hw_vlan_strip ? "" : "not "));
1317d462a83cSMichael Baum 	config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
13182eb4d010SOphir Munk 				 IBV_RAW_PACKET_CAP_SCATTER_FCS);
13192eb4d010SOphir Munk #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
13202eb4d010SOphir Munk 	hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
13212eb4d010SOphir Munk #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
13222eb4d010SOphir Munk 	hw_padding = !!(sh->device_attr.device_cap_flags_ex &
13232eb4d010SOphir Munk 			IBV_DEVICE_PCI_WRITE_END_PADDING);
13242eb4d010SOphir Munk #endif
1325d462a83cSMichael Baum 	if (config->hw_padding && !hw_padding) {
13262eb4d010SOphir Munk 		DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1327d462a83cSMichael Baum 		config->hw_padding = 0;
1328d462a83cSMichael Baum 	} else if (config->hw_padding) {
13292eb4d010SOphir Munk 		DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
13302eb4d010SOphir Munk 	}
1331d462a83cSMichael Baum 	config->tso = (sh->device_attr.max_tso > 0 &&
13322eb4d010SOphir Munk 		      (sh->device_attr.tso_supported_qpts &
13332eb4d010SOphir Munk 		       (1 << IBV_QPT_RAW_PACKET)));
1334d462a83cSMichael Baum 	if (config->tso)
1335d462a83cSMichael Baum 		config->tso_max_payload_sz = sh->device_attr.max_tso;
13362eb4d010SOphir Munk 	/*
13372eb4d010SOphir Munk 	 * MPW is disabled by default, while the Enhanced MPW is enabled
13382eb4d010SOphir Munk 	 * by default.
13392eb4d010SOphir Munk 	 */
1340d462a83cSMichael Baum 	if (config->mps == MLX5_ARG_UNSET)
1341d462a83cSMichael Baum 		config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
13422eb4d010SOphir Munk 							  MLX5_MPW_DISABLED;
13432eb4d010SOphir Munk 	else
1344d462a83cSMichael Baum 		config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
13452eb4d010SOphir Munk 	DRV_LOG(INFO, "%sMPS is %s",
1346d462a83cSMichael Baum 		config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1347d462a83cSMichael Baum 		config->mps == MLX5_MPW ? "legacy " : "",
1348d462a83cSMichael Baum 		config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1349d462a83cSMichael Baum 	if (config->devx) {
1350d462a83cSMichael Baum 		err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
13512eb4d010SOphir Munk 		if (err) {
13522eb4d010SOphir Munk 			err = -err;
13532eb4d010SOphir Munk 			goto error;
13542eb4d010SOphir Munk 		}
13553aa27915SSuanming Mou 		/* Check relax ordering support. */
1356e82ddd28STal Shnaiderman 		if (!haswell_broadwell_cpu) {
1357e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_write =
1358e82ddd28STal Shnaiderman 				config->hca_attr.relaxed_ordering_write;
1359e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_read =
1360e82ddd28STal Shnaiderman 				config->hca_attr.relaxed_ordering_read;
1361e82ddd28STal Shnaiderman 		} else {
1362e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_read = 0;
1363e82ddd28STal Shnaiderman 			sh->cmng.relaxed_ordering_write = 0;
1364e82ddd28STal Shnaiderman 		}
1365d61381adSViacheslav Ovsiienko 		sh->rq_ts_format = config->hca_attr.rq_ts_format;
1366d61381adSViacheslav Ovsiienko 		sh->sq_ts_format = config->hca_attr.sq_ts_format;
1367d61381adSViacheslav Ovsiienko 		sh->qp_ts_format = config->hca_attr.qp_ts_format;
13682eb4d010SOphir Munk 		/* Check for LRO support. */
1369d462a83cSMichael Baum 		if (config->dest_tir && config->hca_attr.lro_cap &&
1370d462a83cSMichael Baum 		    config->dv_flow_en) {
13712eb4d010SOphir Munk 			/* TBD check tunnel lro caps. */
1372d462a83cSMichael Baum 			config->lro.supported = config->hca_attr.lro_cap;
13732eb4d010SOphir Munk 			DRV_LOG(DEBUG, "Device supports LRO");
13742eb4d010SOphir Munk 			/*
13752eb4d010SOphir Munk 			 * If LRO timeout is not configured by application,
13762eb4d010SOphir Munk 			 * use the minimal supported value.
13772eb4d010SOphir Munk 			 */
1378d462a83cSMichael Baum 			if (!config->lro.timeout)
1379d462a83cSMichael Baum 				config->lro.timeout =
1380d462a83cSMichael Baum 				config->hca_attr.lro_timer_supported_periods[0];
13812eb4d010SOphir Munk 			DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1382d462a83cSMichael Baum 				config->lro.timeout);
1383613d64e4SDekel Peled 			DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1384613d64e4SDekel Peled 				"required for coalescing is %d bytes",
1385613d64e4SDekel Peled 				config->hca_attr.lro_min_mss_size);
13862eb4d010SOphir Munk 		}
1387c99b4f8bSLi Zhang #if defined(HAVE_MLX5DV_DR) && \
1388c99b4f8bSLi Zhang 	(defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1389c99b4f8bSLi Zhang 	 defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1390d462a83cSMichael Baum 		if (config->hca_attr.qos.sup &&
1391b6505738SDekel Peled 		    config->hca_attr.qos.flow_meter_old &&
1392d462a83cSMichael Baum 		    config->dv_flow_en) {
13932eb4d010SOphir Munk 			uint8_t reg_c_mask =
1394d462a83cSMichael Baum 				config->hca_attr.qos.flow_meter_reg_c_ids;
13952eb4d010SOphir Munk 			/*
13962eb4d010SOphir Munk 			 * Meter needs two REG_C's for color match and pre-sfx
13972eb4d010SOphir Munk 			 * flow match. Here get the REG_C for color match.
13982eb4d010SOphir Munk 			 * REG_C_0 and REG_C_1 is reserved for metadata feature.
13992eb4d010SOphir Munk 			 */
14002eb4d010SOphir Munk 			reg_c_mask &= 0xfc;
14012eb4d010SOphir Munk 			if (__builtin_popcount(reg_c_mask) < 1) {
14022eb4d010SOphir Munk 				priv->mtr_en = 0;
14032eb4d010SOphir Munk 				DRV_LOG(WARNING, "No available register for"
14042eb4d010SOphir Munk 					" meter.");
14052eb4d010SOphir Munk 			} else {
140631ef2982SDekel Peled 				/*
140731ef2982SDekel Peled 				 * The meter color register is used by the
140831ef2982SDekel Peled 				 * flow-hit feature as well.
140931ef2982SDekel Peled 				 * The flow-hit feature must use REG_C_3
141031ef2982SDekel Peled 				 * Prefer REG_C_3 if it is available.
141131ef2982SDekel Peled 				 */
141231ef2982SDekel Peled 				if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
141331ef2982SDekel Peled 					priv->mtr_color_reg = REG_C_3;
141431ef2982SDekel Peled 				else
141531ef2982SDekel Peled 					priv->mtr_color_reg = ffs(reg_c_mask)
141631ef2982SDekel Peled 							      - 1 + REG_C_0;
14172eb4d010SOphir Munk 				priv->mtr_en = 1;
14182eb4d010SOphir Munk 				priv->mtr_reg_share =
1419b6505738SDekel Peled 				      config->hca_attr.qos.flow_meter;
14202eb4d010SOphir Munk 				DRV_LOG(DEBUG, "The REG_C meter uses is %d",
14212eb4d010SOphir Munk 					priv->mtr_color_reg);
14222eb4d010SOphir Munk 			}
14232eb4d010SOphir Munk 		}
142429efa63aSLi Zhang 		if (config->hca_attr.qos.sup &&
142529efa63aSLi Zhang 			config->hca_attr.qos.flow_meter_aso_sup) {
142629efa63aSLi Zhang 			uint32_t log_obj_size =
142729efa63aSLi Zhang 				rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
142829efa63aSLi Zhang 			if (log_obj_size >=
142929efa63aSLi Zhang 			config->hca_attr.qos.log_meter_aso_granularity &&
143029efa63aSLi Zhang 			log_obj_size <=
143144432018SLi Zhang 			config->hca_attr.qos.log_meter_aso_max_alloc)
143229efa63aSLi Zhang 				sh->meter_aso_en = 1;
143344432018SLi Zhang 		}
143444432018SLi Zhang 		if (priv->mtr_en) {
1435afb4aa4fSLi Zhang 			err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
143629efa63aSLi Zhang 			if (err) {
143729efa63aSLi Zhang 				err = -err;
143829efa63aSLi Zhang 				goto error;
143929efa63aSLi Zhang 			}
144029efa63aSLi Zhang 		}
1441630a587bSRongwei Liu 		if (config->hca_attr.flow.tunnel_header_0_1)
1442630a587bSRongwei Liu 			sh->tunnel_header_0_1 = 1;
14432eb4d010SOphir Munk #endif
1444a2999c7bSDekel Peled #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
144531ef2982SDekel Peled 		if (config->hca_attr.flow_hit_aso &&
144631ef2982SDekel Peled 		    priv->mtr_color_reg == REG_C_3) {
144731ef2982SDekel Peled 			sh->flow_hit_aso_en = 1;
144831ef2982SDekel Peled 			err = mlx5_flow_aso_age_mng_init(sh);
144931ef2982SDekel Peled 			if (err) {
145031ef2982SDekel Peled 				err = -err;
145131ef2982SDekel Peled 				goto error;
145231ef2982SDekel Peled 			}
145331ef2982SDekel Peled 			DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
145431ef2982SDekel Peled 		}
1455a2999c7bSDekel Peled #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1456ee9e5fadSBing Zhao #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1457ee9e5fadSBing Zhao 	defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1458ee9e5fadSBing Zhao 		if (config->hca_attr.ct_offload &&
1459ee9e5fadSBing Zhao 		    priv->mtr_color_reg == REG_C_3) {
1460ee9e5fadSBing Zhao 			err = mlx5_flow_aso_ct_mng_init(sh);
1461ee9e5fadSBing Zhao 			if (err) {
1462ee9e5fadSBing Zhao 				err = -err;
1463ee9e5fadSBing Zhao 				goto error;
1464ee9e5fadSBing Zhao 			}
1465ee9e5fadSBing Zhao 			DRV_LOG(DEBUG, "CT ASO is supported.");
1466ee9e5fadSBing Zhao 			sh->ct_aso_en = 1;
1467ee9e5fadSBing Zhao 		}
1468ee9e5fadSBing Zhao #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
146996b1f027SJiawei Wang #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
147096b1f027SJiawei Wang 		if (config->hca_attr.log_max_ft_sampler_num > 0  &&
147196b1f027SJiawei Wang 		    config->dv_flow_en) {
147296b1f027SJiawei Wang 			priv->sampler_en = 1;
14731b9e9826SThomas Monjalon 			DRV_LOG(DEBUG, "Sampler enabled!");
147496b1f027SJiawei Wang 		} else {
147596b1f027SJiawei Wang 			priv->sampler_en = 0;
147696b1f027SJiawei Wang 			if (!config->hca_attr.log_max_ft_sampler_num)
14771b9e9826SThomas Monjalon 				DRV_LOG(WARNING,
14781b9e9826SThomas Monjalon 					"No available register for sampler.");
147996b1f027SJiawei Wang 			else
14801b9e9826SThomas Monjalon 				DRV_LOG(DEBUG, "DV flow is not supported!");
148196b1f027SJiawei Wang 		}
148296b1f027SJiawei Wang #endif
14832eb4d010SOphir Munk 	}
14843d3f4e6dSAlexander Kozyrev 	if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
14853d3f4e6dSAlexander Kozyrev 	    !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
14863d3f4e6dSAlexander Kozyrev 		DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
14873d3f4e6dSAlexander Kozyrev 		config->cqe_comp = 0;
14883d3f4e6dSAlexander Kozyrev 	}
14893d3f4e6dSAlexander Kozyrev 	if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
14903d3f4e6dSAlexander Kozyrev 	    (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
14913d3f4e6dSAlexander Kozyrev 		DRV_LOG(WARNING, "Flow Tag CQE compression"
14923d3f4e6dSAlexander Kozyrev 				 " format isn't supported.");
14933d3f4e6dSAlexander Kozyrev 		config->cqe_comp = 0;
14943d3f4e6dSAlexander Kozyrev 	}
14953d3f4e6dSAlexander Kozyrev 	if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
14963d3f4e6dSAlexander Kozyrev 	    (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
14973d3f4e6dSAlexander Kozyrev 		DRV_LOG(WARNING, "L3/L4 Header CQE compression"
14983d3f4e6dSAlexander Kozyrev 				 " format isn't supported.");
14993d3f4e6dSAlexander Kozyrev 		config->cqe_comp = 0;
15003d3f4e6dSAlexander Kozyrev 	}
15013d3f4e6dSAlexander Kozyrev 	DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
15023d3f4e6dSAlexander Kozyrev 			config->cqe_comp ? "" : "not ");
1503d462a83cSMichael Baum 	if (config->tx_pp) {
15048f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1505d462a83cSMichael Baum 			config->hca_attr.dev_freq_khz);
15068f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1507d462a83cSMichael Baum 			config->hca_attr.qos.packet_pacing ? "" : "not ");
15088f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1509d462a83cSMichael Baum 			config->hca_attr.cross_channel ? "" : "not ");
15108f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1511d462a83cSMichael Baum 			config->hca_attr.wqe_index_ignore ? "" : "not ");
15128f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1513d462a83cSMichael Baum 			config->hca_attr.non_wire_sq ? "" : "not ");
15148f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1515d462a83cSMichael Baum 			config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1516d462a83cSMichael Baum 			config->hca_attr.log_max_static_sq_wq);
15178f848f32SViacheslav Ovsiienko 		DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1518d462a83cSMichael Baum 			config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1519d462a83cSMichael Baum 		if (!config->devx) {
15208f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "DevX is required for packet pacing");
15218f848f32SViacheslav Ovsiienko 			err = ENODEV;
15228f848f32SViacheslav Ovsiienko 			goto error;
15238f848f32SViacheslav Ovsiienko 		}
1524d462a83cSMichael Baum 		if (!config->hca_attr.qos.packet_pacing) {
15258f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Packet pacing is not supported");
15268f848f32SViacheslav Ovsiienko 			err = ENODEV;
15278f848f32SViacheslav Ovsiienko 			goto error;
15288f848f32SViacheslav Ovsiienko 		}
1529d462a83cSMichael Baum 		if (!config->hca_attr.cross_channel) {
15308f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Cross channel operations are"
15318f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15328f848f32SViacheslav Ovsiienko 			err = ENODEV;
15338f848f32SViacheslav Ovsiienko 			goto error;
15348f848f32SViacheslav Ovsiienko 		}
1535d462a83cSMichael Baum 		if (!config->hca_attr.wqe_index_ignore) {
15368f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "WQE index ignore feature is"
15378f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15388f848f32SViacheslav Ovsiienko 			err = ENODEV;
15398f848f32SViacheslav Ovsiienko 			goto error;
15408f848f32SViacheslav Ovsiienko 		}
1541d462a83cSMichael Baum 		if (!config->hca_attr.non_wire_sq) {
15428f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Non-wire SQ feature is"
15438f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15448f848f32SViacheslav Ovsiienko 			err = ENODEV;
15458f848f32SViacheslav Ovsiienko 			goto error;
15468f848f32SViacheslav Ovsiienko 		}
1547d462a83cSMichael Baum 		if (!config->hca_attr.log_max_static_sq_wq) {
15488f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "Static WQE SQ feature is"
15498f848f32SViacheslav Ovsiienko 				     " required for packet pacing");
15508f848f32SViacheslav Ovsiienko 			err = ENODEV;
15518f848f32SViacheslav Ovsiienko 			goto error;
15528f848f32SViacheslav Ovsiienko 		}
1553d462a83cSMichael Baum 		if (!config->hca_attr.qos.wqe_rate_pp) {
15548f848f32SViacheslav Ovsiienko 			DRV_LOG(ERR, "WQE rate mode is required"
15558f848f32SViacheslav Ovsiienko 				     " for packet pacing");
15568f848f32SViacheslav Ovsiienko 			err = ENODEV;
15578f848f32SViacheslav Ovsiienko 			goto error;
15588f848f32SViacheslav Ovsiienko 		}
15598f848f32SViacheslav Ovsiienko #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
15608f848f32SViacheslav Ovsiienko 		DRV_LOG(ERR, "DevX does not provide UAR offset,"
15618f848f32SViacheslav Ovsiienko 			     " can't create queues for packet pacing");
15628f848f32SViacheslav Ovsiienko 		err = ENODEV;
15638f848f32SViacheslav Ovsiienko 		goto error;
15648f848f32SViacheslav Ovsiienko #endif
15658f848f32SViacheslav Ovsiienko 	}
1566d462a83cSMichael Baum 	if (config->devx) {
1567a2854c4dSViacheslav Ovsiienko 		uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1568a2854c4dSViacheslav Ovsiienko 
1569972a1bf8SViacheslav Ovsiienko 		err = config->hca_attr.access_register_user ?
1570972a1bf8SViacheslav Ovsiienko 			mlx5_devx_cmd_register_read
1571a2854c4dSViacheslav Ovsiienko 				(sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1572972a1bf8SViacheslav Ovsiienko 				reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1573a2854c4dSViacheslav Ovsiienko 		if (!err) {
1574a2854c4dSViacheslav Ovsiienko 			uint32_t ts_mode;
1575a2854c4dSViacheslav Ovsiienko 
1576a2854c4dSViacheslav Ovsiienko 			/* MTUTC register is read successfully. */
1577a2854c4dSViacheslav Ovsiienko 			ts_mode = MLX5_GET(register_mtutc, reg,
1578a2854c4dSViacheslav Ovsiienko 					   time_stamp_mode);
1579a2854c4dSViacheslav Ovsiienko 			if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1580d462a83cSMichael Baum 				config->rt_timestamp = 1;
1581a2854c4dSViacheslav Ovsiienko 		} else {
1582a2854c4dSViacheslav Ovsiienko 			/* Kernel does not support register reading. */
1583d462a83cSMichael Baum 			if (config->hca_attr.dev_freq_khz ==
1584a2854c4dSViacheslav Ovsiienko 						 (NS_PER_S / MS_PER_S))
1585d462a83cSMichael Baum 				config->rt_timestamp = 1;
1586a2854c4dSViacheslav Ovsiienko 		}
1587a2854c4dSViacheslav Ovsiienko 	}
158850f95b23SSuanming Mou 	/*
158950f95b23SSuanming Mou 	 * If HW has bug working with tunnel packet decapsulation and
159050f95b23SSuanming Mou 	 * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
159150f95b23SSuanming Mou 	 * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
159250f95b23SSuanming Mou 	 */
1593d462a83cSMichael Baum 	if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1594d462a83cSMichael Baum 		config->hw_fcs_strip = 0;
159550f95b23SSuanming Mou 	DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1596d462a83cSMichael Baum 		(config->hw_fcs_strip ? "" : "not "));
1597d462a83cSMichael Baum 	if (config->mprq.enabled && mprq) {
1598d462a83cSMichael Baum 		if (config->mprq.stride_num_n &&
1599d462a83cSMichael Baum 		    (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1600d462a83cSMichael Baum 		     config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1601d462a83cSMichael Baum 			config->mprq.stride_num_n =
16022eb4d010SOphir Munk 				RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
16032eb4d010SOphir Munk 						mprq_min_stride_num_n),
16042eb4d010SOphir Munk 					mprq_max_stride_num_n);
16052eb4d010SOphir Munk 			DRV_LOG(WARNING,
16062eb4d010SOphir Munk 				"the number of strides"
16072eb4d010SOphir Munk 				" for Multi-Packet RQ is out of range,"
16082eb4d010SOphir Munk 				" setting default value (%u)",
1609d462a83cSMichael Baum 				1 << config->mprq.stride_num_n);
16102eb4d010SOphir Munk 		}
1611d462a83cSMichael Baum 		if (config->mprq.stride_size_n &&
1612d462a83cSMichael Baum 		    (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1613d462a83cSMichael Baum 		     config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1614d462a83cSMichael Baum 			config->mprq.stride_size_n =
16152eb4d010SOphir Munk 				RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
16162eb4d010SOphir Munk 						mprq_min_stride_size_n),
16172eb4d010SOphir Munk 					mprq_max_stride_size_n);
16182eb4d010SOphir Munk 			DRV_LOG(WARNING,
16192eb4d010SOphir Munk 				"the size of a stride"
16202eb4d010SOphir Munk 				" for Multi-Packet RQ is out of range,"
16212eb4d010SOphir Munk 				" setting default value (%u)",
1622d462a83cSMichael Baum 				1 << config->mprq.stride_size_n);
16232eb4d010SOphir Munk 		}
1624d462a83cSMichael Baum 		config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1625d462a83cSMichael Baum 		config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1626d462a83cSMichael Baum 	} else if (config->mprq.enabled && !mprq) {
16272eb4d010SOphir Munk 		DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1628d462a83cSMichael Baum 		config->mprq.enabled = 0;
16292eb4d010SOphir Munk 	}
1630d462a83cSMichael Baum 	if (config->max_dump_files_num == 0)
1631d462a83cSMichael Baum 		config->max_dump_files_num = 128;
16322eb4d010SOphir Munk 	eth_dev = rte_eth_dev_allocate(name);
16332eb4d010SOphir Munk 	if (eth_dev == NULL) {
16342eb4d010SOphir Munk 		DRV_LOG(ERR, "can not allocate rte ethdev");
16352eb4d010SOphir Munk 		err = ENOMEM;
16362eb4d010SOphir Munk 		goto error;
16372eb4d010SOphir Munk 	}
16382eb4d010SOphir Munk 	if (priv->representor) {
16392eb4d010SOphir Munk 		eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
16402eb4d010SOphir Munk 		eth_dev->data->representor_id = priv->representor_id;
16412eb4d010SOphir Munk 	}
164239ae7577SSuanming Mou 	priv->mp_id.port_id = eth_dev->data->port_id;
164339ae7577SSuanming Mou 	strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
16442eb4d010SOphir Munk 	/*
16452eb4d010SOphir Munk 	 * Store associated network device interface index. This index
16462eb4d010SOphir Munk 	 * is permanent throughout the lifetime of device. So, we may store
16472eb4d010SOphir Munk 	 * the ifindex here and use the cached value further.
16482eb4d010SOphir Munk 	 */
16492eb4d010SOphir Munk 	MLX5_ASSERT(spawn->ifindex);
16502eb4d010SOphir Munk 	priv->if_index = spawn->ifindex;
16512eb4d010SOphir Munk 	eth_dev->data->dev_private = priv;
16522eb4d010SOphir Munk 	priv->dev_data = eth_dev->data;
16532eb4d010SOphir Munk 	eth_dev->data->mac_addrs = priv->mac;
16542eb4d010SOphir Munk 	eth_dev->device = dpdk_dev;
1655f30e69b4SFerruh Yigit 	eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
16562eb4d010SOphir Munk 	/* Configure the first MAC address by default. */
16572eb4d010SOphir Munk 	if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
16582eb4d010SOphir Munk 		DRV_LOG(ERR,
16592eb4d010SOphir Munk 			"port %u cannot get MAC address, is mlx5_en"
16602eb4d010SOphir Munk 			" loaded? (errno: %s)",
16612eb4d010SOphir Munk 			eth_dev->data->port_id, strerror(rte_errno));
16622eb4d010SOphir Munk 		err = ENODEV;
16632eb4d010SOphir Munk 		goto error;
16642eb4d010SOphir Munk 	}
16652eb4d010SOphir Munk 	DRV_LOG(INFO,
16662eb4d010SOphir Munk 		"port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
16672eb4d010SOphir Munk 		eth_dev->data->port_id,
16682eb4d010SOphir Munk 		mac.addr_bytes[0], mac.addr_bytes[1],
16692eb4d010SOphir Munk 		mac.addr_bytes[2], mac.addr_bytes[3],
16702eb4d010SOphir Munk 		mac.addr_bytes[4], mac.addr_bytes[5]);
16712eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG
16722eb4d010SOphir Munk 	{
167328743807STal Shnaiderman 		char ifname[MLX5_NAMESIZE];
16742eb4d010SOphir Munk 
16752eb4d010SOphir Munk 		if (mlx5_get_ifname(eth_dev, &ifname) == 0)
16762eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
16772eb4d010SOphir Munk 				eth_dev->data->port_id, ifname);
16782eb4d010SOphir Munk 		else
16792eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is unknown",
16802eb4d010SOphir Munk 				eth_dev->data->port_id);
16812eb4d010SOphir Munk 	}
16822eb4d010SOphir Munk #endif
16832eb4d010SOphir Munk 	/* Get actual MTU if possible. */
16842eb4d010SOphir Munk 	err = mlx5_get_mtu(eth_dev, &priv->mtu);
16852eb4d010SOphir Munk 	if (err) {
16862eb4d010SOphir Munk 		err = rte_errno;
16872eb4d010SOphir Munk 		goto error;
16882eb4d010SOphir Munk 	}
16892eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
16902eb4d010SOphir Munk 		priv->mtu);
16912eb4d010SOphir Munk 	/* Initialize burst functions to prevent crashes before link-up. */
16922eb4d010SOphir Munk 	eth_dev->rx_pkt_burst = removed_rx_burst;
16932eb4d010SOphir Munk 	eth_dev->tx_pkt_burst = removed_tx_burst;
1694b012b4ceSOphir Munk 	eth_dev->dev_ops = &mlx5_dev_ops;
1695cbfc6111SFerruh Yigit 	eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1696cbfc6111SFerruh Yigit 	eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1697cbfc6111SFerruh Yigit 	eth_dev->rx_queue_count = mlx5_rx_queue_count;
16982eb4d010SOphir Munk 	/* Register MAC address. */
16992eb4d010SOphir Munk 	claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1700d462a83cSMichael Baum 	if (config->vf && config->vf_nl_en)
17012eb4d010SOphir Munk 		mlx5_nl_mac_addr_sync(priv->nl_socket_route,
17022eb4d010SOphir Munk 				      mlx5_ifindex(eth_dev),
17032eb4d010SOphir Munk 				      eth_dev->data->mac_addrs,
17042eb4d010SOphir Munk 				      MLX5_MAX_MAC_ADDRESSES);
17052eb4d010SOphir Munk 	priv->ctrl_flows = 0;
1706d163fc2dSXueming Li 	rte_spinlock_init(&priv->flow_list_lock);
17072eb4d010SOphir Munk 	TAILQ_INIT(&priv->flow_meters);
1708a295c69aSShun Hao 	priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1709a295c69aSShun Hao 	if (!priv->mtr_profile_tbl)
1710a295c69aSShun Hao 		goto error;
17112eb4d010SOphir Munk 	/* Hint libmlx5 to use PMD allocator for data plane resources */
171236dabceaSMichael Baum 	mlx5_glue->dv_set_context_attr(sh->ctx,
171336dabceaSMichael Baum 			MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
171436dabceaSMichael Baum 			(void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
17152eb4d010SOphir Munk 				.alloc = &mlx5_alloc_verbs_buf,
17162eb4d010SOphir Munk 				.free = &mlx5_free_verbs_buf,
171781c3b977SViacheslav Ovsiienko 				.data = sh,
171836dabceaSMichael Baum 			}));
17192eb4d010SOphir Munk 	/* Bring Ethernet device up. */
17202eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
17212eb4d010SOphir Munk 		eth_dev->data->port_id);
17222eb4d010SOphir Munk 	mlx5_set_link_up(eth_dev);
17232eb4d010SOphir Munk 	/*
17242eb4d010SOphir Munk 	 * Even though the interrupt handler is not installed yet,
17252eb4d010SOphir Munk 	 * interrupts will still trigger on the async_fd from
17262eb4d010SOphir Munk 	 * Verbs context returned by ibv_open_device().
17272eb4d010SOphir Munk 	 */
17282eb4d010SOphir Munk 	mlx5_link_update(eth_dev, 0);
17292eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
1730d462a83cSMichael Baum 	if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
17312eb4d010SOphir Munk 	      (switch_info->representor || switch_info->master)))
1732d462a83cSMichael Baum 		config->dv_esw_en = 0;
17332eb4d010SOphir Munk #else
1734d462a83cSMichael Baum 	config->dv_esw_en = 0;
17352eb4d010SOphir Munk #endif
17362eb4d010SOphir Munk 	/* Detect minimal data bytes to inline. */
1737d462a83cSMichael Baum 	mlx5_set_min_inline(spawn, config);
17382eb4d010SOphir Munk 	/* Store device configuration on private structure. */
1739d462a83cSMichael Baum 	priv->config = *config;
1740b4edeaf3SSuanming Mou 	for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1741b4edeaf3SSuanming Mou 		icfg[i].release_mem_en = !!config->reclaim_mode;
1742b4edeaf3SSuanming Mou 		if (config->reclaim_mode)
1743b4edeaf3SSuanming Mou 			icfg[i].per_core_cache = 0;
1744b4edeaf3SSuanming Mou 		priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1745b4edeaf3SSuanming Mou 		if (!priv->flows[i])
1746b4edeaf3SSuanming Mou 			goto error;
1747b4edeaf3SSuanming Mou 	}
17482eb4d010SOphir Munk 	/* Create context for virtual machine VLAN workaround. */
17492eb4d010SOphir Munk 	priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1750d462a83cSMichael Baum 	if (config->dv_flow_en) {
17512eb4d010SOphir Munk 		err = mlx5_alloc_shared_dr(priv);
17522eb4d010SOphir Munk 		if (err)
17532eb4d010SOphir Munk 			goto error;
17542eb4d010SOphir Munk 	}
17557aa9892fSMichael Baum 	if (config->devx && config->dv_flow_en && config->dest_tir) {
17565eaf882eSMichael Baum 		priv->obj_ops = devx_obj_ops;
17570c762e81SMichael Baum 		priv->obj_ops.drop_action_create =
17580c762e81SMichael Baum 						ibv_obj_ops.drop_action_create;
17590c762e81SMichael Baum 		priv->obj_ops.drop_action_destroy =
17600c762e81SMichael Baum 						ibv_obj_ops.drop_action_destroy;
17615d9f3c3fSMichael Baum #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
17625d9f3c3fSMichael Baum 		priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
17635d9f3c3fSMichael Baum #else
17643ec73abeSMatan Azrad 		if (config->dv_esw_en)
17655d9f3c3fSMichael Baum 			priv->obj_ops.txq_obj_modify =
17665d9f3c3fSMichael Baum 						ibv_obj_ops.txq_obj_modify;
17675d9f3c3fSMichael Baum #endif
17683ec73abeSMatan Azrad 		/* Use specific wrappers for Tx object. */
17693ec73abeSMatan Azrad 		priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
17703ec73abeSMatan Azrad 		priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1771e6988afdSMatan Azrad 		mlx5_queue_counter_id_prepare(eth_dev);
177223233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_create =
177323233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_create;
177423233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_release =
177523233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_release;
17765eaf882eSMichael Baum 	} else {
17775eaf882eSMichael Baum 		priv->obj_ops = ibv_obj_ops;
17785eaf882eSMichael Baum 	}
177965b3cd0dSSuanming Mou 	priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
178065b3cd0dSSuanming Mou 	if (!priv->drop_queue.hrxq)
178165b3cd0dSSuanming Mou 		goto error;
17822eb4d010SOphir Munk 	/* Supported Verbs flow priority number detection. */
17832eb4d010SOphir Munk 	err = mlx5_flow_discover_priorities(eth_dev);
17842eb4d010SOphir Munk 	if (err < 0) {
17852eb4d010SOphir Munk 		err = -err;
17862eb4d010SOphir Munk 		goto error;
17872eb4d010SOphir Munk 	}
17882eb4d010SOphir Munk 	priv->config.flow_prio = err;
17892eb4d010SOphir Munk 	if (!priv->config.dv_esw_en &&
17902eb4d010SOphir Munk 	    priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
17912eb4d010SOphir Munk 		DRV_LOG(WARNING, "metadata mode %u is not supported "
17922eb4d010SOphir Munk 				 "(no E-Switch)", priv->config.dv_xmeta_en);
17932eb4d010SOphir Munk 		priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
17942eb4d010SOphir Munk 	}
17952eb4d010SOphir Munk 	mlx5_set_metadata_mask(eth_dev);
17962eb4d010SOphir Munk 	if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
17972eb4d010SOphir Munk 	    !priv->sh->dv_regc0_mask) {
17982eb4d010SOphir Munk 		DRV_LOG(ERR, "metadata mode %u is not supported "
17992eb4d010SOphir Munk 			     "(no metadata reg_c[0] is available)",
18002eb4d010SOphir Munk 			     priv->config.dv_xmeta_en);
18012eb4d010SOphir Munk 			err = ENOTSUP;
18022eb4d010SOphir Munk 			goto error;
18032eb4d010SOphir Munk 	}
1804d03b7860SSuanming Mou 	priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1805d03b7860SSuanming Mou 				       mlx5_hrxq_create_cb,
1806e1592b6cSSuanming Mou 				       mlx5_hrxq_match_cb,
1807491b7137SMatan Azrad 				       mlx5_hrxq_remove_cb,
1808491b7137SMatan Azrad 				       mlx5_hrxq_clone_cb,
1809491b7137SMatan Azrad 				       mlx5_hrxq_clone_free_cb);
1810679f46c7SMatan Azrad 	if (!priv->hrxqs)
1811679f46c7SMatan Azrad 		goto error;
1812491b7137SMatan Azrad 	rte_rwlock_init(&priv->ind_tbls_lock);
18132eb4d010SOphir Munk 	/* Query availability of metadata reg_c's. */
18142eb4d010SOphir Munk 	err = mlx5_flow_discover_mreg_c(eth_dev);
18152eb4d010SOphir Munk 	if (err < 0) {
18162eb4d010SOphir Munk 		err = -err;
18172eb4d010SOphir Munk 		goto error;
18182eb4d010SOphir Munk 	}
18192eb4d010SOphir Munk 	if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
18202eb4d010SOphir Munk 		DRV_LOG(DEBUG,
18212eb4d010SOphir Munk 			"port %u extensive metadata register is not supported",
18222eb4d010SOphir Munk 			eth_dev->data->port_id);
18232eb4d010SOphir Munk 		if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
18242eb4d010SOphir Munk 			DRV_LOG(ERR, "metadata mode %u is not supported "
18252eb4d010SOphir Munk 				     "(no metadata registers available)",
18262eb4d010SOphir Munk 				     priv->config.dv_xmeta_en);
18272eb4d010SOphir Munk 			err = ENOTSUP;
18282eb4d010SOphir Munk 			goto error;
18292eb4d010SOphir Munk 		}
18302eb4d010SOphir Munk 	}
18312eb4d010SOphir Munk 	if (priv->config.dv_flow_en &&
18322eb4d010SOphir Munk 	    priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
18332eb4d010SOphir Munk 	    mlx5_flow_ext_mreg_supported(eth_dev) &&
18342eb4d010SOphir Munk 	    priv->sh->dv_regc0_mask) {
18352eb4d010SOphir Munk 		priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1836e69a5922SXueming Li 						      MLX5_FLOW_MREG_HTABLE_SZ,
1837961b6774SMatan Azrad 						      false, true, eth_dev,
1838f7f73ac1SXueming Li 						      flow_dv_mreg_create_cb,
1839f5b0aed2SSuanming Mou 						      flow_dv_mreg_match_cb,
1840961b6774SMatan Azrad 						      flow_dv_mreg_remove_cb,
1841961b6774SMatan Azrad 						      flow_dv_mreg_clone_cb,
1842961b6774SMatan Azrad 						    flow_dv_mreg_clone_free_cb);
18432eb4d010SOphir Munk 		if (!priv->mreg_cp_tbl) {
18442eb4d010SOphir Munk 			err = ENOMEM;
18452eb4d010SOphir Munk 			goto error;
18462eb4d010SOphir Munk 		}
18472eb4d010SOphir Munk 	}
1848cc608e4dSSuanming Mou 	rte_spinlock_init(&priv->shared_act_sl);
1849994829e6SSuanming Mou 	mlx5_flow_counter_mode_config(eth_dev);
18509fbe97f0SXueming Li 	if (priv->config.dv_flow_en)
18519fbe97f0SXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
18522eb4d010SOphir Munk 	return eth_dev;
18532eb4d010SOphir Munk error:
18542eb4d010SOphir Munk 	if (priv) {
18552eb4d010SOphir Munk 		if (priv->mreg_cp_tbl)
1856e69a5922SXueming Li 			mlx5_hlist_destroy(priv->mreg_cp_tbl);
18572eb4d010SOphir Munk 		if (priv->sh)
18582eb4d010SOphir Munk 			mlx5_os_free_shared_dr(priv);
18592eb4d010SOphir Munk 		if (priv->nl_socket_route >= 0)
18602eb4d010SOphir Munk 			close(priv->nl_socket_route);
18612eb4d010SOphir Munk 		if (priv->nl_socket_rdma >= 0)
18622eb4d010SOphir Munk 			close(priv->nl_socket_rdma);
18632eb4d010SOphir Munk 		if (priv->vmwa_context)
18642eb4d010SOphir Munk 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
186565b3cd0dSSuanming Mou 		if (eth_dev && priv->drop_queue.hrxq)
186665b3cd0dSSuanming Mou 			mlx5_drop_action_destroy(eth_dev);
1867a295c69aSShun Hao 		if (priv->mtr_profile_tbl)
1868a295c69aSShun Hao 			mlx5_l3t_destroy(priv->mtr_profile_tbl);
18692eb4d010SOphir Munk 		if (own_domain_id)
18702eb4d010SOphir Munk 			claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1871679f46c7SMatan Azrad 		if (priv->hrxqs)
1872679f46c7SMatan Azrad 			mlx5_list_destroy(priv->hrxqs);
18732175c4dcSSuanming Mou 		mlx5_free(priv);
18742eb4d010SOphir Munk 		if (eth_dev != NULL)
18752eb4d010SOphir Munk 			eth_dev->data->dev_private = NULL;
18762eb4d010SOphir Munk 	}
18772eb4d010SOphir Munk 	if (eth_dev != NULL) {
18782eb4d010SOphir Munk 		/* mac_addrs must not be freed alone because part of
18792eb4d010SOphir Munk 		 * dev_private
18802eb4d010SOphir Munk 		 **/
18812eb4d010SOphir Munk 		eth_dev->data->mac_addrs = NULL;
18822eb4d010SOphir Munk 		rte_eth_dev_release_port(eth_dev);
18832eb4d010SOphir Munk 	}
18842eb4d010SOphir Munk 	if (sh)
188591389890SOphir Munk 		mlx5_free_shared_dev_ctx(sh);
18862eb4d010SOphir Munk 	MLX5_ASSERT(err > 0);
18872eb4d010SOphir Munk 	rte_errno = err;
18882eb4d010SOphir Munk 	return NULL;
18892eb4d010SOphir Munk }
18902eb4d010SOphir Munk 
18912eb4d010SOphir Munk /**
18922eb4d010SOphir Munk  * Comparison callback to sort device data.
18932eb4d010SOphir Munk  *
18942eb4d010SOphir Munk  * This is meant to be used with qsort().
18952eb4d010SOphir Munk  *
18962eb4d010SOphir Munk  * @param a[in]
18972eb4d010SOphir Munk  *   Pointer to pointer to first data object.
18982eb4d010SOphir Munk  * @param b[in]
18992eb4d010SOphir Munk  *   Pointer to pointer to second data object.
19002eb4d010SOphir Munk  *
19012eb4d010SOphir Munk  * @return
19022eb4d010SOphir Munk  *   0 if both objects are equal, less than 0 if the first argument is less
19032eb4d010SOphir Munk  *   than the second, greater than 0 otherwise.
19042eb4d010SOphir Munk  */
19052eb4d010SOphir Munk static int
19062eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b)
19072eb4d010SOphir Munk {
19082eb4d010SOphir Munk 	const struct mlx5_switch_info *si_a =
19092eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)a)->info;
19102eb4d010SOphir Munk 	const struct mlx5_switch_info *si_b =
19112eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)b)->info;
19122eb4d010SOphir Munk 	int ret;
19132eb4d010SOphir Munk 
19142eb4d010SOphir Munk 	/* Master device first. */
19152eb4d010SOphir Munk 	ret = si_b->master - si_a->master;
19162eb4d010SOphir Munk 	if (ret)
19172eb4d010SOphir Munk 		return ret;
19182eb4d010SOphir Munk 	/* Then representor devices. */
19192eb4d010SOphir Munk 	ret = si_b->representor - si_a->representor;
19202eb4d010SOphir Munk 	if (ret)
19212eb4d010SOphir Munk 		return ret;
19222eb4d010SOphir Munk 	/* Unidentified devices come last in no specific order. */
19232eb4d010SOphir Munk 	if (!si_a->representor)
19242eb4d010SOphir Munk 		return 0;
19252eb4d010SOphir Munk 	/* Order representors by name. */
19262eb4d010SOphir Munk 	return si_a->port_name - si_b->port_name;
19272eb4d010SOphir Munk }
19282eb4d010SOphir Munk 
19292eb4d010SOphir Munk /**
19302eb4d010SOphir Munk  * Match PCI information for possible slaves of bonding device.
19312eb4d010SOphir Munk  *
19322eb4d010SOphir Munk  * @param[in] ibv_dev
19332eb4d010SOphir Munk  *   Pointer to Infiniband device structure.
19342eb4d010SOphir Munk  * @param[in] pci_dev
1935f926cce3SXueming Li  *   Pointer to primary PCI address structure to match.
19362eb4d010SOphir Munk  * @param[in] nl_rdma
19372eb4d010SOphir Munk  *   Netlink RDMA group socket handle.
1938f926cce3SXueming Li  * @param[in] owner
1939f926cce3SXueming Li  *   Rerepsentor owner PF index.
1940f5f4c482SXueming Li  * @param[out] bond_info
1941f5f4c482SXueming Li  *   Pointer to bonding information.
19422eb4d010SOphir Munk  *
19432eb4d010SOphir Munk  * @return
19442eb4d010SOphir Munk  *   negative value if no bonding device found, otherwise
19452eb4d010SOphir Munk  *   positive index of slave PF in bonding.
19462eb4d010SOphir Munk  */
19472eb4d010SOphir Munk static int
19482eb4d010SOphir Munk mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1949f926cce3SXueming Li 			   const struct rte_pci_addr *pci_dev,
1950f5f4c482SXueming Li 			   int nl_rdma, uint16_t owner,
1951f5f4c482SXueming Li 			   struct mlx5_bond_info *bond_info)
19522eb4d010SOphir Munk {
19532eb4d010SOphir Munk 	char ifname[IF_NAMESIZE + 1];
19542eb4d010SOphir Munk 	unsigned int ifindex;
19552eb4d010SOphir Munk 	unsigned int np, i;
1956f5f4c482SXueming Li 	FILE *bond_file = NULL, *file;
19572eb4d010SOphir Munk 	int pf = -1;
1958f5f4c482SXueming Li 	int ret;
19592eb4d010SOphir Munk 
19602eb4d010SOphir Munk 	/*
19612eb4d010SOphir Munk 	 * Try to get master device name. If something goes
19622eb4d010SOphir Munk 	 * wrong suppose the lack of kernel support and no
19632eb4d010SOphir Munk 	 * bonding devices.
19642eb4d010SOphir Munk 	 */
1965f5f4c482SXueming Li 	memset(bond_info, 0, sizeof(*bond_info));
19662eb4d010SOphir Munk 	if (nl_rdma < 0)
19672eb4d010SOphir Munk 		return -1;
19682eb4d010SOphir Munk 	if (!strstr(ibv_dev->name, "bond"))
19692eb4d010SOphir Munk 		return -1;
19702eb4d010SOphir Munk 	np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
19712eb4d010SOphir Munk 	if (!np)
19722eb4d010SOphir Munk 		return -1;
19732eb4d010SOphir Munk 	/*
19742eb4d010SOphir Munk 	 * The Master device might not be on the predefined
19752eb4d010SOphir Munk 	 * port (not on port index 1, it is not garanted),
19762eb4d010SOphir Munk 	 * we have to scan all Infiniband device port and
19772eb4d010SOphir Munk 	 * find master.
19782eb4d010SOphir Munk 	 */
19792eb4d010SOphir Munk 	for (i = 1; i <= np; ++i) {
19802eb4d010SOphir Munk 		/* Check whether Infiniband port is populated. */
19812eb4d010SOphir Munk 		ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
19822eb4d010SOphir Munk 		if (!ifindex)
19832eb4d010SOphir Munk 			continue;
19842eb4d010SOphir Munk 		if (!if_indextoname(ifindex, ifname))
19852eb4d010SOphir Munk 			continue;
19862eb4d010SOphir Munk 		/* Try to read bonding slave names from sysfs. */
19872eb4d010SOphir Munk 		MKSTR(slaves,
19882eb4d010SOphir Munk 		      "/sys/class/net/%s/master/bonding/slaves", ifname);
1989f5f4c482SXueming Li 		bond_file = fopen(slaves, "r");
1990f5f4c482SXueming Li 		if (bond_file)
19912eb4d010SOphir Munk 			break;
19922eb4d010SOphir Munk 	}
1993f5f4c482SXueming Li 	if (!bond_file)
19942eb4d010SOphir Munk 		return -1;
19952eb4d010SOphir Munk 	/* Use safe format to check maximal buffer length. */
19962eb4d010SOphir Munk 	MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1997f5f4c482SXueming Li 	while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
19982eb4d010SOphir Munk 		char tmp_str[IF_NAMESIZE + 32];
19992eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
20002eb4d010SOphir Munk 		struct mlx5_switch_info	info;
20012eb4d010SOphir Munk 
20022eb4d010SOphir Munk 		/* Process slave interface names in the loop. */
20032eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
20042eb4d010SOphir Munk 			 "/sys/class/net/%s", ifname);
20054d567938SThomas Monjalon 		if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
20062eb4d010SOphir Munk 			DRV_LOG(WARNING, "can not get PCI address"
20072eb4d010SOphir Munk 					 " for netdev \"%s\"", ifname);
20082eb4d010SOphir Munk 			continue;
20092eb4d010SOphir Munk 		}
20102eb4d010SOphir Munk 		/* Slave interface PCI address match found. */
20112eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
20122eb4d010SOphir Munk 			 "/sys/class/net/%s/phys_port_name", ifname);
20132eb4d010SOphir Munk 		file = fopen(tmp_str, "rb");
20142eb4d010SOphir Munk 		if (!file)
20152eb4d010SOphir Munk 			break;
20162eb4d010SOphir Munk 		info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
20172eb4d010SOphir Munk 		if (fscanf(file, "%32s", tmp_str) == 1)
20182eb4d010SOphir Munk 			mlx5_translate_port_name(tmp_str, &info);
2019f5f4c482SXueming Li 		fclose(file);
2020f5f4c482SXueming Li 		/* Only process PF ports. */
2021f5f4c482SXueming Li 		if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2022f5f4c482SXueming Li 		    info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2023f5f4c482SXueming Li 			continue;
2024f5f4c482SXueming Li 		/* Check max bonding member. */
2025f5f4c482SXueming Li 		if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2026f5f4c482SXueming Li 			DRV_LOG(WARNING, "bonding index out of range, "
2027f5f4c482SXueming Li 				"please increase MLX5_BOND_MAX_PORTS: %s",
2028f5f4c482SXueming Li 				tmp_str);
20292eb4d010SOphir Munk 			break;
20302eb4d010SOphir Munk 		}
2031d31a8971SXueming Li 		/* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2032f5f4c482SXueming Li 		if (pci_dev->domain == pci_addr.domain &&
2033f5f4c482SXueming Li 		    pci_dev->bus == pci_addr.bus &&
2034f5f4c482SXueming Li 		    pci_dev->devid == pci_addr.devid &&
2035d31a8971SXueming Li 		    ((pci_dev->function == 0 &&
2036d31a8971SXueming Li 		      pci_dev->function + owner == pci_addr.function) ||
2037d31a8971SXueming Li 		     (pci_dev->function == owner &&
2038d31a8971SXueming Li 		      pci_addr.function == owner)))
2039f5f4c482SXueming Li 			pf = info.port_name;
2040f5f4c482SXueming Li 		/* Get ifindex. */
2041f5f4c482SXueming Li 		snprintf(tmp_str, sizeof(tmp_str),
2042f5f4c482SXueming Li 			 "/sys/class/net/%s/ifindex", ifname);
2043f5f4c482SXueming Li 		file = fopen(tmp_str, "rb");
2044f5f4c482SXueming Li 		if (!file)
2045f5f4c482SXueming Li 			break;
2046f5f4c482SXueming Li 		ret = fscanf(file, "%u", &ifindex);
20472eb4d010SOphir Munk 		fclose(file);
2048f5f4c482SXueming Li 		if (ret != 1)
2049f5f4c482SXueming Li 			break;
2050f5f4c482SXueming Li 		/* Save bonding info. */
2051f5f4c482SXueming Li 		strncpy(bond_info->ports[info.port_name].ifname, ifname,
2052f5f4c482SXueming Li 			sizeof(bond_info->ports[0].ifname));
2053f5f4c482SXueming Li 		bond_info->ports[info.port_name].pci_addr = pci_addr;
2054f5f4c482SXueming Li 		bond_info->ports[info.port_name].ifindex = ifindex;
2055f5f4c482SXueming Li 		bond_info->n_port++;
2056f5f4c482SXueming Li 	}
2057f5f4c482SXueming Li 	if (pf >= 0) {
2058f5f4c482SXueming Li 		/* Get bond interface info */
2059f5f4c482SXueming Li 		ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2060f5f4c482SXueming Li 					   bond_info->ifname);
2061f5f4c482SXueming Li 		if (ret)
2062f5f4c482SXueming Li 			DRV_LOG(ERR, "unable to get bond info: %s",
2063f5f4c482SXueming Li 				strerror(rte_errno));
2064f5f4c482SXueming Li 		else
2065f5f4c482SXueming Li 			DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2066f5f4c482SXueming Li 				ifindex, bond_info->ifindex, bond_info->ifname);
2067f5f4c482SXueming Li 	}
20682eb4d010SOphir Munk 	return pf;
20692eb4d010SOphir Munk }
20702eb4d010SOphir Munk 
2071919488fbSXueming Li static void
2072919488fbSXueming Li mlx5_os_config_default(struct mlx5_dev_config *config)
2073919488fbSXueming Li {
2074919488fbSXueming Li 	memset(config, 0, sizeof(*config));
2075919488fbSXueming Li 	config->mps = MLX5_ARG_UNSET;
2076919488fbSXueming Li 	config->dbnc = MLX5_ARG_UNSET;
2077919488fbSXueming Li 	config->rx_vec_en = 1;
2078919488fbSXueming Li 	config->txq_inline_max = MLX5_ARG_UNSET;
2079919488fbSXueming Li 	config->txq_inline_min = MLX5_ARG_UNSET;
2080919488fbSXueming Li 	config->txq_inline_mpw = MLX5_ARG_UNSET;
2081919488fbSXueming Li 	config->txqs_inline = MLX5_ARG_UNSET;
2082919488fbSXueming Li 	config->vf_nl_en = 1;
2083919488fbSXueming Li 	config->mr_ext_memseg_en = 1;
2084919488fbSXueming Li 	config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2085919488fbSXueming Li 	config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2086919488fbSXueming Li 	config->dv_esw_en = 1;
2087919488fbSXueming Li 	config->dv_flow_en = 1;
2088919488fbSXueming Li 	config->decap_en = 1;
2089919488fbSXueming Li 	config->log_hp_size = MLX5_ARG_UNSET;
2090919488fbSXueming Li }
2091919488fbSXueming Li 
20922eb4d010SOphir Munk /**
209308c2772fSXueming Li  * Register a PCI device within bonding.
20942eb4d010SOphir Munk  *
209508c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device and
209608c2772fSXueming Li  * bonding owner PF index.
20972eb4d010SOphir Munk  *
20982eb4d010SOphir Munk  * @param[in] pci_dev
20992eb4d010SOphir Munk  *   PCI device information.
210008c2772fSXueming Li  * @param[in] req_eth_da
210108c2772fSXueming Li  *   Requested ethdev device argument.
210208c2772fSXueming Li  * @param[in] owner_id
210308c2772fSXueming Li  *   Requested owner PF port ID within bonding device, default to 0.
21042eb4d010SOphir Munk  *
21052eb4d010SOphir Munk  * @return
21062eb4d010SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
21072eb4d010SOphir Munk  */
210808c2772fSXueming Li static int
210908c2772fSXueming Li mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
211008c2772fSXueming Li 		     struct rte_eth_devargs *req_eth_da,
211108c2772fSXueming Li 		     uint16_t owner_id)
21122eb4d010SOphir Munk {
21132eb4d010SOphir Munk 	struct ibv_device **ibv_list;
21142eb4d010SOphir Munk 	/*
21152eb4d010SOphir Munk 	 * Number of found IB Devices matching with requested PCI BDF.
21162eb4d010SOphir Munk 	 * nd != 1 means there are multiple IB devices over the same
21172eb4d010SOphir Munk 	 * PCI device and we have representors and master.
21182eb4d010SOphir Munk 	 */
21192eb4d010SOphir Munk 	unsigned int nd = 0;
21202eb4d010SOphir Munk 	/*
21212eb4d010SOphir Munk 	 * Number of found IB device Ports. nd = 1 and np = 1..n means
21222eb4d010SOphir Munk 	 * we have the single multiport IB device, and there may be
21232eb4d010SOphir Munk 	 * representors attached to some of found ports.
21242eb4d010SOphir Munk 	 */
21252eb4d010SOphir Munk 	unsigned int np = 0;
21262eb4d010SOphir Munk 	/*
21272eb4d010SOphir Munk 	 * Number of DPDK ethernet devices to Spawn - either over
21282eb4d010SOphir Munk 	 * multiple IB devices or multiple ports of single IB device.
21292eb4d010SOphir Munk 	 * Actually this is the number of iterations to spawn.
21302eb4d010SOphir Munk 	 */
21312eb4d010SOphir Munk 	unsigned int ns = 0;
21322eb4d010SOphir Munk 	/*
21332eb4d010SOphir Munk 	 * Bonding device
21342eb4d010SOphir Munk 	 *   < 0 - no bonding device (single one)
21352eb4d010SOphir Munk 	 *  >= 0 - bonding device (value is slave PF index)
21362eb4d010SOphir Munk 	 */
21372eb4d010SOphir Munk 	int bd = -1;
21382eb4d010SOphir Munk 	struct mlx5_dev_spawn_data *list = NULL;
21392eb4d010SOphir Munk 	struct mlx5_dev_config dev_config;
2140d462a83cSMichael Baum 	unsigned int dev_config_vf;
214108c2772fSXueming Li 	struct rte_eth_devargs eth_da = *req_eth_da;
2142f926cce3SXueming Li 	struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2143f5f4c482SXueming Li 	struct mlx5_bond_info bond_info;
2144f926cce3SXueming Li 	int ret = -1;
21452eb4d010SOphir Munk 
21462eb4d010SOphir Munk 	errno = 0;
21472eb4d010SOphir Munk 	ibv_list = mlx5_glue->get_device_list(&ret);
21482eb4d010SOphir Munk 	if (!ibv_list) {
21492eb4d010SOphir Munk 		rte_errno = errno ? errno : ENOSYS;
21502eb4d010SOphir Munk 		DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
21512eb4d010SOphir Munk 		return -rte_errno;
21522eb4d010SOphir Munk 	}
21532eb4d010SOphir Munk 	/*
21542eb4d010SOphir Munk 	 * First scan the list of all Infiniband devices to find
21552eb4d010SOphir Munk 	 * matching ones, gathering into the list.
21562eb4d010SOphir Munk 	 */
21572eb4d010SOphir Munk 	struct ibv_device *ibv_match[ret + 1];
21582eb4d010SOphir Munk 	int nl_route = mlx5_nl_init(NETLINK_ROUTE);
21592eb4d010SOphir Munk 	int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
21602eb4d010SOphir Munk 	unsigned int i;
21612eb4d010SOphir Munk 
21622eb4d010SOphir Munk 	while (ret-- > 0) {
21632eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
21642eb4d010SOphir Munk 
21652eb4d010SOphir Munk 		DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
21662eb4d010SOphir Munk 		bd = mlx5_device_bond_pci_match
2167f5f4c482SXueming Li 				(ibv_list[ret], &owner_pci, nl_rdma, owner_id,
2168f5f4c482SXueming Li 				 &bond_info);
21692eb4d010SOphir Munk 		if (bd >= 0) {
21702eb4d010SOphir Munk 			/*
21712eb4d010SOphir Munk 			 * Bonding device detected. Only one match is allowed,
21722eb4d010SOphir Munk 			 * the bonding is supported over multi-port IB device,
21732eb4d010SOphir Munk 			 * there should be no matches on representor PCI
21742eb4d010SOphir Munk 			 * functions or non VF LAG bonding devices with
21752eb4d010SOphir Munk 			 * specified address.
21762eb4d010SOphir Munk 			 */
21772eb4d010SOphir Munk 			if (nd) {
21782eb4d010SOphir Munk 				DRV_LOG(ERR,
21792eb4d010SOphir Munk 					"multiple PCI match on bonding device"
21802eb4d010SOphir Munk 					"\"%s\" found", ibv_list[ret]->name);
21812eb4d010SOphir Munk 				rte_errno = ENOENT;
21822eb4d010SOphir Munk 				ret = -rte_errno;
21832eb4d010SOphir Munk 				goto exit;
21842eb4d010SOphir Munk 			}
2185f926cce3SXueming Li 			/* Amend owner pci address if owner PF ID specified. */
2186f926cce3SXueming Li 			if (eth_da.nb_representor_ports)
218708c2772fSXueming Li 				owner_pci.function += owner_id;
21882eb4d010SOphir Munk 			DRV_LOG(INFO, "PCI information matches for"
21892eb4d010SOphir Munk 				      " slave %d bonding device \"%s\"",
21902eb4d010SOphir Munk 				      bd, ibv_list[ret]->name);
21912eb4d010SOphir Munk 			ibv_match[nd++] = ibv_list[ret];
21922eb4d010SOphir Munk 			break;
2193f926cce3SXueming Li 		} else {
2194f926cce3SXueming Li 			/* Bonding device not found. */
21954d567938SThomas Monjalon 			if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
21964d567938SThomas Monjalon 					      &pci_addr))
21972eb4d010SOphir Munk 				continue;
2198f926cce3SXueming Li 			if (owner_pci.domain != pci_addr.domain ||
2199f926cce3SXueming Li 			    owner_pci.bus != pci_addr.bus ||
2200f926cce3SXueming Li 			    owner_pci.devid != pci_addr.devid ||
2201f926cce3SXueming Li 			    owner_pci.function != pci_addr.function)
22022eb4d010SOphir Munk 				continue;
22032eb4d010SOphir Munk 			DRV_LOG(INFO, "PCI information matches for device \"%s\"",
22042eb4d010SOphir Munk 				ibv_list[ret]->name);
22052eb4d010SOphir Munk 			ibv_match[nd++] = ibv_list[ret];
22062eb4d010SOphir Munk 		}
2207f926cce3SXueming Li 	}
22082eb4d010SOphir Munk 	ibv_match[nd] = NULL;
22092eb4d010SOphir Munk 	if (!nd) {
22102eb4d010SOphir Munk 		/* No device matches, just complain and bail out. */
22112eb4d010SOphir Munk 		DRV_LOG(WARNING,
22122eb4d010SOphir Munk 			"no Verbs device matches PCI device " PCI_PRI_FMT ","
22132eb4d010SOphir Munk 			" are kernel drivers loaded?",
2214f926cce3SXueming Li 			owner_pci.domain, owner_pci.bus,
2215f926cce3SXueming Li 			owner_pci.devid, owner_pci.function);
22162eb4d010SOphir Munk 		rte_errno = ENOENT;
22172eb4d010SOphir Munk 		ret = -rte_errno;
22182eb4d010SOphir Munk 		goto exit;
22192eb4d010SOphir Munk 	}
22202eb4d010SOphir Munk 	if (nd == 1) {
22212eb4d010SOphir Munk 		/*
22222eb4d010SOphir Munk 		 * Found single matching device may have multiple ports.
22232eb4d010SOphir Munk 		 * Each port may be representor, we have to check the port
22242eb4d010SOphir Munk 		 * number and check the representors existence.
22252eb4d010SOphir Munk 		 */
22262eb4d010SOphir Munk 		if (nl_rdma >= 0)
22272eb4d010SOphir Munk 			np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
22282eb4d010SOphir Munk 		if (!np)
22292eb4d010SOphir Munk 			DRV_LOG(WARNING, "can not get IB device \"%s\""
22302eb4d010SOphir Munk 					 " ports number", ibv_match[0]->name);
22312eb4d010SOphir Munk 		if (bd >= 0 && !np) {
22322eb4d010SOphir Munk 			DRV_LOG(ERR, "can not get ports"
22332eb4d010SOphir Munk 				     " for bonding device");
22342eb4d010SOphir Munk 			rte_errno = ENOENT;
22352eb4d010SOphir Munk 			ret = -rte_errno;
22362eb4d010SOphir Munk 			goto exit;
22372eb4d010SOphir Munk 		}
22382eb4d010SOphir Munk 	}
22392eb4d010SOphir Munk #ifndef HAVE_MLX5DV_DR_DEVX_PORT
22402eb4d010SOphir Munk 	if (bd >= 0) {
22412eb4d010SOphir Munk 		/*
22422eb4d010SOphir Munk 		 * This may happen if there is VF LAG kernel support and
22432eb4d010SOphir Munk 		 * application is compiled with older rdma_core library.
22442eb4d010SOphir Munk 		 */
22452eb4d010SOphir Munk 		DRV_LOG(ERR,
22462eb4d010SOphir Munk 			"No kernel/verbs support for VF LAG bonding found.");
22472eb4d010SOphir Munk 		rte_errno = ENOTSUP;
22482eb4d010SOphir Munk 		ret = -rte_errno;
22492eb4d010SOphir Munk 		goto exit;
22502eb4d010SOphir Munk 	}
22512eb4d010SOphir Munk #endif
22522eb4d010SOphir Munk 	/*
22532eb4d010SOphir Munk 	 * Now we can determine the maximal
22542eb4d010SOphir Munk 	 * amount of devices to be spawned.
22552eb4d010SOphir Munk 	 */
22562175c4dcSSuanming Mou 	list = mlx5_malloc(MLX5_MEM_ZERO,
22572eb4d010SOphir Munk 			   sizeof(struct mlx5_dev_spawn_data) *
22582eb4d010SOphir Munk 			   (np ? np : nd),
22592175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
22602eb4d010SOphir Munk 	if (!list) {
22612eb4d010SOphir Munk 		DRV_LOG(ERR, "spawn data array allocation failure");
22622eb4d010SOphir Munk 		rte_errno = ENOMEM;
22632eb4d010SOphir Munk 		ret = -rte_errno;
22642eb4d010SOphir Munk 		goto exit;
22652eb4d010SOphir Munk 	}
22662eb4d010SOphir Munk 	if (bd >= 0 || np > 1) {
22672eb4d010SOphir Munk 		/*
22682eb4d010SOphir Munk 		 * Single IB device with multiple ports found,
22692eb4d010SOphir Munk 		 * it may be E-Switch master device and representors.
22702eb4d010SOphir Munk 		 * We have to perform identification through the ports.
22712eb4d010SOphir Munk 		 */
22722eb4d010SOphir Munk 		MLX5_ASSERT(nl_rdma >= 0);
22732eb4d010SOphir Munk 		MLX5_ASSERT(ns == 0);
22742eb4d010SOphir Munk 		MLX5_ASSERT(nd == 1);
22752eb4d010SOphir Munk 		MLX5_ASSERT(np);
22762eb4d010SOphir Munk 		for (i = 1; i <= np; ++i) {
2277f5f4c482SXueming Li 			list[ns].bond_info = &bond_info;
22782eb4d010SOphir Munk 			list[ns].max_port = np;
2279834a9019SOphir Munk 			list[ns].phys_port = i;
2280834a9019SOphir Munk 			list[ns].phys_dev = ibv_match[0];
22812eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
22822eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
22832eb4d010SOphir Munk 			list[ns].pf_bond = bd;
22842eb4d010SOphir Munk 			list[ns].ifindex = mlx5_nl_ifindex
2285834a9019SOphir Munk 				(nl_rdma,
2286834a9019SOphir Munk 				mlx5_os_get_dev_device_name
2287834a9019SOphir Munk 						(list[ns].phys_dev), i);
22882eb4d010SOphir Munk 			if (!list[ns].ifindex) {
22892eb4d010SOphir Munk 				/*
22902eb4d010SOphir Munk 				 * No network interface index found for the
22912eb4d010SOphir Munk 				 * specified port, it means there is no
22922eb4d010SOphir Munk 				 * representor on this port. It's OK,
22932eb4d010SOphir Munk 				 * there can be disabled ports, for example
22942eb4d010SOphir Munk 				 * if sriov_numvfs < sriov_totalvfs.
22952eb4d010SOphir Munk 				 */
22962eb4d010SOphir Munk 				continue;
22972eb4d010SOphir Munk 			}
22982eb4d010SOphir Munk 			ret = -1;
22992eb4d010SOphir Munk 			if (nl_route >= 0)
23002eb4d010SOphir Munk 				ret = mlx5_nl_switch_info
23012eb4d010SOphir Munk 					       (nl_route,
23022eb4d010SOphir Munk 						list[ns].ifindex,
23032eb4d010SOphir Munk 						&list[ns].info);
23042eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
23052eb4d010SOphir Munk 				    !list[ns].info.master)) {
23062eb4d010SOphir Munk 				/*
23072eb4d010SOphir Munk 				 * We failed to recognize representors with
23082eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
23092eb4d010SOphir Munk 				 * with sysfs.
23102eb4d010SOphir Munk 				 */
23112eb4d010SOphir Munk 				ret =  mlx5_sysfs_switch_info
23122eb4d010SOphir Munk 						(list[ns].ifindex,
23132eb4d010SOphir Munk 						 &list[ns].info);
23142eb4d010SOphir Munk 			}
23152a87415cSMichael Baum #ifdef HAVE_MLX5DV_DR_DEVX_PORT
23162eb4d010SOphir Munk 			if (!ret && bd >= 0) {
23172eb4d010SOphir Munk 				switch (list[ns].info.name_type) {
23182eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
23192eb4d010SOphir Munk 					if (list[ns].info.port_name == bd)
23202eb4d010SOphir Munk 						ns++;
23212eb4d010SOphir Munk 					break;
2322420bbdaeSViacheslav Ovsiienko 				case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2323420bbdaeSViacheslav Ovsiienko 					/* Fallthrough */
23242eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2325cb95feefSXueming Li 					/* Fallthrough */
2326cb95feefSXueming Li 				case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
23272eb4d010SOphir Munk 					if (list[ns].info.pf_num == bd)
23282eb4d010SOphir Munk 						ns++;
23292eb4d010SOphir Munk 					break;
23302eb4d010SOphir Munk 				default:
23312eb4d010SOphir Munk 					break;
23322eb4d010SOphir Munk 				}
23332eb4d010SOphir Munk 				continue;
23342eb4d010SOphir Munk 			}
23352a87415cSMichael Baum #endif
23362eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
23372eb4d010SOphir Munk 				     list[ns].info.master))
23382eb4d010SOphir Munk 				ns++;
23392eb4d010SOphir Munk 		}
23402eb4d010SOphir Munk 		if (!ns) {
23412eb4d010SOphir Munk 			DRV_LOG(ERR,
23422eb4d010SOphir Munk 				"unable to recognize master/representors"
23432eb4d010SOphir Munk 				" on the IB device with multiple ports");
23442eb4d010SOphir Munk 			rte_errno = ENOENT;
23452eb4d010SOphir Munk 			ret = -rte_errno;
23462eb4d010SOphir Munk 			goto exit;
23472eb4d010SOphir Munk 		}
23482eb4d010SOphir Munk 	} else {
23492eb4d010SOphir Munk 		/*
23502eb4d010SOphir Munk 		 * The existence of several matching entries (nd > 1) means
23512eb4d010SOphir Munk 		 * port representors have been instantiated. No existing Verbs
23522eb4d010SOphir Munk 		 * call nor sysfs entries can tell them apart, this can only
23532eb4d010SOphir Munk 		 * be done through Netlink calls assuming kernel drivers are
23542eb4d010SOphir Munk 		 * recent enough to support them.
23552eb4d010SOphir Munk 		 *
23562eb4d010SOphir Munk 		 * In the event of identification failure through Netlink,
23572eb4d010SOphir Munk 		 * try again through sysfs, then:
23582eb4d010SOphir Munk 		 *
23592eb4d010SOphir Munk 		 * 1. A single IB device matches (nd == 1) with single
23602eb4d010SOphir Munk 		 *    port (np=0/1) and is not a representor, assume
23612eb4d010SOphir Munk 		 *    no switch support.
23622eb4d010SOphir Munk 		 *
23632eb4d010SOphir Munk 		 * 2. Otherwise no safe assumptions can be made;
23642eb4d010SOphir Munk 		 *    complain louder and bail out.
23652eb4d010SOphir Munk 		 */
23662eb4d010SOphir Munk 		for (i = 0; i != nd; ++i) {
23672eb4d010SOphir Munk 			memset(&list[ns].info, 0, sizeof(list[ns].info));
2368f5f4c482SXueming Li 			list[ns].bond_info = NULL;
23692eb4d010SOphir Munk 			list[ns].max_port = 1;
2370834a9019SOphir Munk 			list[ns].phys_port = 1;
2371834a9019SOphir Munk 			list[ns].phys_dev = ibv_match[i];
23722eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
23732eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
23742eb4d010SOphir Munk 			list[ns].pf_bond = -1;
23752eb4d010SOphir Munk 			list[ns].ifindex = 0;
23762eb4d010SOphir Munk 			if (nl_rdma >= 0)
23772eb4d010SOphir Munk 				list[ns].ifindex = mlx5_nl_ifindex
2378834a9019SOphir Munk 				(nl_rdma,
2379834a9019SOphir Munk 				mlx5_os_get_dev_device_name
2380834a9019SOphir Munk 						(list[ns].phys_dev), 1);
23812eb4d010SOphir Munk 			if (!list[ns].ifindex) {
23822eb4d010SOphir Munk 				char ifname[IF_NAMESIZE];
23832eb4d010SOphir Munk 
23842eb4d010SOphir Munk 				/*
23852eb4d010SOphir Munk 				 * Netlink failed, it may happen with old
23862eb4d010SOphir Munk 				 * ib_core kernel driver (before 4.16).
23872eb4d010SOphir Munk 				 * We can assume there is old driver because
23882eb4d010SOphir Munk 				 * here we are processing single ports IB
23892eb4d010SOphir Munk 				 * devices. Let's try sysfs to retrieve
23902eb4d010SOphir Munk 				 * the ifindex. The method works for
23912eb4d010SOphir Munk 				 * master device only.
23922eb4d010SOphir Munk 				 */
23932eb4d010SOphir Munk 				if (nd > 1) {
23942eb4d010SOphir Munk 					/*
23952eb4d010SOphir Munk 					 * Multiple devices found, assume
23962eb4d010SOphir Munk 					 * representors, can not distinguish
23972eb4d010SOphir Munk 					 * master/representor and retrieve
23982eb4d010SOphir Munk 					 * ifindex via sysfs.
23992eb4d010SOphir Munk 					 */
24002eb4d010SOphir Munk 					continue;
24012eb4d010SOphir Munk 				}
2402aec086c9SMatan Azrad 				ret = mlx5_get_ifname_sysfs
2403aec086c9SMatan Azrad 					(ibv_match[i]->ibdev_path, ifname);
24042eb4d010SOphir Munk 				if (!ret)
24052eb4d010SOphir Munk 					list[ns].ifindex =
24062eb4d010SOphir Munk 						if_nametoindex(ifname);
24072eb4d010SOphir Munk 				if (!list[ns].ifindex) {
24082eb4d010SOphir Munk 					/*
24092eb4d010SOphir Munk 					 * No network interface index found
24102eb4d010SOphir Munk 					 * for the specified device, it means
24112eb4d010SOphir Munk 					 * there it is neither representor
24122eb4d010SOphir Munk 					 * nor master.
24132eb4d010SOphir Munk 					 */
24142eb4d010SOphir Munk 					continue;
24152eb4d010SOphir Munk 				}
24162eb4d010SOphir Munk 			}
24172eb4d010SOphir Munk 			ret = -1;
24182eb4d010SOphir Munk 			if (nl_route >= 0)
24192eb4d010SOphir Munk 				ret = mlx5_nl_switch_info
24202eb4d010SOphir Munk 					       (nl_route,
24212eb4d010SOphir Munk 						list[ns].ifindex,
24222eb4d010SOphir Munk 						&list[ns].info);
24232eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
24242eb4d010SOphir Munk 				    !list[ns].info.master)) {
24252eb4d010SOphir Munk 				/*
24262eb4d010SOphir Munk 				 * We failed to recognize representors with
24272eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
24282eb4d010SOphir Munk 				 * with sysfs.
24292eb4d010SOphir Munk 				 */
24302eb4d010SOphir Munk 				ret =  mlx5_sysfs_switch_info
24312eb4d010SOphir Munk 						(list[ns].ifindex,
24322eb4d010SOphir Munk 						 &list[ns].info);
24332eb4d010SOphir Munk 			}
24342eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
24352eb4d010SOphir Munk 				     list[ns].info.master)) {
24362eb4d010SOphir Munk 				ns++;
24372eb4d010SOphir Munk 			} else if ((nd == 1) &&
24382eb4d010SOphir Munk 				   !list[ns].info.representor &&
24392eb4d010SOphir Munk 				   !list[ns].info.master) {
24402eb4d010SOphir Munk 				/*
24412eb4d010SOphir Munk 				 * Single IB device with
24422eb4d010SOphir Munk 				 * one physical port and
24432eb4d010SOphir Munk 				 * attached network device.
24442eb4d010SOphir Munk 				 * May be SRIOV is not enabled
24452eb4d010SOphir Munk 				 * or there is no representors.
24462eb4d010SOphir Munk 				 */
24472eb4d010SOphir Munk 				DRV_LOG(INFO, "no E-Switch support detected");
24482eb4d010SOphir Munk 				ns++;
24492eb4d010SOphir Munk 				break;
24502eb4d010SOphir Munk 			}
24512eb4d010SOphir Munk 		}
24522eb4d010SOphir Munk 		if (!ns) {
24532eb4d010SOphir Munk 			DRV_LOG(ERR,
24542eb4d010SOphir Munk 				"unable to recognize master/representors"
24552eb4d010SOphir Munk 				" on the multiple IB devices");
24562eb4d010SOphir Munk 			rte_errno = ENOENT;
24572eb4d010SOphir Munk 			ret = -rte_errno;
24582eb4d010SOphir Munk 			goto exit;
24592eb4d010SOphir Munk 		}
24606b157f3bSViacheslav Ovsiienko 		/*
24616b157f3bSViacheslav Ovsiienko 		 * New kernels may add the switch_id attribute for the case
24626b157f3bSViacheslav Ovsiienko 		 * there is no E-Switch and we wrongly recognized the
24636b157f3bSViacheslav Ovsiienko 		 * only device as master. Override this if there is the
24646b157f3bSViacheslav Ovsiienko 		 * single device with single port and new device name
24656b157f3bSViacheslav Ovsiienko 		 * format present.
24666b157f3bSViacheslav Ovsiienko 		 */
24676b157f3bSViacheslav Ovsiienko 		if (nd == 1 &&
24686b157f3bSViacheslav Ovsiienko 		    list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
24696b157f3bSViacheslav Ovsiienko 			list[0].info.master = 0;
24706b157f3bSViacheslav Ovsiienko 			list[0].info.representor = 0;
24716b157f3bSViacheslav Ovsiienko 		}
24722eb4d010SOphir Munk 	}
24732eb4d010SOphir Munk 	MLX5_ASSERT(ns);
24742eb4d010SOphir Munk 	/*
24752eb4d010SOphir Munk 	 * Sort list to probe devices in natural order for users convenience
24762eb4d010SOphir Munk 	 * (i.e. master first, then representors from lowest to highest ID).
24772eb4d010SOphir Munk 	 */
24782eb4d010SOphir Munk 	qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
24792eb4d010SOphir Munk 	/* Device specific configuration. */
24802eb4d010SOphir Munk 	switch (pci_dev->id.device_id) {
24812eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
24822eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
24832eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
24842eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
24852eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
24862eb4d010SOphir Munk 	case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
24873ea12cadSRaslan Darawsheh 	case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2488d462a83cSMichael Baum 		dev_config_vf = 1;
24892eb4d010SOphir Munk 		break;
24902eb4d010SOphir Munk 	default:
2491d462a83cSMichael Baum 		dev_config_vf = 0;
24922eb4d010SOphir Munk 		break;
24932eb4d010SOphir Munk 	}
2494f926cce3SXueming Li 	if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2495f926cce3SXueming Li 		/* Set devargs default values. */
2496f926cce3SXueming Li 		if (eth_da.nb_mh_controllers == 0) {
2497f926cce3SXueming Li 			eth_da.nb_mh_controllers = 1;
2498f926cce3SXueming Li 			eth_da.mh_controllers[0] = 0;
2499f926cce3SXueming Li 		}
2500f926cce3SXueming Li 		if (eth_da.nb_ports == 0 && ns > 0) {
2501f926cce3SXueming Li 			if (list[0].pf_bond >= 0 && list[0].info.representor)
2502f926cce3SXueming Li 				DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2503f926cce3SXueming Li 					pci_dev->device.devargs->args);
2504f926cce3SXueming Li 			eth_da.nb_ports = 1;
2505f926cce3SXueming Li 			eth_da.ports[0] = list[0].info.pf_num;
2506f926cce3SXueming Li 		}
2507f926cce3SXueming Li 		if (eth_da.nb_representor_ports == 0) {
2508f926cce3SXueming Li 			eth_da.nb_representor_ports = 1;
2509f926cce3SXueming Li 			eth_da.representor_ports[0] = 0;
2510f926cce3SXueming Li 		}
2511f926cce3SXueming Li 	}
25122eb4d010SOphir Munk 	for (i = 0; i != ns; ++i) {
25132eb4d010SOphir Munk 		uint32_t restore;
25142eb4d010SOphir Munk 
2515d462a83cSMichael Baum 		/* Default configuration. */
2516919488fbSXueming Li 		mlx5_os_config_default(&dev_config);
2517d462a83cSMichael Baum 		dev_config.vf = dev_config_vf;
2518e39226bdSJiawei Wang 		dev_config.allow_duplicate_pattern = 1;
251956bb3c84SXueming Li 		list[i].numa_node = pci_dev->device.numa_node;
25202eb4d010SOphir Munk 		list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
25212eb4d010SOphir Munk 						 &list[i],
2522cb95feefSXueming Li 						 &dev_config,
2523cb95feefSXueming Li 						 &eth_da);
25242eb4d010SOphir Munk 		if (!list[i].eth_dev) {
25252eb4d010SOphir Munk 			if (rte_errno != EBUSY && rte_errno != EEXIST)
25262eb4d010SOphir Munk 				break;
25272eb4d010SOphir Munk 			/* Device is disabled or already spawned. Ignore it. */
25282eb4d010SOphir Munk 			continue;
25292eb4d010SOphir Munk 		}
25302eb4d010SOphir Munk 		restore = list[i].eth_dev->data->dev_flags;
25312eb4d010SOphir Munk 		rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
25322eb4d010SOphir Munk 		/* Restore non-PCI flags cleared by the above call. */
25332eb4d010SOphir Munk 		list[i].eth_dev->data->dev_flags |= restore;
25342eb4d010SOphir Munk 		rte_eth_dev_probing_finish(list[i].eth_dev);
25352eb4d010SOphir Munk 	}
25362eb4d010SOphir Munk 	if (i != ns) {
25372eb4d010SOphir Munk 		DRV_LOG(ERR,
25382eb4d010SOphir Munk 			"probe of PCI device " PCI_PRI_FMT " aborted after"
25392eb4d010SOphir Munk 			" encountering an error: %s",
2540f926cce3SXueming Li 			owner_pci.domain, owner_pci.bus,
2541f926cce3SXueming Li 			owner_pci.devid, owner_pci.function,
25422eb4d010SOphir Munk 			strerror(rte_errno));
25432eb4d010SOphir Munk 		ret = -rte_errno;
25442eb4d010SOphir Munk 		/* Roll back. */
25452eb4d010SOphir Munk 		while (i--) {
25462eb4d010SOphir Munk 			if (!list[i].eth_dev)
25472eb4d010SOphir Munk 				continue;
25482eb4d010SOphir Munk 			mlx5_dev_close(list[i].eth_dev);
25492eb4d010SOphir Munk 			/* mac_addrs must not be freed because in dev_private */
25502eb4d010SOphir Munk 			list[i].eth_dev->data->mac_addrs = NULL;
25512eb4d010SOphir Munk 			claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
25522eb4d010SOphir Munk 		}
25532eb4d010SOphir Munk 		/* Restore original error. */
25542eb4d010SOphir Munk 		rte_errno = -ret;
25552eb4d010SOphir Munk 	} else {
25562eb4d010SOphir Munk 		ret = 0;
25572eb4d010SOphir Munk 	}
25582eb4d010SOphir Munk exit:
25592eb4d010SOphir Munk 	/*
25602eb4d010SOphir Munk 	 * Do the routine cleanup:
25612eb4d010SOphir Munk 	 * - close opened Netlink sockets
25622eb4d010SOphir Munk 	 * - free allocated spawn data array
25632eb4d010SOphir Munk 	 * - free the Infiniband device list
25642eb4d010SOphir Munk 	 */
25652eb4d010SOphir Munk 	if (nl_rdma >= 0)
25662eb4d010SOphir Munk 		close(nl_rdma);
25672eb4d010SOphir Munk 	if (nl_route >= 0)
25682eb4d010SOphir Munk 		close(nl_route);
25692eb4d010SOphir Munk 	if (list)
25702175c4dcSSuanming Mou 		mlx5_free(list);
25712eb4d010SOphir Munk 	MLX5_ASSERT(ibv_list);
25722eb4d010SOphir Munk 	mlx5_glue->free_device_list(ibv_list);
25732eb4d010SOphir Munk 	return ret;
25742eb4d010SOphir Munk }
25752eb4d010SOphir Munk 
2576919488fbSXueming Li static int
2577919488fbSXueming Li mlx5_os_parse_eth_devargs(struct rte_device *dev,
2578919488fbSXueming Li 			  struct rte_eth_devargs *eth_da)
2579919488fbSXueming Li {
2580919488fbSXueming Li 	int ret = 0;
2581919488fbSXueming Li 
2582919488fbSXueming Li 	if (dev->devargs == NULL)
2583919488fbSXueming Li 		return 0;
2584919488fbSXueming Li 	memset(eth_da, 0, sizeof(*eth_da));
2585919488fbSXueming Li 	/* Parse representor information first from class argument. */
2586919488fbSXueming Li 	if (dev->devargs->cls_str)
2587919488fbSXueming Li 		ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2588919488fbSXueming Li 	if (ret != 0) {
2589919488fbSXueming Li 		DRV_LOG(ERR, "failed to parse device arguments: %s",
2590919488fbSXueming Li 			dev->devargs->cls_str);
2591919488fbSXueming Li 		return -rte_errno;
2592919488fbSXueming Li 	}
2593919488fbSXueming Li 	if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2594919488fbSXueming Li 		/* Parse legacy device argument */
2595919488fbSXueming Li 		ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2596919488fbSXueming Li 		if (ret) {
2597919488fbSXueming Li 			DRV_LOG(ERR, "failed to parse device arguments: %s",
2598919488fbSXueming Li 				dev->devargs->args);
2599919488fbSXueming Li 			return -rte_errno;
2600919488fbSXueming Li 		}
2601919488fbSXueming Li 	}
2602919488fbSXueming Li 	return 0;
2603919488fbSXueming Li }
2604919488fbSXueming Li 
260508c2772fSXueming Li /**
2606a7f34989SXueming Li  * Callback to register a PCI device.
260708c2772fSXueming Li  *
260808c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device.
260908c2772fSXueming Li  *
261008c2772fSXueming Li  * @param[in] pci_dev
261108c2772fSXueming Li  *   PCI device information.
261208c2772fSXueming Li  *
261308c2772fSXueming Li  * @return
261408c2772fSXueming Li  *   0 on success, a negative errno value otherwise and rte_errno is set.
261508c2772fSXueming Li  */
2616a7f34989SXueming Li static int
2617a7f34989SXueming Li mlx5_os_pci_probe(struct rte_pci_device *pci_dev)
261808c2772fSXueming Li {
2619919488fbSXueming Li 	struct rte_eth_devargs eth_da = { .nb_ports = 0 };
262008c2772fSXueming Li 	int ret = 0;
262108c2772fSXueming Li 	uint16_t p;
262208c2772fSXueming Li 
2623919488fbSXueming Li 	ret = mlx5_os_parse_eth_devargs(&pci_dev->device, &eth_da);
2624919488fbSXueming Li 	if (ret != 0)
2625919488fbSXueming Li 		return ret;
262608c2772fSXueming Li 
262708c2772fSXueming Li 	if (eth_da.nb_ports > 0) {
262808c2772fSXueming Li 		/* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
262908c2772fSXueming Li 		for (p = 0; p < eth_da.nb_ports; p++)
263008c2772fSXueming Li 			ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da,
263108c2772fSXueming Li 						   eth_da.ports[p]);
263208c2772fSXueming Li 	} else {
263308c2772fSXueming Li 		ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da, 0);
263408c2772fSXueming Li 	}
263508c2772fSXueming Li 	return ret;
263608c2772fSXueming Li }
263708c2772fSXueming Li 
2638919488fbSXueming Li /* Probe a single SF device on auxiliary bus, no representor support. */
2639919488fbSXueming Li static int
2640919488fbSXueming Li mlx5_os_auxiliary_probe(struct rte_device *dev)
2641919488fbSXueming Li {
2642919488fbSXueming Li 	struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2643919488fbSXueming Li 	struct mlx5_dev_config config;
2644919488fbSXueming Li 	struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2645919488fbSXueming Li 	struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2646919488fbSXueming Li 	struct rte_eth_dev *eth_dev;
2647919488fbSXueming Li 	int ret = 0;
2648919488fbSXueming Li 
2649919488fbSXueming Li 	/* Parse ethdev devargs. */
2650919488fbSXueming Li 	ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2651919488fbSXueming Li 	if (ret != 0)
2652919488fbSXueming Li 		return ret;
2653919488fbSXueming Li 	/* Set default config data. */
2654919488fbSXueming Li 	mlx5_os_config_default(&config);
2655919488fbSXueming Li 	config.sf = 1;
2656919488fbSXueming Li 	/* Init spawn data. */
2657919488fbSXueming Li 	spawn.max_port = 1;
2658919488fbSXueming Li 	spawn.phys_port = 1;
2659919488fbSXueming Li 	spawn.phys_dev = mlx5_os_get_ibv_dev(dev);
2660919488fbSXueming Li 	if (spawn.phys_dev == NULL)
2661919488fbSXueming Li 		return -rte_errno;
2662919488fbSXueming Li 	ret = mlx5_auxiliary_get_ifindex(dev->name);
2663919488fbSXueming Li 	if (ret < 0) {
2664919488fbSXueming Li 		DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2665919488fbSXueming Li 		return ret;
2666919488fbSXueming Li 	}
2667919488fbSXueming Li 	spawn.ifindex = ret;
2668919488fbSXueming Li 	spawn.numa_node = dev->numa_node;
2669919488fbSXueming Li 	/* Spawn device. */
2670919488fbSXueming Li 	eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2671919488fbSXueming Li 	if (eth_dev == NULL)
2672919488fbSXueming Li 		return -rte_errno;
2673919488fbSXueming Li 	/* Post create. */
2674919488fbSXueming Li 	eth_dev->intr_handle = &adev->intr_handle;
2675919488fbSXueming Li 	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2676919488fbSXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2677919488fbSXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2678919488fbSXueming Li 		eth_dev->data->numa_node = dev->numa_node;
2679919488fbSXueming Li 	}
2680919488fbSXueming Li 	rte_eth_dev_probing_finish(eth_dev);
2681919488fbSXueming Li 	return 0;
2682919488fbSXueming Li }
2683919488fbSXueming Li 
2684a7f34989SXueming Li /**
2685a7f34989SXueming Li  * Net class driver callback to probe a device.
2686a7f34989SXueming Li  *
2687919488fbSXueming Li  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2688a7f34989SXueming Li  *
2689a7f34989SXueming Li  * @param[in] dev
2690a7f34989SXueming Li  *   Pointer to the generic device.
2691a7f34989SXueming Li  *
2692a7f34989SXueming Li  * @return
2693a7f34989SXueming Li  *   0 on success, the function cannot fail.
2694a7f34989SXueming Li  */
2695a7f34989SXueming Li int
2696a7f34989SXueming Li mlx5_os_net_probe(struct rte_device *dev)
2697a7f34989SXueming Li {
2698a7f34989SXueming Li 	int ret;
2699a7f34989SXueming Li 
2700a7f34989SXueming Li 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2701a7f34989SXueming Li 		mlx5_pmd_socket_init();
2702a7f34989SXueming Li 	ret = mlx5_init_once();
2703a7f34989SXueming Li 	if (ret) {
2704a7f34989SXueming Li 		DRV_LOG(ERR, "unable to init PMD global data: %s",
2705a7f34989SXueming Li 			strerror(rte_errno));
2706a7f34989SXueming Li 		return -rte_errno;
2707a7f34989SXueming Li 	}
2708a7f34989SXueming Li 	if (mlx5_dev_is_pci(dev))
2709a7f34989SXueming Li 		return mlx5_os_pci_probe(RTE_DEV_TO_PCI(dev));
2710919488fbSXueming Li 	else
2711919488fbSXueming Li 		return mlx5_os_auxiliary_probe(dev);
2712a7f34989SXueming Li }
2713a7f34989SXueming Li 
27142eb4d010SOphir Munk static int
27152eb4d010SOphir Munk mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
27162eb4d010SOphir Munk {
27172eb4d010SOphir Munk 	char *env;
27182eb4d010SOphir Munk 	int value;
27192eb4d010SOphir Munk 
27202eb4d010SOphir Munk 	MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
27212eb4d010SOphir Munk 	/* Get environment variable to store. */
27222eb4d010SOphir Munk 	env = getenv(MLX5_SHUT_UP_BF);
27232eb4d010SOphir Munk 	value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
27242eb4d010SOphir Munk 	if (config->dbnc == MLX5_ARG_UNSET)
27252eb4d010SOphir Munk 		setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
27262eb4d010SOphir Munk 	else
27272eb4d010SOphir Munk 		setenv(MLX5_SHUT_UP_BF,
27282eb4d010SOphir Munk 		       config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
27292eb4d010SOphir Munk 	return value;
27302eb4d010SOphir Munk }
27312eb4d010SOphir Munk 
27322eb4d010SOphir Munk static void
27332eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(int value)
27342eb4d010SOphir Munk {
27352eb4d010SOphir Munk 	MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
27362eb4d010SOphir Munk 	/* Restore the original environment variable state. */
27372eb4d010SOphir Munk 	if (value == MLX5_ARG_UNSET)
27382eb4d010SOphir Munk 		unsetenv(MLX5_SHUT_UP_BF);
27392eb4d010SOphir Munk 	else
27402eb4d010SOphir Munk 		setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
27412eb4d010SOphir Munk }
27422eb4d010SOphir Munk 
27432eb4d010SOphir Munk /**
27442eb4d010SOphir Munk  * Extract pdn of PD object using DV API.
27452eb4d010SOphir Munk  *
27462eb4d010SOphir Munk  * @param[in] pd
27472eb4d010SOphir Munk  *   Pointer to the verbs PD object.
27482eb4d010SOphir Munk  * @param[out] pdn
27492eb4d010SOphir Munk  *   Pointer to the PD object number variable.
27502eb4d010SOphir Munk  *
27512eb4d010SOphir Munk  * @return
27522eb4d010SOphir Munk  *   0 on success, error value otherwise.
27532eb4d010SOphir Munk  */
27542eb4d010SOphir Munk int
27552eb4d010SOphir Munk mlx5_os_get_pdn(void *pd, uint32_t *pdn)
27562eb4d010SOphir Munk {
27572eb4d010SOphir Munk #ifdef HAVE_IBV_FLOW_DV_SUPPORT
27582eb4d010SOphir Munk 	struct mlx5dv_obj obj;
27592eb4d010SOphir Munk 	struct mlx5dv_pd pd_info;
27602eb4d010SOphir Munk 	int ret = 0;
27612eb4d010SOphir Munk 
27622eb4d010SOphir Munk 	obj.pd.in = pd;
27632eb4d010SOphir Munk 	obj.pd.out = &pd_info;
27642eb4d010SOphir Munk 	ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
27652eb4d010SOphir Munk 	if (ret) {
27662eb4d010SOphir Munk 		DRV_LOG(DEBUG, "Fail to get PD object info");
27672eb4d010SOphir Munk 		return ret;
27682eb4d010SOphir Munk 	}
27692eb4d010SOphir Munk 	*pdn = pd_info.pdn;
27702eb4d010SOphir Munk 	return 0;
27712eb4d010SOphir Munk #else
27722eb4d010SOphir Munk 	(void)pd;
27732eb4d010SOphir Munk 	(void)pdn;
27742eb4d010SOphir Munk 	return -ENOTSUP;
27752eb4d010SOphir Munk #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
27762eb4d010SOphir Munk }
27772eb4d010SOphir Munk 
27782eb4d010SOphir Munk /**
27792eb4d010SOphir Munk  * Function API to open IB device.
27802eb4d010SOphir Munk  *
27812eb4d010SOphir Munk  * This function calls the Linux glue APIs to open a device.
27822eb4d010SOphir Munk  *
27832eb4d010SOphir Munk  * @param[in] spawn
27842eb4d010SOphir Munk  *   Pointer to the IB device attributes (name, port, etc).
27852eb4d010SOphir Munk  * @param[out] config
27862eb4d010SOphir Munk  *   Pointer to device configuration structure.
27872eb4d010SOphir Munk  * @param[out] sh
27882eb4d010SOphir Munk  *   Pointer to shared context structure.
27892eb4d010SOphir Munk  *
27902eb4d010SOphir Munk  * @return
27912eb4d010SOphir Munk  *   0 on success, a positive error value otherwise.
27922eb4d010SOphir Munk  */
27932eb4d010SOphir Munk int
27942eb4d010SOphir Munk mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
27952eb4d010SOphir Munk 		     const struct mlx5_dev_config *config,
27962eb4d010SOphir Munk 		     struct mlx5_dev_ctx_shared *sh)
27972eb4d010SOphir Munk {
27982eb4d010SOphir Munk 	int dbmap_env;
27992eb4d010SOphir Munk 	int err = 0;
2800d133f4cdSViacheslav Ovsiienko 
2801d133f4cdSViacheslav Ovsiienko 	pthread_mutex_init(&sh->txpp.mutex, NULL);
28022eb4d010SOphir Munk 	/*
28032eb4d010SOphir Munk 	 * Configure environment variable "MLX5_BF_SHUT_UP"
28042eb4d010SOphir Munk 	 * before the device creation. The rdma_core library
28052eb4d010SOphir Munk 	 * checks the variable at device creation and
28062eb4d010SOphir Munk 	 * stores the result internally.
28072eb4d010SOphir Munk 	 */
28082eb4d010SOphir Munk 	dbmap_env = mlx5_config_doorbell_mapping_env(config);
28092eb4d010SOphir Munk 	/* Try to open IB device with DV first, then usual Verbs. */
28102eb4d010SOphir Munk 	errno = 0;
2811834a9019SOphir Munk 	sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
28122eb4d010SOphir Munk 	if (sh->ctx) {
28132eb4d010SOphir Munk 		sh->devx = 1;
28142eb4d010SOphir Munk 		DRV_LOG(DEBUG, "DevX is supported");
28152eb4d010SOphir Munk 		/* The device is created, no need for environment. */
28162eb4d010SOphir Munk 		mlx5_restore_doorbell_mapping_env(dbmap_env);
28172eb4d010SOphir Munk 	} else {
28182eb4d010SOphir Munk 		/* The environment variable is still configured. */
2819834a9019SOphir Munk 		sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
28202eb4d010SOphir Munk 		err = errno ? errno : ENODEV;
28212eb4d010SOphir Munk 		/*
28222eb4d010SOphir Munk 		 * The environment variable is not needed anymore,
28232eb4d010SOphir Munk 		 * all device creation attempts are completed.
28242eb4d010SOphir Munk 		 */
28252eb4d010SOphir Munk 		mlx5_restore_doorbell_mapping_env(dbmap_env);
28262eb4d010SOphir Munk 		if (!sh->ctx)
28272eb4d010SOphir Munk 			return err;
28282eb4d010SOphir Munk 		DRV_LOG(DEBUG, "DevX is NOT supported");
28292eb4d010SOphir Munk 		err = 0;
28302eb4d010SOphir Munk 	}
283181c3b977SViacheslav Ovsiienko 	if (!err && sh->ctx) {
283281c3b977SViacheslav Ovsiienko 		/* Hint libmlx5 to use PMD allocator for data plane resources */
283381c3b977SViacheslav Ovsiienko 		mlx5_glue->dv_set_context_attr(sh->ctx,
283481c3b977SViacheslav Ovsiienko 			MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
283581c3b977SViacheslav Ovsiienko 			(void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
283681c3b977SViacheslav Ovsiienko 				.alloc = &mlx5_alloc_verbs_buf,
283781c3b977SViacheslav Ovsiienko 				.free = &mlx5_free_verbs_buf,
283881c3b977SViacheslav Ovsiienko 				.data = sh,
283981c3b977SViacheslav Ovsiienko 			}));
284081c3b977SViacheslav Ovsiienko 	}
28412eb4d010SOphir Munk 	return err;
28422eb4d010SOphir Munk }
28432eb4d010SOphir Munk 
28442eb4d010SOphir Munk /**
28452eb4d010SOphir Munk  * Install shared asynchronous device events handler.
28462eb4d010SOphir Munk  * This function is implemented to support event sharing
28472eb4d010SOphir Munk  * between multiple ports of single IB device.
28482eb4d010SOphir Munk  *
28492eb4d010SOphir Munk  * @param sh
28502eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
28512eb4d010SOphir Munk  */
28522eb4d010SOphir Munk void
28532eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
28542eb4d010SOphir Munk {
28552eb4d010SOphir Munk 	int ret;
28562eb4d010SOphir Munk 	int flags;
28572eb4d010SOphir Munk 
28582eb4d010SOphir Munk 	sh->intr_handle.fd = -1;
28592eb4d010SOphir Munk 	flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
28602eb4d010SOphir Munk 	ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
28612eb4d010SOphir Munk 		    F_SETFL, flags | O_NONBLOCK);
28622eb4d010SOphir Munk 	if (ret) {
28632eb4d010SOphir Munk 		DRV_LOG(INFO, "failed to change file descriptor async event"
28642eb4d010SOphir Munk 			" queue");
28652eb4d010SOphir Munk 	} else {
28662eb4d010SOphir Munk 		sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
28672eb4d010SOphir Munk 		sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
28682eb4d010SOphir Munk 		if (rte_intr_callback_register(&sh->intr_handle,
28692eb4d010SOphir Munk 					mlx5_dev_interrupt_handler, sh)) {
28702eb4d010SOphir Munk 			DRV_LOG(INFO, "Fail to install the shared interrupt.");
28712eb4d010SOphir Munk 			sh->intr_handle.fd = -1;
28722eb4d010SOphir Munk 		}
28732eb4d010SOphir Munk 	}
28742eb4d010SOphir Munk 	if (sh->devx) {
28752eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
28762eb4d010SOphir Munk 		sh->intr_handle_devx.fd = -1;
287721b7c452SOphir Munk 		sh->devx_comp =
287821b7c452SOphir Munk 			(void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
287921b7c452SOphir Munk 		struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
288021b7c452SOphir Munk 		if (!devx_comp) {
28812eb4d010SOphir Munk 			DRV_LOG(INFO, "failed to allocate devx_comp.");
28822eb4d010SOphir Munk 			return;
28832eb4d010SOphir Munk 		}
288421b7c452SOphir Munk 		flags = fcntl(devx_comp->fd, F_GETFL);
288521b7c452SOphir Munk 		ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
28862eb4d010SOphir Munk 		if (ret) {
28872eb4d010SOphir Munk 			DRV_LOG(INFO, "failed to change file descriptor"
28882eb4d010SOphir Munk 				" devx comp");
28892eb4d010SOphir Munk 			return;
28902eb4d010SOphir Munk 		}
289121b7c452SOphir Munk 		sh->intr_handle_devx.fd = devx_comp->fd;
28922eb4d010SOphir Munk 		sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
28932eb4d010SOphir Munk 		if (rte_intr_callback_register(&sh->intr_handle_devx,
28942eb4d010SOphir Munk 					mlx5_dev_interrupt_handler_devx, sh)) {
28952eb4d010SOphir Munk 			DRV_LOG(INFO, "Fail to install the devx shared"
28962eb4d010SOphir Munk 				" interrupt.");
28972eb4d010SOphir Munk 			sh->intr_handle_devx.fd = -1;
28982eb4d010SOphir Munk 		}
28992eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */
29002eb4d010SOphir Munk 	}
29012eb4d010SOphir Munk }
29022eb4d010SOphir Munk 
29032eb4d010SOphir Munk /**
29042eb4d010SOphir Munk  * Uninstall shared asynchronous device events handler.
29052eb4d010SOphir Munk  * This function is implemented to support event sharing
29062eb4d010SOphir Munk  * between multiple ports of single IB device.
29072eb4d010SOphir Munk  *
29082eb4d010SOphir Munk  * @param dev
29092eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
29102eb4d010SOphir Munk  */
29112eb4d010SOphir Munk void
29122eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
29132eb4d010SOphir Munk {
29142eb4d010SOphir Munk 	if (sh->intr_handle.fd >= 0)
29152eb4d010SOphir Munk 		mlx5_intr_callback_unregister(&sh->intr_handle,
29162eb4d010SOphir Munk 					      mlx5_dev_interrupt_handler, sh);
29172eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
29182eb4d010SOphir Munk 	if (sh->intr_handle_devx.fd >= 0)
29192eb4d010SOphir Munk 		rte_intr_callback_unregister(&sh->intr_handle_devx,
29202eb4d010SOphir Munk 				  mlx5_dev_interrupt_handler_devx, sh);
29212eb4d010SOphir Munk 	if (sh->devx_comp)
29222eb4d010SOphir Munk 		mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
29232eb4d010SOphir Munk #endif
29242eb4d010SOphir Munk }
2925042f5c94SOphir Munk 
292673bf9235SOphir Munk /**
292773bf9235SOphir Munk  * Read statistics by a named counter.
292873bf9235SOphir Munk  *
292973bf9235SOphir Munk  * @param[in] priv
293073bf9235SOphir Munk  *   Pointer to the private device data structure.
293173bf9235SOphir Munk  * @param[in] ctr_name
293273bf9235SOphir Munk  *   Pointer to the name of the statistic counter to read
293373bf9235SOphir Munk  * @param[out] stat
293473bf9235SOphir Munk  *   Pointer to read statistic value.
293573bf9235SOphir Munk  * @return
293673bf9235SOphir Munk  *   0 on success and stat is valud, 1 if failed to read the value
293773bf9235SOphir Munk  *   rte_errno is set.
293873bf9235SOphir Munk  *
293973bf9235SOphir Munk  */
294073bf9235SOphir Munk int
294173bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
294273bf9235SOphir Munk 		      uint64_t *stat)
294373bf9235SOphir Munk {
294473bf9235SOphir Munk 	int fd;
294573bf9235SOphir Munk 
294673bf9235SOphir Munk 	if (priv->sh) {
2947e6988afdSMatan Azrad 		if (priv->q_counters != NULL &&
2948e6988afdSMatan Azrad 		    strcmp(ctr_name, "out_of_buffer") == 0)
2949978a0303SViacheslav Ovsiienko 			return mlx5_devx_cmd_queue_counter_query
2950978a0303SViacheslav Ovsiienko 					(priv->q_counters, 0, (uint32_t *)stat);
295173bf9235SOphir Munk 		MKSTR(path, "%s/ports/%d/hw_counters/%s",
295273bf9235SOphir Munk 		      priv->sh->ibdev_path,
295373bf9235SOphir Munk 		      priv->dev_port,
295473bf9235SOphir Munk 		      ctr_name);
295573bf9235SOphir Munk 		fd = open(path, O_RDONLY);
2956038e7fc0SShy Shyman 		/*
2957038e7fc0SShy Shyman 		 * in switchdev the file location is not per port
2958038e7fc0SShy Shyman 		 * but rather in <ibdev_path>/hw_counters/<file_name>.
2959038e7fc0SShy Shyman 		 */
2960038e7fc0SShy Shyman 		if (fd == -1) {
2961038e7fc0SShy Shyman 			MKSTR(path1, "%s/hw_counters/%s",
2962038e7fc0SShy Shyman 			      priv->sh->ibdev_path,
2963038e7fc0SShy Shyman 			      ctr_name);
2964038e7fc0SShy Shyman 			fd = open(path1, O_RDONLY);
2965038e7fc0SShy Shyman 		}
296673bf9235SOphir Munk 		if (fd != -1) {
296773bf9235SOphir Munk 			char buf[21] = {'\0'};
296873bf9235SOphir Munk 			ssize_t n = read(fd, buf, sizeof(buf));
296973bf9235SOphir Munk 
297073bf9235SOphir Munk 			close(fd);
297173bf9235SOphir Munk 			if (n != -1) {
297273bf9235SOphir Munk 				*stat = strtoull(buf, NULL, 10);
297373bf9235SOphir Munk 				return 0;
297473bf9235SOphir Munk 			}
297573bf9235SOphir Munk 		}
297673bf9235SOphir Munk 	}
297773bf9235SOphir Munk 	*stat = 0;
297873bf9235SOphir Munk 	return 1;
297973bf9235SOphir Munk }
298073bf9235SOphir Munk 
298173bf9235SOphir Munk /**
2982d5ed8aa9SOphir Munk  * Set the reg_mr and dereg_mr call backs
2983d5ed8aa9SOphir Munk  *
2984d5ed8aa9SOphir Munk  * @param reg_mr_cb[out]
2985d5ed8aa9SOphir Munk  *   Pointer to reg_mr func
2986d5ed8aa9SOphir Munk  * @param dereg_mr_cb[out]
2987d5ed8aa9SOphir Munk  *   Pointer to dereg_mr func
2988d5ed8aa9SOphir Munk  *
2989d5ed8aa9SOphir Munk  */
2990d5ed8aa9SOphir Munk void
2991d5ed8aa9SOphir Munk mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2992d5ed8aa9SOphir Munk 		      mlx5_dereg_mr_t *dereg_mr_cb)
2993d5ed8aa9SOphir Munk {
2994db12615bSOphir Munk 	*reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2995db12615bSOphir Munk 	*dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2996d5ed8aa9SOphir Munk }
2997d5ed8aa9SOphir Munk 
2998ab27cdd9SOphir Munk /**
2999ab27cdd9SOphir Munk  * Remove a MAC address from device
3000ab27cdd9SOphir Munk  *
3001ab27cdd9SOphir Munk  * @param dev
3002ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
3003ab27cdd9SOphir Munk  * @param index
3004ab27cdd9SOphir Munk  *   MAC address index.
3005ab27cdd9SOphir Munk  */
3006ab27cdd9SOphir Munk void
3007ab27cdd9SOphir Munk mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
3008ab27cdd9SOphir Munk {
3009ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
3010ab27cdd9SOphir Munk 	const int vf = priv->config.vf;
3011ab27cdd9SOphir Munk 
3012ab27cdd9SOphir Munk 	if (vf)
3013ab27cdd9SOphir Munk 		mlx5_nl_mac_addr_remove(priv->nl_socket_route,
3014ab27cdd9SOphir Munk 					mlx5_ifindex(dev), priv->mac_own,
3015ab27cdd9SOphir Munk 					&dev->data->mac_addrs[index], index);
3016ab27cdd9SOphir Munk }
3017ab27cdd9SOphir Munk 
3018ab27cdd9SOphir Munk /**
3019ab27cdd9SOphir Munk  * Adds a MAC address to the device
3020ab27cdd9SOphir Munk  *
3021ab27cdd9SOphir Munk  * @param dev
3022ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
3023ab27cdd9SOphir Munk  * @param mac_addr
3024ab27cdd9SOphir Munk  *   MAC address to register.
3025ab27cdd9SOphir Munk  * @param index
3026ab27cdd9SOphir Munk  *   MAC address index.
3027ab27cdd9SOphir Munk  *
3028ab27cdd9SOphir Munk  * @return
3029ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
3030ab27cdd9SOphir Munk  */
3031ab27cdd9SOphir Munk int
3032ab27cdd9SOphir Munk mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
3033ab27cdd9SOphir Munk 		     uint32_t index)
3034ab27cdd9SOphir Munk {
3035ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
3036ab27cdd9SOphir Munk 	const int vf = priv->config.vf;
3037ab27cdd9SOphir Munk 	int ret = 0;
3038ab27cdd9SOphir Munk 
3039ab27cdd9SOphir Munk 	if (vf)
3040ab27cdd9SOphir Munk 		ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
3041ab27cdd9SOphir Munk 					   mlx5_ifindex(dev), priv->mac_own,
3042ab27cdd9SOphir Munk 					   mac, index);
3043ab27cdd9SOphir Munk 	return ret;
3044ab27cdd9SOphir Munk }
3045ab27cdd9SOphir Munk 
3046ab27cdd9SOphir Munk /**
3047ab27cdd9SOphir Munk  * Modify a VF MAC address
3048ab27cdd9SOphir Munk  *
3049ab27cdd9SOphir Munk  * @param priv
3050ab27cdd9SOphir Munk  *   Pointer to device private data.
3051ab27cdd9SOphir Munk  * @param mac_addr
3052ab27cdd9SOphir Munk  *   MAC address to modify into.
3053ab27cdd9SOphir Munk  * @param iface_idx
3054ab27cdd9SOphir Munk  *   Net device interface index
3055ab27cdd9SOphir Munk  * @param vf_index
3056ab27cdd9SOphir Munk  *   VF index
3057ab27cdd9SOphir Munk  *
3058ab27cdd9SOphir Munk  * @return
3059ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
3060ab27cdd9SOphir Munk  */
3061ab27cdd9SOphir Munk int
3062ab27cdd9SOphir Munk mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3063ab27cdd9SOphir Munk 			   unsigned int iface_idx,
3064ab27cdd9SOphir Munk 			   struct rte_ether_addr *mac_addr,
3065ab27cdd9SOphir Munk 			   int vf_index)
3066ab27cdd9SOphir Munk {
3067ab27cdd9SOphir Munk 	return mlx5_nl_vf_mac_addr_modify
3068ab27cdd9SOphir Munk 		(priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3069ab27cdd9SOphir Munk }
3070ab27cdd9SOphir Munk 
30714d18abd1SOphir Munk /**
30724d18abd1SOphir Munk  * Set device promiscuous mode
30734d18abd1SOphir Munk  *
30744d18abd1SOphir Munk  * @param dev
30754d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
30764d18abd1SOphir Munk  * @param enable
30774d18abd1SOphir Munk  *   0 - promiscuous is disabled, otherwise - enabled
30784d18abd1SOphir Munk  *
30794d18abd1SOphir Munk  * @return
30804d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
30814d18abd1SOphir Munk  */
30824d18abd1SOphir Munk int
30834d18abd1SOphir Munk mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
30844d18abd1SOphir Munk {
30854d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
30864d18abd1SOphir Munk 
30874d18abd1SOphir Munk 	return mlx5_nl_promisc(priv->nl_socket_route,
30884d18abd1SOphir Munk 			       mlx5_ifindex(dev), !!enable);
30894d18abd1SOphir Munk }
30904d18abd1SOphir Munk 
30914d18abd1SOphir Munk /**
30924d18abd1SOphir Munk  * Set device promiscuous mode
30934d18abd1SOphir Munk  *
30944d18abd1SOphir Munk  * @param dev
30954d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
30964d18abd1SOphir Munk  * @param enable
30974d18abd1SOphir Munk  *   0 - all multicase is disabled, otherwise - enabled
30984d18abd1SOphir Munk  *
30994d18abd1SOphir Munk  * @return
31004d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
31014d18abd1SOphir Munk  */
31024d18abd1SOphir Munk int
31034d18abd1SOphir Munk mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
31044d18abd1SOphir Munk {
31054d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
31064d18abd1SOphir Munk 
31074d18abd1SOphir Munk 	return mlx5_nl_allmulti(priv->nl_socket_route,
31084d18abd1SOphir Munk 				mlx5_ifindex(dev), !!enable);
31094d18abd1SOphir Munk }
31104d18abd1SOphir Munk 
3111f00f6562SOphir Munk /**
3112f00f6562SOphir Munk  * Flush device MAC addresses
3113f00f6562SOphir Munk  *
3114f00f6562SOphir Munk  * @param dev
3115f00f6562SOphir Munk  *   Pointer to Ethernet device structure.
3116f00f6562SOphir Munk  *
3117f00f6562SOphir Munk  */
3118f00f6562SOphir Munk void
3119f00f6562SOphir Munk mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3120f00f6562SOphir Munk {
3121f00f6562SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
3122f00f6562SOphir Munk 
3123f00f6562SOphir Munk 	mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3124f00f6562SOphir Munk 			       dev->data->mac_addrs,
3125f00f6562SOphir Munk 			       MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
3126f00f6562SOphir Munk }
3127