1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause 2f44b09f9SOphir Munk * Copyright 2015 6WIND S.A. 3f44b09f9SOphir Munk * Copyright 2020 Mellanox Technologies, Ltd 4f44b09f9SOphir Munk */ 5f44b09f9SOphir Munk 6f44b09f9SOphir Munk #include <stddef.h> 7f44b09f9SOphir Munk #include <unistd.h> 8f44b09f9SOphir Munk #include <string.h> 9f44b09f9SOphir Munk #include <stdint.h> 10f44b09f9SOphir Munk #include <stdlib.h> 11f44b09f9SOphir Munk #include <errno.h> 12f44b09f9SOphir Munk #include <net/if.h> 13f44b09f9SOphir Munk #include <linux/rtnetlink.h> 1473bf9235SOphir Munk #include <linux/sockios.h> 1573bf9235SOphir Munk #include <linux/ethtool.h> 16f44b09f9SOphir Munk #include <fcntl.h> 17f44b09f9SOphir Munk 18f44b09f9SOphir Munk #include <rte_malloc.h> 19f44b09f9SOphir Munk #include <rte_ethdev_driver.h> 20f44b09f9SOphir Munk #include <rte_ethdev_pci.h> 21f44b09f9SOphir Munk #include <rte_pci.h> 22f44b09f9SOphir Munk #include <rte_bus_pci.h> 23f44b09f9SOphir Munk #include <rte_common.h> 24f44b09f9SOphir Munk #include <rte_kvargs.h> 25f44b09f9SOphir Munk #include <rte_rwlock.h> 26f44b09f9SOphir Munk #include <rte_spinlock.h> 27f44b09f9SOphir Munk #include <rte_string_fns.h> 28f44b09f9SOphir Munk #include <rte_alarm.h> 292aba9fc7SOphir Munk #include <rte_eal_paging.h> 30f44b09f9SOphir Munk 31f44b09f9SOphir Munk #include <mlx5_glue.h> 32f44b09f9SOphir Munk #include <mlx5_devx_cmds.h> 33f44b09f9SOphir Munk #include <mlx5_common.h> 342eb4d010SOphir Munk #include <mlx5_common_mp.h> 35d5ed8aa9SOphir Munk #include <mlx5_common_mr.h> 365522da6bSSuanming Mou #include <mlx5_malloc.h> 37f44b09f9SOphir Munk 38f44b09f9SOphir Munk #include "mlx5_defs.h" 39f44b09f9SOphir Munk #include "mlx5.h" 40391b8bccSOphir Munk #include "mlx5_common_os.h" 41f44b09f9SOphir Munk #include "mlx5_utils.h" 42f44b09f9SOphir Munk #include "mlx5_rxtx.h" 43f44b09f9SOphir Munk #include "mlx5_autoconf.h" 44f44b09f9SOphir Munk #include "mlx5_mr.h" 45f44b09f9SOphir Munk #include "mlx5_flow.h" 46f44b09f9SOphir Munk #include "rte_pmd_mlx5.h" 474f96d913SOphir Munk #include "mlx5_verbs.h" 48f00f6562SOphir Munk #include "mlx5_nl.h" 496deb19e1SMichael Baum #include "mlx5_devx.h" 50f44b09f9SOphir Munk 512eb4d010SOphir Munk #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 522eb4d010SOphir Munk 532eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW 542eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 552eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 562eb4d010SOphir Munk #endif 572eb4d010SOphir Munk 582eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 592eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 602eb4d010SOphir Munk #endif 612eb4d010SOphir Munk 622e86c4e5SOphir Munk static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 632e86c4e5SOphir Munk 642e86c4e5SOphir Munk /* Spinlock for mlx5_shared_data allocation. */ 652e86c4e5SOphir Munk static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 662e86c4e5SOphir Munk 672e86c4e5SOphir Munk /* Process local data for secondary processes. */ 682e86c4e5SOphir Munk static struct mlx5_local_data mlx5_local_data; 692e86c4e5SOphir Munk 70f44b09f9SOphir Munk /** 7108d1838fSDekel Peled * Set the completion channel file descriptor interrupt as non-blocking. 7208d1838fSDekel Peled * 7308d1838fSDekel Peled * @param[in] rxq_obj 7408d1838fSDekel Peled * Pointer to RQ channel object, which includes the channel fd 7508d1838fSDekel Peled * 7608d1838fSDekel Peled * @param[out] fd 7708d1838fSDekel Peled * The file descriptor (representing the intetrrupt) used in this channel. 7808d1838fSDekel Peled * 7908d1838fSDekel Peled * @return 8008d1838fSDekel Peled * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 8108d1838fSDekel Peled */ 8208d1838fSDekel Peled int 8308d1838fSDekel Peled mlx5_os_set_nonblock_channel_fd(int fd) 8408d1838fSDekel Peled { 8508d1838fSDekel Peled int flags; 8608d1838fSDekel Peled 8708d1838fSDekel Peled flags = fcntl(fd, F_GETFL); 8808d1838fSDekel Peled return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 8908d1838fSDekel Peled } 9008d1838fSDekel Peled 9108d1838fSDekel Peled /** 92e85f623eSOphir Munk * Get mlx5 device attributes. The glue function query_device_ex() is called 93e85f623eSOphir Munk * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 94e85f623eSOphir Munk * device attributes from the glue out parameter. 95e85f623eSOphir Munk * 96e85f623eSOphir Munk * @param dev 97e85f623eSOphir Munk * Pointer to ibv context. 98e85f623eSOphir Munk * 99e85f623eSOphir Munk * @param device_attr 100e85f623eSOphir Munk * Pointer to mlx5 device attributes. 101e85f623eSOphir Munk * 102e85f623eSOphir Munk * @return 103e85f623eSOphir Munk * 0 on success, non zero error number otherwise 104e85f623eSOphir Munk */ 105e85f623eSOphir Munk int 106e85f623eSOphir Munk mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 107e85f623eSOphir Munk { 108e85f623eSOphir Munk int err; 109e85f623eSOphir Munk struct ibv_device_attr_ex attr_ex; 110e85f623eSOphir Munk memset(device_attr, 0, sizeof(*device_attr)); 111e85f623eSOphir Munk err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 112e85f623eSOphir Munk if (err) 113e85f623eSOphir Munk return err; 114e85f623eSOphir Munk 115e85f623eSOphir Munk device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 116e85f623eSOphir Munk device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 117e85f623eSOphir Munk device_attr->max_sge = attr_ex.orig_attr.max_sge; 118e85f623eSOphir Munk device_attr->max_cq = attr_ex.orig_attr.max_cq; 119e85f623eSOphir Munk device_attr->max_qp = attr_ex.orig_attr.max_qp; 120e85f623eSOphir Munk device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 121e85f623eSOphir Munk device_attr->max_rwq_indirection_table_size = 122e85f623eSOphir Munk attr_ex.rss_caps.max_rwq_indirection_table_size; 123e85f623eSOphir Munk device_attr->max_tso = attr_ex.tso_caps.max_tso; 124e85f623eSOphir Munk device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 125e85f623eSOphir Munk 126e85f623eSOphir Munk struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 127e85f623eSOphir Munk err = mlx5_glue->dv_query_device(ctx, &dv_attr); 128e85f623eSOphir Munk if (err) 129e85f623eSOphir Munk return err; 130e85f623eSOphir Munk 131e85f623eSOphir Munk device_attr->flags = dv_attr.flags; 132e85f623eSOphir Munk device_attr->comp_mask = dv_attr.comp_mask; 133e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 134e85f623eSOphir Munk device_attr->sw_parsing_offloads = 135e85f623eSOphir Munk dv_attr.sw_parsing_caps.sw_parsing_offloads; 136e85f623eSOphir Munk #endif 137e85f623eSOphir Munk device_attr->min_single_stride_log_num_of_bytes = 138e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 139e85f623eSOphir Munk device_attr->max_single_stride_log_num_of_bytes = 140e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 141e85f623eSOphir Munk device_attr->min_single_wqe_log_num_of_strides = 142e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 143e85f623eSOphir Munk device_attr->max_single_wqe_log_num_of_strides = 144e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 145e85f623eSOphir Munk device_attr->stride_supported_qpts = 146e85f623eSOphir Munk dv_attr.striding_rq_caps.supported_qpts; 147e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 148e85f623eSOphir Munk device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 149e85f623eSOphir Munk #endif 150e85f623eSOphir Munk 151e85f623eSOphir Munk return err; 152e85f623eSOphir Munk } 1532eb4d010SOphir Munk 1542eb4d010SOphir Munk /** 1552eb4d010SOphir Munk * Verbs callback to allocate a memory. This function should allocate the space 1562eb4d010SOphir Munk * according to the size provided residing inside a huge page. 1572eb4d010SOphir Munk * Please note that all allocation must respect the alignment from libmlx5 1582aba9fc7SOphir Munk * (i.e. currently rte_mem_page_size()). 1592eb4d010SOphir Munk * 1602eb4d010SOphir Munk * @param[in] size 1612eb4d010SOphir Munk * The size in bytes of the memory to allocate. 1622eb4d010SOphir Munk * @param[in] data 1632eb4d010SOphir Munk * A pointer to the callback data. 1642eb4d010SOphir Munk * 1652eb4d010SOphir Munk * @return 1662eb4d010SOphir Munk * Allocated buffer, NULL otherwise and rte_errno is set. 1672eb4d010SOphir Munk */ 1682eb4d010SOphir Munk static void * 1692eb4d010SOphir Munk mlx5_alloc_verbs_buf(size_t size, void *data) 1702eb4d010SOphir Munk { 1712eb4d010SOphir Munk struct mlx5_priv *priv = data; 1722eb4d010SOphir Munk void *ret; 1732eb4d010SOphir Munk unsigned int socket = SOCKET_ID_ANY; 1742aba9fc7SOphir Munk size_t alignment = rte_mem_page_size(); 1752aba9fc7SOphir Munk if (alignment == (size_t)-1) { 1762aba9fc7SOphir Munk DRV_LOG(ERR, "Failed to get mem page size"); 1772aba9fc7SOphir Munk rte_errno = ENOMEM; 1782aba9fc7SOphir Munk return NULL; 1792aba9fc7SOphir Munk } 1802eb4d010SOphir Munk 1812eb4d010SOphir Munk if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { 1822eb4d010SOphir Munk const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 1832eb4d010SOphir Munk 1842eb4d010SOphir Munk socket = ctrl->socket; 1852eb4d010SOphir Munk } else if (priv->verbs_alloc_ctx.type == 1862eb4d010SOphir Munk MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) { 1872eb4d010SOphir Munk const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 1882eb4d010SOphir Munk 1892eb4d010SOphir Munk socket = ctrl->socket; 1902eb4d010SOphir Munk } 1912eb4d010SOphir Munk MLX5_ASSERT(data != NULL); 1922175c4dcSSuanming Mou ret = mlx5_malloc(0, size, alignment, socket); 1932eb4d010SOphir Munk if (!ret && size) 1942eb4d010SOphir Munk rte_errno = ENOMEM; 1952eb4d010SOphir Munk return ret; 1962eb4d010SOphir Munk } 1972eb4d010SOphir Munk 1982eb4d010SOphir Munk /** 1992eb4d010SOphir Munk * Verbs callback to free a memory. 2002eb4d010SOphir Munk * 2012eb4d010SOphir Munk * @param[in] ptr 2022eb4d010SOphir Munk * A pointer to the memory to free. 2032eb4d010SOphir Munk * @param[in] data 2042eb4d010SOphir Munk * A pointer to the callback data. 2052eb4d010SOphir Munk */ 2062eb4d010SOphir Munk static void 2072eb4d010SOphir Munk mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) 2082eb4d010SOphir Munk { 2092eb4d010SOphir Munk MLX5_ASSERT(data != NULL); 2102175c4dcSSuanming Mou mlx5_free(ptr); 2112eb4d010SOphir Munk } 2122eb4d010SOphir Munk 2132eb4d010SOphir Munk /** 2142eb4d010SOphir Munk * Initialize DR related data within private structure. 2152eb4d010SOphir Munk * Routine checks the reference counter and does actual 2162eb4d010SOphir Munk * resources creation/initialization only if counter is zero. 2172eb4d010SOphir Munk * 2182eb4d010SOphir Munk * @param[in] priv 2192eb4d010SOphir Munk * Pointer to the private device data structure. 2202eb4d010SOphir Munk * 2212eb4d010SOphir Munk * @return 2222eb4d010SOphir Munk * Zero on success, positive error code otherwise. 2232eb4d010SOphir Munk */ 2242eb4d010SOphir Munk static int 2252eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv) 2262eb4d010SOphir Munk { 2272eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = priv->sh; 2282eb4d010SOphir Munk char s[MLX5_HLIST_NAMESIZE]; 2292eb4d010SOphir Munk int err = 0; 2302eb4d010SOphir Munk 2312eb4d010SOphir Munk if (!sh->flow_tbls) 2322eb4d010SOphir Munk err = mlx5_alloc_table_hash_list(priv); 2332eb4d010SOphir Munk else 2342eb4d010SOphir Munk DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n", 2352eb4d010SOphir Munk (void *)sh->flow_tbls); 2362eb4d010SOphir Munk if (err) 2372eb4d010SOphir Munk return err; 2382eb4d010SOphir Munk /* Create tags hash list table. */ 2392eb4d010SOphir Munk snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); 2402eb4d010SOphir Munk sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE); 2412eb4d010SOphir Munk if (!sh->tag_table) { 24263783b01SDavid Marchand DRV_LOG(ERR, "tags with hash creation failed."); 2432eb4d010SOphir Munk err = ENOMEM; 2442eb4d010SOphir Munk goto error; 2452eb4d010SOphir Munk } 2463fe88961SSuanming Mou snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); 2473fe88961SSuanming Mou sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ); 2483fe88961SSuanming Mou if (!sh->modify_cmds) { 2493fe88961SSuanming Mou DRV_LOG(ERR, "hdr modify hash creation failed"); 2503fe88961SSuanming Mou err = ENOMEM; 2513fe88961SSuanming Mou goto error; 2523fe88961SSuanming Mou } 2532eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 2542eb4d010SOphir Munk void *domain; 2552eb4d010SOphir Munk 2562eb4d010SOphir Munk if (sh->dv_refcnt) { 2572eb4d010SOphir Munk /* Shared DV/DR structures is already initialized. */ 2582eb4d010SOphir Munk sh->dv_refcnt++; 2592eb4d010SOphir Munk priv->dr_shared = 1; 2602eb4d010SOphir Munk return 0; 2612eb4d010SOphir Munk } 2622eb4d010SOphir Munk /* Reference counter is zero, we should initialize structures. */ 2632eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain(sh->ctx, 2642eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 2652eb4d010SOphir Munk if (!domain) { 2662eb4d010SOphir Munk DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 2672eb4d010SOphir Munk err = errno; 2682eb4d010SOphir Munk goto error; 2692eb4d010SOphir Munk } 2702eb4d010SOphir Munk sh->rx_domain = domain; 2712eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain(sh->ctx, 2722eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 2732eb4d010SOphir Munk if (!domain) { 2742eb4d010SOphir Munk DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 2752eb4d010SOphir Munk err = errno; 2762eb4d010SOphir Munk goto error; 2772eb4d010SOphir Munk } 2782eb4d010SOphir Munk pthread_mutex_init(&sh->dv_mutex, NULL); 2792eb4d010SOphir Munk sh->tx_domain = domain; 2802eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 2812eb4d010SOphir Munk if (priv->config.dv_esw_en) { 2822eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain 2832eb4d010SOphir Munk (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); 2842eb4d010SOphir Munk if (!domain) { 2852eb4d010SOphir Munk DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 2862eb4d010SOphir Munk err = errno; 2872eb4d010SOphir Munk goto error; 2882eb4d010SOphir Munk } 2892eb4d010SOphir Munk sh->fdb_domain = domain; 2902eb4d010SOphir Munk sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); 2912eb4d010SOphir Munk } 2922eb4d010SOphir Munk #endif 2932eb4d010SOphir Munk if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 2942eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 2952eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 2962eb4d010SOphir Munk if (sh->fdb_domain) 2972eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 2982eb4d010SOphir Munk } 2992eb4d010SOphir Munk sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 3002eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 3012eb4d010SOphir Munk sh->dv_refcnt++; 3022eb4d010SOphir Munk priv->dr_shared = 1; 3032eb4d010SOphir Munk return 0; 3042eb4d010SOphir Munk error: 3052eb4d010SOphir Munk /* Rollback the created objects. */ 3062eb4d010SOphir Munk if (sh->rx_domain) { 3072eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 3082eb4d010SOphir Munk sh->rx_domain = NULL; 3092eb4d010SOphir Munk } 3102eb4d010SOphir Munk if (sh->tx_domain) { 3112eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 3122eb4d010SOphir Munk sh->tx_domain = NULL; 3132eb4d010SOphir Munk } 3142eb4d010SOphir Munk if (sh->fdb_domain) { 3152eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 3162eb4d010SOphir Munk sh->fdb_domain = NULL; 3172eb4d010SOphir Munk } 3182eb4d010SOphir Munk if (sh->esw_drop_action) { 3192eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->esw_drop_action); 3202eb4d010SOphir Munk sh->esw_drop_action = NULL; 3212eb4d010SOphir Munk } 3222eb4d010SOphir Munk if (sh->pop_vlan_action) { 3232eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 3242eb4d010SOphir Munk sh->pop_vlan_action = NULL; 3252eb4d010SOphir Munk } 3263fe88961SSuanming Mou if (sh->modify_cmds) { 3273fe88961SSuanming Mou mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 3283fe88961SSuanming Mou sh->modify_cmds = NULL; 3293fe88961SSuanming Mou } 3302eb4d010SOphir Munk if (sh->tag_table) { 3312eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 3322eb4d010SOphir Munk mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 3332eb4d010SOphir Munk sh->tag_table = NULL; 3342eb4d010SOphir Munk } 3352eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 3362eb4d010SOphir Munk return err; 3372eb4d010SOphir Munk } 3382eb4d010SOphir Munk 3392eb4d010SOphir Munk /** 3402eb4d010SOphir Munk * Destroy DR related data within private structure. 3412eb4d010SOphir Munk * 3422eb4d010SOphir Munk * @param[in] priv 3432eb4d010SOphir Munk * Pointer to the private device data structure. 3442eb4d010SOphir Munk */ 3452eb4d010SOphir Munk void 3462eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv) 3472eb4d010SOphir Munk { 3482eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh; 3492eb4d010SOphir Munk 3502eb4d010SOphir Munk if (!priv->dr_shared) 3512eb4d010SOphir Munk return; 3522eb4d010SOphir Munk priv->dr_shared = 0; 3532eb4d010SOphir Munk sh = priv->sh; 3542eb4d010SOphir Munk MLX5_ASSERT(sh); 3552eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 3562eb4d010SOphir Munk MLX5_ASSERT(sh->dv_refcnt); 3572eb4d010SOphir Munk if (sh->dv_refcnt && --sh->dv_refcnt) 3582eb4d010SOphir Munk return; 3592eb4d010SOphir Munk if (sh->rx_domain) { 3602eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 3612eb4d010SOphir Munk sh->rx_domain = NULL; 3622eb4d010SOphir Munk } 3632eb4d010SOphir Munk if (sh->tx_domain) { 3642eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 3652eb4d010SOphir Munk sh->tx_domain = NULL; 3662eb4d010SOphir Munk } 3672eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 3682eb4d010SOphir Munk if (sh->fdb_domain) { 3692eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 3702eb4d010SOphir Munk sh->fdb_domain = NULL; 3712eb4d010SOphir Munk } 3722eb4d010SOphir Munk if (sh->esw_drop_action) { 3732eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->esw_drop_action); 3742eb4d010SOphir Munk sh->esw_drop_action = NULL; 3752eb4d010SOphir Munk } 3762eb4d010SOphir Munk #endif 3772eb4d010SOphir Munk if (sh->pop_vlan_action) { 3782eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 3792eb4d010SOphir Munk sh->pop_vlan_action = NULL; 3802eb4d010SOphir Munk } 3812eb4d010SOphir Munk pthread_mutex_destroy(&sh->dv_mutex); 3822eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 3833fe88961SSuanming Mou if (sh->modify_cmds) { 3843fe88961SSuanming Mou mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL); 3853fe88961SSuanming Mou sh->modify_cmds = NULL; 3863fe88961SSuanming Mou } 3872eb4d010SOphir Munk if (sh->tag_table) { 3882eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 3892eb4d010SOphir Munk mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 3902eb4d010SOphir Munk sh->tag_table = NULL; 3912eb4d010SOphir Munk } 3922eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 3932eb4d010SOphir Munk } 3942eb4d010SOphir Munk 3952eb4d010SOphir Munk /** 3962e86c4e5SOphir Munk * Initialize shared data between primary and secondary process. 3972e86c4e5SOphir Munk * 3982e86c4e5SOphir Munk * A memzone is reserved by primary process and secondary processes attach to 3992e86c4e5SOphir Munk * the memzone. 4002e86c4e5SOphir Munk * 4012e86c4e5SOphir Munk * @return 4022e86c4e5SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 4032e86c4e5SOphir Munk */ 4042e86c4e5SOphir Munk static int 4052e86c4e5SOphir Munk mlx5_init_shared_data(void) 4062e86c4e5SOphir Munk { 4072e86c4e5SOphir Munk const struct rte_memzone *mz; 4082e86c4e5SOphir Munk int ret = 0; 4092e86c4e5SOphir Munk 4102e86c4e5SOphir Munk rte_spinlock_lock(&mlx5_shared_data_lock); 4112e86c4e5SOphir Munk if (mlx5_shared_data == NULL) { 4122e86c4e5SOphir Munk if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 4132e86c4e5SOphir Munk /* Allocate shared memory. */ 4142e86c4e5SOphir Munk mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 4152e86c4e5SOphir Munk sizeof(*mlx5_shared_data), 4162e86c4e5SOphir Munk SOCKET_ID_ANY, 0); 4172e86c4e5SOphir Munk if (mz == NULL) { 4182e86c4e5SOphir Munk DRV_LOG(ERR, 4192e86c4e5SOphir Munk "Cannot allocate mlx5 shared data"); 4202e86c4e5SOphir Munk ret = -rte_errno; 4212e86c4e5SOphir Munk goto error; 4222e86c4e5SOphir Munk } 4232e86c4e5SOphir Munk mlx5_shared_data = mz->addr; 4242e86c4e5SOphir Munk memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 4252e86c4e5SOphir Munk rte_spinlock_init(&mlx5_shared_data->lock); 4262e86c4e5SOphir Munk } else { 4272e86c4e5SOphir Munk /* Lookup allocated shared memory. */ 4282e86c4e5SOphir Munk mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 4292e86c4e5SOphir Munk if (mz == NULL) { 4302e86c4e5SOphir Munk DRV_LOG(ERR, 4312e86c4e5SOphir Munk "Cannot attach mlx5 shared data"); 4322e86c4e5SOphir Munk ret = -rte_errno; 4332e86c4e5SOphir Munk goto error; 4342e86c4e5SOphir Munk } 4352e86c4e5SOphir Munk mlx5_shared_data = mz->addr; 4362e86c4e5SOphir Munk memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 4372e86c4e5SOphir Munk } 4382e86c4e5SOphir Munk } 4392e86c4e5SOphir Munk error: 4402e86c4e5SOphir Munk rte_spinlock_unlock(&mlx5_shared_data_lock); 4412e86c4e5SOphir Munk return ret; 4422e86c4e5SOphir Munk } 4432e86c4e5SOphir Munk 4442e86c4e5SOphir Munk /** 4452e86c4e5SOphir Munk * PMD global initialization. 4462e86c4e5SOphir Munk * 4472e86c4e5SOphir Munk * Independent from individual device, this function initializes global 4482e86c4e5SOphir Munk * per-PMD data structures distinguishing primary and secondary processes. 4492e86c4e5SOphir Munk * Hence, each initialization is called once per a process. 4502e86c4e5SOphir Munk * 4512e86c4e5SOphir Munk * @return 4522e86c4e5SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 4532e86c4e5SOphir Munk */ 4542e86c4e5SOphir Munk static int 4552e86c4e5SOphir Munk mlx5_init_once(void) 4562e86c4e5SOphir Munk { 4572e86c4e5SOphir Munk struct mlx5_shared_data *sd; 4582e86c4e5SOphir Munk struct mlx5_local_data *ld = &mlx5_local_data; 4592e86c4e5SOphir Munk int ret = 0; 4602e86c4e5SOphir Munk 4612e86c4e5SOphir Munk if (mlx5_init_shared_data()) 4622e86c4e5SOphir Munk return -rte_errno; 4632e86c4e5SOphir Munk sd = mlx5_shared_data; 4642e86c4e5SOphir Munk MLX5_ASSERT(sd); 4652e86c4e5SOphir Munk rte_spinlock_lock(&sd->lock); 4662e86c4e5SOphir Munk switch (rte_eal_process_type()) { 4672e86c4e5SOphir Munk case RTE_PROC_PRIMARY: 4682e86c4e5SOphir Munk if (sd->init_done) 4692e86c4e5SOphir Munk break; 4702e86c4e5SOphir Munk LIST_INIT(&sd->mem_event_cb_list); 4712e86c4e5SOphir Munk rte_rwlock_init(&sd->mem_event_rwlock); 4722e86c4e5SOphir Munk rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", 4732e86c4e5SOphir Munk mlx5_mr_mem_event_cb, NULL); 4742e86c4e5SOphir Munk ret = mlx5_mp_init_primary(MLX5_MP_NAME, 4752e86c4e5SOphir Munk mlx5_mp_os_primary_handle); 4762e86c4e5SOphir Munk if (ret) 4772e86c4e5SOphir Munk goto out; 4782e86c4e5SOphir Munk sd->init_done = true; 4792e86c4e5SOphir Munk break; 4802e86c4e5SOphir Munk case RTE_PROC_SECONDARY: 4812e86c4e5SOphir Munk if (ld->init_done) 4822e86c4e5SOphir Munk break; 4832e86c4e5SOphir Munk ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 4842e86c4e5SOphir Munk mlx5_mp_os_secondary_handle); 4852e86c4e5SOphir Munk if (ret) 4862e86c4e5SOphir Munk goto out; 4872e86c4e5SOphir Munk ++sd->secondary_cnt; 4882e86c4e5SOphir Munk ld->init_done = true; 4892e86c4e5SOphir Munk break; 4902e86c4e5SOphir Munk default: 4912e86c4e5SOphir Munk break; 4922e86c4e5SOphir Munk } 4932e86c4e5SOphir Munk out: 4942e86c4e5SOphir Munk rte_spinlock_unlock(&sd->lock); 4952e86c4e5SOphir Munk return ret; 4962e86c4e5SOphir Munk } 4972e86c4e5SOphir Munk 4982e86c4e5SOphir Munk /** 4992eb4d010SOphir Munk * Spawn an Ethernet device from Verbs information. 5002eb4d010SOphir Munk * 5012eb4d010SOphir Munk * @param dpdk_dev 5022eb4d010SOphir Munk * Backing DPDK device. 5032eb4d010SOphir Munk * @param spawn 5042eb4d010SOphir Munk * Verbs device parameters (name, port, switch_info) to spawn. 5052eb4d010SOphir Munk * @param config 5062eb4d010SOphir Munk * Device configuration parameters. 5072eb4d010SOphir Munk * 5082eb4d010SOphir Munk * @return 5092eb4d010SOphir Munk * A valid Ethernet device object on success, NULL otherwise and rte_errno 5102eb4d010SOphir Munk * is set. The following errors are defined: 5112eb4d010SOphir Munk * 5122eb4d010SOphir Munk * EBUSY: device is not supposed to be spawned. 5132eb4d010SOphir Munk * EEXIST: device is already spawned 5142eb4d010SOphir Munk */ 5152eb4d010SOphir Munk static struct rte_eth_dev * 5162eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev, 5172eb4d010SOphir Munk struct mlx5_dev_spawn_data *spawn, 518d462a83cSMichael Baum struct mlx5_dev_config *config) 5192eb4d010SOphir Munk { 5202eb4d010SOphir Munk const struct mlx5_switch_info *switch_info = &spawn->info; 5212eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = NULL; 5222eb4d010SOphir Munk struct ibv_port_attr port_attr; 5232eb4d010SOphir Munk struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 5242eb4d010SOphir Munk struct rte_eth_dev *eth_dev = NULL; 5252eb4d010SOphir Munk struct mlx5_priv *priv = NULL; 5262eb4d010SOphir Munk int err = 0; 5272eb4d010SOphir Munk unsigned int hw_padding = 0; 5282eb4d010SOphir Munk unsigned int mps; 5292eb4d010SOphir Munk unsigned int cqe_comp; 5302eb4d010SOphir Munk unsigned int cqe_pad = 0; 5312eb4d010SOphir Munk unsigned int tunnel_en = 0; 5322eb4d010SOphir Munk unsigned int mpls_en = 0; 5332eb4d010SOphir Munk unsigned int swp = 0; 5342eb4d010SOphir Munk unsigned int mprq = 0; 5352eb4d010SOphir Munk unsigned int mprq_min_stride_size_n = 0; 5362eb4d010SOphir Munk unsigned int mprq_max_stride_size_n = 0; 5372eb4d010SOphir Munk unsigned int mprq_min_stride_num_n = 0; 5382eb4d010SOphir Munk unsigned int mprq_max_stride_num_n = 0; 5392eb4d010SOphir Munk struct rte_ether_addr mac; 5402eb4d010SOphir Munk char name[RTE_ETH_NAME_MAX_LEN]; 5412eb4d010SOphir Munk int own_domain_id = 0; 5422eb4d010SOphir Munk uint16_t port_id; 5432eb4d010SOphir Munk unsigned int i; 5442eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_DEVX_PORT 5452eb4d010SOphir Munk struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; 5462eb4d010SOphir Munk #endif 5472eb4d010SOphir Munk 5482eb4d010SOphir Munk /* Determine if this port representor is supposed to be spawned. */ 5492eb4d010SOphir Munk if (switch_info->representor && dpdk_dev->devargs) { 5502eb4d010SOphir Munk struct rte_eth_devargs eth_da; 5512eb4d010SOphir Munk 5522eb4d010SOphir Munk err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); 5532eb4d010SOphir Munk if (err) { 5542eb4d010SOphir Munk rte_errno = -err; 5552eb4d010SOphir Munk DRV_LOG(ERR, "failed to process device arguments: %s", 5562eb4d010SOphir Munk strerror(rte_errno)); 5572eb4d010SOphir Munk return NULL; 5582eb4d010SOphir Munk } 5592eb4d010SOphir Munk for (i = 0; i < eth_da.nb_representor_ports; ++i) 5602eb4d010SOphir Munk if (eth_da.representor_ports[i] == 5612eb4d010SOphir Munk (uint16_t)switch_info->port_name) 5622eb4d010SOphir Munk break; 5632eb4d010SOphir Munk if (i == eth_da.nb_representor_ports) { 5642eb4d010SOphir Munk rte_errno = EBUSY; 5652eb4d010SOphir Munk return NULL; 5662eb4d010SOphir Munk } 5672eb4d010SOphir Munk } 5682eb4d010SOphir Munk /* Build device name. */ 5692eb4d010SOphir Munk if (spawn->pf_bond < 0) { 5702eb4d010SOphir Munk /* Single device. */ 5712eb4d010SOphir Munk if (!switch_info->representor) 5722eb4d010SOphir Munk strlcpy(name, dpdk_dev->name, sizeof(name)); 5732eb4d010SOphir Munk else 5742eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_representor_%u", 5752eb4d010SOphir Munk dpdk_dev->name, switch_info->port_name); 5762eb4d010SOphir Munk } else { 5772eb4d010SOphir Munk /* Bonding device. */ 5782eb4d010SOphir Munk if (!switch_info->representor) 5792eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_%s", 580834a9019SOphir Munk dpdk_dev->name, 581834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 5822eb4d010SOphir Munk else 5832eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_%s_representor_%u", 584834a9019SOphir Munk dpdk_dev->name, 585834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev), 5862eb4d010SOphir Munk switch_info->port_name); 5872eb4d010SOphir Munk } 5882eb4d010SOphir Munk /* check if the device is already spawned */ 5892eb4d010SOphir Munk if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 5902eb4d010SOphir Munk rte_errno = EEXIST; 5912eb4d010SOphir Munk return NULL; 5922eb4d010SOphir Munk } 5932eb4d010SOphir Munk DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 5942eb4d010SOphir Munk if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 5952eb4d010SOphir Munk struct mlx5_mp_id mp_id; 5962eb4d010SOphir Munk 5972eb4d010SOphir Munk eth_dev = rte_eth_dev_attach_secondary(name); 5982eb4d010SOphir Munk if (eth_dev == NULL) { 5992eb4d010SOphir Munk DRV_LOG(ERR, "can not attach rte ethdev"); 6002eb4d010SOphir Munk rte_errno = ENOMEM; 6012eb4d010SOphir Munk return NULL; 6022eb4d010SOphir Munk } 6032eb4d010SOphir Munk eth_dev->device = dpdk_dev; 604042f5c94SOphir Munk eth_dev->dev_ops = &mlx5_os_dev_sec_ops; 6052eb4d010SOphir Munk err = mlx5_proc_priv_init(eth_dev); 6062eb4d010SOphir Munk if (err) 6072eb4d010SOphir Munk return NULL; 6082eb4d010SOphir Munk mp_id.port_id = eth_dev->data->port_id; 6092eb4d010SOphir Munk strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 6102eb4d010SOphir Munk /* Receive command fd from primary process */ 6112eb4d010SOphir Munk err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 6122eb4d010SOphir Munk if (err < 0) 6132eb4d010SOphir Munk goto err_secondary; 6142eb4d010SOphir Munk /* Remap UAR for Tx queues. */ 6152eb4d010SOphir Munk err = mlx5_tx_uar_init_secondary(eth_dev, err); 6162eb4d010SOphir Munk if (err) 6172eb4d010SOphir Munk goto err_secondary; 6182eb4d010SOphir Munk /* 6192eb4d010SOphir Munk * Ethdev pointer is still required as input since 6202eb4d010SOphir Munk * the primary device is not accessible from the 6212eb4d010SOphir Munk * secondary process. 6222eb4d010SOphir Munk */ 6232eb4d010SOphir Munk eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 6242eb4d010SOphir Munk eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 6252eb4d010SOphir Munk return eth_dev; 6262eb4d010SOphir Munk err_secondary: 6272eb4d010SOphir Munk mlx5_dev_close(eth_dev); 6282eb4d010SOphir Munk return NULL; 6292eb4d010SOphir Munk } 6302eb4d010SOphir Munk /* 6312eb4d010SOphir Munk * Some parameters ("tx_db_nc" in particularly) are needed in 6322eb4d010SOphir Munk * advance to create dv/verbs device context. We proceed the 6332eb4d010SOphir Munk * devargs here to get ones, and later proceed devargs again 6342eb4d010SOphir Munk * to override some hardware settings. 6352eb4d010SOphir Munk */ 636d462a83cSMichael Baum err = mlx5_args(config, dpdk_dev->devargs); 6372eb4d010SOphir Munk if (err) { 6382eb4d010SOphir Munk err = rte_errno; 6392eb4d010SOphir Munk DRV_LOG(ERR, "failed to process device arguments: %s", 6402eb4d010SOphir Munk strerror(rte_errno)); 6412eb4d010SOphir Munk goto error; 6422eb4d010SOphir Munk } 643d462a83cSMichael Baum mlx5_malloc_mem_select(config->sys_mem_en); 644d462a83cSMichael Baum sh = mlx5_alloc_shared_dev_ctx(spawn, config); 6452eb4d010SOphir Munk if (!sh) 6462eb4d010SOphir Munk return NULL; 647d462a83cSMichael Baum config->devx = sh->devx; 6482eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 649d462a83cSMichael Baum config->dest_tir = 1; 6502eb4d010SOphir Munk #endif 6512eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 6522eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 6532eb4d010SOphir Munk #endif 6542eb4d010SOphir Munk /* 6552eb4d010SOphir Munk * Multi-packet send is supported by ConnectX-4 Lx PF as well 6562eb4d010SOphir Munk * as all ConnectX-5 devices. 6572eb4d010SOphir Munk */ 6582eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 6592eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 6602eb4d010SOphir Munk #endif 6612eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 6622eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 6632eb4d010SOphir Munk #endif 6642eb4d010SOphir Munk mlx5_glue->dv_query_device(sh->ctx, &dv_attr); 6652eb4d010SOphir Munk if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 6662eb4d010SOphir Munk if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 6672eb4d010SOphir Munk DRV_LOG(DEBUG, "enhanced MPW is supported"); 6682eb4d010SOphir Munk mps = MLX5_MPW_ENHANCED; 6692eb4d010SOphir Munk } else { 6702eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW is supported"); 6712eb4d010SOphir Munk mps = MLX5_MPW; 6722eb4d010SOphir Munk } 6732eb4d010SOphir Munk } else { 6742eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW isn't supported"); 6752eb4d010SOphir Munk mps = MLX5_MPW_DISABLED; 6762eb4d010SOphir Munk } 6772eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 6782eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 6792eb4d010SOphir Munk swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; 6802eb4d010SOphir Munk DRV_LOG(DEBUG, "SWP support: %u", swp); 6812eb4d010SOphir Munk #endif 682d462a83cSMichael Baum config->swp = !!swp; 6832eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 6842eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 6852eb4d010SOphir Munk struct mlx5dv_striding_rq_caps mprq_caps = 6862eb4d010SOphir Munk dv_attr.striding_rq_caps; 6872eb4d010SOphir Munk 6882eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 6892eb4d010SOphir Munk mprq_caps.min_single_stride_log_num_of_bytes); 6902eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 6912eb4d010SOphir Munk mprq_caps.max_single_stride_log_num_of_bytes); 6922eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 6932eb4d010SOphir Munk mprq_caps.min_single_wqe_log_num_of_strides); 6942eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 6952eb4d010SOphir Munk mprq_caps.max_single_wqe_log_num_of_strides); 6962eb4d010SOphir Munk DRV_LOG(DEBUG, "\tsupported_qpts: %d", 6972eb4d010SOphir Munk mprq_caps.supported_qpts); 6982eb4d010SOphir Munk DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 6992eb4d010SOphir Munk mprq = 1; 7002eb4d010SOphir Munk mprq_min_stride_size_n = 7012eb4d010SOphir Munk mprq_caps.min_single_stride_log_num_of_bytes; 7022eb4d010SOphir Munk mprq_max_stride_size_n = 7032eb4d010SOphir Munk mprq_caps.max_single_stride_log_num_of_bytes; 7042eb4d010SOphir Munk mprq_min_stride_num_n = 7052eb4d010SOphir Munk mprq_caps.min_single_wqe_log_num_of_strides; 7062eb4d010SOphir Munk mprq_max_stride_num_n = 7072eb4d010SOphir Munk mprq_caps.max_single_wqe_log_num_of_strides; 7082eb4d010SOphir Munk } 7092eb4d010SOphir Munk #endif 7102eb4d010SOphir Munk if (RTE_CACHE_LINE_SIZE == 128 && 7112eb4d010SOphir Munk !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) 7122eb4d010SOphir Munk cqe_comp = 0; 7132eb4d010SOphir Munk else 7142eb4d010SOphir Munk cqe_comp = 1; 715d462a83cSMichael Baum config->cqe_comp = cqe_comp; 7162eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD 7172eb4d010SOphir Munk /* Whether device supports 128B Rx CQE padding. */ 7182eb4d010SOphir Munk cqe_pad = RTE_CACHE_LINE_SIZE == 128 && 7192eb4d010SOphir Munk (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); 7202eb4d010SOphir Munk #endif 7212eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 7222eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 7232eb4d010SOphir Munk tunnel_en = ((dv_attr.tunnel_offloads_caps & 7242eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && 7252eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 7262eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && 7272eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 7282eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); 7292eb4d010SOphir Munk } 7302eb4d010SOphir Munk DRV_LOG(DEBUG, "tunnel offloading is %ssupported", 7312eb4d010SOphir Munk tunnel_en ? "" : "not "); 7322eb4d010SOphir Munk #else 7332eb4d010SOphir Munk DRV_LOG(WARNING, 7342eb4d010SOphir Munk "tunnel offloading disabled due to old OFED/rdma-core version"); 7352eb4d010SOphir Munk #endif 736d462a83cSMichael Baum config->tunnel_en = tunnel_en; 7372eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 7382eb4d010SOphir Munk mpls_en = ((dv_attr.tunnel_offloads_caps & 7392eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 7402eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 7412eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 7422eb4d010SOphir Munk DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 7432eb4d010SOphir Munk mpls_en ? "" : "not "); 7442eb4d010SOphir Munk #else 7452eb4d010SOphir Munk DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 7462eb4d010SOphir Munk " old OFED/rdma-core version or firmware configuration"); 7472eb4d010SOphir Munk #endif 748d462a83cSMichael Baum config->mpls_en = mpls_en; 7492eb4d010SOphir Munk /* Check port status. */ 750834a9019SOphir Munk err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); 7512eb4d010SOphir Munk if (err) { 7522eb4d010SOphir Munk DRV_LOG(ERR, "port query failed: %s", strerror(err)); 7532eb4d010SOphir Munk goto error; 7542eb4d010SOphir Munk } 7552eb4d010SOphir Munk if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 7562eb4d010SOphir Munk DRV_LOG(ERR, "port is not configured in Ethernet mode"); 7572eb4d010SOphir Munk err = EINVAL; 7582eb4d010SOphir Munk goto error; 7592eb4d010SOphir Munk } 7602eb4d010SOphir Munk if (port_attr.state != IBV_PORT_ACTIVE) 7612eb4d010SOphir Munk DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", 7622eb4d010SOphir Munk mlx5_glue->port_state_str(port_attr.state), 7632eb4d010SOphir Munk port_attr.state); 7642eb4d010SOphir Munk /* Allocate private eth device data. */ 7652175c4dcSSuanming Mou priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 7662eb4d010SOphir Munk sizeof(*priv), 7672175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 7682eb4d010SOphir Munk if (priv == NULL) { 7692eb4d010SOphir Munk DRV_LOG(ERR, "priv allocation failure"); 7702eb4d010SOphir Munk err = ENOMEM; 7712eb4d010SOphir Munk goto error; 7722eb4d010SOphir Munk } 7732eb4d010SOphir Munk priv->sh = sh; 77491389890SOphir Munk priv->dev_port = spawn->phys_port; 7752eb4d010SOphir Munk priv->pci_dev = spawn->pci_dev; 7762eb4d010SOphir Munk priv->mtu = RTE_ETHER_MTU; 7772eb4d010SOphir Munk priv->mp_id.port_id = port_id; 7782eb4d010SOphir Munk strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 7792eb4d010SOphir Munk /* Some internal functions rely on Netlink sockets, open them now. */ 7802eb4d010SOphir Munk priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); 7812eb4d010SOphir Munk priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 7822eb4d010SOphir Munk priv->representor = !!switch_info->representor; 7832eb4d010SOphir Munk priv->master = !!switch_info->master; 7842eb4d010SOphir Munk priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 7852eb4d010SOphir Munk priv->vport_meta_tag = 0; 7862eb4d010SOphir Munk priv->vport_meta_mask = 0; 7872eb4d010SOphir Munk priv->pf_bond = spawn->pf_bond; 7882eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_DEVX_PORT 7892eb4d010SOphir Munk /* 7902eb4d010SOphir Munk * The DevX port query API is implemented. E-Switch may use 7912eb4d010SOphir Munk * either vport or reg_c[0] metadata register to match on 7922eb4d010SOphir Munk * vport index. The engaged part of metadata register is 7932eb4d010SOphir Munk * defined by mask. 7942eb4d010SOphir Munk */ 7952eb4d010SOphir Munk if (switch_info->representor || switch_info->master) { 7962eb4d010SOphir Munk devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | 7972eb4d010SOphir Munk MLX5DV_DEVX_PORT_MATCH_REG_C_0; 798834a9019SOphir Munk err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, 7992eb4d010SOphir Munk &devx_port); 8002eb4d010SOphir Munk if (err) { 8012eb4d010SOphir Munk DRV_LOG(WARNING, 8022eb4d010SOphir Munk "can't query devx port %d on device %s", 803834a9019SOphir Munk spawn->phys_port, 804834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 8052eb4d010SOphir Munk devx_port.comp_mask = 0; 8062eb4d010SOphir Munk } 8072eb4d010SOphir Munk } 8082eb4d010SOphir Munk if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { 8092eb4d010SOphir Munk priv->vport_meta_tag = devx_port.reg_c_0.value; 8102eb4d010SOphir Munk priv->vport_meta_mask = devx_port.reg_c_0.mask; 8112eb4d010SOphir Munk if (!priv->vport_meta_mask) { 8122eb4d010SOphir Munk DRV_LOG(ERR, "vport zero mask for port %d" 8132eb4d010SOphir Munk " on bonding device %s", 814834a9019SOphir Munk spawn->phys_port, 815834a9019SOphir Munk mlx5_os_get_dev_device_name 816834a9019SOphir Munk (spawn->phys_dev)); 8172eb4d010SOphir Munk err = ENOTSUP; 8182eb4d010SOphir Munk goto error; 8192eb4d010SOphir Munk } 8202eb4d010SOphir Munk if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 8212eb4d010SOphir Munk DRV_LOG(ERR, "invalid vport tag for port %d" 8222eb4d010SOphir Munk " on bonding device %s", 823834a9019SOphir Munk spawn->phys_port, 824834a9019SOphir Munk mlx5_os_get_dev_device_name 825834a9019SOphir Munk (spawn->phys_dev)); 8262eb4d010SOphir Munk err = ENOTSUP; 8272eb4d010SOphir Munk goto error; 8282eb4d010SOphir Munk } 8292eb4d010SOphir Munk } 8302eb4d010SOphir Munk if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { 8312eb4d010SOphir Munk priv->vport_id = devx_port.vport_num; 8322eb4d010SOphir Munk } else if (spawn->pf_bond >= 0) { 8332eb4d010SOphir Munk DRV_LOG(ERR, "can't deduce vport index for port %d" 8342eb4d010SOphir Munk " on bonding device %s", 835834a9019SOphir Munk spawn->phys_port, 836834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 8372eb4d010SOphir Munk err = ENOTSUP; 8382eb4d010SOphir Munk goto error; 8392eb4d010SOphir Munk } else { 8402eb4d010SOphir Munk /* Suppose vport index in compatible way. */ 8412eb4d010SOphir Munk priv->vport_id = switch_info->representor ? 8422eb4d010SOphir Munk switch_info->port_name + 1 : -1; 8432eb4d010SOphir Munk } 8442eb4d010SOphir Munk #else 8452eb4d010SOphir Munk /* 8462eb4d010SOphir Munk * Kernel/rdma_core support single E-Switch per PF configurations 8472eb4d010SOphir Munk * only and vport_id field contains the vport index for 8482eb4d010SOphir Munk * associated VF, which is deduced from representor port name. 8492eb4d010SOphir Munk * For example, let's have the IB device port 10, it has 8502eb4d010SOphir Munk * attached network device eth0, which has port name attribute 8512eb4d010SOphir Munk * pf0vf2, we can deduce the VF number as 2, and set vport index 8522eb4d010SOphir Munk * as 3 (2+1). This assigning schema should be changed if the 8532eb4d010SOphir Munk * multiple E-Switch instances per PF configurations or/and PCI 8542eb4d010SOphir Munk * subfunctions are added. 8552eb4d010SOphir Munk */ 8562eb4d010SOphir Munk priv->vport_id = switch_info->representor ? 8572eb4d010SOphir Munk switch_info->port_name + 1 : -1; 8582eb4d010SOphir Munk #endif 8592eb4d010SOphir Munk /* representor_id field keeps the unmodified VF index. */ 8602eb4d010SOphir Munk priv->representor_id = switch_info->representor ? 8612eb4d010SOphir Munk switch_info->port_name : -1; 8622eb4d010SOphir Munk /* 8632eb4d010SOphir Munk * Look for sibling devices in order to reuse their switch domain 8642eb4d010SOphir Munk * if any, otherwise allocate one. 8652eb4d010SOphir Munk */ 8662eb4d010SOphir Munk MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 8672eb4d010SOphir Munk const struct mlx5_priv *opriv = 8682eb4d010SOphir Munk rte_eth_devices[port_id].data->dev_private; 8692eb4d010SOphir Munk 8702eb4d010SOphir Munk if (!opriv || 8712eb4d010SOphir Munk opriv->sh != priv->sh || 8722eb4d010SOphir Munk opriv->domain_id == 8732eb4d010SOphir Munk RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 8742eb4d010SOphir Munk continue; 8752eb4d010SOphir Munk priv->domain_id = opriv->domain_id; 8762eb4d010SOphir Munk break; 8772eb4d010SOphir Munk } 8782eb4d010SOphir Munk if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 8792eb4d010SOphir Munk err = rte_eth_switch_domain_alloc(&priv->domain_id); 8802eb4d010SOphir Munk if (err) { 8812eb4d010SOphir Munk err = rte_errno; 8822eb4d010SOphir Munk DRV_LOG(ERR, "unable to allocate switch domain: %s", 8832eb4d010SOphir Munk strerror(rte_errno)); 8842eb4d010SOphir Munk goto error; 8852eb4d010SOphir Munk } 8862eb4d010SOphir Munk own_domain_id = 1; 8872eb4d010SOphir Munk } 8882eb4d010SOphir Munk /* Override some values set by hardware configuration. */ 889d462a83cSMichael Baum mlx5_args(config, dpdk_dev->devargs); 890d462a83cSMichael Baum err = mlx5_dev_check_sibling_config(priv, config); 8912eb4d010SOphir Munk if (err) 8922eb4d010SOphir Munk goto error; 893d462a83cSMichael Baum config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 8942eb4d010SOphir Munk IBV_DEVICE_RAW_IP_CSUM); 8952eb4d010SOphir Munk DRV_LOG(DEBUG, "checksum offloading is %ssupported", 896d462a83cSMichael Baum (config->hw_csum ? "" : "not ")); 8972eb4d010SOphir Munk #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 8982eb4d010SOphir Munk !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 8992eb4d010SOphir Munk DRV_LOG(DEBUG, "counters are not supported"); 9002eb4d010SOphir Munk #endif 9012eb4d010SOphir Munk #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 902d462a83cSMichael Baum if (config->dv_flow_en) { 9032eb4d010SOphir Munk DRV_LOG(WARNING, "DV flow is not supported"); 904d462a83cSMichael Baum config->dv_flow_en = 0; 9052eb4d010SOphir Munk } 9062eb4d010SOphir Munk #endif 907d462a83cSMichael Baum config->ind_table_max_size = 9082eb4d010SOphir Munk sh->device_attr.max_rwq_indirection_table_size; 9092eb4d010SOphir Munk /* 9102eb4d010SOphir Munk * Remove this check once DPDK supports larger/variable 9112eb4d010SOphir Munk * indirection tables. 9122eb4d010SOphir Munk */ 913d462a83cSMichael Baum if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 914d462a83cSMichael Baum config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; 9152eb4d010SOphir Munk DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 916d462a83cSMichael Baum config->ind_table_max_size); 917d462a83cSMichael Baum config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 9182eb4d010SOphir Munk IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 9192eb4d010SOphir Munk DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 920d462a83cSMichael Baum (config->hw_vlan_strip ? "" : "not ")); 921d462a83cSMichael Baum config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 9222eb4d010SOphir Munk IBV_RAW_PACKET_CAP_SCATTER_FCS); 9232eb4d010SOphir Munk #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 9242eb4d010SOphir Munk hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 9252eb4d010SOphir Munk #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 9262eb4d010SOphir Munk hw_padding = !!(sh->device_attr.device_cap_flags_ex & 9272eb4d010SOphir Munk IBV_DEVICE_PCI_WRITE_END_PADDING); 9282eb4d010SOphir Munk #endif 929d462a83cSMichael Baum if (config->hw_padding && !hw_padding) { 9302eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 931d462a83cSMichael Baum config->hw_padding = 0; 932d462a83cSMichael Baum } else if (config->hw_padding) { 9332eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 9342eb4d010SOphir Munk } 935d462a83cSMichael Baum config->tso = (sh->device_attr.max_tso > 0 && 9362eb4d010SOphir Munk (sh->device_attr.tso_supported_qpts & 9372eb4d010SOphir Munk (1 << IBV_QPT_RAW_PACKET))); 938d462a83cSMichael Baum if (config->tso) 939d462a83cSMichael Baum config->tso_max_payload_sz = sh->device_attr.max_tso; 9402eb4d010SOphir Munk /* 9412eb4d010SOphir Munk * MPW is disabled by default, while the Enhanced MPW is enabled 9422eb4d010SOphir Munk * by default. 9432eb4d010SOphir Munk */ 944d462a83cSMichael Baum if (config->mps == MLX5_ARG_UNSET) 945d462a83cSMichael Baum config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 9462eb4d010SOphir Munk MLX5_MPW_DISABLED; 9472eb4d010SOphir Munk else 948d462a83cSMichael Baum config->mps = config->mps ? mps : MLX5_MPW_DISABLED; 9492eb4d010SOphir Munk DRV_LOG(INFO, "%sMPS is %s", 950d462a83cSMichael Baum config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 951d462a83cSMichael Baum config->mps == MLX5_MPW ? "legacy " : "", 952d462a83cSMichael Baum config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 953d462a83cSMichael Baum if (config->cqe_comp && !cqe_comp) { 9542eb4d010SOphir Munk DRV_LOG(WARNING, "Rx CQE compression isn't supported"); 955d462a83cSMichael Baum config->cqe_comp = 0; 9562eb4d010SOphir Munk } 957d462a83cSMichael Baum if (config->cqe_pad && !cqe_pad) { 9582eb4d010SOphir Munk DRV_LOG(WARNING, "Rx CQE padding isn't supported"); 959d462a83cSMichael Baum config->cqe_pad = 0; 960d462a83cSMichael Baum } else if (config->cqe_pad) { 9612eb4d010SOphir Munk DRV_LOG(INFO, "Rx CQE padding is enabled"); 9622eb4d010SOphir Munk } 963d462a83cSMichael Baum if (config->devx) { 9642eb4d010SOphir Munk priv->counter_fallback = 0; 965d462a83cSMichael Baum err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); 9662eb4d010SOphir Munk if (err) { 9672eb4d010SOphir Munk err = -err; 9682eb4d010SOphir Munk goto error; 9692eb4d010SOphir Munk } 970d462a83cSMichael Baum if (!config->hca_attr.flow_counters_dump) 9712eb4d010SOphir Munk priv->counter_fallback = 1; 9722eb4d010SOphir Munk #ifndef HAVE_IBV_DEVX_ASYNC 9732eb4d010SOphir Munk priv->counter_fallback = 1; 9742eb4d010SOphir Munk #endif 9752eb4d010SOphir Munk if (priv->counter_fallback) 9762eb4d010SOphir Munk DRV_LOG(INFO, "Use fall-back DV counter management"); 9772eb4d010SOphir Munk /* Check for LRO support. */ 978d462a83cSMichael Baum if (config->dest_tir && config->hca_attr.lro_cap && 979d462a83cSMichael Baum config->dv_flow_en) { 9802eb4d010SOphir Munk /* TBD check tunnel lro caps. */ 981d462a83cSMichael Baum config->lro.supported = config->hca_attr.lro_cap; 9822eb4d010SOphir Munk DRV_LOG(DEBUG, "Device supports LRO"); 9832eb4d010SOphir Munk /* 9842eb4d010SOphir Munk * If LRO timeout is not configured by application, 9852eb4d010SOphir Munk * use the minimal supported value. 9862eb4d010SOphir Munk */ 987d462a83cSMichael Baum if (!config->lro.timeout) 988d462a83cSMichael Baum config->lro.timeout = 989d462a83cSMichael Baum config->hca_attr.lro_timer_supported_periods[0]; 9902eb4d010SOphir Munk DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 991d462a83cSMichael Baum config->lro.timeout); 9922eb4d010SOphir Munk } 9932eb4d010SOphir Munk #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) 994d462a83cSMichael Baum if (config->hca_attr.qos.sup && 995d462a83cSMichael Baum config->hca_attr.qos.srtcm_sup && 996d462a83cSMichael Baum config->dv_flow_en) { 9972eb4d010SOphir Munk uint8_t reg_c_mask = 998d462a83cSMichael Baum config->hca_attr.qos.flow_meter_reg_c_ids; 9992eb4d010SOphir Munk /* 10002eb4d010SOphir Munk * Meter needs two REG_C's for color match and pre-sfx 10012eb4d010SOphir Munk * flow match. Here get the REG_C for color match. 10022eb4d010SOphir Munk * REG_C_0 and REG_C_1 is reserved for metadata feature. 10032eb4d010SOphir Munk */ 10042eb4d010SOphir Munk reg_c_mask &= 0xfc; 10052eb4d010SOphir Munk if (__builtin_popcount(reg_c_mask) < 1) { 10062eb4d010SOphir Munk priv->mtr_en = 0; 10072eb4d010SOphir Munk DRV_LOG(WARNING, "No available register for" 10082eb4d010SOphir Munk " meter."); 10092eb4d010SOphir Munk } else { 10102eb4d010SOphir Munk priv->mtr_color_reg = ffs(reg_c_mask) - 1 + 10112eb4d010SOphir Munk REG_C_0; 10122eb4d010SOphir Munk priv->mtr_en = 1; 10132eb4d010SOphir Munk priv->mtr_reg_share = 1014d462a83cSMichael Baum config->hca_attr.qos.flow_meter_reg_share; 10152eb4d010SOphir Munk DRV_LOG(DEBUG, "The REG_C meter uses is %d", 10162eb4d010SOphir Munk priv->mtr_color_reg); 10172eb4d010SOphir Munk } 10182eb4d010SOphir Munk } 10192eb4d010SOphir Munk #endif 10202eb4d010SOphir Munk } 1021d462a83cSMichael Baum if (config->tx_pp) { 10228f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 1023d462a83cSMichael Baum config->hca_attr.dev_freq_khz); 10248f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Packet pacing is %ssupported", 1025d462a83cSMichael Baum config->hca_attr.qos.packet_pacing ? "" : "not "); 10268f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 1027d462a83cSMichael Baum config->hca_attr.cross_channel ? "" : "not "); 10288f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 1029d462a83cSMichael Baum config->hca_attr.wqe_index_ignore ? "" : "not "); 10308f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 1031d462a83cSMichael Baum config->hca_attr.non_wire_sq ? "" : "not "); 10328f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 1033d462a83cSMichael Baum config->hca_attr.log_max_static_sq_wq ? "" : "not ", 1034d462a83cSMichael Baum config->hca_attr.log_max_static_sq_wq); 10358f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 1036d462a83cSMichael Baum config->hca_attr.qos.wqe_rate_pp ? "" : "not "); 1037d462a83cSMichael Baum if (!config->devx) { 10388f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX is required for packet pacing"); 10398f848f32SViacheslav Ovsiienko err = ENODEV; 10408f848f32SViacheslav Ovsiienko goto error; 10418f848f32SViacheslav Ovsiienko } 1042d462a83cSMichael Baum if (!config->hca_attr.qos.packet_pacing) { 10438f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Packet pacing is not supported"); 10448f848f32SViacheslav Ovsiienko err = ENODEV; 10458f848f32SViacheslav Ovsiienko goto error; 10468f848f32SViacheslav Ovsiienko } 1047d462a83cSMichael Baum if (!config->hca_attr.cross_channel) { 10488f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Cross channel operations are" 10498f848f32SViacheslav Ovsiienko " required for packet pacing"); 10508f848f32SViacheslav Ovsiienko err = ENODEV; 10518f848f32SViacheslav Ovsiienko goto error; 10528f848f32SViacheslav Ovsiienko } 1053d462a83cSMichael Baum if (!config->hca_attr.wqe_index_ignore) { 10548f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE index ignore feature is" 10558f848f32SViacheslav Ovsiienko " required for packet pacing"); 10568f848f32SViacheslav Ovsiienko err = ENODEV; 10578f848f32SViacheslav Ovsiienko goto error; 10588f848f32SViacheslav Ovsiienko } 1059d462a83cSMichael Baum if (!config->hca_attr.non_wire_sq) { 10608f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Non-wire SQ feature is" 10618f848f32SViacheslav Ovsiienko " required for packet pacing"); 10628f848f32SViacheslav Ovsiienko err = ENODEV; 10638f848f32SViacheslav Ovsiienko goto error; 10648f848f32SViacheslav Ovsiienko } 1065d462a83cSMichael Baum if (!config->hca_attr.log_max_static_sq_wq) { 10668f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Static WQE SQ feature is" 10678f848f32SViacheslav Ovsiienko " required for packet pacing"); 10688f848f32SViacheslav Ovsiienko err = ENODEV; 10698f848f32SViacheslav Ovsiienko goto error; 10708f848f32SViacheslav Ovsiienko } 1071d462a83cSMichael Baum if (!config->hca_attr.qos.wqe_rate_pp) { 10728f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE rate mode is required" 10738f848f32SViacheslav Ovsiienko " for packet pacing"); 10748f848f32SViacheslav Ovsiienko err = ENODEV; 10758f848f32SViacheslav Ovsiienko goto error; 10768f848f32SViacheslav Ovsiienko } 10778f848f32SViacheslav Ovsiienko #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 10788f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX does not provide UAR offset," 10798f848f32SViacheslav Ovsiienko " can't create queues for packet pacing"); 10808f848f32SViacheslav Ovsiienko err = ENODEV; 10818f848f32SViacheslav Ovsiienko goto error; 10828f848f32SViacheslav Ovsiienko #endif 10838f848f32SViacheslav Ovsiienko } 1084d462a83cSMichael Baum if (config->devx) { 1085a2854c4dSViacheslav Ovsiienko uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 1086a2854c4dSViacheslav Ovsiienko 1087972a1bf8SViacheslav Ovsiienko err = config->hca_attr.access_register_user ? 1088972a1bf8SViacheslav Ovsiienko mlx5_devx_cmd_register_read 1089a2854c4dSViacheslav Ovsiienko (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 1090972a1bf8SViacheslav Ovsiienko reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; 1091a2854c4dSViacheslav Ovsiienko if (!err) { 1092a2854c4dSViacheslav Ovsiienko uint32_t ts_mode; 1093a2854c4dSViacheslav Ovsiienko 1094a2854c4dSViacheslav Ovsiienko /* MTUTC register is read successfully. */ 1095a2854c4dSViacheslav Ovsiienko ts_mode = MLX5_GET(register_mtutc, reg, 1096a2854c4dSViacheslav Ovsiienko time_stamp_mode); 1097a2854c4dSViacheslav Ovsiienko if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 1098d462a83cSMichael Baum config->rt_timestamp = 1; 1099a2854c4dSViacheslav Ovsiienko } else { 1100a2854c4dSViacheslav Ovsiienko /* Kernel does not support register reading. */ 1101d462a83cSMichael Baum if (config->hca_attr.dev_freq_khz == 1102a2854c4dSViacheslav Ovsiienko (NS_PER_S / MS_PER_S)) 1103d462a83cSMichael Baum config->rt_timestamp = 1; 1104a2854c4dSViacheslav Ovsiienko } 1105a2854c4dSViacheslav Ovsiienko } 110650f95b23SSuanming Mou /* 110750f95b23SSuanming Mou * If HW has bug working with tunnel packet decapsulation and 110850f95b23SSuanming Mou * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 110950f95b23SSuanming Mou * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 111050f95b23SSuanming Mou */ 1111d462a83cSMichael Baum if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en) 1112d462a83cSMichael Baum config->hw_fcs_strip = 0; 111350f95b23SSuanming Mou DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 1114d462a83cSMichael Baum (config->hw_fcs_strip ? "" : "not ")); 1115d462a83cSMichael Baum if (config->mprq.enabled && mprq) { 1116d462a83cSMichael Baum if (config->mprq.stride_num_n && 1117d462a83cSMichael Baum (config->mprq.stride_num_n > mprq_max_stride_num_n || 1118d462a83cSMichael Baum config->mprq.stride_num_n < mprq_min_stride_num_n)) { 1119d462a83cSMichael Baum config->mprq.stride_num_n = 11202eb4d010SOphir Munk RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, 11212eb4d010SOphir Munk mprq_min_stride_num_n), 11222eb4d010SOphir Munk mprq_max_stride_num_n); 11232eb4d010SOphir Munk DRV_LOG(WARNING, 11242eb4d010SOphir Munk "the number of strides" 11252eb4d010SOphir Munk " for Multi-Packet RQ is out of range," 11262eb4d010SOphir Munk " setting default value (%u)", 1127d462a83cSMichael Baum 1 << config->mprq.stride_num_n); 11282eb4d010SOphir Munk } 1129d462a83cSMichael Baum if (config->mprq.stride_size_n && 1130d462a83cSMichael Baum (config->mprq.stride_size_n > mprq_max_stride_size_n || 1131d462a83cSMichael Baum config->mprq.stride_size_n < mprq_min_stride_size_n)) { 1132d462a83cSMichael Baum config->mprq.stride_size_n = 11332eb4d010SOphir Munk RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, 11342eb4d010SOphir Munk mprq_min_stride_size_n), 11352eb4d010SOphir Munk mprq_max_stride_size_n); 11362eb4d010SOphir Munk DRV_LOG(WARNING, 11372eb4d010SOphir Munk "the size of a stride" 11382eb4d010SOphir Munk " for Multi-Packet RQ is out of range," 11392eb4d010SOphir Munk " setting default value (%u)", 1140d462a83cSMichael Baum 1 << config->mprq.stride_size_n); 11412eb4d010SOphir Munk } 1142d462a83cSMichael Baum config->mprq.min_stride_size_n = mprq_min_stride_size_n; 1143d462a83cSMichael Baum config->mprq.max_stride_size_n = mprq_max_stride_size_n; 1144d462a83cSMichael Baum } else if (config->mprq.enabled && !mprq) { 11452eb4d010SOphir Munk DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 1146d462a83cSMichael Baum config->mprq.enabled = 0; 11472eb4d010SOphir Munk } 1148d462a83cSMichael Baum if (config->max_dump_files_num == 0) 1149d462a83cSMichael Baum config->max_dump_files_num = 128; 11502eb4d010SOphir Munk eth_dev = rte_eth_dev_allocate(name); 11512eb4d010SOphir Munk if (eth_dev == NULL) { 11522eb4d010SOphir Munk DRV_LOG(ERR, "can not allocate rte ethdev"); 11532eb4d010SOphir Munk err = ENOMEM; 11542eb4d010SOphir Munk goto error; 11552eb4d010SOphir Munk } 11562eb4d010SOphir Munk /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */ 11572eb4d010SOphir Munk eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; 11582eb4d010SOphir Munk if (priv->representor) { 11592eb4d010SOphir Munk eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 11602eb4d010SOphir Munk eth_dev->data->representor_id = priv->representor_id; 11612eb4d010SOphir Munk } 11622eb4d010SOphir Munk /* 11632eb4d010SOphir Munk * Store associated network device interface index. This index 11642eb4d010SOphir Munk * is permanent throughout the lifetime of device. So, we may store 11652eb4d010SOphir Munk * the ifindex here and use the cached value further. 11662eb4d010SOphir Munk */ 11672eb4d010SOphir Munk MLX5_ASSERT(spawn->ifindex); 11682eb4d010SOphir Munk priv->if_index = spawn->ifindex; 11692eb4d010SOphir Munk eth_dev->data->dev_private = priv; 11702eb4d010SOphir Munk priv->dev_data = eth_dev->data; 11712eb4d010SOphir Munk eth_dev->data->mac_addrs = priv->mac; 11722eb4d010SOphir Munk eth_dev->device = dpdk_dev; 11732eb4d010SOphir Munk /* Configure the first MAC address by default. */ 11742eb4d010SOphir Munk if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 11752eb4d010SOphir Munk DRV_LOG(ERR, 11762eb4d010SOphir Munk "port %u cannot get MAC address, is mlx5_en" 11772eb4d010SOphir Munk " loaded? (errno: %s)", 11782eb4d010SOphir Munk eth_dev->data->port_id, strerror(rte_errno)); 11792eb4d010SOphir Munk err = ENODEV; 11802eb4d010SOphir Munk goto error; 11812eb4d010SOphir Munk } 11822eb4d010SOphir Munk DRV_LOG(INFO, 11832eb4d010SOphir Munk "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 11842eb4d010SOphir Munk eth_dev->data->port_id, 11852eb4d010SOphir Munk mac.addr_bytes[0], mac.addr_bytes[1], 11862eb4d010SOphir Munk mac.addr_bytes[2], mac.addr_bytes[3], 11872eb4d010SOphir Munk mac.addr_bytes[4], mac.addr_bytes[5]); 11882eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG 11892eb4d010SOphir Munk { 11902eb4d010SOphir Munk char ifname[IF_NAMESIZE]; 11912eb4d010SOphir Munk 11922eb4d010SOphir Munk if (mlx5_get_ifname(eth_dev, &ifname) == 0) 11932eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 11942eb4d010SOphir Munk eth_dev->data->port_id, ifname); 11952eb4d010SOphir Munk else 11962eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is unknown", 11972eb4d010SOphir Munk eth_dev->data->port_id); 11982eb4d010SOphir Munk } 11992eb4d010SOphir Munk #endif 12002eb4d010SOphir Munk /* Get actual MTU if possible. */ 12012eb4d010SOphir Munk err = mlx5_get_mtu(eth_dev, &priv->mtu); 12022eb4d010SOphir Munk if (err) { 12032eb4d010SOphir Munk err = rte_errno; 12042eb4d010SOphir Munk goto error; 12052eb4d010SOphir Munk } 12062eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 12072eb4d010SOphir Munk priv->mtu); 12082eb4d010SOphir Munk /* Initialize burst functions to prevent crashes before link-up. */ 12092eb4d010SOphir Munk eth_dev->rx_pkt_burst = removed_rx_burst; 12102eb4d010SOphir Munk eth_dev->tx_pkt_burst = removed_tx_burst; 1211042f5c94SOphir Munk eth_dev->dev_ops = &mlx5_os_dev_ops; 12122eb4d010SOphir Munk /* Register MAC address. */ 12132eb4d010SOphir Munk claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1214d462a83cSMichael Baum if (config->vf && config->vf_nl_en) 12152eb4d010SOphir Munk mlx5_nl_mac_addr_sync(priv->nl_socket_route, 12162eb4d010SOphir Munk mlx5_ifindex(eth_dev), 12172eb4d010SOphir Munk eth_dev->data->mac_addrs, 12182eb4d010SOphir Munk MLX5_MAX_MAC_ADDRESSES); 12192eb4d010SOphir Munk priv->flows = 0; 12202eb4d010SOphir Munk priv->ctrl_flows = 0; 12212eb4d010SOphir Munk TAILQ_INIT(&priv->flow_meters); 12222eb4d010SOphir Munk TAILQ_INIT(&priv->flow_meter_profiles); 12232eb4d010SOphir Munk /* Hint libmlx5 to use PMD allocator for data plane resources */ 122436dabceaSMichael Baum mlx5_glue->dv_set_context_attr(sh->ctx, 122536dabceaSMichael Baum MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 122636dabceaSMichael Baum (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 12272eb4d010SOphir Munk .alloc = &mlx5_alloc_verbs_buf, 12282eb4d010SOphir Munk .free = &mlx5_free_verbs_buf, 12292eb4d010SOphir Munk .data = priv, 123036dabceaSMichael Baum })); 12312eb4d010SOphir Munk /* Bring Ethernet device up. */ 12322eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 12332eb4d010SOphir Munk eth_dev->data->port_id); 12342eb4d010SOphir Munk mlx5_set_link_up(eth_dev); 12352eb4d010SOphir Munk /* 12362eb4d010SOphir Munk * Even though the interrupt handler is not installed yet, 12372eb4d010SOphir Munk * interrupts will still trigger on the async_fd from 12382eb4d010SOphir Munk * Verbs context returned by ibv_open_device(). 12392eb4d010SOphir Munk */ 12402eb4d010SOphir Munk mlx5_link_update(eth_dev, 0); 12412eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 1242d462a83cSMichael Baum if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && 12432eb4d010SOphir Munk (switch_info->representor || switch_info->master))) 1244d462a83cSMichael Baum config->dv_esw_en = 0; 12452eb4d010SOphir Munk #else 1246d462a83cSMichael Baum config->dv_esw_en = 0; 12472eb4d010SOphir Munk #endif 12482eb4d010SOphir Munk /* Detect minimal data bytes to inline. */ 1249d462a83cSMichael Baum mlx5_set_min_inline(spawn, config); 12502eb4d010SOphir Munk /* Store device configuration on private structure. */ 1251d462a83cSMichael Baum priv->config = *config; 12522eb4d010SOphir Munk /* Create context for virtual machine VLAN workaround. */ 12532eb4d010SOphir Munk priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1254d462a83cSMichael Baum if (config->dv_flow_en) { 12552eb4d010SOphir Munk err = mlx5_alloc_shared_dr(priv); 12562eb4d010SOphir Munk if (err) 12572eb4d010SOphir Munk goto error; 12582eb4d010SOphir Munk /* 12592eb4d010SOphir Munk * RSS id is shared with meter flow id. Meter flow id can only 12602eb4d010SOphir Munk * use the 24 MSB of the register. 12612eb4d010SOphir Munk */ 12622eb4d010SOphir Munk priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >> 12632eb4d010SOphir Munk MLX5_MTR_COLOR_BITS); 12642eb4d010SOphir Munk if (!priv->qrss_id_pool) { 12652eb4d010SOphir Munk DRV_LOG(ERR, "can't create flow id pool"); 12662eb4d010SOphir Munk err = ENOMEM; 12672eb4d010SOphir Munk goto error; 12682eb4d010SOphir Munk } 12692eb4d010SOphir Munk } 1270*5eaf882eSMichael Baum if (config->devx && config->dv_flow_en) { 1271*5eaf882eSMichael Baum priv->obj_ops = devx_obj_ops; 1272*5eaf882eSMichael Baum priv->obj_ops.hrxq_drop_new = ibv_obj_ops.hrxq_drop_new; 1273*5eaf882eSMichael Baum priv->obj_ops.hrxq_drop_release = ibv_obj_ops.hrxq_drop_release; 1274*5eaf882eSMichael Baum } else { 1275*5eaf882eSMichael Baum priv->obj_ops = ibv_obj_ops; 1276*5eaf882eSMichael Baum } 12772eb4d010SOphir Munk /* Supported Verbs flow priority number detection. */ 12782eb4d010SOphir Munk err = mlx5_flow_discover_priorities(eth_dev); 12792eb4d010SOphir Munk if (err < 0) { 12802eb4d010SOphir Munk err = -err; 12812eb4d010SOphir Munk goto error; 12822eb4d010SOphir Munk } 12832eb4d010SOphir Munk priv->config.flow_prio = err; 12842eb4d010SOphir Munk if (!priv->config.dv_esw_en && 12852eb4d010SOphir Munk priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 12862eb4d010SOphir Munk DRV_LOG(WARNING, "metadata mode %u is not supported " 12872eb4d010SOphir Munk "(no E-Switch)", priv->config.dv_xmeta_en); 12882eb4d010SOphir Munk priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 12892eb4d010SOphir Munk } 12902eb4d010SOphir Munk mlx5_set_metadata_mask(eth_dev); 12912eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 12922eb4d010SOphir Munk !priv->sh->dv_regc0_mask) { 12932eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 12942eb4d010SOphir Munk "(no metadata reg_c[0] is available)", 12952eb4d010SOphir Munk priv->config.dv_xmeta_en); 12962eb4d010SOphir Munk err = ENOTSUP; 12972eb4d010SOphir Munk goto error; 12982eb4d010SOphir Munk } 12992eb4d010SOphir Munk /* 13002eb4d010SOphir Munk * Allocate the buffer for flow creating, just once. 13012eb4d010SOphir Munk * The allocation must be done before any flow creating. 13022eb4d010SOphir Munk */ 13032eb4d010SOphir Munk mlx5_flow_alloc_intermediate(eth_dev); 13042eb4d010SOphir Munk /* Query availability of metadata reg_c's. */ 13052eb4d010SOphir Munk err = mlx5_flow_discover_mreg_c(eth_dev); 13062eb4d010SOphir Munk if (err < 0) { 13072eb4d010SOphir Munk err = -err; 13082eb4d010SOphir Munk goto error; 13092eb4d010SOphir Munk } 13102eb4d010SOphir Munk if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 13112eb4d010SOphir Munk DRV_LOG(DEBUG, 13122eb4d010SOphir Munk "port %u extensive metadata register is not supported", 13132eb4d010SOphir Munk eth_dev->data->port_id); 13142eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 13152eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 13162eb4d010SOphir Munk "(no metadata registers available)", 13172eb4d010SOphir Munk priv->config.dv_xmeta_en); 13182eb4d010SOphir Munk err = ENOTSUP; 13192eb4d010SOphir Munk goto error; 13202eb4d010SOphir Munk } 13212eb4d010SOphir Munk } 13222eb4d010SOphir Munk if (priv->config.dv_flow_en && 13232eb4d010SOphir Munk priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 13242eb4d010SOphir Munk mlx5_flow_ext_mreg_supported(eth_dev) && 13252eb4d010SOphir Munk priv->sh->dv_regc0_mask) { 13262eb4d010SOphir Munk priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 13272eb4d010SOphir Munk MLX5_FLOW_MREG_HTABLE_SZ); 13282eb4d010SOphir Munk if (!priv->mreg_cp_tbl) { 13292eb4d010SOphir Munk err = ENOMEM; 13302eb4d010SOphir Munk goto error; 13312eb4d010SOphir Munk } 13322eb4d010SOphir Munk } 13332eb4d010SOphir Munk return eth_dev; 13342eb4d010SOphir Munk error: 13352eb4d010SOphir Munk if (priv) { 13362eb4d010SOphir Munk if (priv->mreg_cp_tbl) 13372eb4d010SOphir Munk mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL); 13382eb4d010SOphir Munk if (priv->sh) 13392eb4d010SOphir Munk mlx5_os_free_shared_dr(priv); 13402eb4d010SOphir Munk if (priv->nl_socket_route >= 0) 13412eb4d010SOphir Munk close(priv->nl_socket_route); 13422eb4d010SOphir Munk if (priv->nl_socket_rdma >= 0) 13432eb4d010SOphir Munk close(priv->nl_socket_rdma); 13442eb4d010SOphir Munk if (priv->vmwa_context) 13452eb4d010SOphir Munk mlx5_vlan_vmwa_exit(priv->vmwa_context); 13462eb4d010SOphir Munk if (priv->qrss_id_pool) 13472eb4d010SOphir Munk mlx5_flow_id_pool_release(priv->qrss_id_pool); 13482eb4d010SOphir Munk if (own_domain_id) 13492eb4d010SOphir Munk claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 13502175c4dcSSuanming Mou mlx5_free(priv); 13512eb4d010SOphir Munk if (eth_dev != NULL) 13522eb4d010SOphir Munk eth_dev->data->dev_private = NULL; 13532eb4d010SOphir Munk } 13542eb4d010SOphir Munk if (eth_dev != NULL) { 13552eb4d010SOphir Munk /* mac_addrs must not be freed alone because part of 13562eb4d010SOphir Munk * dev_private 13572eb4d010SOphir Munk **/ 13582eb4d010SOphir Munk eth_dev->data->mac_addrs = NULL; 13592eb4d010SOphir Munk rte_eth_dev_release_port(eth_dev); 13602eb4d010SOphir Munk } 13612eb4d010SOphir Munk if (sh) 136291389890SOphir Munk mlx5_free_shared_dev_ctx(sh); 13632eb4d010SOphir Munk MLX5_ASSERT(err > 0); 13642eb4d010SOphir Munk rte_errno = err; 13652eb4d010SOphir Munk return NULL; 13662eb4d010SOphir Munk } 13672eb4d010SOphir Munk 13682eb4d010SOphir Munk /** 13692eb4d010SOphir Munk * Comparison callback to sort device data. 13702eb4d010SOphir Munk * 13712eb4d010SOphir Munk * This is meant to be used with qsort(). 13722eb4d010SOphir Munk * 13732eb4d010SOphir Munk * @param a[in] 13742eb4d010SOphir Munk * Pointer to pointer to first data object. 13752eb4d010SOphir Munk * @param b[in] 13762eb4d010SOphir Munk * Pointer to pointer to second data object. 13772eb4d010SOphir Munk * 13782eb4d010SOphir Munk * @return 13792eb4d010SOphir Munk * 0 if both objects are equal, less than 0 if the first argument is less 13802eb4d010SOphir Munk * than the second, greater than 0 otherwise. 13812eb4d010SOphir Munk */ 13822eb4d010SOphir Munk static int 13832eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b) 13842eb4d010SOphir Munk { 13852eb4d010SOphir Munk const struct mlx5_switch_info *si_a = 13862eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)a)->info; 13872eb4d010SOphir Munk const struct mlx5_switch_info *si_b = 13882eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)b)->info; 13892eb4d010SOphir Munk int ret; 13902eb4d010SOphir Munk 13912eb4d010SOphir Munk /* Master device first. */ 13922eb4d010SOphir Munk ret = si_b->master - si_a->master; 13932eb4d010SOphir Munk if (ret) 13942eb4d010SOphir Munk return ret; 13952eb4d010SOphir Munk /* Then representor devices. */ 13962eb4d010SOphir Munk ret = si_b->representor - si_a->representor; 13972eb4d010SOphir Munk if (ret) 13982eb4d010SOphir Munk return ret; 13992eb4d010SOphir Munk /* Unidentified devices come last in no specific order. */ 14002eb4d010SOphir Munk if (!si_a->representor) 14012eb4d010SOphir Munk return 0; 14022eb4d010SOphir Munk /* Order representors by name. */ 14032eb4d010SOphir Munk return si_a->port_name - si_b->port_name; 14042eb4d010SOphir Munk } 14052eb4d010SOphir Munk 14062eb4d010SOphir Munk /** 14072eb4d010SOphir Munk * Match PCI information for possible slaves of bonding device. 14082eb4d010SOphir Munk * 14092eb4d010SOphir Munk * @param[in] ibv_dev 14102eb4d010SOphir Munk * Pointer to Infiniband device structure. 14112eb4d010SOphir Munk * @param[in] pci_dev 14122eb4d010SOphir Munk * Pointer to PCI device structure to match PCI address. 14132eb4d010SOphir Munk * @param[in] nl_rdma 14142eb4d010SOphir Munk * Netlink RDMA group socket handle. 14152eb4d010SOphir Munk * 14162eb4d010SOphir Munk * @return 14172eb4d010SOphir Munk * negative value if no bonding device found, otherwise 14182eb4d010SOphir Munk * positive index of slave PF in bonding. 14192eb4d010SOphir Munk */ 14202eb4d010SOphir Munk static int 14212eb4d010SOphir Munk mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, 14222eb4d010SOphir Munk const struct rte_pci_device *pci_dev, 14232eb4d010SOphir Munk int nl_rdma) 14242eb4d010SOphir Munk { 14252eb4d010SOphir Munk char ifname[IF_NAMESIZE + 1]; 14262eb4d010SOphir Munk unsigned int ifindex; 14272eb4d010SOphir Munk unsigned int np, i; 14282eb4d010SOphir Munk FILE *file = NULL; 14292eb4d010SOphir Munk int pf = -1; 14302eb4d010SOphir Munk 14312eb4d010SOphir Munk /* 14322eb4d010SOphir Munk * Try to get master device name. If something goes 14332eb4d010SOphir Munk * wrong suppose the lack of kernel support and no 14342eb4d010SOphir Munk * bonding devices. 14352eb4d010SOphir Munk */ 14362eb4d010SOphir Munk if (nl_rdma < 0) 14372eb4d010SOphir Munk return -1; 14382eb4d010SOphir Munk if (!strstr(ibv_dev->name, "bond")) 14392eb4d010SOphir Munk return -1; 14402eb4d010SOphir Munk np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); 14412eb4d010SOphir Munk if (!np) 14422eb4d010SOphir Munk return -1; 14432eb4d010SOphir Munk /* 14442eb4d010SOphir Munk * The Master device might not be on the predefined 14452eb4d010SOphir Munk * port (not on port index 1, it is not garanted), 14462eb4d010SOphir Munk * we have to scan all Infiniband device port and 14472eb4d010SOphir Munk * find master. 14482eb4d010SOphir Munk */ 14492eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 14502eb4d010SOphir Munk /* Check whether Infiniband port is populated. */ 14512eb4d010SOphir Munk ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); 14522eb4d010SOphir Munk if (!ifindex) 14532eb4d010SOphir Munk continue; 14542eb4d010SOphir Munk if (!if_indextoname(ifindex, ifname)) 14552eb4d010SOphir Munk continue; 14562eb4d010SOphir Munk /* Try to read bonding slave names from sysfs. */ 14572eb4d010SOphir Munk MKSTR(slaves, 14582eb4d010SOphir Munk "/sys/class/net/%s/master/bonding/slaves", ifname); 14592eb4d010SOphir Munk file = fopen(slaves, "r"); 14602eb4d010SOphir Munk if (file) 14612eb4d010SOphir Munk break; 14622eb4d010SOphir Munk } 14632eb4d010SOphir Munk if (!file) 14642eb4d010SOphir Munk return -1; 14652eb4d010SOphir Munk /* Use safe format to check maximal buffer length. */ 14662eb4d010SOphir Munk MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 14672eb4d010SOphir Munk while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 14682eb4d010SOphir Munk char tmp_str[IF_NAMESIZE + 32]; 14692eb4d010SOphir Munk struct rte_pci_addr pci_addr; 14702eb4d010SOphir Munk struct mlx5_switch_info info; 14712eb4d010SOphir Munk 14722eb4d010SOphir Munk /* Process slave interface names in the loop. */ 14732eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 14742eb4d010SOphir Munk "/sys/class/net/%s", ifname); 14752eb4d010SOphir Munk if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { 14762eb4d010SOphir Munk DRV_LOG(WARNING, "can not get PCI address" 14772eb4d010SOphir Munk " for netdev \"%s\"", ifname); 14782eb4d010SOphir Munk continue; 14792eb4d010SOphir Munk } 14802eb4d010SOphir Munk if (pci_dev->addr.domain != pci_addr.domain || 14812eb4d010SOphir Munk pci_dev->addr.bus != pci_addr.bus || 14822eb4d010SOphir Munk pci_dev->addr.devid != pci_addr.devid || 14832eb4d010SOphir Munk pci_dev->addr.function != pci_addr.function) 14842eb4d010SOphir Munk continue; 14852eb4d010SOphir Munk /* Slave interface PCI address match found. */ 14862eb4d010SOphir Munk fclose(file); 14872eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 14882eb4d010SOphir Munk "/sys/class/net/%s/phys_port_name", ifname); 14892eb4d010SOphir Munk file = fopen(tmp_str, "rb"); 14902eb4d010SOphir Munk if (!file) 14912eb4d010SOphir Munk break; 14922eb4d010SOphir Munk info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 14932eb4d010SOphir Munk if (fscanf(file, "%32s", tmp_str) == 1) 14942eb4d010SOphir Munk mlx5_translate_port_name(tmp_str, &info); 14952eb4d010SOphir Munk if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || 14962eb4d010SOphir Munk info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 14972eb4d010SOphir Munk pf = info.port_name; 14982eb4d010SOphir Munk break; 14992eb4d010SOphir Munk } 15002eb4d010SOphir Munk if (file) 15012eb4d010SOphir Munk fclose(file); 15022eb4d010SOphir Munk return pf; 15032eb4d010SOphir Munk } 15042eb4d010SOphir Munk 15052eb4d010SOphir Munk /** 15062eb4d010SOphir Munk * DPDK callback to register a PCI device. 15072eb4d010SOphir Munk * 15082eb4d010SOphir Munk * This function spawns Ethernet devices out of a given PCI device. 15092eb4d010SOphir Munk * 15102eb4d010SOphir Munk * @param[in] pci_drv 15112eb4d010SOphir Munk * PCI driver structure (mlx5_driver). 15122eb4d010SOphir Munk * @param[in] pci_dev 15132eb4d010SOphir Munk * PCI device information. 15142eb4d010SOphir Munk * 15152eb4d010SOphir Munk * @return 15162eb4d010SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 15172eb4d010SOphir Munk */ 15182eb4d010SOphir Munk int 15192eb4d010SOphir Munk mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 15202eb4d010SOphir Munk struct rte_pci_device *pci_dev) 15212eb4d010SOphir Munk { 15222eb4d010SOphir Munk struct ibv_device **ibv_list; 15232eb4d010SOphir Munk /* 15242eb4d010SOphir Munk * Number of found IB Devices matching with requested PCI BDF. 15252eb4d010SOphir Munk * nd != 1 means there are multiple IB devices over the same 15262eb4d010SOphir Munk * PCI device and we have representors and master. 15272eb4d010SOphir Munk */ 15282eb4d010SOphir Munk unsigned int nd = 0; 15292eb4d010SOphir Munk /* 15302eb4d010SOphir Munk * Number of found IB device Ports. nd = 1 and np = 1..n means 15312eb4d010SOphir Munk * we have the single multiport IB device, and there may be 15322eb4d010SOphir Munk * representors attached to some of found ports. 15332eb4d010SOphir Munk */ 15342eb4d010SOphir Munk unsigned int np = 0; 15352eb4d010SOphir Munk /* 15362eb4d010SOphir Munk * Number of DPDK ethernet devices to Spawn - either over 15372eb4d010SOphir Munk * multiple IB devices or multiple ports of single IB device. 15382eb4d010SOphir Munk * Actually this is the number of iterations to spawn. 15392eb4d010SOphir Munk */ 15402eb4d010SOphir Munk unsigned int ns = 0; 15412eb4d010SOphir Munk /* 15422eb4d010SOphir Munk * Bonding device 15432eb4d010SOphir Munk * < 0 - no bonding device (single one) 15442eb4d010SOphir Munk * >= 0 - bonding device (value is slave PF index) 15452eb4d010SOphir Munk */ 15462eb4d010SOphir Munk int bd = -1; 15472eb4d010SOphir Munk struct mlx5_dev_spawn_data *list = NULL; 15482eb4d010SOphir Munk struct mlx5_dev_config dev_config; 1549d462a83cSMichael Baum unsigned int dev_config_vf; 15502eb4d010SOphir Munk int ret; 15512eb4d010SOphir Munk 15522eb4d010SOphir Munk if (rte_eal_process_type() == RTE_PROC_PRIMARY) 15532eb4d010SOphir Munk mlx5_pmd_socket_init(); 15542eb4d010SOphir Munk ret = mlx5_init_once(); 15552eb4d010SOphir Munk if (ret) { 15562eb4d010SOphir Munk DRV_LOG(ERR, "unable to init PMD global data: %s", 15572eb4d010SOphir Munk strerror(rte_errno)); 15582eb4d010SOphir Munk return -rte_errno; 15592eb4d010SOphir Munk } 15602eb4d010SOphir Munk errno = 0; 15612eb4d010SOphir Munk ibv_list = mlx5_glue->get_device_list(&ret); 15622eb4d010SOphir Munk if (!ibv_list) { 15632eb4d010SOphir Munk rte_errno = errno ? errno : ENOSYS; 15642eb4d010SOphir Munk DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 15652eb4d010SOphir Munk return -rte_errno; 15662eb4d010SOphir Munk } 15672eb4d010SOphir Munk /* 15682eb4d010SOphir Munk * First scan the list of all Infiniband devices to find 15692eb4d010SOphir Munk * matching ones, gathering into the list. 15702eb4d010SOphir Munk */ 15712eb4d010SOphir Munk struct ibv_device *ibv_match[ret + 1]; 15722eb4d010SOphir Munk int nl_route = mlx5_nl_init(NETLINK_ROUTE); 15732eb4d010SOphir Munk int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 15742eb4d010SOphir Munk unsigned int i; 15752eb4d010SOphir Munk 15762eb4d010SOphir Munk while (ret-- > 0) { 15772eb4d010SOphir Munk struct rte_pci_addr pci_addr; 15782eb4d010SOphir Munk 15792eb4d010SOphir Munk DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); 15802eb4d010SOphir Munk bd = mlx5_device_bond_pci_match 15812eb4d010SOphir Munk (ibv_list[ret], pci_dev, nl_rdma); 15822eb4d010SOphir Munk if (bd >= 0) { 15832eb4d010SOphir Munk /* 15842eb4d010SOphir Munk * Bonding device detected. Only one match is allowed, 15852eb4d010SOphir Munk * the bonding is supported over multi-port IB device, 15862eb4d010SOphir Munk * there should be no matches on representor PCI 15872eb4d010SOphir Munk * functions or non VF LAG bonding devices with 15882eb4d010SOphir Munk * specified address. 15892eb4d010SOphir Munk */ 15902eb4d010SOphir Munk if (nd) { 15912eb4d010SOphir Munk DRV_LOG(ERR, 15922eb4d010SOphir Munk "multiple PCI match on bonding device" 15932eb4d010SOphir Munk "\"%s\" found", ibv_list[ret]->name); 15942eb4d010SOphir Munk rte_errno = ENOENT; 15952eb4d010SOphir Munk ret = -rte_errno; 15962eb4d010SOphir Munk goto exit; 15972eb4d010SOphir Munk } 15982eb4d010SOphir Munk DRV_LOG(INFO, "PCI information matches for" 15992eb4d010SOphir Munk " slave %d bonding device \"%s\"", 16002eb4d010SOphir Munk bd, ibv_list[ret]->name); 16012eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 16022eb4d010SOphir Munk break; 16032eb4d010SOphir Munk } 16042eb4d010SOphir Munk if (mlx5_dev_to_pci_addr 16052eb4d010SOphir Munk (ibv_list[ret]->ibdev_path, &pci_addr)) 16062eb4d010SOphir Munk continue; 16072eb4d010SOphir Munk if (pci_dev->addr.domain != pci_addr.domain || 16082eb4d010SOphir Munk pci_dev->addr.bus != pci_addr.bus || 16092eb4d010SOphir Munk pci_dev->addr.devid != pci_addr.devid || 16102eb4d010SOphir Munk pci_dev->addr.function != pci_addr.function) 16112eb4d010SOphir Munk continue; 16122eb4d010SOphir Munk DRV_LOG(INFO, "PCI information matches for device \"%s\"", 16132eb4d010SOphir Munk ibv_list[ret]->name); 16142eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 16152eb4d010SOphir Munk } 16162eb4d010SOphir Munk ibv_match[nd] = NULL; 16172eb4d010SOphir Munk if (!nd) { 16182eb4d010SOphir Munk /* No device matches, just complain and bail out. */ 16192eb4d010SOphir Munk DRV_LOG(WARNING, 16202eb4d010SOphir Munk "no Verbs device matches PCI device " PCI_PRI_FMT "," 16212eb4d010SOphir Munk " are kernel drivers loaded?", 16222eb4d010SOphir Munk pci_dev->addr.domain, pci_dev->addr.bus, 16232eb4d010SOphir Munk pci_dev->addr.devid, pci_dev->addr.function); 16242eb4d010SOphir Munk rte_errno = ENOENT; 16252eb4d010SOphir Munk ret = -rte_errno; 16262eb4d010SOphir Munk goto exit; 16272eb4d010SOphir Munk } 16282eb4d010SOphir Munk if (nd == 1) { 16292eb4d010SOphir Munk /* 16302eb4d010SOphir Munk * Found single matching device may have multiple ports. 16312eb4d010SOphir Munk * Each port may be representor, we have to check the port 16322eb4d010SOphir Munk * number and check the representors existence. 16332eb4d010SOphir Munk */ 16342eb4d010SOphir Munk if (nl_rdma >= 0) 16352eb4d010SOphir Munk np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 16362eb4d010SOphir Munk if (!np) 16372eb4d010SOphir Munk DRV_LOG(WARNING, "can not get IB device \"%s\"" 16382eb4d010SOphir Munk " ports number", ibv_match[0]->name); 16392eb4d010SOphir Munk if (bd >= 0 && !np) { 16402eb4d010SOphir Munk DRV_LOG(ERR, "can not get ports" 16412eb4d010SOphir Munk " for bonding device"); 16422eb4d010SOphir Munk rte_errno = ENOENT; 16432eb4d010SOphir Munk ret = -rte_errno; 16442eb4d010SOphir Munk goto exit; 16452eb4d010SOphir Munk } 16462eb4d010SOphir Munk } 16472eb4d010SOphir Munk #ifndef HAVE_MLX5DV_DR_DEVX_PORT 16482eb4d010SOphir Munk if (bd >= 0) { 16492eb4d010SOphir Munk /* 16502eb4d010SOphir Munk * This may happen if there is VF LAG kernel support and 16512eb4d010SOphir Munk * application is compiled with older rdma_core library. 16522eb4d010SOphir Munk */ 16532eb4d010SOphir Munk DRV_LOG(ERR, 16542eb4d010SOphir Munk "No kernel/verbs support for VF LAG bonding found."); 16552eb4d010SOphir Munk rte_errno = ENOTSUP; 16562eb4d010SOphir Munk ret = -rte_errno; 16572eb4d010SOphir Munk goto exit; 16582eb4d010SOphir Munk } 16592eb4d010SOphir Munk #endif 16602eb4d010SOphir Munk /* 16612eb4d010SOphir Munk * Now we can determine the maximal 16622eb4d010SOphir Munk * amount of devices to be spawned. 16632eb4d010SOphir Munk */ 16642175c4dcSSuanming Mou list = mlx5_malloc(MLX5_MEM_ZERO, 16652eb4d010SOphir Munk sizeof(struct mlx5_dev_spawn_data) * 16662eb4d010SOphir Munk (np ? np : nd), 16672175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 16682eb4d010SOphir Munk if (!list) { 16692eb4d010SOphir Munk DRV_LOG(ERR, "spawn data array allocation failure"); 16702eb4d010SOphir Munk rte_errno = ENOMEM; 16712eb4d010SOphir Munk ret = -rte_errno; 16722eb4d010SOphir Munk goto exit; 16732eb4d010SOphir Munk } 16742eb4d010SOphir Munk if (bd >= 0 || np > 1) { 16752eb4d010SOphir Munk /* 16762eb4d010SOphir Munk * Single IB device with multiple ports found, 16772eb4d010SOphir Munk * it may be E-Switch master device and representors. 16782eb4d010SOphir Munk * We have to perform identification through the ports. 16792eb4d010SOphir Munk */ 16802eb4d010SOphir Munk MLX5_ASSERT(nl_rdma >= 0); 16812eb4d010SOphir Munk MLX5_ASSERT(ns == 0); 16822eb4d010SOphir Munk MLX5_ASSERT(nd == 1); 16832eb4d010SOphir Munk MLX5_ASSERT(np); 16842eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 16852eb4d010SOphir Munk list[ns].max_port = np; 1686834a9019SOphir Munk list[ns].phys_port = i; 1687834a9019SOphir Munk list[ns].phys_dev = ibv_match[0]; 16882eb4d010SOphir Munk list[ns].eth_dev = NULL; 16892eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 16902eb4d010SOphir Munk list[ns].pf_bond = bd; 16912eb4d010SOphir Munk list[ns].ifindex = mlx5_nl_ifindex 1692834a9019SOphir Munk (nl_rdma, 1693834a9019SOphir Munk mlx5_os_get_dev_device_name 1694834a9019SOphir Munk (list[ns].phys_dev), i); 16952eb4d010SOphir Munk if (!list[ns].ifindex) { 16962eb4d010SOphir Munk /* 16972eb4d010SOphir Munk * No network interface index found for the 16982eb4d010SOphir Munk * specified port, it means there is no 16992eb4d010SOphir Munk * representor on this port. It's OK, 17002eb4d010SOphir Munk * there can be disabled ports, for example 17012eb4d010SOphir Munk * if sriov_numvfs < sriov_totalvfs. 17022eb4d010SOphir Munk */ 17032eb4d010SOphir Munk continue; 17042eb4d010SOphir Munk } 17052eb4d010SOphir Munk ret = -1; 17062eb4d010SOphir Munk if (nl_route >= 0) 17072eb4d010SOphir Munk ret = mlx5_nl_switch_info 17082eb4d010SOphir Munk (nl_route, 17092eb4d010SOphir Munk list[ns].ifindex, 17102eb4d010SOphir Munk &list[ns].info); 17112eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 17122eb4d010SOphir Munk !list[ns].info.master)) { 17132eb4d010SOphir Munk /* 17142eb4d010SOphir Munk * We failed to recognize representors with 17152eb4d010SOphir Munk * Netlink, let's try to perform the task 17162eb4d010SOphir Munk * with sysfs. 17172eb4d010SOphir Munk */ 17182eb4d010SOphir Munk ret = mlx5_sysfs_switch_info 17192eb4d010SOphir Munk (list[ns].ifindex, 17202eb4d010SOphir Munk &list[ns].info); 17212eb4d010SOphir Munk } 17222eb4d010SOphir Munk if (!ret && bd >= 0) { 17232eb4d010SOphir Munk switch (list[ns].info.name_type) { 17242eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 17252eb4d010SOphir Munk if (list[ns].info.port_name == bd) 17262eb4d010SOphir Munk ns++; 17272eb4d010SOphir Munk break; 1728420bbdaeSViacheslav Ovsiienko case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1729420bbdaeSViacheslav Ovsiienko /* Fallthrough */ 17302eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 17312eb4d010SOphir Munk if (list[ns].info.pf_num == bd) 17322eb4d010SOphir Munk ns++; 17332eb4d010SOphir Munk break; 17342eb4d010SOphir Munk default: 17352eb4d010SOphir Munk break; 17362eb4d010SOphir Munk } 17372eb4d010SOphir Munk continue; 17382eb4d010SOphir Munk } 17392eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 17402eb4d010SOphir Munk list[ns].info.master)) 17412eb4d010SOphir Munk ns++; 17422eb4d010SOphir Munk } 17432eb4d010SOphir Munk if (!ns) { 17442eb4d010SOphir Munk DRV_LOG(ERR, 17452eb4d010SOphir Munk "unable to recognize master/representors" 17462eb4d010SOphir Munk " on the IB device with multiple ports"); 17472eb4d010SOphir Munk rte_errno = ENOENT; 17482eb4d010SOphir Munk ret = -rte_errno; 17492eb4d010SOphir Munk goto exit; 17502eb4d010SOphir Munk } 17512eb4d010SOphir Munk } else { 17522eb4d010SOphir Munk /* 17532eb4d010SOphir Munk * The existence of several matching entries (nd > 1) means 17542eb4d010SOphir Munk * port representors have been instantiated. No existing Verbs 17552eb4d010SOphir Munk * call nor sysfs entries can tell them apart, this can only 17562eb4d010SOphir Munk * be done through Netlink calls assuming kernel drivers are 17572eb4d010SOphir Munk * recent enough to support them. 17582eb4d010SOphir Munk * 17592eb4d010SOphir Munk * In the event of identification failure through Netlink, 17602eb4d010SOphir Munk * try again through sysfs, then: 17612eb4d010SOphir Munk * 17622eb4d010SOphir Munk * 1. A single IB device matches (nd == 1) with single 17632eb4d010SOphir Munk * port (np=0/1) and is not a representor, assume 17642eb4d010SOphir Munk * no switch support. 17652eb4d010SOphir Munk * 17662eb4d010SOphir Munk * 2. Otherwise no safe assumptions can be made; 17672eb4d010SOphir Munk * complain louder and bail out. 17682eb4d010SOphir Munk */ 17692eb4d010SOphir Munk for (i = 0; i != nd; ++i) { 17702eb4d010SOphir Munk memset(&list[ns].info, 0, sizeof(list[ns].info)); 17712eb4d010SOphir Munk list[ns].max_port = 1; 1772834a9019SOphir Munk list[ns].phys_port = 1; 1773834a9019SOphir Munk list[ns].phys_dev = ibv_match[i]; 17742eb4d010SOphir Munk list[ns].eth_dev = NULL; 17752eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 17762eb4d010SOphir Munk list[ns].pf_bond = -1; 17772eb4d010SOphir Munk list[ns].ifindex = 0; 17782eb4d010SOphir Munk if (nl_rdma >= 0) 17792eb4d010SOphir Munk list[ns].ifindex = mlx5_nl_ifindex 1780834a9019SOphir Munk (nl_rdma, 1781834a9019SOphir Munk mlx5_os_get_dev_device_name 1782834a9019SOphir Munk (list[ns].phys_dev), 1); 17832eb4d010SOphir Munk if (!list[ns].ifindex) { 17842eb4d010SOphir Munk char ifname[IF_NAMESIZE]; 17852eb4d010SOphir Munk 17862eb4d010SOphir Munk /* 17872eb4d010SOphir Munk * Netlink failed, it may happen with old 17882eb4d010SOphir Munk * ib_core kernel driver (before 4.16). 17892eb4d010SOphir Munk * We can assume there is old driver because 17902eb4d010SOphir Munk * here we are processing single ports IB 17912eb4d010SOphir Munk * devices. Let's try sysfs to retrieve 17922eb4d010SOphir Munk * the ifindex. The method works for 17932eb4d010SOphir Munk * master device only. 17942eb4d010SOphir Munk */ 17952eb4d010SOphir Munk if (nd > 1) { 17962eb4d010SOphir Munk /* 17972eb4d010SOphir Munk * Multiple devices found, assume 17982eb4d010SOphir Munk * representors, can not distinguish 17992eb4d010SOphir Munk * master/representor and retrieve 18002eb4d010SOphir Munk * ifindex via sysfs. 18012eb4d010SOphir Munk */ 18022eb4d010SOphir Munk continue; 18032eb4d010SOphir Munk } 1804aec086c9SMatan Azrad ret = mlx5_get_ifname_sysfs 1805aec086c9SMatan Azrad (ibv_match[i]->ibdev_path, ifname); 18062eb4d010SOphir Munk if (!ret) 18072eb4d010SOphir Munk list[ns].ifindex = 18082eb4d010SOphir Munk if_nametoindex(ifname); 18092eb4d010SOphir Munk if (!list[ns].ifindex) { 18102eb4d010SOphir Munk /* 18112eb4d010SOphir Munk * No network interface index found 18122eb4d010SOphir Munk * for the specified device, it means 18132eb4d010SOphir Munk * there it is neither representor 18142eb4d010SOphir Munk * nor master. 18152eb4d010SOphir Munk */ 18162eb4d010SOphir Munk continue; 18172eb4d010SOphir Munk } 18182eb4d010SOphir Munk } 18192eb4d010SOphir Munk ret = -1; 18202eb4d010SOphir Munk if (nl_route >= 0) 18212eb4d010SOphir Munk ret = mlx5_nl_switch_info 18222eb4d010SOphir Munk (nl_route, 18232eb4d010SOphir Munk list[ns].ifindex, 18242eb4d010SOphir Munk &list[ns].info); 18252eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 18262eb4d010SOphir Munk !list[ns].info.master)) { 18272eb4d010SOphir Munk /* 18282eb4d010SOphir Munk * We failed to recognize representors with 18292eb4d010SOphir Munk * Netlink, let's try to perform the task 18302eb4d010SOphir Munk * with sysfs. 18312eb4d010SOphir Munk */ 18322eb4d010SOphir Munk ret = mlx5_sysfs_switch_info 18332eb4d010SOphir Munk (list[ns].ifindex, 18342eb4d010SOphir Munk &list[ns].info); 18352eb4d010SOphir Munk } 18362eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 18372eb4d010SOphir Munk list[ns].info.master)) { 18382eb4d010SOphir Munk ns++; 18392eb4d010SOphir Munk } else if ((nd == 1) && 18402eb4d010SOphir Munk !list[ns].info.representor && 18412eb4d010SOphir Munk !list[ns].info.master) { 18422eb4d010SOphir Munk /* 18432eb4d010SOphir Munk * Single IB device with 18442eb4d010SOphir Munk * one physical port and 18452eb4d010SOphir Munk * attached network device. 18462eb4d010SOphir Munk * May be SRIOV is not enabled 18472eb4d010SOphir Munk * or there is no representors. 18482eb4d010SOphir Munk */ 18492eb4d010SOphir Munk DRV_LOG(INFO, "no E-Switch support detected"); 18502eb4d010SOphir Munk ns++; 18512eb4d010SOphir Munk break; 18522eb4d010SOphir Munk } 18532eb4d010SOphir Munk } 18542eb4d010SOphir Munk if (!ns) { 18552eb4d010SOphir Munk DRV_LOG(ERR, 18562eb4d010SOphir Munk "unable to recognize master/representors" 18572eb4d010SOphir Munk " on the multiple IB devices"); 18582eb4d010SOphir Munk rte_errno = ENOENT; 18592eb4d010SOphir Munk ret = -rte_errno; 18602eb4d010SOphir Munk goto exit; 18612eb4d010SOphir Munk } 18622eb4d010SOphir Munk } 18632eb4d010SOphir Munk MLX5_ASSERT(ns); 18642eb4d010SOphir Munk /* 18652eb4d010SOphir Munk * Sort list to probe devices in natural order for users convenience 18662eb4d010SOphir Munk * (i.e. master first, then representors from lowest to highest ID). 18672eb4d010SOphir Munk */ 18682eb4d010SOphir Munk qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 18692eb4d010SOphir Munk /* Device specific configuration. */ 18702eb4d010SOphir Munk switch (pci_dev->id.device_id) { 18712eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 18722eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 18732eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 18742eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 18752eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 18762eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 18772eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF: 1878d462a83cSMichael Baum dev_config_vf = 1; 18792eb4d010SOphir Munk break; 18802eb4d010SOphir Munk default: 1881d462a83cSMichael Baum dev_config_vf = 0; 18822eb4d010SOphir Munk break; 18832eb4d010SOphir Munk } 18842eb4d010SOphir Munk for (i = 0; i != ns; ++i) { 18852eb4d010SOphir Munk uint32_t restore; 18862eb4d010SOphir Munk 1887d462a83cSMichael Baum /* Default configuration. */ 1888d462a83cSMichael Baum memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); 1889d462a83cSMichael Baum dev_config.vf = dev_config_vf; 1890d462a83cSMichael Baum dev_config.mps = MLX5_ARG_UNSET; 1891d462a83cSMichael Baum dev_config.dbnc = MLX5_ARG_UNSET; 1892d462a83cSMichael Baum dev_config.rx_vec_en = 1; 1893d462a83cSMichael Baum dev_config.txq_inline_max = MLX5_ARG_UNSET; 1894d462a83cSMichael Baum dev_config.txq_inline_min = MLX5_ARG_UNSET; 1895d462a83cSMichael Baum dev_config.txq_inline_mpw = MLX5_ARG_UNSET; 1896d462a83cSMichael Baum dev_config.txqs_inline = MLX5_ARG_UNSET; 1897d462a83cSMichael Baum dev_config.vf_nl_en = 1; 1898d462a83cSMichael Baum dev_config.mr_ext_memseg_en = 1; 1899d462a83cSMichael Baum dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 1900d462a83cSMichael Baum dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 1901d462a83cSMichael Baum dev_config.dv_esw_en = 1; 1902d462a83cSMichael Baum dev_config.dv_flow_en = 1; 1903d462a83cSMichael Baum dev_config.decap_en = 1; 1904d462a83cSMichael Baum dev_config.log_hp_size = MLX5_ARG_UNSET; 19052eb4d010SOphir Munk list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, 19062eb4d010SOphir Munk &list[i], 1907d462a83cSMichael Baum &dev_config); 19082eb4d010SOphir Munk if (!list[i].eth_dev) { 19092eb4d010SOphir Munk if (rte_errno != EBUSY && rte_errno != EEXIST) 19102eb4d010SOphir Munk break; 19112eb4d010SOphir Munk /* Device is disabled or already spawned. Ignore it. */ 19122eb4d010SOphir Munk continue; 19132eb4d010SOphir Munk } 19142eb4d010SOphir Munk restore = list[i].eth_dev->data->dev_flags; 19152eb4d010SOphir Munk rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 19162eb4d010SOphir Munk /* Restore non-PCI flags cleared by the above call. */ 19172eb4d010SOphir Munk list[i].eth_dev->data->dev_flags |= restore; 19182eb4d010SOphir Munk rte_eth_dev_probing_finish(list[i].eth_dev); 19192eb4d010SOphir Munk } 19202eb4d010SOphir Munk if (i != ns) { 19212eb4d010SOphir Munk DRV_LOG(ERR, 19222eb4d010SOphir Munk "probe of PCI device " PCI_PRI_FMT " aborted after" 19232eb4d010SOphir Munk " encountering an error: %s", 19242eb4d010SOphir Munk pci_dev->addr.domain, pci_dev->addr.bus, 19252eb4d010SOphir Munk pci_dev->addr.devid, pci_dev->addr.function, 19262eb4d010SOphir Munk strerror(rte_errno)); 19272eb4d010SOphir Munk ret = -rte_errno; 19282eb4d010SOphir Munk /* Roll back. */ 19292eb4d010SOphir Munk while (i--) { 19302eb4d010SOphir Munk if (!list[i].eth_dev) 19312eb4d010SOphir Munk continue; 19322eb4d010SOphir Munk mlx5_dev_close(list[i].eth_dev); 19332eb4d010SOphir Munk /* mac_addrs must not be freed because in dev_private */ 19342eb4d010SOphir Munk list[i].eth_dev->data->mac_addrs = NULL; 19352eb4d010SOphir Munk claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 19362eb4d010SOphir Munk } 19372eb4d010SOphir Munk /* Restore original error. */ 19382eb4d010SOphir Munk rte_errno = -ret; 19392eb4d010SOphir Munk } else { 19402eb4d010SOphir Munk ret = 0; 19412eb4d010SOphir Munk } 19422eb4d010SOphir Munk exit: 19432eb4d010SOphir Munk /* 19442eb4d010SOphir Munk * Do the routine cleanup: 19452eb4d010SOphir Munk * - close opened Netlink sockets 19462eb4d010SOphir Munk * - free allocated spawn data array 19472eb4d010SOphir Munk * - free the Infiniband device list 19482eb4d010SOphir Munk */ 19492eb4d010SOphir Munk if (nl_rdma >= 0) 19502eb4d010SOphir Munk close(nl_rdma); 19512eb4d010SOphir Munk if (nl_route >= 0) 19522eb4d010SOphir Munk close(nl_route); 19532eb4d010SOphir Munk if (list) 19542175c4dcSSuanming Mou mlx5_free(list); 19552eb4d010SOphir Munk MLX5_ASSERT(ibv_list); 19562eb4d010SOphir Munk mlx5_glue->free_device_list(ibv_list); 19572eb4d010SOphir Munk return ret; 19582eb4d010SOphir Munk } 19592eb4d010SOphir Munk 19602eb4d010SOphir Munk static int 19612eb4d010SOphir Munk mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) 19622eb4d010SOphir Munk { 19632eb4d010SOphir Munk char *env; 19642eb4d010SOphir Munk int value; 19652eb4d010SOphir Munk 19662eb4d010SOphir Munk MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 19672eb4d010SOphir Munk /* Get environment variable to store. */ 19682eb4d010SOphir Munk env = getenv(MLX5_SHUT_UP_BF); 19692eb4d010SOphir Munk value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; 19702eb4d010SOphir Munk if (config->dbnc == MLX5_ARG_UNSET) 19712eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); 19722eb4d010SOphir Munk else 19732eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, 19742eb4d010SOphir Munk config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); 19752eb4d010SOphir Munk return value; 19762eb4d010SOphir Munk } 19772eb4d010SOphir Munk 19782eb4d010SOphir Munk static void 19792eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(int value) 19802eb4d010SOphir Munk { 19812eb4d010SOphir Munk MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 19822eb4d010SOphir Munk /* Restore the original environment variable state. */ 19832eb4d010SOphir Munk if (value == MLX5_ARG_UNSET) 19842eb4d010SOphir Munk unsetenv(MLX5_SHUT_UP_BF); 19852eb4d010SOphir Munk else 19862eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); 19872eb4d010SOphir Munk } 19882eb4d010SOphir Munk 19892eb4d010SOphir Munk /** 19902eb4d010SOphir Munk * Extract pdn of PD object using DV API. 19912eb4d010SOphir Munk * 19922eb4d010SOphir Munk * @param[in] pd 19932eb4d010SOphir Munk * Pointer to the verbs PD object. 19942eb4d010SOphir Munk * @param[out] pdn 19952eb4d010SOphir Munk * Pointer to the PD object number variable. 19962eb4d010SOphir Munk * 19972eb4d010SOphir Munk * @return 19982eb4d010SOphir Munk * 0 on success, error value otherwise. 19992eb4d010SOphir Munk */ 20002eb4d010SOphir Munk int 20012eb4d010SOphir Munk mlx5_os_get_pdn(void *pd, uint32_t *pdn) 20022eb4d010SOphir Munk { 20032eb4d010SOphir Munk #ifdef HAVE_IBV_FLOW_DV_SUPPORT 20042eb4d010SOphir Munk struct mlx5dv_obj obj; 20052eb4d010SOphir Munk struct mlx5dv_pd pd_info; 20062eb4d010SOphir Munk int ret = 0; 20072eb4d010SOphir Munk 20082eb4d010SOphir Munk obj.pd.in = pd; 20092eb4d010SOphir Munk obj.pd.out = &pd_info; 20102eb4d010SOphir Munk ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 20112eb4d010SOphir Munk if (ret) { 20122eb4d010SOphir Munk DRV_LOG(DEBUG, "Fail to get PD object info"); 20132eb4d010SOphir Munk return ret; 20142eb4d010SOphir Munk } 20152eb4d010SOphir Munk *pdn = pd_info.pdn; 20162eb4d010SOphir Munk return 0; 20172eb4d010SOphir Munk #else 20182eb4d010SOphir Munk (void)pd; 20192eb4d010SOphir Munk (void)pdn; 20202eb4d010SOphir Munk return -ENOTSUP; 20212eb4d010SOphir Munk #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 20222eb4d010SOphir Munk } 20232eb4d010SOphir Munk 20242eb4d010SOphir Munk /** 20252eb4d010SOphir Munk * Function API to open IB device. 20262eb4d010SOphir Munk * 20272eb4d010SOphir Munk * This function calls the Linux glue APIs to open a device. 20282eb4d010SOphir Munk * 20292eb4d010SOphir Munk * @param[in] spawn 20302eb4d010SOphir Munk * Pointer to the IB device attributes (name, port, etc). 20312eb4d010SOphir Munk * @param[out] config 20322eb4d010SOphir Munk * Pointer to device configuration structure. 20332eb4d010SOphir Munk * @param[out] sh 20342eb4d010SOphir Munk * Pointer to shared context structure. 20352eb4d010SOphir Munk * 20362eb4d010SOphir Munk * @return 20372eb4d010SOphir Munk * 0 on success, a positive error value otherwise. 20382eb4d010SOphir Munk */ 20392eb4d010SOphir Munk int 20402eb4d010SOphir Munk mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 20412eb4d010SOphir Munk const struct mlx5_dev_config *config, 20422eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh) 20432eb4d010SOphir Munk { 20442eb4d010SOphir Munk int dbmap_env; 20452eb4d010SOphir Munk int err = 0; 2046d133f4cdSViacheslav Ovsiienko 2047d133f4cdSViacheslav Ovsiienko sh->numa_node = spawn->pci_dev->device.numa_node; 2048d133f4cdSViacheslav Ovsiienko pthread_mutex_init(&sh->txpp.mutex, NULL); 20492eb4d010SOphir Munk /* 20502eb4d010SOphir Munk * Configure environment variable "MLX5_BF_SHUT_UP" 20512eb4d010SOphir Munk * before the device creation. The rdma_core library 20522eb4d010SOphir Munk * checks the variable at device creation and 20532eb4d010SOphir Munk * stores the result internally. 20542eb4d010SOphir Munk */ 20552eb4d010SOphir Munk dbmap_env = mlx5_config_doorbell_mapping_env(config); 20562eb4d010SOphir Munk /* Try to open IB device with DV first, then usual Verbs. */ 20572eb4d010SOphir Munk errno = 0; 2058834a9019SOphir Munk sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); 20592eb4d010SOphir Munk if (sh->ctx) { 20602eb4d010SOphir Munk sh->devx = 1; 20612eb4d010SOphir Munk DRV_LOG(DEBUG, "DevX is supported"); 20622eb4d010SOphir Munk /* The device is created, no need for environment. */ 20632eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(dbmap_env); 20642eb4d010SOphir Munk } else { 20652eb4d010SOphir Munk /* The environment variable is still configured. */ 2066834a9019SOphir Munk sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 20672eb4d010SOphir Munk err = errno ? errno : ENODEV; 20682eb4d010SOphir Munk /* 20692eb4d010SOphir Munk * The environment variable is not needed anymore, 20702eb4d010SOphir Munk * all device creation attempts are completed. 20712eb4d010SOphir Munk */ 20722eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(dbmap_env); 20732eb4d010SOphir Munk if (!sh->ctx) 20742eb4d010SOphir Munk return err; 20752eb4d010SOphir Munk DRV_LOG(DEBUG, "DevX is NOT supported"); 20762eb4d010SOphir Munk err = 0; 20772eb4d010SOphir Munk } 20782eb4d010SOphir Munk return err; 20792eb4d010SOphir Munk } 20802eb4d010SOphir Munk 20812eb4d010SOphir Munk /** 20822eb4d010SOphir Munk * Install shared asynchronous device events handler. 20832eb4d010SOphir Munk * This function is implemented to support event sharing 20842eb4d010SOphir Munk * between multiple ports of single IB device. 20852eb4d010SOphir Munk * 20862eb4d010SOphir Munk * @param sh 20872eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 20882eb4d010SOphir Munk */ 20892eb4d010SOphir Munk void 20902eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 20912eb4d010SOphir Munk { 20922eb4d010SOphir Munk int ret; 20932eb4d010SOphir Munk int flags; 20942eb4d010SOphir Munk 20952eb4d010SOphir Munk sh->intr_handle.fd = -1; 20962eb4d010SOphir Munk flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); 20972eb4d010SOphir Munk ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, 20982eb4d010SOphir Munk F_SETFL, flags | O_NONBLOCK); 20992eb4d010SOphir Munk if (ret) { 21002eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor async event" 21012eb4d010SOphir Munk " queue"); 21022eb4d010SOphir Munk } else { 21032eb4d010SOphir Munk sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; 21042eb4d010SOphir Munk sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 21052eb4d010SOphir Munk if (rte_intr_callback_register(&sh->intr_handle, 21062eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh)) { 21072eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the shared interrupt."); 21082eb4d010SOphir Munk sh->intr_handle.fd = -1; 21092eb4d010SOphir Munk } 21102eb4d010SOphir Munk } 21112eb4d010SOphir Munk if (sh->devx) { 21122eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 21132eb4d010SOphir Munk sh->intr_handle_devx.fd = -1; 211421b7c452SOphir Munk sh->devx_comp = 211521b7c452SOphir Munk (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); 211621b7c452SOphir Munk struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 211721b7c452SOphir Munk if (!devx_comp) { 21182eb4d010SOphir Munk DRV_LOG(INFO, "failed to allocate devx_comp."); 21192eb4d010SOphir Munk return; 21202eb4d010SOphir Munk } 212121b7c452SOphir Munk flags = fcntl(devx_comp->fd, F_GETFL); 212221b7c452SOphir Munk ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 21232eb4d010SOphir Munk if (ret) { 21242eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor" 21252eb4d010SOphir Munk " devx comp"); 21262eb4d010SOphir Munk return; 21272eb4d010SOphir Munk } 212821b7c452SOphir Munk sh->intr_handle_devx.fd = devx_comp->fd; 21292eb4d010SOphir Munk sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 21302eb4d010SOphir Munk if (rte_intr_callback_register(&sh->intr_handle_devx, 21312eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh)) { 21322eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the devx shared" 21332eb4d010SOphir Munk " interrupt."); 21342eb4d010SOphir Munk sh->intr_handle_devx.fd = -1; 21352eb4d010SOphir Munk } 21362eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */ 21372eb4d010SOphir Munk } 21382eb4d010SOphir Munk } 21392eb4d010SOphir Munk 21402eb4d010SOphir Munk /** 21412eb4d010SOphir Munk * Uninstall shared asynchronous device events handler. 21422eb4d010SOphir Munk * This function is implemented to support event sharing 21432eb4d010SOphir Munk * between multiple ports of single IB device. 21442eb4d010SOphir Munk * 21452eb4d010SOphir Munk * @param dev 21462eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 21472eb4d010SOphir Munk */ 21482eb4d010SOphir Munk void 21492eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 21502eb4d010SOphir Munk { 21512eb4d010SOphir Munk if (sh->intr_handle.fd >= 0) 21522eb4d010SOphir Munk mlx5_intr_callback_unregister(&sh->intr_handle, 21532eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh); 21542eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 21552eb4d010SOphir Munk if (sh->intr_handle_devx.fd >= 0) 21562eb4d010SOphir Munk rte_intr_callback_unregister(&sh->intr_handle_devx, 21572eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh); 21582eb4d010SOphir Munk if (sh->devx_comp) 21592eb4d010SOphir Munk mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 21602eb4d010SOphir Munk #endif 21612eb4d010SOphir Munk } 2162042f5c94SOphir Munk 216373bf9235SOphir Munk /** 216473bf9235SOphir Munk * Read statistics by a named counter. 216573bf9235SOphir Munk * 216673bf9235SOphir Munk * @param[in] priv 216773bf9235SOphir Munk * Pointer to the private device data structure. 216873bf9235SOphir Munk * @param[in] ctr_name 216973bf9235SOphir Munk * Pointer to the name of the statistic counter to read 217073bf9235SOphir Munk * @param[out] stat 217173bf9235SOphir Munk * Pointer to read statistic value. 217273bf9235SOphir Munk * @return 217373bf9235SOphir Munk * 0 on success and stat is valud, 1 if failed to read the value 217473bf9235SOphir Munk * rte_errno is set. 217573bf9235SOphir Munk * 217673bf9235SOphir Munk */ 217773bf9235SOphir Munk int 217873bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 217973bf9235SOphir Munk uint64_t *stat) 218073bf9235SOphir Munk { 218173bf9235SOphir Munk int fd; 218273bf9235SOphir Munk 218373bf9235SOphir Munk if (priv->sh) { 218473bf9235SOphir Munk MKSTR(path, "%s/ports/%d/hw_counters/%s", 218573bf9235SOphir Munk priv->sh->ibdev_path, 218673bf9235SOphir Munk priv->dev_port, 218773bf9235SOphir Munk ctr_name); 218873bf9235SOphir Munk fd = open(path, O_RDONLY); 2189038e7fc0SShy Shyman /* 2190038e7fc0SShy Shyman * in switchdev the file location is not per port 2191038e7fc0SShy Shyman * but rather in <ibdev_path>/hw_counters/<file_name>. 2192038e7fc0SShy Shyman */ 2193038e7fc0SShy Shyman if (fd == -1) { 2194038e7fc0SShy Shyman MKSTR(path1, "%s/hw_counters/%s", 2195038e7fc0SShy Shyman priv->sh->ibdev_path, 2196038e7fc0SShy Shyman ctr_name); 2197038e7fc0SShy Shyman fd = open(path1, O_RDONLY); 2198038e7fc0SShy Shyman } 219973bf9235SOphir Munk if (fd != -1) { 220073bf9235SOphir Munk char buf[21] = {'\0'}; 220173bf9235SOphir Munk ssize_t n = read(fd, buf, sizeof(buf)); 220273bf9235SOphir Munk 220373bf9235SOphir Munk close(fd); 220473bf9235SOphir Munk if (n != -1) { 220573bf9235SOphir Munk *stat = strtoull(buf, NULL, 10); 220673bf9235SOphir Munk return 0; 220773bf9235SOphir Munk } 220873bf9235SOphir Munk } 220973bf9235SOphir Munk } 221073bf9235SOphir Munk *stat = 0; 221173bf9235SOphir Munk return 1; 221273bf9235SOphir Munk } 221373bf9235SOphir Munk 221473bf9235SOphir Munk /** 2215d5ed8aa9SOphir Munk * Set the reg_mr and dereg_mr call backs 2216d5ed8aa9SOphir Munk * 2217d5ed8aa9SOphir Munk * @param reg_mr_cb[out] 2218d5ed8aa9SOphir Munk * Pointer to reg_mr func 2219d5ed8aa9SOphir Munk * @param dereg_mr_cb[out] 2220d5ed8aa9SOphir Munk * Pointer to dereg_mr func 2221d5ed8aa9SOphir Munk * 2222d5ed8aa9SOphir Munk */ 2223d5ed8aa9SOphir Munk void 2224d5ed8aa9SOphir Munk mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 2225d5ed8aa9SOphir Munk mlx5_dereg_mr_t *dereg_mr_cb) 2226d5ed8aa9SOphir Munk { 22274f96d913SOphir Munk *reg_mr_cb = mlx5_verbs_ops.reg_mr; 22284f96d913SOphir Munk *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; 2229d5ed8aa9SOphir Munk } 2230d5ed8aa9SOphir Munk 2231ab27cdd9SOphir Munk /** 2232ab27cdd9SOphir Munk * Remove a MAC address from device 2233ab27cdd9SOphir Munk * 2234ab27cdd9SOphir Munk * @param dev 2235ab27cdd9SOphir Munk * Pointer to Ethernet device structure. 2236ab27cdd9SOphir Munk * @param index 2237ab27cdd9SOphir Munk * MAC address index. 2238ab27cdd9SOphir Munk */ 2239ab27cdd9SOphir Munk void 2240ab27cdd9SOphir Munk mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2241ab27cdd9SOphir Munk { 2242ab27cdd9SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2243ab27cdd9SOphir Munk const int vf = priv->config.vf; 2244ab27cdd9SOphir Munk 2245ab27cdd9SOphir Munk if (vf) 2246ab27cdd9SOphir Munk mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2247ab27cdd9SOphir Munk mlx5_ifindex(dev), priv->mac_own, 2248ab27cdd9SOphir Munk &dev->data->mac_addrs[index], index); 2249ab27cdd9SOphir Munk } 2250ab27cdd9SOphir Munk 2251ab27cdd9SOphir Munk /** 2252ab27cdd9SOphir Munk * Adds a MAC address to the device 2253ab27cdd9SOphir Munk * 2254ab27cdd9SOphir Munk * @param dev 2255ab27cdd9SOphir Munk * Pointer to Ethernet device structure. 2256ab27cdd9SOphir Munk * @param mac_addr 2257ab27cdd9SOphir Munk * MAC address to register. 2258ab27cdd9SOphir Munk * @param index 2259ab27cdd9SOphir Munk * MAC address index. 2260ab27cdd9SOphir Munk * 2261ab27cdd9SOphir Munk * @return 2262ab27cdd9SOphir Munk * 0 on success, a negative errno value otherwise 2263ab27cdd9SOphir Munk */ 2264ab27cdd9SOphir Munk int 2265ab27cdd9SOphir Munk mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2266ab27cdd9SOphir Munk uint32_t index) 2267ab27cdd9SOphir Munk { 2268ab27cdd9SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2269ab27cdd9SOphir Munk const int vf = priv->config.vf; 2270ab27cdd9SOphir Munk int ret = 0; 2271ab27cdd9SOphir Munk 2272ab27cdd9SOphir Munk if (vf) 2273ab27cdd9SOphir Munk ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2274ab27cdd9SOphir Munk mlx5_ifindex(dev), priv->mac_own, 2275ab27cdd9SOphir Munk mac, index); 2276ab27cdd9SOphir Munk return ret; 2277ab27cdd9SOphir Munk } 2278ab27cdd9SOphir Munk 2279ab27cdd9SOphir Munk /** 2280ab27cdd9SOphir Munk * Modify a VF MAC address 2281ab27cdd9SOphir Munk * 2282ab27cdd9SOphir Munk * @param priv 2283ab27cdd9SOphir Munk * Pointer to device private data. 2284ab27cdd9SOphir Munk * @param mac_addr 2285ab27cdd9SOphir Munk * MAC address to modify into. 2286ab27cdd9SOphir Munk * @param iface_idx 2287ab27cdd9SOphir Munk * Net device interface index 2288ab27cdd9SOphir Munk * @param vf_index 2289ab27cdd9SOphir Munk * VF index 2290ab27cdd9SOphir Munk * 2291ab27cdd9SOphir Munk * @return 2292ab27cdd9SOphir Munk * 0 on success, a negative errno value otherwise 2293ab27cdd9SOphir Munk */ 2294ab27cdd9SOphir Munk int 2295ab27cdd9SOphir Munk mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2296ab27cdd9SOphir Munk unsigned int iface_idx, 2297ab27cdd9SOphir Munk struct rte_ether_addr *mac_addr, 2298ab27cdd9SOphir Munk int vf_index) 2299ab27cdd9SOphir Munk { 2300ab27cdd9SOphir Munk return mlx5_nl_vf_mac_addr_modify 2301ab27cdd9SOphir Munk (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2302ab27cdd9SOphir Munk } 2303ab27cdd9SOphir Munk 23044d18abd1SOphir Munk /** 23054d18abd1SOphir Munk * Set device promiscuous mode 23064d18abd1SOphir Munk * 23074d18abd1SOphir Munk * @param dev 23084d18abd1SOphir Munk * Pointer to Ethernet device structure. 23094d18abd1SOphir Munk * @param enable 23104d18abd1SOphir Munk * 0 - promiscuous is disabled, otherwise - enabled 23114d18abd1SOphir Munk * 23124d18abd1SOphir Munk * @return 23134d18abd1SOphir Munk * 0 on success, a negative error value otherwise 23144d18abd1SOphir Munk */ 23154d18abd1SOphir Munk int 23164d18abd1SOphir Munk mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 23174d18abd1SOphir Munk { 23184d18abd1SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 23194d18abd1SOphir Munk 23204d18abd1SOphir Munk return mlx5_nl_promisc(priv->nl_socket_route, 23214d18abd1SOphir Munk mlx5_ifindex(dev), !!enable); 23224d18abd1SOphir Munk } 23234d18abd1SOphir Munk 23244d18abd1SOphir Munk /** 23254d18abd1SOphir Munk * Set device promiscuous mode 23264d18abd1SOphir Munk * 23274d18abd1SOphir Munk * @param dev 23284d18abd1SOphir Munk * Pointer to Ethernet device structure. 23294d18abd1SOphir Munk * @param enable 23304d18abd1SOphir Munk * 0 - all multicase is disabled, otherwise - enabled 23314d18abd1SOphir Munk * 23324d18abd1SOphir Munk * @return 23334d18abd1SOphir Munk * 0 on success, a negative error value otherwise 23344d18abd1SOphir Munk */ 23354d18abd1SOphir Munk int 23364d18abd1SOphir Munk mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 23374d18abd1SOphir Munk { 23384d18abd1SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 23394d18abd1SOphir Munk 23404d18abd1SOphir Munk return mlx5_nl_allmulti(priv->nl_socket_route, 23414d18abd1SOphir Munk mlx5_ifindex(dev), !!enable); 23424d18abd1SOphir Munk } 23434d18abd1SOphir Munk 2344f00f6562SOphir Munk /** 2345f00f6562SOphir Munk * Flush device MAC addresses 2346f00f6562SOphir Munk * 2347f00f6562SOphir Munk * @param dev 2348f00f6562SOphir Munk * Pointer to Ethernet device structure. 2349f00f6562SOphir Munk * 2350f00f6562SOphir Munk */ 2351f00f6562SOphir Munk void 2352f00f6562SOphir Munk mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2353f00f6562SOphir Munk { 2354f00f6562SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2355f00f6562SOphir Munk 2356f00f6562SOphir Munk mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2357f00f6562SOphir Munk dev->data->mac_addrs, 2358f00f6562SOphir Munk MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2359f00f6562SOphir Munk } 2360f00f6562SOphir Munk 2361042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_ops = { 2362042f5c94SOphir Munk .dev_configure = mlx5_dev_configure, 2363042f5c94SOphir Munk .dev_start = mlx5_dev_start, 2364042f5c94SOphir Munk .dev_stop = mlx5_dev_stop, 2365042f5c94SOphir Munk .dev_set_link_down = mlx5_set_link_down, 2366042f5c94SOphir Munk .dev_set_link_up = mlx5_set_link_up, 2367042f5c94SOphir Munk .dev_close = mlx5_dev_close, 2368042f5c94SOphir Munk .promiscuous_enable = mlx5_promiscuous_enable, 2369042f5c94SOphir Munk .promiscuous_disable = mlx5_promiscuous_disable, 2370042f5c94SOphir Munk .allmulticast_enable = mlx5_allmulticast_enable, 2371042f5c94SOphir Munk .allmulticast_disable = mlx5_allmulticast_disable, 2372042f5c94SOphir Munk .link_update = mlx5_link_update, 2373042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2374042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2375042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2376042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2377042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2378042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2379042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2380b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2381042f5c94SOphir Munk .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2382042f5c94SOphir Munk .vlan_filter_set = mlx5_vlan_filter_set, 2383042f5c94SOphir Munk .rx_queue_setup = mlx5_rx_queue_setup, 2384042f5c94SOphir Munk .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2385042f5c94SOphir Munk .tx_queue_setup = mlx5_tx_queue_setup, 2386042f5c94SOphir Munk .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2387042f5c94SOphir Munk .rx_queue_release = mlx5_rx_queue_release, 2388042f5c94SOphir Munk .tx_queue_release = mlx5_tx_queue_release, 2389161d103bSViacheslav Ovsiienko .rx_queue_start = mlx5_rx_queue_start, 2390161d103bSViacheslav Ovsiienko .rx_queue_stop = mlx5_rx_queue_stop, 2391161d103bSViacheslav Ovsiienko .tx_queue_start = mlx5_tx_queue_start, 2392161d103bSViacheslav Ovsiienko .tx_queue_stop = mlx5_tx_queue_stop, 2393042f5c94SOphir Munk .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2394042f5c94SOphir Munk .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2395042f5c94SOphir Munk .mac_addr_remove = mlx5_mac_addr_remove, 2396042f5c94SOphir Munk .mac_addr_add = mlx5_mac_addr_add, 2397042f5c94SOphir Munk .mac_addr_set = mlx5_mac_addr_set, 2398042f5c94SOphir Munk .set_mc_addr_list = mlx5_set_mc_addr_list, 2399042f5c94SOphir Munk .mtu_set = mlx5_dev_set_mtu, 2400042f5c94SOphir Munk .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2401042f5c94SOphir Munk .vlan_offload_set = mlx5_vlan_offload_set, 2402042f5c94SOphir Munk .reta_update = mlx5_dev_rss_reta_update, 2403042f5c94SOphir Munk .reta_query = mlx5_dev_rss_reta_query, 2404042f5c94SOphir Munk .rss_hash_update = mlx5_rss_hash_update, 2405042f5c94SOphir Munk .rss_hash_conf_get = mlx5_rss_hash_conf_get, 2406042f5c94SOphir Munk .filter_ctrl = mlx5_dev_filter_ctrl, 2407042f5c94SOphir Munk .rx_descriptor_status = mlx5_rx_descriptor_status, 2408042f5c94SOphir Munk .tx_descriptor_status = mlx5_tx_descriptor_status, 2409042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2410042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2411042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2412042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2413042f5c94SOphir Munk .rx_queue_count = mlx5_rx_queue_count, 2414042f5c94SOphir Munk .rx_queue_intr_enable = mlx5_rx_intr_enable, 2415042f5c94SOphir Munk .rx_queue_intr_disable = mlx5_rx_intr_disable, 2416042f5c94SOphir Munk .is_removed = mlx5_is_removed, 2417042f5c94SOphir Munk .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, 2418042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2419042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2420042f5c94SOphir Munk .hairpin_cap_get = mlx5_hairpin_cap_get, 2421042f5c94SOphir Munk .mtr_ops_get = mlx5_flow_meter_ops_get, 2422042f5c94SOphir Munk }; 2423042f5c94SOphir Munk 2424042f5c94SOphir Munk /* Available operations from secondary process. */ 2425042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_sec_ops = { 2426042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2427042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2428042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2429042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2430042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2431042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2432042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2433b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2434161d103bSViacheslav Ovsiienko .rx_queue_start = mlx5_rx_queue_start, 2435161d103bSViacheslav Ovsiienko .rx_queue_stop = mlx5_rx_queue_stop, 2436161d103bSViacheslav Ovsiienko .tx_queue_start = mlx5_tx_queue_start, 2437161d103bSViacheslav Ovsiienko .tx_queue_stop = mlx5_tx_queue_stop, 2438042f5c94SOphir Munk .rx_descriptor_status = mlx5_rx_descriptor_status, 2439042f5c94SOphir Munk .tx_descriptor_status = mlx5_tx_descriptor_status, 2440042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2441042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2442042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2443042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2444042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2445042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2446042f5c94SOphir Munk }; 2447042f5c94SOphir Munk 2448042f5c94SOphir Munk /* Available operations in flow isolated mode. */ 2449042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_ops_isolate = { 2450042f5c94SOphir Munk .dev_configure = mlx5_dev_configure, 2451042f5c94SOphir Munk .dev_start = mlx5_dev_start, 2452042f5c94SOphir Munk .dev_stop = mlx5_dev_stop, 2453042f5c94SOphir Munk .dev_set_link_down = mlx5_set_link_down, 2454042f5c94SOphir Munk .dev_set_link_up = mlx5_set_link_up, 2455042f5c94SOphir Munk .dev_close = mlx5_dev_close, 2456042f5c94SOphir Munk .promiscuous_enable = mlx5_promiscuous_enable, 2457042f5c94SOphir Munk .promiscuous_disable = mlx5_promiscuous_disable, 2458042f5c94SOphir Munk .allmulticast_enable = mlx5_allmulticast_enable, 2459042f5c94SOphir Munk .allmulticast_disable = mlx5_allmulticast_disable, 2460042f5c94SOphir Munk .link_update = mlx5_link_update, 2461042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2462042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2463042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2464042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2465042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2466042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2467042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2468b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2469042f5c94SOphir Munk .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2470042f5c94SOphir Munk .vlan_filter_set = mlx5_vlan_filter_set, 2471042f5c94SOphir Munk .rx_queue_setup = mlx5_rx_queue_setup, 2472042f5c94SOphir Munk .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2473042f5c94SOphir Munk .tx_queue_setup = mlx5_tx_queue_setup, 2474042f5c94SOphir Munk .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2475042f5c94SOphir Munk .rx_queue_release = mlx5_rx_queue_release, 2476042f5c94SOphir Munk .tx_queue_release = mlx5_tx_queue_release, 2477161d103bSViacheslav Ovsiienko .rx_queue_start = mlx5_rx_queue_start, 2478161d103bSViacheslav Ovsiienko .rx_queue_stop = mlx5_rx_queue_stop, 2479161d103bSViacheslav Ovsiienko .tx_queue_start = mlx5_tx_queue_start, 2480161d103bSViacheslav Ovsiienko .tx_queue_stop = mlx5_tx_queue_stop, 2481042f5c94SOphir Munk .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2482042f5c94SOphir Munk .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2483042f5c94SOphir Munk .mac_addr_remove = mlx5_mac_addr_remove, 2484042f5c94SOphir Munk .mac_addr_add = mlx5_mac_addr_add, 2485042f5c94SOphir Munk .mac_addr_set = mlx5_mac_addr_set, 2486042f5c94SOphir Munk .set_mc_addr_list = mlx5_set_mc_addr_list, 2487042f5c94SOphir Munk .mtu_set = mlx5_dev_set_mtu, 2488042f5c94SOphir Munk .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2489042f5c94SOphir Munk .vlan_offload_set = mlx5_vlan_offload_set, 2490042f5c94SOphir Munk .filter_ctrl = mlx5_dev_filter_ctrl, 2491042f5c94SOphir Munk .rx_descriptor_status = mlx5_rx_descriptor_status, 2492042f5c94SOphir Munk .tx_descriptor_status = mlx5_tx_descriptor_status, 2493042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2494042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2495042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2496042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2497042f5c94SOphir Munk .rx_queue_intr_enable = mlx5_rx_intr_enable, 2498042f5c94SOphir Munk .rx_queue_intr_disable = mlx5_rx_intr_disable, 2499042f5c94SOphir Munk .is_removed = mlx5_is_removed, 2500042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2501042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2502042f5c94SOphir Munk .hairpin_cap_get = mlx5_hairpin_cap_get, 2503042f5c94SOphir Munk .mtr_ops_get = mlx5_flow_meter_ops_get, 2504042f5c94SOphir Munk }; 2505