1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause 2f44b09f9SOphir Munk * Copyright 2015 6WIND S.A. 3f44b09f9SOphir Munk * Copyright 2020 Mellanox Technologies, Ltd 4f44b09f9SOphir Munk */ 5f44b09f9SOphir Munk 6f44b09f9SOphir Munk #include <stddef.h> 7f44b09f9SOphir Munk #include <unistd.h> 8f44b09f9SOphir Munk #include <string.h> 9f44b09f9SOphir Munk #include <stdint.h> 10f44b09f9SOphir Munk #include <stdlib.h> 11f44b09f9SOphir Munk #include <errno.h> 12f44b09f9SOphir Munk #include <net/if.h> 13f44b09f9SOphir Munk #include <linux/rtnetlink.h> 1473bf9235SOphir Munk #include <linux/sockios.h> 1573bf9235SOphir Munk #include <linux/ethtool.h> 16f44b09f9SOphir Munk #include <fcntl.h> 17f44b09f9SOphir Munk 18f44b09f9SOphir Munk /* Verbs header. */ 19f44b09f9SOphir Munk /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 20f44b09f9SOphir Munk #ifdef PEDANTIC 21f44b09f9SOphir Munk #pragma GCC diagnostic ignored "-Wpedantic" 22f44b09f9SOphir Munk #endif 23f44b09f9SOphir Munk #include <infiniband/verbs.h> 24f44b09f9SOphir Munk #ifdef PEDANTIC 25f44b09f9SOphir Munk #pragma GCC diagnostic error "-Wpedantic" 26f44b09f9SOphir Munk #endif 27f44b09f9SOphir Munk 28f44b09f9SOphir Munk #include <rte_malloc.h> 29f44b09f9SOphir Munk #include <rte_ethdev_driver.h> 30f44b09f9SOphir Munk #include <rte_ethdev_pci.h> 31f44b09f9SOphir Munk #include <rte_pci.h> 32f44b09f9SOphir Munk #include <rte_bus_pci.h> 33f44b09f9SOphir Munk #include <rte_common.h> 34f44b09f9SOphir Munk #include <rte_kvargs.h> 35f44b09f9SOphir Munk #include <rte_rwlock.h> 36f44b09f9SOphir Munk #include <rte_spinlock.h> 37f44b09f9SOphir Munk #include <rte_string_fns.h> 38f44b09f9SOphir Munk #include <rte_alarm.h> 39*2aba9fc7SOphir Munk #include <rte_eal_paging.h> 40f44b09f9SOphir Munk 41f44b09f9SOphir Munk #include <mlx5_glue.h> 42f44b09f9SOphir Munk #include <mlx5_devx_cmds.h> 43f44b09f9SOphir Munk #include <mlx5_common.h> 442eb4d010SOphir Munk #include <mlx5_common_mp.h> 45d5ed8aa9SOphir Munk #include <mlx5_common_mr.h> 465522da6bSSuanming Mou #include <mlx5_malloc.h> 47f44b09f9SOphir Munk 48f44b09f9SOphir Munk #include "mlx5_defs.h" 49f44b09f9SOphir Munk #include "mlx5.h" 50391b8bccSOphir Munk #include "mlx5_common_os.h" 51f44b09f9SOphir Munk #include "mlx5_utils.h" 52f44b09f9SOphir Munk #include "mlx5_rxtx.h" 53f44b09f9SOphir Munk #include "mlx5_autoconf.h" 54f44b09f9SOphir Munk #include "mlx5_mr.h" 55f44b09f9SOphir Munk #include "mlx5_flow.h" 56f44b09f9SOphir Munk #include "rte_pmd_mlx5.h" 574f96d913SOphir Munk #include "mlx5_verbs.h" 58f44b09f9SOphir Munk 592eb4d010SOphir Munk #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 602eb4d010SOphir Munk 612eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW 622eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 632eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 642eb4d010SOphir Munk #endif 652eb4d010SOphir Munk 662eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 672eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 682eb4d010SOphir Munk #endif 692eb4d010SOphir Munk 70f44b09f9SOphir Munk /** 71e85f623eSOphir Munk * Get mlx5 device attributes. The glue function query_device_ex() is called 72e85f623eSOphir Munk * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 73e85f623eSOphir Munk * device attributes from the glue out parameter. 74e85f623eSOphir Munk * 75e85f623eSOphir Munk * @param dev 76e85f623eSOphir Munk * Pointer to ibv context. 77e85f623eSOphir Munk * 78e85f623eSOphir Munk * @param device_attr 79e85f623eSOphir Munk * Pointer to mlx5 device attributes. 80e85f623eSOphir Munk * 81e85f623eSOphir Munk * @return 82e85f623eSOphir Munk * 0 on success, non zero error number otherwise 83e85f623eSOphir Munk */ 84e85f623eSOphir Munk int 85e85f623eSOphir Munk mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 86e85f623eSOphir Munk { 87e85f623eSOphir Munk int err; 88e85f623eSOphir Munk struct ibv_device_attr_ex attr_ex; 89e85f623eSOphir Munk memset(device_attr, 0, sizeof(*device_attr)); 90e85f623eSOphir Munk err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 91e85f623eSOphir Munk if (err) 92e85f623eSOphir Munk return err; 93e85f623eSOphir Munk 94e85f623eSOphir Munk device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 95e85f623eSOphir Munk device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 96e85f623eSOphir Munk device_attr->max_sge = attr_ex.orig_attr.max_sge; 97e85f623eSOphir Munk device_attr->max_cq = attr_ex.orig_attr.max_cq; 98e85f623eSOphir Munk device_attr->max_qp = attr_ex.orig_attr.max_qp; 99e85f623eSOphir Munk device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 100e85f623eSOphir Munk device_attr->max_rwq_indirection_table_size = 101e85f623eSOphir Munk attr_ex.rss_caps.max_rwq_indirection_table_size; 102e85f623eSOphir Munk device_attr->max_tso = attr_ex.tso_caps.max_tso; 103e85f623eSOphir Munk device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 104e85f623eSOphir Munk 105e85f623eSOphir Munk struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 106e85f623eSOphir Munk err = mlx5_glue->dv_query_device(ctx, &dv_attr); 107e85f623eSOphir Munk if (err) 108e85f623eSOphir Munk return err; 109e85f623eSOphir Munk 110e85f623eSOphir Munk device_attr->flags = dv_attr.flags; 111e85f623eSOphir Munk device_attr->comp_mask = dv_attr.comp_mask; 112e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 113e85f623eSOphir Munk device_attr->sw_parsing_offloads = 114e85f623eSOphir Munk dv_attr.sw_parsing_caps.sw_parsing_offloads; 115e85f623eSOphir Munk #endif 116e85f623eSOphir Munk device_attr->min_single_stride_log_num_of_bytes = 117e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 118e85f623eSOphir Munk device_attr->max_single_stride_log_num_of_bytes = 119e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 120e85f623eSOphir Munk device_attr->min_single_wqe_log_num_of_strides = 121e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 122e85f623eSOphir Munk device_attr->max_single_wqe_log_num_of_strides = 123e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 124e85f623eSOphir Munk device_attr->stride_supported_qpts = 125e85f623eSOphir Munk dv_attr.striding_rq_caps.supported_qpts; 126e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 127e85f623eSOphir Munk device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 128e85f623eSOphir Munk #endif 129e85f623eSOphir Munk 130e85f623eSOphir Munk return err; 131e85f623eSOphir Munk } 1322eb4d010SOphir Munk 1332eb4d010SOphir Munk /** 1342eb4d010SOphir Munk * Verbs callback to allocate a memory. This function should allocate the space 1352eb4d010SOphir Munk * according to the size provided residing inside a huge page. 1362eb4d010SOphir Munk * Please note that all allocation must respect the alignment from libmlx5 137*2aba9fc7SOphir Munk * (i.e. currently rte_mem_page_size()). 1382eb4d010SOphir Munk * 1392eb4d010SOphir Munk * @param[in] size 1402eb4d010SOphir Munk * The size in bytes of the memory to allocate. 1412eb4d010SOphir Munk * @param[in] data 1422eb4d010SOphir Munk * A pointer to the callback data. 1432eb4d010SOphir Munk * 1442eb4d010SOphir Munk * @return 1452eb4d010SOphir Munk * Allocated buffer, NULL otherwise and rte_errno is set. 1462eb4d010SOphir Munk */ 1472eb4d010SOphir Munk static void * 1482eb4d010SOphir Munk mlx5_alloc_verbs_buf(size_t size, void *data) 1492eb4d010SOphir Munk { 1502eb4d010SOphir Munk struct mlx5_priv *priv = data; 1512eb4d010SOphir Munk void *ret; 1522eb4d010SOphir Munk unsigned int socket = SOCKET_ID_ANY; 153*2aba9fc7SOphir Munk size_t alignment = rte_mem_page_size(); 154*2aba9fc7SOphir Munk if (alignment == (size_t)-1) { 155*2aba9fc7SOphir Munk DRV_LOG(ERR, "Failed to get mem page size"); 156*2aba9fc7SOphir Munk rte_errno = ENOMEM; 157*2aba9fc7SOphir Munk return NULL; 158*2aba9fc7SOphir Munk } 1592eb4d010SOphir Munk 1602eb4d010SOphir Munk if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { 1612eb4d010SOphir Munk const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 1622eb4d010SOphir Munk 1632eb4d010SOphir Munk socket = ctrl->socket; 1642eb4d010SOphir Munk } else if (priv->verbs_alloc_ctx.type == 1652eb4d010SOphir Munk MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) { 1662eb4d010SOphir Munk const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 1672eb4d010SOphir Munk 1682eb4d010SOphir Munk socket = ctrl->socket; 1692eb4d010SOphir Munk } 1702eb4d010SOphir Munk MLX5_ASSERT(data != NULL); 1712175c4dcSSuanming Mou ret = mlx5_malloc(0, size, alignment, socket); 1722eb4d010SOphir Munk if (!ret && size) 1732eb4d010SOphir Munk rte_errno = ENOMEM; 1742eb4d010SOphir Munk return ret; 1752eb4d010SOphir Munk } 1762eb4d010SOphir Munk 1772eb4d010SOphir Munk /** 1782eb4d010SOphir Munk * Verbs callback to free a memory. 1792eb4d010SOphir Munk * 1802eb4d010SOphir Munk * @param[in] ptr 1812eb4d010SOphir Munk * A pointer to the memory to free. 1822eb4d010SOphir Munk * @param[in] data 1832eb4d010SOphir Munk * A pointer to the callback data. 1842eb4d010SOphir Munk */ 1852eb4d010SOphir Munk static void 1862eb4d010SOphir Munk mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) 1872eb4d010SOphir Munk { 1882eb4d010SOphir Munk MLX5_ASSERT(data != NULL); 1892175c4dcSSuanming Mou mlx5_free(ptr); 1902eb4d010SOphir Munk } 1912eb4d010SOphir Munk 1922eb4d010SOphir Munk /** 1932eb4d010SOphir Munk * Initialize DR related data within private structure. 1942eb4d010SOphir Munk * Routine checks the reference counter and does actual 1952eb4d010SOphir Munk * resources creation/initialization only if counter is zero. 1962eb4d010SOphir Munk * 1972eb4d010SOphir Munk * @param[in] priv 1982eb4d010SOphir Munk * Pointer to the private device data structure. 1992eb4d010SOphir Munk * 2002eb4d010SOphir Munk * @return 2012eb4d010SOphir Munk * Zero on success, positive error code otherwise. 2022eb4d010SOphir Munk */ 2032eb4d010SOphir Munk static int 2042eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv) 2052eb4d010SOphir Munk { 2062eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = priv->sh; 2072eb4d010SOphir Munk char s[MLX5_HLIST_NAMESIZE]; 2082eb4d010SOphir Munk int err = 0; 2092eb4d010SOphir Munk 2102eb4d010SOphir Munk if (!sh->flow_tbls) 2112eb4d010SOphir Munk err = mlx5_alloc_table_hash_list(priv); 2122eb4d010SOphir Munk else 2132eb4d010SOphir Munk DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n", 2142eb4d010SOphir Munk (void *)sh->flow_tbls); 2152eb4d010SOphir Munk if (err) 2162eb4d010SOphir Munk return err; 2172eb4d010SOphir Munk /* Create tags hash list table. */ 2182eb4d010SOphir Munk snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); 2192eb4d010SOphir Munk sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE); 2202eb4d010SOphir Munk if (!sh->tag_table) { 22163783b01SDavid Marchand DRV_LOG(ERR, "tags with hash creation failed."); 2222eb4d010SOphir Munk err = ENOMEM; 2232eb4d010SOphir Munk goto error; 2242eb4d010SOphir Munk } 2252eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 2262eb4d010SOphir Munk void *domain; 2272eb4d010SOphir Munk 2282eb4d010SOphir Munk if (sh->dv_refcnt) { 2292eb4d010SOphir Munk /* Shared DV/DR structures is already initialized. */ 2302eb4d010SOphir Munk sh->dv_refcnt++; 2312eb4d010SOphir Munk priv->dr_shared = 1; 2322eb4d010SOphir Munk return 0; 2332eb4d010SOphir Munk } 2342eb4d010SOphir Munk /* Reference counter is zero, we should initialize structures. */ 2352eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain(sh->ctx, 2362eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 2372eb4d010SOphir Munk if (!domain) { 2382eb4d010SOphir Munk DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 2392eb4d010SOphir Munk err = errno; 2402eb4d010SOphir Munk goto error; 2412eb4d010SOphir Munk } 2422eb4d010SOphir Munk sh->rx_domain = domain; 2432eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain(sh->ctx, 2442eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 2452eb4d010SOphir Munk if (!domain) { 2462eb4d010SOphir Munk DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 2472eb4d010SOphir Munk err = errno; 2482eb4d010SOphir Munk goto error; 2492eb4d010SOphir Munk } 2502eb4d010SOphir Munk pthread_mutex_init(&sh->dv_mutex, NULL); 2512eb4d010SOphir Munk sh->tx_domain = domain; 2522eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 2532eb4d010SOphir Munk if (priv->config.dv_esw_en) { 2542eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain 2552eb4d010SOphir Munk (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); 2562eb4d010SOphir Munk if (!domain) { 2572eb4d010SOphir Munk DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 2582eb4d010SOphir Munk err = errno; 2592eb4d010SOphir Munk goto error; 2602eb4d010SOphir Munk } 2612eb4d010SOphir Munk sh->fdb_domain = domain; 2622eb4d010SOphir Munk sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); 2632eb4d010SOphir Munk } 2642eb4d010SOphir Munk #endif 2652eb4d010SOphir Munk if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 2662eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 2672eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 2682eb4d010SOphir Munk if (sh->fdb_domain) 2692eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 2702eb4d010SOphir Munk } 2712eb4d010SOphir Munk sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 2722eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 2732eb4d010SOphir Munk sh->dv_refcnt++; 2742eb4d010SOphir Munk priv->dr_shared = 1; 2752eb4d010SOphir Munk return 0; 2762eb4d010SOphir Munk error: 2772eb4d010SOphir Munk /* Rollback the created objects. */ 2782eb4d010SOphir Munk if (sh->rx_domain) { 2792eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 2802eb4d010SOphir Munk sh->rx_domain = NULL; 2812eb4d010SOphir Munk } 2822eb4d010SOphir Munk if (sh->tx_domain) { 2832eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 2842eb4d010SOphir Munk sh->tx_domain = NULL; 2852eb4d010SOphir Munk } 2862eb4d010SOphir Munk if (sh->fdb_domain) { 2872eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 2882eb4d010SOphir Munk sh->fdb_domain = NULL; 2892eb4d010SOphir Munk } 2902eb4d010SOphir Munk if (sh->esw_drop_action) { 2912eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->esw_drop_action); 2922eb4d010SOphir Munk sh->esw_drop_action = NULL; 2932eb4d010SOphir Munk } 2942eb4d010SOphir Munk if (sh->pop_vlan_action) { 2952eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 2962eb4d010SOphir Munk sh->pop_vlan_action = NULL; 2972eb4d010SOphir Munk } 2982eb4d010SOphir Munk if (sh->tag_table) { 2992eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 3002eb4d010SOphir Munk mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 3012eb4d010SOphir Munk sh->tag_table = NULL; 3022eb4d010SOphir Munk } 3032eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 3042eb4d010SOphir Munk return err; 3052eb4d010SOphir Munk } 3062eb4d010SOphir Munk 3072eb4d010SOphir Munk /** 3082eb4d010SOphir Munk * Destroy DR related data within private structure. 3092eb4d010SOphir Munk * 3102eb4d010SOphir Munk * @param[in] priv 3112eb4d010SOphir Munk * Pointer to the private device data structure. 3122eb4d010SOphir Munk */ 3132eb4d010SOphir Munk void 3142eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv) 3152eb4d010SOphir Munk { 3162eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh; 3172eb4d010SOphir Munk 3182eb4d010SOphir Munk if (!priv->dr_shared) 3192eb4d010SOphir Munk return; 3202eb4d010SOphir Munk priv->dr_shared = 0; 3212eb4d010SOphir Munk sh = priv->sh; 3222eb4d010SOphir Munk MLX5_ASSERT(sh); 3232eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 3242eb4d010SOphir Munk MLX5_ASSERT(sh->dv_refcnt); 3252eb4d010SOphir Munk if (sh->dv_refcnt && --sh->dv_refcnt) 3262eb4d010SOphir Munk return; 3272eb4d010SOphir Munk if (sh->rx_domain) { 3282eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 3292eb4d010SOphir Munk sh->rx_domain = NULL; 3302eb4d010SOphir Munk } 3312eb4d010SOphir Munk if (sh->tx_domain) { 3322eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 3332eb4d010SOphir Munk sh->tx_domain = NULL; 3342eb4d010SOphir Munk } 3352eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 3362eb4d010SOphir Munk if (sh->fdb_domain) { 3372eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 3382eb4d010SOphir Munk sh->fdb_domain = NULL; 3392eb4d010SOphir Munk } 3402eb4d010SOphir Munk if (sh->esw_drop_action) { 3412eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->esw_drop_action); 3422eb4d010SOphir Munk sh->esw_drop_action = NULL; 3432eb4d010SOphir Munk } 3442eb4d010SOphir Munk #endif 3452eb4d010SOphir Munk if (sh->pop_vlan_action) { 3462eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 3472eb4d010SOphir Munk sh->pop_vlan_action = NULL; 3482eb4d010SOphir Munk } 3492eb4d010SOphir Munk pthread_mutex_destroy(&sh->dv_mutex); 3502eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 3512eb4d010SOphir Munk if (sh->tag_table) { 3522eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 3532eb4d010SOphir Munk mlx5_hlist_destroy(sh->tag_table, NULL, NULL); 3542eb4d010SOphir Munk sh->tag_table = NULL; 3552eb4d010SOphir Munk } 3562eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 3572eb4d010SOphir Munk } 3582eb4d010SOphir Munk 3592eb4d010SOphir Munk /** 3602eb4d010SOphir Munk * Spawn an Ethernet device from Verbs information. 3612eb4d010SOphir Munk * 3622eb4d010SOphir Munk * @param dpdk_dev 3632eb4d010SOphir Munk * Backing DPDK device. 3642eb4d010SOphir Munk * @param spawn 3652eb4d010SOphir Munk * Verbs device parameters (name, port, switch_info) to spawn. 3662eb4d010SOphir Munk * @param config 3672eb4d010SOphir Munk * Device configuration parameters. 3682eb4d010SOphir Munk * 3692eb4d010SOphir Munk * @return 3702eb4d010SOphir Munk * A valid Ethernet device object on success, NULL otherwise and rte_errno 3712eb4d010SOphir Munk * is set. The following errors are defined: 3722eb4d010SOphir Munk * 3732eb4d010SOphir Munk * EBUSY: device is not supposed to be spawned. 3742eb4d010SOphir Munk * EEXIST: device is already spawned 3752eb4d010SOphir Munk */ 3762eb4d010SOphir Munk static struct rte_eth_dev * 3772eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev, 3782eb4d010SOphir Munk struct mlx5_dev_spawn_data *spawn, 3792eb4d010SOphir Munk struct mlx5_dev_config config) 3802eb4d010SOphir Munk { 3812eb4d010SOphir Munk const struct mlx5_switch_info *switch_info = &spawn->info; 3822eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = NULL; 3832eb4d010SOphir Munk struct ibv_port_attr port_attr; 3842eb4d010SOphir Munk struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 3852eb4d010SOphir Munk struct rte_eth_dev *eth_dev = NULL; 3862eb4d010SOphir Munk struct mlx5_priv *priv = NULL; 3872eb4d010SOphir Munk int err = 0; 3882eb4d010SOphir Munk unsigned int hw_padding = 0; 3892eb4d010SOphir Munk unsigned int mps; 3902eb4d010SOphir Munk unsigned int cqe_comp; 3912eb4d010SOphir Munk unsigned int cqe_pad = 0; 3922eb4d010SOphir Munk unsigned int tunnel_en = 0; 3932eb4d010SOphir Munk unsigned int mpls_en = 0; 3942eb4d010SOphir Munk unsigned int swp = 0; 3952eb4d010SOphir Munk unsigned int mprq = 0; 3962eb4d010SOphir Munk unsigned int mprq_min_stride_size_n = 0; 3972eb4d010SOphir Munk unsigned int mprq_max_stride_size_n = 0; 3982eb4d010SOphir Munk unsigned int mprq_min_stride_num_n = 0; 3992eb4d010SOphir Munk unsigned int mprq_max_stride_num_n = 0; 4002eb4d010SOphir Munk struct rte_ether_addr mac; 4012eb4d010SOphir Munk char name[RTE_ETH_NAME_MAX_LEN]; 4022eb4d010SOphir Munk int own_domain_id = 0; 4032eb4d010SOphir Munk uint16_t port_id; 4042eb4d010SOphir Munk unsigned int i; 4052eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_DEVX_PORT 4062eb4d010SOphir Munk struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; 4072eb4d010SOphir Munk #endif 4082eb4d010SOphir Munk 4092eb4d010SOphir Munk /* Determine if this port representor is supposed to be spawned. */ 4102eb4d010SOphir Munk if (switch_info->representor && dpdk_dev->devargs) { 4112eb4d010SOphir Munk struct rte_eth_devargs eth_da; 4122eb4d010SOphir Munk 4132eb4d010SOphir Munk err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); 4142eb4d010SOphir Munk if (err) { 4152eb4d010SOphir Munk rte_errno = -err; 4162eb4d010SOphir Munk DRV_LOG(ERR, "failed to process device arguments: %s", 4172eb4d010SOphir Munk strerror(rte_errno)); 4182eb4d010SOphir Munk return NULL; 4192eb4d010SOphir Munk } 4202eb4d010SOphir Munk for (i = 0; i < eth_da.nb_representor_ports; ++i) 4212eb4d010SOphir Munk if (eth_da.representor_ports[i] == 4222eb4d010SOphir Munk (uint16_t)switch_info->port_name) 4232eb4d010SOphir Munk break; 4242eb4d010SOphir Munk if (i == eth_da.nb_representor_ports) { 4252eb4d010SOphir Munk rte_errno = EBUSY; 4262eb4d010SOphir Munk return NULL; 4272eb4d010SOphir Munk } 4282eb4d010SOphir Munk } 4292eb4d010SOphir Munk /* Build device name. */ 4302eb4d010SOphir Munk if (spawn->pf_bond < 0) { 4312eb4d010SOphir Munk /* Single device. */ 4322eb4d010SOphir Munk if (!switch_info->representor) 4332eb4d010SOphir Munk strlcpy(name, dpdk_dev->name, sizeof(name)); 4342eb4d010SOphir Munk else 4352eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_representor_%u", 4362eb4d010SOphir Munk dpdk_dev->name, switch_info->port_name); 4372eb4d010SOphir Munk } else { 4382eb4d010SOphir Munk /* Bonding device. */ 4392eb4d010SOphir Munk if (!switch_info->representor) 4402eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_%s", 441834a9019SOphir Munk dpdk_dev->name, 442834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 4432eb4d010SOphir Munk else 4442eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_%s_representor_%u", 445834a9019SOphir Munk dpdk_dev->name, 446834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev), 4472eb4d010SOphir Munk switch_info->port_name); 4482eb4d010SOphir Munk } 4492eb4d010SOphir Munk /* check if the device is already spawned */ 4502eb4d010SOphir Munk if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 4512eb4d010SOphir Munk rte_errno = EEXIST; 4522eb4d010SOphir Munk return NULL; 4532eb4d010SOphir Munk } 4542eb4d010SOphir Munk DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 4552eb4d010SOphir Munk if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 4562eb4d010SOphir Munk struct mlx5_mp_id mp_id; 4572eb4d010SOphir Munk 4582eb4d010SOphir Munk eth_dev = rte_eth_dev_attach_secondary(name); 4592eb4d010SOphir Munk if (eth_dev == NULL) { 4602eb4d010SOphir Munk DRV_LOG(ERR, "can not attach rte ethdev"); 4612eb4d010SOphir Munk rte_errno = ENOMEM; 4622eb4d010SOphir Munk return NULL; 4632eb4d010SOphir Munk } 4642eb4d010SOphir Munk eth_dev->device = dpdk_dev; 465042f5c94SOphir Munk eth_dev->dev_ops = &mlx5_os_dev_sec_ops; 4662eb4d010SOphir Munk err = mlx5_proc_priv_init(eth_dev); 4672eb4d010SOphir Munk if (err) 4682eb4d010SOphir Munk return NULL; 4692eb4d010SOphir Munk mp_id.port_id = eth_dev->data->port_id; 4702eb4d010SOphir Munk strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 4712eb4d010SOphir Munk /* Receive command fd from primary process */ 4722eb4d010SOphir Munk err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 4732eb4d010SOphir Munk if (err < 0) 4742eb4d010SOphir Munk goto err_secondary; 4752eb4d010SOphir Munk /* Remap UAR for Tx queues. */ 4762eb4d010SOphir Munk err = mlx5_tx_uar_init_secondary(eth_dev, err); 4772eb4d010SOphir Munk if (err) 4782eb4d010SOphir Munk goto err_secondary; 4792eb4d010SOphir Munk /* 4802eb4d010SOphir Munk * Ethdev pointer is still required as input since 4812eb4d010SOphir Munk * the primary device is not accessible from the 4822eb4d010SOphir Munk * secondary process. 4832eb4d010SOphir Munk */ 4842eb4d010SOphir Munk eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 4852eb4d010SOphir Munk eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 4862eb4d010SOphir Munk return eth_dev; 4872eb4d010SOphir Munk err_secondary: 4882eb4d010SOphir Munk mlx5_dev_close(eth_dev); 4892eb4d010SOphir Munk return NULL; 4902eb4d010SOphir Munk } 4912eb4d010SOphir Munk /* 4922eb4d010SOphir Munk * Some parameters ("tx_db_nc" in particularly) are needed in 4932eb4d010SOphir Munk * advance to create dv/verbs device context. We proceed the 4942eb4d010SOphir Munk * devargs here to get ones, and later proceed devargs again 4952eb4d010SOphir Munk * to override some hardware settings. 4962eb4d010SOphir Munk */ 4972eb4d010SOphir Munk err = mlx5_args(&config, dpdk_dev->devargs); 4982eb4d010SOphir Munk if (err) { 4992eb4d010SOphir Munk err = rte_errno; 5002eb4d010SOphir Munk DRV_LOG(ERR, "failed to process device arguments: %s", 5012eb4d010SOphir Munk strerror(rte_errno)); 5022eb4d010SOphir Munk goto error; 5032eb4d010SOphir Munk } 5045522da6bSSuanming Mou mlx5_malloc_mem_select(config.sys_mem_en); 50591389890SOphir Munk sh = mlx5_alloc_shared_dev_ctx(spawn, &config); 5062eb4d010SOphir Munk if (!sh) 5072eb4d010SOphir Munk return NULL; 5082eb4d010SOphir Munk config.devx = sh->devx; 5092eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 5102eb4d010SOphir Munk config.dest_tir = 1; 5112eb4d010SOphir Munk #endif 5122eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 5132eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 5142eb4d010SOphir Munk #endif 5152eb4d010SOphir Munk /* 5162eb4d010SOphir Munk * Multi-packet send is supported by ConnectX-4 Lx PF as well 5172eb4d010SOphir Munk * as all ConnectX-5 devices. 5182eb4d010SOphir Munk */ 5192eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 5202eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 5212eb4d010SOphir Munk #endif 5222eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 5232eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 5242eb4d010SOphir Munk #endif 5252eb4d010SOphir Munk mlx5_glue->dv_query_device(sh->ctx, &dv_attr); 5262eb4d010SOphir Munk if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 5272eb4d010SOphir Munk if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 5282eb4d010SOphir Munk DRV_LOG(DEBUG, "enhanced MPW is supported"); 5292eb4d010SOphir Munk mps = MLX5_MPW_ENHANCED; 5302eb4d010SOphir Munk } else { 5312eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW is supported"); 5322eb4d010SOphir Munk mps = MLX5_MPW; 5332eb4d010SOphir Munk } 5342eb4d010SOphir Munk } else { 5352eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW isn't supported"); 5362eb4d010SOphir Munk mps = MLX5_MPW_DISABLED; 5372eb4d010SOphir Munk } 5382eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 5392eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 5402eb4d010SOphir Munk swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; 5412eb4d010SOphir Munk DRV_LOG(DEBUG, "SWP support: %u", swp); 5422eb4d010SOphir Munk #endif 5432eb4d010SOphir Munk config.swp = !!swp; 5442eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 5452eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 5462eb4d010SOphir Munk struct mlx5dv_striding_rq_caps mprq_caps = 5472eb4d010SOphir Munk dv_attr.striding_rq_caps; 5482eb4d010SOphir Munk 5492eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 5502eb4d010SOphir Munk mprq_caps.min_single_stride_log_num_of_bytes); 5512eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 5522eb4d010SOphir Munk mprq_caps.max_single_stride_log_num_of_bytes); 5532eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 5542eb4d010SOphir Munk mprq_caps.min_single_wqe_log_num_of_strides); 5552eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 5562eb4d010SOphir Munk mprq_caps.max_single_wqe_log_num_of_strides); 5572eb4d010SOphir Munk DRV_LOG(DEBUG, "\tsupported_qpts: %d", 5582eb4d010SOphir Munk mprq_caps.supported_qpts); 5592eb4d010SOphir Munk DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 5602eb4d010SOphir Munk mprq = 1; 5612eb4d010SOphir Munk mprq_min_stride_size_n = 5622eb4d010SOphir Munk mprq_caps.min_single_stride_log_num_of_bytes; 5632eb4d010SOphir Munk mprq_max_stride_size_n = 5642eb4d010SOphir Munk mprq_caps.max_single_stride_log_num_of_bytes; 5652eb4d010SOphir Munk mprq_min_stride_num_n = 5662eb4d010SOphir Munk mprq_caps.min_single_wqe_log_num_of_strides; 5672eb4d010SOphir Munk mprq_max_stride_num_n = 5682eb4d010SOphir Munk mprq_caps.max_single_wqe_log_num_of_strides; 5692eb4d010SOphir Munk } 5702eb4d010SOphir Munk #endif 5712eb4d010SOphir Munk if (RTE_CACHE_LINE_SIZE == 128 && 5722eb4d010SOphir Munk !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) 5732eb4d010SOphir Munk cqe_comp = 0; 5742eb4d010SOphir Munk else 5752eb4d010SOphir Munk cqe_comp = 1; 5762eb4d010SOphir Munk config.cqe_comp = cqe_comp; 5772eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD 5782eb4d010SOphir Munk /* Whether device supports 128B Rx CQE padding. */ 5792eb4d010SOphir Munk cqe_pad = RTE_CACHE_LINE_SIZE == 128 && 5802eb4d010SOphir Munk (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); 5812eb4d010SOphir Munk #endif 5822eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 5832eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 5842eb4d010SOphir Munk tunnel_en = ((dv_attr.tunnel_offloads_caps & 5852eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && 5862eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 5872eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && 5882eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 5892eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); 5902eb4d010SOphir Munk } 5912eb4d010SOphir Munk DRV_LOG(DEBUG, "tunnel offloading is %ssupported", 5922eb4d010SOphir Munk tunnel_en ? "" : "not "); 5932eb4d010SOphir Munk #else 5942eb4d010SOphir Munk DRV_LOG(WARNING, 5952eb4d010SOphir Munk "tunnel offloading disabled due to old OFED/rdma-core version"); 5962eb4d010SOphir Munk #endif 5972eb4d010SOphir Munk config.tunnel_en = tunnel_en; 5982eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 5992eb4d010SOphir Munk mpls_en = ((dv_attr.tunnel_offloads_caps & 6002eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 6012eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 6022eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 6032eb4d010SOphir Munk DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 6042eb4d010SOphir Munk mpls_en ? "" : "not "); 6052eb4d010SOphir Munk #else 6062eb4d010SOphir Munk DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 6072eb4d010SOphir Munk " old OFED/rdma-core version or firmware configuration"); 6082eb4d010SOphir Munk #endif 6092eb4d010SOphir Munk config.mpls_en = mpls_en; 6102eb4d010SOphir Munk /* Check port status. */ 611834a9019SOphir Munk err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); 6122eb4d010SOphir Munk if (err) { 6132eb4d010SOphir Munk DRV_LOG(ERR, "port query failed: %s", strerror(err)); 6142eb4d010SOphir Munk goto error; 6152eb4d010SOphir Munk } 6162eb4d010SOphir Munk if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 6172eb4d010SOphir Munk DRV_LOG(ERR, "port is not configured in Ethernet mode"); 6182eb4d010SOphir Munk err = EINVAL; 6192eb4d010SOphir Munk goto error; 6202eb4d010SOphir Munk } 6212eb4d010SOphir Munk if (port_attr.state != IBV_PORT_ACTIVE) 6222eb4d010SOphir Munk DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", 6232eb4d010SOphir Munk mlx5_glue->port_state_str(port_attr.state), 6242eb4d010SOphir Munk port_attr.state); 6252eb4d010SOphir Munk /* Allocate private eth device data. */ 6262175c4dcSSuanming Mou priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 6272eb4d010SOphir Munk sizeof(*priv), 6282175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 6292eb4d010SOphir Munk if (priv == NULL) { 6302eb4d010SOphir Munk DRV_LOG(ERR, "priv allocation failure"); 6312eb4d010SOphir Munk err = ENOMEM; 6322eb4d010SOphir Munk goto error; 6332eb4d010SOphir Munk } 6342eb4d010SOphir Munk priv->sh = sh; 63591389890SOphir Munk priv->dev_port = spawn->phys_port; 6362eb4d010SOphir Munk priv->pci_dev = spawn->pci_dev; 6372eb4d010SOphir Munk priv->mtu = RTE_ETHER_MTU; 6382eb4d010SOphir Munk priv->mp_id.port_id = port_id; 6392eb4d010SOphir Munk strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 6402eb4d010SOphir Munk /* Some internal functions rely on Netlink sockets, open them now. */ 6412eb4d010SOphir Munk priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); 6422eb4d010SOphir Munk priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 6432eb4d010SOphir Munk priv->representor = !!switch_info->representor; 6442eb4d010SOphir Munk priv->master = !!switch_info->master; 6452eb4d010SOphir Munk priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 6462eb4d010SOphir Munk priv->vport_meta_tag = 0; 6472eb4d010SOphir Munk priv->vport_meta_mask = 0; 6482eb4d010SOphir Munk priv->pf_bond = spawn->pf_bond; 6492eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_DEVX_PORT 6502eb4d010SOphir Munk /* 6512eb4d010SOphir Munk * The DevX port query API is implemented. E-Switch may use 6522eb4d010SOphir Munk * either vport or reg_c[0] metadata register to match on 6532eb4d010SOphir Munk * vport index. The engaged part of metadata register is 6542eb4d010SOphir Munk * defined by mask. 6552eb4d010SOphir Munk */ 6562eb4d010SOphir Munk if (switch_info->representor || switch_info->master) { 6572eb4d010SOphir Munk devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | 6582eb4d010SOphir Munk MLX5DV_DEVX_PORT_MATCH_REG_C_0; 659834a9019SOphir Munk err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, 6602eb4d010SOphir Munk &devx_port); 6612eb4d010SOphir Munk if (err) { 6622eb4d010SOphir Munk DRV_LOG(WARNING, 6632eb4d010SOphir Munk "can't query devx port %d on device %s", 664834a9019SOphir Munk spawn->phys_port, 665834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 6662eb4d010SOphir Munk devx_port.comp_mask = 0; 6672eb4d010SOphir Munk } 6682eb4d010SOphir Munk } 6692eb4d010SOphir Munk if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { 6702eb4d010SOphir Munk priv->vport_meta_tag = devx_port.reg_c_0.value; 6712eb4d010SOphir Munk priv->vport_meta_mask = devx_port.reg_c_0.mask; 6722eb4d010SOphir Munk if (!priv->vport_meta_mask) { 6732eb4d010SOphir Munk DRV_LOG(ERR, "vport zero mask for port %d" 6742eb4d010SOphir Munk " on bonding device %s", 675834a9019SOphir Munk spawn->phys_port, 676834a9019SOphir Munk mlx5_os_get_dev_device_name 677834a9019SOphir Munk (spawn->phys_dev)); 6782eb4d010SOphir Munk err = ENOTSUP; 6792eb4d010SOphir Munk goto error; 6802eb4d010SOphir Munk } 6812eb4d010SOphir Munk if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 6822eb4d010SOphir Munk DRV_LOG(ERR, "invalid vport tag for port %d" 6832eb4d010SOphir Munk " on bonding device %s", 684834a9019SOphir Munk spawn->phys_port, 685834a9019SOphir Munk mlx5_os_get_dev_device_name 686834a9019SOphir Munk (spawn->phys_dev)); 6872eb4d010SOphir Munk err = ENOTSUP; 6882eb4d010SOphir Munk goto error; 6892eb4d010SOphir Munk } 6902eb4d010SOphir Munk } 6912eb4d010SOphir Munk if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { 6922eb4d010SOphir Munk priv->vport_id = devx_port.vport_num; 6932eb4d010SOphir Munk } else if (spawn->pf_bond >= 0) { 6942eb4d010SOphir Munk DRV_LOG(ERR, "can't deduce vport index for port %d" 6952eb4d010SOphir Munk " on bonding device %s", 696834a9019SOphir Munk spawn->phys_port, 697834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 6982eb4d010SOphir Munk err = ENOTSUP; 6992eb4d010SOphir Munk goto error; 7002eb4d010SOphir Munk } else { 7012eb4d010SOphir Munk /* Suppose vport index in compatible way. */ 7022eb4d010SOphir Munk priv->vport_id = switch_info->representor ? 7032eb4d010SOphir Munk switch_info->port_name + 1 : -1; 7042eb4d010SOphir Munk } 7052eb4d010SOphir Munk #else 7062eb4d010SOphir Munk /* 7072eb4d010SOphir Munk * Kernel/rdma_core support single E-Switch per PF configurations 7082eb4d010SOphir Munk * only and vport_id field contains the vport index for 7092eb4d010SOphir Munk * associated VF, which is deduced from representor port name. 7102eb4d010SOphir Munk * For example, let's have the IB device port 10, it has 7112eb4d010SOphir Munk * attached network device eth0, which has port name attribute 7122eb4d010SOphir Munk * pf0vf2, we can deduce the VF number as 2, and set vport index 7132eb4d010SOphir Munk * as 3 (2+1). This assigning schema should be changed if the 7142eb4d010SOphir Munk * multiple E-Switch instances per PF configurations or/and PCI 7152eb4d010SOphir Munk * subfunctions are added. 7162eb4d010SOphir Munk */ 7172eb4d010SOphir Munk priv->vport_id = switch_info->representor ? 7182eb4d010SOphir Munk switch_info->port_name + 1 : -1; 7192eb4d010SOphir Munk #endif 7202eb4d010SOphir Munk /* representor_id field keeps the unmodified VF index. */ 7212eb4d010SOphir Munk priv->representor_id = switch_info->representor ? 7222eb4d010SOphir Munk switch_info->port_name : -1; 7232eb4d010SOphir Munk /* 7242eb4d010SOphir Munk * Look for sibling devices in order to reuse their switch domain 7252eb4d010SOphir Munk * if any, otherwise allocate one. 7262eb4d010SOphir Munk */ 7272eb4d010SOphir Munk MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 7282eb4d010SOphir Munk const struct mlx5_priv *opriv = 7292eb4d010SOphir Munk rte_eth_devices[port_id].data->dev_private; 7302eb4d010SOphir Munk 7312eb4d010SOphir Munk if (!opriv || 7322eb4d010SOphir Munk opriv->sh != priv->sh || 7332eb4d010SOphir Munk opriv->domain_id == 7342eb4d010SOphir Munk RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 7352eb4d010SOphir Munk continue; 7362eb4d010SOphir Munk priv->domain_id = opriv->domain_id; 7372eb4d010SOphir Munk break; 7382eb4d010SOphir Munk } 7392eb4d010SOphir Munk if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 7402eb4d010SOphir Munk err = rte_eth_switch_domain_alloc(&priv->domain_id); 7412eb4d010SOphir Munk if (err) { 7422eb4d010SOphir Munk err = rte_errno; 7432eb4d010SOphir Munk DRV_LOG(ERR, "unable to allocate switch domain: %s", 7442eb4d010SOphir Munk strerror(rte_errno)); 7452eb4d010SOphir Munk goto error; 7462eb4d010SOphir Munk } 7472eb4d010SOphir Munk own_domain_id = 1; 7482eb4d010SOphir Munk } 7492eb4d010SOphir Munk /* Override some values set by hardware configuration. */ 7502eb4d010SOphir Munk mlx5_args(&config, dpdk_dev->devargs); 7512eb4d010SOphir Munk err = mlx5_dev_check_sibling_config(priv, &config); 7522eb4d010SOphir Munk if (err) 7532eb4d010SOphir Munk goto error; 7542eb4d010SOphir Munk config.hw_csum = !!(sh->device_attr.device_cap_flags_ex & 7552eb4d010SOphir Munk IBV_DEVICE_RAW_IP_CSUM); 7562eb4d010SOphir Munk DRV_LOG(DEBUG, "checksum offloading is %ssupported", 7572eb4d010SOphir Munk (config.hw_csum ? "" : "not ")); 7582eb4d010SOphir Munk #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 7592eb4d010SOphir Munk !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 7602eb4d010SOphir Munk DRV_LOG(DEBUG, "counters are not supported"); 7612eb4d010SOphir Munk #endif 7622eb4d010SOphir Munk #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 7632eb4d010SOphir Munk if (config.dv_flow_en) { 7642eb4d010SOphir Munk DRV_LOG(WARNING, "DV flow is not supported"); 7652eb4d010SOphir Munk config.dv_flow_en = 0; 7662eb4d010SOphir Munk } 7672eb4d010SOphir Munk #endif 7682eb4d010SOphir Munk config.ind_table_max_size = 7692eb4d010SOphir Munk sh->device_attr.max_rwq_indirection_table_size; 7702eb4d010SOphir Munk /* 7712eb4d010SOphir Munk * Remove this check once DPDK supports larger/variable 7722eb4d010SOphir Munk * indirection tables. 7732eb4d010SOphir Munk */ 7742eb4d010SOphir Munk if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 7752eb4d010SOphir Munk config.ind_table_max_size = ETH_RSS_RETA_SIZE_512; 7762eb4d010SOphir Munk DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 7772eb4d010SOphir Munk config.ind_table_max_size); 7782eb4d010SOphir Munk config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 7792eb4d010SOphir Munk IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 7802eb4d010SOphir Munk DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 7812eb4d010SOphir Munk (config.hw_vlan_strip ? "" : "not ")); 7822eb4d010SOphir Munk config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 7832eb4d010SOphir Munk IBV_RAW_PACKET_CAP_SCATTER_FCS); 7842eb4d010SOphir Munk #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 7852eb4d010SOphir Munk hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 7862eb4d010SOphir Munk #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 7872eb4d010SOphir Munk hw_padding = !!(sh->device_attr.device_cap_flags_ex & 7882eb4d010SOphir Munk IBV_DEVICE_PCI_WRITE_END_PADDING); 7892eb4d010SOphir Munk #endif 7902eb4d010SOphir Munk if (config.hw_padding && !hw_padding) { 7912eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 7922eb4d010SOphir Munk config.hw_padding = 0; 7932eb4d010SOphir Munk } else if (config.hw_padding) { 7942eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 7952eb4d010SOphir Munk } 7962eb4d010SOphir Munk config.tso = (sh->device_attr.max_tso > 0 && 7972eb4d010SOphir Munk (sh->device_attr.tso_supported_qpts & 7982eb4d010SOphir Munk (1 << IBV_QPT_RAW_PACKET))); 7992eb4d010SOphir Munk if (config.tso) 8002eb4d010SOphir Munk config.tso_max_payload_sz = sh->device_attr.max_tso; 8012eb4d010SOphir Munk /* 8022eb4d010SOphir Munk * MPW is disabled by default, while the Enhanced MPW is enabled 8032eb4d010SOphir Munk * by default. 8042eb4d010SOphir Munk */ 8052eb4d010SOphir Munk if (config.mps == MLX5_ARG_UNSET) 8062eb4d010SOphir Munk config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 8072eb4d010SOphir Munk MLX5_MPW_DISABLED; 8082eb4d010SOphir Munk else 8092eb4d010SOphir Munk config.mps = config.mps ? mps : MLX5_MPW_DISABLED; 8102eb4d010SOphir Munk DRV_LOG(INFO, "%sMPS is %s", 8112eb4d010SOphir Munk config.mps == MLX5_MPW_ENHANCED ? "enhanced " : 8122eb4d010SOphir Munk config.mps == MLX5_MPW ? "legacy " : "", 8132eb4d010SOphir Munk config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 8142eb4d010SOphir Munk if (config.cqe_comp && !cqe_comp) { 8152eb4d010SOphir Munk DRV_LOG(WARNING, "Rx CQE compression isn't supported"); 8162eb4d010SOphir Munk config.cqe_comp = 0; 8172eb4d010SOphir Munk } 8182eb4d010SOphir Munk if (config.cqe_pad && !cqe_pad) { 8192eb4d010SOphir Munk DRV_LOG(WARNING, "Rx CQE padding isn't supported"); 8202eb4d010SOphir Munk config.cqe_pad = 0; 8212eb4d010SOphir Munk } else if (config.cqe_pad) { 8222eb4d010SOphir Munk DRV_LOG(INFO, "Rx CQE padding is enabled"); 8232eb4d010SOphir Munk } 8242eb4d010SOphir Munk if (config.devx) { 8252eb4d010SOphir Munk priv->counter_fallback = 0; 8262eb4d010SOphir Munk err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr); 8272eb4d010SOphir Munk if (err) { 8282eb4d010SOphir Munk err = -err; 8292eb4d010SOphir Munk goto error; 8302eb4d010SOphir Munk } 8312eb4d010SOphir Munk if (!config.hca_attr.flow_counters_dump) 8322eb4d010SOphir Munk priv->counter_fallback = 1; 8332eb4d010SOphir Munk #ifndef HAVE_IBV_DEVX_ASYNC 8342eb4d010SOphir Munk priv->counter_fallback = 1; 8352eb4d010SOphir Munk #endif 8362eb4d010SOphir Munk if (priv->counter_fallback) 8372eb4d010SOphir Munk DRV_LOG(INFO, "Use fall-back DV counter management"); 8382eb4d010SOphir Munk /* Check for LRO support. */ 8392eb4d010SOphir Munk if (config.dest_tir && config.hca_attr.lro_cap && 8402eb4d010SOphir Munk config.dv_flow_en) { 8412eb4d010SOphir Munk /* TBD check tunnel lro caps. */ 8422eb4d010SOphir Munk config.lro.supported = config.hca_attr.lro_cap; 8432eb4d010SOphir Munk DRV_LOG(DEBUG, "Device supports LRO"); 8442eb4d010SOphir Munk /* 8452eb4d010SOphir Munk * If LRO timeout is not configured by application, 8462eb4d010SOphir Munk * use the minimal supported value. 8472eb4d010SOphir Munk */ 8482eb4d010SOphir Munk if (!config.lro.timeout) 8492eb4d010SOphir Munk config.lro.timeout = 8502eb4d010SOphir Munk config.hca_attr.lro_timer_supported_periods[0]; 8512eb4d010SOphir Munk DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 8522eb4d010SOphir Munk config.lro.timeout); 8532eb4d010SOphir Munk } 8542eb4d010SOphir Munk #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) 8552eb4d010SOphir Munk if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup && 8562eb4d010SOphir Munk config.dv_flow_en) { 8572eb4d010SOphir Munk uint8_t reg_c_mask = 8582eb4d010SOphir Munk config.hca_attr.qos.flow_meter_reg_c_ids; 8592eb4d010SOphir Munk /* 8602eb4d010SOphir Munk * Meter needs two REG_C's for color match and pre-sfx 8612eb4d010SOphir Munk * flow match. Here get the REG_C for color match. 8622eb4d010SOphir Munk * REG_C_0 and REG_C_1 is reserved for metadata feature. 8632eb4d010SOphir Munk */ 8642eb4d010SOphir Munk reg_c_mask &= 0xfc; 8652eb4d010SOphir Munk if (__builtin_popcount(reg_c_mask) < 1) { 8662eb4d010SOphir Munk priv->mtr_en = 0; 8672eb4d010SOphir Munk DRV_LOG(WARNING, "No available register for" 8682eb4d010SOphir Munk " meter."); 8692eb4d010SOphir Munk } else { 8702eb4d010SOphir Munk priv->mtr_color_reg = ffs(reg_c_mask) - 1 + 8712eb4d010SOphir Munk REG_C_0; 8722eb4d010SOphir Munk priv->mtr_en = 1; 8732eb4d010SOphir Munk priv->mtr_reg_share = 8742eb4d010SOphir Munk config.hca_attr.qos.flow_meter_reg_share; 8752eb4d010SOphir Munk DRV_LOG(DEBUG, "The REG_C meter uses is %d", 8762eb4d010SOphir Munk priv->mtr_color_reg); 8772eb4d010SOphir Munk } 8782eb4d010SOphir Munk } 8792eb4d010SOphir Munk #endif 8802eb4d010SOphir Munk } 8818f848f32SViacheslav Ovsiienko if (config.tx_pp) { 8828f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 8838f848f32SViacheslav Ovsiienko config.hca_attr.dev_freq_khz); 8848f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Packet pacing is %ssupported", 8858f848f32SViacheslav Ovsiienko config.hca_attr.qos.packet_pacing ? "" : "not "); 8868f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 8878f848f32SViacheslav Ovsiienko config.hca_attr.cross_channel ? "" : "not "); 8888f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 8898f848f32SViacheslav Ovsiienko config.hca_attr.wqe_index_ignore ? "" : "not "); 8908f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 8918f848f32SViacheslav Ovsiienko config.hca_attr.non_wire_sq ? "" : "not "); 8928f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 8938f848f32SViacheslav Ovsiienko config.hca_attr.log_max_static_sq_wq ? "" : "not ", 8948f848f32SViacheslav Ovsiienko config.hca_attr.log_max_static_sq_wq); 8958f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 8968f848f32SViacheslav Ovsiienko config.hca_attr.qos.wqe_rate_pp ? "" : "not "); 8978f848f32SViacheslav Ovsiienko if (!config.devx) { 8988f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX is required for packet pacing"); 8998f848f32SViacheslav Ovsiienko err = ENODEV; 9008f848f32SViacheslav Ovsiienko goto error; 9018f848f32SViacheslav Ovsiienko } 9028f848f32SViacheslav Ovsiienko if (!config.hca_attr.qos.packet_pacing) { 9038f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Packet pacing is not supported"); 9048f848f32SViacheslav Ovsiienko err = ENODEV; 9058f848f32SViacheslav Ovsiienko goto error; 9068f848f32SViacheslav Ovsiienko } 9078f848f32SViacheslav Ovsiienko if (!config.hca_attr.cross_channel) { 9088f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Cross channel operations are" 9098f848f32SViacheslav Ovsiienko " required for packet pacing"); 9108f848f32SViacheslav Ovsiienko err = ENODEV; 9118f848f32SViacheslav Ovsiienko goto error; 9128f848f32SViacheslav Ovsiienko } 9138f848f32SViacheslav Ovsiienko if (!config.hca_attr.wqe_index_ignore) { 9148f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE index ignore feature is" 9158f848f32SViacheslav Ovsiienko " required for packet pacing"); 9168f848f32SViacheslav Ovsiienko err = ENODEV; 9178f848f32SViacheslav Ovsiienko goto error; 9188f848f32SViacheslav Ovsiienko } 9198f848f32SViacheslav Ovsiienko if (!config.hca_attr.non_wire_sq) { 9208f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Non-wire SQ feature is" 9218f848f32SViacheslav Ovsiienko " required for packet pacing"); 9228f848f32SViacheslav Ovsiienko err = ENODEV; 9238f848f32SViacheslav Ovsiienko goto error; 9248f848f32SViacheslav Ovsiienko } 9258f848f32SViacheslav Ovsiienko if (!config.hca_attr.log_max_static_sq_wq) { 9268f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Static WQE SQ feature is" 9278f848f32SViacheslav Ovsiienko " required for packet pacing"); 9288f848f32SViacheslav Ovsiienko err = ENODEV; 9298f848f32SViacheslav Ovsiienko goto error; 9308f848f32SViacheslav Ovsiienko } 9318f848f32SViacheslav Ovsiienko if (!config.hca_attr.qos.wqe_rate_pp) { 9328f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE rate mode is required" 9338f848f32SViacheslav Ovsiienko " for packet pacing"); 9348f848f32SViacheslav Ovsiienko err = ENODEV; 9358f848f32SViacheslav Ovsiienko goto error; 9368f848f32SViacheslav Ovsiienko } 9378f848f32SViacheslav Ovsiienko #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 9388f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX does not provide UAR offset," 9398f848f32SViacheslav Ovsiienko " can't create queues for packet pacing"); 9408f848f32SViacheslav Ovsiienko err = ENODEV; 9418f848f32SViacheslav Ovsiienko goto error; 9428f848f32SViacheslav Ovsiienko #endif 9438f848f32SViacheslav Ovsiienko } 944a2854c4dSViacheslav Ovsiienko if (config.devx) { 945a2854c4dSViacheslav Ovsiienko uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 946a2854c4dSViacheslav Ovsiienko 947a2854c4dSViacheslav Ovsiienko err = mlx5_devx_cmd_register_read 948a2854c4dSViacheslav Ovsiienko (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 949a2854c4dSViacheslav Ovsiienko reg, MLX5_ST_SZ_DW(register_mtutc)); 950a2854c4dSViacheslav Ovsiienko if (!err) { 951a2854c4dSViacheslav Ovsiienko uint32_t ts_mode; 952a2854c4dSViacheslav Ovsiienko 953a2854c4dSViacheslav Ovsiienko /* MTUTC register is read successfully. */ 954a2854c4dSViacheslav Ovsiienko ts_mode = MLX5_GET(register_mtutc, reg, 955a2854c4dSViacheslav Ovsiienko time_stamp_mode); 956a2854c4dSViacheslav Ovsiienko if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 957a2854c4dSViacheslav Ovsiienko config.rt_timestamp = 1; 958a2854c4dSViacheslav Ovsiienko } else { 959a2854c4dSViacheslav Ovsiienko /* Kernel does not support register reading. */ 960a2854c4dSViacheslav Ovsiienko if (config.hca_attr.dev_freq_khz == 961a2854c4dSViacheslav Ovsiienko (NS_PER_S / MS_PER_S)) 962a2854c4dSViacheslav Ovsiienko config.rt_timestamp = 1; 963a2854c4dSViacheslav Ovsiienko } 964a2854c4dSViacheslav Ovsiienko } 96550f95b23SSuanming Mou /* 96650f95b23SSuanming Mou * If HW has bug working with tunnel packet decapsulation and 96750f95b23SSuanming Mou * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 96850f95b23SSuanming Mou * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 96950f95b23SSuanming Mou */ 97050f95b23SSuanming Mou if (config.hca_attr.scatter_fcs_w_decap_disable && config.decap_en) 97150f95b23SSuanming Mou config.hw_fcs_strip = 0; 97250f95b23SSuanming Mou DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 97350f95b23SSuanming Mou (config.hw_fcs_strip ? "" : "not ")); 9742eb4d010SOphir Munk if (config.mprq.enabled && mprq) { 9752eb4d010SOphir Munk if (config.mprq.stride_num_n && 9762eb4d010SOphir Munk (config.mprq.stride_num_n > mprq_max_stride_num_n || 9772eb4d010SOphir Munk config.mprq.stride_num_n < mprq_min_stride_num_n)) { 9782eb4d010SOphir Munk config.mprq.stride_num_n = 9792eb4d010SOphir Munk RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, 9802eb4d010SOphir Munk mprq_min_stride_num_n), 9812eb4d010SOphir Munk mprq_max_stride_num_n); 9822eb4d010SOphir Munk DRV_LOG(WARNING, 9832eb4d010SOphir Munk "the number of strides" 9842eb4d010SOphir Munk " for Multi-Packet RQ is out of range," 9852eb4d010SOphir Munk " setting default value (%u)", 9862eb4d010SOphir Munk 1 << config.mprq.stride_num_n); 9872eb4d010SOphir Munk } 9882eb4d010SOphir Munk if (config.mprq.stride_size_n && 9892eb4d010SOphir Munk (config.mprq.stride_size_n > mprq_max_stride_size_n || 9902eb4d010SOphir Munk config.mprq.stride_size_n < mprq_min_stride_size_n)) { 9912eb4d010SOphir Munk config.mprq.stride_size_n = 9922eb4d010SOphir Munk RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, 9932eb4d010SOphir Munk mprq_min_stride_size_n), 9942eb4d010SOphir Munk mprq_max_stride_size_n); 9952eb4d010SOphir Munk DRV_LOG(WARNING, 9962eb4d010SOphir Munk "the size of a stride" 9972eb4d010SOphir Munk " for Multi-Packet RQ is out of range," 9982eb4d010SOphir Munk " setting default value (%u)", 9992eb4d010SOphir Munk 1 << config.mprq.stride_size_n); 10002eb4d010SOphir Munk } 10012eb4d010SOphir Munk config.mprq.min_stride_size_n = mprq_min_stride_size_n; 10022eb4d010SOphir Munk config.mprq.max_stride_size_n = mprq_max_stride_size_n; 10032eb4d010SOphir Munk } else if (config.mprq.enabled && !mprq) { 10042eb4d010SOphir Munk DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 10052eb4d010SOphir Munk config.mprq.enabled = 0; 10062eb4d010SOphir Munk } 10072eb4d010SOphir Munk if (config.max_dump_files_num == 0) 10082eb4d010SOphir Munk config.max_dump_files_num = 128; 10092eb4d010SOphir Munk eth_dev = rte_eth_dev_allocate(name); 10102eb4d010SOphir Munk if (eth_dev == NULL) { 10112eb4d010SOphir Munk DRV_LOG(ERR, "can not allocate rte ethdev"); 10122eb4d010SOphir Munk err = ENOMEM; 10132eb4d010SOphir Munk goto error; 10142eb4d010SOphir Munk } 10152eb4d010SOphir Munk /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */ 10162eb4d010SOphir Munk eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE; 10172eb4d010SOphir Munk if (priv->representor) { 10182eb4d010SOphir Munk eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 10192eb4d010SOphir Munk eth_dev->data->representor_id = priv->representor_id; 10202eb4d010SOphir Munk } 10212eb4d010SOphir Munk /* 10222eb4d010SOphir Munk * Store associated network device interface index. This index 10232eb4d010SOphir Munk * is permanent throughout the lifetime of device. So, we may store 10242eb4d010SOphir Munk * the ifindex here and use the cached value further. 10252eb4d010SOphir Munk */ 10262eb4d010SOphir Munk MLX5_ASSERT(spawn->ifindex); 10272eb4d010SOphir Munk priv->if_index = spawn->ifindex; 10282eb4d010SOphir Munk eth_dev->data->dev_private = priv; 10292eb4d010SOphir Munk priv->dev_data = eth_dev->data; 10302eb4d010SOphir Munk eth_dev->data->mac_addrs = priv->mac; 10312eb4d010SOphir Munk eth_dev->device = dpdk_dev; 10322eb4d010SOphir Munk /* Configure the first MAC address by default. */ 10332eb4d010SOphir Munk if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 10342eb4d010SOphir Munk DRV_LOG(ERR, 10352eb4d010SOphir Munk "port %u cannot get MAC address, is mlx5_en" 10362eb4d010SOphir Munk " loaded? (errno: %s)", 10372eb4d010SOphir Munk eth_dev->data->port_id, strerror(rte_errno)); 10382eb4d010SOphir Munk err = ENODEV; 10392eb4d010SOphir Munk goto error; 10402eb4d010SOphir Munk } 10412eb4d010SOphir Munk DRV_LOG(INFO, 10422eb4d010SOphir Munk "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 10432eb4d010SOphir Munk eth_dev->data->port_id, 10442eb4d010SOphir Munk mac.addr_bytes[0], mac.addr_bytes[1], 10452eb4d010SOphir Munk mac.addr_bytes[2], mac.addr_bytes[3], 10462eb4d010SOphir Munk mac.addr_bytes[4], mac.addr_bytes[5]); 10472eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG 10482eb4d010SOphir Munk { 10492eb4d010SOphir Munk char ifname[IF_NAMESIZE]; 10502eb4d010SOphir Munk 10512eb4d010SOphir Munk if (mlx5_get_ifname(eth_dev, &ifname) == 0) 10522eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 10532eb4d010SOphir Munk eth_dev->data->port_id, ifname); 10542eb4d010SOphir Munk else 10552eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is unknown", 10562eb4d010SOphir Munk eth_dev->data->port_id); 10572eb4d010SOphir Munk } 10582eb4d010SOphir Munk #endif 10592eb4d010SOphir Munk /* Get actual MTU if possible. */ 10602eb4d010SOphir Munk err = mlx5_get_mtu(eth_dev, &priv->mtu); 10612eb4d010SOphir Munk if (err) { 10622eb4d010SOphir Munk err = rte_errno; 10632eb4d010SOphir Munk goto error; 10642eb4d010SOphir Munk } 10652eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 10662eb4d010SOphir Munk priv->mtu); 10672eb4d010SOphir Munk /* Initialize burst functions to prevent crashes before link-up. */ 10682eb4d010SOphir Munk eth_dev->rx_pkt_burst = removed_rx_burst; 10692eb4d010SOphir Munk eth_dev->tx_pkt_burst = removed_tx_burst; 1070042f5c94SOphir Munk eth_dev->dev_ops = &mlx5_os_dev_ops; 10712eb4d010SOphir Munk /* Register MAC address. */ 10722eb4d010SOphir Munk claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 10732eb4d010SOphir Munk if (config.vf && config.vf_nl_en) 10742eb4d010SOphir Munk mlx5_nl_mac_addr_sync(priv->nl_socket_route, 10752eb4d010SOphir Munk mlx5_ifindex(eth_dev), 10762eb4d010SOphir Munk eth_dev->data->mac_addrs, 10772eb4d010SOphir Munk MLX5_MAX_MAC_ADDRESSES); 10782eb4d010SOphir Munk priv->flows = 0; 10792eb4d010SOphir Munk priv->ctrl_flows = 0; 10802eb4d010SOphir Munk TAILQ_INIT(&priv->flow_meters); 10812eb4d010SOphir Munk TAILQ_INIT(&priv->flow_meter_profiles); 10822eb4d010SOphir Munk /* Hint libmlx5 to use PMD allocator for data plane resources */ 108336dabceaSMichael Baum mlx5_glue->dv_set_context_attr(sh->ctx, 108436dabceaSMichael Baum MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 108536dabceaSMichael Baum (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 10862eb4d010SOphir Munk .alloc = &mlx5_alloc_verbs_buf, 10872eb4d010SOphir Munk .free = &mlx5_free_verbs_buf, 10882eb4d010SOphir Munk .data = priv, 108936dabceaSMichael Baum })); 10902eb4d010SOphir Munk /* Bring Ethernet device up. */ 10912eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 10922eb4d010SOphir Munk eth_dev->data->port_id); 10932eb4d010SOphir Munk mlx5_set_link_up(eth_dev); 10942eb4d010SOphir Munk /* 10952eb4d010SOphir Munk * Even though the interrupt handler is not installed yet, 10962eb4d010SOphir Munk * interrupts will still trigger on the async_fd from 10972eb4d010SOphir Munk * Verbs context returned by ibv_open_device(). 10982eb4d010SOphir Munk */ 10992eb4d010SOphir Munk mlx5_link_update(eth_dev, 0); 11002eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 11012eb4d010SOphir Munk if (!(config.hca_attr.eswitch_manager && config.dv_flow_en && 11022eb4d010SOphir Munk (switch_info->representor || switch_info->master))) 11032eb4d010SOphir Munk config.dv_esw_en = 0; 11042eb4d010SOphir Munk #else 11052eb4d010SOphir Munk config.dv_esw_en = 0; 11062eb4d010SOphir Munk #endif 11072eb4d010SOphir Munk /* Detect minimal data bytes to inline. */ 11082eb4d010SOphir Munk mlx5_set_min_inline(spawn, &config); 11092eb4d010SOphir Munk /* Store device configuration on private structure. */ 11102eb4d010SOphir Munk priv->config = config; 11112eb4d010SOphir Munk /* Create context for virtual machine VLAN workaround. */ 11122eb4d010SOphir Munk priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 11132eb4d010SOphir Munk if (config.dv_flow_en) { 11142eb4d010SOphir Munk err = mlx5_alloc_shared_dr(priv); 11152eb4d010SOphir Munk if (err) 11162eb4d010SOphir Munk goto error; 11172eb4d010SOphir Munk /* 11182eb4d010SOphir Munk * RSS id is shared with meter flow id. Meter flow id can only 11192eb4d010SOphir Munk * use the 24 MSB of the register. 11202eb4d010SOphir Munk */ 11212eb4d010SOphir Munk priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >> 11222eb4d010SOphir Munk MLX5_MTR_COLOR_BITS); 11232eb4d010SOphir Munk if (!priv->qrss_id_pool) { 11242eb4d010SOphir Munk DRV_LOG(ERR, "can't create flow id pool"); 11252eb4d010SOphir Munk err = ENOMEM; 11262eb4d010SOphir Munk goto error; 11272eb4d010SOphir Munk } 11282eb4d010SOphir Munk } 11292eb4d010SOphir Munk /* Supported Verbs flow priority number detection. */ 11302eb4d010SOphir Munk err = mlx5_flow_discover_priorities(eth_dev); 11312eb4d010SOphir Munk if (err < 0) { 11322eb4d010SOphir Munk err = -err; 11332eb4d010SOphir Munk goto error; 11342eb4d010SOphir Munk } 11352eb4d010SOphir Munk priv->config.flow_prio = err; 11362eb4d010SOphir Munk if (!priv->config.dv_esw_en && 11372eb4d010SOphir Munk priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 11382eb4d010SOphir Munk DRV_LOG(WARNING, "metadata mode %u is not supported " 11392eb4d010SOphir Munk "(no E-Switch)", priv->config.dv_xmeta_en); 11402eb4d010SOphir Munk priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 11412eb4d010SOphir Munk } 11422eb4d010SOphir Munk mlx5_set_metadata_mask(eth_dev); 11432eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 11442eb4d010SOphir Munk !priv->sh->dv_regc0_mask) { 11452eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 11462eb4d010SOphir Munk "(no metadata reg_c[0] is available)", 11472eb4d010SOphir Munk priv->config.dv_xmeta_en); 11482eb4d010SOphir Munk err = ENOTSUP; 11492eb4d010SOphir Munk goto error; 11502eb4d010SOphir Munk } 11512eb4d010SOphir Munk /* 11522eb4d010SOphir Munk * Allocate the buffer for flow creating, just once. 11532eb4d010SOphir Munk * The allocation must be done before any flow creating. 11542eb4d010SOphir Munk */ 11552eb4d010SOphir Munk mlx5_flow_alloc_intermediate(eth_dev); 11562eb4d010SOphir Munk /* Query availability of metadata reg_c's. */ 11572eb4d010SOphir Munk err = mlx5_flow_discover_mreg_c(eth_dev); 11582eb4d010SOphir Munk if (err < 0) { 11592eb4d010SOphir Munk err = -err; 11602eb4d010SOphir Munk goto error; 11612eb4d010SOphir Munk } 11622eb4d010SOphir Munk if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 11632eb4d010SOphir Munk DRV_LOG(DEBUG, 11642eb4d010SOphir Munk "port %u extensive metadata register is not supported", 11652eb4d010SOphir Munk eth_dev->data->port_id); 11662eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 11672eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 11682eb4d010SOphir Munk "(no metadata registers available)", 11692eb4d010SOphir Munk priv->config.dv_xmeta_en); 11702eb4d010SOphir Munk err = ENOTSUP; 11712eb4d010SOphir Munk goto error; 11722eb4d010SOphir Munk } 11732eb4d010SOphir Munk } 11742eb4d010SOphir Munk if (priv->config.dv_flow_en && 11752eb4d010SOphir Munk priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 11762eb4d010SOphir Munk mlx5_flow_ext_mreg_supported(eth_dev) && 11772eb4d010SOphir Munk priv->sh->dv_regc0_mask) { 11782eb4d010SOphir Munk priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 11792eb4d010SOphir Munk MLX5_FLOW_MREG_HTABLE_SZ); 11802eb4d010SOphir Munk if (!priv->mreg_cp_tbl) { 11812eb4d010SOphir Munk err = ENOMEM; 11822eb4d010SOphir Munk goto error; 11832eb4d010SOphir Munk } 11842eb4d010SOphir Munk } 11852eb4d010SOphir Munk return eth_dev; 11862eb4d010SOphir Munk error: 11872eb4d010SOphir Munk if (priv) { 11882eb4d010SOphir Munk if (priv->mreg_cp_tbl) 11892eb4d010SOphir Munk mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL); 11902eb4d010SOphir Munk if (priv->sh) 11912eb4d010SOphir Munk mlx5_os_free_shared_dr(priv); 11922eb4d010SOphir Munk if (priv->nl_socket_route >= 0) 11932eb4d010SOphir Munk close(priv->nl_socket_route); 11942eb4d010SOphir Munk if (priv->nl_socket_rdma >= 0) 11952eb4d010SOphir Munk close(priv->nl_socket_rdma); 11962eb4d010SOphir Munk if (priv->vmwa_context) 11972eb4d010SOphir Munk mlx5_vlan_vmwa_exit(priv->vmwa_context); 11982eb4d010SOphir Munk if (priv->qrss_id_pool) 11992eb4d010SOphir Munk mlx5_flow_id_pool_release(priv->qrss_id_pool); 12002eb4d010SOphir Munk if (own_domain_id) 12012eb4d010SOphir Munk claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 12022175c4dcSSuanming Mou mlx5_free(priv); 12032eb4d010SOphir Munk if (eth_dev != NULL) 12042eb4d010SOphir Munk eth_dev->data->dev_private = NULL; 12052eb4d010SOphir Munk } 12062eb4d010SOphir Munk if (eth_dev != NULL) { 12072eb4d010SOphir Munk /* mac_addrs must not be freed alone because part of 12082eb4d010SOphir Munk * dev_private 12092eb4d010SOphir Munk **/ 12102eb4d010SOphir Munk eth_dev->data->mac_addrs = NULL; 12112eb4d010SOphir Munk rte_eth_dev_release_port(eth_dev); 12122eb4d010SOphir Munk } 12132eb4d010SOphir Munk if (sh) 121491389890SOphir Munk mlx5_free_shared_dev_ctx(sh); 12152eb4d010SOphir Munk MLX5_ASSERT(err > 0); 12162eb4d010SOphir Munk rte_errno = err; 12172eb4d010SOphir Munk return NULL; 12182eb4d010SOphir Munk } 12192eb4d010SOphir Munk 12202eb4d010SOphir Munk /** 12212eb4d010SOphir Munk * Comparison callback to sort device data. 12222eb4d010SOphir Munk * 12232eb4d010SOphir Munk * This is meant to be used with qsort(). 12242eb4d010SOphir Munk * 12252eb4d010SOphir Munk * @param a[in] 12262eb4d010SOphir Munk * Pointer to pointer to first data object. 12272eb4d010SOphir Munk * @param b[in] 12282eb4d010SOphir Munk * Pointer to pointer to second data object. 12292eb4d010SOphir Munk * 12302eb4d010SOphir Munk * @return 12312eb4d010SOphir Munk * 0 if both objects are equal, less than 0 if the first argument is less 12322eb4d010SOphir Munk * than the second, greater than 0 otherwise. 12332eb4d010SOphir Munk */ 12342eb4d010SOphir Munk static int 12352eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b) 12362eb4d010SOphir Munk { 12372eb4d010SOphir Munk const struct mlx5_switch_info *si_a = 12382eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)a)->info; 12392eb4d010SOphir Munk const struct mlx5_switch_info *si_b = 12402eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)b)->info; 12412eb4d010SOphir Munk int ret; 12422eb4d010SOphir Munk 12432eb4d010SOphir Munk /* Master device first. */ 12442eb4d010SOphir Munk ret = si_b->master - si_a->master; 12452eb4d010SOphir Munk if (ret) 12462eb4d010SOphir Munk return ret; 12472eb4d010SOphir Munk /* Then representor devices. */ 12482eb4d010SOphir Munk ret = si_b->representor - si_a->representor; 12492eb4d010SOphir Munk if (ret) 12502eb4d010SOphir Munk return ret; 12512eb4d010SOphir Munk /* Unidentified devices come last in no specific order. */ 12522eb4d010SOphir Munk if (!si_a->representor) 12532eb4d010SOphir Munk return 0; 12542eb4d010SOphir Munk /* Order representors by name. */ 12552eb4d010SOphir Munk return si_a->port_name - si_b->port_name; 12562eb4d010SOphir Munk } 12572eb4d010SOphir Munk 12582eb4d010SOphir Munk /** 12592eb4d010SOphir Munk * Match PCI information for possible slaves of bonding device. 12602eb4d010SOphir Munk * 12612eb4d010SOphir Munk * @param[in] ibv_dev 12622eb4d010SOphir Munk * Pointer to Infiniband device structure. 12632eb4d010SOphir Munk * @param[in] pci_dev 12642eb4d010SOphir Munk * Pointer to PCI device structure to match PCI address. 12652eb4d010SOphir Munk * @param[in] nl_rdma 12662eb4d010SOphir Munk * Netlink RDMA group socket handle. 12672eb4d010SOphir Munk * 12682eb4d010SOphir Munk * @return 12692eb4d010SOphir Munk * negative value if no bonding device found, otherwise 12702eb4d010SOphir Munk * positive index of slave PF in bonding. 12712eb4d010SOphir Munk */ 12722eb4d010SOphir Munk static int 12732eb4d010SOphir Munk mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, 12742eb4d010SOphir Munk const struct rte_pci_device *pci_dev, 12752eb4d010SOphir Munk int nl_rdma) 12762eb4d010SOphir Munk { 12772eb4d010SOphir Munk char ifname[IF_NAMESIZE + 1]; 12782eb4d010SOphir Munk unsigned int ifindex; 12792eb4d010SOphir Munk unsigned int np, i; 12802eb4d010SOphir Munk FILE *file = NULL; 12812eb4d010SOphir Munk int pf = -1; 12822eb4d010SOphir Munk 12832eb4d010SOphir Munk /* 12842eb4d010SOphir Munk * Try to get master device name. If something goes 12852eb4d010SOphir Munk * wrong suppose the lack of kernel support and no 12862eb4d010SOphir Munk * bonding devices. 12872eb4d010SOphir Munk */ 12882eb4d010SOphir Munk if (nl_rdma < 0) 12892eb4d010SOphir Munk return -1; 12902eb4d010SOphir Munk if (!strstr(ibv_dev->name, "bond")) 12912eb4d010SOphir Munk return -1; 12922eb4d010SOphir Munk np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); 12932eb4d010SOphir Munk if (!np) 12942eb4d010SOphir Munk return -1; 12952eb4d010SOphir Munk /* 12962eb4d010SOphir Munk * The Master device might not be on the predefined 12972eb4d010SOphir Munk * port (not on port index 1, it is not garanted), 12982eb4d010SOphir Munk * we have to scan all Infiniband device port and 12992eb4d010SOphir Munk * find master. 13002eb4d010SOphir Munk */ 13012eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 13022eb4d010SOphir Munk /* Check whether Infiniband port is populated. */ 13032eb4d010SOphir Munk ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); 13042eb4d010SOphir Munk if (!ifindex) 13052eb4d010SOphir Munk continue; 13062eb4d010SOphir Munk if (!if_indextoname(ifindex, ifname)) 13072eb4d010SOphir Munk continue; 13082eb4d010SOphir Munk /* Try to read bonding slave names from sysfs. */ 13092eb4d010SOphir Munk MKSTR(slaves, 13102eb4d010SOphir Munk "/sys/class/net/%s/master/bonding/slaves", ifname); 13112eb4d010SOphir Munk file = fopen(slaves, "r"); 13122eb4d010SOphir Munk if (file) 13132eb4d010SOphir Munk break; 13142eb4d010SOphir Munk } 13152eb4d010SOphir Munk if (!file) 13162eb4d010SOphir Munk return -1; 13172eb4d010SOphir Munk /* Use safe format to check maximal buffer length. */ 13182eb4d010SOphir Munk MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 13192eb4d010SOphir Munk while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 13202eb4d010SOphir Munk char tmp_str[IF_NAMESIZE + 32]; 13212eb4d010SOphir Munk struct rte_pci_addr pci_addr; 13222eb4d010SOphir Munk struct mlx5_switch_info info; 13232eb4d010SOphir Munk 13242eb4d010SOphir Munk /* Process slave interface names in the loop. */ 13252eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 13262eb4d010SOphir Munk "/sys/class/net/%s", ifname); 13272eb4d010SOphir Munk if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { 13282eb4d010SOphir Munk DRV_LOG(WARNING, "can not get PCI address" 13292eb4d010SOphir Munk " for netdev \"%s\"", ifname); 13302eb4d010SOphir Munk continue; 13312eb4d010SOphir Munk } 13322eb4d010SOphir Munk if (pci_dev->addr.domain != pci_addr.domain || 13332eb4d010SOphir Munk pci_dev->addr.bus != pci_addr.bus || 13342eb4d010SOphir Munk pci_dev->addr.devid != pci_addr.devid || 13352eb4d010SOphir Munk pci_dev->addr.function != pci_addr.function) 13362eb4d010SOphir Munk continue; 13372eb4d010SOphir Munk /* Slave interface PCI address match found. */ 13382eb4d010SOphir Munk fclose(file); 13392eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 13402eb4d010SOphir Munk "/sys/class/net/%s/phys_port_name", ifname); 13412eb4d010SOphir Munk file = fopen(tmp_str, "rb"); 13422eb4d010SOphir Munk if (!file) 13432eb4d010SOphir Munk break; 13442eb4d010SOphir Munk info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 13452eb4d010SOphir Munk if (fscanf(file, "%32s", tmp_str) == 1) 13462eb4d010SOphir Munk mlx5_translate_port_name(tmp_str, &info); 13472eb4d010SOphir Munk if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || 13482eb4d010SOphir Munk info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 13492eb4d010SOphir Munk pf = info.port_name; 13502eb4d010SOphir Munk break; 13512eb4d010SOphir Munk } 13522eb4d010SOphir Munk if (file) 13532eb4d010SOphir Munk fclose(file); 13542eb4d010SOphir Munk return pf; 13552eb4d010SOphir Munk } 13562eb4d010SOphir Munk 13572eb4d010SOphir Munk /** 13582eb4d010SOphir Munk * DPDK callback to register a PCI device. 13592eb4d010SOphir Munk * 13602eb4d010SOphir Munk * This function spawns Ethernet devices out of a given PCI device. 13612eb4d010SOphir Munk * 13622eb4d010SOphir Munk * @param[in] pci_drv 13632eb4d010SOphir Munk * PCI driver structure (mlx5_driver). 13642eb4d010SOphir Munk * @param[in] pci_dev 13652eb4d010SOphir Munk * PCI device information. 13662eb4d010SOphir Munk * 13672eb4d010SOphir Munk * @return 13682eb4d010SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 13692eb4d010SOphir Munk */ 13702eb4d010SOphir Munk int 13712eb4d010SOphir Munk mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 13722eb4d010SOphir Munk struct rte_pci_device *pci_dev) 13732eb4d010SOphir Munk { 13742eb4d010SOphir Munk struct ibv_device **ibv_list; 13752eb4d010SOphir Munk /* 13762eb4d010SOphir Munk * Number of found IB Devices matching with requested PCI BDF. 13772eb4d010SOphir Munk * nd != 1 means there are multiple IB devices over the same 13782eb4d010SOphir Munk * PCI device and we have representors and master. 13792eb4d010SOphir Munk */ 13802eb4d010SOphir Munk unsigned int nd = 0; 13812eb4d010SOphir Munk /* 13822eb4d010SOphir Munk * Number of found IB device Ports. nd = 1 and np = 1..n means 13832eb4d010SOphir Munk * we have the single multiport IB device, and there may be 13842eb4d010SOphir Munk * representors attached to some of found ports. 13852eb4d010SOphir Munk */ 13862eb4d010SOphir Munk unsigned int np = 0; 13872eb4d010SOphir Munk /* 13882eb4d010SOphir Munk * Number of DPDK ethernet devices to Spawn - either over 13892eb4d010SOphir Munk * multiple IB devices or multiple ports of single IB device. 13902eb4d010SOphir Munk * Actually this is the number of iterations to spawn. 13912eb4d010SOphir Munk */ 13922eb4d010SOphir Munk unsigned int ns = 0; 13932eb4d010SOphir Munk /* 13942eb4d010SOphir Munk * Bonding device 13952eb4d010SOphir Munk * < 0 - no bonding device (single one) 13962eb4d010SOphir Munk * >= 0 - bonding device (value is slave PF index) 13972eb4d010SOphir Munk */ 13982eb4d010SOphir Munk int bd = -1; 13992eb4d010SOphir Munk struct mlx5_dev_spawn_data *list = NULL; 14002eb4d010SOphir Munk struct mlx5_dev_config dev_config; 14012eb4d010SOphir Munk int ret; 14022eb4d010SOphir Munk 14032eb4d010SOphir Munk if (mlx5_class_get(pci_dev->device.devargs) != MLX5_CLASS_NET) { 14042eb4d010SOphir Munk DRV_LOG(DEBUG, "Skip probing - should be probed by other mlx5" 14052eb4d010SOphir Munk " driver."); 14062eb4d010SOphir Munk return 1; 14072eb4d010SOphir Munk } 14082eb4d010SOphir Munk if (rte_eal_process_type() == RTE_PROC_PRIMARY) 14092eb4d010SOphir Munk mlx5_pmd_socket_init(); 14102eb4d010SOphir Munk ret = mlx5_init_once(); 14112eb4d010SOphir Munk if (ret) { 14122eb4d010SOphir Munk DRV_LOG(ERR, "unable to init PMD global data: %s", 14132eb4d010SOphir Munk strerror(rte_errno)); 14142eb4d010SOphir Munk return -rte_errno; 14152eb4d010SOphir Munk } 14162eb4d010SOphir Munk MLX5_ASSERT(pci_drv == &mlx5_driver); 14172eb4d010SOphir Munk errno = 0; 14182eb4d010SOphir Munk ibv_list = mlx5_glue->get_device_list(&ret); 14192eb4d010SOphir Munk if (!ibv_list) { 14202eb4d010SOphir Munk rte_errno = errno ? errno : ENOSYS; 14212eb4d010SOphir Munk DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 14222eb4d010SOphir Munk return -rte_errno; 14232eb4d010SOphir Munk } 14242eb4d010SOphir Munk /* 14252eb4d010SOphir Munk * First scan the list of all Infiniband devices to find 14262eb4d010SOphir Munk * matching ones, gathering into the list. 14272eb4d010SOphir Munk */ 14282eb4d010SOphir Munk struct ibv_device *ibv_match[ret + 1]; 14292eb4d010SOphir Munk int nl_route = mlx5_nl_init(NETLINK_ROUTE); 14302eb4d010SOphir Munk int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 14312eb4d010SOphir Munk unsigned int i; 14322eb4d010SOphir Munk 14332eb4d010SOphir Munk while (ret-- > 0) { 14342eb4d010SOphir Munk struct rte_pci_addr pci_addr; 14352eb4d010SOphir Munk 14362eb4d010SOphir Munk DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); 14372eb4d010SOphir Munk bd = mlx5_device_bond_pci_match 14382eb4d010SOphir Munk (ibv_list[ret], pci_dev, nl_rdma); 14392eb4d010SOphir Munk if (bd >= 0) { 14402eb4d010SOphir Munk /* 14412eb4d010SOphir Munk * Bonding device detected. Only one match is allowed, 14422eb4d010SOphir Munk * the bonding is supported over multi-port IB device, 14432eb4d010SOphir Munk * there should be no matches on representor PCI 14442eb4d010SOphir Munk * functions or non VF LAG bonding devices with 14452eb4d010SOphir Munk * specified address. 14462eb4d010SOphir Munk */ 14472eb4d010SOphir Munk if (nd) { 14482eb4d010SOphir Munk DRV_LOG(ERR, 14492eb4d010SOphir Munk "multiple PCI match on bonding device" 14502eb4d010SOphir Munk "\"%s\" found", ibv_list[ret]->name); 14512eb4d010SOphir Munk rte_errno = ENOENT; 14522eb4d010SOphir Munk ret = -rte_errno; 14532eb4d010SOphir Munk goto exit; 14542eb4d010SOphir Munk } 14552eb4d010SOphir Munk DRV_LOG(INFO, "PCI information matches for" 14562eb4d010SOphir Munk " slave %d bonding device \"%s\"", 14572eb4d010SOphir Munk bd, ibv_list[ret]->name); 14582eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 14592eb4d010SOphir Munk break; 14602eb4d010SOphir Munk } 14612eb4d010SOphir Munk if (mlx5_dev_to_pci_addr 14622eb4d010SOphir Munk (ibv_list[ret]->ibdev_path, &pci_addr)) 14632eb4d010SOphir Munk continue; 14642eb4d010SOphir Munk if (pci_dev->addr.domain != pci_addr.domain || 14652eb4d010SOphir Munk pci_dev->addr.bus != pci_addr.bus || 14662eb4d010SOphir Munk pci_dev->addr.devid != pci_addr.devid || 14672eb4d010SOphir Munk pci_dev->addr.function != pci_addr.function) 14682eb4d010SOphir Munk continue; 14692eb4d010SOphir Munk DRV_LOG(INFO, "PCI information matches for device \"%s\"", 14702eb4d010SOphir Munk ibv_list[ret]->name); 14712eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 14722eb4d010SOphir Munk } 14732eb4d010SOphir Munk ibv_match[nd] = NULL; 14742eb4d010SOphir Munk if (!nd) { 14752eb4d010SOphir Munk /* No device matches, just complain and bail out. */ 14762eb4d010SOphir Munk DRV_LOG(WARNING, 14772eb4d010SOphir Munk "no Verbs device matches PCI device " PCI_PRI_FMT "," 14782eb4d010SOphir Munk " are kernel drivers loaded?", 14792eb4d010SOphir Munk pci_dev->addr.domain, pci_dev->addr.bus, 14802eb4d010SOphir Munk pci_dev->addr.devid, pci_dev->addr.function); 14812eb4d010SOphir Munk rte_errno = ENOENT; 14822eb4d010SOphir Munk ret = -rte_errno; 14832eb4d010SOphir Munk goto exit; 14842eb4d010SOphir Munk } 14852eb4d010SOphir Munk if (nd == 1) { 14862eb4d010SOphir Munk /* 14872eb4d010SOphir Munk * Found single matching device may have multiple ports. 14882eb4d010SOphir Munk * Each port may be representor, we have to check the port 14892eb4d010SOphir Munk * number and check the representors existence. 14902eb4d010SOphir Munk */ 14912eb4d010SOphir Munk if (nl_rdma >= 0) 14922eb4d010SOphir Munk np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 14932eb4d010SOphir Munk if (!np) 14942eb4d010SOphir Munk DRV_LOG(WARNING, "can not get IB device \"%s\"" 14952eb4d010SOphir Munk " ports number", ibv_match[0]->name); 14962eb4d010SOphir Munk if (bd >= 0 && !np) { 14972eb4d010SOphir Munk DRV_LOG(ERR, "can not get ports" 14982eb4d010SOphir Munk " for bonding device"); 14992eb4d010SOphir Munk rte_errno = ENOENT; 15002eb4d010SOphir Munk ret = -rte_errno; 15012eb4d010SOphir Munk goto exit; 15022eb4d010SOphir Munk } 15032eb4d010SOphir Munk } 15042eb4d010SOphir Munk #ifndef HAVE_MLX5DV_DR_DEVX_PORT 15052eb4d010SOphir Munk if (bd >= 0) { 15062eb4d010SOphir Munk /* 15072eb4d010SOphir Munk * This may happen if there is VF LAG kernel support and 15082eb4d010SOphir Munk * application is compiled with older rdma_core library. 15092eb4d010SOphir Munk */ 15102eb4d010SOphir Munk DRV_LOG(ERR, 15112eb4d010SOphir Munk "No kernel/verbs support for VF LAG bonding found."); 15122eb4d010SOphir Munk rte_errno = ENOTSUP; 15132eb4d010SOphir Munk ret = -rte_errno; 15142eb4d010SOphir Munk goto exit; 15152eb4d010SOphir Munk } 15162eb4d010SOphir Munk #endif 15172eb4d010SOphir Munk /* 15182eb4d010SOphir Munk * Now we can determine the maximal 15192eb4d010SOphir Munk * amount of devices to be spawned. 15202eb4d010SOphir Munk */ 15212175c4dcSSuanming Mou list = mlx5_malloc(MLX5_MEM_ZERO, 15222eb4d010SOphir Munk sizeof(struct mlx5_dev_spawn_data) * 15232eb4d010SOphir Munk (np ? np : nd), 15242175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 15252eb4d010SOphir Munk if (!list) { 15262eb4d010SOphir Munk DRV_LOG(ERR, "spawn data array allocation failure"); 15272eb4d010SOphir Munk rte_errno = ENOMEM; 15282eb4d010SOphir Munk ret = -rte_errno; 15292eb4d010SOphir Munk goto exit; 15302eb4d010SOphir Munk } 15312eb4d010SOphir Munk if (bd >= 0 || np > 1) { 15322eb4d010SOphir Munk /* 15332eb4d010SOphir Munk * Single IB device with multiple ports found, 15342eb4d010SOphir Munk * it may be E-Switch master device and representors. 15352eb4d010SOphir Munk * We have to perform identification through the ports. 15362eb4d010SOphir Munk */ 15372eb4d010SOphir Munk MLX5_ASSERT(nl_rdma >= 0); 15382eb4d010SOphir Munk MLX5_ASSERT(ns == 0); 15392eb4d010SOphir Munk MLX5_ASSERT(nd == 1); 15402eb4d010SOphir Munk MLX5_ASSERT(np); 15412eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 15422eb4d010SOphir Munk list[ns].max_port = np; 1543834a9019SOphir Munk list[ns].phys_port = i; 1544834a9019SOphir Munk list[ns].phys_dev = ibv_match[0]; 15452eb4d010SOphir Munk list[ns].eth_dev = NULL; 15462eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 15472eb4d010SOphir Munk list[ns].pf_bond = bd; 15482eb4d010SOphir Munk list[ns].ifindex = mlx5_nl_ifindex 1549834a9019SOphir Munk (nl_rdma, 1550834a9019SOphir Munk mlx5_os_get_dev_device_name 1551834a9019SOphir Munk (list[ns].phys_dev), i); 15522eb4d010SOphir Munk if (!list[ns].ifindex) { 15532eb4d010SOphir Munk /* 15542eb4d010SOphir Munk * No network interface index found for the 15552eb4d010SOphir Munk * specified port, it means there is no 15562eb4d010SOphir Munk * representor on this port. It's OK, 15572eb4d010SOphir Munk * there can be disabled ports, for example 15582eb4d010SOphir Munk * if sriov_numvfs < sriov_totalvfs. 15592eb4d010SOphir Munk */ 15602eb4d010SOphir Munk continue; 15612eb4d010SOphir Munk } 15622eb4d010SOphir Munk ret = -1; 15632eb4d010SOphir Munk if (nl_route >= 0) 15642eb4d010SOphir Munk ret = mlx5_nl_switch_info 15652eb4d010SOphir Munk (nl_route, 15662eb4d010SOphir Munk list[ns].ifindex, 15672eb4d010SOphir Munk &list[ns].info); 15682eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 15692eb4d010SOphir Munk !list[ns].info.master)) { 15702eb4d010SOphir Munk /* 15712eb4d010SOphir Munk * We failed to recognize representors with 15722eb4d010SOphir Munk * Netlink, let's try to perform the task 15732eb4d010SOphir Munk * with sysfs. 15742eb4d010SOphir Munk */ 15752eb4d010SOphir Munk ret = mlx5_sysfs_switch_info 15762eb4d010SOphir Munk (list[ns].ifindex, 15772eb4d010SOphir Munk &list[ns].info); 15782eb4d010SOphir Munk } 15792eb4d010SOphir Munk if (!ret && bd >= 0) { 15802eb4d010SOphir Munk switch (list[ns].info.name_type) { 15812eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 15822eb4d010SOphir Munk if (list[ns].info.port_name == bd) 15832eb4d010SOphir Munk ns++; 15842eb4d010SOphir Munk break; 1585420bbdaeSViacheslav Ovsiienko case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1586420bbdaeSViacheslav Ovsiienko /* Fallthrough */ 15872eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 15882eb4d010SOphir Munk if (list[ns].info.pf_num == bd) 15892eb4d010SOphir Munk ns++; 15902eb4d010SOphir Munk break; 15912eb4d010SOphir Munk default: 15922eb4d010SOphir Munk break; 15932eb4d010SOphir Munk } 15942eb4d010SOphir Munk continue; 15952eb4d010SOphir Munk } 15962eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 15972eb4d010SOphir Munk list[ns].info.master)) 15982eb4d010SOphir Munk ns++; 15992eb4d010SOphir Munk } 16002eb4d010SOphir Munk if (!ns) { 16012eb4d010SOphir Munk DRV_LOG(ERR, 16022eb4d010SOphir Munk "unable to recognize master/representors" 16032eb4d010SOphir Munk " on the IB device with multiple ports"); 16042eb4d010SOphir Munk rte_errno = ENOENT; 16052eb4d010SOphir Munk ret = -rte_errno; 16062eb4d010SOphir Munk goto exit; 16072eb4d010SOphir Munk } 16082eb4d010SOphir Munk } else { 16092eb4d010SOphir Munk /* 16102eb4d010SOphir Munk * The existence of several matching entries (nd > 1) means 16112eb4d010SOphir Munk * port representors have been instantiated. No existing Verbs 16122eb4d010SOphir Munk * call nor sysfs entries can tell them apart, this can only 16132eb4d010SOphir Munk * be done through Netlink calls assuming kernel drivers are 16142eb4d010SOphir Munk * recent enough to support them. 16152eb4d010SOphir Munk * 16162eb4d010SOphir Munk * In the event of identification failure through Netlink, 16172eb4d010SOphir Munk * try again through sysfs, then: 16182eb4d010SOphir Munk * 16192eb4d010SOphir Munk * 1. A single IB device matches (nd == 1) with single 16202eb4d010SOphir Munk * port (np=0/1) and is not a representor, assume 16212eb4d010SOphir Munk * no switch support. 16222eb4d010SOphir Munk * 16232eb4d010SOphir Munk * 2. Otherwise no safe assumptions can be made; 16242eb4d010SOphir Munk * complain louder and bail out. 16252eb4d010SOphir Munk */ 16262eb4d010SOphir Munk for (i = 0; i != nd; ++i) { 16272eb4d010SOphir Munk memset(&list[ns].info, 0, sizeof(list[ns].info)); 16282eb4d010SOphir Munk list[ns].max_port = 1; 1629834a9019SOphir Munk list[ns].phys_port = 1; 1630834a9019SOphir Munk list[ns].phys_dev = ibv_match[i]; 16312eb4d010SOphir Munk list[ns].eth_dev = NULL; 16322eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 16332eb4d010SOphir Munk list[ns].pf_bond = -1; 16342eb4d010SOphir Munk list[ns].ifindex = 0; 16352eb4d010SOphir Munk if (nl_rdma >= 0) 16362eb4d010SOphir Munk list[ns].ifindex = mlx5_nl_ifindex 1637834a9019SOphir Munk (nl_rdma, 1638834a9019SOphir Munk mlx5_os_get_dev_device_name 1639834a9019SOphir Munk (list[ns].phys_dev), 1); 16402eb4d010SOphir Munk if (!list[ns].ifindex) { 16412eb4d010SOphir Munk char ifname[IF_NAMESIZE]; 16422eb4d010SOphir Munk 16432eb4d010SOphir Munk /* 16442eb4d010SOphir Munk * Netlink failed, it may happen with old 16452eb4d010SOphir Munk * ib_core kernel driver (before 4.16). 16462eb4d010SOphir Munk * We can assume there is old driver because 16472eb4d010SOphir Munk * here we are processing single ports IB 16482eb4d010SOphir Munk * devices. Let's try sysfs to retrieve 16492eb4d010SOphir Munk * the ifindex. The method works for 16502eb4d010SOphir Munk * master device only. 16512eb4d010SOphir Munk */ 16522eb4d010SOphir Munk if (nd > 1) { 16532eb4d010SOphir Munk /* 16542eb4d010SOphir Munk * Multiple devices found, assume 16552eb4d010SOphir Munk * representors, can not distinguish 16562eb4d010SOphir Munk * master/representor and retrieve 16572eb4d010SOphir Munk * ifindex via sysfs. 16582eb4d010SOphir Munk */ 16592eb4d010SOphir Munk continue; 16602eb4d010SOphir Munk } 1661aec086c9SMatan Azrad ret = mlx5_get_ifname_sysfs 1662aec086c9SMatan Azrad (ibv_match[i]->ibdev_path, ifname); 16632eb4d010SOphir Munk if (!ret) 16642eb4d010SOphir Munk list[ns].ifindex = 16652eb4d010SOphir Munk if_nametoindex(ifname); 16662eb4d010SOphir Munk if (!list[ns].ifindex) { 16672eb4d010SOphir Munk /* 16682eb4d010SOphir Munk * No network interface index found 16692eb4d010SOphir Munk * for the specified device, it means 16702eb4d010SOphir Munk * there it is neither representor 16712eb4d010SOphir Munk * nor master. 16722eb4d010SOphir Munk */ 16732eb4d010SOphir Munk continue; 16742eb4d010SOphir Munk } 16752eb4d010SOphir Munk } 16762eb4d010SOphir Munk ret = -1; 16772eb4d010SOphir Munk if (nl_route >= 0) 16782eb4d010SOphir Munk ret = mlx5_nl_switch_info 16792eb4d010SOphir Munk (nl_route, 16802eb4d010SOphir Munk list[ns].ifindex, 16812eb4d010SOphir Munk &list[ns].info); 16822eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 16832eb4d010SOphir Munk !list[ns].info.master)) { 16842eb4d010SOphir Munk /* 16852eb4d010SOphir Munk * We failed to recognize representors with 16862eb4d010SOphir Munk * Netlink, let's try to perform the task 16872eb4d010SOphir Munk * with sysfs. 16882eb4d010SOphir Munk */ 16892eb4d010SOphir Munk ret = mlx5_sysfs_switch_info 16902eb4d010SOphir Munk (list[ns].ifindex, 16912eb4d010SOphir Munk &list[ns].info); 16922eb4d010SOphir Munk } 16932eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 16942eb4d010SOphir Munk list[ns].info.master)) { 16952eb4d010SOphir Munk ns++; 16962eb4d010SOphir Munk } else if ((nd == 1) && 16972eb4d010SOphir Munk !list[ns].info.representor && 16982eb4d010SOphir Munk !list[ns].info.master) { 16992eb4d010SOphir Munk /* 17002eb4d010SOphir Munk * Single IB device with 17012eb4d010SOphir Munk * one physical port and 17022eb4d010SOphir Munk * attached network device. 17032eb4d010SOphir Munk * May be SRIOV is not enabled 17042eb4d010SOphir Munk * or there is no representors. 17052eb4d010SOphir Munk */ 17062eb4d010SOphir Munk DRV_LOG(INFO, "no E-Switch support detected"); 17072eb4d010SOphir Munk ns++; 17082eb4d010SOphir Munk break; 17092eb4d010SOphir Munk } 17102eb4d010SOphir Munk } 17112eb4d010SOphir Munk if (!ns) { 17122eb4d010SOphir Munk DRV_LOG(ERR, 17132eb4d010SOphir Munk "unable to recognize master/representors" 17142eb4d010SOphir Munk " on the multiple IB devices"); 17152eb4d010SOphir Munk rte_errno = ENOENT; 17162eb4d010SOphir Munk ret = -rte_errno; 17172eb4d010SOphir Munk goto exit; 17182eb4d010SOphir Munk } 17192eb4d010SOphir Munk } 17202eb4d010SOphir Munk MLX5_ASSERT(ns); 17212eb4d010SOphir Munk /* 17222eb4d010SOphir Munk * Sort list to probe devices in natural order for users convenience 17232eb4d010SOphir Munk * (i.e. master first, then representors from lowest to highest ID). 17242eb4d010SOphir Munk */ 17252eb4d010SOphir Munk qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 17262eb4d010SOphir Munk /* Default configuration. */ 17272eb4d010SOphir Munk dev_config = (struct mlx5_dev_config){ 17282eb4d010SOphir Munk .hw_padding = 0, 17292eb4d010SOphir Munk .mps = MLX5_ARG_UNSET, 17302eb4d010SOphir Munk .dbnc = MLX5_ARG_UNSET, 17312eb4d010SOphir Munk .rx_vec_en = 1, 17322eb4d010SOphir Munk .txq_inline_max = MLX5_ARG_UNSET, 17332eb4d010SOphir Munk .txq_inline_min = MLX5_ARG_UNSET, 17342eb4d010SOphir Munk .txq_inline_mpw = MLX5_ARG_UNSET, 17352eb4d010SOphir Munk .txqs_inline = MLX5_ARG_UNSET, 17362eb4d010SOphir Munk .vf_nl_en = 1, 17372eb4d010SOphir Munk .mr_ext_memseg_en = 1, 17382eb4d010SOphir Munk .mprq = { 17392eb4d010SOphir Munk .enabled = 0, /* Disabled by default. */ 17402eb4d010SOphir Munk .stride_num_n = 0, 17412eb4d010SOphir Munk .stride_size_n = 0, 17422eb4d010SOphir Munk .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN, 17432eb4d010SOphir Munk .min_rxqs_num = MLX5_MPRQ_MIN_RXQS, 17442eb4d010SOphir Munk }, 17452eb4d010SOphir Munk .dv_esw_en = 1, 17462eb4d010SOphir Munk .dv_flow_en = 1, 174750f95b23SSuanming Mou .decap_en = 1, 17482eb4d010SOphir Munk .log_hp_size = MLX5_ARG_UNSET, 17492eb4d010SOphir Munk }; 17502eb4d010SOphir Munk /* Device specific configuration. */ 17512eb4d010SOphir Munk switch (pci_dev->id.device_id) { 17522eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 17532eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 17542eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 17552eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 17562eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 17572eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 17582eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF: 17592eb4d010SOphir Munk dev_config.vf = 1; 17602eb4d010SOphir Munk break; 17612eb4d010SOphir Munk default: 17622eb4d010SOphir Munk break; 17632eb4d010SOphir Munk } 17642eb4d010SOphir Munk for (i = 0; i != ns; ++i) { 17652eb4d010SOphir Munk uint32_t restore; 17662eb4d010SOphir Munk 17672eb4d010SOphir Munk list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, 17682eb4d010SOphir Munk &list[i], 17692eb4d010SOphir Munk dev_config); 17702eb4d010SOphir Munk if (!list[i].eth_dev) { 17712eb4d010SOphir Munk if (rte_errno != EBUSY && rte_errno != EEXIST) 17722eb4d010SOphir Munk break; 17732eb4d010SOphir Munk /* Device is disabled or already spawned. Ignore it. */ 17742eb4d010SOphir Munk continue; 17752eb4d010SOphir Munk } 17762eb4d010SOphir Munk restore = list[i].eth_dev->data->dev_flags; 17772eb4d010SOphir Munk rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 17782eb4d010SOphir Munk /* Restore non-PCI flags cleared by the above call. */ 17792eb4d010SOphir Munk list[i].eth_dev->data->dev_flags |= restore; 17802eb4d010SOphir Munk rte_eth_dev_probing_finish(list[i].eth_dev); 17812eb4d010SOphir Munk } 17822eb4d010SOphir Munk if (i != ns) { 17832eb4d010SOphir Munk DRV_LOG(ERR, 17842eb4d010SOphir Munk "probe of PCI device " PCI_PRI_FMT " aborted after" 17852eb4d010SOphir Munk " encountering an error: %s", 17862eb4d010SOphir Munk pci_dev->addr.domain, pci_dev->addr.bus, 17872eb4d010SOphir Munk pci_dev->addr.devid, pci_dev->addr.function, 17882eb4d010SOphir Munk strerror(rte_errno)); 17892eb4d010SOphir Munk ret = -rte_errno; 17902eb4d010SOphir Munk /* Roll back. */ 17912eb4d010SOphir Munk while (i--) { 17922eb4d010SOphir Munk if (!list[i].eth_dev) 17932eb4d010SOphir Munk continue; 17942eb4d010SOphir Munk mlx5_dev_close(list[i].eth_dev); 17952eb4d010SOphir Munk /* mac_addrs must not be freed because in dev_private */ 17962eb4d010SOphir Munk list[i].eth_dev->data->mac_addrs = NULL; 17972eb4d010SOphir Munk claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 17982eb4d010SOphir Munk } 17992eb4d010SOphir Munk /* Restore original error. */ 18002eb4d010SOphir Munk rte_errno = -ret; 18012eb4d010SOphir Munk } else { 18022eb4d010SOphir Munk ret = 0; 18032eb4d010SOphir Munk } 18042eb4d010SOphir Munk exit: 18052eb4d010SOphir Munk /* 18062eb4d010SOphir Munk * Do the routine cleanup: 18072eb4d010SOphir Munk * - close opened Netlink sockets 18082eb4d010SOphir Munk * - free allocated spawn data array 18092eb4d010SOphir Munk * - free the Infiniband device list 18102eb4d010SOphir Munk */ 18112eb4d010SOphir Munk if (nl_rdma >= 0) 18122eb4d010SOphir Munk close(nl_rdma); 18132eb4d010SOphir Munk if (nl_route >= 0) 18142eb4d010SOphir Munk close(nl_route); 18152eb4d010SOphir Munk if (list) 18162175c4dcSSuanming Mou mlx5_free(list); 18172eb4d010SOphir Munk MLX5_ASSERT(ibv_list); 18182eb4d010SOphir Munk mlx5_glue->free_device_list(ibv_list); 18192eb4d010SOphir Munk return ret; 18202eb4d010SOphir Munk } 18212eb4d010SOphir Munk 18222eb4d010SOphir Munk static int 18232eb4d010SOphir Munk mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) 18242eb4d010SOphir Munk { 18252eb4d010SOphir Munk char *env; 18262eb4d010SOphir Munk int value; 18272eb4d010SOphir Munk 18282eb4d010SOphir Munk MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 18292eb4d010SOphir Munk /* Get environment variable to store. */ 18302eb4d010SOphir Munk env = getenv(MLX5_SHUT_UP_BF); 18312eb4d010SOphir Munk value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; 18322eb4d010SOphir Munk if (config->dbnc == MLX5_ARG_UNSET) 18332eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); 18342eb4d010SOphir Munk else 18352eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, 18362eb4d010SOphir Munk config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); 18372eb4d010SOphir Munk return value; 18382eb4d010SOphir Munk } 18392eb4d010SOphir Munk 18402eb4d010SOphir Munk static void 18412eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(int value) 18422eb4d010SOphir Munk { 18432eb4d010SOphir Munk MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 18442eb4d010SOphir Munk /* Restore the original environment variable state. */ 18452eb4d010SOphir Munk if (value == MLX5_ARG_UNSET) 18462eb4d010SOphir Munk unsetenv(MLX5_SHUT_UP_BF); 18472eb4d010SOphir Munk else 18482eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); 18492eb4d010SOphir Munk } 18502eb4d010SOphir Munk 18512eb4d010SOphir Munk /** 18522eb4d010SOphir Munk * Extract pdn of PD object using DV API. 18532eb4d010SOphir Munk * 18542eb4d010SOphir Munk * @param[in] pd 18552eb4d010SOphir Munk * Pointer to the verbs PD object. 18562eb4d010SOphir Munk * @param[out] pdn 18572eb4d010SOphir Munk * Pointer to the PD object number variable. 18582eb4d010SOphir Munk * 18592eb4d010SOphir Munk * @return 18602eb4d010SOphir Munk * 0 on success, error value otherwise. 18612eb4d010SOphir Munk */ 18622eb4d010SOphir Munk int 18632eb4d010SOphir Munk mlx5_os_get_pdn(void *pd, uint32_t *pdn) 18642eb4d010SOphir Munk { 18652eb4d010SOphir Munk #ifdef HAVE_IBV_FLOW_DV_SUPPORT 18662eb4d010SOphir Munk struct mlx5dv_obj obj; 18672eb4d010SOphir Munk struct mlx5dv_pd pd_info; 18682eb4d010SOphir Munk int ret = 0; 18692eb4d010SOphir Munk 18702eb4d010SOphir Munk obj.pd.in = pd; 18712eb4d010SOphir Munk obj.pd.out = &pd_info; 18722eb4d010SOphir Munk ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 18732eb4d010SOphir Munk if (ret) { 18742eb4d010SOphir Munk DRV_LOG(DEBUG, "Fail to get PD object info"); 18752eb4d010SOphir Munk return ret; 18762eb4d010SOphir Munk } 18772eb4d010SOphir Munk *pdn = pd_info.pdn; 18782eb4d010SOphir Munk return 0; 18792eb4d010SOphir Munk #else 18802eb4d010SOphir Munk (void)pd; 18812eb4d010SOphir Munk (void)pdn; 18822eb4d010SOphir Munk return -ENOTSUP; 18832eb4d010SOphir Munk #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 18842eb4d010SOphir Munk } 18852eb4d010SOphir Munk 18862eb4d010SOphir Munk /** 18872eb4d010SOphir Munk * Function API to open IB device. 18882eb4d010SOphir Munk * 18892eb4d010SOphir Munk * This function calls the Linux glue APIs to open a device. 18902eb4d010SOphir Munk * 18912eb4d010SOphir Munk * @param[in] spawn 18922eb4d010SOphir Munk * Pointer to the IB device attributes (name, port, etc). 18932eb4d010SOphir Munk * @param[out] config 18942eb4d010SOphir Munk * Pointer to device configuration structure. 18952eb4d010SOphir Munk * @param[out] sh 18962eb4d010SOphir Munk * Pointer to shared context structure. 18972eb4d010SOphir Munk * 18982eb4d010SOphir Munk * @return 18992eb4d010SOphir Munk * 0 on success, a positive error value otherwise. 19002eb4d010SOphir Munk */ 19012eb4d010SOphir Munk int 19022eb4d010SOphir Munk mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 19032eb4d010SOphir Munk const struct mlx5_dev_config *config, 19042eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh) 19052eb4d010SOphir Munk { 19062eb4d010SOphir Munk int dbmap_env; 19072eb4d010SOphir Munk int err = 0; 1908d133f4cdSViacheslav Ovsiienko 1909d133f4cdSViacheslav Ovsiienko sh->numa_node = spawn->pci_dev->device.numa_node; 1910d133f4cdSViacheslav Ovsiienko pthread_mutex_init(&sh->txpp.mutex, NULL); 19112eb4d010SOphir Munk /* 19122eb4d010SOphir Munk * Configure environment variable "MLX5_BF_SHUT_UP" 19132eb4d010SOphir Munk * before the device creation. The rdma_core library 19142eb4d010SOphir Munk * checks the variable at device creation and 19152eb4d010SOphir Munk * stores the result internally. 19162eb4d010SOphir Munk */ 19172eb4d010SOphir Munk dbmap_env = mlx5_config_doorbell_mapping_env(config); 19182eb4d010SOphir Munk /* Try to open IB device with DV first, then usual Verbs. */ 19192eb4d010SOphir Munk errno = 0; 1920834a9019SOphir Munk sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); 19212eb4d010SOphir Munk if (sh->ctx) { 19222eb4d010SOphir Munk sh->devx = 1; 19232eb4d010SOphir Munk DRV_LOG(DEBUG, "DevX is supported"); 19242eb4d010SOphir Munk /* The device is created, no need for environment. */ 19252eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(dbmap_env); 19262eb4d010SOphir Munk } else { 19272eb4d010SOphir Munk /* The environment variable is still configured. */ 1928834a9019SOphir Munk sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 19292eb4d010SOphir Munk err = errno ? errno : ENODEV; 19302eb4d010SOphir Munk /* 19312eb4d010SOphir Munk * The environment variable is not needed anymore, 19322eb4d010SOphir Munk * all device creation attempts are completed. 19332eb4d010SOphir Munk */ 19342eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(dbmap_env); 19352eb4d010SOphir Munk if (!sh->ctx) 19362eb4d010SOphir Munk return err; 19372eb4d010SOphir Munk DRV_LOG(DEBUG, "DevX is NOT supported"); 19382eb4d010SOphir Munk err = 0; 19392eb4d010SOphir Munk } 19402eb4d010SOphir Munk return err; 19412eb4d010SOphir Munk } 19422eb4d010SOphir Munk 19432eb4d010SOphir Munk /** 19442eb4d010SOphir Munk * Install shared asynchronous device events handler. 19452eb4d010SOphir Munk * This function is implemented to support event sharing 19462eb4d010SOphir Munk * between multiple ports of single IB device. 19472eb4d010SOphir Munk * 19482eb4d010SOphir Munk * @param sh 19492eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 19502eb4d010SOphir Munk */ 19512eb4d010SOphir Munk void 19522eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 19532eb4d010SOphir Munk { 19542eb4d010SOphir Munk int ret; 19552eb4d010SOphir Munk int flags; 19562eb4d010SOphir Munk 19572eb4d010SOphir Munk sh->intr_handle.fd = -1; 19582eb4d010SOphir Munk flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); 19592eb4d010SOphir Munk ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, 19602eb4d010SOphir Munk F_SETFL, flags | O_NONBLOCK); 19612eb4d010SOphir Munk if (ret) { 19622eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor async event" 19632eb4d010SOphir Munk " queue"); 19642eb4d010SOphir Munk } else { 19652eb4d010SOphir Munk sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; 19662eb4d010SOphir Munk sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 19672eb4d010SOphir Munk if (rte_intr_callback_register(&sh->intr_handle, 19682eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh)) { 19692eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the shared interrupt."); 19702eb4d010SOphir Munk sh->intr_handle.fd = -1; 19712eb4d010SOphir Munk } 19722eb4d010SOphir Munk } 19732eb4d010SOphir Munk if (sh->devx) { 19742eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 19752eb4d010SOphir Munk sh->intr_handle_devx.fd = -1; 197621b7c452SOphir Munk sh->devx_comp = 197721b7c452SOphir Munk (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); 197821b7c452SOphir Munk struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 197921b7c452SOphir Munk if (!devx_comp) { 19802eb4d010SOphir Munk DRV_LOG(INFO, "failed to allocate devx_comp."); 19812eb4d010SOphir Munk return; 19822eb4d010SOphir Munk } 198321b7c452SOphir Munk flags = fcntl(devx_comp->fd, F_GETFL); 198421b7c452SOphir Munk ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 19852eb4d010SOphir Munk if (ret) { 19862eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor" 19872eb4d010SOphir Munk " devx comp"); 19882eb4d010SOphir Munk return; 19892eb4d010SOphir Munk } 199021b7c452SOphir Munk sh->intr_handle_devx.fd = devx_comp->fd; 19912eb4d010SOphir Munk sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 19922eb4d010SOphir Munk if (rte_intr_callback_register(&sh->intr_handle_devx, 19932eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh)) { 19942eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the devx shared" 19952eb4d010SOphir Munk " interrupt."); 19962eb4d010SOphir Munk sh->intr_handle_devx.fd = -1; 19972eb4d010SOphir Munk } 19982eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */ 19992eb4d010SOphir Munk } 20002eb4d010SOphir Munk } 20012eb4d010SOphir Munk 20022eb4d010SOphir Munk /** 20032eb4d010SOphir Munk * Uninstall shared asynchronous device events handler. 20042eb4d010SOphir Munk * This function is implemented to support event sharing 20052eb4d010SOphir Munk * between multiple ports of single IB device. 20062eb4d010SOphir Munk * 20072eb4d010SOphir Munk * @param dev 20082eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 20092eb4d010SOphir Munk */ 20102eb4d010SOphir Munk void 20112eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 20122eb4d010SOphir Munk { 20132eb4d010SOphir Munk if (sh->intr_handle.fd >= 0) 20142eb4d010SOphir Munk mlx5_intr_callback_unregister(&sh->intr_handle, 20152eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh); 20162eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 20172eb4d010SOphir Munk if (sh->intr_handle_devx.fd >= 0) 20182eb4d010SOphir Munk rte_intr_callback_unregister(&sh->intr_handle_devx, 20192eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh); 20202eb4d010SOphir Munk if (sh->devx_comp) 20212eb4d010SOphir Munk mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 20222eb4d010SOphir Munk #endif 20232eb4d010SOphir Munk } 2024042f5c94SOphir Munk 202573bf9235SOphir Munk /** 202673bf9235SOphir Munk * Read statistics by a named counter. 202773bf9235SOphir Munk * 202873bf9235SOphir Munk * @param[in] priv 202973bf9235SOphir Munk * Pointer to the private device data structure. 203073bf9235SOphir Munk * @param[in] ctr_name 203173bf9235SOphir Munk * Pointer to the name of the statistic counter to read 203273bf9235SOphir Munk * @param[out] stat 203373bf9235SOphir Munk * Pointer to read statistic value. 203473bf9235SOphir Munk * @return 203573bf9235SOphir Munk * 0 on success and stat is valud, 1 if failed to read the value 203673bf9235SOphir Munk * rte_errno is set. 203773bf9235SOphir Munk * 203873bf9235SOphir Munk */ 203973bf9235SOphir Munk int 204073bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 204173bf9235SOphir Munk uint64_t *stat) 204273bf9235SOphir Munk { 204373bf9235SOphir Munk int fd; 204473bf9235SOphir Munk 204573bf9235SOphir Munk if (priv->sh) { 204673bf9235SOphir Munk MKSTR(path, "%s/ports/%d/hw_counters/%s", 204773bf9235SOphir Munk priv->sh->ibdev_path, 204873bf9235SOphir Munk priv->dev_port, 204973bf9235SOphir Munk ctr_name); 205073bf9235SOphir Munk fd = open(path, O_RDONLY); 205173bf9235SOphir Munk if (fd != -1) { 205273bf9235SOphir Munk char buf[21] = {'\0'}; 205373bf9235SOphir Munk ssize_t n = read(fd, buf, sizeof(buf)); 205473bf9235SOphir Munk 205573bf9235SOphir Munk close(fd); 205673bf9235SOphir Munk if (n != -1) { 205773bf9235SOphir Munk *stat = strtoull(buf, NULL, 10); 205873bf9235SOphir Munk return 0; 205973bf9235SOphir Munk } 206073bf9235SOphir Munk } 206173bf9235SOphir Munk } 206273bf9235SOphir Munk *stat = 0; 206373bf9235SOphir Munk return 1; 206473bf9235SOphir Munk } 206573bf9235SOphir Munk 206673bf9235SOphir Munk /** 206773bf9235SOphir Munk * Read device counters table. 206873bf9235SOphir Munk * 206973bf9235SOphir Munk * @param dev 207073bf9235SOphir Munk * Pointer to Ethernet device. 207173bf9235SOphir Munk * @param[out] stats 207273bf9235SOphir Munk * Counters table output buffer. 207373bf9235SOphir Munk * 207473bf9235SOphir Munk * @return 207573bf9235SOphir Munk * 0 on success and stats is filled, negative errno value otherwise and 207673bf9235SOphir Munk * rte_errno is set. 207773bf9235SOphir Munk */ 207873bf9235SOphir Munk int 207973bf9235SOphir Munk mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats) 208073bf9235SOphir Munk { 208173bf9235SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 208273bf9235SOphir Munk struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl; 208373bf9235SOphir Munk unsigned int i; 208473bf9235SOphir Munk struct ifreq ifr; 208573bf9235SOphir Munk unsigned int stats_sz = xstats_ctrl->stats_n * sizeof(uint64_t); 208673bf9235SOphir Munk unsigned char et_stat_buf[sizeof(struct ethtool_stats) + stats_sz]; 208773bf9235SOphir Munk struct ethtool_stats *et_stats = (struct ethtool_stats *)et_stat_buf; 208873bf9235SOphir Munk int ret; 208973bf9235SOphir Munk 209073bf9235SOphir Munk et_stats->cmd = ETHTOOL_GSTATS; 209173bf9235SOphir Munk et_stats->n_stats = xstats_ctrl->stats_n; 209273bf9235SOphir Munk ifr.ifr_data = (caddr_t)et_stats; 209373bf9235SOphir Munk ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 209473bf9235SOphir Munk if (ret) { 209573bf9235SOphir Munk DRV_LOG(WARNING, 209673bf9235SOphir Munk "port %u unable to read statistic values from device", 209773bf9235SOphir Munk dev->data->port_id); 209873bf9235SOphir Munk return ret; 209973bf9235SOphir Munk } 210073bf9235SOphir Munk for (i = 0; i != xstats_ctrl->mlx5_stats_n; ++i) { 210173bf9235SOphir Munk if (xstats_ctrl->info[i].dev) { 210273bf9235SOphir Munk ret = mlx5_os_read_dev_stat(priv, 210373bf9235SOphir Munk xstats_ctrl->info[i].ctr_name, 210473bf9235SOphir Munk &stats[i]); 210573bf9235SOphir Munk /* return last xstats counter if fail to read. */ 210673bf9235SOphir Munk if (ret == 0) 210773bf9235SOphir Munk xstats_ctrl->xstats[i] = stats[i]; 210873bf9235SOphir Munk else 210973bf9235SOphir Munk stats[i] = xstats_ctrl->xstats[i]; 211073bf9235SOphir Munk } else { 211173bf9235SOphir Munk stats[i] = (uint64_t) 211273bf9235SOphir Munk et_stats->data[xstats_ctrl->dev_table_idx[i]]; 211373bf9235SOphir Munk } 211473bf9235SOphir Munk } 211573bf9235SOphir Munk return 0; 211673bf9235SOphir Munk } 211773bf9235SOphir Munk 211873bf9235SOphir Munk /** 211973bf9235SOphir Munk * Query the number of statistics provided by ETHTOOL. 212073bf9235SOphir Munk * 212173bf9235SOphir Munk * @param dev 212273bf9235SOphir Munk * Pointer to Ethernet device. 212373bf9235SOphir Munk * 212473bf9235SOphir Munk * @return 212573bf9235SOphir Munk * Number of statistics on success, negative errno value otherwise and 212673bf9235SOphir Munk * rte_errno is set. 212773bf9235SOphir Munk */ 212873bf9235SOphir Munk int 212973bf9235SOphir Munk mlx5_os_get_stats_n(struct rte_eth_dev *dev) 213073bf9235SOphir Munk { 213173bf9235SOphir Munk struct ethtool_drvinfo drvinfo; 213273bf9235SOphir Munk struct ifreq ifr; 213373bf9235SOphir Munk int ret; 213473bf9235SOphir Munk 213573bf9235SOphir Munk drvinfo.cmd = ETHTOOL_GDRVINFO; 213673bf9235SOphir Munk ifr.ifr_data = (caddr_t)&drvinfo; 213773bf9235SOphir Munk ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 213873bf9235SOphir Munk if (ret) { 213973bf9235SOphir Munk DRV_LOG(WARNING, "port %u unable to query number of statistics", 214073bf9235SOphir Munk dev->data->port_id); 214173bf9235SOphir Munk return ret; 214273bf9235SOphir Munk } 214373bf9235SOphir Munk return drvinfo.n_stats; 214473bf9235SOphir Munk } 214573bf9235SOphir Munk 214673bf9235SOphir Munk static const struct mlx5_counter_ctrl mlx5_counters_init[] = { 214773bf9235SOphir Munk { 214873bf9235SOphir Munk .dpdk_name = "rx_port_unicast_bytes", 214973bf9235SOphir Munk .ctr_name = "rx_vport_unicast_bytes", 215073bf9235SOphir Munk }, 215173bf9235SOphir Munk { 215273bf9235SOphir Munk .dpdk_name = "rx_port_multicast_bytes", 215373bf9235SOphir Munk .ctr_name = "rx_vport_multicast_bytes", 215473bf9235SOphir Munk }, 215573bf9235SOphir Munk { 215673bf9235SOphir Munk .dpdk_name = "rx_port_broadcast_bytes", 215773bf9235SOphir Munk .ctr_name = "rx_vport_broadcast_bytes", 215873bf9235SOphir Munk }, 215973bf9235SOphir Munk { 216073bf9235SOphir Munk .dpdk_name = "rx_port_unicast_packets", 216173bf9235SOphir Munk .ctr_name = "rx_vport_unicast_packets", 216273bf9235SOphir Munk }, 216373bf9235SOphir Munk { 216473bf9235SOphir Munk .dpdk_name = "rx_port_multicast_packets", 216573bf9235SOphir Munk .ctr_name = "rx_vport_multicast_packets", 216673bf9235SOphir Munk }, 216773bf9235SOphir Munk { 216873bf9235SOphir Munk .dpdk_name = "rx_port_broadcast_packets", 216973bf9235SOphir Munk .ctr_name = "rx_vport_broadcast_packets", 217073bf9235SOphir Munk }, 217173bf9235SOphir Munk { 217273bf9235SOphir Munk .dpdk_name = "tx_port_unicast_bytes", 217373bf9235SOphir Munk .ctr_name = "tx_vport_unicast_bytes", 217473bf9235SOphir Munk }, 217573bf9235SOphir Munk { 217673bf9235SOphir Munk .dpdk_name = "tx_port_multicast_bytes", 217773bf9235SOphir Munk .ctr_name = "tx_vport_multicast_bytes", 217873bf9235SOphir Munk }, 217973bf9235SOphir Munk { 218073bf9235SOphir Munk .dpdk_name = "tx_port_broadcast_bytes", 218173bf9235SOphir Munk .ctr_name = "tx_vport_broadcast_bytes", 218273bf9235SOphir Munk }, 218373bf9235SOphir Munk { 218473bf9235SOphir Munk .dpdk_name = "tx_port_unicast_packets", 218573bf9235SOphir Munk .ctr_name = "tx_vport_unicast_packets", 218673bf9235SOphir Munk }, 218773bf9235SOphir Munk { 218873bf9235SOphir Munk .dpdk_name = "tx_port_multicast_packets", 218973bf9235SOphir Munk .ctr_name = "tx_vport_multicast_packets", 219073bf9235SOphir Munk }, 219173bf9235SOphir Munk { 219273bf9235SOphir Munk .dpdk_name = "tx_port_broadcast_packets", 219373bf9235SOphir Munk .ctr_name = "tx_vport_broadcast_packets", 219473bf9235SOphir Munk }, 219573bf9235SOphir Munk { 219673bf9235SOphir Munk .dpdk_name = "rx_wqe_err", 219773bf9235SOphir Munk .ctr_name = "rx_wqe_err", 219873bf9235SOphir Munk }, 219973bf9235SOphir Munk { 220073bf9235SOphir Munk .dpdk_name = "rx_crc_errors_phy", 220173bf9235SOphir Munk .ctr_name = "rx_crc_errors_phy", 220273bf9235SOphir Munk }, 220373bf9235SOphir Munk { 220473bf9235SOphir Munk .dpdk_name = "rx_in_range_len_errors_phy", 220573bf9235SOphir Munk .ctr_name = "rx_in_range_len_errors_phy", 220673bf9235SOphir Munk }, 220773bf9235SOphir Munk { 220873bf9235SOphir Munk .dpdk_name = "rx_symbol_err_phy", 220973bf9235SOphir Munk .ctr_name = "rx_symbol_err_phy", 221073bf9235SOphir Munk }, 221173bf9235SOphir Munk { 221273bf9235SOphir Munk .dpdk_name = "tx_errors_phy", 221373bf9235SOphir Munk .ctr_name = "tx_errors_phy", 221473bf9235SOphir Munk }, 221573bf9235SOphir Munk { 221673bf9235SOphir Munk .dpdk_name = "rx_out_of_buffer", 221773bf9235SOphir Munk .ctr_name = "out_of_buffer", 221873bf9235SOphir Munk .dev = 1, 221973bf9235SOphir Munk }, 222073bf9235SOphir Munk { 222173bf9235SOphir Munk .dpdk_name = "tx_packets_phy", 222273bf9235SOphir Munk .ctr_name = "tx_packets_phy", 222373bf9235SOphir Munk }, 222473bf9235SOphir Munk { 222573bf9235SOphir Munk .dpdk_name = "rx_packets_phy", 222673bf9235SOphir Munk .ctr_name = "rx_packets_phy", 222773bf9235SOphir Munk }, 222873bf9235SOphir Munk { 222973bf9235SOphir Munk .dpdk_name = "tx_discards_phy", 223073bf9235SOphir Munk .ctr_name = "tx_discards_phy", 223173bf9235SOphir Munk }, 223273bf9235SOphir Munk { 223373bf9235SOphir Munk .dpdk_name = "rx_discards_phy", 223473bf9235SOphir Munk .ctr_name = "rx_discards_phy", 223573bf9235SOphir Munk }, 223673bf9235SOphir Munk { 223773bf9235SOphir Munk .dpdk_name = "tx_bytes_phy", 223873bf9235SOphir Munk .ctr_name = "tx_bytes_phy", 223973bf9235SOphir Munk }, 224073bf9235SOphir Munk { 224173bf9235SOphir Munk .dpdk_name = "rx_bytes_phy", 224273bf9235SOphir Munk .ctr_name = "rx_bytes_phy", 224373bf9235SOphir Munk }, 224473bf9235SOphir Munk /* Representor only */ 224573bf9235SOphir Munk { 224673bf9235SOphir Munk .dpdk_name = "rx_packets", 224773bf9235SOphir Munk .ctr_name = "vport_rx_packets", 224873bf9235SOphir Munk }, 224973bf9235SOphir Munk { 225073bf9235SOphir Munk .dpdk_name = "rx_bytes", 225173bf9235SOphir Munk .ctr_name = "vport_rx_bytes", 225273bf9235SOphir Munk }, 225373bf9235SOphir Munk { 225473bf9235SOphir Munk .dpdk_name = "tx_packets", 225573bf9235SOphir Munk .ctr_name = "vport_tx_packets", 225673bf9235SOphir Munk }, 225773bf9235SOphir Munk { 225873bf9235SOphir Munk .dpdk_name = "tx_bytes", 225973bf9235SOphir Munk .ctr_name = "vport_tx_bytes", 226073bf9235SOphir Munk }, 226173bf9235SOphir Munk }; 226273bf9235SOphir Munk 226373bf9235SOphir Munk static const unsigned int xstats_n = RTE_DIM(mlx5_counters_init); 226473bf9235SOphir Munk 226573bf9235SOphir Munk /** 226673bf9235SOphir Munk * Init the structures to read device counters. 226773bf9235SOphir Munk * 226873bf9235SOphir Munk * @param dev 226973bf9235SOphir Munk * Pointer to Ethernet device. 227073bf9235SOphir Munk */ 227173bf9235SOphir Munk void 227273bf9235SOphir Munk mlx5_os_stats_init(struct rte_eth_dev *dev) 227373bf9235SOphir Munk { 227473bf9235SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 227573bf9235SOphir Munk struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl; 227673bf9235SOphir Munk struct mlx5_stats_ctrl *stats_ctrl = &priv->stats_ctrl; 227773bf9235SOphir Munk unsigned int i; 227873bf9235SOphir Munk unsigned int j; 227973bf9235SOphir Munk struct ifreq ifr; 228073bf9235SOphir Munk struct ethtool_gstrings *strings = NULL; 228173bf9235SOphir Munk unsigned int dev_stats_n; 228273bf9235SOphir Munk unsigned int str_sz; 228373bf9235SOphir Munk int ret; 228473bf9235SOphir Munk 228573bf9235SOphir Munk /* So that it won't aggregate for each init. */ 228673bf9235SOphir Munk xstats_ctrl->mlx5_stats_n = 0; 228773bf9235SOphir Munk ret = mlx5_os_get_stats_n(dev); 228873bf9235SOphir Munk if (ret < 0) { 228973bf9235SOphir Munk DRV_LOG(WARNING, "port %u no extended statistics available", 229073bf9235SOphir Munk dev->data->port_id); 229173bf9235SOphir Munk return; 229273bf9235SOphir Munk } 229373bf9235SOphir Munk dev_stats_n = ret; 229473bf9235SOphir Munk /* Allocate memory to grab stat names and values. */ 229573bf9235SOphir Munk str_sz = dev_stats_n * ETH_GSTRING_LEN; 229673bf9235SOphir Munk strings = (struct ethtool_gstrings *) 22972175c4dcSSuanming Mou mlx5_malloc(0, str_sz + sizeof(struct ethtool_gstrings), 0, 22982175c4dcSSuanming Mou SOCKET_ID_ANY); 229973bf9235SOphir Munk if (!strings) { 230073bf9235SOphir Munk DRV_LOG(WARNING, "port %u unable to allocate memory for xstats", 230173bf9235SOphir Munk dev->data->port_id); 230273bf9235SOphir Munk return; 230373bf9235SOphir Munk } 230473bf9235SOphir Munk strings->cmd = ETHTOOL_GSTRINGS; 230573bf9235SOphir Munk strings->string_set = ETH_SS_STATS; 230673bf9235SOphir Munk strings->len = dev_stats_n; 230773bf9235SOphir Munk ifr.ifr_data = (caddr_t)strings; 230873bf9235SOphir Munk ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 230973bf9235SOphir Munk if (ret) { 231073bf9235SOphir Munk DRV_LOG(WARNING, "port %u unable to get statistic names", 231173bf9235SOphir Munk dev->data->port_id); 231273bf9235SOphir Munk goto free; 231373bf9235SOphir Munk } 231473bf9235SOphir Munk for (i = 0; i != dev_stats_n; ++i) { 231573bf9235SOphir Munk const char *curr_string = (const char *) 231673bf9235SOphir Munk &strings->data[i * ETH_GSTRING_LEN]; 231773bf9235SOphir Munk 231873bf9235SOphir Munk for (j = 0; j != xstats_n; ++j) { 231973bf9235SOphir Munk if (!strcmp(mlx5_counters_init[j].ctr_name, 232073bf9235SOphir Munk curr_string)) { 232173bf9235SOphir Munk unsigned int idx = xstats_ctrl->mlx5_stats_n++; 232273bf9235SOphir Munk 232373bf9235SOphir Munk xstats_ctrl->dev_table_idx[idx] = i; 232473bf9235SOphir Munk xstats_ctrl->info[idx] = mlx5_counters_init[j]; 232573bf9235SOphir Munk break; 232673bf9235SOphir Munk } 232773bf9235SOphir Munk } 232873bf9235SOphir Munk } 232973bf9235SOphir Munk /* Add dev counters. */ 233073bf9235SOphir Munk for (i = 0; i != xstats_n; ++i) { 233173bf9235SOphir Munk if (mlx5_counters_init[i].dev) { 233273bf9235SOphir Munk unsigned int idx = xstats_ctrl->mlx5_stats_n++; 233373bf9235SOphir Munk 233473bf9235SOphir Munk xstats_ctrl->info[idx] = mlx5_counters_init[i]; 233573bf9235SOphir Munk xstats_ctrl->hw_stats[idx] = 0; 233673bf9235SOphir Munk } 233773bf9235SOphir Munk } 233873bf9235SOphir Munk MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS); 233973bf9235SOphir Munk xstats_ctrl->stats_n = dev_stats_n; 234073bf9235SOphir Munk /* Copy to base at first time. */ 234173bf9235SOphir Munk ret = mlx5_os_read_dev_counters(dev, xstats_ctrl->base); 234273bf9235SOphir Munk if (ret) 234373bf9235SOphir Munk DRV_LOG(ERR, "port %u cannot read device counters: %s", 234473bf9235SOphir Munk dev->data->port_id, strerror(rte_errno)); 234573bf9235SOphir Munk mlx5_os_read_dev_stat(priv, "out_of_buffer", &stats_ctrl->imissed_base); 234673bf9235SOphir Munk stats_ctrl->imissed = 0; 234773bf9235SOphir Munk free: 23482175c4dcSSuanming Mou mlx5_free(strings); 234973bf9235SOphir Munk } 235073bf9235SOphir Munk 2351d5ed8aa9SOphir Munk /** 2352d5ed8aa9SOphir Munk * Set the reg_mr and dereg_mr call backs 2353d5ed8aa9SOphir Munk * 2354d5ed8aa9SOphir Munk * @param reg_mr_cb[out] 2355d5ed8aa9SOphir Munk * Pointer to reg_mr func 2356d5ed8aa9SOphir Munk * @param dereg_mr_cb[out] 2357d5ed8aa9SOphir Munk * Pointer to dereg_mr func 2358d5ed8aa9SOphir Munk * 2359d5ed8aa9SOphir Munk */ 2360d5ed8aa9SOphir Munk void 2361d5ed8aa9SOphir Munk mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 2362d5ed8aa9SOphir Munk mlx5_dereg_mr_t *dereg_mr_cb) 2363d5ed8aa9SOphir Munk { 23644f96d913SOphir Munk *reg_mr_cb = mlx5_verbs_ops.reg_mr; 23654f96d913SOphir Munk *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; 2366d5ed8aa9SOphir Munk } 2367d5ed8aa9SOphir Munk 2368042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_ops = { 2369042f5c94SOphir Munk .dev_configure = mlx5_dev_configure, 2370042f5c94SOphir Munk .dev_start = mlx5_dev_start, 2371042f5c94SOphir Munk .dev_stop = mlx5_dev_stop, 2372042f5c94SOphir Munk .dev_set_link_down = mlx5_set_link_down, 2373042f5c94SOphir Munk .dev_set_link_up = mlx5_set_link_up, 2374042f5c94SOphir Munk .dev_close = mlx5_dev_close, 2375042f5c94SOphir Munk .promiscuous_enable = mlx5_promiscuous_enable, 2376042f5c94SOphir Munk .promiscuous_disable = mlx5_promiscuous_disable, 2377042f5c94SOphir Munk .allmulticast_enable = mlx5_allmulticast_enable, 2378042f5c94SOphir Munk .allmulticast_disable = mlx5_allmulticast_disable, 2379042f5c94SOphir Munk .link_update = mlx5_link_update, 2380042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2381042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2382042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2383042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2384042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2385042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2386042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2387b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2388042f5c94SOphir Munk .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2389042f5c94SOphir Munk .vlan_filter_set = mlx5_vlan_filter_set, 2390042f5c94SOphir Munk .rx_queue_setup = mlx5_rx_queue_setup, 2391042f5c94SOphir Munk .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2392042f5c94SOphir Munk .tx_queue_setup = mlx5_tx_queue_setup, 2393042f5c94SOphir Munk .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2394042f5c94SOphir Munk .rx_queue_release = mlx5_rx_queue_release, 2395042f5c94SOphir Munk .tx_queue_release = mlx5_tx_queue_release, 2396042f5c94SOphir Munk .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2397042f5c94SOphir Munk .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2398042f5c94SOphir Munk .mac_addr_remove = mlx5_mac_addr_remove, 2399042f5c94SOphir Munk .mac_addr_add = mlx5_mac_addr_add, 2400042f5c94SOphir Munk .mac_addr_set = mlx5_mac_addr_set, 2401042f5c94SOphir Munk .set_mc_addr_list = mlx5_set_mc_addr_list, 2402042f5c94SOphir Munk .mtu_set = mlx5_dev_set_mtu, 2403042f5c94SOphir Munk .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2404042f5c94SOphir Munk .vlan_offload_set = mlx5_vlan_offload_set, 2405042f5c94SOphir Munk .reta_update = mlx5_dev_rss_reta_update, 2406042f5c94SOphir Munk .reta_query = mlx5_dev_rss_reta_query, 2407042f5c94SOphir Munk .rss_hash_update = mlx5_rss_hash_update, 2408042f5c94SOphir Munk .rss_hash_conf_get = mlx5_rss_hash_conf_get, 2409042f5c94SOphir Munk .filter_ctrl = mlx5_dev_filter_ctrl, 2410042f5c94SOphir Munk .rx_descriptor_status = mlx5_rx_descriptor_status, 2411042f5c94SOphir Munk .tx_descriptor_status = mlx5_tx_descriptor_status, 2412042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2413042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2414042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2415042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2416042f5c94SOphir Munk .rx_queue_count = mlx5_rx_queue_count, 2417042f5c94SOphir Munk .rx_queue_intr_enable = mlx5_rx_intr_enable, 2418042f5c94SOphir Munk .rx_queue_intr_disable = mlx5_rx_intr_disable, 2419042f5c94SOphir Munk .is_removed = mlx5_is_removed, 2420042f5c94SOphir Munk .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, 2421042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2422042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2423042f5c94SOphir Munk .hairpin_cap_get = mlx5_hairpin_cap_get, 2424042f5c94SOphir Munk .mtr_ops_get = mlx5_flow_meter_ops_get, 2425042f5c94SOphir Munk }; 2426042f5c94SOphir Munk 2427042f5c94SOphir Munk /* Available operations from secondary process. */ 2428042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_sec_ops = { 2429042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2430042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2431042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2432042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2433042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2434042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2435042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2436b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2437042f5c94SOphir Munk .rx_descriptor_status = mlx5_rx_descriptor_status, 2438042f5c94SOphir Munk .tx_descriptor_status = mlx5_tx_descriptor_status, 2439042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2440042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2441042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2442042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2443042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2444042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2445042f5c94SOphir Munk }; 2446042f5c94SOphir Munk 2447042f5c94SOphir Munk /* Available operations in flow isolated mode. */ 2448042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_ops_isolate = { 2449042f5c94SOphir Munk .dev_configure = mlx5_dev_configure, 2450042f5c94SOphir Munk .dev_start = mlx5_dev_start, 2451042f5c94SOphir Munk .dev_stop = mlx5_dev_stop, 2452042f5c94SOphir Munk .dev_set_link_down = mlx5_set_link_down, 2453042f5c94SOphir Munk .dev_set_link_up = mlx5_set_link_up, 2454042f5c94SOphir Munk .dev_close = mlx5_dev_close, 2455042f5c94SOphir Munk .promiscuous_enable = mlx5_promiscuous_enable, 2456042f5c94SOphir Munk .promiscuous_disable = mlx5_promiscuous_disable, 2457042f5c94SOphir Munk .allmulticast_enable = mlx5_allmulticast_enable, 2458042f5c94SOphir Munk .allmulticast_disable = mlx5_allmulticast_disable, 2459042f5c94SOphir Munk .link_update = mlx5_link_update, 2460042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2461042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2462042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2463042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2464042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2465042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2466042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2467b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2468042f5c94SOphir Munk .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2469042f5c94SOphir Munk .vlan_filter_set = mlx5_vlan_filter_set, 2470042f5c94SOphir Munk .rx_queue_setup = mlx5_rx_queue_setup, 2471042f5c94SOphir Munk .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2472042f5c94SOphir Munk .tx_queue_setup = mlx5_tx_queue_setup, 2473042f5c94SOphir Munk .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2474042f5c94SOphir Munk .rx_queue_release = mlx5_rx_queue_release, 2475042f5c94SOphir Munk .tx_queue_release = mlx5_tx_queue_release, 2476042f5c94SOphir Munk .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2477042f5c94SOphir Munk .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2478042f5c94SOphir Munk .mac_addr_remove = mlx5_mac_addr_remove, 2479042f5c94SOphir Munk .mac_addr_add = mlx5_mac_addr_add, 2480042f5c94SOphir Munk .mac_addr_set = mlx5_mac_addr_set, 2481042f5c94SOphir Munk .set_mc_addr_list = mlx5_set_mc_addr_list, 2482042f5c94SOphir Munk .mtu_set = mlx5_dev_set_mtu, 2483042f5c94SOphir Munk .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2484042f5c94SOphir Munk .vlan_offload_set = mlx5_vlan_offload_set, 2485042f5c94SOphir Munk .filter_ctrl = mlx5_dev_filter_ctrl, 2486042f5c94SOphir Munk .rx_descriptor_status = mlx5_rx_descriptor_status, 2487042f5c94SOphir Munk .tx_descriptor_status = mlx5_tx_descriptor_status, 2488042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2489042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2490042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2491042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2492042f5c94SOphir Munk .rx_queue_intr_enable = mlx5_rx_intr_enable, 2493042f5c94SOphir Munk .rx_queue_intr_disable = mlx5_rx_intr_disable, 2494042f5c94SOphir Munk .is_removed = mlx5_is_removed, 2495042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2496042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2497042f5c94SOphir Munk .hairpin_cap_get = mlx5_hairpin_cap_get, 2498042f5c94SOphir Munk .mtr_ops_get = mlx5_flow_meter_ops_get, 2499042f5c94SOphir Munk }; 2500