1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause 2f44b09f9SOphir Munk * Copyright 2015 6WIND S.A. 3f44b09f9SOphir Munk * Copyright 2020 Mellanox Technologies, Ltd 4f44b09f9SOphir Munk */ 5f44b09f9SOphir Munk 6f44b09f9SOphir Munk #include <stddef.h> 7f44b09f9SOphir Munk #include <unistd.h> 8f44b09f9SOphir Munk #include <string.h> 9f44b09f9SOphir Munk #include <stdint.h> 10f44b09f9SOphir Munk #include <stdlib.h> 11f44b09f9SOphir Munk #include <errno.h> 12f44b09f9SOphir Munk #include <net/if.h> 13f44b09f9SOphir Munk #include <linux/rtnetlink.h> 1473bf9235SOphir Munk #include <linux/sockios.h> 1573bf9235SOphir Munk #include <linux/ethtool.h> 16f44b09f9SOphir Munk #include <fcntl.h> 17f44b09f9SOphir Munk 18f44b09f9SOphir Munk #include <rte_malloc.h> 19f44b09f9SOphir Munk #include <rte_ethdev_driver.h> 20f44b09f9SOphir Munk #include <rte_ethdev_pci.h> 21f44b09f9SOphir Munk #include <rte_pci.h> 22f44b09f9SOphir Munk #include <rte_bus_pci.h> 23f44b09f9SOphir Munk #include <rte_common.h> 24f44b09f9SOphir Munk #include <rte_kvargs.h> 25f44b09f9SOphir Munk #include <rte_rwlock.h> 26f44b09f9SOphir Munk #include <rte_spinlock.h> 27f44b09f9SOphir Munk #include <rte_string_fns.h> 28f44b09f9SOphir Munk #include <rte_alarm.h> 292aba9fc7SOphir Munk #include <rte_eal_paging.h> 30f44b09f9SOphir Munk 31f44b09f9SOphir Munk #include <mlx5_glue.h> 32f44b09f9SOphir Munk #include <mlx5_devx_cmds.h> 33f44b09f9SOphir Munk #include <mlx5_common.h> 342eb4d010SOphir Munk #include <mlx5_common_mp.h> 35d5ed8aa9SOphir Munk #include <mlx5_common_mr.h> 365522da6bSSuanming Mou #include <mlx5_malloc.h> 37f44b09f9SOphir Munk 38f44b09f9SOphir Munk #include "mlx5_defs.h" 39f44b09f9SOphir Munk #include "mlx5.h" 40391b8bccSOphir Munk #include "mlx5_common_os.h" 41f44b09f9SOphir Munk #include "mlx5_utils.h" 42f44b09f9SOphir Munk #include "mlx5_rxtx.h" 43f44b09f9SOphir Munk #include "mlx5_autoconf.h" 44f44b09f9SOphir Munk #include "mlx5_mr.h" 45f44b09f9SOphir Munk #include "mlx5_flow.h" 46f44b09f9SOphir Munk #include "rte_pmd_mlx5.h" 474f96d913SOphir Munk #include "mlx5_verbs.h" 48f00f6562SOphir Munk #include "mlx5_nl.h" 496deb19e1SMichael Baum #include "mlx5_devx.h" 50f44b09f9SOphir Munk 512eb4d010SOphir Munk #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 522eb4d010SOphir Munk 532eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW 542eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2) 552eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3) 562eb4d010SOphir Munk #endif 572eb4d010SOphir Munk 582eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP 592eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4) 602eb4d010SOphir Munk #endif 612eb4d010SOphir Munk 622e86c4e5SOphir Munk static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 632e86c4e5SOphir Munk 642e86c4e5SOphir Munk /* Spinlock for mlx5_shared_data allocation. */ 652e86c4e5SOphir Munk static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 662e86c4e5SOphir Munk 672e86c4e5SOphir Munk /* Process local data for secondary processes. */ 682e86c4e5SOphir Munk static struct mlx5_local_data mlx5_local_data; 692e86c4e5SOphir Munk 70f44b09f9SOphir Munk /** 7108d1838fSDekel Peled * Set the completion channel file descriptor interrupt as non-blocking. 7208d1838fSDekel Peled * 7308d1838fSDekel Peled * @param[in] rxq_obj 7408d1838fSDekel Peled * Pointer to RQ channel object, which includes the channel fd 7508d1838fSDekel Peled * 7608d1838fSDekel Peled * @param[out] fd 7708d1838fSDekel Peled * The file descriptor (representing the intetrrupt) used in this channel. 7808d1838fSDekel Peled * 7908d1838fSDekel Peled * @return 8008d1838fSDekel Peled * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 8108d1838fSDekel Peled */ 8208d1838fSDekel Peled int 8308d1838fSDekel Peled mlx5_os_set_nonblock_channel_fd(int fd) 8408d1838fSDekel Peled { 8508d1838fSDekel Peled int flags; 8608d1838fSDekel Peled 8708d1838fSDekel Peled flags = fcntl(fd, F_GETFL); 8808d1838fSDekel Peled return fcntl(fd, F_SETFL, flags | O_NONBLOCK); 8908d1838fSDekel Peled } 9008d1838fSDekel Peled 9108d1838fSDekel Peled /** 92e85f623eSOphir Munk * Get mlx5 device attributes. The glue function query_device_ex() is called 93e85f623eSOphir Munk * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5 94e85f623eSOphir Munk * device attributes from the glue out parameter. 95e85f623eSOphir Munk * 96e85f623eSOphir Munk * @param dev 97e85f623eSOphir Munk * Pointer to ibv context. 98e85f623eSOphir Munk * 99e85f623eSOphir Munk * @param device_attr 100e85f623eSOphir Munk * Pointer to mlx5 device attributes. 101e85f623eSOphir Munk * 102e85f623eSOphir Munk * @return 103e85f623eSOphir Munk * 0 on success, non zero error number otherwise 104e85f623eSOphir Munk */ 105e85f623eSOphir Munk int 106e85f623eSOphir Munk mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 107e85f623eSOphir Munk { 108e85f623eSOphir Munk int err; 109e85f623eSOphir Munk struct ibv_device_attr_ex attr_ex; 110e85f623eSOphir Munk memset(device_attr, 0, sizeof(*device_attr)); 111e85f623eSOphir Munk err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex); 112e85f623eSOphir Munk if (err) 113e85f623eSOphir Munk return err; 114e85f623eSOphir Munk 115e85f623eSOphir Munk device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex; 116e85f623eSOphir Munk device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr; 117e85f623eSOphir Munk device_attr->max_sge = attr_ex.orig_attr.max_sge; 118e85f623eSOphir Munk device_attr->max_cq = attr_ex.orig_attr.max_cq; 119e85f623eSOphir Munk device_attr->max_qp = attr_ex.orig_attr.max_qp; 120e85f623eSOphir Munk device_attr->raw_packet_caps = attr_ex.raw_packet_caps; 121e85f623eSOphir Munk device_attr->max_rwq_indirection_table_size = 122e85f623eSOphir Munk attr_ex.rss_caps.max_rwq_indirection_table_size; 123e85f623eSOphir Munk device_attr->max_tso = attr_ex.tso_caps.max_tso; 124e85f623eSOphir Munk device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts; 125e85f623eSOphir Munk 126e85f623eSOphir Munk struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 127e85f623eSOphir Munk err = mlx5_glue->dv_query_device(ctx, &dv_attr); 128e85f623eSOphir Munk if (err) 129e85f623eSOphir Munk return err; 130e85f623eSOphir Munk 131e85f623eSOphir Munk device_attr->flags = dv_attr.flags; 132e85f623eSOphir Munk device_attr->comp_mask = dv_attr.comp_mask; 133e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 134e85f623eSOphir Munk device_attr->sw_parsing_offloads = 135e85f623eSOphir Munk dv_attr.sw_parsing_caps.sw_parsing_offloads; 136e85f623eSOphir Munk #endif 137e85f623eSOphir Munk device_attr->min_single_stride_log_num_of_bytes = 138e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes; 139e85f623eSOphir Munk device_attr->max_single_stride_log_num_of_bytes = 140e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes; 141e85f623eSOphir Munk device_attr->min_single_wqe_log_num_of_strides = 142e85f623eSOphir Munk dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides; 143e85f623eSOphir Munk device_attr->max_single_wqe_log_num_of_strides = 144e85f623eSOphir Munk dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides; 145e85f623eSOphir Munk device_attr->stride_supported_qpts = 146e85f623eSOphir Munk dv_attr.striding_rq_caps.supported_qpts; 147e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 148e85f623eSOphir Munk device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps; 149e85f623eSOphir Munk #endif 150e85f623eSOphir Munk 151e85f623eSOphir Munk return err; 152e85f623eSOphir Munk } 1532eb4d010SOphir Munk 1542eb4d010SOphir Munk /** 1552eb4d010SOphir Munk * Verbs callback to allocate a memory. This function should allocate the space 1562eb4d010SOphir Munk * according to the size provided residing inside a huge page. 1572eb4d010SOphir Munk * Please note that all allocation must respect the alignment from libmlx5 1582aba9fc7SOphir Munk * (i.e. currently rte_mem_page_size()). 1592eb4d010SOphir Munk * 1602eb4d010SOphir Munk * @param[in] size 1612eb4d010SOphir Munk * The size in bytes of the memory to allocate. 1622eb4d010SOphir Munk * @param[in] data 1632eb4d010SOphir Munk * A pointer to the callback data. 1642eb4d010SOphir Munk * 1652eb4d010SOphir Munk * @return 1662eb4d010SOphir Munk * Allocated buffer, NULL otherwise and rte_errno is set. 1672eb4d010SOphir Munk */ 1682eb4d010SOphir Munk static void * 1692eb4d010SOphir Munk mlx5_alloc_verbs_buf(size_t size, void *data) 1702eb4d010SOphir Munk { 1712eb4d010SOphir Munk struct mlx5_priv *priv = data; 1722eb4d010SOphir Munk void *ret; 1732eb4d010SOphir Munk unsigned int socket = SOCKET_ID_ANY; 1742aba9fc7SOphir Munk size_t alignment = rte_mem_page_size(); 1752aba9fc7SOphir Munk if (alignment == (size_t)-1) { 1762aba9fc7SOphir Munk DRV_LOG(ERR, "Failed to get mem page size"); 1772aba9fc7SOphir Munk rte_errno = ENOMEM; 1782aba9fc7SOphir Munk return NULL; 1792aba9fc7SOphir Munk } 1802eb4d010SOphir Munk 1812eb4d010SOphir Munk if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { 1822eb4d010SOphir Munk const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 1832eb4d010SOphir Munk 1842eb4d010SOphir Munk socket = ctrl->socket; 1852eb4d010SOphir Munk } else if (priv->verbs_alloc_ctx.type == 1862eb4d010SOphir Munk MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) { 1872eb4d010SOphir Munk const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; 1882eb4d010SOphir Munk 1892eb4d010SOphir Munk socket = ctrl->socket; 1902eb4d010SOphir Munk } 1912eb4d010SOphir Munk MLX5_ASSERT(data != NULL); 1922175c4dcSSuanming Mou ret = mlx5_malloc(0, size, alignment, socket); 1932eb4d010SOphir Munk if (!ret && size) 1942eb4d010SOphir Munk rte_errno = ENOMEM; 1952eb4d010SOphir Munk return ret; 1962eb4d010SOphir Munk } 1972eb4d010SOphir Munk 1982eb4d010SOphir Munk /** 1992eb4d010SOphir Munk * Verbs callback to free a memory. 2002eb4d010SOphir Munk * 2012eb4d010SOphir Munk * @param[in] ptr 2022eb4d010SOphir Munk * A pointer to the memory to free. 2032eb4d010SOphir Munk * @param[in] data 2042eb4d010SOphir Munk * A pointer to the callback data. 2052eb4d010SOphir Munk */ 2062eb4d010SOphir Munk static void 2072eb4d010SOphir Munk mlx5_free_verbs_buf(void *ptr, void *data __rte_unused) 2082eb4d010SOphir Munk { 2092eb4d010SOphir Munk MLX5_ASSERT(data != NULL); 2102175c4dcSSuanming Mou mlx5_free(ptr); 2112eb4d010SOphir Munk } 2122eb4d010SOphir Munk 2132eb4d010SOphir Munk /** 2142eb4d010SOphir Munk * Initialize DR related data within private structure. 2152eb4d010SOphir Munk * Routine checks the reference counter and does actual 2162eb4d010SOphir Munk * resources creation/initialization only if counter is zero. 2172eb4d010SOphir Munk * 2182eb4d010SOphir Munk * @param[in] priv 2192eb4d010SOphir Munk * Pointer to the private device data structure. 2202eb4d010SOphir Munk * 2212eb4d010SOphir Munk * @return 2222eb4d010SOphir Munk * Zero on success, positive error code otherwise. 2232eb4d010SOphir Munk */ 2242eb4d010SOphir Munk static int 2252eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv) 2262eb4d010SOphir Munk { 2272eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = priv->sh; 228291140c6SSuanming Mou char s[MLX5_HLIST_NAMESIZE] __rte_unused; 22916dbba25SXueming Li int err; 2302eb4d010SOphir Munk 23116dbba25SXueming Li MLX5_ASSERT(sh && sh->refcnt); 23216dbba25SXueming Li if (sh->refcnt > 1) 23316dbba25SXueming Li return 0; 2342eb4d010SOphir Munk err = mlx5_alloc_table_hash_list(priv); 2352eb4d010SOphir Munk if (err) 236291140c6SSuanming Mou goto error; 237291140c6SSuanming Mou /* The resources below are only valid with DV support. */ 238291140c6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT 2392eb4d010SOphir Munk /* Create tags hash list table. */ 2402eb4d010SOphir Munk snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name); 241e69a5922SXueming Li sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0, 242fe3f8c52SXueming Li MLX5_HLIST_WRITE_MOST, 243fe3f8c52SXueming Li flow_dv_tag_create_cb, NULL, 244fe3f8c52SXueming Li flow_dv_tag_remove_cb); 2452eb4d010SOphir Munk if (!sh->tag_table) { 24663783b01SDavid Marchand DRV_LOG(ERR, "tags with hash creation failed."); 2472eb4d010SOphir Munk err = ENOMEM; 2482eb4d010SOphir Munk goto error; 2492eb4d010SOphir Munk } 250fe3f8c52SXueming Li sh->tag_table->ctx = sh; 2513fe88961SSuanming Mou snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name); 252e69a5922SXueming Li sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ, 253*16a7dbc4SXueming Li 0, MLX5_HLIST_WRITE_MOST | 254*16a7dbc4SXueming Li MLX5_HLIST_DIRECT_KEY, 255*16a7dbc4SXueming Li flow_dv_modify_create_cb, 256*16a7dbc4SXueming Li flow_dv_modify_match_cb, 257*16a7dbc4SXueming Li flow_dv_modify_remove_cb); 2583fe88961SSuanming Mou if (!sh->modify_cmds) { 2593fe88961SSuanming Mou DRV_LOG(ERR, "hdr modify hash creation failed"); 2603fe88961SSuanming Mou err = ENOMEM; 2613fe88961SSuanming Mou goto error; 2623fe88961SSuanming Mou } 263*16a7dbc4SXueming Li sh->modify_cmds->ctx = sh; 264bf615b07SSuanming Mou snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name); 265bf615b07SSuanming Mou sh->encaps_decaps = mlx5_hlist_create(s, 266e69a5922SXueming Li MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ, 267e69a5922SXueming Li 0, 0, NULL, NULL, NULL); 268bf615b07SSuanming Mou if (!sh->encaps_decaps) { 269bf615b07SSuanming Mou DRV_LOG(ERR, "encap decap hash creation failed"); 270bf615b07SSuanming Mou err = ENOMEM; 271bf615b07SSuanming Mou goto error; 272bf615b07SSuanming Mou } 273291140c6SSuanming Mou #endif 2742eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 2752eb4d010SOphir Munk void *domain; 2762eb4d010SOphir Munk 2772eb4d010SOphir Munk /* Reference counter is zero, we should initialize structures. */ 2782eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain(sh->ctx, 2792eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_RX); 2802eb4d010SOphir Munk if (!domain) { 2812eb4d010SOphir Munk DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed"); 2822eb4d010SOphir Munk err = errno; 2832eb4d010SOphir Munk goto error; 2842eb4d010SOphir Munk } 2852eb4d010SOphir Munk sh->rx_domain = domain; 2862eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain(sh->ctx, 2872eb4d010SOphir Munk MLX5DV_DR_DOMAIN_TYPE_NIC_TX); 2882eb4d010SOphir Munk if (!domain) { 2892eb4d010SOphir Munk DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed"); 2902eb4d010SOphir Munk err = errno; 2912eb4d010SOphir Munk goto error; 2922eb4d010SOphir Munk } 2932eb4d010SOphir Munk pthread_mutex_init(&sh->dv_mutex, NULL); 2942eb4d010SOphir Munk sh->tx_domain = domain; 2952eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 2962eb4d010SOphir Munk if (priv->config.dv_esw_en) { 2972eb4d010SOphir Munk domain = mlx5_glue->dr_create_domain 2982eb4d010SOphir Munk (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB); 2992eb4d010SOphir Munk if (!domain) { 3002eb4d010SOphir Munk DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed"); 3012eb4d010SOphir Munk err = errno; 3022eb4d010SOphir Munk goto error; 3032eb4d010SOphir Munk } 3042eb4d010SOphir Munk sh->fdb_domain = domain; 3052eb4d010SOphir Munk sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop(); 3062eb4d010SOphir Munk } 3072eb4d010SOphir Munk #endif 3084ec6360dSGregory Etelson if (!sh->tunnel_hub) 3094ec6360dSGregory Etelson err = mlx5_alloc_tunnel_hub(sh); 3104ec6360dSGregory Etelson if (err) { 3114ec6360dSGregory Etelson DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err); 3124ec6360dSGregory Etelson goto error; 3134ec6360dSGregory Etelson } 3142eb4d010SOphir Munk if (priv->config.reclaim_mode == MLX5_RCM_AGGR) { 3152eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1); 3162eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1); 3172eb4d010SOphir Munk if (sh->fdb_domain) 3182eb4d010SOphir Munk mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1); 3192eb4d010SOphir Munk } 3202eb4d010SOphir Munk sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan(); 3212eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 322b80726dcSSuanming Mou sh->default_miss_action = 323b80726dcSSuanming Mou mlx5_glue->dr_create_flow_action_default_miss(); 324b80726dcSSuanming Mou if (!sh->default_miss_action) 325b80726dcSSuanming Mou DRV_LOG(WARNING, "Default miss action is not supported."); 3262eb4d010SOphir Munk return 0; 3272eb4d010SOphir Munk error: 3282eb4d010SOphir Munk /* Rollback the created objects. */ 3292eb4d010SOphir Munk if (sh->rx_domain) { 3302eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 3312eb4d010SOphir Munk sh->rx_domain = NULL; 3322eb4d010SOphir Munk } 3332eb4d010SOphir Munk if (sh->tx_domain) { 3342eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 3352eb4d010SOphir Munk sh->tx_domain = NULL; 3362eb4d010SOphir Munk } 3372eb4d010SOphir Munk if (sh->fdb_domain) { 3382eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 3392eb4d010SOphir Munk sh->fdb_domain = NULL; 3402eb4d010SOphir Munk } 3412eb4d010SOphir Munk if (sh->esw_drop_action) { 3422eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->esw_drop_action); 3432eb4d010SOphir Munk sh->esw_drop_action = NULL; 3442eb4d010SOphir Munk } 3452eb4d010SOphir Munk if (sh->pop_vlan_action) { 3462eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 3472eb4d010SOphir Munk sh->pop_vlan_action = NULL; 3482eb4d010SOphir Munk } 349bf615b07SSuanming Mou if (sh->encaps_decaps) { 350e69a5922SXueming Li mlx5_hlist_destroy(sh->encaps_decaps); 351bf615b07SSuanming Mou sh->encaps_decaps = NULL; 352bf615b07SSuanming Mou } 3533fe88961SSuanming Mou if (sh->modify_cmds) { 354e69a5922SXueming Li mlx5_hlist_destroy(sh->modify_cmds); 3553fe88961SSuanming Mou sh->modify_cmds = NULL; 3563fe88961SSuanming Mou } 3572eb4d010SOphir Munk if (sh->tag_table) { 3582eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 359e69a5922SXueming Li mlx5_hlist_destroy(sh->tag_table); 3602eb4d010SOphir Munk sh->tag_table = NULL; 3612eb4d010SOphir Munk } 3624ec6360dSGregory Etelson if (sh->tunnel_hub) { 3634ec6360dSGregory Etelson mlx5_release_tunnel_hub(sh, priv->dev_port); 3644ec6360dSGregory Etelson sh->tunnel_hub = NULL; 3654ec6360dSGregory Etelson } 3662eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 3672eb4d010SOphir Munk return err; 3682eb4d010SOphir Munk } 3692eb4d010SOphir Munk 3702eb4d010SOphir Munk /** 3712eb4d010SOphir Munk * Destroy DR related data within private structure. 3722eb4d010SOphir Munk * 3732eb4d010SOphir Munk * @param[in] priv 3742eb4d010SOphir Munk * Pointer to the private device data structure. 3752eb4d010SOphir Munk */ 3762eb4d010SOphir Munk void 3772eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv) 3782eb4d010SOphir Munk { 37916dbba25SXueming Li struct mlx5_dev_ctx_shared *sh = priv->sh; 3802eb4d010SOphir Munk 38116dbba25SXueming Li MLX5_ASSERT(sh && sh->refcnt); 38216dbba25SXueming Li if (sh->refcnt > 1) 3832eb4d010SOphir Munk return; 3842eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR 3852eb4d010SOphir Munk if (sh->rx_domain) { 3862eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->rx_domain); 3872eb4d010SOphir Munk sh->rx_domain = NULL; 3882eb4d010SOphir Munk } 3892eb4d010SOphir Munk if (sh->tx_domain) { 3902eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->tx_domain); 3912eb4d010SOphir Munk sh->tx_domain = NULL; 3922eb4d010SOphir Munk } 3932eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 3942eb4d010SOphir Munk if (sh->fdb_domain) { 3952eb4d010SOphir Munk mlx5_glue->dr_destroy_domain(sh->fdb_domain); 3962eb4d010SOphir Munk sh->fdb_domain = NULL; 3972eb4d010SOphir Munk } 3982eb4d010SOphir Munk if (sh->esw_drop_action) { 3992eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->esw_drop_action); 4002eb4d010SOphir Munk sh->esw_drop_action = NULL; 4012eb4d010SOphir Munk } 4022eb4d010SOphir Munk #endif 4032eb4d010SOphir Munk if (sh->pop_vlan_action) { 4042eb4d010SOphir Munk mlx5_glue->destroy_flow_action(sh->pop_vlan_action); 4052eb4d010SOphir Munk sh->pop_vlan_action = NULL; 4062eb4d010SOphir Munk } 4072eb4d010SOphir Munk pthread_mutex_destroy(&sh->dv_mutex); 4082eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */ 409b80726dcSSuanming Mou if (sh->default_miss_action) 410b80726dcSSuanming Mou mlx5_glue->destroy_flow_action 411b80726dcSSuanming Mou (sh->default_miss_action); 412bf615b07SSuanming Mou if (sh->encaps_decaps) { 413e69a5922SXueming Li mlx5_hlist_destroy(sh->encaps_decaps); 414bf615b07SSuanming Mou sh->encaps_decaps = NULL; 415bf615b07SSuanming Mou } 4163fe88961SSuanming Mou if (sh->modify_cmds) { 417e69a5922SXueming Li mlx5_hlist_destroy(sh->modify_cmds); 4183fe88961SSuanming Mou sh->modify_cmds = NULL; 4193fe88961SSuanming Mou } 4202eb4d010SOphir Munk if (sh->tag_table) { 4212eb4d010SOphir Munk /* tags should be destroyed with flow before. */ 422e69a5922SXueming Li mlx5_hlist_destroy(sh->tag_table); 4232eb4d010SOphir Munk sh->tag_table = NULL; 4242eb4d010SOphir Munk } 4254ec6360dSGregory Etelson if (sh->tunnel_hub) { 4264ec6360dSGregory Etelson mlx5_release_tunnel_hub(sh, priv->dev_port); 4274ec6360dSGregory Etelson sh->tunnel_hub = NULL; 4284ec6360dSGregory Etelson } 4292eb4d010SOphir Munk mlx5_free_table_hash_list(priv); 4302eb4d010SOphir Munk } 4312eb4d010SOphir Munk 4322eb4d010SOphir Munk /** 4332e86c4e5SOphir Munk * Initialize shared data between primary and secondary process. 4342e86c4e5SOphir Munk * 4352e86c4e5SOphir Munk * A memzone is reserved by primary process and secondary processes attach to 4362e86c4e5SOphir Munk * the memzone. 4372e86c4e5SOphir Munk * 4382e86c4e5SOphir Munk * @return 4392e86c4e5SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 4402e86c4e5SOphir Munk */ 4412e86c4e5SOphir Munk static int 4422e86c4e5SOphir Munk mlx5_init_shared_data(void) 4432e86c4e5SOphir Munk { 4442e86c4e5SOphir Munk const struct rte_memzone *mz; 4452e86c4e5SOphir Munk int ret = 0; 4462e86c4e5SOphir Munk 4472e86c4e5SOphir Munk rte_spinlock_lock(&mlx5_shared_data_lock); 4482e86c4e5SOphir Munk if (mlx5_shared_data == NULL) { 4492e86c4e5SOphir Munk if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 4502e86c4e5SOphir Munk /* Allocate shared memory. */ 4512e86c4e5SOphir Munk mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 4522e86c4e5SOphir Munk sizeof(*mlx5_shared_data), 4532e86c4e5SOphir Munk SOCKET_ID_ANY, 0); 4542e86c4e5SOphir Munk if (mz == NULL) { 4552e86c4e5SOphir Munk DRV_LOG(ERR, 4562e86c4e5SOphir Munk "Cannot allocate mlx5 shared data"); 4572e86c4e5SOphir Munk ret = -rte_errno; 4582e86c4e5SOphir Munk goto error; 4592e86c4e5SOphir Munk } 4602e86c4e5SOphir Munk mlx5_shared_data = mz->addr; 4612e86c4e5SOphir Munk memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 4622e86c4e5SOphir Munk rte_spinlock_init(&mlx5_shared_data->lock); 4632e86c4e5SOphir Munk } else { 4642e86c4e5SOphir Munk /* Lookup allocated shared memory. */ 4652e86c4e5SOphir Munk mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA); 4662e86c4e5SOphir Munk if (mz == NULL) { 4672e86c4e5SOphir Munk DRV_LOG(ERR, 4682e86c4e5SOphir Munk "Cannot attach mlx5 shared data"); 4692e86c4e5SOphir Munk ret = -rte_errno; 4702e86c4e5SOphir Munk goto error; 4712e86c4e5SOphir Munk } 4722e86c4e5SOphir Munk mlx5_shared_data = mz->addr; 4732e86c4e5SOphir Munk memset(&mlx5_local_data, 0, sizeof(mlx5_local_data)); 4742e86c4e5SOphir Munk } 4752e86c4e5SOphir Munk } 4762e86c4e5SOphir Munk error: 4772e86c4e5SOphir Munk rte_spinlock_unlock(&mlx5_shared_data_lock); 4782e86c4e5SOphir Munk return ret; 4792e86c4e5SOphir Munk } 4802e86c4e5SOphir Munk 4812e86c4e5SOphir Munk /** 4822e86c4e5SOphir Munk * PMD global initialization. 4832e86c4e5SOphir Munk * 4842e86c4e5SOphir Munk * Independent from individual device, this function initializes global 4852e86c4e5SOphir Munk * per-PMD data structures distinguishing primary and secondary processes. 4862e86c4e5SOphir Munk * Hence, each initialization is called once per a process. 4872e86c4e5SOphir Munk * 4882e86c4e5SOphir Munk * @return 4892e86c4e5SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 4902e86c4e5SOphir Munk */ 4912e86c4e5SOphir Munk static int 4922e86c4e5SOphir Munk mlx5_init_once(void) 4932e86c4e5SOphir Munk { 4942e86c4e5SOphir Munk struct mlx5_shared_data *sd; 4952e86c4e5SOphir Munk struct mlx5_local_data *ld = &mlx5_local_data; 4962e86c4e5SOphir Munk int ret = 0; 4972e86c4e5SOphir Munk 4982e86c4e5SOphir Munk if (mlx5_init_shared_data()) 4992e86c4e5SOphir Munk return -rte_errno; 5002e86c4e5SOphir Munk sd = mlx5_shared_data; 5012e86c4e5SOphir Munk MLX5_ASSERT(sd); 5022e86c4e5SOphir Munk rte_spinlock_lock(&sd->lock); 5032e86c4e5SOphir Munk switch (rte_eal_process_type()) { 5042e86c4e5SOphir Munk case RTE_PROC_PRIMARY: 5052e86c4e5SOphir Munk if (sd->init_done) 5062e86c4e5SOphir Munk break; 5072e86c4e5SOphir Munk LIST_INIT(&sd->mem_event_cb_list); 5082e86c4e5SOphir Munk rte_rwlock_init(&sd->mem_event_rwlock); 5092e86c4e5SOphir Munk rte_mem_event_callback_register("MLX5_MEM_EVENT_CB", 5102e86c4e5SOphir Munk mlx5_mr_mem_event_cb, NULL); 5112e86c4e5SOphir Munk ret = mlx5_mp_init_primary(MLX5_MP_NAME, 5122e86c4e5SOphir Munk mlx5_mp_os_primary_handle); 5132e86c4e5SOphir Munk if (ret) 5142e86c4e5SOphir Munk goto out; 5152e86c4e5SOphir Munk sd->init_done = true; 5162e86c4e5SOphir Munk break; 5172e86c4e5SOphir Munk case RTE_PROC_SECONDARY: 5182e86c4e5SOphir Munk if (ld->init_done) 5192e86c4e5SOphir Munk break; 5202e86c4e5SOphir Munk ret = mlx5_mp_init_secondary(MLX5_MP_NAME, 5212e86c4e5SOphir Munk mlx5_mp_os_secondary_handle); 5222e86c4e5SOphir Munk if (ret) 5232e86c4e5SOphir Munk goto out; 5242e86c4e5SOphir Munk ++sd->secondary_cnt; 5252e86c4e5SOphir Munk ld->init_done = true; 5262e86c4e5SOphir Munk break; 5272e86c4e5SOphir Munk default: 5282e86c4e5SOphir Munk break; 5292e86c4e5SOphir Munk } 5302e86c4e5SOphir Munk out: 5312e86c4e5SOphir Munk rte_spinlock_unlock(&sd->lock); 5322e86c4e5SOphir Munk return ret; 5332e86c4e5SOphir Munk } 5342e86c4e5SOphir Munk 5352e86c4e5SOphir Munk /** 53686d259ceSMichael Baum * Create the Tx queue DevX/Verbs object. 53786d259ceSMichael Baum * 53886d259ceSMichael Baum * @param dev 53986d259ceSMichael Baum * Pointer to Ethernet device. 54086d259ceSMichael Baum * @param idx 54186d259ceSMichael Baum * Queue index in DPDK Tx queue array. 54286d259ceSMichael Baum * 54386d259ceSMichael Baum * @return 544f49f4483SMichael Baum * 0 on success, a negative errno value otherwise and rte_errno is set. 54586d259ceSMichael Baum */ 546f49f4483SMichael Baum static int 54786d259ceSMichael Baum mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx) 54886d259ceSMichael Baum { 54986d259ceSMichael Baum struct mlx5_priv *priv = dev->data->dev_private; 55086d259ceSMichael Baum struct mlx5_txq_data *txq_data = (*priv->txqs)[idx]; 55186d259ceSMichael Baum struct mlx5_txq_ctrl *txq_ctrl = 55286d259ceSMichael Baum container_of(txq_data, struct mlx5_txq_ctrl, txq); 55386d259ceSMichael Baum 55486d259ceSMichael Baum if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) 55586d259ceSMichael Baum return mlx5_txq_devx_obj_new(dev, idx); 55686d259ceSMichael Baum #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 5573ec73abeSMatan Azrad if (!priv->config.dv_esw_en) 55886d259ceSMichael Baum return mlx5_txq_devx_obj_new(dev, idx); 55986d259ceSMichael Baum #endif 56086d259ceSMichael Baum return mlx5_txq_ibv_obj_new(dev, idx); 56186d259ceSMichael Baum } 56286d259ceSMichael Baum 56386d259ceSMichael Baum /** 56486d259ceSMichael Baum * Release an Tx DevX/verbs queue object. 56586d259ceSMichael Baum * 56686d259ceSMichael Baum * @param txq_obj 56786d259ceSMichael Baum * DevX/Verbs Tx queue object. 56886d259ceSMichael Baum */ 56986d259ceSMichael Baum static void 57086d259ceSMichael Baum mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj) 57186d259ceSMichael Baum { 57286d259ceSMichael Baum if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) { 57386d259ceSMichael Baum mlx5_txq_devx_obj_release(txq_obj); 57486d259ceSMichael Baum return; 57586d259ceSMichael Baum } 5763ec73abeSMatan Azrad #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET 5773ec73abeSMatan Azrad if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) { 5783ec73abeSMatan Azrad mlx5_txq_devx_obj_release(txq_obj); 5793ec73abeSMatan Azrad return; 58086d259ceSMichael Baum } 5813ec73abeSMatan Azrad #endif 58286d259ceSMichael Baum mlx5_txq_ibv_obj_release(txq_obj); 58386d259ceSMichael Baum } 58486d259ceSMichael Baum 58586d259ceSMichael Baum /** 586994829e6SSuanming Mou * DV flow counter mode detect and config. 587994829e6SSuanming Mou * 588994829e6SSuanming Mou * @param dev 589994829e6SSuanming Mou * Pointer to rte_eth_dev structure. 590994829e6SSuanming Mou * 591994829e6SSuanming Mou */ 592994829e6SSuanming Mou static void 593994829e6SSuanming Mou mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) 594994829e6SSuanming Mou { 595994829e6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT 596994829e6SSuanming Mou struct mlx5_priv *priv = dev->data->dev_private; 5972b5b1aebSSuanming Mou struct mlx5_dev_ctx_shared *sh = priv->sh; 5982b5b1aebSSuanming Mou bool fallback; 599994829e6SSuanming Mou 600994829e6SSuanming Mou #ifndef HAVE_IBV_DEVX_ASYNC 6012b5b1aebSSuanming Mou fallback = true; 602994829e6SSuanming Mou #else 6032b5b1aebSSuanming Mou fallback = false; 6042b5b1aebSSuanming Mou if (!priv->config.devx || !priv->config.dv_flow_en || 6052b5b1aebSSuanming Mou !priv->config.hca_attr.flow_counters_dump || 606994829e6SSuanming Mou !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) || 607994829e6SSuanming Mou (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP)) 6082b5b1aebSSuanming Mou fallback = true; 609994829e6SSuanming Mou #endif 6102b5b1aebSSuanming Mou if (fallback) 611994829e6SSuanming Mou DRV_LOG(INFO, "Use fall-back DV counter management. Flow " 612994829e6SSuanming Mou "counter dump:%d, bulk_alloc_bitmap:0x%hhx.", 613994829e6SSuanming Mou priv->config.hca_attr.flow_counters_dump, 614994829e6SSuanming Mou priv->config.hca_attr.flow_counter_bulk_alloc_bitmap); 6152b5b1aebSSuanming Mou /* Initialize fallback mode only on the port initializes sh. */ 6162b5b1aebSSuanming Mou if (sh->refcnt == 1) 6172b5b1aebSSuanming Mou sh->cmng.counter_fallback = fallback; 6182b5b1aebSSuanming Mou else if (fallback != sh->cmng.counter_fallback) 6192b5b1aebSSuanming Mou DRV_LOG(WARNING, "Port %d in sh has different fallback mode " 6202b5b1aebSSuanming Mou "with others:%d.", PORT_ID(priv), fallback); 621994829e6SSuanming Mou #endif 622994829e6SSuanming Mou } 623994829e6SSuanming Mou 624994829e6SSuanming Mou /** 6252eb4d010SOphir Munk * Spawn an Ethernet device from Verbs information. 6262eb4d010SOphir Munk * 6272eb4d010SOphir Munk * @param dpdk_dev 6282eb4d010SOphir Munk * Backing DPDK device. 6292eb4d010SOphir Munk * @param spawn 6302eb4d010SOphir Munk * Verbs device parameters (name, port, switch_info) to spawn. 6312eb4d010SOphir Munk * @param config 6322eb4d010SOphir Munk * Device configuration parameters. 6332eb4d010SOphir Munk * 6342eb4d010SOphir Munk * @return 6352eb4d010SOphir Munk * A valid Ethernet device object on success, NULL otherwise and rte_errno 6362eb4d010SOphir Munk * is set. The following errors are defined: 6372eb4d010SOphir Munk * 6382eb4d010SOphir Munk * EBUSY: device is not supposed to be spawned. 6392eb4d010SOphir Munk * EEXIST: device is already spawned 6402eb4d010SOphir Munk */ 6412eb4d010SOphir Munk static struct rte_eth_dev * 6422eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev, 6432eb4d010SOphir Munk struct mlx5_dev_spawn_data *spawn, 644d462a83cSMichael Baum struct mlx5_dev_config *config) 6452eb4d010SOphir Munk { 6462eb4d010SOphir Munk const struct mlx5_switch_info *switch_info = &spawn->info; 6472eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh = NULL; 6482eb4d010SOphir Munk struct ibv_port_attr port_attr; 6492eb4d010SOphir Munk struct mlx5dv_context dv_attr = { .comp_mask = 0 }; 6502eb4d010SOphir Munk struct rte_eth_dev *eth_dev = NULL; 6512eb4d010SOphir Munk struct mlx5_priv *priv = NULL; 6522eb4d010SOphir Munk int err = 0; 6532eb4d010SOphir Munk unsigned int hw_padding = 0; 6542eb4d010SOphir Munk unsigned int mps; 6552eb4d010SOphir Munk unsigned int cqe_comp; 6562eb4d010SOphir Munk unsigned int cqe_pad = 0; 6572eb4d010SOphir Munk unsigned int tunnel_en = 0; 6582eb4d010SOphir Munk unsigned int mpls_en = 0; 6592eb4d010SOphir Munk unsigned int swp = 0; 6602eb4d010SOphir Munk unsigned int mprq = 0; 6612eb4d010SOphir Munk unsigned int mprq_min_stride_size_n = 0; 6622eb4d010SOphir Munk unsigned int mprq_max_stride_size_n = 0; 6632eb4d010SOphir Munk unsigned int mprq_min_stride_num_n = 0; 6642eb4d010SOphir Munk unsigned int mprq_max_stride_num_n = 0; 6652eb4d010SOphir Munk struct rte_ether_addr mac; 6662eb4d010SOphir Munk char name[RTE_ETH_NAME_MAX_LEN]; 6672eb4d010SOphir Munk int own_domain_id = 0; 6682eb4d010SOphir Munk uint16_t port_id; 6692eb4d010SOphir Munk unsigned int i; 6702eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_DEVX_PORT 6712eb4d010SOphir Munk struct mlx5dv_devx_port devx_port = { .comp_mask = 0 }; 6722eb4d010SOphir Munk #endif 6732eb4d010SOphir Munk 6742eb4d010SOphir Munk /* Determine if this port representor is supposed to be spawned. */ 6752eb4d010SOphir Munk if (switch_info->representor && dpdk_dev->devargs) { 6762eb4d010SOphir Munk struct rte_eth_devargs eth_da; 6772eb4d010SOphir Munk 6782eb4d010SOphir Munk err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da); 6792eb4d010SOphir Munk if (err) { 6802eb4d010SOphir Munk rte_errno = -err; 6812eb4d010SOphir Munk DRV_LOG(ERR, "failed to process device arguments: %s", 6822eb4d010SOphir Munk strerror(rte_errno)); 6832eb4d010SOphir Munk return NULL; 6842eb4d010SOphir Munk } 6852eb4d010SOphir Munk for (i = 0; i < eth_da.nb_representor_ports; ++i) 6862eb4d010SOphir Munk if (eth_da.representor_ports[i] == 6872eb4d010SOphir Munk (uint16_t)switch_info->port_name) 6882eb4d010SOphir Munk break; 6892eb4d010SOphir Munk if (i == eth_da.nb_representor_ports) { 6902eb4d010SOphir Munk rte_errno = EBUSY; 6912eb4d010SOphir Munk return NULL; 6922eb4d010SOphir Munk } 6932eb4d010SOphir Munk } 6942eb4d010SOphir Munk /* Build device name. */ 6952eb4d010SOphir Munk if (spawn->pf_bond < 0) { 6962eb4d010SOphir Munk /* Single device. */ 6972eb4d010SOphir Munk if (!switch_info->representor) 6982eb4d010SOphir Munk strlcpy(name, dpdk_dev->name, sizeof(name)); 6992eb4d010SOphir Munk else 7002eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_representor_%u", 7012eb4d010SOphir Munk dpdk_dev->name, switch_info->port_name); 7022eb4d010SOphir Munk } else { 7032eb4d010SOphir Munk /* Bonding device. */ 7042eb4d010SOphir Munk if (!switch_info->representor) 7052eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_%s", 706834a9019SOphir Munk dpdk_dev->name, 707834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 7082eb4d010SOphir Munk else 7092eb4d010SOphir Munk snprintf(name, sizeof(name), "%s_%s_representor_%u", 710834a9019SOphir Munk dpdk_dev->name, 711834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev), 7122eb4d010SOphir Munk switch_info->port_name); 7132eb4d010SOphir Munk } 7142eb4d010SOphir Munk /* check if the device is already spawned */ 7152eb4d010SOphir Munk if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 7162eb4d010SOphir Munk rte_errno = EEXIST; 7172eb4d010SOphir Munk return NULL; 7182eb4d010SOphir Munk } 7192eb4d010SOphir Munk DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 7202eb4d010SOphir Munk if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 7212eb4d010SOphir Munk struct mlx5_mp_id mp_id; 7222eb4d010SOphir Munk 7232eb4d010SOphir Munk eth_dev = rte_eth_dev_attach_secondary(name); 7242eb4d010SOphir Munk if (eth_dev == NULL) { 7252eb4d010SOphir Munk DRV_LOG(ERR, "can not attach rte ethdev"); 7262eb4d010SOphir Munk rte_errno = ENOMEM; 7272eb4d010SOphir Munk return NULL; 7282eb4d010SOphir Munk } 7292eb4d010SOphir Munk eth_dev->device = dpdk_dev; 730042f5c94SOphir Munk eth_dev->dev_ops = &mlx5_os_dev_sec_ops; 731cbfc6111SFerruh Yigit eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 732cbfc6111SFerruh Yigit eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 7332eb4d010SOphir Munk err = mlx5_proc_priv_init(eth_dev); 7342eb4d010SOphir Munk if (err) 7352eb4d010SOphir Munk return NULL; 7362eb4d010SOphir Munk mp_id.port_id = eth_dev->data->port_id; 7372eb4d010SOphir Munk strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 7382eb4d010SOphir Munk /* Receive command fd from primary process */ 7392eb4d010SOphir Munk err = mlx5_mp_req_verbs_cmd_fd(&mp_id); 7402eb4d010SOphir Munk if (err < 0) 7412eb4d010SOphir Munk goto err_secondary; 7422eb4d010SOphir Munk /* Remap UAR for Tx queues. */ 7432eb4d010SOphir Munk err = mlx5_tx_uar_init_secondary(eth_dev, err); 7442eb4d010SOphir Munk if (err) 7452eb4d010SOphir Munk goto err_secondary; 7462eb4d010SOphir Munk /* 7472eb4d010SOphir Munk * Ethdev pointer is still required as input since 7482eb4d010SOphir Munk * the primary device is not accessible from the 7492eb4d010SOphir Munk * secondary process. 7502eb4d010SOphir Munk */ 7512eb4d010SOphir Munk eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev); 7522eb4d010SOphir Munk eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev); 7532eb4d010SOphir Munk return eth_dev; 7542eb4d010SOphir Munk err_secondary: 7552eb4d010SOphir Munk mlx5_dev_close(eth_dev); 7562eb4d010SOphir Munk return NULL; 7572eb4d010SOphir Munk } 7582eb4d010SOphir Munk /* 7592eb4d010SOphir Munk * Some parameters ("tx_db_nc" in particularly) are needed in 7602eb4d010SOphir Munk * advance to create dv/verbs device context. We proceed the 7612eb4d010SOphir Munk * devargs here to get ones, and later proceed devargs again 7622eb4d010SOphir Munk * to override some hardware settings. 7632eb4d010SOphir Munk */ 764d462a83cSMichael Baum err = mlx5_args(config, dpdk_dev->devargs); 7652eb4d010SOphir Munk if (err) { 7662eb4d010SOphir Munk err = rte_errno; 7672eb4d010SOphir Munk DRV_LOG(ERR, "failed to process device arguments: %s", 7682eb4d010SOphir Munk strerror(rte_errno)); 7692eb4d010SOphir Munk goto error; 7702eb4d010SOphir Munk } 7714ec6360dSGregory Etelson if (config->dv_miss_info) { 7724ec6360dSGregory Etelson if (switch_info->master || switch_info->representor) 7734ec6360dSGregory Etelson config->dv_xmeta_en = MLX5_XMETA_MODE_META16; 7744ec6360dSGregory Etelson } 775d462a83cSMichael Baum mlx5_malloc_mem_select(config->sys_mem_en); 776d462a83cSMichael Baum sh = mlx5_alloc_shared_dev_ctx(spawn, config); 7772eb4d010SOphir Munk if (!sh) 7782eb4d010SOphir Munk return NULL; 779d462a83cSMichael Baum config->devx = sh->devx; 7802eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR 781d462a83cSMichael Baum config->dest_tir = 1; 7822eb4d010SOphir Munk #endif 7832eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 7842eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP; 7852eb4d010SOphir Munk #endif 7862eb4d010SOphir Munk /* 7872eb4d010SOphir Munk * Multi-packet send is supported by ConnectX-4 Lx PF as well 7882eb4d010SOphir Munk * as all ConnectX-5 devices. 7892eb4d010SOphir Munk */ 7902eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 7912eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; 7922eb4d010SOphir Munk #endif 7932eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 7942eb4d010SOphir Munk dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ; 7952eb4d010SOphir Munk #endif 7962eb4d010SOphir Munk mlx5_glue->dv_query_device(sh->ctx, &dv_attr); 7972eb4d010SOphir Munk if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { 7982eb4d010SOphir Munk if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { 7992eb4d010SOphir Munk DRV_LOG(DEBUG, "enhanced MPW is supported"); 8002eb4d010SOphir Munk mps = MLX5_MPW_ENHANCED; 8012eb4d010SOphir Munk } else { 8022eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW is supported"); 8032eb4d010SOphir Munk mps = MLX5_MPW; 8042eb4d010SOphir Munk } 8052eb4d010SOphir Munk } else { 8062eb4d010SOphir Munk DRV_LOG(DEBUG, "MPW isn't supported"); 8072eb4d010SOphir Munk mps = MLX5_MPW_DISABLED; 8082eb4d010SOphir Munk } 8092eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP 8102eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP) 8112eb4d010SOphir Munk swp = dv_attr.sw_parsing_caps.sw_parsing_offloads; 8122eb4d010SOphir Munk DRV_LOG(DEBUG, "SWP support: %u", swp); 8132eb4d010SOphir Munk #endif 814d462a83cSMichael Baum config->swp = !!swp; 8152eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT 8162eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) { 8172eb4d010SOphir Munk struct mlx5dv_striding_rq_caps mprq_caps = 8182eb4d010SOphir Munk dv_attr.striding_rq_caps; 8192eb4d010SOphir Munk 8202eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d", 8212eb4d010SOphir Munk mprq_caps.min_single_stride_log_num_of_bytes); 8222eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d", 8232eb4d010SOphir Munk mprq_caps.max_single_stride_log_num_of_bytes); 8242eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d", 8252eb4d010SOphir Munk mprq_caps.min_single_wqe_log_num_of_strides); 8262eb4d010SOphir Munk DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d", 8272eb4d010SOphir Munk mprq_caps.max_single_wqe_log_num_of_strides); 8282eb4d010SOphir Munk DRV_LOG(DEBUG, "\tsupported_qpts: %d", 8292eb4d010SOphir Munk mprq_caps.supported_qpts); 8302eb4d010SOphir Munk DRV_LOG(DEBUG, "device supports Multi-Packet RQ"); 8312eb4d010SOphir Munk mprq = 1; 8322eb4d010SOphir Munk mprq_min_stride_size_n = 8332eb4d010SOphir Munk mprq_caps.min_single_stride_log_num_of_bytes; 8342eb4d010SOphir Munk mprq_max_stride_size_n = 8352eb4d010SOphir Munk mprq_caps.max_single_stride_log_num_of_bytes; 8362eb4d010SOphir Munk mprq_min_stride_num_n = 8372eb4d010SOphir Munk mprq_caps.min_single_wqe_log_num_of_strides; 8382eb4d010SOphir Munk mprq_max_stride_num_n = 8392eb4d010SOphir Munk mprq_caps.max_single_wqe_log_num_of_strides; 8402eb4d010SOphir Munk } 8412eb4d010SOphir Munk #endif 8422eb4d010SOphir Munk if (RTE_CACHE_LINE_SIZE == 128 && 8432eb4d010SOphir Munk !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) 8442eb4d010SOphir Munk cqe_comp = 0; 8452eb4d010SOphir Munk else 8462eb4d010SOphir Munk cqe_comp = 1; 847d462a83cSMichael Baum config->cqe_comp = cqe_comp; 8482eb4d010SOphir Munk #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD 8492eb4d010SOphir Munk /* Whether device supports 128B Rx CQE padding. */ 8502eb4d010SOphir Munk cqe_pad = RTE_CACHE_LINE_SIZE == 128 && 8512eb4d010SOphir Munk (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); 8522eb4d010SOphir Munk #endif 8532eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 8542eb4d010SOphir Munk if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { 8552eb4d010SOphir Munk tunnel_en = ((dv_attr.tunnel_offloads_caps & 8562eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && 8572eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 8582eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) && 8592eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 8602eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE)); 8612eb4d010SOphir Munk } 8622eb4d010SOphir Munk DRV_LOG(DEBUG, "tunnel offloading is %ssupported", 8632eb4d010SOphir Munk tunnel_en ? "" : "not "); 8642eb4d010SOphir Munk #else 8652eb4d010SOphir Munk DRV_LOG(WARNING, 8662eb4d010SOphir Munk "tunnel offloading disabled due to old OFED/rdma-core version"); 8672eb4d010SOphir Munk #endif 868d462a83cSMichael Baum config->tunnel_en = tunnel_en; 8692eb4d010SOphir Munk #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 8702eb4d010SOphir Munk mpls_en = ((dv_attr.tunnel_offloads_caps & 8712eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) && 8722eb4d010SOphir Munk (dv_attr.tunnel_offloads_caps & 8732eb4d010SOphir Munk MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP)); 8742eb4d010SOphir Munk DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported", 8752eb4d010SOphir Munk mpls_en ? "" : "not "); 8762eb4d010SOphir Munk #else 8772eb4d010SOphir Munk DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to" 8782eb4d010SOphir Munk " old OFED/rdma-core version or firmware configuration"); 8792eb4d010SOphir Munk #endif 880d462a83cSMichael Baum config->mpls_en = mpls_en; 8812eb4d010SOphir Munk /* Check port status. */ 882834a9019SOphir Munk err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr); 8832eb4d010SOphir Munk if (err) { 8842eb4d010SOphir Munk DRV_LOG(ERR, "port query failed: %s", strerror(err)); 8852eb4d010SOphir Munk goto error; 8862eb4d010SOphir Munk } 8872eb4d010SOphir Munk if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) { 8882eb4d010SOphir Munk DRV_LOG(ERR, "port is not configured in Ethernet mode"); 8892eb4d010SOphir Munk err = EINVAL; 8902eb4d010SOphir Munk goto error; 8912eb4d010SOphir Munk } 8922eb4d010SOphir Munk if (port_attr.state != IBV_PORT_ACTIVE) 8932eb4d010SOphir Munk DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)", 8942eb4d010SOphir Munk mlx5_glue->port_state_str(port_attr.state), 8952eb4d010SOphir Munk port_attr.state); 8962eb4d010SOphir Munk /* Allocate private eth device data. */ 8972175c4dcSSuanming Mou priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 8982eb4d010SOphir Munk sizeof(*priv), 8992175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 9002eb4d010SOphir Munk if (priv == NULL) { 9012eb4d010SOphir Munk DRV_LOG(ERR, "priv allocation failure"); 9022eb4d010SOphir Munk err = ENOMEM; 9032eb4d010SOphir Munk goto error; 9042eb4d010SOphir Munk } 9052eb4d010SOphir Munk priv->sh = sh; 90691389890SOphir Munk priv->dev_port = spawn->phys_port; 9072eb4d010SOphir Munk priv->pci_dev = spawn->pci_dev; 9082eb4d010SOphir Munk priv->mtu = RTE_ETHER_MTU; 9092eb4d010SOphir Munk priv->mp_id.port_id = port_id; 9102eb4d010SOphir Munk strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 9112eb4d010SOphir Munk /* Some internal functions rely on Netlink sockets, open them now. */ 9122eb4d010SOphir Munk priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA); 9132eb4d010SOphir Munk priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE); 9142eb4d010SOphir Munk priv->representor = !!switch_info->representor; 9152eb4d010SOphir Munk priv->master = !!switch_info->master; 9162eb4d010SOphir Munk priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 9172eb4d010SOphir Munk priv->vport_meta_tag = 0; 9182eb4d010SOphir Munk priv->vport_meta_mask = 0; 9192eb4d010SOphir Munk priv->pf_bond = spawn->pf_bond; 9202eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_DEVX_PORT 9212eb4d010SOphir Munk /* 9222eb4d010SOphir Munk * The DevX port query API is implemented. E-Switch may use 9232eb4d010SOphir Munk * either vport or reg_c[0] metadata register to match on 9242eb4d010SOphir Munk * vport index. The engaged part of metadata register is 9252eb4d010SOphir Munk * defined by mask. 9262eb4d010SOphir Munk */ 9272eb4d010SOphir Munk if (switch_info->representor || switch_info->master) { 9282eb4d010SOphir Munk devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT | 9292eb4d010SOphir Munk MLX5DV_DEVX_PORT_MATCH_REG_C_0; 930834a9019SOphir Munk err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port, 9312eb4d010SOphir Munk &devx_port); 9322eb4d010SOphir Munk if (err) { 9332eb4d010SOphir Munk DRV_LOG(WARNING, 9342eb4d010SOphir Munk "can't query devx port %d on device %s", 935834a9019SOphir Munk spawn->phys_port, 936834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 9372eb4d010SOphir Munk devx_port.comp_mask = 0; 9382eb4d010SOphir Munk } 9392eb4d010SOphir Munk } 9402eb4d010SOphir Munk if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) { 9412eb4d010SOphir Munk priv->vport_meta_tag = devx_port.reg_c_0.value; 9422eb4d010SOphir Munk priv->vport_meta_mask = devx_port.reg_c_0.mask; 9432eb4d010SOphir Munk if (!priv->vport_meta_mask) { 9442eb4d010SOphir Munk DRV_LOG(ERR, "vport zero mask for port %d" 9452eb4d010SOphir Munk " on bonding device %s", 946834a9019SOphir Munk spawn->phys_port, 947834a9019SOphir Munk mlx5_os_get_dev_device_name 948834a9019SOphir Munk (spawn->phys_dev)); 9492eb4d010SOphir Munk err = ENOTSUP; 9502eb4d010SOphir Munk goto error; 9512eb4d010SOphir Munk } 9522eb4d010SOphir Munk if (priv->vport_meta_tag & ~priv->vport_meta_mask) { 9532eb4d010SOphir Munk DRV_LOG(ERR, "invalid vport tag for port %d" 9542eb4d010SOphir Munk " on bonding device %s", 955834a9019SOphir Munk spawn->phys_port, 956834a9019SOphir Munk mlx5_os_get_dev_device_name 957834a9019SOphir Munk (spawn->phys_dev)); 9582eb4d010SOphir Munk err = ENOTSUP; 9592eb4d010SOphir Munk goto error; 9602eb4d010SOphir Munk } 9612eb4d010SOphir Munk } 9622eb4d010SOphir Munk if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) { 9632eb4d010SOphir Munk priv->vport_id = devx_port.vport_num; 9642eb4d010SOphir Munk } else if (spawn->pf_bond >= 0) { 9652eb4d010SOphir Munk DRV_LOG(ERR, "can't deduce vport index for port %d" 9662eb4d010SOphir Munk " on bonding device %s", 967834a9019SOphir Munk spawn->phys_port, 968834a9019SOphir Munk mlx5_os_get_dev_device_name(spawn->phys_dev)); 9692eb4d010SOphir Munk err = ENOTSUP; 9702eb4d010SOphir Munk goto error; 9712eb4d010SOphir Munk } else { 9722eb4d010SOphir Munk /* Suppose vport index in compatible way. */ 9732eb4d010SOphir Munk priv->vport_id = switch_info->representor ? 9742eb4d010SOphir Munk switch_info->port_name + 1 : -1; 9752eb4d010SOphir Munk } 9762eb4d010SOphir Munk #else 9772eb4d010SOphir Munk /* 9782eb4d010SOphir Munk * Kernel/rdma_core support single E-Switch per PF configurations 9792eb4d010SOphir Munk * only and vport_id field contains the vport index for 9802eb4d010SOphir Munk * associated VF, which is deduced from representor port name. 9812eb4d010SOphir Munk * For example, let's have the IB device port 10, it has 9822eb4d010SOphir Munk * attached network device eth0, which has port name attribute 9832eb4d010SOphir Munk * pf0vf2, we can deduce the VF number as 2, and set vport index 9842eb4d010SOphir Munk * as 3 (2+1). This assigning schema should be changed if the 9852eb4d010SOphir Munk * multiple E-Switch instances per PF configurations or/and PCI 9862eb4d010SOphir Munk * subfunctions are added. 9872eb4d010SOphir Munk */ 9882eb4d010SOphir Munk priv->vport_id = switch_info->representor ? 9892eb4d010SOphir Munk switch_info->port_name + 1 : -1; 9902eb4d010SOphir Munk #endif 9912eb4d010SOphir Munk /* representor_id field keeps the unmodified VF index. */ 9922eb4d010SOphir Munk priv->representor_id = switch_info->representor ? 9932eb4d010SOphir Munk switch_info->port_name : -1; 9942eb4d010SOphir Munk /* 9952eb4d010SOphir Munk * Look for sibling devices in order to reuse their switch domain 9962eb4d010SOphir Munk * if any, otherwise allocate one. 9972eb4d010SOphir Munk */ 9982eb4d010SOphir Munk MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 9992eb4d010SOphir Munk const struct mlx5_priv *opriv = 10002eb4d010SOphir Munk rte_eth_devices[port_id].data->dev_private; 10012eb4d010SOphir Munk 10022eb4d010SOphir Munk if (!opriv || 10032eb4d010SOphir Munk opriv->sh != priv->sh || 10042eb4d010SOphir Munk opriv->domain_id == 10052eb4d010SOphir Munk RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 10062eb4d010SOphir Munk continue; 10072eb4d010SOphir Munk priv->domain_id = opriv->domain_id; 10082eb4d010SOphir Munk break; 10092eb4d010SOphir Munk } 10102eb4d010SOphir Munk if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 10112eb4d010SOphir Munk err = rte_eth_switch_domain_alloc(&priv->domain_id); 10122eb4d010SOphir Munk if (err) { 10132eb4d010SOphir Munk err = rte_errno; 10142eb4d010SOphir Munk DRV_LOG(ERR, "unable to allocate switch domain: %s", 10152eb4d010SOphir Munk strerror(rte_errno)); 10162eb4d010SOphir Munk goto error; 10172eb4d010SOphir Munk } 10182eb4d010SOphir Munk own_domain_id = 1; 10192eb4d010SOphir Munk } 10202eb4d010SOphir Munk /* Override some values set by hardware configuration. */ 1021d462a83cSMichael Baum mlx5_args(config, dpdk_dev->devargs); 1022d462a83cSMichael Baum err = mlx5_dev_check_sibling_config(priv, config); 10232eb4d010SOphir Munk if (err) 10242eb4d010SOphir Munk goto error; 1025d462a83cSMichael Baum config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 10262eb4d010SOphir Munk IBV_DEVICE_RAW_IP_CSUM); 10272eb4d010SOphir Munk DRV_LOG(DEBUG, "checksum offloading is %ssupported", 1028d462a83cSMichael Baum (config->hw_csum ? "" : "not ")); 10292eb4d010SOphir Munk #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ 10302eb4d010SOphir Munk !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 10312eb4d010SOphir Munk DRV_LOG(DEBUG, "counters are not supported"); 10322eb4d010SOphir Munk #endif 10332eb4d010SOphir Munk #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) 1034d462a83cSMichael Baum if (config->dv_flow_en) { 10352eb4d010SOphir Munk DRV_LOG(WARNING, "DV flow is not supported"); 1036d462a83cSMichael Baum config->dv_flow_en = 0; 10372eb4d010SOphir Munk } 10382eb4d010SOphir Munk #endif 1039d462a83cSMichael Baum config->ind_table_max_size = 10402eb4d010SOphir Munk sh->device_attr.max_rwq_indirection_table_size; 10412eb4d010SOphir Munk /* 10422eb4d010SOphir Munk * Remove this check once DPDK supports larger/variable 10432eb4d010SOphir Munk * indirection tables. 10442eb4d010SOphir Munk */ 1045d462a83cSMichael Baum if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 1046d462a83cSMichael Baum config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; 10472eb4d010SOphir Munk DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 1048d462a83cSMichael Baum config->ind_table_max_size); 1049d462a83cSMichael Baum config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 10502eb4d010SOphir Munk IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 10512eb4d010SOphir Munk DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 1052d462a83cSMichael Baum (config->hw_vlan_strip ? "" : "not ")); 1053d462a83cSMichael Baum config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 10542eb4d010SOphir Munk IBV_RAW_PACKET_CAP_SCATTER_FCS); 10552eb4d010SOphir Munk #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING) 10562eb4d010SOphir Munk hw_padding = !!sh->device_attr.rx_pad_end_addr_align; 10572eb4d010SOphir Munk #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING) 10582eb4d010SOphir Munk hw_padding = !!(sh->device_attr.device_cap_flags_ex & 10592eb4d010SOphir Munk IBV_DEVICE_PCI_WRITE_END_PADDING); 10602eb4d010SOphir Munk #endif 1061d462a83cSMichael Baum if (config->hw_padding && !hw_padding) { 10622eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 1063d462a83cSMichael Baum config->hw_padding = 0; 1064d462a83cSMichael Baum } else if (config->hw_padding) { 10652eb4d010SOphir Munk DRV_LOG(DEBUG, "Rx end alignment padding is enabled"); 10662eb4d010SOphir Munk } 1067d462a83cSMichael Baum config->tso = (sh->device_attr.max_tso > 0 && 10682eb4d010SOphir Munk (sh->device_attr.tso_supported_qpts & 10692eb4d010SOphir Munk (1 << IBV_QPT_RAW_PACKET))); 1070d462a83cSMichael Baum if (config->tso) 1071d462a83cSMichael Baum config->tso_max_payload_sz = sh->device_attr.max_tso; 10722eb4d010SOphir Munk /* 10732eb4d010SOphir Munk * MPW is disabled by default, while the Enhanced MPW is enabled 10742eb4d010SOphir Munk * by default. 10752eb4d010SOphir Munk */ 1076d462a83cSMichael Baum if (config->mps == MLX5_ARG_UNSET) 1077d462a83cSMichael Baum config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED : 10782eb4d010SOphir Munk MLX5_MPW_DISABLED; 10792eb4d010SOphir Munk else 1080d462a83cSMichael Baum config->mps = config->mps ? mps : MLX5_MPW_DISABLED; 10812eb4d010SOphir Munk DRV_LOG(INFO, "%sMPS is %s", 1082d462a83cSMichael Baum config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 1083d462a83cSMichael Baum config->mps == MLX5_MPW ? "legacy " : "", 1084d462a83cSMichael Baum config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 1085d462a83cSMichael Baum if (config->cqe_comp && !cqe_comp) { 10862eb4d010SOphir Munk DRV_LOG(WARNING, "Rx CQE compression isn't supported"); 1087d462a83cSMichael Baum config->cqe_comp = 0; 10882eb4d010SOphir Munk } 1089d462a83cSMichael Baum if (config->cqe_pad && !cqe_pad) { 10902eb4d010SOphir Munk DRV_LOG(WARNING, "Rx CQE padding isn't supported"); 1091d462a83cSMichael Baum config->cqe_pad = 0; 1092d462a83cSMichael Baum } else if (config->cqe_pad) { 10932eb4d010SOphir Munk DRV_LOG(INFO, "Rx CQE padding is enabled"); 10942eb4d010SOphir Munk } 1095d462a83cSMichael Baum if (config->devx) { 1096d462a83cSMichael Baum err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); 10972eb4d010SOphir Munk if (err) { 10982eb4d010SOphir Munk err = -err; 10992eb4d010SOphir Munk goto error; 11002eb4d010SOphir Munk } 11013aa27915SSuanming Mou /* Check relax ordering support. */ 11023aa27915SSuanming Mou if (config->hca_attr.relaxed_ordering_write && 11033aa27915SSuanming Mou config->hca_attr.relaxed_ordering_read && 11043aa27915SSuanming Mou !haswell_broadwell_cpu) 11053aa27915SSuanming Mou sh->cmng.relaxed_ordering = 1; 11062eb4d010SOphir Munk /* Check for LRO support. */ 1107d462a83cSMichael Baum if (config->dest_tir && config->hca_attr.lro_cap && 1108d462a83cSMichael Baum config->dv_flow_en) { 11092eb4d010SOphir Munk /* TBD check tunnel lro caps. */ 1110d462a83cSMichael Baum config->lro.supported = config->hca_attr.lro_cap; 11112eb4d010SOphir Munk DRV_LOG(DEBUG, "Device supports LRO"); 11122eb4d010SOphir Munk /* 11132eb4d010SOphir Munk * If LRO timeout is not configured by application, 11142eb4d010SOphir Munk * use the minimal supported value. 11152eb4d010SOphir Munk */ 1116d462a83cSMichael Baum if (!config->lro.timeout) 1117d462a83cSMichael Baum config->lro.timeout = 1118d462a83cSMichael Baum config->hca_attr.lro_timer_supported_periods[0]; 11192eb4d010SOphir Munk DRV_LOG(DEBUG, "LRO session timeout set to %d usec", 1120d462a83cSMichael Baum config->lro.timeout); 1121613d64e4SDekel Peled DRV_LOG(DEBUG, "LRO minimal size of TCP segment " 1122613d64e4SDekel Peled "required for coalescing is %d bytes", 1123613d64e4SDekel Peled config->hca_attr.lro_min_mss_size); 11242eb4d010SOphir Munk } 11252eb4d010SOphir Munk #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) 1126d462a83cSMichael Baum if (config->hca_attr.qos.sup && 1127d462a83cSMichael Baum config->hca_attr.qos.srtcm_sup && 1128d462a83cSMichael Baum config->dv_flow_en) { 11292eb4d010SOphir Munk uint8_t reg_c_mask = 1130d462a83cSMichael Baum config->hca_attr.qos.flow_meter_reg_c_ids; 11312eb4d010SOphir Munk /* 11322eb4d010SOphir Munk * Meter needs two REG_C's for color match and pre-sfx 11332eb4d010SOphir Munk * flow match. Here get the REG_C for color match. 11342eb4d010SOphir Munk * REG_C_0 and REG_C_1 is reserved for metadata feature. 11352eb4d010SOphir Munk */ 11362eb4d010SOphir Munk reg_c_mask &= 0xfc; 11372eb4d010SOphir Munk if (__builtin_popcount(reg_c_mask) < 1) { 11382eb4d010SOphir Munk priv->mtr_en = 0; 11392eb4d010SOphir Munk DRV_LOG(WARNING, "No available register for" 11402eb4d010SOphir Munk " meter."); 11412eb4d010SOphir Munk } else { 11422eb4d010SOphir Munk priv->mtr_color_reg = ffs(reg_c_mask) - 1 + 11432eb4d010SOphir Munk REG_C_0; 11442eb4d010SOphir Munk priv->mtr_en = 1; 11452eb4d010SOphir Munk priv->mtr_reg_share = 1146d462a83cSMichael Baum config->hca_attr.qos.flow_meter_reg_share; 11472eb4d010SOphir Munk DRV_LOG(DEBUG, "The REG_C meter uses is %d", 11482eb4d010SOphir Munk priv->mtr_color_reg); 11492eb4d010SOphir Munk } 11502eb4d010SOphir Munk } 11512eb4d010SOphir Munk #endif 115296b1f027SJiawei Wang #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE) 115396b1f027SJiawei Wang if (config->hca_attr.log_max_ft_sampler_num > 0 && 115496b1f027SJiawei Wang config->dv_flow_en) { 115596b1f027SJiawei Wang priv->sampler_en = 1; 115696b1f027SJiawei Wang DRV_LOG(DEBUG, "The Sampler enabled!\n"); 115796b1f027SJiawei Wang } else { 115896b1f027SJiawei Wang priv->sampler_en = 0; 115996b1f027SJiawei Wang if (!config->hca_attr.log_max_ft_sampler_num) 116096b1f027SJiawei Wang DRV_LOG(WARNING, "No available register for" 116196b1f027SJiawei Wang " Sampler."); 116296b1f027SJiawei Wang else 116396b1f027SJiawei Wang DRV_LOG(DEBUG, "DV flow is not supported!\n"); 116496b1f027SJiawei Wang } 116596b1f027SJiawei Wang #endif 11662eb4d010SOphir Munk } 1167d462a83cSMichael Baum if (config->tx_pp) { 11688f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz", 1169d462a83cSMichael Baum config->hca_attr.dev_freq_khz); 11708f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Packet pacing is %ssupported", 1171d462a83cSMichael Baum config->hca_attr.qos.packet_pacing ? "" : "not "); 11728f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Cross channel ops are %ssupported", 1173d462a83cSMichael Baum config->hca_attr.cross_channel ? "" : "not "); 11748f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE index ignore is %ssupported", 1175d462a83cSMichael Baum config->hca_attr.wqe_index_ignore ? "" : "not "); 11768f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported", 1177d462a83cSMichael Baum config->hca_attr.non_wire_sq ? "" : "not "); 11788f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)", 1179d462a83cSMichael Baum config->hca_attr.log_max_static_sq_wq ? "" : "not ", 1180d462a83cSMichael Baum config->hca_attr.log_max_static_sq_wq); 11818f848f32SViacheslav Ovsiienko DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported", 1182d462a83cSMichael Baum config->hca_attr.qos.wqe_rate_pp ? "" : "not "); 1183d462a83cSMichael Baum if (!config->devx) { 11848f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX is required for packet pacing"); 11858f848f32SViacheslav Ovsiienko err = ENODEV; 11868f848f32SViacheslav Ovsiienko goto error; 11878f848f32SViacheslav Ovsiienko } 1188d462a83cSMichael Baum if (!config->hca_attr.qos.packet_pacing) { 11898f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Packet pacing is not supported"); 11908f848f32SViacheslav Ovsiienko err = ENODEV; 11918f848f32SViacheslav Ovsiienko goto error; 11928f848f32SViacheslav Ovsiienko } 1193d462a83cSMichael Baum if (!config->hca_attr.cross_channel) { 11948f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Cross channel operations are" 11958f848f32SViacheslav Ovsiienko " required for packet pacing"); 11968f848f32SViacheslav Ovsiienko err = ENODEV; 11978f848f32SViacheslav Ovsiienko goto error; 11988f848f32SViacheslav Ovsiienko } 1199d462a83cSMichael Baum if (!config->hca_attr.wqe_index_ignore) { 12008f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE index ignore feature is" 12018f848f32SViacheslav Ovsiienko " required for packet pacing"); 12028f848f32SViacheslav Ovsiienko err = ENODEV; 12038f848f32SViacheslav Ovsiienko goto error; 12048f848f32SViacheslav Ovsiienko } 1205d462a83cSMichael Baum if (!config->hca_attr.non_wire_sq) { 12068f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Non-wire SQ feature is" 12078f848f32SViacheslav Ovsiienko " required for packet pacing"); 12088f848f32SViacheslav Ovsiienko err = ENODEV; 12098f848f32SViacheslav Ovsiienko goto error; 12108f848f32SViacheslav Ovsiienko } 1211d462a83cSMichael Baum if (!config->hca_attr.log_max_static_sq_wq) { 12128f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "Static WQE SQ feature is" 12138f848f32SViacheslav Ovsiienko " required for packet pacing"); 12148f848f32SViacheslav Ovsiienko err = ENODEV; 12158f848f32SViacheslav Ovsiienko goto error; 12168f848f32SViacheslav Ovsiienko } 1217d462a83cSMichael Baum if (!config->hca_attr.qos.wqe_rate_pp) { 12188f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "WQE rate mode is required" 12198f848f32SViacheslav Ovsiienko " for packet pacing"); 12208f848f32SViacheslav Ovsiienko err = ENODEV; 12218f848f32SViacheslav Ovsiienko goto error; 12228f848f32SViacheslav Ovsiienko } 12238f848f32SViacheslav Ovsiienko #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 12248f848f32SViacheslav Ovsiienko DRV_LOG(ERR, "DevX does not provide UAR offset," 12258f848f32SViacheslav Ovsiienko " can't create queues for packet pacing"); 12268f848f32SViacheslav Ovsiienko err = ENODEV; 12278f848f32SViacheslav Ovsiienko goto error; 12288f848f32SViacheslav Ovsiienko #endif 12298f848f32SViacheslav Ovsiienko } 1230d462a83cSMichael Baum if (config->devx) { 1231a2854c4dSViacheslav Ovsiienko uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 1232a2854c4dSViacheslav Ovsiienko 1233972a1bf8SViacheslav Ovsiienko err = config->hca_attr.access_register_user ? 1234972a1bf8SViacheslav Ovsiienko mlx5_devx_cmd_register_read 1235a2854c4dSViacheslav Ovsiienko (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 1236972a1bf8SViacheslav Ovsiienko reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; 1237a2854c4dSViacheslav Ovsiienko if (!err) { 1238a2854c4dSViacheslav Ovsiienko uint32_t ts_mode; 1239a2854c4dSViacheslav Ovsiienko 1240a2854c4dSViacheslav Ovsiienko /* MTUTC register is read successfully. */ 1241a2854c4dSViacheslav Ovsiienko ts_mode = MLX5_GET(register_mtutc, reg, 1242a2854c4dSViacheslav Ovsiienko time_stamp_mode); 1243a2854c4dSViacheslav Ovsiienko if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 1244d462a83cSMichael Baum config->rt_timestamp = 1; 1245a2854c4dSViacheslav Ovsiienko } else { 1246a2854c4dSViacheslav Ovsiienko /* Kernel does not support register reading. */ 1247d462a83cSMichael Baum if (config->hca_attr.dev_freq_khz == 1248a2854c4dSViacheslav Ovsiienko (NS_PER_S / MS_PER_S)) 1249d462a83cSMichael Baum config->rt_timestamp = 1; 1250a2854c4dSViacheslav Ovsiienko } 1251a2854c4dSViacheslav Ovsiienko } 125250f95b23SSuanming Mou /* 125350f95b23SSuanming Mou * If HW has bug working with tunnel packet decapsulation and 125450f95b23SSuanming Mou * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip 125550f95b23SSuanming Mou * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore. 125650f95b23SSuanming Mou */ 1257d462a83cSMichael Baum if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en) 1258d462a83cSMichael Baum config->hw_fcs_strip = 0; 125950f95b23SSuanming Mou DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported", 1260d462a83cSMichael Baum (config->hw_fcs_strip ? "" : "not ")); 1261d462a83cSMichael Baum if (config->mprq.enabled && mprq) { 1262d462a83cSMichael Baum if (config->mprq.stride_num_n && 1263d462a83cSMichael Baum (config->mprq.stride_num_n > mprq_max_stride_num_n || 1264d462a83cSMichael Baum config->mprq.stride_num_n < mprq_min_stride_num_n)) { 1265d462a83cSMichael Baum config->mprq.stride_num_n = 12662eb4d010SOphir Munk RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N, 12672eb4d010SOphir Munk mprq_min_stride_num_n), 12682eb4d010SOphir Munk mprq_max_stride_num_n); 12692eb4d010SOphir Munk DRV_LOG(WARNING, 12702eb4d010SOphir Munk "the number of strides" 12712eb4d010SOphir Munk " for Multi-Packet RQ is out of range," 12722eb4d010SOphir Munk " setting default value (%u)", 1273d462a83cSMichael Baum 1 << config->mprq.stride_num_n); 12742eb4d010SOphir Munk } 1275d462a83cSMichael Baum if (config->mprq.stride_size_n && 1276d462a83cSMichael Baum (config->mprq.stride_size_n > mprq_max_stride_size_n || 1277d462a83cSMichael Baum config->mprq.stride_size_n < mprq_min_stride_size_n)) { 1278d462a83cSMichael Baum config->mprq.stride_size_n = 12792eb4d010SOphir Munk RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N, 12802eb4d010SOphir Munk mprq_min_stride_size_n), 12812eb4d010SOphir Munk mprq_max_stride_size_n); 12822eb4d010SOphir Munk DRV_LOG(WARNING, 12832eb4d010SOphir Munk "the size of a stride" 12842eb4d010SOphir Munk " for Multi-Packet RQ is out of range," 12852eb4d010SOphir Munk " setting default value (%u)", 1286d462a83cSMichael Baum 1 << config->mprq.stride_size_n); 12872eb4d010SOphir Munk } 1288d462a83cSMichael Baum config->mprq.min_stride_size_n = mprq_min_stride_size_n; 1289d462a83cSMichael Baum config->mprq.max_stride_size_n = mprq_max_stride_size_n; 1290d462a83cSMichael Baum } else if (config->mprq.enabled && !mprq) { 12912eb4d010SOphir Munk DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 1292d462a83cSMichael Baum config->mprq.enabled = 0; 12932eb4d010SOphir Munk } 1294d462a83cSMichael Baum if (config->max_dump_files_num == 0) 1295d462a83cSMichael Baum config->max_dump_files_num = 128; 12962eb4d010SOphir Munk eth_dev = rte_eth_dev_allocate(name); 12972eb4d010SOphir Munk if (eth_dev == NULL) { 12982eb4d010SOphir Munk DRV_LOG(ERR, "can not allocate rte ethdev"); 12992eb4d010SOphir Munk err = ENOMEM; 13002eb4d010SOphir Munk goto error; 13012eb4d010SOphir Munk } 13022eb4d010SOphir Munk if (priv->representor) { 13032eb4d010SOphir Munk eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 13042eb4d010SOphir Munk eth_dev->data->representor_id = priv->representor_id; 13052eb4d010SOphir Munk } 13062eb4d010SOphir Munk /* 13072eb4d010SOphir Munk * Store associated network device interface index. This index 13082eb4d010SOphir Munk * is permanent throughout the lifetime of device. So, we may store 13092eb4d010SOphir Munk * the ifindex here and use the cached value further. 13102eb4d010SOphir Munk */ 13112eb4d010SOphir Munk MLX5_ASSERT(spawn->ifindex); 13122eb4d010SOphir Munk priv->if_index = spawn->ifindex; 1313c21e5facSXueming Li if (priv->pf_bond >= 0 && priv->master) { 1314c21e5facSXueming Li /* Get bond interface info */ 1315c21e5facSXueming Li err = mlx5_sysfs_bond_info(priv->if_index, 1316c21e5facSXueming Li &priv->bond_ifindex, 1317c21e5facSXueming Li priv->bond_name); 1318c21e5facSXueming Li if (err) 1319c21e5facSXueming Li DRV_LOG(ERR, "unable to get bond info: %s", 1320c21e5facSXueming Li strerror(rte_errno)); 1321c21e5facSXueming Li else 1322c21e5facSXueming Li DRV_LOG(INFO, "PF device %u, bond device %u(%s)", 1323c21e5facSXueming Li priv->if_index, priv->bond_ifindex, 1324c21e5facSXueming Li priv->bond_name); 1325c21e5facSXueming Li } 13262eb4d010SOphir Munk eth_dev->data->dev_private = priv; 13272eb4d010SOphir Munk priv->dev_data = eth_dev->data; 13282eb4d010SOphir Munk eth_dev->data->mac_addrs = priv->mac; 13292eb4d010SOphir Munk eth_dev->device = dpdk_dev; 1330f30e69b4SFerruh Yigit eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 13312eb4d010SOphir Munk /* Configure the first MAC address by default. */ 13322eb4d010SOphir Munk if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 13332eb4d010SOphir Munk DRV_LOG(ERR, 13342eb4d010SOphir Munk "port %u cannot get MAC address, is mlx5_en" 13352eb4d010SOphir Munk " loaded? (errno: %s)", 13362eb4d010SOphir Munk eth_dev->data->port_id, strerror(rte_errno)); 13372eb4d010SOphir Munk err = ENODEV; 13382eb4d010SOphir Munk goto error; 13392eb4d010SOphir Munk } 13402eb4d010SOphir Munk DRV_LOG(INFO, 13412eb4d010SOphir Munk "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 13422eb4d010SOphir Munk eth_dev->data->port_id, 13432eb4d010SOphir Munk mac.addr_bytes[0], mac.addr_bytes[1], 13442eb4d010SOphir Munk mac.addr_bytes[2], mac.addr_bytes[3], 13452eb4d010SOphir Munk mac.addr_bytes[4], mac.addr_bytes[5]); 13462eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG 13472eb4d010SOphir Munk { 13482eb4d010SOphir Munk char ifname[IF_NAMESIZE]; 13492eb4d010SOphir Munk 13502eb4d010SOphir Munk if (mlx5_get_ifname(eth_dev, &ifname) == 0) 13512eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 13522eb4d010SOphir Munk eth_dev->data->port_id, ifname); 13532eb4d010SOphir Munk else 13542eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u ifname is unknown", 13552eb4d010SOphir Munk eth_dev->data->port_id); 13562eb4d010SOphir Munk } 13572eb4d010SOphir Munk #endif 13582eb4d010SOphir Munk /* Get actual MTU if possible. */ 13592eb4d010SOphir Munk err = mlx5_get_mtu(eth_dev, &priv->mtu); 13602eb4d010SOphir Munk if (err) { 13612eb4d010SOphir Munk err = rte_errno; 13622eb4d010SOphir Munk goto error; 13632eb4d010SOphir Munk } 13642eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id, 13652eb4d010SOphir Munk priv->mtu); 13662eb4d010SOphir Munk /* Initialize burst functions to prevent crashes before link-up. */ 13672eb4d010SOphir Munk eth_dev->rx_pkt_burst = removed_rx_burst; 13682eb4d010SOphir Munk eth_dev->tx_pkt_burst = removed_tx_burst; 1369042f5c94SOphir Munk eth_dev->dev_ops = &mlx5_os_dev_ops; 1370cbfc6111SFerruh Yigit eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 1371cbfc6111SFerruh Yigit eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 1372cbfc6111SFerruh Yigit eth_dev->rx_queue_count = mlx5_rx_queue_count; 13732eb4d010SOphir Munk /* Register MAC address. */ 13742eb4d010SOphir Munk claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 1375d462a83cSMichael Baum if (config->vf && config->vf_nl_en) 13762eb4d010SOphir Munk mlx5_nl_mac_addr_sync(priv->nl_socket_route, 13772eb4d010SOphir Munk mlx5_ifindex(eth_dev), 13782eb4d010SOphir Munk eth_dev->data->mac_addrs, 13792eb4d010SOphir Munk MLX5_MAX_MAC_ADDRESSES); 13802eb4d010SOphir Munk priv->flows = 0; 13812eb4d010SOphir Munk priv->ctrl_flows = 0; 1382d163fc2dSXueming Li rte_spinlock_init(&priv->flow_list_lock); 13832eb4d010SOphir Munk TAILQ_INIT(&priv->flow_meters); 13842eb4d010SOphir Munk TAILQ_INIT(&priv->flow_meter_profiles); 13852eb4d010SOphir Munk /* Hint libmlx5 to use PMD allocator for data plane resources */ 138636dabceaSMichael Baum mlx5_glue->dv_set_context_attr(sh->ctx, 138736dabceaSMichael Baum MLX5DV_CTX_ATTR_BUF_ALLOCATORS, 138836dabceaSMichael Baum (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){ 13892eb4d010SOphir Munk .alloc = &mlx5_alloc_verbs_buf, 13902eb4d010SOphir Munk .free = &mlx5_free_verbs_buf, 13912eb4d010SOphir Munk .data = priv, 139236dabceaSMichael Baum })); 13932eb4d010SOphir Munk /* Bring Ethernet device up. */ 13942eb4d010SOphir Munk DRV_LOG(DEBUG, "port %u forcing Ethernet interface up", 13952eb4d010SOphir Munk eth_dev->data->port_id); 13962eb4d010SOphir Munk mlx5_set_link_up(eth_dev); 13972eb4d010SOphir Munk /* 13982eb4d010SOphir Munk * Even though the interrupt handler is not installed yet, 13992eb4d010SOphir Munk * interrupts will still trigger on the async_fd from 14002eb4d010SOphir Munk * Verbs context returned by ibv_open_device(). 14012eb4d010SOphir Munk */ 14022eb4d010SOphir Munk mlx5_link_update(eth_dev, 0); 14032eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH 1404d462a83cSMichael Baum if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && 14052eb4d010SOphir Munk (switch_info->representor || switch_info->master))) 1406d462a83cSMichael Baum config->dv_esw_en = 0; 14072eb4d010SOphir Munk #else 1408d462a83cSMichael Baum config->dv_esw_en = 0; 14092eb4d010SOphir Munk #endif 14102eb4d010SOphir Munk /* Detect minimal data bytes to inline. */ 1411d462a83cSMichael Baum mlx5_set_min_inline(spawn, config); 14122eb4d010SOphir Munk /* Store device configuration on private structure. */ 1413d462a83cSMichael Baum priv->config = *config; 14142eb4d010SOphir Munk /* Create context for virtual machine VLAN workaround. */ 14152eb4d010SOphir Munk priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex); 1416d462a83cSMichael Baum if (config->dv_flow_en) { 14172eb4d010SOphir Munk err = mlx5_alloc_shared_dr(priv); 14182eb4d010SOphir Munk if (err) 14192eb4d010SOphir Munk goto error; 14202eb4d010SOphir Munk } 14217aa9892fSMichael Baum if (config->devx && config->dv_flow_en && config->dest_tir) { 14225eaf882eSMichael Baum priv->obj_ops = devx_obj_ops; 14230c762e81SMichael Baum priv->obj_ops.drop_action_create = 14240c762e81SMichael Baum ibv_obj_ops.drop_action_create; 14250c762e81SMichael Baum priv->obj_ops.drop_action_destroy = 14260c762e81SMichael Baum ibv_obj_ops.drop_action_destroy; 14275d9f3c3fSMichael Baum #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET 14285d9f3c3fSMichael Baum priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify; 14295d9f3c3fSMichael Baum #else 14303ec73abeSMatan Azrad if (config->dv_esw_en) 14315d9f3c3fSMichael Baum priv->obj_ops.txq_obj_modify = 14325d9f3c3fSMichael Baum ibv_obj_ops.txq_obj_modify; 14335d9f3c3fSMichael Baum #endif 14343ec73abeSMatan Azrad /* Use specific wrappers for Tx object. */ 14353ec73abeSMatan Azrad priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new; 14363ec73abeSMatan Azrad priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release; 14373ec73abeSMatan Azrad 14385eaf882eSMichael Baum } else { 14395eaf882eSMichael Baum priv->obj_ops = ibv_obj_ops; 14405eaf882eSMichael Baum } 144165b3cd0dSSuanming Mou priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev); 144265b3cd0dSSuanming Mou if (!priv->drop_queue.hrxq) 144365b3cd0dSSuanming Mou goto error; 14442eb4d010SOphir Munk /* Supported Verbs flow priority number detection. */ 14452eb4d010SOphir Munk err = mlx5_flow_discover_priorities(eth_dev); 14462eb4d010SOphir Munk if (err < 0) { 14472eb4d010SOphir Munk err = -err; 14482eb4d010SOphir Munk goto error; 14492eb4d010SOphir Munk } 14502eb4d010SOphir Munk priv->config.flow_prio = err; 14512eb4d010SOphir Munk if (!priv->config.dv_esw_en && 14522eb4d010SOphir Munk priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 14532eb4d010SOphir Munk DRV_LOG(WARNING, "metadata mode %u is not supported " 14542eb4d010SOphir Munk "(no E-Switch)", priv->config.dv_xmeta_en); 14552eb4d010SOphir Munk priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 14562eb4d010SOphir Munk } 14572eb4d010SOphir Munk mlx5_set_metadata_mask(eth_dev); 14582eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 14592eb4d010SOphir Munk !priv->sh->dv_regc0_mask) { 14602eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 14612eb4d010SOphir Munk "(no metadata reg_c[0] is available)", 14622eb4d010SOphir Munk priv->config.dv_xmeta_en); 14632eb4d010SOphir Munk err = ENOTSUP; 14642eb4d010SOphir Munk goto error; 14652eb4d010SOphir Munk } 14662eb4d010SOphir Munk /* Query availability of metadata reg_c's. */ 14672eb4d010SOphir Munk err = mlx5_flow_discover_mreg_c(eth_dev); 14682eb4d010SOphir Munk if (err < 0) { 14692eb4d010SOphir Munk err = -err; 14702eb4d010SOphir Munk goto error; 14712eb4d010SOphir Munk } 14722eb4d010SOphir Munk if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 14732eb4d010SOphir Munk DRV_LOG(DEBUG, 14742eb4d010SOphir Munk "port %u extensive metadata register is not supported", 14752eb4d010SOphir Munk eth_dev->data->port_id); 14762eb4d010SOphir Munk if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 14772eb4d010SOphir Munk DRV_LOG(ERR, "metadata mode %u is not supported " 14782eb4d010SOphir Munk "(no metadata registers available)", 14792eb4d010SOphir Munk priv->config.dv_xmeta_en); 14802eb4d010SOphir Munk err = ENOTSUP; 14812eb4d010SOphir Munk goto error; 14822eb4d010SOphir Munk } 14832eb4d010SOphir Munk } 14842eb4d010SOphir Munk if (priv->config.dv_flow_en && 14852eb4d010SOphir Munk priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 14862eb4d010SOphir Munk mlx5_flow_ext_mreg_supported(eth_dev) && 14872eb4d010SOphir Munk priv->sh->dv_regc0_mask) { 14882eb4d010SOphir Munk priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME, 1489e69a5922SXueming Li MLX5_FLOW_MREG_HTABLE_SZ, 1490e69a5922SXueming Li 0, 0, 1491e69a5922SXueming Li NULL, NULL, NULL); 14922eb4d010SOphir Munk if (!priv->mreg_cp_tbl) { 14932eb4d010SOphir Munk err = ENOMEM; 14942eb4d010SOphir Munk goto error; 14952eb4d010SOphir Munk } 14962eb4d010SOphir Munk } 1497994829e6SSuanming Mou mlx5_flow_counter_mode_config(eth_dev); 14982eb4d010SOphir Munk return eth_dev; 14992eb4d010SOphir Munk error: 15002eb4d010SOphir Munk if (priv) { 15012eb4d010SOphir Munk if (priv->mreg_cp_tbl) 1502e69a5922SXueming Li mlx5_hlist_destroy(priv->mreg_cp_tbl); 15032eb4d010SOphir Munk if (priv->sh) 15042eb4d010SOphir Munk mlx5_os_free_shared_dr(priv); 15052eb4d010SOphir Munk if (priv->nl_socket_route >= 0) 15062eb4d010SOphir Munk close(priv->nl_socket_route); 15072eb4d010SOphir Munk if (priv->nl_socket_rdma >= 0) 15082eb4d010SOphir Munk close(priv->nl_socket_rdma); 15092eb4d010SOphir Munk if (priv->vmwa_context) 15102eb4d010SOphir Munk mlx5_vlan_vmwa_exit(priv->vmwa_context); 151165b3cd0dSSuanming Mou if (eth_dev && priv->drop_queue.hrxq) 151265b3cd0dSSuanming Mou mlx5_drop_action_destroy(eth_dev); 15132eb4d010SOphir Munk if (own_domain_id) 15142eb4d010SOphir Munk claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 15152175c4dcSSuanming Mou mlx5_free(priv); 15162eb4d010SOphir Munk if (eth_dev != NULL) 15172eb4d010SOphir Munk eth_dev->data->dev_private = NULL; 15182eb4d010SOphir Munk } 15192eb4d010SOphir Munk if (eth_dev != NULL) { 15202eb4d010SOphir Munk /* mac_addrs must not be freed alone because part of 15212eb4d010SOphir Munk * dev_private 15222eb4d010SOphir Munk **/ 15232eb4d010SOphir Munk eth_dev->data->mac_addrs = NULL; 15242eb4d010SOphir Munk rte_eth_dev_release_port(eth_dev); 15252eb4d010SOphir Munk } 15262eb4d010SOphir Munk if (sh) 152791389890SOphir Munk mlx5_free_shared_dev_ctx(sh); 15282eb4d010SOphir Munk MLX5_ASSERT(err > 0); 15292eb4d010SOphir Munk rte_errno = err; 15302eb4d010SOphir Munk return NULL; 15312eb4d010SOphir Munk } 15322eb4d010SOphir Munk 15332eb4d010SOphir Munk /** 15342eb4d010SOphir Munk * Comparison callback to sort device data. 15352eb4d010SOphir Munk * 15362eb4d010SOphir Munk * This is meant to be used with qsort(). 15372eb4d010SOphir Munk * 15382eb4d010SOphir Munk * @param a[in] 15392eb4d010SOphir Munk * Pointer to pointer to first data object. 15402eb4d010SOphir Munk * @param b[in] 15412eb4d010SOphir Munk * Pointer to pointer to second data object. 15422eb4d010SOphir Munk * 15432eb4d010SOphir Munk * @return 15442eb4d010SOphir Munk * 0 if both objects are equal, less than 0 if the first argument is less 15452eb4d010SOphir Munk * than the second, greater than 0 otherwise. 15462eb4d010SOphir Munk */ 15472eb4d010SOphir Munk static int 15482eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b) 15492eb4d010SOphir Munk { 15502eb4d010SOphir Munk const struct mlx5_switch_info *si_a = 15512eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)a)->info; 15522eb4d010SOphir Munk const struct mlx5_switch_info *si_b = 15532eb4d010SOphir Munk &((const struct mlx5_dev_spawn_data *)b)->info; 15542eb4d010SOphir Munk int ret; 15552eb4d010SOphir Munk 15562eb4d010SOphir Munk /* Master device first. */ 15572eb4d010SOphir Munk ret = si_b->master - si_a->master; 15582eb4d010SOphir Munk if (ret) 15592eb4d010SOphir Munk return ret; 15602eb4d010SOphir Munk /* Then representor devices. */ 15612eb4d010SOphir Munk ret = si_b->representor - si_a->representor; 15622eb4d010SOphir Munk if (ret) 15632eb4d010SOphir Munk return ret; 15642eb4d010SOphir Munk /* Unidentified devices come last in no specific order. */ 15652eb4d010SOphir Munk if (!si_a->representor) 15662eb4d010SOphir Munk return 0; 15672eb4d010SOphir Munk /* Order representors by name. */ 15682eb4d010SOphir Munk return si_a->port_name - si_b->port_name; 15692eb4d010SOphir Munk } 15702eb4d010SOphir Munk 15712eb4d010SOphir Munk /** 15722eb4d010SOphir Munk * Match PCI information for possible slaves of bonding device. 15732eb4d010SOphir Munk * 15742eb4d010SOphir Munk * @param[in] ibv_dev 15752eb4d010SOphir Munk * Pointer to Infiniband device structure. 15762eb4d010SOphir Munk * @param[in] pci_dev 15772eb4d010SOphir Munk * Pointer to PCI device structure to match PCI address. 15782eb4d010SOphir Munk * @param[in] nl_rdma 15792eb4d010SOphir Munk * Netlink RDMA group socket handle. 15802eb4d010SOphir Munk * 15812eb4d010SOphir Munk * @return 15822eb4d010SOphir Munk * negative value if no bonding device found, otherwise 15832eb4d010SOphir Munk * positive index of slave PF in bonding. 15842eb4d010SOphir Munk */ 15852eb4d010SOphir Munk static int 15862eb4d010SOphir Munk mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev, 15872eb4d010SOphir Munk const struct rte_pci_device *pci_dev, 15882eb4d010SOphir Munk int nl_rdma) 15892eb4d010SOphir Munk { 15902eb4d010SOphir Munk char ifname[IF_NAMESIZE + 1]; 15912eb4d010SOphir Munk unsigned int ifindex; 15922eb4d010SOphir Munk unsigned int np, i; 15932eb4d010SOphir Munk FILE *file = NULL; 15942eb4d010SOphir Munk int pf = -1; 15952eb4d010SOphir Munk 15962eb4d010SOphir Munk /* 15972eb4d010SOphir Munk * Try to get master device name. If something goes 15982eb4d010SOphir Munk * wrong suppose the lack of kernel support and no 15992eb4d010SOphir Munk * bonding devices. 16002eb4d010SOphir Munk */ 16012eb4d010SOphir Munk if (nl_rdma < 0) 16022eb4d010SOphir Munk return -1; 16032eb4d010SOphir Munk if (!strstr(ibv_dev->name, "bond")) 16042eb4d010SOphir Munk return -1; 16052eb4d010SOphir Munk np = mlx5_nl_portnum(nl_rdma, ibv_dev->name); 16062eb4d010SOphir Munk if (!np) 16072eb4d010SOphir Munk return -1; 16082eb4d010SOphir Munk /* 16092eb4d010SOphir Munk * The Master device might not be on the predefined 16102eb4d010SOphir Munk * port (not on port index 1, it is not garanted), 16112eb4d010SOphir Munk * we have to scan all Infiniband device port and 16122eb4d010SOphir Munk * find master. 16132eb4d010SOphir Munk */ 16142eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 16152eb4d010SOphir Munk /* Check whether Infiniband port is populated. */ 16162eb4d010SOphir Munk ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i); 16172eb4d010SOphir Munk if (!ifindex) 16182eb4d010SOphir Munk continue; 16192eb4d010SOphir Munk if (!if_indextoname(ifindex, ifname)) 16202eb4d010SOphir Munk continue; 16212eb4d010SOphir Munk /* Try to read bonding slave names from sysfs. */ 16222eb4d010SOphir Munk MKSTR(slaves, 16232eb4d010SOphir Munk "/sys/class/net/%s/master/bonding/slaves", ifname); 16242eb4d010SOphir Munk file = fopen(slaves, "r"); 16252eb4d010SOphir Munk if (file) 16262eb4d010SOphir Munk break; 16272eb4d010SOphir Munk } 16282eb4d010SOphir Munk if (!file) 16292eb4d010SOphir Munk return -1; 16302eb4d010SOphir Munk /* Use safe format to check maximal buffer length. */ 16312eb4d010SOphir Munk MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE); 16322eb4d010SOphir Munk while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) { 16332eb4d010SOphir Munk char tmp_str[IF_NAMESIZE + 32]; 16342eb4d010SOphir Munk struct rte_pci_addr pci_addr; 16352eb4d010SOphir Munk struct mlx5_switch_info info; 16362eb4d010SOphir Munk 16372eb4d010SOphir Munk /* Process slave interface names in the loop. */ 16382eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 16392eb4d010SOphir Munk "/sys/class/net/%s", ifname); 16402eb4d010SOphir Munk if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) { 16412eb4d010SOphir Munk DRV_LOG(WARNING, "can not get PCI address" 16422eb4d010SOphir Munk " for netdev \"%s\"", ifname); 16432eb4d010SOphir Munk continue; 16442eb4d010SOphir Munk } 16452eb4d010SOphir Munk if (pci_dev->addr.domain != pci_addr.domain || 16462eb4d010SOphir Munk pci_dev->addr.bus != pci_addr.bus || 16472eb4d010SOphir Munk pci_dev->addr.devid != pci_addr.devid || 16482eb4d010SOphir Munk pci_dev->addr.function != pci_addr.function) 16492eb4d010SOphir Munk continue; 16502eb4d010SOphir Munk /* Slave interface PCI address match found. */ 16512eb4d010SOphir Munk fclose(file); 16522eb4d010SOphir Munk snprintf(tmp_str, sizeof(tmp_str), 16532eb4d010SOphir Munk "/sys/class/net/%s/phys_port_name", ifname); 16542eb4d010SOphir Munk file = fopen(tmp_str, "rb"); 16552eb4d010SOphir Munk if (!file) 16562eb4d010SOphir Munk break; 16572eb4d010SOphir Munk info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET; 16582eb4d010SOphir Munk if (fscanf(file, "%32s", tmp_str) == 1) 16592eb4d010SOphir Munk mlx5_translate_port_name(tmp_str, &info); 16602eb4d010SOphir Munk if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY || 16612eb4d010SOphir Munk info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) 16622eb4d010SOphir Munk pf = info.port_name; 16632eb4d010SOphir Munk break; 16642eb4d010SOphir Munk } 16652eb4d010SOphir Munk if (file) 16662eb4d010SOphir Munk fclose(file); 16672eb4d010SOphir Munk return pf; 16682eb4d010SOphir Munk } 16692eb4d010SOphir Munk 16702eb4d010SOphir Munk /** 16712eb4d010SOphir Munk * DPDK callback to register a PCI device. 16722eb4d010SOphir Munk * 16732eb4d010SOphir Munk * This function spawns Ethernet devices out of a given PCI device. 16742eb4d010SOphir Munk * 16752eb4d010SOphir Munk * @param[in] pci_drv 16762eb4d010SOphir Munk * PCI driver structure (mlx5_driver). 16772eb4d010SOphir Munk * @param[in] pci_dev 16782eb4d010SOphir Munk * PCI device information. 16792eb4d010SOphir Munk * 16802eb4d010SOphir Munk * @return 16812eb4d010SOphir Munk * 0 on success, a negative errno value otherwise and rte_errno is set. 16822eb4d010SOphir Munk */ 16832eb4d010SOphir Munk int 16842eb4d010SOphir Munk mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 16852eb4d010SOphir Munk struct rte_pci_device *pci_dev) 16862eb4d010SOphir Munk { 16872eb4d010SOphir Munk struct ibv_device **ibv_list; 16882eb4d010SOphir Munk /* 16892eb4d010SOphir Munk * Number of found IB Devices matching with requested PCI BDF. 16902eb4d010SOphir Munk * nd != 1 means there are multiple IB devices over the same 16912eb4d010SOphir Munk * PCI device and we have representors and master. 16922eb4d010SOphir Munk */ 16932eb4d010SOphir Munk unsigned int nd = 0; 16942eb4d010SOphir Munk /* 16952eb4d010SOphir Munk * Number of found IB device Ports. nd = 1 and np = 1..n means 16962eb4d010SOphir Munk * we have the single multiport IB device, and there may be 16972eb4d010SOphir Munk * representors attached to some of found ports. 16982eb4d010SOphir Munk */ 16992eb4d010SOphir Munk unsigned int np = 0; 17002eb4d010SOphir Munk /* 17012eb4d010SOphir Munk * Number of DPDK ethernet devices to Spawn - either over 17022eb4d010SOphir Munk * multiple IB devices or multiple ports of single IB device. 17032eb4d010SOphir Munk * Actually this is the number of iterations to spawn. 17042eb4d010SOphir Munk */ 17052eb4d010SOphir Munk unsigned int ns = 0; 17062eb4d010SOphir Munk /* 17072eb4d010SOphir Munk * Bonding device 17082eb4d010SOphir Munk * < 0 - no bonding device (single one) 17092eb4d010SOphir Munk * >= 0 - bonding device (value is slave PF index) 17102eb4d010SOphir Munk */ 17112eb4d010SOphir Munk int bd = -1; 17122eb4d010SOphir Munk struct mlx5_dev_spawn_data *list = NULL; 17132eb4d010SOphir Munk struct mlx5_dev_config dev_config; 1714d462a83cSMichael Baum unsigned int dev_config_vf; 17152eb4d010SOphir Munk int ret; 17162eb4d010SOphir Munk 17172eb4d010SOphir Munk if (rte_eal_process_type() == RTE_PROC_PRIMARY) 17182eb4d010SOphir Munk mlx5_pmd_socket_init(); 17192eb4d010SOphir Munk ret = mlx5_init_once(); 17202eb4d010SOphir Munk if (ret) { 17212eb4d010SOphir Munk DRV_LOG(ERR, "unable to init PMD global data: %s", 17222eb4d010SOphir Munk strerror(rte_errno)); 17232eb4d010SOphir Munk return -rte_errno; 17242eb4d010SOphir Munk } 17252eb4d010SOphir Munk errno = 0; 17262eb4d010SOphir Munk ibv_list = mlx5_glue->get_device_list(&ret); 17272eb4d010SOphir Munk if (!ibv_list) { 17282eb4d010SOphir Munk rte_errno = errno ? errno : ENOSYS; 17292eb4d010SOphir Munk DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 17302eb4d010SOphir Munk return -rte_errno; 17312eb4d010SOphir Munk } 17322eb4d010SOphir Munk /* 17332eb4d010SOphir Munk * First scan the list of all Infiniband devices to find 17342eb4d010SOphir Munk * matching ones, gathering into the list. 17352eb4d010SOphir Munk */ 17362eb4d010SOphir Munk struct ibv_device *ibv_match[ret + 1]; 17372eb4d010SOphir Munk int nl_route = mlx5_nl_init(NETLINK_ROUTE); 17382eb4d010SOphir Munk int nl_rdma = mlx5_nl_init(NETLINK_RDMA); 17392eb4d010SOphir Munk unsigned int i; 17402eb4d010SOphir Munk 17412eb4d010SOphir Munk while (ret-- > 0) { 17422eb4d010SOphir Munk struct rte_pci_addr pci_addr; 17432eb4d010SOphir Munk 17442eb4d010SOphir Munk DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name); 17452eb4d010SOphir Munk bd = mlx5_device_bond_pci_match 17462eb4d010SOphir Munk (ibv_list[ret], pci_dev, nl_rdma); 17472eb4d010SOphir Munk if (bd >= 0) { 17482eb4d010SOphir Munk /* 17492eb4d010SOphir Munk * Bonding device detected. Only one match is allowed, 17502eb4d010SOphir Munk * the bonding is supported over multi-port IB device, 17512eb4d010SOphir Munk * there should be no matches on representor PCI 17522eb4d010SOphir Munk * functions or non VF LAG bonding devices with 17532eb4d010SOphir Munk * specified address. 17542eb4d010SOphir Munk */ 17552eb4d010SOphir Munk if (nd) { 17562eb4d010SOphir Munk DRV_LOG(ERR, 17572eb4d010SOphir Munk "multiple PCI match on bonding device" 17582eb4d010SOphir Munk "\"%s\" found", ibv_list[ret]->name); 17592eb4d010SOphir Munk rte_errno = ENOENT; 17602eb4d010SOphir Munk ret = -rte_errno; 17612eb4d010SOphir Munk goto exit; 17622eb4d010SOphir Munk } 17632eb4d010SOphir Munk DRV_LOG(INFO, "PCI information matches for" 17642eb4d010SOphir Munk " slave %d bonding device \"%s\"", 17652eb4d010SOphir Munk bd, ibv_list[ret]->name); 17662eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 17672eb4d010SOphir Munk break; 17682eb4d010SOphir Munk } 17692eb4d010SOphir Munk if (mlx5_dev_to_pci_addr 17702eb4d010SOphir Munk (ibv_list[ret]->ibdev_path, &pci_addr)) 17712eb4d010SOphir Munk continue; 17722eb4d010SOphir Munk if (pci_dev->addr.domain != pci_addr.domain || 17732eb4d010SOphir Munk pci_dev->addr.bus != pci_addr.bus || 17742eb4d010SOphir Munk pci_dev->addr.devid != pci_addr.devid || 17752eb4d010SOphir Munk pci_dev->addr.function != pci_addr.function) 17762eb4d010SOphir Munk continue; 17772eb4d010SOphir Munk DRV_LOG(INFO, "PCI information matches for device \"%s\"", 17782eb4d010SOphir Munk ibv_list[ret]->name); 17792eb4d010SOphir Munk ibv_match[nd++] = ibv_list[ret]; 17802eb4d010SOphir Munk } 17812eb4d010SOphir Munk ibv_match[nd] = NULL; 17822eb4d010SOphir Munk if (!nd) { 17832eb4d010SOphir Munk /* No device matches, just complain and bail out. */ 17842eb4d010SOphir Munk DRV_LOG(WARNING, 17852eb4d010SOphir Munk "no Verbs device matches PCI device " PCI_PRI_FMT "," 17862eb4d010SOphir Munk " are kernel drivers loaded?", 17872eb4d010SOphir Munk pci_dev->addr.domain, pci_dev->addr.bus, 17882eb4d010SOphir Munk pci_dev->addr.devid, pci_dev->addr.function); 17892eb4d010SOphir Munk rte_errno = ENOENT; 17902eb4d010SOphir Munk ret = -rte_errno; 17912eb4d010SOphir Munk goto exit; 17922eb4d010SOphir Munk } 17932eb4d010SOphir Munk if (nd == 1) { 17942eb4d010SOphir Munk /* 17952eb4d010SOphir Munk * Found single matching device may have multiple ports. 17962eb4d010SOphir Munk * Each port may be representor, we have to check the port 17972eb4d010SOphir Munk * number and check the representors existence. 17982eb4d010SOphir Munk */ 17992eb4d010SOphir Munk if (nl_rdma >= 0) 18002eb4d010SOphir Munk np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name); 18012eb4d010SOphir Munk if (!np) 18022eb4d010SOphir Munk DRV_LOG(WARNING, "can not get IB device \"%s\"" 18032eb4d010SOphir Munk " ports number", ibv_match[0]->name); 18042eb4d010SOphir Munk if (bd >= 0 && !np) { 18052eb4d010SOphir Munk DRV_LOG(ERR, "can not get ports" 18062eb4d010SOphir Munk " for bonding device"); 18072eb4d010SOphir Munk rte_errno = ENOENT; 18082eb4d010SOphir Munk ret = -rte_errno; 18092eb4d010SOphir Munk goto exit; 18102eb4d010SOphir Munk } 18112eb4d010SOphir Munk } 18122eb4d010SOphir Munk #ifndef HAVE_MLX5DV_DR_DEVX_PORT 18132eb4d010SOphir Munk if (bd >= 0) { 18142eb4d010SOphir Munk /* 18152eb4d010SOphir Munk * This may happen if there is VF LAG kernel support and 18162eb4d010SOphir Munk * application is compiled with older rdma_core library. 18172eb4d010SOphir Munk */ 18182eb4d010SOphir Munk DRV_LOG(ERR, 18192eb4d010SOphir Munk "No kernel/verbs support for VF LAG bonding found."); 18202eb4d010SOphir Munk rte_errno = ENOTSUP; 18212eb4d010SOphir Munk ret = -rte_errno; 18222eb4d010SOphir Munk goto exit; 18232eb4d010SOphir Munk } 18242eb4d010SOphir Munk #endif 18252eb4d010SOphir Munk /* 18262eb4d010SOphir Munk * Now we can determine the maximal 18272eb4d010SOphir Munk * amount of devices to be spawned. 18282eb4d010SOphir Munk */ 18292175c4dcSSuanming Mou list = mlx5_malloc(MLX5_MEM_ZERO, 18302eb4d010SOphir Munk sizeof(struct mlx5_dev_spawn_data) * 18312eb4d010SOphir Munk (np ? np : nd), 18322175c4dcSSuanming Mou RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 18332eb4d010SOphir Munk if (!list) { 18342eb4d010SOphir Munk DRV_LOG(ERR, "spawn data array allocation failure"); 18352eb4d010SOphir Munk rte_errno = ENOMEM; 18362eb4d010SOphir Munk ret = -rte_errno; 18372eb4d010SOphir Munk goto exit; 18382eb4d010SOphir Munk } 18392eb4d010SOphir Munk if (bd >= 0 || np > 1) { 18402eb4d010SOphir Munk /* 18412eb4d010SOphir Munk * Single IB device with multiple ports found, 18422eb4d010SOphir Munk * it may be E-Switch master device and representors. 18432eb4d010SOphir Munk * We have to perform identification through the ports. 18442eb4d010SOphir Munk */ 18452eb4d010SOphir Munk MLX5_ASSERT(nl_rdma >= 0); 18462eb4d010SOphir Munk MLX5_ASSERT(ns == 0); 18472eb4d010SOphir Munk MLX5_ASSERT(nd == 1); 18482eb4d010SOphir Munk MLX5_ASSERT(np); 18492eb4d010SOphir Munk for (i = 1; i <= np; ++i) { 18502eb4d010SOphir Munk list[ns].max_port = np; 1851834a9019SOphir Munk list[ns].phys_port = i; 1852834a9019SOphir Munk list[ns].phys_dev = ibv_match[0]; 18532eb4d010SOphir Munk list[ns].eth_dev = NULL; 18542eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 18552eb4d010SOphir Munk list[ns].pf_bond = bd; 18562eb4d010SOphir Munk list[ns].ifindex = mlx5_nl_ifindex 1857834a9019SOphir Munk (nl_rdma, 1858834a9019SOphir Munk mlx5_os_get_dev_device_name 1859834a9019SOphir Munk (list[ns].phys_dev), i); 18602eb4d010SOphir Munk if (!list[ns].ifindex) { 18612eb4d010SOphir Munk /* 18622eb4d010SOphir Munk * No network interface index found for the 18632eb4d010SOphir Munk * specified port, it means there is no 18642eb4d010SOphir Munk * representor on this port. It's OK, 18652eb4d010SOphir Munk * there can be disabled ports, for example 18662eb4d010SOphir Munk * if sriov_numvfs < sriov_totalvfs. 18672eb4d010SOphir Munk */ 18682eb4d010SOphir Munk continue; 18692eb4d010SOphir Munk } 18702eb4d010SOphir Munk ret = -1; 18712eb4d010SOphir Munk if (nl_route >= 0) 18722eb4d010SOphir Munk ret = mlx5_nl_switch_info 18732eb4d010SOphir Munk (nl_route, 18742eb4d010SOphir Munk list[ns].ifindex, 18752eb4d010SOphir Munk &list[ns].info); 18762eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 18772eb4d010SOphir Munk !list[ns].info.master)) { 18782eb4d010SOphir Munk /* 18792eb4d010SOphir Munk * We failed to recognize representors with 18802eb4d010SOphir Munk * Netlink, let's try to perform the task 18812eb4d010SOphir Munk * with sysfs. 18822eb4d010SOphir Munk */ 18832eb4d010SOphir Munk ret = mlx5_sysfs_switch_info 18842eb4d010SOphir Munk (list[ns].ifindex, 18852eb4d010SOphir Munk &list[ns].info); 18862eb4d010SOphir Munk } 18872eb4d010SOphir Munk if (!ret && bd >= 0) { 18882eb4d010SOphir Munk switch (list[ns].info.name_type) { 18892eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 18902eb4d010SOphir Munk if (list[ns].info.port_name == bd) 18912eb4d010SOphir Munk ns++; 18922eb4d010SOphir Munk break; 1893420bbdaeSViacheslav Ovsiienko case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1894420bbdaeSViacheslav Ovsiienko /* Fallthrough */ 18952eb4d010SOphir Munk case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 18962eb4d010SOphir Munk if (list[ns].info.pf_num == bd) 18972eb4d010SOphir Munk ns++; 18982eb4d010SOphir Munk break; 18992eb4d010SOphir Munk default: 19002eb4d010SOphir Munk break; 19012eb4d010SOphir Munk } 19022eb4d010SOphir Munk continue; 19032eb4d010SOphir Munk } 19042eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 19052eb4d010SOphir Munk list[ns].info.master)) 19062eb4d010SOphir Munk ns++; 19072eb4d010SOphir Munk } 19082eb4d010SOphir Munk if (!ns) { 19092eb4d010SOphir Munk DRV_LOG(ERR, 19102eb4d010SOphir Munk "unable to recognize master/representors" 19112eb4d010SOphir Munk " on the IB device with multiple ports"); 19122eb4d010SOphir Munk rte_errno = ENOENT; 19132eb4d010SOphir Munk ret = -rte_errno; 19142eb4d010SOphir Munk goto exit; 19152eb4d010SOphir Munk } 19162eb4d010SOphir Munk } else { 19172eb4d010SOphir Munk /* 19182eb4d010SOphir Munk * The existence of several matching entries (nd > 1) means 19192eb4d010SOphir Munk * port representors have been instantiated. No existing Verbs 19202eb4d010SOphir Munk * call nor sysfs entries can tell them apart, this can only 19212eb4d010SOphir Munk * be done through Netlink calls assuming kernel drivers are 19222eb4d010SOphir Munk * recent enough to support them. 19232eb4d010SOphir Munk * 19242eb4d010SOphir Munk * In the event of identification failure through Netlink, 19252eb4d010SOphir Munk * try again through sysfs, then: 19262eb4d010SOphir Munk * 19272eb4d010SOphir Munk * 1. A single IB device matches (nd == 1) with single 19282eb4d010SOphir Munk * port (np=0/1) and is not a representor, assume 19292eb4d010SOphir Munk * no switch support. 19302eb4d010SOphir Munk * 19312eb4d010SOphir Munk * 2. Otherwise no safe assumptions can be made; 19322eb4d010SOphir Munk * complain louder and bail out. 19332eb4d010SOphir Munk */ 19342eb4d010SOphir Munk for (i = 0; i != nd; ++i) { 19352eb4d010SOphir Munk memset(&list[ns].info, 0, sizeof(list[ns].info)); 19362eb4d010SOphir Munk list[ns].max_port = 1; 1937834a9019SOphir Munk list[ns].phys_port = 1; 1938834a9019SOphir Munk list[ns].phys_dev = ibv_match[i]; 19392eb4d010SOphir Munk list[ns].eth_dev = NULL; 19402eb4d010SOphir Munk list[ns].pci_dev = pci_dev; 19412eb4d010SOphir Munk list[ns].pf_bond = -1; 19422eb4d010SOphir Munk list[ns].ifindex = 0; 19432eb4d010SOphir Munk if (nl_rdma >= 0) 19442eb4d010SOphir Munk list[ns].ifindex = mlx5_nl_ifindex 1945834a9019SOphir Munk (nl_rdma, 1946834a9019SOphir Munk mlx5_os_get_dev_device_name 1947834a9019SOphir Munk (list[ns].phys_dev), 1); 19482eb4d010SOphir Munk if (!list[ns].ifindex) { 19492eb4d010SOphir Munk char ifname[IF_NAMESIZE]; 19502eb4d010SOphir Munk 19512eb4d010SOphir Munk /* 19522eb4d010SOphir Munk * Netlink failed, it may happen with old 19532eb4d010SOphir Munk * ib_core kernel driver (before 4.16). 19542eb4d010SOphir Munk * We can assume there is old driver because 19552eb4d010SOphir Munk * here we are processing single ports IB 19562eb4d010SOphir Munk * devices. Let's try sysfs to retrieve 19572eb4d010SOphir Munk * the ifindex. The method works for 19582eb4d010SOphir Munk * master device only. 19592eb4d010SOphir Munk */ 19602eb4d010SOphir Munk if (nd > 1) { 19612eb4d010SOphir Munk /* 19622eb4d010SOphir Munk * Multiple devices found, assume 19632eb4d010SOphir Munk * representors, can not distinguish 19642eb4d010SOphir Munk * master/representor and retrieve 19652eb4d010SOphir Munk * ifindex via sysfs. 19662eb4d010SOphir Munk */ 19672eb4d010SOphir Munk continue; 19682eb4d010SOphir Munk } 1969aec086c9SMatan Azrad ret = mlx5_get_ifname_sysfs 1970aec086c9SMatan Azrad (ibv_match[i]->ibdev_path, ifname); 19712eb4d010SOphir Munk if (!ret) 19722eb4d010SOphir Munk list[ns].ifindex = 19732eb4d010SOphir Munk if_nametoindex(ifname); 19742eb4d010SOphir Munk if (!list[ns].ifindex) { 19752eb4d010SOphir Munk /* 19762eb4d010SOphir Munk * No network interface index found 19772eb4d010SOphir Munk * for the specified device, it means 19782eb4d010SOphir Munk * there it is neither representor 19792eb4d010SOphir Munk * nor master. 19802eb4d010SOphir Munk */ 19812eb4d010SOphir Munk continue; 19822eb4d010SOphir Munk } 19832eb4d010SOphir Munk } 19842eb4d010SOphir Munk ret = -1; 19852eb4d010SOphir Munk if (nl_route >= 0) 19862eb4d010SOphir Munk ret = mlx5_nl_switch_info 19872eb4d010SOphir Munk (nl_route, 19882eb4d010SOphir Munk list[ns].ifindex, 19892eb4d010SOphir Munk &list[ns].info); 19902eb4d010SOphir Munk if (ret || (!list[ns].info.representor && 19912eb4d010SOphir Munk !list[ns].info.master)) { 19922eb4d010SOphir Munk /* 19932eb4d010SOphir Munk * We failed to recognize representors with 19942eb4d010SOphir Munk * Netlink, let's try to perform the task 19952eb4d010SOphir Munk * with sysfs. 19962eb4d010SOphir Munk */ 19972eb4d010SOphir Munk ret = mlx5_sysfs_switch_info 19982eb4d010SOphir Munk (list[ns].ifindex, 19992eb4d010SOphir Munk &list[ns].info); 20002eb4d010SOphir Munk } 20012eb4d010SOphir Munk if (!ret && (list[ns].info.representor ^ 20022eb4d010SOphir Munk list[ns].info.master)) { 20032eb4d010SOphir Munk ns++; 20042eb4d010SOphir Munk } else if ((nd == 1) && 20052eb4d010SOphir Munk !list[ns].info.representor && 20062eb4d010SOphir Munk !list[ns].info.master) { 20072eb4d010SOphir Munk /* 20082eb4d010SOphir Munk * Single IB device with 20092eb4d010SOphir Munk * one physical port and 20102eb4d010SOphir Munk * attached network device. 20112eb4d010SOphir Munk * May be SRIOV is not enabled 20122eb4d010SOphir Munk * or there is no representors. 20132eb4d010SOphir Munk */ 20142eb4d010SOphir Munk DRV_LOG(INFO, "no E-Switch support detected"); 20152eb4d010SOphir Munk ns++; 20162eb4d010SOphir Munk break; 20172eb4d010SOphir Munk } 20182eb4d010SOphir Munk } 20192eb4d010SOphir Munk if (!ns) { 20202eb4d010SOphir Munk DRV_LOG(ERR, 20212eb4d010SOphir Munk "unable to recognize master/representors" 20222eb4d010SOphir Munk " on the multiple IB devices"); 20232eb4d010SOphir Munk rte_errno = ENOENT; 20242eb4d010SOphir Munk ret = -rte_errno; 20252eb4d010SOphir Munk goto exit; 20262eb4d010SOphir Munk } 20272eb4d010SOphir Munk } 20282eb4d010SOphir Munk MLX5_ASSERT(ns); 20292eb4d010SOphir Munk /* 20302eb4d010SOphir Munk * Sort list to probe devices in natural order for users convenience 20312eb4d010SOphir Munk * (i.e. master first, then representors from lowest to highest ID). 20322eb4d010SOphir Munk */ 20332eb4d010SOphir Munk qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp); 20342eb4d010SOphir Munk /* Device specific configuration. */ 20352eb4d010SOphir Munk switch (pci_dev->id.device_id) { 20362eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 20372eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 20382eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 20392eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 20402eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 20412eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 20422eb4d010SOphir Munk case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF: 2043d462a83cSMichael Baum dev_config_vf = 1; 20442eb4d010SOphir Munk break; 20452eb4d010SOphir Munk default: 2046d462a83cSMichael Baum dev_config_vf = 0; 20472eb4d010SOphir Munk break; 20482eb4d010SOphir Munk } 20492eb4d010SOphir Munk for (i = 0; i != ns; ++i) { 20502eb4d010SOphir Munk uint32_t restore; 20512eb4d010SOphir Munk 2052d462a83cSMichael Baum /* Default configuration. */ 2053d462a83cSMichael Baum memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); 2054d462a83cSMichael Baum dev_config.vf = dev_config_vf; 2055d462a83cSMichael Baum dev_config.mps = MLX5_ARG_UNSET; 2056d462a83cSMichael Baum dev_config.dbnc = MLX5_ARG_UNSET; 2057d462a83cSMichael Baum dev_config.rx_vec_en = 1; 2058d462a83cSMichael Baum dev_config.txq_inline_max = MLX5_ARG_UNSET; 2059d462a83cSMichael Baum dev_config.txq_inline_min = MLX5_ARG_UNSET; 2060d462a83cSMichael Baum dev_config.txq_inline_mpw = MLX5_ARG_UNSET; 2061d462a83cSMichael Baum dev_config.txqs_inline = MLX5_ARG_UNSET; 2062d462a83cSMichael Baum dev_config.vf_nl_en = 1; 2063d462a83cSMichael Baum dev_config.mr_ext_memseg_en = 1; 2064d462a83cSMichael Baum dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 2065d462a83cSMichael Baum dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 2066d462a83cSMichael Baum dev_config.dv_esw_en = 1; 2067d462a83cSMichael Baum dev_config.dv_flow_en = 1; 2068d462a83cSMichael Baum dev_config.decap_en = 1; 2069d462a83cSMichael Baum dev_config.log_hp_size = MLX5_ARG_UNSET; 20702eb4d010SOphir Munk list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device, 20712eb4d010SOphir Munk &list[i], 2072d462a83cSMichael Baum &dev_config); 20732eb4d010SOphir Munk if (!list[i].eth_dev) { 20742eb4d010SOphir Munk if (rte_errno != EBUSY && rte_errno != EEXIST) 20752eb4d010SOphir Munk break; 20762eb4d010SOphir Munk /* Device is disabled or already spawned. Ignore it. */ 20772eb4d010SOphir Munk continue; 20782eb4d010SOphir Munk } 20792eb4d010SOphir Munk restore = list[i].eth_dev->data->dev_flags; 20802eb4d010SOphir Munk rte_eth_copy_pci_info(list[i].eth_dev, pci_dev); 20812eb4d010SOphir Munk /* Restore non-PCI flags cleared by the above call. */ 20822eb4d010SOphir Munk list[i].eth_dev->data->dev_flags |= restore; 20832eb4d010SOphir Munk rte_eth_dev_probing_finish(list[i].eth_dev); 20842eb4d010SOphir Munk } 20852eb4d010SOphir Munk if (i != ns) { 20862eb4d010SOphir Munk DRV_LOG(ERR, 20872eb4d010SOphir Munk "probe of PCI device " PCI_PRI_FMT " aborted after" 20882eb4d010SOphir Munk " encountering an error: %s", 20892eb4d010SOphir Munk pci_dev->addr.domain, pci_dev->addr.bus, 20902eb4d010SOphir Munk pci_dev->addr.devid, pci_dev->addr.function, 20912eb4d010SOphir Munk strerror(rte_errno)); 20922eb4d010SOphir Munk ret = -rte_errno; 20932eb4d010SOphir Munk /* Roll back. */ 20942eb4d010SOphir Munk while (i--) { 20952eb4d010SOphir Munk if (!list[i].eth_dev) 20962eb4d010SOphir Munk continue; 20972eb4d010SOphir Munk mlx5_dev_close(list[i].eth_dev); 20982eb4d010SOphir Munk /* mac_addrs must not be freed because in dev_private */ 20992eb4d010SOphir Munk list[i].eth_dev->data->mac_addrs = NULL; 21002eb4d010SOphir Munk claim_zero(rte_eth_dev_release_port(list[i].eth_dev)); 21012eb4d010SOphir Munk } 21022eb4d010SOphir Munk /* Restore original error. */ 21032eb4d010SOphir Munk rte_errno = -ret; 21042eb4d010SOphir Munk } else { 21052eb4d010SOphir Munk ret = 0; 21062eb4d010SOphir Munk } 21072eb4d010SOphir Munk exit: 21082eb4d010SOphir Munk /* 21092eb4d010SOphir Munk * Do the routine cleanup: 21102eb4d010SOphir Munk * - close opened Netlink sockets 21112eb4d010SOphir Munk * - free allocated spawn data array 21122eb4d010SOphir Munk * - free the Infiniband device list 21132eb4d010SOphir Munk */ 21142eb4d010SOphir Munk if (nl_rdma >= 0) 21152eb4d010SOphir Munk close(nl_rdma); 21162eb4d010SOphir Munk if (nl_route >= 0) 21172eb4d010SOphir Munk close(nl_route); 21182eb4d010SOphir Munk if (list) 21192175c4dcSSuanming Mou mlx5_free(list); 21202eb4d010SOphir Munk MLX5_ASSERT(ibv_list); 21212eb4d010SOphir Munk mlx5_glue->free_device_list(ibv_list); 21222eb4d010SOphir Munk return ret; 21232eb4d010SOphir Munk } 21242eb4d010SOphir Munk 21252eb4d010SOphir Munk static int 21262eb4d010SOphir Munk mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config) 21272eb4d010SOphir Munk { 21282eb4d010SOphir Munk char *env; 21292eb4d010SOphir Munk int value; 21302eb4d010SOphir Munk 21312eb4d010SOphir Munk MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 21322eb4d010SOphir Munk /* Get environment variable to store. */ 21332eb4d010SOphir Munk env = getenv(MLX5_SHUT_UP_BF); 21342eb4d010SOphir Munk value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET; 21352eb4d010SOphir Munk if (config->dbnc == MLX5_ARG_UNSET) 21362eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1); 21372eb4d010SOphir Munk else 21382eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, 21392eb4d010SOphir Munk config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1); 21402eb4d010SOphir Munk return value; 21412eb4d010SOphir Munk } 21422eb4d010SOphir Munk 21432eb4d010SOphir Munk static void 21442eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(int value) 21452eb4d010SOphir Munk { 21462eb4d010SOphir Munk MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY); 21472eb4d010SOphir Munk /* Restore the original environment variable state. */ 21482eb4d010SOphir Munk if (value == MLX5_ARG_UNSET) 21492eb4d010SOphir Munk unsetenv(MLX5_SHUT_UP_BF); 21502eb4d010SOphir Munk else 21512eb4d010SOphir Munk setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1); 21522eb4d010SOphir Munk } 21532eb4d010SOphir Munk 21542eb4d010SOphir Munk /** 21552eb4d010SOphir Munk * Extract pdn of PD object using DV API. 21562eb4d010SOphir Munk * 21572eb4d010SOphir Munk * @param[in] pd 21582eb4d010SOphir Munk * Pointer to the verbs PD object. 21592eb4d010SOphir Munk * @param[out] pdn 21602eb4d010SOphir Munk * Pointer to the PD object number variable. 21612eb4d010SOphir Munk * 21622eb4d010SOphir Munk * @return 21632eb4d010SOphir Munk * 0 on success, error value otherwise. 21642eb4d010SOphir Munk */ 21652eb4d010SOphir Munk int 21662eb4d010SOphir Munk mlx5_os_get_pdn(void *pd, uint32_t *pdn) 21672eb4d010SOphir Munk { 21682eb4d010SOphir Munk #ifdef HAVE_IBV_FLOW_DV_SUPPORT 21692eb4d010SOphir Munk struct mlx5dv_obj obj; 21702eb4d010SOphir Munk struct mlx5dv_pd pd_info; 21712eb4d010SOphir Munk int ret = 0; 21722eb4d010SOphir Munk 21732eb4d010SOphir Munk obj.pd.in = pd; 21742eb4d010SOphir Munk obj.pd.out = &pd_info; 21752eb4d010SOphir Munk ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD); 21762eb4d010SOphir Munk if (ret) { 21772eb4d010SOphir Munk DRV_LOG(DEBUG, "Fail to get PD object info"); 21782eb4d010SOphir Munk return ret; 21792eb4d010SOphir Munk } 21802eb4d010SOphir Munk *pdn = pd_info.pdn; 21812eb4d010SOphir Munk return 0; 21822eb4d010SOphir Munk #else 21832eb4d010SOphir Munk (void)pd; 21842eb4d010SOphir Munk (void)pdn; 21852eb4d010SOphir Munk return -ENOTSUP; 21862eb4d010SOphir Munk #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 21872eb4d010SOphir Munk } 21882eb4d010SOphir Munk 21892eb4d010SOphir Munk /** 21902eb4d010SOphir Munk * Function API to open IB device. 21912eb4d010SOphir Munk * 21922eb4d010SOphir Munk * This function calls the Linux glue APIs to open a device. 21932eb4d010SOphir Munk * 21942eb4d010SOphir Munk * @param[in] spawn 21952eb4d010SOphir Munk * Pointer to the IB device attributes (name, port, etc). 21962eb4d010SOphir Munk * @param[out] config 21972eb4d010SOphir Munk * Pointer to device configuration structure. 21982eb4d010SOphir Munk * @param[out] sh 21992eb4d010SOphir Munk * Pointer to shared context structure. 22002eb4d010SOphir Munk * 22012eb4d010SOphir Munk * @return 22022eb4d010SOphir Munk * 0 on success, a positive error value otherwise. 22032eb4d010SOphir Munk */ 22042eb4d010SOphir Munk int 22052eb4d010SOphir Munk mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 22062eb4d010SOphir Munk const struct mlx5_dev_config *config, 22072eb4d010SOphir Munk struct mlx5_dev_ctx_shared *sh) 22082eb4d010SOphir Munk { 22092eb4d010SOphir Munk int dbmap_env; 22102eb4d010SOphir Munk int err = 0; 2211d133f4cdSViacheslav Ovsiienko 2212d133f4cdSViacheslav Ovsiienko sh->numa_node = spawn->pci_dev->device.numa_node; 2213d133f4cdSViacheslav Ovsiienko pthread_mutex_init(&sh->txpp.mutex, NULL); 22142eb4d010SOphir Munk /* 22152eb4d010SOphir Munk * Configure environment variable "MLX5_BF_SHUT_UP" 22162eb4d010SOphir Munk * before the device creation. The rdma_core library 22172eb4d010SOphir Munk * checks the variable at device creation and 22182eb4d010SOphir Munk * stores the result internally. 22192eb4d010SOphir Munk */ 22202eb4d010SOphir Munk dbmap_env = mlx5_config_doorbell_mapping_env(config); 22212eb4d010SOphir Munk /* Try to open IB device with DV first, then usual Verbs. */ 22222eb4d010SOphir Munk errno = 0; 2223834a9019SOphir Munk sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev); 22242eb4d010SOphir Munk if (sh->ctx) { 22252eb4d010SOphir Munk sh->devx = 1; 22262eb4d010SOphir Munk DRV_LOG(DEBUG, "DevX is supported"); 22272eb4d010SOphir Munk /* The device is created, no need for environment. */ 22282eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(dbmap_env); 22292eb4d010SOphir Munk } else { 22302eb4d010SOphir Munk /* The environment variable is still configured. */ 2231834a9019SOphir Munk sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 22322eb4d010SOphir Munk err = errno ? errno : ENODEV; 22332eb4d010SOphir Munk /* 22342eb4d010SOphir Munk * The environment variable is not needed anymore, 22352eb4d010SOphir Munk * all device creation attempts are completed. 22362eb4d010SOphir Munk */ 22372eb4d010SOphir Munk mlx5_restore_doorbell_mapping_env(dbmap_env); 22382eb4d010SOphir Munk if (!sh->ctx) 22392eb4d010SOphir Munk return err; 22402eb4d010SOphir Munk DRV_LOG(DEBUG, "DevX is NOT supported"); 22412eb4d010SOphir Munk err = 0; 22422eb4d010SOphir Munk } 22432eb4d010SOphir Munk return err; 22442eb4d010SOphir Munk } 22452eb4d010SOphir Munk 22462eb4d010SOphir Munk /** 22472eb4d010SOphir Munk * Install shared asynchronous device events handler. 22482eb4d010SOphir Munk * This function is implemented to support event sharing 22492eb4d010SOphir Munk * between multiple ports of single IB device. 22502eb4d010SOphir Munk * 22512eb4d010SOphir Munk * @param sh 22522eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 22532eb4d010SOphir Munk */ 22542eb4d010SOphir Munk void 22552eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 22562eb4d010SOphir Munk { 22572eb4d010SOphir Munk int ret; 22582eb4d010SOphir Munk int flags; 22592eb4d010SOphir Munk 22602eb4d010SOphir Munk sh->intr_handle.fd = -1; 22612eb4d010SOphir Munk flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL); 22622eb4d010SOphir Munk ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd, 22632eb4d010SOphir Munk F_SETFL, flags | O_NONBLOCK); 22642eb4d010SOphir Munk if (ret) { 22652eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor async event" 22662eb4d010SOphir Munk " queue"); 22672eb4d010SOphir Munk } else { 22682eb4d010SOphir Munk sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd; 22692eb4d010SOphir Munk sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 22702eb4d010SOphir Munk if (rte_intr_callback_register(&sh->intr_handle, 22712eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh)) { 22722eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the shared interrupt."); 22732eb4d010SOphir Munk sh->intr_handle.fd = -1; 22742eb4d010SOphir Munk } 22752eb4d010SOphir Munk } 22762eb4d010SOphir Munk if (sh->devx) { 22772eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 22782eb4d010SOphir Munk sh->intr_handle_devx.fd = -1; 227921b7c452SOphir Munk sh->devx_comp = 228021b7c452SOphir Munk (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx); 228121b7c452SOphir Munk struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp; 228221b7c452SOphir Munk if (!devx_comp) { 22832eb4d010SOphir Munk DRV_LOG(INFO, "failed to allocate devx_comp."); 22842eb4d010SOphir Munk return; 22852eb4d010SOphir Munk } 228621b7c452SOphir Munk flags = fcntl(devx_comp->fd, F_GETFL); 228721b7c452SOphir Munk ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK); 22882eb4d010SOphir Munk if (ret) { 22892eb4d010SOphir Munk DRV_LOG(INFO, "failed to change file descriptor" 22902eb4d010SOphir Munk " devx comp"); 22912eb4d010SOphir Munk return; 22922eb4d010SOphir Munk } 229321b7c452SOphir Munk sh->intr_handle_devx.fd = devx_comp->fd; 22942eb4d010SOphir Munk sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 22952eb4d010SOphir Munk if (rte_intr_callback_register(&sh->intr_handle_devx, 22962eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh)) { 22972eb4d010SOphir Munk DRV_LOG(INFO, "Fail to install the devx shared" 22982eb4d010SOphir Munk " interrupt."); 22992eb4d010SOphir Munk sh->intr_handle_devx.fd = -1; 23002eb4d010SOphir Munk } 23012eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */ 23022eb4d010SOphir Munk } 23032eb4d010SOphir Munk } 23042eb4d010SOphir Munk 23052eb4d010SOphir Munk /** 23062eb4d010SOphir Munk * Uninstall shared asynchronous device events handler. 23072eb4d010SOphir Munk * This function is implemented to support event sharing 23082eb4d010SOphir Munk * between multiple ports of single IB device. 23092eb4d010SOphir Munk * 23102eb4d010SOphir Munk * @param dev 23112eb4d010SOphir Munk * Pointer to mlx5_dev_ctx_shared object. 23122eb4d010SOphir Munk */ 23132eb4d010SOphir Munk void 23142eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 23152eb4d010SOphir Munk { 23162eb4d010SOphir Munk if (sh->intr_handle.fd >= 0) 23172eb4d010SOphir Munk mlx5_intr_callback_unregister(&sh->intr_handle, 23182eb4d010SOphir Munk mlx5_dev_interrupt_handler, sh); 23192eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC 23202eb4d010SOphir Munk if (sh->intr_handle_devx.fd >= 0) 23212eb4d010SOphir Munk rte_intr_callback_unregister(&sh->intr_handle_devx, 23222eb4d010SOphir Munk mlx5_dev_interrupt_handler_devx, sh); 23232eb4d010SOphir Munk if (sh->devx_comp) 23242eb4d010SOphir Munk mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 23252eb4d010SOphir Munk #endif 23262eb4d010SOphir Munk } 2327042f5c94SOphir Munk 232873bf9235SOphir Munk /** 232973bf9235SOphir Munk * Read statistics by a named counter. 233073bf9235SOphir Munk * 233173bf9235SOphir Munk * @param[in] priv 233273bf9235SOphir Munk * Pointer to the private device data structure. 233373bf9235SOphir Munk * @param[in] ctr_name 233473bf9235SOphir Munk * Pointer to the name of the statistic counter to read 233573bf9235SOphir Munk * @param[out] stat 233673bf9235SOphir Munk * Pointer to read statistic value. 233773bf9235SOphir Munk * @return 233873bf9235SOphir Munk * 0 on success and stat is valud, 1 if failed to read the value 233973bf9235SOphir Munk * rte_errno is set. 234073bf9235SOphir Munk * 234173bf9235SOphir Munk */ 234273bf9235SOphir Munk int 234373bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 234473bf9235SOphir Munk uint64_t *stat) 234573bf9235SOphir Munk { 234673bf9235SOphir Munk int fd; 234773bf9235SOphir Munk 234873bf9235SOphir Munk if (priv->sh) { 234973bf9235SOphir Munk MKSTR(path, "%s/ports/%d/hw_counters/%s", 235073bf9235SOphir Munk priv->sh->ibdev_path, 235173bf9235SOphir Munk priv->dev_port, 235273bf9235SOphir Munk ctr_name); 235373bf9235SOphir Munk fd = open(path, O_RDONLY); 2354038e7fc0SShy Shyman /* 2355038e7fc0SShy Shyman * in switchdev the file location is not per port 2356038e7fc0SShy Shyman * but rather in <ibdev_path>/hw_counters/<file_name>. 2357038e7fc0SShy Shyman */ 2358038e7fc0SShy Shyman if (fd == -1) { 2359038e7fc0SShy Shyman MKSTR(path1, "%s/hw_counters/%s", 2360038e7fc0SShy Shyman priv->sh->ibdev_path, 2361038e7fc0SShy Shyman ctr_name); 2362038e7fc0SShy Shyman fd = open(path1, O_RDONLY); 2363038e7fc0SShy Shyman } 236473bf9235SOphir Munk if (fd != -1) { 236573bf9235SOphir Munk char buf[21] = {'\0'}; 236673bf9235SOphir Munk ssize_t n = read(fd, buf, sizeof(buf)); 236773bf9235SOphir Munk 236873bf9235SOphir Munk close(fd); 236973bf9235SOphir Munk if (n != -1) { 237073bf9235SOphir Munk *stat = strtoull(buf, NULL, 10); 237173bf9235SOphir Munk return 0; 237273bf9235SOphir Munk } 237373bf9235SOphir Munk } 237473bf9235SOphir Munk } 237573bf9235SOphir Munk *stat = 0; 237673bf9235SOphir Munk return 1; 237773bf9235SOphir Munk } 237873bf9235SOphir Munk 237973bf9235SOphir Munk /** 2380d5ed8aa9SOphir Munk * Set the reg_mr and dereg_mr call backs 2381d5ed8aa9SOphir Munk * 2382d5ed8aa9SOphir Munk * @param reg_mr_cb[out] 2383d5ed8aa9SOphir Munk * Pointer to reg_mr func 2384d5ed8aa9SOphir Munk * @param dereg_mr_cb[out] 2385d5ed8aa9SOphir Munk * Pointer to dereg_mr func 2386d5ed8aa9SOphir Munk * 2387d5ed8aa9SOphir Munk */ 2388d5ed8aa9SOphir Munk void 2389d5ed8aa9SOphir Munk mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 2390d5ed8aa9SOphir Munk mlx5_dereg_mr_t *dereg_mr_cb) 2391d5ed8aa9SOphir Munk { 23924f96d913SOphir Munk *reg_mr_cb = mlx5_verbs_ops.reg_mr; 23934f96d913SOphir Munk *dereg_mr_cb = mlx5_verbs_ops.dereg_mr; 2394d5ed8aa9SOphir Munk } 2395d5ed8aa9SOphir Munk 2396ab27cdd9SOphir Munk /** 2397ab27cdd9SOphir Munk * Remove a MAC address from device 2398ab27cdd9SOphir Munk * 2399ab27cdd9SOphir Munk * @param dev 2400ab27cdd9SOphir Munk * Pointer to Ethernet device structure. 2401ab27cdd9SOphir Munk * @param index 2402ab27cdd9SOphir Munk * MAC address index. 2403ab27cdd9SOphir Munk */ 2404ab27cdd9SOphir Munk void 2405ab27cdd9SOphir Munk mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 2406ab27cdd9SOphir Munk { 2407ab27cdd9SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2408ab27cdd9SOphir Munk const int vf = priv->config.vf; 2409ab27cdd9SOphir Munk 2410ab27cdd9SOphir Munk if (vf) 2411ab27cdd9SOphir Munk mlx5_nl_mac_addr_remove(priv->nl_socket_route, 2412ab27cdd9SOphir Munk mlx5_ifindex(dev), priv->mac_own, 2413ab27cdd9SOphir Munk &dev->data->mac_addrs[index], index); 2414ab27cdd9SOphir Munk } 2415ab27cdd9SOphir Munk 2416ab27cdd9SOphir Munk /** 2417ab27cdd9SOphir Munk * Adds a MAC address to the device 2418ab27cdd9SOphir Munk * 2419ab27cdd9SOphir Munk * @param dev 2420ab27cdd9SOphir Munk * Pointer to Ethernet device structure. 2421ab27cdd9SOphir Munk * @param mac_addr 2422ab27cdd9SOphir Munk * MAC address to register. 2423ab27cdd9SOphir Munk * @param index 2424ab27cdd9SOphir Munk * MAC address index. 2425ab27cdd9SOphir Munk * 2426ab27cdd9SOphir Munk * @return 2427ab27cdd9SOphir Munk * 0 on success, a negative errno value otherwise 2428ab27cdd9SOphir Munk */ 2429ab27cdd9SOphir Munk int 2430ab27cdd9SOphir Munk mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 2431ab27cdd9SOphir Munk uint32_t index) 2432ab27cdd9SOphir Munk { 2433ab27cdd9SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2434ab27cdd9SOphir Munk const int vf = priv->config.vf; 2435ab27cdd9SOphir Munk int ret = 0; 2436ab27cdd9SOphir Munk 2437ab27cdd9SOphir Munk if (vf) 2438ab27cdd9SOphir Munk ret = mlx5_nl_mac_addr_add(priv->nl_socket_route, 2439ab27cdd9SOphir Munk mlx5_ifindex(dev), priv->mac_own, 2440ab27cdd9SOphir Munk mac, index); 2441ab27cdd9SOphir Munk return ret; 2442ab27cdd9SOphir Munk } 2443ab27cdd9SOphir Munk 2444ab27cdd9SOphir Munk /** 2445ab27cdd9SOphir Munk * Modify a VF MAC address 2446ab27cdd9SOphir Munk * 2447ab27cdd9SOphir Munk * @param priv 2448ab27cdd9SOphir Munk * Pointer to device private data. 2449ab27cdd9SOphir Munk * @param mac_addr 2450ab27cdd9SOphir Munk * MAC address to modify into. 2451ab27cdd9SOphir Munk * @param iface_idx 2452ab27cdd9SOphir Munk * Net device interface index 2453ab27cdd9SOphir Munk * @param vf_index 2454ab27cdd9SOphir Munk * VF index 2455ab27cdd9SOphir Munk * 2456ab27cdd9SOphir Munk * @return 2457ab27cdd9SOphir Munk * 0 on success, a negative errno value otherwise 2458ab27cdd9SOphir Munk */ 2459ab27cdd9SOphir Munk int 2460ab27cdd9SOphir Munk mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 2461ab27cdd9SOphir Munk unsigned int iface_idx, 2462ab27cdd9SOphir Munk struct rte_ether_addr *mac_addr, 2463ab27cdd9SOphir Munk int vf_index) 2464ab27cdd9SOphir Munk { 2465ab27cdd9SOphir Munk return mlx5_nl_vf_mac_addr_modify 2466ab27cdd9SOphir Munk (priv->nl_socket_route, iface_idx, mac_addr, vf_index); 2467ab27cdd9SOphir Munk } 2468ab27cdd9SOphir Munk 24694d18abd1SOphir Munk /** 24704d18abd1SOphir Munk * Set device promiscuous mode 24714d18abd1SOphir Munk * 24724d18abd1SOphir Munk * @param dev 24734d18abd1SOphir Munk * Pointer to Ethernet device structure. 24744d18abd1SOphir Munk * @param enable 24754d18abd1SOphir Munk * 0 - promiscuous is disabled, otherwise - enabled 24764d18abd1SOphir Munk * 24774d18abd1SOphir Munk * @return 24784d18abd1SOphir Munk * 0 on success, a negative error value otherwise 24794d18abd1SOphir Munk */ 24804d18abd1SOphir Munk int 24814d18abd1SOphir Munk mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 24824d18abd1SOphir Munk { 24834d18abd1SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 24844d18abd1SOphir Munk 24854d18abd1SOphir Munk return mlx5_nl_promisc(priv->nl_socket_route, 24864d18abd1SOphir Munk mlx5_ifindex(dev), !!enable); 24874d18abd1SOphir Munk } 24884d18abd1SOphir Munk 24894d18abd1SOphir Munk /** 24904d18abd1SOphir Munk * Set device promiscuous mode 24914d18abd1SOphir Munk * 24924d18abd1SOphir Munk * @param dev 24934d18abd1SOphir Munk * Pointer to Ethernet device structure. 24944d18abd1SOphir Munk * @param enable 24954d18abd1SOphir Munk * 0 - all multicase is disabled, otherwise - enabled 24964d18abd1SOphir Munk * 24974d18abd1SOphir Munk * @return 24984d18abd1SOphir Munk * 0 on success, a negative error value otherwise 24994d18abd1SOphir Munk */ 25004d18abd1SOphir Munk int 25014d18abd1SOphir Munk mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 25024d18abd1SOphir Munk { 25034d18abd1SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 25044d18abd1SOphir Munk 25054d18abd1SOphir Munk return mlx5_nl_allmulti(priv->nl_socket_route, 25064d18abd1SOphir Munk mlx5_ifindex(dev), !!enable); 25074d18abd1SOphir Munk } 25084d18abd1SOphir Munk 2509f00f6562SOphir Munk /** 2510f00f6562SOphir Munk * Flush device MAC addresses 2511f00f6562SOphir Munk * 2512f00f6562SOphir Munk * @param dev 2513f00f6562SOphir Munk * Pointer to Ethernet device structure. 2514f00f6562SOphir Munk * 2515f00f6562SOphir Munk */ 2516f00f6562SOphir Munk void 2517f00f6562SOphir Munk mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 2518f00f6562SOphir Munk { 2519f00f6562SOphir Munk struct mlx5_priv *priv = dev->data->dev_private; 2520f00f6562SOphir Munk 2521f00f6562SOphir Munk mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev), 2522f00f6562SOphir Munk dev->data->mac_addrs, 2523f00f6562SOphir Munk MLX5_MAX_MAC_ADDRESSES, priv->mac_own); 2524f00f6562SOphir Munk } 2525f00f6562SOphir Munk 2526042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_ops = { 2527042f5c94SOphir Munk .dev_configure = mlx5_dev_configure, 2528042f5c94SOphir Munk .dev_start = mlx5_dev_start, 2529042f5c94SOphir Munk .dev_stop = mlx5_dev_stop, 2530042f5c94SOphir Munk .dev_set_link_down = mlx5_set_link_down, 2531042f5c94SOphir Munk .dev_set_link_up = mlx5_set_link_up, 2532042f5c94SOphir Munk .dev_close = mlx5_dev_close, 2533042f5c94SOphir Munk .promiscuous_enable = mlx5_promiscuous_enable, 2534042f5c94SOphir Munk .promiscuous_disable = mlx5_promiscuous_disable, 2535042f5c94SOphir Munk .allmulticast_enable = mlx5_allmulticast_enable, 2536042f5c94SOphir Munk .allmulticast_disable = mlx5_allmulticast_disable, 2537042f5c94SOphir Munk .link_update = mlx5_link_update, 2538042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2539042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2540042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2541042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2542042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2543042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2544042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2545b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2546042f5c94SOphir Munk .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2547042f5c94SOphir Munk .vlan_filter_set = mlx5_vlan_filter_set, 2548042f5c94SOphir Munk .rx_queue_setup = mlx5_rx_queue_setup, 2549042f5c94SOphir Munk .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2550042f5c94SOphir Munk .tx_queue_setup = mlx5_tx_queue_setup, 2551042f5c94SOphir Munk .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2552042f5c94SOphir Munk .rx_queue_release = mlx5_rx_queue_release, 2553042f5c94SOphir Munk .tx_queue_release = mlx5_tx_queue_release, 2554161d103bSViacheslav Ovsiienko .rx_queue_start = mlx5_rx_queue_start, 2555161d103bSViacheslav Ovsiienko .rx_queue_stop = mlx5_rx_queue_stop, 2556161d103bSViacheslav Ovsiienko .tx_queue_start = mlx5_tx_queue_start, 2557161d103bSViacheslav Ovsiienko .tx_queue_stop = mlx5_tx_queue_stop, 2558042f5c94SOphir Munk .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2559042f5c94SOphir Munk .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2560042f5c94SOphir Munk .mac_addr_remove = mlx5_mac_addr_remove, 2561042f5c94SOphir Munk .mac_addr_add = mlx5_mac_addr_add, 2562042f5c94SOphir Munk .mac_addr_set = mlx5_mac_addr_set, 2563042f5c94SOphir Munk .set_mc_addr_list = mlx5_set_mc_addr_list, 2564042f5c94SOphir Munk .mtu_set = mlx5_dev_set_mtu, 2565042f5c94SOphir Munk .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2566042f5c94SOphir Munk .vlan_offload_set = mlx5_vlan_offload_set, 2567042f5c94SOphir Munk .reta_update = mlx5_dev_rss_reta_update, 2568042f5c94SOphir Munk .reta_query = mlx5_dev_rss_reta_query, 2569042f5c94SOphir Munk .rss_hash_update = mlx5_rss_hash_update, 2570042f5c94SOphir Munk .rss_hash_conf_get = mlx5_rss_hash_conf_get, 2571042f5c94SOphir Munk .filter_ctrl = mlx5_dev_filter_ctrl, 2572042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2573042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2574042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2575042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2576042f5c94SOphir Munk .rx_queue_intr_enable = mlx5_rx_intr_enable, 2577042f5c94SOphir Munk .rx_queue_intr_disable = mlx5_rx_intr_disable, 2578042f5c94SOphir Munk .is_removed = mlx5_is_removed, 2579042f5c94SOphir Munk .udp_tunnel_port_add = mlx5_udp_tunnel_port_add, 2580042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2581042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2582042f5c94SOphir Munk .hairpin_cap_get = mlx5_hairpin_cap_get, 2583042f5c94SOphir Munk .mtr_ops_get = mlx5_flow_meter_ops_get, 258437cd4501SBing Zhao .hairpin_bind = mlx5_hairpin_bind, 258537cd4501SBing Zhao .hairpin_unbind = mlx5_hairpin_unbind, 258602109eaeSBing Zhao .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports, 258737cd4501SBing Zhao .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update, 258837cd4501SBing Zhao .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind, 258937cd4501SBing Zhao .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind, 2590042f5c94SOphir Munk }; 2591042f5c94SOphir Munk 2592042f5c94SOphir Munk /* Available operations from secondary process. */ 2593042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_sec_ops = { 2594042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2595042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2596042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2597042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2598042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2599042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2600042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2601b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2602161d103bSViacheslav Ovsiienko .rx_queue_start = mlx5_rx_queue_start, 2603161d103bSViacheslav Ovsiienko .rx_queue_stop = mlx5_rx_queue_stop, 2604161d103bSViacheslav Ovsiienko .tx_queue_start = mlx5_tx_queue_start, 2605161d103bSViacheslav Ovsiienko .tx_queue_stop = mlx5_tx_queue_stop, 2606042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2607042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2608042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2609042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2610042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2611042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2612042f5c94SOphir Munk }; 2613042f5c94SOphir Munk 2614042f5c94SOphir Munk /* Available operations in flow isolated mode. */ 2615042f5c94SOphir Munk const struct eth_dev_ops mlx5_os_dev_ops_isolate = { 2616042f5c94SOphir Munk .dev_configure = mlx5_dev_configure, 2617042f5c94SOphir Munk .dev_start = mlx5_dev_start, 2618042f5c94SOphir Munk .dev_stop = mlx5_dev_stop, 2619042f5c94SOphir Munk .dev_set_link_down = mlx5_set_link_down, 2620042f5c94SOphir Munk .dev_set_link_up = mlx5_set_link_up, 2621042f5c94SOphir Munk .dev_close = mlx5_dev_close, 2622042f5c94SOphir Munk .promiscuous_enable = mlx5_promiscuous_enable, 2623042f5c94SOphir Munk .promiscuous_disable = mlx5_promiscuous_disable, 2624042f5c94SOphir Munk .allmulticast_enable = mlx5_allmulticast_enable, 2625042f5c94SOphir Munk .allmulticast_disable = mlx5_allmulticast_disable, 2626042f5c94SOphir Munk .link_update = mlx5_link_update, 2627042f5c94SOphir Munk .stats_get = mlx5_stats_get, 2628042f5c94SOphir Munk .stats_reset = mlx5_stats_reset, 2629042f5c94SOphir Munk .xstats_get = mlx5_xstats_get, 2630042f5c94SOphir Munk .xstats_reset = mlx5_xstats_reset, 2631042f5c94SOphir Munk .xstats_get_names = mlx5_xstats_get_names, 2632042f5c94SOphir Munk .fw_version_get = mlx5_fw_version_get, 2633042f5c94SOphir Munk .dev_infos_get = mlx5_dev_infos_get, 2634b94d93caSViacheslav Ovsiienko .read_clock = mlx5_txpp_read_clock, 2635042f5c94SOphir Munk .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get, 2636042f5c94SOphir Munk .vlan_filter_set = mlx5_vlan_filter_set, 2637042f5c94SOphir Munk .rx_queue_setup = mlx5_rx_queue_setup, 2638042f5c94SOphir Munk .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup, 2639042f5c94SOphir Munk .tx_queue_setup = mlx5_tx_queue_setup, 2640042f5c94SOphir Munk .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup, 2641042f5c94SOphir Munk .rx_queue_release = mlx5_rx_queue_release, 2642042f5c94SOphir Munk .tx_queue_release = mlx5_tx_queue_release, 2643161d103bSViacheslav Ovsiienko .rx_queue_start = mlx5_rx_queue_start, 2644161d103bSViacheslav Ovsiienko .rx_queue_stop = mlx5_rx_queue_stop, 2645161d103bSViacheslav Ovsiienko .tx_queue_start = mlx5_tx_queue_start, 2646161d103bSViacheslav Ovsiienko .tx_queue_stop = mlx5_tx_queue_stop, 2647042f5c94SOphir Munk .flow_ctrl_get = mlx5_dev_get_flow_ctrl, 2648042f5c94SOphir Munk .flow_ctrl_set = mlx5_dev_set_flow_ctrl, 2649042f5c94SOphir Munk .mac_addr_remove = mlx5_mac_addr_remove, 2650042f5c94SOphir Munk .mac_addr_add = mlx5_mac_addr_add, 2651042f5c94SOphir Munk .mac_addr_set = mlx5_mac_addr_set, 2652042f5c94SOphir Munk .set_mc_addr_list = mlx5_set_mc_addr_list, 2653042f5c94SOphir Munk .mtu_set = mlx5_dev_set_mtu, 2654042f5c94SOphir Munk .vlan_strip_queue_set = mlx5_vlan_strip_queue_set, 2655042f5c94SOphir Munk .vlan_offload_set = mlx5_vlan_offload_set, 2656042f5c94SOphir Munk .filter_ctrl = mlx5_dev_filter_ctrl, 2657042f5c94SOphir Munk .rxq_info_get = mlx5_rxq_info_get, 2658042f5c94SOphir Munk .txq_info_get = mlx5_txq_info_get, 2659042f5c94SOphir Munk .rx_burst_mode_get = mlx5_rx_burst_mode_get, 2660042f5c94SOphir Munk .tx_burst_mode_get = mlx5_tx_burst_mode_get, 2661042f5c94SOphir Munk .rx_queue_intr_enable = mlx5_rx_intr_enable, 2662042f5c94SOphir Munk .rx_queue_intr_disable = mlx5_rx_intr_disable, 2663042f5c94SOphir Munk .is_removed = mlx5_is_removed, 2664042f5c94SOphir Munk .get_module_info = mlx5_get_module_info, 2665042f5c94SOphir Munk .get_module_eeprom = mlx5_get_module_eeprom, 2666042f5c94SOphir Munk .hairpin_cap_get = mlx5_hairpin_cap_get, 2667042f5c94SOphir Munk .mtr_ops_get = mlx5_flow_meter_ops_get, 266837cd4501SBing Zhao .hairpin_bind = mlx5_hairpin_bind, 266937cd4501SBing Zhao .hairpin_unbind = mlx5_hairpin_unbind, 267002109eaeSBing Zhao .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports, 267137cd4501SBing Zhao .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update, 267237cd4501SBing Zhao .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind, 267337cd4501SBing Zhao .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind, 2674042f5c94SOphir Munk }; 2675