xref: /dpdk/drivers/net/mlx5/linux/mlx5_os.c (revision 11c73de9ef63b7671b40e8164c01a8952b5323b4)
1f44b09f9SOphir Munk /* SPDX-License-Identifier: BSD-3-Clause
2f44b09f9SOphir Munk  * Copyright 2015 6WIND S.A.
3f44b09f9SOphir Munk  * Copyright 2020 Mellanox Technologies, Ltd
4f44b09f9SOphir Munk  */
5f44b09f9SOphir Munk 
6f44b09f9SOphir Munk #include <stddef.h>
7f44b09f9SOphir Munk #include <unistd.h>
8f44b09f9SOphir Munk #include <string.h>
9f44b09f9SOphir Munk #include <stdint.h>
10f44b09f9SOphir Munk #include <stdlib.h>
11f44b09f9SOphir Munk #include <errno.h>
12f44b09f9SOphir Munk #include <net/if.h>
13f44b09f9SOphir Munk #include <linux/rtnetlink.h>
1473bf9235SOphir Munk #include <linux/sockios.h>
1573bf9235SOphir Munk #include <linux/ethtool.h>
16f44b09f9SOphir Munk #include <fcntl.h>
17f44b09f9SOphir Munk 
18f44b09f9SOphir Munk #include <rte_malloc.h>
19df96fd0dSBruce Richardson #include <ethdev_driver.h>
20df96fd0dSBruce Richardson #include <ethdev_pci.h>
21f44b09f9SOphir Munk #include <rte_pci.h>
22a04322f6SDavid Marchand #include <bus_driver.h>
231f37cb2bSDavid Marchand #include <bus_pci_driver.h>
24b3f89090SDavid Marchand #include <bus_auxiliary_driver.h>
25f44b09f9SOphir Munk #include <rte_common.h>
26f44b09f9SOphir Munk #include <rte_kvargs.h>
27f44b09f9SOphir Munk #include <rte_rwlock.h>
28f44b09f9SOphir Munk #include <rte_spinlock.h>
29f44b09f9SOphir Munk #include <rte_string_fns.h>
30f44b09f9SOphir Munk #include <rte_alarm.h>
312aba9fc7SOphir Munk #include <rte_eal_paging.h>
32f44b09f9SOphir Munk 
33f44b09f9SOphir Munk #include <mlx5_glue.h>
34f44b09f9SOphir Munk #include <mlx5_devx_cmds.h>
35f44b09f9SOphir Munk #include <mlx5_common.h>
362eb4d010SOphir Munk #include <mlx5_common_mp.h>
37d5ed8aa9SOphir Munk #include <mlx5_common_mr.h>
385522da6bSSuanming Mou #include <mlx5_malloc.h>
39f44b09f9SOphir Munk 
40f44b09f9SOphir Munk #include "mlx5_defs.h"
41f44b09f9SOphir Munk #include "mlx5.h"
42391b8bccSOphir Munk #include "mlx5_common_os.h"
43f44b09f9SOphir Munk #include "mlx5_utils.h"
44f44b09f9SOphir Munk #include "mlx5_rxtx.h"
45151cbe3aSMichael Baum #include "mlx5_rx.h"
46377b69fbSMichael Baum #include "mlx5_tx.h"
47f44b09f9SOphir Munk #include "mlx5_autoconf.h"
48f44b09f9SOphir Munk #include "mlx5_flow.h"
49f44b09f9SOphir Munk #include "rte_pmd_mlx5.h"
504f96d913SOphir Munk #include "mlx5_verbs.h"
51f00f6562SOphir Munk #include "mlx5_nl.h"
526deb19e1SMichael Baum #include "mlx5_devx.h"
53f44b09f9SOphir Munk 
542eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_MPW
552eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
562eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
572eb4d010SOphir Munk #endif
582eb4d010SOphir Munk 
592eb4d010SOphir Munk #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
602eb4d010SOphir Munk #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
612eb4d010SOphir Munk #endif
622eb4d010SOphir Munk 
632e86c4e5SOphir Munk static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
642e86c4e5SOphir Munk 
652e86c4e5SOphir Munk /* Spinlock for mlx5_shared_data allocation. */
662e86c4e5SOphir Munk static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
672e86c4e5SOphir Munk 
682e86c4e5SOphir Munk /* Process local data for secondary processes. */
692e86c4e5SOphir Munk static struct mlx5_local_data mlx5_local_data;
702e86c4e5SOphir Munk 
71b4edeaf3SSuanming Mou /* rte flow indexed pool configuration. */
72b4edeaf3SSuanming Mou static struct mlx5_indexed_pool_config icfg[] = {
73b4edeaf3SSuanming Mou 	{
74b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
75b4edeaf3SSuanming Mou 		.trunk_size = 64,
76b4edeaf3SSuanming Mou 		.need_lock = 1,
77b4edeaf3SSuanming Mou 		.release_mem_en = 0,
78b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
79b4edeaf3SSuanming Mou 		.free = mlx5_free,
80b4edeaf3SSuanming Mou 		.per_core_cache = 0,
81b4edeaf3SSuanming Mou 		.type = "ctl_flow_ipool",
82b4edeaf3SSuanming Mou 	},
83b4edeaf3SSuanming Mou 	{
84b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
85b4edeaf3SSuanming Mou 		.trunk_size = 64,
86b4edeaf3SSuanming Mou 		.grow_trunk = 3,
87b4edeaf3SSuanming Mou 		.grow_shift = 2,
88b4edeaf3SSuanming Mou 		.need_lock = 1,
89b4edeaf3SSuanming Mou 		.release_mem_en = 0,
90b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
91b4edeaf3SSuanming Mou 		.free = mlx5_free,
92b4edeaf3SSuanming Mou 		.per_core_cache = 1 << 14,
93b4edeaf3SSuanming Mou 		.type = "rte_flow_ipool",
94b4edeaf3SSuanming Mou 	},
95b4edeaf3SSuanming Mou 	{
96b4edeaf3SSuanming Mou 		.size = sizeof(struct rte_flow),
97b4edeaf3SSuanming Mou 		.trunk_size = 64,
98b4edeaf3SSuanming Mou 		.grow_trunk = 3,
99b4edeaf3SSuanming Mou 		.grow_shift = 2,
100b4edeaf3SSuanming Mou 		.need_lock = 1,
101b4edeaf3SSuanming Mou 		.release_mem_en = 0,
102b4edeaf3SSuanming Mou 		.malloc = mlx5_malloc,
103b4edeaf3SSuanming Mou 		.free = mlx5_free,
104b4edeaf3SSuanming Mou 		.per_core_cache = 0,
105b4edeaf3SSuanming Mou 		.type = "mcp_flow_ipool",
106b4edeaf3SSuanming Mou 	},
107b4edeaf3SSuanming Mou };
108b4edeaf3SSuanming Mou 
109f44b09f9SOphir Munk /**
11008d1838fSDekel Peled  * Set the completion channel file descriptor interrupt as non-blocking.
11108d1838fSDekel Peled  *
11208d1838fSDekel Peled  * @param[in] rxq_obj
11308d1838fSDekel Peled  *   Pointer to RQ channel object, which includes the channel fd
11408d1838fSDekel Peled  *
11508d1838fSDekel Peled  * @param[out] fd
1167be78d02SJosh Soref  *   The file descriptor (representing the interrupt) used in this channel.
11708d1838fSDekel Peled  *
11808d1838fSDekel Peled  * @return
11908d1838fSDekel Peled  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
12008d1838fSDekel Peled  */
12108d1838fSDekel Peled int
12208d1838fSDekel Peled mlx5_os_set_nonblock_channel_fd(int fd)
12308d1838fSDekel Peled {
12408d1838fSDekel Peled 	int flags;
12508d1838fSDekel Peled 
12608d1838fSDekel Peled 	flags = fcntl(fd, F_GETFL);
12708d1838fSDekel Peled 	return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
12808d1838fSDekel Peled }
12908d1838fSDekel Peled 
13008d1838fSDekel Peled /**
131e85f623eSOphir Munk  * Get mlx5 device attributes. The glue function query_device_ex() is called
132e85f623eSOphir Munk  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
133e85f623eSOphir Munk  * device attributes from the glue out parameter.
134e85f623eSOphir Munk  *
13591d1cfafSMichael Baum  * @param sh
13691d1cfafSMichael Baum  *   Pointer to shared device context.
137e85f623eSOphir Munk  *
138e85f623eSOphir Munk  * @return
1396be4c57aSMichael Baum  *   0 on success, a negative errno value otherwise and rte_errno is set.
140e85f623eSOphir Munk  */
141e85f623eSOphir Munk int
14291d1cfafSMichael Baum mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh)
143e85f623eSOphir Munk {
144e85f623eSOphir Munk 	int err;
14587af0d1eSMichael Baum 	struct mlx5_common_device *cdev = sh->cdev;
14687af0d1eSMichael Baum 	struct mlx5_hca_attr *hca_attr = &cdev->config.hca_attr;
14791d1cfafSMichael Baum 	struct ibv_device_attr_ex attr_ex = { .comp_mask = 0 };
14891d1cfafSMichael Baum 	struct mlx5dv_context dv_attr = { .comp_mask = 0 };
149fe46b20cSMichael Baum 
15087af0d1eSMichael Baum 	err = mlx5_glue->query_device_ex(cdev->ctx, NULL, &attr_ex);
1516be4c57aSMichael Baum 	if (err) {
1526be4c57aSMichael Baum 		rte_errno = errno;
1536be4c57aSMichael Baum 		return -rte_errno;
1546be4c57aSMichael Baum 	}
1558f464810SMichael Baum #ifdef HAVE_IBV_MLX5_MOD_SWP
1568f464810SMichael Baum 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1578f464810SMichael Baum #endif
1588f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1598f464810SMichael Baum 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1608f464810SMichael Baum #endif
1618f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1628f464810SMichael Baum 	dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1638f464810SMichael Baum #endif
16487af0d1eSMichael Baum 	err = mlx5_glue->dv_query_device(cdev->ctx, &dv_attr);
1656be4c57aSMichael Baum 	if (err) {
1666be4c57aSMichael Baum 		rte_errno = errno;
1676be4c57aSMichael Baum 		return -rte_errno;
1686be4c57aSMichael Baum 	}
16991d1cfafSMichael Baum 	memset(&sh->dev_cap, 0, sizeof(struct mlx5_dev_cap));
17087af0d1eSMichael Baum 	if (mlx5_dev_is_pci(cdev->dev))
17187af0d1eSMichael Baum 		sh->dev_cap.vf = mlx5_dev_is_vf_pci(RTE_DEV_TO_PCI(cdev->dev));
17287af0d1eSMichael Baum 	else
17387af0d1eSMichael Baum 		sh->dev_cap.sf = 1;
17491d1cfafSMichael Baum 	sh->dev_cap.max_qp_wr = attr_ex.orig_attr.max_qp_wr;
17591d1cfafSMichael Baum 	sh->dev_cap.max_sge = attr_ex.orig_attr.max_sge;
17691d1cfafSMichael Baum 	sh->dev_cap.max_cq = attr_ex.orig_attr.max_cq;
17791d1cfafSMichael Baum 	sh->dev_cap.max_qp = attr_ex.orig_attr.max_qp;
17887af0d1eSMichael Baum #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
17987af0d1eSMichael Baum 	sh->dev_cap.dest_tir = 1;
18087af0d1eSMichael Baum #endif
18187af0d1eSMichael Baum #if defined(HAVE_IBV_FLOW_DV_SUPPORT) && defined(HAVE_MLX5DV_DR)
18287af0d1eSMichael Baum 	DRV_LOG(DEBUG, "DV flow is supported.");
18387af0d1eSMichael Baum 	sh->dev_cap.dv_flow_en = 1;
18487af0d1eSMichael Baum #endif
18587af0d1eSMichael Baum #ifdef HAVE_MLX5DV_DR_ESWITCH
18687af0d1eSMichael Baum 	if (hca_attr->eswitch_manager && sh->dev_cap.dv_flow_en && sh->esw_mode)
18787af0d1eSMichael Baum 		sh->dev_cap.dv_esw_en = 1;
18887af0d1eSMichael Baum #endif
18987af0d1eSMichael Baum 	/*
19087af0d1eSMichael Baum 	 * Multi-packet send is supported by ConnectX-4 Lx PF as well
19187af0d1eSMichael Baum 	 * as all ConnectX-5 devices.
19287af0d1eSMichael Baum 	 */
19387af0d1eSMichael Baum 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
19487af0d1eSMichael Baum 		if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
19587af0d1eSMichael Baum 			DRV_LOG(DEBUG, "Enhanced MPW is supported.");
19687af0d1eSMichael Baum 			sh->dev_cap.mps = MLX5_MPW_ENHANCED;
19787af0d1eSMichael Baum 		} else {
19887af0d1eSMichael Baum 			DRV_LOG(DEBUG, "MPW is supported.");
19987af0d1eSMichael Baum 			sh->dev_cap.mps = MLX5_MPW;
20087af0d1eSMichael Baum 		}
20187af0d1eSMichael Baum 	} else {
20287af0d1eSMichael Baum 		DRV_LOG(DEBUG, "MPW isn't supported.");
20387af0d1eSMichael Baum 		sh->dev_cap.mps = MLX5_MPW_DISABLED;
20487af0d1eSMichael Baum 	}
20587af0d1eSMichael Baum #if (RTE_CACHE_LINE_SIZE == 128)
20687af0d1eSMichael Baum 	if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)
20787af0d1eSMichael Baum 		sh->dev_cap.cqe_comp = 1;
20887af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Rx CQE 128B compression is %ssupported.",
20987af0d1eSMichael Baum 		sh->dev_cap.cqe_comp ? "" : "not ");
21087af0d1eSMichael Baum #else
21187af0d1eSMichael Baum 	sh->dev_cap.cqe_comp = 1;
21287af0d1eSMichael Baum #endif
21387af0d1eSMichael Baum #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
21487af0d1eSMichael Baum 	sh->dev_cap.mpls_en =
21587af0d1eSMichael Baum 		((dv_attr.tunnel_offloads_caps &
21687af0d1eSMichael Baum 		  MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
21787af0d1eSMichael Baum 		 (dv_attr.tunnel_offloads_caps &
21887af0d1eSMichael Baum 		  MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
21987af0d1eSMichael Baum 	DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported.",
22087af0d1eSMichael Baum 		sh->dev_cap.mpls_en ? "" : "not ");
22187af0d1eSMichael Baum #else
22287af0d1eSMichael Baum 	DRV_LOG(WARNING,
22387af0d1eSMichael Baum 		"MPLS over GRE/UDP tunnel offloading disabled due to old OFED/rdma-core version or firmware configuration");
22487af0d1eSMichael Baum #endif
22587af0d1eSMichael Baum #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
22687af0d1eSMichael Baum 	sh->dev_cap.hw_padding = !!attr_ex.rx_pad_end_addr_align;
22787af0d1eSMichael Baum #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
22887af0d1eSMichael Baum 	sh->dev_cap.hw_padding = !!(attr_ex.device_cap_flags_ex &
22987af0d1eSMichael Baum 				    IBV_DEVICE_PCI_WRITE_END_PADDING);
23087af0d1eSMichael Baum #endif
23187af0d1eSMichael Baum 	sh->dev_cap.hw_csum =
23287af0d1eSMichael Baum 		!!(attr_ex.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
23387af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Checksum offloading is %ssupported.",
23487af0d1eSMichael Baum 		sh->dev_cap.hw_csum ? "" : "not ");
23587af0d1eSMichael Baum 	sh->dev_cap.hw_vlan_strip = !!(attr_ex.raw_packet_caps &
23687af0d1eSMichael Baum 				       IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
23787af0d1eSMichael Baum 	DRV_LOG(DEBUG, "VLAN stripping is %ssupported.",
23887af0d1eSMichael Baum 		(sh->dev_cap.hw_vlan_strip ? "" : "not "));
23987af0d1eSMichael Baum 	sh->dev_cap.hw_fcs_strip = !!(attr_ex.raw_packet_caps &
24087af0d1eSMichael Baum 				      IBV_RAW_PACKET_CAP_SCATTER_FCS);
24187af0d1eSMichael Baum #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
24287af0d1eSMichael Baum 	!defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
24387af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Counters are not supported.");
24487af0d1eSMichael Baum #endif
24587af0d1eSMichael Baum 	/*
24687af0d1eSMichael Baum 	 * DPDK doesn't support larger/variable indirection tables.
24787af0d1eSMichael Baum 	 * Once DPDK supports it, take max size from device attr.
24887af0d1eSMichael Baum 	 */
24987af0d1eSMichael Baum 	sh->dev_cap.ind_table_max_size =
25087af0d1eSMichael Baum 			RTE_MIN(attr_ex.rss_caps.max_rwq_indirection_table_size,
25187af0d1eSMichael Baum 				(unsigned int)RTE_ETH_RSS_RETA_SIZE_512);
25287af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Maximum Rx indirection table size is %u",
25387af0d1eSMichael Baum 		sh->dev_cap.ind_table_max_size);
25487af0d1eSMichael Baum 	sh->dev_cap.tso = (attr_ex.tso_caps.max_tso > 0 &&
25587af0d1eSMichael Baum 			   (attr_ex.tso_caps.supported_qpts &
25687af0d1eSMichael Baum 			    (1 << IBV_QPT_RAW_PACKET)));
25787af0d1eSMichael Baum 	if (sh->dev_cap.tso)
25887af0d1eSMichael Baum 		sh->dev_cap.tso_max_payload_sz = attr_ex.tso_caps.max_tso;
25991d1cfafSMichael Baum 	strlcpy(sh->dev_cap.fw_ver, attr_ex.orig_attr.fw_ver,
26091d1cfafSMichael Baum 		sizeof(sh->dev_cap.fw_ver));
261e85f623eSOphir Munk #ifdef HAVE_IBV_MLX5_MOD_SWP
26287af0d1eSMichael Baum 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
26387af0d1eSMichael Baum 		sh->dev_cap.swp = dv_attr.sw_parsing_caps.sw_parsing_offloads &
26487af0d1eSMichael Baum 				  (MLX5_SW_PARSING_CAP |
26587af0d1eSMichael Baum 				   MLX5_SW_PARSING_CSUM_CAP |
26687af0d1eSMichael Baum 				   MLX5_SW_PARSING_TSO_CAP);
26787af0d1eSMichael Baum 	DRV_LOG(DEBUG, "SWP support: %u", sh->dev_cap.swp);
268e85f623eSOphir Munk #endif
2698f464810SMichael Baum #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
27087af0d1eSMichael Baum 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
27187af0d1eSMichael Baum 		struct mlx5dv_striding_rq_caps *strd_rq_caps =
27287af0d1eSMichael Baum 				&dv_attr.striding_rq_caps;
27387af0d1eSMichael Baum 
27487af0d1eSMichael Baum 		sh->dev_cap.mprq.enabled = 1;
27587af0d1eSMichael Baum 		sh->dev_cap.mprq.log_min_stride_size =
27687af0d1eSMichael Baum 			strd_rq_caps->min_single_stride_log_num_of_bytes;
27787af0d1eSMichael Baum 		sh->dev_cap.mprq.log_max_stride_size =
27887af0d1eSMichael Baum 			strd_rq_caps->max_single_stride_log_num_of_bytes;
27987af0d1eSMichael Baum 		sh->dev_cap.mprq.log_min_stride_num =
28087af0d1eSMichael Baum 			strd_rq_caps->min_single_wqe_log_num_of_strides;
28187af0d1eSMichael Baum 		sh->dev_cap.mprq.log_max_stride_num =
28287af0d1eSMichael Baum 			strd_rq_caps->max_single_wqe_log_num_of_strides;
28387af0d1eSMichael Baum 		sh->dev_cap.mprq.log_min_stride_wqe_size =
28487af0d1eSMichael Baum 					cdev->config.devx ?
28587af0d1eSMichael Baum 					hca_attr->log_min_stride_wqe_sz :
28687af0d1eSMichael Baum 					MLX5_MPRQ_LOG_MIN_STRIDE_WQE_SIZE;
28787af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %u",
28887af0d1eSMichael Baum 			sh->dev_cap.mprq.log_min_stride_size);
28987af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %u",
29087af0d1eSMichael Baum 			sh->dev_cap.mprq.log_max_stride_size);
29187af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %u",
29287af0d1eSMichael Baum 			sh->dev_cap.mprq.log_min_stride_num);
29387af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %u",
29487af0d1eSMichael Baum 			sh->dev_cap.mprq.log_max_stride_num);
29587af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tmin_stride_wqe_log_size: %u",
29687af0d1eSMichael Baum 			sh->dev_cap.mprq.log_min_stride_wqe_size);
29787af0d1eSMichael Baum 		DRV_LOG(DEBUG, "\tsupported_qpts: %d",
29887af0d1eSMichael Baum 			strd_rq_caps->supported_qpts);
29987af0d1eSMichael Baum 		DRV_LOG(DEBUG, "Device supports Multi-Packet RQ.");
30087af0d1eSMichael Baum 	}
3018f464810SMichael Baum #endif
302e85f623eSOphir Munk #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
30387af0d1eSMichael Baum 	if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
30487af0d1eSMichael Baum 		sh->dev_cap.tunnel_en = dv_attr.tunnel_offloads_caps &
30587af0d1eSMichael Baum 					(MLX5_TUNNELED_OFFLOADS_VXLAN_CAP |
30687af0d1eSMichael Baum 					 MLX5_TUNNELED_OFFLOADS_GRE_CAP |
30787af0d1eSMichael Baum 					 MLX5_TUNNELED_OFFLOADS_GENEVE_CAP);
30887af0d1eSMichael Baum 	}
30987af0d1eSMichael Baum 	if (sh->dev_cap.tunnel_en) {
31087af0d1eSMichael Baum 		DRV_LOG(DEBUG, "Tunnel offloading is supported for %s%s%s",
31187af0d1eSMichael Baum 			sh->dev_cap.tunnel_en &
31287af0d1eSMichael Baum 			MLX5_TUNNELED_OFFLOADS_VXLAN_CAP ? "[VXLAN]" : "",
31387af0d1eSMichael Baum 			sh->dev_cap.tunnel_en &
31487af0d1eSMichael Baum 			MLX5_TUNNELED_OFFLOADS_GRE_CAP ? "[GRE]" : "",
31587af0d1eSMichael Baum 			sh->dev_cap.tunnel_en &
31687af0d1eSMichael Baum 			MLX5_TUNNELED_OFFLOADS_GENEVE_CAP ? "[GENEVE]" : "");
31787af0d1eSMichael Baum 	} else {
31887af0d1eSMichael Baum 		DRV_LOG(DEBUG, "Tunnel offloading is not supported.");
31987af0d1eSMichael Baum 	}
32087af0d1eSMichael Baum #else
32187af0d1eSMichael Baum 	DRV_LOG(WARNING,
32287af0d1eSMichael Baum 		"Tunnel offloading disabled due to old OFED/rdma-core version");
323e85f623eSOphir Munk #endif
32487af0d1eSMichael Baum 	if (!sh->cdev->config.devx)
32587af0d1eSMichael Baum 		return 0;
32687af0d1eSMichael Baum 	/* Check capabilities for Packet Pacing. */
32787af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz.",
32887af0d1eSMichael Baum 		hca_attr->dev_freq_khz);
32987af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Packet pacing is %ssupported.",
33087af0d1eSMichael Baum 		hca_attr->qos.packet_pacing ? "" : "not ");
33187af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Cross channel ops are %ssupported.",
33287af0d1eSMichael Baum 		hca_attr->cross_channel ? "" : "not ");
33387af0d1eSMichael Baum 	DRV_LOG(DEBUG, "WQE index ignore is %ssupported.",
33487af0d1eSMichael Baum 		hca_attr->wqe_index_ignore ? "" : "not ");
33587af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported.",
33687af0d1eSMichael Baum 		hca_attr->non_wire_sq ? "" : "not ");
33787af0d1eSMichael Baum 	DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
33887af0d1eSMichael Baum 		hca_attr->log_max_static_sq_wq ? "" : "not ",
33987af0d1eSMichael Baum 		hca_attr->log_max_static_sq_wq);
34087af0d1eSMichael Baum 	DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported.",
34187af0d1eSMichael Baum 		hca_attr->qos.wqe_rate_pp ? "" : "not ");
34287af0d1eSMichael Baum 	sh->dev_cap.txpp_en = hca_attr->qos.packet_pacing;
34387af0d1eSMichael Baum 	if (!hca_attr->cross_channel) {
34487af0d1eSMichael Baum 		DRV_LOG(DEBUG,
34587af0d1eSMichael Baum 			"Cross channel operations are required for packet pacing.");
34687af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
34787af0d1eSMichael Baum 	}
34887af0d1eSMichael Baum 	if (!hca_attr->wqe_index_ignore) {
34987af0d1eSMichael Baum 		DRV_LOG(DEBUG,
35087af0d1eSMichael Baum 			"WQE index ignore feature is required for packet pacing.");
35187af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
35287af0d1eSMichael Baum 	}
35387af0d1eSMichael Baum 	if (!hca_attr->non_wire_sq) {
35487af0d1eSMichael Baum 		DRV_LOG(DEBUG,
35587af0d1eSMichael Baum 			"Non-wire SQ feature is required for packet pacing.");
35687af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
35787af0d1eSMichael Baum 	}
35887af0d1eSMichael Baum 	if (!hca_attr->log_max_static_sq_wq) {
35987af0d1eSMichael Baum 		DRV_LOG(DEBUG,
36087af0d1eSMichael Baum 			"Static WQE SQ feature is required for packet pacing.");
36187af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
36287af0d1eSMichael Baum 	}
36387af0d1eSMichael Baum 	if (!hca_attr->qos.wqe_rate_pp) {
36487af0d1eSMichael Baum 		DRV_LOG(DEBUG,
36587af0d1eSMichael Baum 			"WQE rate mode is required for packet pacing.");
36687af0d1eSMichael Baum 		sh->dev_cap.txpp_en = 0;
36787af0d1eSMichael Baum 	}
36887af0d1eSMichael Baum #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
36987af0d1eSMichael Baum 	DRV_LOG(DEBUG,
37087af0d1eSMichael Baum 		"DevX does not provide UAR offset, can't create queues for packet pacing.");
37187af0d1eSMichael Baum 	sh->dev_cap.txpp_en = 0;
37287af0d1eSMichael Baum #endif
37387af0d1eSMichael Baum 	sh->dev_cap.scatter_fcs_w_decap_disable =
37487af0d1eSMichael Baum 					hca_attr->scatter_fcs_w_decap_disable;
37587af0d1eSMichael Baum 	sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop;
37687af0d1eSMichael Baum 	mlx5_rt_timestamp_config(sh, hca_attr);
3776be4c57aSMichael Baum 	return 0;
378e85f623eSOphir Munk }
3792eb4d010SOphir Munk 
3802eb4d010SOphir Munk /**
381630a587bSRongwei Liu  * Detect misc5 support or not
382630a587bSRongwei Liu  *
383630a587bSRongwei Liu  * @param[in] priv
384630a587bSRongwei Liu  *   Device private data pointer
385630a587bSRongwei Liu  */
386630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR
387630a587bSRongwei Liu static void
388630a587bSRongwei Liu __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
389630a587bSRongwei Liu {
390630a587bSRongwei Liu #ifdef HAVE_IBV_FLOW_DV_SUPPORT
391630a587bSRongwei Liu 	/* Dummy VxLAN matcher to detect rdma-core misc5 cap
392630a587bSRongwei Liu 	 * Case: IPv4--->UDP--->VxLAN--->vni
393630a587bSRongwei Liu 	 */
394630a587bSRongwei Liu 	void *tbl;
395630a587bSRongwei Liu 	struct mlx5_flow_dv_match_params matcher_mask;
396630a587bSRongwei Liu 	void *match_m;
397630a587bSRongwei Liu 	void *matcher;
398630a587bSRongwei Liu 	void *headers_m;
399630a587bSRongwei Liu 	void *misc5_m;
400630a587bSRongwei Liu 	uint32_t *tunnel_header_m;
401630a587bSRongwei Liu 	struct mlx5dv_flow_matcher_attr dv_attr;
402630a587bSRongwei Liu 
403630a587bSRongwei Liu 	memset(&matcher_mask, 0, sizeof(matcher_mask));
404630a587bSRongwei Liu 	matcher_mask.size = sizeof(matcher_mask.buf);
405630a587bSRongwei Liu 	match_m = matcher_mask.buf;
406630a587bSRongwei Liu 	headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
407630a587bSRongwei Liu 	misc5_m = MLX5_ADDR_OF(fte_match_param,
408630a587bSRongwei Liu 			       match_m, misc_parameters_5);
409630a587bSRongwei Liu 	tunnel_header_m = (uint32_t *)
410630a587bSRongwei Liu 				MLX5_ADDR_OF(fte_match_set_misc5,
411630a587bSRongwei Liu 				misc5_m, tunnel_header_1);
412630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
413630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
414630a587bSRongwei Liu 	MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
415630a587bSRongwei Liu 	*tunnel_header_m = 0xffffff;
416630a587bSRongwei Liu 
417630a587bSRongwei Liu 	tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
418630a587bSRongwei Liu 	if (!tbl) {
419630a587bSRongwei Liu 		DRV_LOG(INFO, "No SW steering support");
420630a587bSRongwei Liu 		return;
421630a587bSRongwei Liu 	}
422630a587bSRongwei Liu 	dv_attr.type = IBV_FLOW_ATTR_NORMAL,
423630a587bSRongwei Liu 	dv_attr.match_mask = (void *)&matcher_mask,
424630a587bSRongwei Liu 	dv_attr.match_criteria_enable =
425630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
426630a587bSRongwei Liu 			(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
427630a587bSRongwei Liu 	dv_attr.priority = 3;
428630a587bSRongwei Liu #ifdef HAVE_MLX5DV_DR_ESWITCH
429630a587bSRongwei Liu 	void *misc2_m;
430a13ec19cSMichael Baum 	if (priv->sh->config.dv_esw_en) {
431630a587bSRongwei Liu 		/* FDB enabled reg_c_0 */
432630a587bSRongwei Liu 		dv_attr.match_criteria_enable |=
433630a587bSRongwei Liu 				(1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
434630a587bSRongwei Liu 		misc2_m = MLX5_ADDR_OF(fte_match_param,
435630a587bSRongwei Liu 				       match_m, misc_parameters_2);
436630a587bSRongwei Liu 		MLX5_SET(fte_match_set_misc2, misc2_m,
437630a587bSRongwei Liu 			 metadata_reg_c_0, 0xffff);
438630a587bSRongwei Liu 	}
439630a587bSRongwei Liu #endif
440ca1418ceSMichael Baum 	matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
441630a587bSRongwei Liu 						    &dv_attr, tbl);
442630a587bSRongwei Liu 	if (matcher) {
443630a587bSRongwei Liu 		priv->sh->misc5_cap = 1;
444630a587bSRongwei Liu 		mlx5_glue->dv_destroy_flow_matcher(matcher);
445630a587bSRongwei Liu 	}
446630a587bSRongwei Liu 	mlx5_glue->dr_destroy_flow_tbl(tbl);
447630a587bSRongwei Liu #else
448630a587bSRongwei Liu 	RTE_SET_USED(priv);
449630a587bSRongwei Liu #endif
450630a587bSRongwei Liu }
451630a587bSRongwei Liu #endif
452630a587bSRongwei Liu 
453630a587bSRongwei Liu /**
4542eb4d010SOphir Munk  * Initialize DR related data within private structure.
4552eb4d010SOphir Munk  * Routine checks the reference counter and does actual
4562eb4d010SOphir Munk  * resources creation/initialization only if counter is zero.
4572eb4d010SOphir Munk  *
4582eb4d010SOphir Munk  * @param[in] priv
4592eb4d010SOphir Munk  *   Pointer to the private device data structure.
4602eb4d010SOphir Munk  *
4612eb4d010SOphir Munk  * @return
4622eb4d010SOphir Munk  *   Zero on success, positive error code otherwise.
4632eb4d010SOphir Munk  */
4642eb4d010SOphir Munk static int
4652eb4d010SOphir Munk mlx5_alloc_shared_dr(struct mlx5_priv *priv)
4662eb4d010SOphir Munk {
4672eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = priv->sh;
468961b6774SMatan Azrad 	char s[MLX5_NAME_SIZE] __rte_unused;
46916dbba25SXueming Li 	int err;
4702eb4d010SOphir Munk 
47116dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
47216dbba25SXueming Li 	if (sh->refcnt > 1)
47316dbba25SXueming Li 		return 0;
4742eb4d010SOphir Munk 	err = mlx5_alloc_table_hash_list(priv);
4752eb4d010SOphir Munk 	if (err)
476291140c6SSuanming Mou 		goto error;
477291140c6SSuanming Mou 	/* The resources below are only valid with DV support. */
478291140c6SSuanming Mou #ifdef HAVE_IBV_FLOW_DV_SUPPORT
479612b619fSRongwei Liu 	/* Init shared flex parsers list, no need lcore_share */
480612b619fSRongwei Liu 	snprintf(s, sizeof(s), "%s_flex_parsers_list", sh->ibdev_name);
481612b619fSRongwei Liu 	sh->flex_parsers_dv = mlx5_list_create(s, sh, false,
482612b619fSRongwei Liu 					       mlx5_flex_parser_create_cb,
483612b619fSRongwei Liu 					       mlx5_flex_parser_match_cb,
484612b619fSRongwei Liu 					       mlx5_flex_parser_remove_cb,
485612b619fSRongwei Liu 					       mlx5_flex_parser_clone_cb,
486612b619fSRongwei Liu 					       mlx5_flex_parser_clone_free_cb);
487612b619fSRongwei Liu 	if (!sh->flex_parsers_dv)
488612b619fSRongwei Liu 		goto error;
489612b619fSRongwei Liu 	if (priv->sh->config.dv_flow_en == 2)
490612b619fSRongwei Liu 		return 0;
491491b7137SMatan Azrad 	/* Init port id action list. */
492e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
493d03b7860SSuanming Mou 	sh->port_id_action_list = mlx5_list_create(s, sh, true,
4940fd5f82aSXueming Li 						   flow_dv_port_id_create_cb,
4950fd5f82aSXueming Li 						   flow_dv_port_id_match_cb,
496491b7137SMatan Azrad 						   flow_dv_port_id_remove_cb,
497491b7137SMatan Azrad 						   flow_dv_port_id_clone_cb,
498491b7137SMatan Azrad 						 flow_dv_port_id_clone_free_cb);
499679f46c7SMatan Azrad 	if (!sh->port_id_action_list)
500679f46c7SMatan Azrad 		goto error;
501491b7137SMatan Azrad 	/* Init push vlan action list. */
502e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
503d03b7860SSuanming Mou 	sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
5043422af2aSXueming Li 						    flow_dv_push_vlan_create_cb,
5053422af2aSXueming Li 						    flow_dv_push_vlan_match_cb,
506491b7137SMatan Azrad 						    flow_dv_push_vlan_remove_cb,
507491b7137SMatan Azrad 						    flow_dv_push_vlan_clone_cb,
508491b7137SMatan Azrad 					       flow_dv_push_vlan_clone_free_cb);
509679f46c7SMatan Azrad 	if (!sh->push_vlan_action_list)
510679f46c7SMatan Azrad 		goto error;
511491b7137SMatan Azrad 	/* Init sample action list. */
512e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
513d03b7860SSuanming Mou 	sh->sample_action_list = mlx5_list_create(s, sh, true,
51419784141SSuanming Mou 						  flow_dv_sample_create_cb,
51519784141SSuanming Mou 						  flow_dv_sample_match_cb,
516491b7137SMatan Azrad 						  flow_dv_sample_remove_cb,
517491b7137SMatan Azrad 						  flow_dv_sample_clone_cb,
518491b7137SMatan Azrad 						  flow_dv_sample_clone_free_cb);
519679f46c7SMatan Azrad 	if (!sh->sample_action_list)
520679f46c7SMatan Azrad 		goto error;
521491b7137SMatan Azrad 	/* Init dest array action list. */
522e78e5408SMatan Azrad 	snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
523d03b7860SSuanming Mou 	sh->dest_array_list = mlx5_list_create(s, sh, true,
52419784141SSuanming Mou 					       flow_dv_dest_array_create_cb,
52519784141SSuanming Mou 					       flow_dv_dest_array_match_cb,
526491b7137SMatan Azrad 					       flow_dv_dest_array_remove_cb,
527491b7137SMatan Azrad 					       flow_dv_dest_array_clone_cb,
528491b7137SMatan Azrad 					      flow_dv_dest_array_clone_free_cb);
529679f46c7SMatan Azrad 	if (!sh->dest_array_list)
530679f46c7SMatan Azrad 		goto error;
531612b619fSRongwei Liu #else
532612b619fSRongwei Liu 	if (priv->sh->config.dv_flow_en == 2)
533612b619fSRongwei Liu 		return 0;
534291140c6SSuanming Mou #endif
5352eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
5362eb4d010SOphir Munk 	void *domain;
5372eb4d010SOphir Munk 
5382eb4d010SOphir Munk 	/* Reference counter is zero, we should initialize structures. */
539ca1418ceSMichael Baum 	domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
5402eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
5412eb4d010SOphir Munk 	if (!domain) {
5422eb4d010SOphir Munk 		DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
5432eb4d010SOphir Munk 		err = errno;
5442eb4d010SOphir Munk 		goto error;
5452eb4d010SOphir Munk 	}
5462eb4d010SOphir Munk 	sh->rx_domain = domain;
547ca1418ceSMichael Baum 	domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
5482eb4d010SOphir Munk 					     MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
5492eb4d010SOphir Munk 	if (!domain) {
5502eb4d010SOphir Munk 		DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
5512eb4d010SOphir Munk 		err = errno;
5522eb4d010SOphir Munk 		goto error;
5532eb4d010SOphir Munk 	}
5542eb4d010SOphir Munk 	sh->tx_domain = domain;
5552eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
556a13ec19cSMichael Baum 	if (sh->config.dv_esw_en) {
557ca1418ceSMichael Baum 		domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
558ca1418ceSMichael Baum 						     MLX5DV_DR_DOMAIN_TYPE_FDB);
5592eb4d010SOphir Munk 		if (!domain) {
5602eb4d010SOphir Munk 			DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
5612eb4d010SOphir Munk 			err = errno;
5622eb4d010SOphir Munk 			goto error;
5632eb4d010SOphir Munk 		}
5642eb4d010SOphir Munk 		sh->fdb_domain = domain;
565da845ae9SViacheslav Ovsiienko 	}
566da845ae9SViacheslav Ovsiienko 	/*
567da845ae9SViacheslav Ovsiienko 	 * The drop action is just some dummy placeholder in rdma-core. It
568da845ae9SViacheslav Ovsiienko 	 * does not belong to domains and has no any attributes, and, can be
569da845ae9SViacheslav Ovsiienko 	 * shared by the entire device.
570da845ae9SViacheslav Ovsiienko 	 */
571da845ae9SViacheslav Ovsiienko 	sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
572da845ae9SViacheslav Ovsiienko 	if (!sh->dr_drop_action) {
573da845ae9SViacheslav Ovsiienko 		DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
574da845ae9SViacheslav Ovsiienko 		err = errno;
575da845ae9SViacheslav Ovsiienko 		goto error;
5762eb4d010SOphir Munk 	}
5772eb4d010SOphir Munk #endif
578a13ec19cSMichael Baum 	if (!sh->tunnel_hub && sh->config.dv_miss_info)
5794ec6360dSGregory Etelson 		err = mlx5_alloc_tunnel_hub(sh);
5804ec6360dSGregory Etelson 	if (err) {
5814ec6360dSGregory Etelson 		DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
5824ec6360dSGregory Etelson 		goto error;
5834ec6360dSGregory Etelson 	}
584a13ec19cSMichael Baum 	if (sh->config.reclaim_mode == MLX5_RCM_AGGR) {
5852eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
5862eb4d010SOphir Munk 		mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
5872eb4d010SOphir Munk 		if (sh->fdb_domain)
5882eb4d010SOphir Munk 			mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
5892eb4d010SOphir Munk 	}
5902eb4d010SOphir Munk 	sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
591a13ec19cSMichael Baum 	if (!sh->config.allow_duplicate_pattern) {
592e39226bdSJiawei Wang #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
593e39226bdSJiawei Wang 		DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
594e39226bdSJiawei Wang #endif
595e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
596e39226bdSJiawei Wang 		mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
597e39226bdSJiawei Wang 		if (sh->fdb_domain)
598e39226bdSJiawei Wang 			mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
599e39226bdSJiawei Wang 	}
600630a587bSRongwei Liu 
601630a587bSRongwei Liu 	__mlx5_discovery_misc5_cap(priv);
6022eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
603b80726dcSSuanming Mou 	sh->default_miss_action =
604b80726dcSSuanming Mou 			mlx5_glue->dr_create_flow_action_default_miss();
605b80726dcSSuanming Mou 	if (!sh->default_miss_action)
606b80726dcSSuanming Mou 		DRV_LOG(WARNING, "Default miss action is not supported.");
60709c25553SXueming Li 	LIST_INIT(&sh->shared_rxqs);
6082eb4d010SOphir Munk 	return 0;
6092eb4d010SOphir Munk error:
6102eb4d010SOphir Munk 	/* Rollback the created objects. */
6112eb4d010SOphir Munk 	if (sh->rx_domain) {
6122eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
6132eb4d010SOphir Munk 		sh->rx_domain = NULL;
6142eb4d010SOphir Munk 	}
6152eb4d010SOphir Munk 	if (sh->tx_domain) {
6162eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
6172eb4d010SOphir Munk 		sh->tx_domain = NULL;
6182eb4d010SOphir Munk 	}
6192eb4d010SOphir Munk 	if (sh->fdb_domain) {
6202eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
6212eb4d010SOphir Munk 		sh->fdb_domain = NULL;
6222eb4d010SOphir Munk 	}
623da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
624da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
625da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
6262eb4d010SOphir Munk 	}
6272eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
6282eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
6292eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
6302eb4d010SOphir Munk 	}
631bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
632e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
633bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
634bf615b07SSuanming Mou 	}
6353fe88961SSuanming Mou 	if (sh->modify_cmds) {
636e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
6373fe88961SSuanming Mou 		sh->modify_cmds = NULL;
6383fe88961SSuanming Mou 	}
6392eb4d010SOphir Munk 	if (sh->tag_table) {
6402eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
641e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
6422eb4d010SOphir Munk 		sh->tag_table = NULL;
6432eb4d010SOphir Munk 	}
6444ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
6454ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
6464ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
6474ec6360dSGregory Etelson 	}
6482eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
649679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
650679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
651679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
652679f46c7SMatan Azrad 	}
653679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
654679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
655679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
656679f46c7SMatan Azrad 	}
657679f46c7SMatan Azrad 	if (sh->sample_action_list) {
658679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
659679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
660679f46c7SMatan Azrad 	}
661679f46c7SMatan Azrad 	if (sh->dest_array_list) {
662679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
663679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
664679f46c7SMatan Azrad 	}
6652eb4d010SOphir Munk 	return err;
6662eb4d010SOphir Munk }
6672eb4d010SOphir Munk 
6682eb4d010SOphir Munk /**
6692eb4d010SOphir Munk  * Destroy DR related data within private structure.
6702eb4d010SOphir Munk  *
6712eb4d010SOphir Munk  * @param[in] priv
6722eb4d010SOphir Munk  *   Pointer to the private device data structure.
6732eb4d010SOphir Munk  */
6742eb4d010SOphir Munk void
6752eb4d010SOphir Munk mlx5_os_free_shared_dr(struct mlx5_priv *priv)
6762eb4d010SOphir Munk {
67716dbba25SXueming Li 	struct mlx5_dev_ctx_shared *sh = priv->sh;
678b2cd3918SJiawei Wang #ifdef HAVE_MLX5DV_DR
679b2cd3918SJiawei Wang 	int i;
680b2cd3918SJiawei Wang #endif
6812eb4d010SOphir Munk 
68216dbba25SXueming Li 	MLX5_ASSERT(sh && sh->refcnt);
68316dbba25SXueming Li 	if (sh->refcnt > 1)
6842eb4d010SOphir Munk 		return;
68509c25553SXueming Li 	MLX5_ASSERT(LIST_EMPTY(&sh->shared_rxqs));
6862eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR
6872eb4d010SOphir Munk 	if (sh->rx_domain) {
6882eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->rx_domain);
6892eb4d010SOphir Munk 		sh->rx_domain = NULL;
6902eb4d010SOphir Munk 	}
6912eb4d010SOphir Munk 	if (sh->tx_domain) {
6922eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->tx_domain);
6932eb4d010SOphir Munk 		sh->tx_domain = NULL;
6942eb4d010SOphir Munk 	}
6952eb4d010SOphir Munk #ifdef HAVE_MLX5DV_DR_ESWITCH
6962eb4d010SOphir Munk 	if (sh->fdb_domain) {
6972eb4d010SOphir Munk 		mlx5_glue->dr_destroy_domain(sh->fdb_domain);
6982eb4d010SOphir Munk 		sh->fdb_domain = NULL;
6992eb4d010SOphir Munk 	}
700da845ae9SViacheslav Ovsiienko 	if (sh->dr_drop_action) {
701da845ae9SViacheslav Ovsiienko 		mlx5_glue->destroy_flow_action(sh->dr_drop_action);
702da845ae9SViacheslav Ovsiienko 		sh->dr_drop_action = NULL;
7032eb4d010SOphir Munk 	}
7042eb4d010SOphir Munk #endif
7052eb4d010SOphir Munk 	if (sh->pop_vlan_action) {
7062eb4d010SOphir Munk 		mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
7072eb4d010SOphir Munk 		sh->pop_vlan_action = NULL;
7082eb4d010SOphir Munk 	}
709b2cd3918SJiawei Wang 	for (i = 0; i < MLX5DR_TABLE_TYPE_MAX; i++) {
710b2cd3918SJiawei Wang 		if (sh->send_to_kernel_action[i].action) {
711b2cd3918SJiawei Wang 			void *action = sh->send_to_kernel_action[i].action;
712f31a141eSMichael Savisko 
713f31a141eSMichael Savisko 			mlx5_glue->destroy_flow_action(action);
714b2cd3918SJiawei Wang 			sh->send_to_kernel_action[i].action = NULL;
715f31a141eSMichael Savisko 		}
716b2cd3918SJiawei Wang 		if (sh->send_to_kernel_action[i].tbl) {
717f31a141eSMichael Savisko 			struct mlx5_flow_tbl_resource *tbl =
718b2cd3918SJiawei Wang 					sh->send_to_kernel_action[i].tbl;
719f31a141eSMichael Savisko 
720f31a141eSMichael Savisko 			flow_dv_tbl_resource_release(sh, tbl);
721b2cd3918SJiawei Wang 			sh->send_to_kernel_action[i].tbl = NULL;
722b2cd3918SJiawei Wang 		}
723f31a141eSMichael Savisko 	}
7242eb4d010SOphir Munk #endif /* HAVE_MLX5DV_DR */
725b80726dcSSuanming Mou 	if (sh->default_miss_action)
726b80726dcSSuanming Mou 		mlx5_glue->destroy_flow_action
727b80726dcSSuanming Mou 				(sh->default_miss_action);
728bf615b07SSuanming Mou 	if (sh->encaps_decaps) {
729e69a5922SXueming Li 		mlx5_hlist_destroy(sh->encaps_decaps);
730bf615b07SSuanming Mou 		sh->encaps_decaps = NULL;
731bf615b07SSuanming Mou 	}
7323fe88961SSuanming Mou 	if (sh->modify_cmds) {
733e69a5922SXueming Li 		mlx5_hlist_destroy(sh->modify_cmds);
7343fe88961SSuanming Mou 		sh->modify_cmds = NULL;
7353fe88961SSuanming Mou 	}
7362eb4d010SOphir Munk 	if (sh->tag_table) {
7372eb4d010SOphir Munk 		/* tags should be destroyed with flow before. */
738e69a5922SXueming Li 		mlx5_hlist_destroy(sh->tag_table);
7392eb4d010SOphir Munk 		sh->tag_table = NULL;
7402eb4d010SOphir Munk 	}
7414ec6360dSGregory Etelson 	if (sh->tunnel_hub) {
7424ec6360dSGregory Etelson 		mlx5_release_tunnel_hub(sh, priv->dev_port);
7434ec6360dSGregory Etelson 		sh->tunnel_hub = NULL;
7444ec6360dSGregory Etelson 	}
7452eb4d010SOphir Munk 	mlx5_free_table_hash_list(priv);
746679f46c7SMatan Azrad 	if (sh->port_id_action_list) {
747679f46c7SMatan Azrad 		mlx5_list_destroy(sh->port_id_action_list);
748679f46c7SMatan Azrad 		sh->port_id_action_list = NULL;
749679f46c7SMatan Azrad 	}
750679f46c7SMatan Azrad 	if (sh->push_vlan_action_list) {
751679f46c7SMatan Azrad 		mlx5_list_destroy(sh->push_vlan_action_list);
752679f46c7SMatan Azrad 		sh->push_vlan_action_list = NULL;
753679f46c7SMatan Azrad 	}
754679f46c7SMatan Azrad 	if (sh->sample_action_list) {
755679f46c7SMatan Azrad 		mlx5_list_destroy(sh->sample_action_list);
756679f46c7SMatan Azrad 		sh->sample_action_list = NULL;
757679f46c7SMatan Azrad 	}
758679f46c7SMatan Azrad 	if (sh->dest_array_list) {
759679f46c7SMatan Azrad 		mlx5_list_destroy(sh->dest_array_list);
760679f46c7SMatan Azrad 		sh->dest_array_list = NULL;
761679f46c7SMatan Azrad 	}
7622eb4d010SOphir Munk }
7632eb4d010SOphir Munk 
7642eb4d010SOphir Munk /**
7652e86c4e5SOphir Munk  * Initialize shared data between primary and secondary process.
7662e86c4e5SOphir Munk  *
7672e86c4e5SOphir Munk  * A memzone is reserved by primary process and secondary processes attach to
7682e86c4e5SOphir Munk  * the memzone.
7692e86c4e5SOphir Munk  *
7702e86c4e5SOphir Munk  * @return
7712e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
7722e86c4e5SOphir Munk  */
7732e86c4e5SOphir Munk static int
7742e86c4e5SOphir Munk mlx5_init_shared_data(void)
7752e86c4e5SOphir Munk {
7762e86c4e5SOphir Munk 	const struct rte_memzone *mz;
7772e86c4e5SOphir Munk 	int ret = 0;
7782e86c4e5SOphir Munk 
7792e86c4e5SOphir Munk 	rte_spinlock_lock(&mlx5_shared_data_lock);
7802e86c4e5SOphir Munk 	if (mlx5_shared_data == NULL) {
7812e86c4e5SOphir Munk 		if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
7822e86c4e5SOphir Munk 			/* Allocate shared memory. */
7832e86c4e5SOphir Munk 			mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
7842e86c4e5SOphir Munk 						 sizeof(*mlx5_shared_data),
7852e86c4e5SOphir Munk 						 SOCKET_ID_ANY, 0);
7862e86c4e5SOphir Munk 			if (mz == NULL) {
7872e86c4e5SOphir Munk 				DRV_LOG(ERR,
7882e86c4e5SOphir Munk 					"Cannot allocate mlx5 shared data");
7892e86c4e5SOphir Munk 				ret = -rte_errno;
7902e86c4e5SOphir Munk 				goto error;
7912e86c4e5SOphir Munk 			}
7922e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
7932e86c4e5SOphir Munk 			memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
7942e86c4e5SOphir Munk 			rte_spinlock_init(&mlx5_shared_data->lock);
7952e86c4e5SOphir Munk 		} else {
7962e86c4e5SOphir Munk 			/* Lookup allocated shared memory. */
7972e86c4e5SOphir Munk 			mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
7982e86c4e5SOphir Munk 			if (mz == NULL) {
7992e86c4e5SOphir Munk 				DRV_LOG(ERR,
8002e86c4e5SOphir Munk 					"Cannot attach mlx5 shared data");
8012e86c4e5SOphir Munk 				ret = -rte_errno;
8022e86c4e5SOphir Munk 				goto error;
8032e86c4e5SOphir Munk 			}
8042e86c4e5SOphir Munk 			mlx5_shared_data = mz->addr;
8052e86c4e5SOphir Munk 			memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
8062e86c4e5SOphir Munk 		}
8072e86c4e5SOphir Munk 	}
8082e86c4e5SOphir Munk error:
8092e86c4e5SOphir Munk 	rte_spinlock_unlock(&mlx5_shared_data_lock);
8102e86c4e5SOphir Munk 	return ret;
8112e86c4e5SOphir Munk }
8122e86c4e5SOphir Munk 
8132e86c4e5SOphir Munk /**
8142e86c4e5SOphir Munk  * PMD global initialization.
8152e86c4e5SOphir Munk  *
8162e86c4e5SOphir Munk  * Independent from individual device, this function initializes global
8172e86c4e5SOphir Munk  * per-PMD data structures distinguishing primary and secondary processes.
8182e86c4e5SOphir Munk  * Hence, each initialization is called once per a process.
8192e86c4e5SOphir Munk  *
8202e86c4e5SOphir Munk  * @return
8212e86c4e5SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
8222e86c4e5SOphir Munk  */
8232e86c4e5SOphir Munk static int
8242e86c4e5SOphir Munk mlx5_init_once(void)
8252e86c4e5SOphir Munk {
8262e86c4e5SOphir Munk 	struct mlx5_shared_data *sd;
8272e86c4e5SOphir Munk 	struct mlx5_local_data *ld = &mlx5_local_data;
8282e86c4e5SOphir Munk 	int ret = 0;
8292e86c4e5SOphir Munk 
8302e86c4e5SOphir Munk 	if (mlx5_init_shared_data())
8312e86c4e5SOphir Munk 		return -rte_errno;
8322e86c4e5SOphir Munk 	sd = mlx5_shared_data;
8332e86c4e5SOphir Munk 	MLX5_ASSERT(sd);
8342e86c4e5SOphir Munk 	rte_spinlock_lock(&sd->lock);
8352e86c4e5SOphir Munk 	switch (rte_eal_process_type()) {
8362e86c4e5SOphir Munk 	case RTE_PROC_PRIMARY:
8372e86c4e5SOphir Munk 		if (sd->init_done)
8382e86c4e5SOphir Munk 			break;
8392e86c4e5SOphir Munk 		ret = mlx5_mp_init_primary(MLX5_MP_NAME,
8402e86c4e5SOphir Munk 					   mlx5_mp_os_primary_handle);
8412e86c4e5SOphir Munk 		if (ret)
8422e86c4e5SOphir Munk 			goto out;
8432e86c4e5SOphir Munk 		sd->init_done = true;
8442e86c4e5SOphir Munk 		break;
8452e86c4e5SOphir Munk 	case RTE_PROC_SECONDARY:
8462e86c4e5SOphir Munk 		if (ld->init_done)
8472e86c4e5SOphir Munk 			break;
8482e86c4e5SOphir Munk 		ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
8492e86c4e5SOphir Munk 					     mlx5_mp_os_secondary_handle);
8502e86c4e5SOphir Munk 		if (ret)
8512e86c4e5SOphir Munk 			goto out;
8522e86c4e5SOphir Munk 		++sd->secondary_cnt;
8532e86c4e5SOphir Munk 		ld->init_done = true;
8542e86c4e5SOphir Munk 		break;
8552e86c4e5SOphir Munk 	default:
8562e86c4e5SOphir Munk 		break;
8572e86c4e5SOphir Munk 	}
8582e86c4e5SOphir Munk out:
8592e86c4e5SOphir Munk 	rte_spinlock_unlock(&sd->lock);
8602e86c4e5SOphir Munk 	return ret;
8612e86c4e5SOphir Munk }
8622e86c4e5SOphir Munk 
8632e86c4e5SOphir Munk /**
86445633c46SSuanming Mou  * DR flow drop action support detect.
86545633c46SSuanming Mou  *
86645633c46SSuanming Mou  * @param dev
86745633c46SSuanming Mou  *   Pointer to rte_eth_dev structure.
86845633c46SSuanming Mou  *
86945633c46SSuanming Mou  */
87045633c46SSuanming Mou static void
87145633c46SSuanming Mou mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
87245633c46SSuanming Mou {
87345633c46SSuanming Mou #ifdef HAVE_MLX5DV_DR
87445633c46SSuanming Mou 	struct mlx5_priv *priv = dev->data->dev_private;
87545633c46SSuanming Mou 
876a13ec19cSMichael Baum 	if (!priv->sh->config.dv_flow_en || !priv->sh->dr_drop_action)
87745633c46SSuanming Mou 		return;
87845633c46SSuanming Mou 	/**
87945633c46SSuanming Mou 	 * DR supports drop action placeholder when it is supported;
88045633c46SSuanming Mou 	 * otherwise, use the queue drop action.
88145633c46SSuanming Mou 	 */
8823c4338a4SJiawei Wang 	if (!priv->sh->drop_action_check_flag) {
8833c4338a4SJiawei Wang 		if (!mlx5_flow_discover_dr_action_support(dev))
884c1f0cdaeSDariusz Sosnowski 			priv->sh->dr_root_drop_action_en = 1;
8853c4338a4SJiawei Wang 		priv->sh->drop_action_check_flag = 1;
8863c4338a4SJiawei Wang 	}
887c1f0cdaeSDariusz Sosnowski 	if (priv->sh->dr_root_drop_action_en)
88845633c46SSuanming Mou 		priv->root_drop_action = priv->sh->dr_drop_action;
8893c4338a4SJiawei Wang 	else
8903c4338a4SJiawei Wang 		priv->root_drop_action = priv->drop_queue.hrxq->action;
89145633c46SSuanming Mou #endif
89245633c46SSuanming Mou }
89345633c46SSuanming Mou 
894e6988afdSMatan Azrad static void
895e6988afdSMatan Azrad mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
896e6988afdSMatan Azrad {
897e6988afdSMatan Azrad 	struct mlx5_priv *priv = dev->data->dev_private;
898ca1418ceSMichael Baum 	void *ctx = priv->sh->cdev->ctx;
899e6988afdSMatan Azrad 
900e6988afdSMatan Azrad 	priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
901e6988afdSMatan Azrad 	if (!priv->q_counters) {
902e6988afdSMatan Azrad 		struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
903e6988afdSMatan Azrad 		struct ibv_wq *wq;
904e6988afdSMatan Azrad 
905e6988afdSMatan Azrad 		DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
906e6988afdSMatan Azrad 			"by DevX - fall-back to use the kernel driver global "
907e6988afdSMatan Azrad 			"queue counter.", dev->data->port_id);
908e6988afdSMatan Azrad 		/* Create WQ by kernel and query its queue counter ID. */
909e6988afdSMatan Azrad 		if (cq) {
910e6988afdSMatan Azrad 			wq = mlx5_glue->create_wq(ctx,
911e6988afdSMatan Azrad 						  &(struct ibv_wq_init_attr){
912e6988afdSMatan Azrad 						    .wq_type = IBV_WQT_RQ,
913e6988afdSMatan Azrad 						    .max_wr = 1,
914e6988afdSMatan Azrad 						    .max_sge = 1,
915e35ccf24SMichael Baum 						    .pd = priv->sh->cdev->pd,
916e6988afdSMatan Azrad 						    .cq = cq,
917e6988afdSMatan Azrad 						});
918e6988afdSMatan Azrad 			if (wq) {
919e6988afdSMatan Azrad 				/* Counter is assigned only on RDY state. */
920e6988afdSMatan Azrad 				int ret = mlx5_glue->modify_wq(wq,
921e6988afdSMatan Azrad 						 &(struct ibv_wq_attr){
922e6988afdSMatan Azrad 						 .attr_mask = IBV_WQ_ATTR_STATE,
923e6988afdSMatan Azrad 						 .wq_state = IBV_WQS_RDY,
924e6988afdSMatan Azrad 						});
925e6988afdSMatan Azrad 
926e6988afdSMatan Azrad 				if (ret == 0)
927e6988afdSMatan Azrad 					mlx5_devx_cmd_wq_query(wq,
928e6988afdSMatan Azrad 							 &priv->counter_set_id);
929e6988afdSMatan Azrad 				claim_zero(mlx5_glue->destroy_wq(wq));
930e6988afdSMatan Azrad 			}
931e6988afdSMatan Azrad 			claim_zero(mlx5_glue->destroy_cq(cq));
932e6988afdSMatan Azrad 		}
933e6988afdSMatan Azrad 	} else {
934e6988afdSMatan Azrad 		priv->counter_set_id = priv->q_counters->id;
935e6988afdSMatan Azrad 	}
936e6988afdSMatan Azrad 	if (priv->counter_set_id == 0)
937e6988afdSMatan Azrad 		DRV_LOG(INFO, "Part of the port %d statistics will not be "
938e6988afdSMatan Azrad 			"available.", dev->data->port_id);
939e6988afdSMatan Azrad }
940e6988afdSMatan Azrad 
941994829e6SSuanming Mou /**
942f926cce3SXueming Li  * Check if representor spawn info match devargs.
943f926cce3SXueming Li  *
944f926cce3SXueming Li  * @param spawn
945f926cce3SXueming Li  *   Verbs device parameters (name, port, switch_info) to spawn.
946f926cce3SXueming Li  * @param eth_da
947f926cce3SXueming Li  *   Device devargs to probe.
948f926cce3SXueming Li  *
949f926cce3SXueming Li  * @return
950f926cce3SXueming Li  *   Match result.
951f926cce3SXueming Li  */
952f926cce3SXueming Li static bool
953f926cce3SXueming Li mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
954f926cce3SXueming Li 		       struct rte_eth_devargs *eth_da)
955f926cce3SXueming Li {
956f926cce3SXueming Li 	struct mlx5_switch_info *switch_info = &spawn->info;
957f926cce3SXueming Li 	unsigned int p, f;
958f926cce3SXueming Li 	uint16_t id;
95991766faeSXueming Li 	uint16_t repr_id = mlx5_representor_id_encode(switch_info,
96091766faeSXueming Li 						      eth_da->type);
961f926cce3SXueming Li 
962*11c73de9SDariusz Sosnowski 	/*
963*11c73de9SDariusz Sosnowski 	 * Assuming Multiport E-Switch device was detected,
964*11c73de9SDariusz Sosnowski 	 * if spawned port is an uplink, check if the port
965*11c73de9SDariusz Sosnowski 	 * was requested through representor devarg.
966*11c73de9SDariusz Sosnowski 	 */
967*11c73de9SDariusz Sosnowski 	if (mlx5_is_probed_port_on_mpesw_device(spawn) &&
968*11c73de9SDariusz Sosnowski 	    switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
969*11c73de9SDariusz Sosnowski 		for (p = 0; p < eth_da->nb_ports; ++p)
970*11c73de9SDariusz Sosnowski 			if (switch_info->port_name == eth_da->ports[p])
971*11c73de9SDariusz Sosnowski 				return true;
972*11c73de9SDariusz Sosnowski 		rte_errno = EBUSY;
973*11c73de9SDariusz Sosnowski 		return false;
974*11c73de9SDariusz Sosnowski 	}
975f926cce3SXueming Li 	switch (eth_da->type) {
976*11c73de9SDariusz Sosnowski 	case RTE_ETH_REPRESENTOR_PF:
977*11c73de9SDariusz Sosnowski 		/*
978*11c73de9SDariusz Sosnowski 		 * PF representors provided in devargs translate to uplink ports, but
979*11c73de9SDariusz Sosnowski 		 * if and only if the device is a part of MPESW device.
980*11c73de9SDariusz Sosnowski 		 */
981*11c73de9SDariusz Sosnowski 		if (!mlx5_is_probed_port_on_mpesw_device(spawn)) {
982*11c73de9SDariusz Sosnowski 			rte_errno = EBUSY;
983*11c73de9SDariusz Sosnowski 			return false;
984*11c73de9SDariusz Sosnowski 		}
985*11c73de9SDariusz Sosnowski 		break;
986f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_SF:
98791766faeSXueming Li 		if (!(spawn->info.port_name == -1 &&
98891766faeSXueming Li 		      switch_info->name_type ==
98991766faeSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
99091766faeSXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
991f926cce3SXueming Li 			rte_errno = EBUSY;
992f926cce3SXueming Li 			return false;
993f926cce3SXueming Li 		}
994f926cce3SXueming Li 		break;
995f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_VF:
996f926cce3SXueming Li 		/* Allows HPF representor index -1 as exception. */
997f926cce3SXueming Li 		if (!(spawn->info.port_name == -1 &&
998f926cce3SXueming Li 		      switch_info->name_type ==
999f926cce3SXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
1000f926cce3SXueming Li 		    switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
1001f926cce3SXueming Li 			rte_errno = EBUSY;
1002f926cce3SXueming Li 			return false;
1003f926cce3SXueming Li 		}
1004f926cce3SXueming Li 		break;
1005f926cce3SXueming Li 	case RTE_ETH_REPRESENTOR_NONE:
1006f926cce3SXueming Li 		rte_errno = EBUSY;
1007f926cce3SXueming Li 		return false;
1008f926cce3SXueming Li 	default:
1009f926cce3SXueming Li 		rte_errno = ENOTSUP;
1010f926cce3SXueming Li 		DRV_LOG(ERR, "unsupported representor type");
1011f926cce3SXueming Li 		return false;
1012f926cce3SXueming Li 	}
1013f926cce3SXueming Li 	/* Check representor ID: */
1014f926cce3SXueming Li 	for (p = 0; p < eth_da->nb_ports; ++p) {
1015*11c73de9SDariusz Sosnowski 		if (!mlx5_is_probed_port_on_mpesw_device(spawn) && spawn->pf_bond < 0) {
1016f926cce3SXueming Li 			/* For non-LAG mode, allow and ignore pf. */
1017f926cce3SXueming Li 			switch_info->pf_num = eth_da->ports[p];
101891766faeSXueming Li 			repr_id = mlx5_representor_id_encode(switch_info,
101991766faeSXueming Li 							     eth_da->type);
1020f926cce3SXueming Li 		}
1021f926cce3SXueming Li 		for (f = 0; f < eth_da->nb_representor_ports; ++f) {
1022f926cce3SXueming Li 			id = MLX5_REPRESENTOR_ID
1023f926cce3SXueming Li 				(eth_da->ports[p], eth_da->type,
1024f926cce3SXueming Li 				 eth_da->representor_ports[f]);
1025f926cce3SXueming Li 			if (repr_id == id)
1026f926cce3SXueming Li 				return true;
1027f926cce3SXueming Li 		}
1028f926cce3SXueming Li 	}
1029f926cce3SXueming Li 	rte_errno = EBUSY;
1030f926cce3SXueming Li 	return false;
1031f926cce3SXueming Li }
1032f926cce3SXueming Li 
1033f926cce3SXueming Li /**
10342eb4d010SOphir Munk  * Spawn an Ethernet device from Verbs information.
10352eb4d010SOphir Munk  *
10362eb4d010SOphir Munk  * @param dpdk_dev
10372eb4d010SOphir Munk  *   Backing DPDK device.
10382eb4d010SOphir Munk  * @param spawn
10392eb4d010SOphir Munk  *   Verbs device parameters (name, port, switch_info) to spawn.
1040887183efSMichael Baum  * @param eth_da
1041cb95feefSXueming Li  *   Device arguments.
1042a729d2f0SMichael Baum  * @param mkvlist
1043a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
10442eb4d010SOphir Munk  *
10452eb4d010SOphir Munk  * @return
10462eb4d010SOphir Munk  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
10472eb4d010SOphir Munk  *   is set. The following errors are defined:
10482eb4d010SOphir Munk  *
10492eb4d010SOphir Munk  *   EBUSY: device is not supposed to be spawned.
10502eb4d010SOphir Munk  *   EEXIST: device is already spawned
10512eb4d010SOphir Munk  */
10522eb4d010SOphir Munk static struct rte_eth_dev *
10532eb4d010SOphir Munk mlx5_dev_spawn(struct rte_device *dpdk_dev,
10542eb4d010SOphir Munk 	       struct mlx5_dev_spawn_data *spawn,
1055a729d2f0SMichael Baum 	       struct rte_eth_devargs *eth_da,
1056a729d2f0SMichael Baum 	       struct mlx5_kvargs_ctrl *mkvlist)
10572eb4d010SOphir Munk {
10582eb4d010SOphir Munk 	const struct mlx5_switch_info *switch_info = &spawn->info;
10592eb4d010SOphir Munk 	struct mlx5_dev_ctx_shared *sh = NULL;
10603fd2961eSXueming Li 	struct ibv_port_attr port_attr = { .state = IBV_PORT_NOP };
10612eb4d010SOphir Munk 	struct rte_eth_dev *eth_dev = NULL;
10622eb4d010SOphir Munk 	struct mlx5_priv *priv = NULL;
10632eb4d010SOphir Munk 	int err = 0;
10642eb4d010SOphir Munk 	struct rte_ether_addr mac;
10652eb4d010SOphir Munk 	char name[RTE_ETH_NAME_MAX_LEN];
10662eb4d010SOphir Munk 	int own_domain_id = 0;
10672eb4d010SOphir Munk 	uint16_t port_id;
1068d0cf77e8SViacheslav Ovsiienko 	struct mlx5_port_info vport_info = { .query_flags = 0 };
106945a6df80SMichael Baum 	int nl_rdma;
1070b4edeaf3SSuanming Mou 	int i;
10712eb4d010SOphir Munk 
10722eb4d010SOphir Munk 	/* Determine if this port representor is supposed to be spawned. */
1073f926cce3SXueming Li 	if (switch_info->representor && dpdk_dev->devargs &&
1074f926cce3SXueming Li 	    !mlx5_representor_match(spawn, eth_da))
1075d6541676SXueming Li 		return NULL;
10762eb4d010SOphir Munk 	/* Build device name. */
1077*11c73de9SDariusz Sosnowski 	if (spawn->pf_bond >= 0) {
10782eb4d010SOphir Munk 		/* Bonding device. */
1079f926cce3SXueming Li 		if (!switch_info->representor) {
1080f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s",
1081887183efSMichael Baum 				       dpdk_dev->name, spawn->phys_dev_name);
1082f926cce3SXueming Li 		} else {
1083f926cce3SXueming Li 			err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
1084887183efSMichael Baum 				dpdk_dev->name, spawn->phys_dev_name,
1085f926cce3SXueming Li 				switch_info->ctrl_num,
1086f926cce3SXueming Li 				switch_info->pf_num,
1087cb95feefSXueming Li 				switch_info->name_type ==
1088cb95feefSXueming Li 				MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
10892eb4d010SOphir Munk 				switch_info->port_name);
10902eb4d010SOphir Munk 		}
1091*11c73de9SDariusz Sosnowski 	} else if (mlx5_is_probed_port_on_mpesw_device(spawn)) {
1092*11c73de9SDariusz Sosnowski 		/* MPESW device. */
1093*11c73de9SDariusz Sosnowski 		if (switch_info->name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
1094*11c73de9SDariusz Sosnowski 			err = snprintf(name, sizeof(name), "%s_p%d",
1095*11c73de9SDariusz Sosnowski 				       dpdk_dev->name, spawn->mpesw_port);
1096*11c73de9SDariusz Sosnowski 		} else {
1097*11c73de9SDariusz Sosnowski 			err = snprintf(name, sizeof(name), "%s_representor_c%dpf%d%s%u",
1098*11c73de9SDariusz Sosnowski 				dpdk_dev->name,
1099*11c73de9SDariusz Sosnowski 				switch_info->ctrl_num,
1100*11c73de9SDariusz Sosnowski 				switch_info->pf_num,
1101*11c73de9SDariusz Sosnowski 				switch_info->name_type ==
1102*11c73de9SDariusz Sosnowski 				MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1103*11c73de9SDariusz Sosnowski 				switch_info->port_name);
1104*11c73de9SDariusz Sosnowski 		}
1105*11c73de9SDariusz Sosnowski 	} else {
1106*11c73de9SDariusz Sosnowski 		/* Single device. */
1107*11c73de9SDariusz Sosnowski 		if (!switch_info->representor)
1108*11c73de9SDariusz Sosnowski 			strlcpy(name, dpdk_dev->name, sizeof(name));
1109*11c73de9SDariusz Sosnowski 		else
1110*11c73de9SDariusz Sosnowski 			err = snprintf(name, sizeof(name), "%s_representor_%s%u",
1111*11c73de9SDariusz Sosnowski 				 dpdk_dev->name,
1112*11c73de9SDariusz Sosnowski 				 switch_info->name_type ==
1113*11c73de9SDariusz Sosnowski 				 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
1114*11c73de9SDariusz Sosnowski 				 switch_info->port_name);
1115f926cce3SXueming Li 	}
1116f926cce3SXueming Li 	if (err >= (int)sizeof(name))
1117f926cce3SXueming Li 		DRV_LOG(WARNING, "device name overflow %s", name);
11182eb4d010SOphir Munk 	/* check if the device is already spawned */
11192eb4d010SOphir Munk 	if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1120a729d2f0SMichael Baum 		/*
1121a729d2f0SMichael Baum 		 * When device is already spawned, its devargs should be set
1122a729d2f0SMichael Baum 		 * as used. otherwise, mlx5_kvargs_validate() will fail.
1123a729d2f0SMichael Baum 		 */
1124a729d2f0SMichael Baum 		if (mkvlist)
1125a729d2f0SMichael Baum 			mlx5_port_args_set_used(name, port_id, mkvlist);
11262eb4d010SOphir Munk 		rte_errno = EEXIST;
11272eb4d010SOphir Munk 		return NULL;
11282eb4d010SOphir Munk 	}
11292eb4d010SOphir Munk 	DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
11302eb4d010SOphir Munk 	if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
11312eb4d010SOphir Munk 		struct mlx5_mp_id mp_id;
1132bc5d8fdbSLong Li 		int fd;
11332eb4d010SOphir Munk 
11342eb4d010SOphir Munk 		eth_dev = rte_eth_dev_attach_secondary(name);
11352eb4d010SOphir Munk 		if (eth_dev == NULL) {
11362eb4d010SOphir Munk 			DRV_LOG(ERR, "can not attach rte ethdev");
11372eb4d010SOphir Munk 			rte_errno = ENOMEM;
11382eb4d010SOphir Munk 			return NULL;
11392eb4d010SOphir Munk 		}
11402eb4d010SOphir Munk 		eth_dev->device = dpdk_dev;
1141b012b4ceSOphir Munk 		eth_dev->dev_ops = &mlx5_dev_sec_ops;
1142cbfc6111SFerruh Yigit 		eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1143cbfc6111SFerruh Yigit 		eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
11442eb4d010SOphir Munk 		err = mlx5_proc_priv_init(eth_dev);
11452eb4d010SOphir Munk 		if (err)
11462eb4d010SOphir Munk 			return NULL;
1147fec28ca0SDmitry Kozlyuk 		mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
11482eb4d010SOphir Munk 		/* Receive command fd from primary process */
1149bc5d8fdbSLong Li 		fd = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1150bc5d8fdbSLong Li 		if (fd < 0)
11512eb4d010SOphir Munk 			goto err_secondary;
11522eb4d010SOphir Munk 		/* Remap UAR for Tx queues. */
1153bc5d8fdbSLong Li 		err = mlx5_tx_uar_init_secondary(eth_dev, fd);
1154bc5d8fdbSLong Li 		close(fd);
11552eb4d010SOphir Munk 		if (err)
11562eb4d010SOphir Munk 			goto err_secondary;
11572eb4d010SOphir Munk 		/*
11582eb4d010SOphir Munk 		 * Ethdev pointer is still required as input since
11592eb4d010SOphir Munk 		 * the primary device is not accessible from the
11602eb4d010SOphir Munk 		 * secondary process.
11612eb4d010SOphir Munk 		 */
11622eb4d010SOphir Munk 		eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
11632eb4d010SOphir Munk 		eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
11642eb4d010SOphir Munk 		return eth_dev;
11652eb4d010SOphir Munk err_secondary:
11662eb4d010SOphir Munk 		mlx5_dev_close(eth_dev);
11672eb4d010SOphir Munk 		return NULL;
11682eb4d010SOphir Munk 	}
1169a729d2f0SMichael Baum 	sh = mlx5_alloc_shared_dev_ctx(spawn, mkvlist);
11702eb4d010SOphir Munk 	if (!sh)
11712eb4d010SOphir Munk 		return NULL;
1172be66461cSDmitry Kozlyuk 	nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
11732eb4d010SOphir Munk 	/* Check port status. */
11743fd2961eSXueming Li 	if (spawn->phys_port <= UINT8_MAX) {
11753fd2961eSXueming Li 		/* Legacy Verbs api only support u8 port number. */
1176ca1418ceSMichael Baum 		err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1177ca1418ceSMichael Baum 					    &port_attr);
11782eb4d010SOphir Munk 		if (err) {
11792eb4d010SOphir Munk 			DRV_LOG(ERR, "port query failed: %s", strerror(err));
11802eb4d010SOphir Munk 			goto error;
11812eb4d010SOphir Munk 		}
11822eb4d010SOphir Munk 		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
11832eb4d010SOphir Munk 			DRV_LOG(ERR, "port is not configured in Ethernet mode");
11842eb4d010SOphir Munk 			err = EINVAL;
11852eb4d010SOphir Munk 			goto error;
11862eb4d010SOphir Munk 		}
11873fd2961eSXueming Li 	} else if (nl_rdma >= 0) {
11883fd2961eSXueming Li 		/* IB doesn't allow more than 255 ports, must be Ethernet. */
11893fd2961eSXueming Li 		err = mlx5_nl_port_state(nl_rdma,
11903fd2961eSXueming Li 			spawn->phys_dev_name,
11913fd2961eSXueming Li 			spawn->phys_port);
11923fd2961eSXueming Li 		if (err < 0) {
11933fd2961eSXueming Li 			DRV_LOG(INFO, "Failed to get netlink port state: %s",
11943fd2961eSXueming Li 				strerror(rte_errno));
11953fd2961eSXueming Li 			err = -rte_errno;
11963fd2961eSXueming Li 			goto error;
11973fd2961eSXueming Li 		}
11983fd2961eSXueming Li 		port_attr.state = (enum ibv_port_state)err;
11993fd2961eSXueming Li 	}
12002eb4d010SOphir Munk 	if (port_attr.state != IBV_PORT_ACTIVE)
12013fd2961eSXueming Li 		DRV_LOG(INFO, "port is not active: \"%s\" (%d)",
12022eb4d010SOphir Munk 			mlx5_glue->port_state_str(port_attr.state),
12032eb4d010SOphir Munk 			port_attr.state);
12042eb4d010SOphir Munk 	/* Allocate private eth device data. */
12052175c4dcSSuanming Mou 	priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
12062eb4d010SOphir Munk 			   sizeof(*priv),
12072175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
12082eb4d010SOphir Munk 	if (priv == NULL) {
12092eb4d010SOphir Munk 		DRV_LOG(ERR, "priv allocation failure");
12102eb4d010SOphir Munk 		err = ENOMEM;
12112eb4d010SOphir Munk 		goto error;
12122eb4d010SOphir Munk 	}
121380f872eeSMichael Baum 	/*
121480f872eeSMichael Baum 	 * When user configures remote PD and CTX and device creates RxQ by
121580f872eeSMichael Baum 	 * DevX, external RxQ is both supported and requested.
121680f872eeSMichael Baum 	 */
121780f872eeSMichael Baum 	if (mlx5_imported_pd_and_ctx(sh->cdev) && mlx5_devx_obj_ops_en(sh)) {
121880f872eeSMichael Baum 		priv->ext_rxqs = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
121980f872eeSMichael Baum 					     sizeof(struct mlx5_external_rxq) *
122080f872eeSMichael Baum 					     MLX5_MAX_EXT_RX_QUEUES, 0,
122180f872eeSMichael Baum 					     SOCKET_ID_ANY);
122280f872eeSMichael Baum 		if (priv->ext_rxqs == NULL) {
122380f872eeSMichael Baum 			DRV_LOG(ERR, "Fail to allocate external RxQ array.");
122480f872eeSMichael Baum 			err = ENOMEM;
122580f872eeSMichael Baum 			goto error;
122680f872eeSMichael Baum 		}
122780f872eeSMichael Baum 		DRV_LOG(DEBUG, "External RxQ is supported.");
122880f872eeSMichael Baum 	}
12292eb4d010SOphir Munk 	priv->sh = sh;
123091389890SOphir Munk 	priv->dev_port = spawn->phys_port;
12312eb4d010SOphir Munk 	priv->pci_dev = spawn->pci_dev;
12322eb4d010SOphir Munk 	priv->mtu = RTE_ETHER_MTU;
12332eb4d010SOphir Munk 	/* Some internal functions rely on Netlink sockets, open them now. */
12343fd2961eSXueming Li 	priv->nl_socket_rdma = nl_rdma;
1235be66461cSDmitry Kozlyuk 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE, 0);
12362eb4d010SOphir Munk 	priv->representor = !!switch_info->representor;
12372eb4d010SOphir Munk 	priv->master = !!switch_info->master;
12382eb4d010SOphir Munk 	priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
12392eb4d010SOphir Munk 	priv->vport_meta_tag = 0;
12402eb4d010SOphir Munk 	priv->vport_meta_mask = 0;
12412eb4d010SOphir Munk 	priv->pf_bond = spawn->pf_bond;
1242*11c73de9SDariusz Sosnowski 	priv->mpesw_port = spawn->mpesw_port;
1243*11c73de9SDariusz Sosnowski 	priv->mpesw_uplink = false;
1244*11c73de9SDariusz Sosnowski 	priv->mpesw_owner = spawn->info.mpesw_owner;
1245*11c73de9SDariusz Sosnowski 	if (mlx5_is_port_on_mpesw_device(priv))
1246*11c73de9SDariusz Sosnowski 		priv->mpesw_uplink = (spawn->info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK);
1247ce4062cbSGregory Etelson 
1248ce4062cbSGregory Etelson 	DRV_LOG(DEBUG,
1249*11c73de9SDariusz Sosnowski 		"dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d "
1250*11c73de9SDariusz Sosnowski 		"mpesw_port=%d mpesw_uplink=%d",
1251ce4062cbSGregory Etelson 		priv->dev_port, dpdk_dev->bus->name,
1252ce4062cbSGregory Etelson 		priv->pci_dev ? priv->pci_dev->name : "NONE",
1253*11c73de9SDariusz Sosnowski 		priv->master, priv->representor, priv->pf_bond,
1254*11c73de9SDariusz Sosnowski 		priv->mpesw_port, priv->mpesw_uplink);
1255ce4062cbSGregory Etelson 
1256*11c73de9SDariusz Sosnowski 	if (mlx5_is_port_on_mpesw_device(priv) && priv->sh->config.dv_flow_en != 2) {
1257*11c73de9SDariusz Sosnowski 		DRV_LOG(ERR, "MPESW device is supported only with HWS");
1258*11c73de9SDariusz Sosnowski 		err = ENOTSUP;
1259*11c73de9SDariusz Sosnowski 		goto error;
1260*11c73de9SDariusz Sosnowski 	}
12612eb4d010SOphir Munk 	/*
1262d0cf77e8SViacheslav Ovsiienko 	 * If we have E-Switch we should determine the vport attributes.
1263d0cf77e8SViacheslav Ovsiienko 	 * E-Switch may use either source vport field or reg_c[0] metadata
1264d0cf77e8SViacheslav Ovsiienko 	 * register to match on vport index. The engaged part of metadata
1265d0cf77e8SViacheslav Ovsiienko 	 * register is defined by mask.
12662eb4d010SOphir Munk 	 */
1267cf004fd3SMichael Baum 	if (sh->esw_mode) {
1268ca1418ceSMichael Baum 		err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1269d0cf77e8SViacheslav Ovsiienko 						 spawn->phys_port,
1270d0cf77e8SViacheslav Ovsiienko 						 &vport_info);
12712eb4d010SOphir Munk 		if (err) {
12722eb4d010SOphir Munk 			DRV_LOG(WARNING,
1273887183efSMichael Baum 				"Cannot query devx port %d on device %s",
1274887183efSMichael Baum 				spawn->phys_port, spawn->phys_dev_name);
1275d0cf77e8SViacheslav Ovsiienko 			vport_info.query_flags = 0;
12762eb4d010SOphir Munk 		}
12772eb4d010SOphir Munk 	}
1278d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1279d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_tag = vport_info.vport_meta_tag;
1280d0cf77e8SViacheslav Ovsiienko 		priv->vport_meta_mask = vport_info.vport_meta_mask;
12812eb4d010SOphir Munk 		if (!priv->vport_meta_mask) {
1282887183efSMichael Baum 			DRV_LOG(ERR,
1283887183efSMichael Baum 				"vport zero mask for port %d on bonding device %s",
1284887183efSMichael Baum 				spawn->phys_port, spawn->phys_dev_name);
12852eb4d010SOphir Munk 			err = ENOTSUP;
12862eb4d010SOphir Munk 			goto error;
12872eb4d010SOphir Munk 		}
12882eb4d010SOphir Munk 		if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1289887183efSMichael Baum 			DRV_LOG(ERR,
1290887183efSMichael Baum 				"Invalid vport tag for port %d on bonding device %s",
1291887183efSMichael Baum 				spawn->phys_port, spawn->phys_dev_name);
12922eb4d010SOphir Munk 			err = ENOTSUP;
12932eb4d010SOphir Munk 			goto error;
12942eb4d010SOphir Munk 		}
12952eb4d010SOphir Munk 	}
1296d0cf77e8SViacheslav Ovsiienko 	if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1297d0cf77e8SViacheslav Ovsiienko 		priv->vport_id = vport_info.vport_id;
1298cf004fd3SMichael Baum 	} else if (spawn->pf_bond >= 0 && sh->esw_mode) {
1299887183efSMichael Baum 		DRV_LOG(ERR,
1300887183efSMichael Baum 			"Cannot deduce vport index for port %d on bonding device %s",
1301887183efSMichael Baum 			spawn->phys_port, spawn->phys_dev_name);
13022eb4d010SOphir Munk 		err = ENOTSUP;
13032eb4d010SOphir Munk 		goto error;
13042eb4d010SOphir Munk 	} else {
13052eb4d010SOphir Munk 		/*
1306d0cf77e8SViacheslav Ovsiienko 		 * Suppose vport index in compatible way. Kernel/rdma_core
1307d0cf77e8SViacheslav Ovsiienko 		 * support single E-Switch per PF configurations only and
1308d0cf77e8SViacheslav Ovsiienko 		 * vport_id field contains the vport index for associated VF,
1309d0cf77e8SViacheslav Ovsiienko 		 * which is deduced from representor port name.
13102eb4d010SOphir Munk 		 * For example, let's have the IB device port 10, it has
13112eb4d010SOphir Munk 		 * attached network device eth0, which has port name attribute
13122eb4d010SOphir Munk 		 * pf0vf2, we can deduce the VF number as 2, and set vport index
13132eb4d010SOphir Munk 		 * as 3 (2+1). This assigning schema should be changed if the
13142eb4d010SOphir Munk 		 * multiple E-Switch instances per PF configurations or/and PCI
13152eb4d010SOphir Munk 		 * subfunctions are added.
13162eb4d010SOphir Munk 		 */
13172eb4d010SOphir Munk 		priv->vport_id = switch_info->representor ?
13182eb4d010SOphir Munk 				 switch_info->port_name + 1 : -1;
1319d0cf77e8SViacheslav Ovsiienko 	}
132091766faeSXueming Li 	priv->representor_id = mlx5_representor_id_encode(switch_info,
132191766faeSXueming Li 							  eth_da->type);
13222eb4d010SOphir Munk 	/*
13232eb4d010SOphir Munk 	 * Look for sibling devices in order to reuse their switch domain
13242eb4d010SOphir Munk 	 * if any, otherwise allocate one.
13252eb4d010SOphir Munk 	 */
1326ce4062cbSGregory Etelson 	MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
13272eb4d010SOphir Munk 		const struct mlx5_priv *opriv =
13282eb4d010SOphir Munk 			rte_eth_devices[port_id].data->dev_private;
13292eb4d010SOphir Munk 
13302eb4d010SOphir Munk 		if (!opriv ||
13312eb4d010SOphir Munk 		    opriv->sh != priv->sh ||
13322eb4d010SOphir Munk 			opriv->domain_id ==
13332eb4d010SOphir Munk 			RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
13342eb4d010SOphir Munk 			continue;
13352eb4d010SOphir Munk 		priv->domain_id = opriv->domain_id;
1336ce4062cbSGregory Etelson 		DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1337ce4062cbSGregory Etelson 			priv->dev_port, priv->domain_id);
13382eb4d010SOphir Munk 		break;
13392eb4d010SOphir Munk 	}
13402eb4d010SOphir Munk 	if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
13412eb4d010SOphir Munk 		err = rte_eth_switch_domain_alloc(&priv->domain_id);
13422eb4d010SOphir Munk 		if (err) {
13432eb4d010SOphir Munk 			err = rte_errno;
13442eb4d010SOphir Munk 			DRV_LOG(ERR, "unable to allocate switch domain: %s",
13452eb4d010SOphir Munk 				strerror(rte_errno));
13462eb4d010SOphir Munk 			goto error;
13472eb4d010SOphir Munk 		}
13482eb4d010SOphir Munk 		own_domain_id = 1;
1349ce4062cbSGregory Etelson 		DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1350ce4062cbSGregory Etelson 			priv->dev_port, priv->domain_id);
13512eb4d010SOphir Munk 	}
13526dc0cbc6SMichael Baum 	if (sh->cdev->config.devx) {
135345a6df80SMichael Baum 		struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
135445a6df80SMichael Baum 
135553820561SMichael Baum 		sh->steering_format_version = hca_attr->steering_format_version;
135648041ccbSGregory Etelson #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT)
135753820561SMichael Baum 		if (hca_attr->qos.sup && hca_attr->qos.flow_meter_old &&
1358a13ec19cSMichael Baum 		    sh->config.dv_flow_en) {
135948041ccbSGregory Etelson 			if (sh->registers.aso_reg != REG_NON) {
13602eb4d010SOphir Munk 				priv->mtr_en = 1;
136153820561SMichael Baum 				priv->mtr_reg_share = hca_attr->qos.flow_meter;
13622eb4d010SOphir Munk 			}
13632eb4d010SOphir Munk 		}
136453820561SMichael Baum 		if (hca_attr->qos.sup && hca_attr->qos.flow_meter_aso_sup) {
136529efa63aSLi Zhang 			uint32_t log_obj_size =
136629efa63aSLi Zhang 				rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
136729efa63aSLi Zhang 			if (log_obj_size >=
136853820561SMichael Baum 			    hca_attr->qos.log_meter_aso_granularity &&
136929efa63aSLi Zhang 			    log_obj_size <=
137053820561SMichael Baum 			    hca_attr->qos.log_meter_aso_max_alloc)
137129efa63aSLi Zhang 				sh->meter_aso_en = 1;
137244432018SLi Zhang 		}
137344432018SLi Zhang 		if (priv->mtr_en) {
1374afb4aa4fSLi Zhang 			err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
137529efa63aSLi Zhang 			if (err) {
137629efa63aSLi Zhang 				err = -err;
137729efa63aSLi Zhang 				goto error;
137829efa63aSLi Zhang 			}
137929efa63aSLi Zhang 		}
138053820561SMichael Baum 		if (hca_attr->flow.tunnel_header_0_1)
1381630a587bSRongwei Liu 			sh->tunnel_header_0_1 = 1;
13825c4d4917SSean Zhang 		if (hca_attr->flow.tunnel_header_2_3)
13835c4d4917SSean Zhang 			sh->tunnel_header_2_3 = 1;
138448041ccbSGregory Etelson #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO_EXT */
1385a2999c7bSDekel Peled #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
13865e9f9a28SGregory Etelson 		if (hca_attr->flow_hit_aso && sh->registers.aso_reg == REG_C_3) {
138731ef2982SDekel Peled 			sh->flow_hit_aso_en = 1;
138831ef2982SDekel Peled 			err = mlx5_flow_aso_age_mng_init(sh);
138931ef2982SDekel Peled 			if (err) {
139031ef2982SDekel Peled 				err = -err;
139131ef2982SDekel Peled 				goto error;
139231ef2982SDekel Peled 			}
139331ef2982SDekel Peled 			DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
139431ef2982SDekel Peled 		}
1395a2999c7bSDekel Peled #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1396ee9e5fadSBing Zhao #if defined (HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1397ee9e5fadSBing Zhao     defined (HAVE_MLX5_DR_ACTION_ASO_CT)
1398463170a7SSuanming Mou 		/* HWS create CT ASO SQ based on HWS configure queue number. */
1399463170a7SSuanming Mou 		if (sh->config.dv_flow_en != 2 &&
14005e9f9a28SGregory Etelson 		    hca_attr->ct_offload && sh->registers.aso_reg == REG_C_3) {
1401ee9e5fadSBing Zhao 			err = mlx5_flow_aso_ct_mng_init(sh);
1402ee9e5fadSBing Zhao 			if (err) {
1403ee9e5fadSBing Zhao 				err = -err;
1404ee9e5fadSBing Zhao 				goto error;
1405ee9e5fadSBing Zhao 			}
1406ee9e5fadSBing Zhao 			DRV_LOG(DEBUG, "CT ASO is supported.");
1407ee9e5fadSBing Zhao 			sh->ct_aso_en = 1;
1408ee9e5fadSBing Zhao 		}
1409ee9e5fadSBing Zhao #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
141096b1f027SJiawei Wang #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
141153820561SMichael Baum 		if (hca_attr->log_max_ft_sampler_num > 0  &&
1412a13ec19cSMichael Baum 		    sh->config.dv_flow_en) {
141396b1f027SJiawei Wang 			priv->sampler_en = 1;
14141b9e9826SThomas Monjalon 			DRV_LOG(DEBUG, "Sampler enabled!");
141596b1f027SJiawei Wang 		} else {
141696b1f027SJiawei Wang 			priv->sampler_en = 0;
141753820561SMichael Baum 			if (!hca_attr->log_max_ft_sampler_num)
14181b9e9826SThomas Monjalon 				DRV_LOG(WARNING,
14191b9e9826SThomas Monjalon 					"No available register for sampler.");
142096b1f027SJiawei Wang 			else
14211b9e9826SThomas Monjalon 				DRV_LOG(DEBUG, "DV flow is not supported!");
142296b1f027SJiawei Wang 		}
142396b1f027SJiawei Wang #endif
142476895c7dSJiawei Wang 		if (hca_attr->lag_rx_port_affinity) {
142576895c7dSJiawei Wang 			sh->lag_rx_port_affinity_en = 1;
142676895c7dSJiawei Wang 			DRV_LOG(DEBUG, "LAG Rx Port Affinity enabled");
142776895c7dSJiawei Wang 		}
1428674afdf0SJiawei Wang 		priv->num_lag_ports = hca_attr->num_lag_ports;
1429674afdf0SJiawei Wang 		DRV_LOG(DEBUG, "The number of lag ports is %d", priv->num_lag_ports);
14302eb4d010SOphir Munk 	}
143145a6df80SMichael Baum 	/* Process parameters and store port configuration on priv structure. */
1432a729d2f0SMichael Baum 	err = mlx5_port_args_config(priv, mkvlist, &priv->config);
143345a6df80SMichael Baum 	if (err) {
143445a6df80SMichael Baum 		err = rte_errno;
143545a6df80SMichael Baum 		DRV_LOG(ERR, "Failed to process port configure: %s",
143645a6df80SMichael Baum 			strerror(rte_errno));
143745a6df80SMichael Baum 		goto error;
14383d3f4e6dSAlexander Kozyrev 	}
14392eb4d010SOphir Munk 	eth_dev = rte_eth_dev_allocate(name);
14402eb4d010SOphir Munk 	if (eth_dev == NULL) {
14412eb4d010SOphir Munk 		DRV_LOG(ERR, "can not allocate rte ethdev");
14422eb4d010SOphir Munk 		err = ENOMEM;
14432eb4d010SOphir Munk 		goto error;
14442eb4d010SOphir Munk 	}
14452eb4d010SOphir Munk 	if (priv->representor) {
14462eb4d010SOphir Munk 		eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
14472eb4d010SOphir Munk 		eth_dev->data->representor_id = priv->representor_id;
1448ff4e52efSViacheslav Galaktionov 		MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1449ff4e52efSViacheslav Galaktionov 			struct mlx5_priv *opriv =
1450ff4e52efSViacheslav Galaktionov 				rte_eth_devices[port_id].data->dev_private;
1451ff4e52efSViacheslav Galaktionov 			if (opriv &&
1452ff4e52efSViacheslav Galaktionov 			    opriv->master &&
1453ff4e52efSViacheslav Galaktionov 			    opriv->domain_id == priv->domain_id &&
1454ff4e52efSViacheslav Galaktionov 			    opriv->sh == priv->sh) {
1455ff4e52efSViacheslav Galaktionov 				eth_dev->data->backer_port_id = port_id;
1456ff4e52efSViacheslav Galaktionov 				break;
1457ff4e52efSViacheslav Galaktionov 			}
1458ff4e52efSViacheslav Galaktionov 		}
1459ff4e52efSViacheslav Galaktionov 		if (port_id >= RTE_MAX_ETHPORTS)
1460ff4e52efSViacheslav Galaktionov 			eth_dev->data->backer_port_id = eth_dev->data->port_id;
14612eb4d010SOphir Munk 	}
146239ae7577SSuanming Mou 	priv->mp_id.port_id = eth_dev->data->port_id;
146339ae7577SSuanming Mou 	strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
14642eb4d010SOphir Munk 	/*
14652eb4d010SOphir Munk 	 * Store associated network device interface index. This index
14662eb4d010SOphir Munk 	 * is permanent throughout the lifetime of device. So, we may store
14672eb4d010SOphir Munk 	 * the ifindex here and use the cached value further.
14682eb4d010SOphir Munk 	 */
14692eb4d010SOphir Munk 	MLX5_ASSERT(spawn->ifindex);
14702eb4d010SOphir Munk 	priv->if_index = spawn->ifindex;
1471a89f6433SRongwei Liu 	priv->lag_affinity_idx = sh->refcnt - 1;
14722eb4d010SOphir Munk 	eth_dev->data->dev_private = priv;
14732eb4d010SOphir Munk 	priv->dev_data = eth_dev->data;
14742eb4d010SOphir Munk 	eth_dev->data->mac_addrs = priv->mac;
14752eb4d010SOphir Munk 	eth_dev->device = dpdk_dev;
1476f30e69b4SFerruh Yigit 	eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
14772eb4d010SOphir Munk 	/* Configure the first MAC address by default. */
14782eb4d010SOphir Munk 	if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
14792eb4d010SOphir Munk 		DRV_LOG(ERR,
14802eb4d010SOphir Munk 			"port %u cannot get MAC address, is mlx5_en"
14812eb4d010SOphir Munk 			" loaded? (errno: %s)",
14822eb4d010SOphir Munk 			eth_dev->data->port_id, strerror(rte_errno));
14832eb4d010SOphir Munk 		err = ENODEV;
14842eb4d010SOphir Munk 		goto error;
14852eb4d010SOphir Munk 	}
14862eb4d010SOphir Munk 	DRV_LOG(INFO,
1487c2c4f87bSAman Deep Singh 		"port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1488a7db3afcSAman Deep Singh 		eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
14892eb4d010SOphir Munk #ifdef RTE_LIBRTE_MLX5_DEBUG
14902eb4d010SOphir Munk 	{
149128743807STal Shnaiderman 		char ifname[MLX5_NAMESIZE];
14922eb4d010SOphir Munk 
14932eb4d010SOphir Munk 		if (mlx5_get_ifname(eth_dev, &ifname) == 0)
14942eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
14952eb4d010SOphir Munk 				eth_dev->data->port_id, ifname);
14962eb4d010SOphir Munk 		else
14972eb4d010SOphir Munk 			DRV_LOG(DEBUG, "port %u ifname is unknown",
14982eb4d010SOphir Munk 				eth_dev->data->port_id);
14992eb4d010SOphir Munk 	}
15002eb4d010SOphir Munk #endif
15012eb4d010SOphir Munk 	/* Get actual MTU if possible. */
15022eb4d010SOphir Munk 	err = mlx5_get_mtu(eth_dev, &priv->mtu);
15032eb4d010SOphir Munk 	if (err) {
15042eb4d010SOphir Munk 		err = rte_errno;
15052eb4d010SOphir Munk 		goto error;
15062eb4d010SOphir Munk 	}
15072eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
15082eb4d010SOphir Munk 		priv->mtu);
15092eb4d010SOphir Munk 	/* Initialize burst functions to prevent crashes before link-up. */
1510a41f593fSFerruh Yigit 	eth_dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
1511a41f593fSFerruh Yigit 	eth_dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
1512b012b4ceSOphir Munk 	eth_dev->dev_ops = &mlx5_dev_ops;
1513cbfc6111SFerruh Yigit 	eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1514cbfc6111SFerruh Yigit 	eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1515cbfc6111SFerruh Yigit 	eth_dev->rx_queue_count = mlx5_rx_queue_count;
15162eb4d010SOphir Munk 	/* Register MAC address. */
15172eb4d010SOphir Munk 	claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1518a13ec19cSMichael Baum 	if (sh->dev_cap.vf && sh->config.vf_nl_en)
15192eb4d010SOphir Munk 		mlx5_nl_mac_addr_sync(priv->nl_socket_route,
15202eb4d010SOphir Munk 				      mlx5_ifindex(eth_dev),
15212eb4d010SOphir Munk 				      eth_dev->data->mac_addrs,
15222eb4d010SOphir Munk 				      MLX5_MAX_MAC_ADDRESSES);
15232eb4d010SOphir Munk 	priv->ctrl_flows = 0;
1524d163fc2dSXueming Li 	rte_spinlock_init(&priv->flow_list_lock);
15252eb4d010SOphir Munk 	TAILQ_INIT(&priv->flow_meters);
1526a295c69aSShun Hao 	priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1527a295c69aSShun Hao 	if (!priv->mtr_profile_tbl)
1528a295c69aSShun Hao 		goto error;
15292eb4d010SOphir Munk 	/* Bring Ethernet device up. */
15302eb4d010SOphir Munk 	DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
15312eb4d010SOphir Munk 		eth_dev->data->port_id);
1532655c3c26SDmitry Kozlyuk 	/* Read link status in case it is up and there will be no event. */
15332eb4d010SOphir Munk 	mlx5_link_update(eth_dev, 0);
1534655c3c26SDmitry Kozlyuk 	/* Watch LSC interrupts between port probe and port start. */
1535655c3c26SDmitry Kozlyuk 	priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
1536655c3c26SDmitry Kozlyuk 							eth_dev->data->port_id;
1537655c3c26SDmitry Kozlyuk 	mlx5_set_link_up(eth_dev);
1538b4edeaf3SSuanming Mou 	for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1539a13ec19cSMichael Baum 		icfg[i].release_mem_en = !!sh->config.reclaim_mode;
1540a13ec19cSMichael Baum 		if (sh->config.reclaim_mode)
1541b4edeaf3SSuanming Mou 			icfg[i].per_core_cache = 0;
1542b4edeaf3SSuanming Mou 		priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1543b4edeaf3SSuanming Mou 		if (!priv->flows[i])
1544b4edeaf3SSuanming Mou 			goto error;
1545b4edeaf3SSuanming Mou 	}
15462eb4d010SOphir Munk 	/* Create context for virtual machine VLAN workaround. */
15472eb4d010SOphir Munk 	priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1548a13ec19cSMichael Baum 	if (sh->config.dv_flow_en) {
15492eb4d010SOphir Munk 		err = mlx5_alloc_shared_dr(priv);
15502eb4d010SOphir Munk 		if (err)
15512eb4d010SOphir Munk 			goto error;
1552db25cadcSViacheslav Ovsiienko 		if (mlx5_flex_item_port_init(eth_dev) < 0)
1553db25cadcSViacheslav Ovsiienko 			goto error;
15542eb4d010SOphir Munk 	}
1555c4b86201SMichael Baum 	if (mlx5_devx_obj_ops_en(sh)) {
15565eaf882eSMichael Baum 		priv->obj_ops = devx_obj_ops;
1557e6988afdSMatan Azrad 		mlx5_queue_counter_id_prepare(eth_dev);
155823233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_create =
155923233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_create;
156023233fd6SBing Zhao 		priv->obj_ops.lb_dummy_queue_release =
156123233fd6SBing Zhao 					mlx5_rxq_ibv_obj_dummy_lb_release;
1562614966c2SXueming Li 	} else if (spawn->max_port > UINT8_MAX) {
1563614966c2SXueming Li 		/* Verbs can't support ports larger than 255 by design. */
1564614966c2SXueming Li 		DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255");
1565614966c2SXueming Li 		err = ENOTSUP;
1566614966c2SXueming Li 		goto error;
15675eaf882eSMichael Baum 	} else {
15685eaf882eSMichael Baum 		priv->obj_ops = ibv_obj_ops;
15695eaf882eSMichael Baum 	}
1570a13ec19cSMichael Baum 	if (sh->config.tx_pp &&
157111cfe349SViacheslav Ovsiienko 	    priv->obj_ops.txq_obj_new != mlx5_txq_devx_obj_new) {
1572f17e4b4fSViacheslav Ovsiienko 		/*
1573f17e4b4fSViacheslav Ovsiienko 		 * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1574f17e4b4fSViacheslav Ovsiienko 		 * packet pacing and already checked above.
1575f17e4b4fSViacheslav Ovsiienko 		 * Hence, we should only make sure the SQs will be created
1576f17e4b4fSViacheslav Ovsiienko 		 * with DevX, not with Verbs.
1577f17e4b4fSViacheslav Ovsiienko 		 * Verbs allocates the SQ UAR on its own and it can't be shared
1578f17e4b4fSViacheslav Ovsiienko 		 * with Clock Queue UAR as required for Tx scheduling.
1579f17e4b4fSViacheslav Ovsiienko 		 */
1580f17e4b4fSViacheslav Ovsiienko 		DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1581f17e4b4fSViacheslav Ovsiienko 		err = ENODEV;
1582f17e4b4fSViacheslav Ovsiienko 		goto error;
1583f17e4b4fSViacheslav Ovsiienko 	}
158465b3cd0dSSuanming Mou 	priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
158565b3cd0dSSuanming Mou 	if (!priv->drop_queue.hrxq)
158665b3cd0dSSuanming Mou 		goto error;
15873a2f674bSSuanming Mou 	priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
15883a2f674bSSuanming Mou 				       mlx5_hrxq_create_cb,
15893a2f674bSSuanming Mou 				       mlx5_hrxq_match_cb,
15903a2f674bSSuanming Mou 				       mlx5_hrxq_remove_cb,
15913a2f674bSSuanming Mou 				       mlx5_hrxq_clone_cb,
15923a2f674bSSuanming Mou 				       mlx5_hrxq_clone_free_cb);
15933a2f674bSSuanming Mou 	if (!priv->hrxqs)
15943a2f674bSSuanming Mou 		goto error;
15950f4aa72bSSuanming Mou 	mlx5_set_metadata_mask(eth_dev);
15960f4aa72bSSuanming Mou 	if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
15970f4aa72bSSuanming Mou 	    !priv->sh->dv_regc0_mask) {
15980f4aa72bSSuanming Mou 		DRV_LOG(ERR, "metadata mode %u is not supported "
15990f4aa72bSSuanming Mou 			     "(no metadata reg_c[0] is available)",
16000f4aa72bSSuanming Mou 			     sh->config.dv_xmeta_en);
16010f4aa72bSSuanming Mou 			err = ENOTSUP;
16020f4aa72bSSuanming Mou 			goto error;
16030f4aa72bSSuanming Mou 	}
16043a2f674bSSuanming Mou 	rte_rwlock_init(&priv->ind_tbls_lock);
16055bd0e3e6SDariusz Sosnowski 	if (priv->sh->config.dv_flow_en == 2) {
16061939eb6fSDariusz Sosnowski #ifdef HAVE_MLX5_HWS_SUPPORT
160726e1eaf2SDariusz Sosnowski 		if (priv->sh->config.dv_esw_en) {
1608483181f7SDariusz Sosnowski 			uint32_t usable_bits;
1609483181f7SDariusz Sosnowski 			uint32_t required_bits;
1610483181f7SDariusz Sosnowski 
161126e1eaf2SDariusz Sosnowski 			if (priv->sh->dv_regc0_mask == UINT32_MAX) {
161226e1eaf2SDariusz Sosnowski 				DRV_LOG(ERR, "E-Switch port metadata is required when using HWS "
161326e1eaf2SDariusz Sosnowski 					     "but it is disabled (configure it through devlink)");
161426e1eaf2SDariusz Sosnowski 				err = ENOTSUP;
161526e1eaf2SDariusz Sosnowski 				goto error;
161626e1eaf2SDariusz Sosnowski 			}
161726e1eaf2SDariusz Sosnowski 			if (priv->sh->dv_regc0_mask == 0) {
161826e1eaf2SDariusz Sosnowski 				DRV_LOG(ERR, "E-Switch with HWS is not supported "
161926e1eaf2SDariusz Sosnowski 					     "(no available bits in reg_c[0])");
162026e1eaf2SDariusz Sosnowski 				err = ENOTSUP;
162126e1eaf2SDariusz Sosnowski 				goto error;
162226e1eaf2SDariusz Sosnowski 			}
16233d4e27fdSDavid Marchand 			usable_bits = rte_popcount32(priv->sh->dv_regc0_mask);
16243d4e27fdSDavid Marchand 			required_bits = rte_popcount32(priv->vport_meta_mask);
1625483181f7SDariusz Sosnowski 			if (usable_bits < required_bits) {
1626483181f7SDariusz Sosnowski 				DRV_LOG(ERR, "Not enough bits available in reg_c[0] to provide "
1627483181f7SDariusz Sosnowski 					     "representor matching.");
1628483181f7SDariusz Sosnowski 				err = ENOTSUP;
1629483181f7SDariusz Sosnowski 				goto error;
1630483181f7SDariusz Sosnowski 			}
163126e1eaf2SDariusz Sosnowski 		}
16325bd0e3e6SDariusz Sosnowski 		if (priv->vport_meta_mask)
16335bd0e3e6SDariusz Sosnowski 			flow_hw_set_port_info(eth_dev);
1634ddb68e47SBing Zhao 		if (priv->sh->config.dv_esw_en &&
1635ddb68e47SBing Zhao 		    priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1636ddb68e47SBing Zhao 		    priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_META32_HWS) {
1637ddb68e47SBing Zhao 			DRV_LOG(ERR,
1638ddb68e47SBing Zhao 				"metadata mode %u is not supported in HWS eswitch mode",
1639ddb68e47SBing Zhao 				priv->sh->config.dv_xmeta_en);
1640ddb68e47SBing Zhao 				err = ENOTSUP;
1641ddb68e47SBing Zhao 				goto error;
1642ddb68e47SBing Zhao 		}
16431939eb6fSDariusz Sosnowski 		if (priv->sh->config.dv_esw_en &&
16441939eb6fSDariusz Sosnowski 		    flow_hw_create_vport_action(eth_dev)) {
16451939eb6fSDariusz Sosnowski 			DRV_LOG(ERR, "port %u failed to create vport action",
16461939eb6fSDariusz Sosnowski 				eth_dev->data->port_id);
16471939eb6fSDariusz Sosnowski 			err = EINVAL;
16481939eb6fSDariusz Sosnowski 			goto error;
16491939eb6fSDariusz Sosnowski 		}
1650042f52ddSDariusz Sosnowski 		/*
1651042f52ddSDariusz Sosnowski 		 * If representor matching is disabled, PMD cannot create default flow rules
1652042f52ddSDariusz Sosnowski 		 * to receive traffic for all ports, since implicit source port match is not added.
1653042f52ddSDariusz Sosnowski 		 * Isolated mode is forced.
1654042f52ddSDariusz Sosnowski 		 */
1655042f52ddSDariusz Sosnowski 		if (priv->sh->config.dv_esw_en && !priv->sh->config.repr_matching) {
1656042f52ddSDariusz Sosnowski 			err = mlx5_flow_isolate(eth_dev, 1, NULL);
1657042f52ddSDariusz Sosnowski 			if (err < 0) {
1658042f52ddSDariusz Sosnowski 				err = -err;
1659042f52ddSDariusz Sosnowski 				goto error;
1660042f52ddSDariusz Sosnowski 			}
1661042f52ddSDariusz Sosnowski 			DRV_LOG(WARNING, "port %u ingress traffic is restricted to defined "
1662042f52ddSDariusz Sosnowski 					 "flow rules (isolated mode) since representor "
1663042f52ddSDariusz Sosnowski 					 "matching is disabled",
1664042f52ddSDariusz Sosnowski 				eth_dev->data->port_id);
1665042f52ddSDariusz Sosnowski 		}
1666df26aa6eSDariusz Sosnowski 		eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1667d84c3cf7SSuanming Mou 		return eth_dev;
16685bd0e3e6SDariusz Sosnowski #else
16695bd0e3e6SDariusz Sosnowski 		DRV_LOG(ERR, "DV support is missing for HWS.");
16705bd0e3e6SDariusz Sosnowski 		goto error;
16715bd0e3e6SDariusz Sosnowski #endif
16725bd0e3e6SDariusz Sosnowski 	}
16733c4338a4SJiawei Wang 	if (!priv->sh->flow_priority_check_flag) {
16742eb4d010SOphir Munk 		/* Supported Verbs flow priority number detection. */
16752eb4d010SOphir Munk 		err = mlx5_flow_discover_priorities(eth_dev);
16763c4338a4SJiawei Wang 		priv->sh->flow_max_priority = err;
16773c4338a4SJiawei Wang 		priv->sh->flow_priority_check_flag = 1;
16783c4338a4SJiawei Wang 	} else {
16793c4338a4SJiawei Wang 		err = priv->sh->flow_max_priority;
16803c4338a4SJiawei Wang 	}
16812eb4d010SOphir Munk 	if (err < 0) {
16822eb4d010SOphir Munk 		err = -err;
16832eb4d010SOphir Munk 		goto error;
16842eb4d010SOphir Munk 	}
16852eb4d010SOphir Munk 	/* Query availability of metadata reg_c's. */
16863c4338a4SJiawei Wang 	if (!priv->sh->metadata_regc_check_flag) {
16872eb4d010SOphir Munk 		err = mlx5_flow_discover_mreg_c(eth_dev);
16882eb4d010SOphir Munk 		if (err < 0) {
16892eb4d010SOphir Munk 			err = -err;
16902eb4d010SOphir Munk 			goto error;
16912eb4d010SOphir Munk 		}
16923c4338a4SJiawei Wang 	}
16932eb4d010SOphir Munk 	if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
16942eb4d010SOphir Munk 		DRV_LOG(DEBUG,
16952eb4d010SOphir Munk 			"port %u extensive metadata register is not supported",
16962eb4d010SOphir Munk 			eth_dev->data->port_id);
1697a13ec19cSMichael Baum 		if (sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
16982eb4d010SOphir Munk 			DRV_LOG(ERR, "metadata mode %u is not supported "
16992eb4d010SOphir Munk 				     "(no metadata registers available)",
1700a13ec19cSMichael Baum 				     sh->config.dv_xmeta_en);
17012eb4d010SOphir Munk 			err = ENOTSUP;
17022eb4d010SOphir Munk 			goto error;
17032eb4d010SOphir Munk 		}
17042eb4d010SOphir Munk 	}
1705a13ec19cSMichael Baum 	if (sh->config.dv_flow_en &&
1706a13ec19cSMichael Baum 	    sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
17072eb4d010SOphir Munk 	    mlx5_flow_ext_mreg_supported(eth_dev) &&
17082eb4d010SOphir Munk 	    priv->sh->dv_regc0_mask) {
17092eb4d010SOphir Munk 		priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1710e69a5922SXueming Li 						      MLX5_FLOW_MREG_HTABLE_SZ,
1711961b6774SMatan Azrad 						      false, true, eth_dev,
1712f7f73ac1SXueming Li 						      flow_dv_mreg_create_cb,
1713f5b0aed2SSuanming Mou 						      flow_dv_mreg_match_cb,
1714961b6774SMatan Azrad 						      flow_dv_mreg_remove_cb,
1715961b6774SMatan Azrad 						      flow_dv_mreg_clone_cb,
1716961b6774SMatan Azrad 						    flow_dv_mreg_clone_free_cb);
17172eb4d010SOphir Munk 		if (!priv->mreg_cp_tbl) {
17182eb4d010SOphir Munk 			err = ENOMEM;
17192eb4d010SOphir Munk 			goto error;
17202eb4d010SOphir Munk 		}
17212eb4d010SOphir Munk 	}
1722cc608e4dSSuanming Mou 	rte_spinlock_init(&priv->shared_act_sl);
1723994829e6SSuanming Mou 	mlx5_flow_counter_mode_config(eth_dev);
172445633c46SSuanming Mou 	mlx5_flow_drop_action_config(eth_dev);
1725a13ec19cSMichael Baum 	if (sh->config.dv_flow_en)
17269fbe97f0SXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
17272eb4d010SOphir Munk 	return eth_dev;
17282eb4d010SOphir Munk error:
17292eb4d010SOphir Munk 	if (priv) {
173013c5c093SMichael Baum 		priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
173113c5c093SMichael Baum 							       RTE_MAX_ETHPORTS;
173213c5c093SMichael Baum 		rte_io_wmb();
17331939eb6fSDariusz Sosnowski #ifdef HAVE_MLX5_HWS_SUPPORT
17341939eb6fSDariusz Sosnowski 		if (eth_dev &&
17351939eb6fSDariusz Sosnowski 		    priv->sh &&
17361939eb6fSDariusz Sosnowski 		    priv->sh->config.dv_flow_en == 2 &&
17371939eb6fSDariusz Sosnowski 		    priv->sh->config.dv_esw_en)
17381939eb6fSDariusz Sosnowski 			flow_hw_destroy_vport_action(eth_dev);
17391939eb6fSDariusz Sosnowski #endif
17402eb4d010SOphir Munk 		if (priv->mreg_cp_tbl)
1741e69a5922SXueming Li 			mlx5_hlist_destroy(priv->mreg_cp_tbl);
17422eb4d010SOphir Munk 		if (priv->sh)
17432eb4d010SOphir Munk 			mlx5_os_free_shared_dr(priv);
17442eb4d010SOphir Munk 		if (priv->nl_socket_route >= 0)
17452eb4d010SOphir Munk 			close(priv->nl_socket_route);
17462eb4d010SOphir Munk 		if (priv->vmwa_context)
17472eb4d010SOphir Munk 			mlx5_vlan_vmwa_exit(priv->vmwa_context);
174865b3cd0dSSuanming Mou 		if (eth_dev && priv->drop_queue.hrxq)
174965b3cd0dSSuanming Mou 			mlx5_drop_action_destroy(eth_dev);
1750a295c69aSShun Hao 		if (priv->mtr_profile_tbl)
1751a295c69aSShun Hao 			mlx5_l3t_destroy(priv->mtr_profile_tbl);
17522eb4d010SOphir Munk 		if (own_domain_id)
17532eb4d010SOphir Munk 			claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1754679f46c7SMatan Azrad 		if (priv->hrxqs)
1755679f46c7SMatan Azrad 			mlx5_list_destroy(priv->hrxqs);
1756db25cadcSViacheslav Ovsiienko 		if (eth_dev && priv->flex_item_map)
1757db25cadcSViacheslav Ovsiienko 			mlx5_flex_item_port_cleanup(eth_dev);
175880f872eeSMichael Baum 		mlx5_free(priv->ext_rxqs);
17592175c4dcSSuanming Mou 		mlx5_free(priv);
17602eb4d010SOphir Munk 		if (eth_dev != NULL)
17612eb4d010SOphir Munk 			eth_dev->data->dev_private = NULL;
17622eb4d010SOphir Munk 	}
17632eb4d010SOphir Munk 	if (eth_dev != NULL) {
17642eb4d010SOphir Munk 		/* mac_addrs must not be freed alone because part of
17652eb4d010SOphir Munk 		 * dev_private
17662eb4d010SOphir Munk 		 **/
17672eb4d010SOphir Munk 		eth_dev->data->mac_addrs = NULL;
17682eb4d010SOphir Munk 		rte_eth_dev_release_port(eth_dev);
17692eb4d010SOphir Munk 	}
17702eb4d010SOphir Munk 	if (sh)
177191389890SOphir Munk 		mlx5_free_shared_dev_ctx(sh);
17723fd2961eSXueming Li 	if (nl_rdma >= 0)
17733fd2961eSXueming Li 		close(nl_rdma);
17742eb4d010SOphir Munk 	MLX5_ASSERT(err > 0);
17752eb4d010SOphir Munk 	rte_errno = err;
17762eb4d010SOphir Munk 	return NULL;
17772eb4d010SOphir Munk }
17782eb4d010SOphir Munk 
17792eb4d010SOphir Munk /**
17802eb4d010SOphir Munk  * Comparison callback to sort device data.
17812eb4d010SOphir Munk  *
17822eb4d010SOphir Munk  * This is meant to be used with qsort().
17832eb4d010SOphir Munk  *
17842eb4d010SOphir Munk  * @param a[in]
17852eb4d010SOphir Munk  *   Pointer to pointer to first data object.
17862eb4d010SOphir Munk  * @param b[in]
17872eb4d010SOphir Munk  *   Pointer to pointer to second data object.
17882eb4d010SOphir Munk  *
17892eb4d010SOphir Munk  * @return
17902eb4d010SOphir Munk  *   0 if both objects are equal, less than 0 if the first argument is less
17912eb4d010SOphir Munk  *   than the second, greater than 0 otherwise.
17922eb4d010SOphir Munk  */
17932eb4d010SOphir Munk static int
17942eb4d010SOphir Munk mlx5_dev_spawn_data_cmp(const void *a, const void *b)
17952eb4d010SOphir Munk {
17962eb4d010SOphir Munk 	const struct mlx5_switch_info *si_a =
17972eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)a)->info;
17982eb4d010SOphir Munk 	const struct mlx5_switch_info *si_b =
17992eb4d010SOphir Munk 		&((const struct mlx5_dev_spawn_data *)b)->info;
18002eb4d010SOphir Munk 	int ret;
18012eb4d010SOphir Munk 
18022eb4d010SOphir Munk 	/* Master device first. */
18032eb4d010SOphir Munk 	ret = si_b->master - si_a->master;
18042eb4d010SOphir Munk 	if (ret)
18052eb4d010SOphir Munk 		return ret;
18062eb4d010SOphir Munk 	/* Then representor devices. */
18072eb4d010SOphir Munk 	ret = si_b->representor - si_a->representor;
18082eb4d010SOphir Munk 	if (ret)
18092eb4d010SOphir Munk 		return ret;
18102eb4d010SOphir Munk 	/* Unidentified devices come last in no specific order. */
18112eb4d010SOphir Munk 	if (!si_a->representor)
18122eb4d010SOphir Munk 		return 0;
18132eb4d010SOphir Munk 	/* Order representors by name. */
18142eb4d010SOphir Munk 	return si_a->port_name - si_b->port_name;
18152eb4d010SOphir Munk }
18162eb4d010SOphir Munk 
18172eb4d010SOphir Munk /**
18182eb4d010SOphir Munk  * Match PCI information for possible slaves of bonding device.
18192eb4d010SOphir Munk  *
1820ca1418ceSMichael Baum  * @param[in] ibdev_name
1821ca1418ceSMichael Baum  *   Name of Infiniband device.
18222eb4d010SOphir Munk  * @param[in] pci_dev
1823f926cce3SXueming Li  *   Pointer to primary PCI address structure to match.
18242eb4d010SOphir Munk  * @param[in] nl_rdma
18252eb4d010SOphir Munk  *   Netlink RDMA group socket handle.
1826f926cce3SXueming Li  * @param[in] owner
1827ca1418ceSMichael Baum  *   Representor owner PF index.
1828f5f4c482SXueming Li  * @param[out] bond_info
1829f5f4c482SXueming Li  *   Pointer to bonding information.
18302eb4d010SOphir Munk  *
18312eb4d010SOphir Munk  * @return
18322eb4d010SOphir Munk  *   negative value if no bonding device found, otherwise
18332eb4d010SOphir Munk  *   positive index of slave PF in bonding.
18342eb4d010SOphir Munk  */
18352eb4d010SOphir Munk static int
1836ca1418ceSMichael Baum mlx5_device_bond_pci_match(const char *ibdev_name,
1837f926cce3SXueming Li 			   const struct rte_pci_addr *pci_dev,
1838f5f4c482SXueming Li 			   int nl_rdma, uint16_t owner,
1839f5f4c482SXueming Li 			   struct mlx5_bond_info *bond_info)
18402eb4d010SOphir Munk {
18412eb4d010SOphir Munk 	char ifname[IF_NAMESIZE + 1];
18422eb4d010SOphir Munk 	unsigned int ifindex;
18432eb4d010SOphir Munk 	unsigned int np, i;
1844f5f4c482SXueming Li 	FILE *bond_file = NULL, *file;
18452eb4d010SOphir Munk 	int pf = -1;
1846f5f4c482SXueming Li 	int ret;
18477299ab68SRongwei Liu 	uint8_t cur_guid[32] = {0};
18487299ab68SRongwei Liu 	uint8_t guid[32] = {0};
18492eb4d010SOphir Munk 
18502eb4d010SOphir Munk 	/*
1851ca1418ceSMichael Baum 	 * Try to get master device name. If something goes wrong suppose
1852ca1418ceSMichael Baum 	 * the lack of kernel support and no bonding devices.
18532eb4d010SOphir Munk 	 */
1854f5f4c482SXueming Li 	memset(bond_info, 0, sizeof(*bond_info));
18552eb4d010SOphir Munk 	if (nl_rdma < 0)
18562eb4d010SOphir Munk 		return -1;
1857ca1418ceSMichael Baum 	if (!strstr(ibdev_name, "bond"))
18582eb4d010SOphir Munk 		return -1;
1859ca1418ceSMichael Baum 	np = mlx5_nl_portnum(nl_rdma, ibdev_name);
18602eb4d010SOphir Munk 	if (!np)
18612eb4d010SOphir Munk 		return -1;
18627299ab68SRongwei Liu 	if (mlx5_get_device_guid(pci_dev, cur_guid, sizeof(cur_guid)) < 0)
18637299ab68SRongwei Liu 		return -1;
18642eb4d010SOphir Munk 	/*
1865ca1418ceSMichael Baum 	 * The master device might not be on the predefined port(not on port
1866ca1418ceSMichael Baum 	 * index 1, it is not guaranteed), we have to scan all Infiniband
1867ca1418ceSMichael Baum 	 * device ports and find master.
18682eb4d010SOphir Munk 	 */
18692eb4d010SOphir Munk 	for (i = 1; i <= np; ++i) {
18702eb4d010SOphir Munk 		/* Check whether Infiniband port is populated. */
1871ca1418ceSMichael Baum 		ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
18722eb4d010SOphir Munk 		if (!ifindex)
18732eb4d010SOphir Munk 			continue;
18742eb4d010SOphir Munk 		if (!if_indextoname(ifindex, ifname))
18752eb4d010SOphir Munk 			continue;
18762eb4d010SOphir Munk 		/* Try to read bonding slave names from sysfs. */
18772eb4d010SOphir Munk 		MKSTR(slaves,
18782eb4d010SOphir Munk 		      "/sys/class/net/%s/master/bonding/slaves", ifname);
1879f5f4c482SXueming Li 		bond_file = fopen(slaves, "r");
1880f5f4c482SXueming Li 		if (bond_file)
18812eb4d010SOphir Munk 			break;
18822eb4d010SOphir Munk 	}
1883f5f4c482SXueming Li 	if (!bond_file)
18842eb4d010SOphir Munk 		return -1;
18852eb4d010SOphir Munk 	/* Use safe format to check maximal buffer length. */
18862eb4d010SOphir Munk 	MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1887f5f4c482SXueming Li 	while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
18882eb4d010SOphir Munk 		char tmp_str[IF_NAMESIZE + 32];
18892eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
18902eb4d010SOphir Munk 		struct mlx5_switch_info	info;
18917299ab68SRongwei Liu 		int ret;
18922eb4d010SOphir Munk 
18932eb4d010SOphir Munk 		/* Process slave interface names in the loop. */
18942eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
18952eb4d010SOphir Munk 			 "/sys/class/net/%s", ifname);
18964d567938SThomas Monjalon 		if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1897ca1418ceSMichael Baum 			DRV_LOG(WARNING,
1898ca1418ceSMichael Baum 				"Cannot get PCI address for netdev \"%s\".",
1899ca1418ceSMichael Baum 				ifname);
19002eb4d010SOphir Munk 			continue;
19012eb4d010SOphir Munk 		}
19022eb4d010SOphir Munk 		/* Slave interface PCI address match found. */
19032eb4d010SOphir Munk 		snprintf(tmp_str, sizeof(tmp_str),
19042eb4d010SOphir Munk 			 "/sys/class/net/%s/phys_port_name", ifname);
19052eb4d010SOphir Munk 		file = fopen(tmp_str, "rb");
19062eb4d010SOphir Munk 		if (!file)
19072eb4d010SOphir Munk 			break;
19082eb4d010SOphir Munk 		info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
19092eb4d010SOphir Munk 		if (fscanf(file, "%32s", tmp_str) == 1)
19102eb4d010SOphir Munk 			mlx5_translate_port_name(tmp_str, &info);
1911f5f4c482SXueming Li 		fclose(file);
1912f5f4c482SXueming Li 		/* Only process PF ports. */
1913f5f4c482SXueming Li 		if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1914f5f4c482SXueming Li 		    info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1915f5f4c482SXueming Li 			continue;
1916f5f4c482SXueming Li 		/* Check max bonding member. */
1917f5f4c482SXueming Li 		if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1918f5f4c482SXueming Li 			DRV_LOG(WARNING, "bonding index out of range, "
1919f5f4c482SXueming Li 				"please increase MLX5_BOND_MAX_PORTS: %s",
1920f5f4c482SXueming Li 				tmp_str);
19212eb4d010SOphir Munk 			break;
19222eb4d010SOphir Munk 		}
1923f5f4c482SXueming Li 		/* Get ifindex. */
1924f5f4c482SXueming Li 		snprintf(tmp_str, sizeof(tmp_str),
1925f5f4c482SXueming Li 			 "/sys/class/net/%s/ifindex", ifname);
1926f5f4c482SXueming Li 		file = fopen(tmp_str, "rb");
1927f5f4c482SXueming Li 		if (!file)
1928f5f4c482SXueming Li 			break;
1929f5f4c482SXueming Li 		ret = fscanf(file, "%u", &ifindex);
19302eb4d010SOphir Munk 		fclose(file);
1931f5f4c482SXueming Li 		if (ret != 1)
1932f5f4c482SXueming Li 			break;
1933f5f4c482SXueming Li 		/* Save bonding info. */
1934f5f4c482SXueming Li 		strncpy(bond_info->ports[info.port_name].ifname, ifname,
1935f5f4c482SXueming Li 			sizeof(bond_info->ports[0].ifname));
1936f5f4c482SXueming Li 		bond_info->ports[info.port_name].pci_addr = pci_addr;
1937f5f4c482SXueming Li 		bond_info->ports[info.port_name].ifindex = ifindex;
1938f5f4c482SXueming Li 		bond_info->n_port++;
19397299ab68SRongwei Liu 		/*
19407299ab68SRongwei Liu 		 * Under socket direct mode, bonding will use
19417299ab68SRongwei Liu 		 * system_image_guid as identification.
19427299ab68SRongwei Liu 		 * After OFED 5.4, guid is readable (ret >= 0) under sysfs.
19437299ab68SRongwei Liu 		 * All bonding members should have the same guid even if driver
19447299ab68SRongwei Liu 		 * is using PCIe BDF.
19457299ab68SRongwei Liu 		 */
19467299ab68SRongwei Liu 		ret = mlx5_get_device_guid(&pci_addr, guid, sizeof(guid));
19477299ab68SRongwei Liu 		if (ret < 0)
19487299ab68SRongwei Liu 			break;
19497299ab68SRongwei Liu 		else if (ret > 0) {
19507299ab68SRongwei Liu 			if (!memcmp(guid, cur_guid, sizeof(guid)) &&
19517299ab68SRongwei Liu 			    owner == info.port_name &&
19527299ab68SRongwei Liu 			    (owner != 0 || (owner == 0 &&
19537299ab68SRongwei Liu 			    !rte_pci_addr_cmp(pci_dev, &pci_addr))))
19547299ab68SRongwei Liu 				pf = info.port_name;
19557299ab68SRongwei Liu 		} else if (pci_dev->domain == pci_addr.domain &&
19567299ab68SRongwei Liu 		    pci_dev->bus == pci_addr.bus &&
19577299ab68SRongwei Liu 		    pci_dev->devid == pci_addr.devid &&
19587299ab68SRongwei Liu 		    ((pci_dev->function == 0 &&
19597299ab68SRongwei Liu 		      pci_dev->function + owner == pci_addr.function) ||
19607299ab68SRongwei Liu 		     (pci_dev->function == owner &&
19617299ab68SRongwei Liu 		      pci_addr.function == owner)))
19627299ab68SRongwei Liu 			pf = info.port_name;
1963f5f4c482SXueming Li 	}
1964f5f4c482SXueming Li 	if (pf >= 0) {
1965f5f4c482SXueming Li 		/* Get bond interface info */
1966f5f4c482SXueming Li 		ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1967f5f4c482SXueming Li 					   bond_info->ifname);
1968f5f4c482SXueming Li 		if (ret)
1969f5f4c482SXueming Li 			DRV_LOG(ERR, "unable to get bond info: %s",
1970f5f4c482SXueming Li 				strerror(rte_errno));
1971f5f4c482SXueming Li 		else
1972f5f4c482SXueming Li 			DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1973f5f4c482SXueming Li 				ifindex, bond_info->ifindex, bond_info->ifname);
1974f5f4c482SXueming Li 	}
19757299ab68SRongwei Liu 	if (owner == 0 && pf != 0) {
19762fc03b23SThomas Monjalon 		DRV_LOG(INFO, "PCIe instance " PCI_PRI_FMT " isn't bonding owner",
19777299ab68SRongwei Liu 				pci_dev->domain, pci_dev->bus, pci_dev->devid,
19787299ab68SRongwei Liu 				pci_dev->function);
19797299ab68SRongwei Liu 	}
19802eb4d010SOphir Munk 	return pf;
19812eb4d010SOphir Munk }
19822eb4d010SOphir Munk 
1983bb2fee72SDariusz Sosnowski static int
1984bb2fee72SDariusz Sosnowski mlx5_nl_esw_multiport_get(struct rte_pci_addr *pci_addr, int *enabled)
1985bb2fee72SDariusz Sosnowski {
1986bb2fee72SDariusz Sosnowski 	char pci_addr_str[PCI_PRI_STR_SIZE] = { 0 };
1987bb2fee72SDariusz Sosnowski 	int nlsk_fd;
1988bb2fee72SDariusz Sosnowski 	int devlink_id;
1989bb2fee72SDariusz Sosnowski 	int ret;
1990bb2fee72SDariusz Sosnowski 
1991bb2fee72SDariusz Sosnowski 	/* Provide correct value to have defined enabled state in case of an error. */
1992bb2fee72SDariusz Sosnowski 	*enabled = 0;
1993bb2fee72SDariusz Sosnowski 	rte_pci_device_name(pci_addr, pci_addr_str, sizeof(pci_addr_str));
1994bb2fee72SDariusz Sosnowski 	nlsk_fd = mlx5_nl_init(NETLINK_GENERIC, 0);
1995bb2fee72SDariusz Sosnowski 	if (nlsk_fd < 0)
1996bb2fee72SDariusz Sosnowski 		return nlsk_fd;
1997bb2fee72SDariusz Sosnowski 	devlink_id = mlx5_nl_devlink_family_id_get(nlsk_fd);
1998bb2fee72SDariusz Sosnowski 	if (devlink_id < 0) {
1999bb2fee72SDariusz Sosnowski 		ret = devlink_id;
2000bb2fee72SDariusz Sosnowski 		DRV_LOG(DEBUG, "Unable to get devlink family id for Multiport E-Switch checks "
2001bb2fee72SDariusz Sosnowski 			       "by netlink, for PCI device %s", pci_addr_str);
2002bb2fee72SDariusz Sosnowski 		goto close_nlsk_fd;
2003bb2fee72SDariusz Sosnowski 	}
2004bb2fee72SDariusz Sosnowski 	ret = mlx5_nl_devlink_esw_multiport_get(nlsk_fd, devlink_id, pci_addr_str, enabled);
2005bb2fee72SDariusz Sosnowski 	if (ret < 0)
2006bb2fee72SDariusz Sosnowski 		DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by Netlink.");
2007bb2fee72SDariusz Sosnowski close_nlsk_fd:
2008bb2fee72SDariusz Sosnowski 	close(nlsk_fd);
2009bb2fee72SDariusz Sosnowski 	return ret;
2010bb2fee72SDariusz Sosnowski }
2011bb2fee72SDariusz Sosnowski 
2012b62f0485SDariusz Sosnowski #define SYSFS_MPESW_PARAM_MAX_LEN 16
2013b62f0485SDariusz Sosnowski 
2014bb2fee72SDariusz Sosnowski static int
2015b62f0485SDariusz Sosnowski mlx5_sysfs_esw_multiport_get(struct ibv_device *ibv, struct rte_pci_addr *pci_addr, int *enabled)
2016b62f0485SDariusz Sosnowski {
2017b62f0485SDariusz Sosnowski 	int nl_rdma;
2018b62f0485SDariusz Sosnowski 	unsigned int n_ports;
2019b62f0485SDariusz Sosnowski 	unsigned int i;
2020b62f0485SDariusz Sosnowski 	int ret;
2021b62f0485SDariusz Sosnowski 
2022b62f0485SDariusz Sosnowski 	/* Provide correct value to have defined enabled state in case of an error. */
2023b62f0485SDariusz Sosnowski 	*enabled = 0;
2024b62f0485SDariusz Sosnowski 	nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
2025b62f0485SDariusz Sosnowski 	if (nl_rdma < 0)
2026b62f0485SDariusz Sosnowski 		return nl_rdma;
2027b62f0485SDariusz Sosnowski 	n_ports = mlx5_nl_portnum(nl_rdma, ibv->name);
2028b62f0485SDariusz Sosnowski 	if (!n_ports) {
2029b62f0485SDariusz Sosnowski 		ret = -rte_errno;
2030b62f0485SDariusz Sosnowski 		goto close_nl_rdma;
2031b62f0485SDariusz Sosnowski 	}
2032b62f0485SDariusz Sosnowski 	for (i = 1; i <= n_ports; ++i) {
2033b62f0485SDariusz Sosnowski 		unsigned int ifindex;
2034b62f0485SDariusz Sosnowski 		char ifname[IF_NAMESIZE + 1];
2035b62f0485SDariusz Sosnowski 		struct rte_pci_addr if_pci_addr;
2036b62f0485SDariusz Sosnowski 		char mpesw[SYSFS_MPESW_PARAM_MAX_LEN + 1];
2037b62f0485SDariusz Sosnowski 		FILE *sysfs;
2038b62f0485SDariusz Sosnowski 		int n;
2039b62f0485SDariusz Sosnowski 
2040b62f0485SDariusz Sosnowski 		ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i);
2041b62f0485SDariusz Sosnowski 		if (!ifindex)
2042b62f0485SDariusz Sosnowski 			continue;
2043b62f0485SDariusz Sosnowski 		if (!if_indextoname(ifindex, ifname))
2044b62f0485SDariusz Sosnowski 			continue;
2045b62f0485SDariusz Sosnowski 		MKSTR(sysfs_if_path, "/sys/class/net/%s", ifname);
2046b62f0485SDariusz Sosnowski 		if (mlx5_get_pci_addr(sysfs_if_path, &if_pci_addr))
2047b62f0485SDariusz Sosnowski 			continue;
2048b62f0485SDariusz Sosnowski 		if (pci_addr->domain != if_pci_addr.domain ||
2049b62f0485SDariusz Sosnowski 		    pci_addr->bus != if_pci_addr.bus ||
2050b62f0485SDariusz Sosnowski 		    pci_addr->devid != if_pci_addr.devid ||
2051b62f0485SDariusz Sosnowski 		    pci_addr->function != if_pci_addr.function)
2052b62f0485SDariusz Sosnowski 			continue;
2053b62f0485SDariusz Sosnowski 		MKSTR(sysfs_mpesw_path,
2054b62f0485SDariusz Sosnowski 		      "/sys/class/net/%s/compat/devlink/lag_port_select_mode", ifname);
2055b62f0485SDariusz Sosnowski 		sysfs = fopen(sysfs_mpesw_path, "r");
2056b62f0485SDariusz Sosnowski 		if (!sysfs)
2057b62f0485SDariusz Sosnowski 			continue;
2058b62f0485SDariusz Sosnowski 		n = fscanf(sysfs, "%" RTE_STR(SYSFS_MPESW_PARAM_MAX_LEN) "s", mpesw);
2059b62f0485SDariusz Sosnowski 		fclose(sysfs);
2060b62f0485SDariusz Sosnowski 		if (n != 1)
2061b62f0485SDariusz Sosnowski 			continue;
2062b62f0485SDariusz Sosnowski 		ret = 0;
2063b62f0485SDariusz Sosnowski 		if (strcmp(mpesw, "multiport_esw") == 0) {
2064b62f0485SDariusz Sosnowski 			*enabled = 1;
2065b62f0485SDariusz Sosnowski 			break;
2066b62f0485SDariusz Sosnowski 		}
2067b62f0485SDariusz Sosnowski 		*enabled = 0;
2068b62f0485SDariusz Sosnowski 		break;
2069b62f0485SDariusz Sosnowski 	}
2070b62f0485SDariusz Sosnowski 	if (i > n_ports) {
2071b62f0485SDariusz Sosnowski 		DRV_LOG(DEBUG, "Unable to get Multiport E-Switch state by sysfs.");
2072b62f0485SDariusz Sosnowski 		rte_errno = ENOENT;
2073b62f0485SDariusz Sosnowski 		ret = -rte_errno;
2074b62f0485SDariusz Sosnowski 	}
2075b62f0485SDariusz Sosnowski 
2076b62f0485SDariusz Sosnowski close_nl_rdma:
2077b62f0485SDariusz Sosnowski 	close(nl_rdma);
2078b62f0485SDariusz Sosnowski 	return ret;
2079b62f0485SDariusz Sosnowski }
2080b62f0485SDariusz Sosnowski 
2081*11c73de9SDariusz Sosnowski static int
2082bb2fee72SDariusz Sosnowski mlx5_is_mpesw_enabled(struct ibv_device *ibv, struct rte_pci_addr *ibv_pci_addr, int *enabled)
2083bb2fee72SDariusz Sosnowski {
2084bb2fee72SDariusz Sosnowski 	/*
2085bb2fee72SDariusz Sosnowski 	 * Try getting Multiport E-Switch state through netlink interface
2086bb2fee72SDariusz Sosnowski 	 * If unable, try sysfs interface. If that is unable as well,
2087bb2fee72SDariusz Sosnowski 	 * assume that Multiport E-Switch is disabled and return an error.
2088bb2fee72SDariusz Sosnowski 	 */
2089bb2fee72SDariusz Sosnowski 	if (mlx5_nl_esw_multiport_get(ibv_pci_addr, enabled) >= 0 ||
2090bb2fee72SDariusz Sosnowski 	    mlx5_sysfs_esw_multiport_get(ibv, ibv_pci_addr, enabled) >= 0)
2091bb2fee72SDariusz Sosnowski 		return 0;
2092bb2fee72SDariusz Sosnowski 	DRV_LOG(DEBUG, "Unable to check MPESW state for IB device %s "
2093bb2fee72SDariusz Sosnowski 		       "(PCI: " PCI_PRI_FMT ")",
2094bb2fee72SDariusz Sosnowski 		       ibv->name,
2095bb2fee72SDariusz Sosnowski 		       ibv_pci_addr->domain, ibv_pci_addr->bus,
2096bb2fee72SDariusz Sosnowski 		       ibv_pci_addr->devid, ibv_pci_addr->function);
2097bb2fee72SDariusz Sosnowski 	*enabled = 0;
2098bb2fee72SDariusz Sosnowski 	return -rte_errno;
2099bb2fee72SDariusz Sosnowski }
2100bb2fee72SDariusz Sosnowski 
2101*11c73de9SDariusz Sosnowski static int
2102*11c73de9SDariusz Sosnowski mlx5_device_mpesw_pci_match(struct ibv_device *ibv,
2103*11c73de9SDariusz Sosnowski 			    const struct rte_pci_addr *owner_pci,
2104*11c73de9SDariusz Sosnowski 			    int nl_rdma)
2105*11c73de9SDariusz Sosnowski {
2106*11c73de9SDariusz Sosnowski 	struct rte_pci_addr ibdev_pci_addr = { 0 };
2107*11c73de9SDariusz Sosnowski 	char ifname[IF_NAMESIZE + 1] = { 0 };
2108*11c73de9SDariusz Sosnowski 	unsigned int ifindex;
2109*11c73de9SDariusz Sosnowski 	unsigned int np;
2110*11c73de9SDariusz Sosnowski 	unsigned int i;
2111*11c73de9SDariusz Sosnowski 	int enabled = 0;
2112*11c73de9SDariusz Sosnowski 	int ret;
2113*11c73de9SDariusz Sosnowski 
2114*11c73de9SDariusz Sosnowski 	/* Check if IB device's PCI address matches the probed PCI address. */
2115*11c73de9SDariusz Sosnowski 	if (mlx5_get_pci_addr(ibv->ibdev_path, &ibdev_pci_addr)) {
2116*11c73de9SDariusz Sosnowski 		DRV_LOG(DEBUG, "Skipping MPESW check for IB device %s since "
2117*11c73de9SDariusz Sosnowski 			       "there is no underlying PCI device", ibv->name);
2118*11c73de9SDariusz Sosnowski 		rte_errno = ENOENT;
2119*11c73de9SDariusz Sosnowski 		return -rte_errno;
2120*11c73de9SDariusz Sosnowski 	}
2121*11c73de9SDariusz Sosnowski 	if (ibdev_pci_addr.domain != owner_pci->domain ||
2122*11c73de9SDariusz Sosnowski 	    ibdev_pci_addr.bus != owner_pci->bus ||
2123*11c73de9SDariusz Sosnowski 	    ibdev_pci_addr.devid != owner_pci->devid ||
2124*11c73de9SDariusz Sosnowski 	    ibdev_pci_addr.function != owner_pci->function) {
2125*11c73de9SDariusz Sosnowski 		return -1;
2126*11c73de9SDariusz Sosnowski 	}
2127*11c73de9SDariusz Sosnowski 	/* Check if IB device has MPESW enabled. */
2128*11c73de9SDariusz Sosnowski 	if (mlx5_is_mpesw_enabled(ibv, &ibdev_pci_addr, &enabled))
2129*11c73de9SDariusz Sosnowski 		return -1;
2130*11c73de9SDariusz Sosnowski 	if (!enabled)
2131*11c73de9SDariusz Sosnowski 		return -1;
2132*11c73de9SDariusz Sosnowski 	/* Iterate through IB ports to find MPESW master uplink port. */
2133*11c73de9SDariusz Sosnowski 	if (nl_rdma < 0)
2134*11c73de9SDariusz Sosnowski 		return -1;
2135*11c73de9SDariusz Sosnowski 	np = mlx5_nl_portnum(nl_rdma, ibv->name);
2136*11c73de9SDariusz Sosnowski 	if (!np)
2137*11c73de9SDariusz Sosnowski 		return -1;
2138*11c73de9SDariusz Sosnowski 	for (i = 1; i <= np; ++i) {
2139*11c73de9SDariusz Sosnowski 		struct rte_pci_addr pci_addr;
2140*11c73de9SDariusz Sosnowski 		FILE *file;
2141*11c73de9SDariusz Sosnowski 		char port_name[IF_NAMESIZE + 1];
2142*11c73de9SDariusz Sosnowski 		struct mlx5_switch_info	info;
2143*11c73de9SDariusz Sosnowski 
2144*11c73de9SDariusz Sosnowski 		/* Check whether IB port has a corresponding netdev. */
2145*11c73de9SDariusz Sosnowski 		ifindex = mlx5_nl_ifindex(nl_rdma, ibv->name, i);
2146*11c73de9SDariusz Sosnowski 		if (!ifindex)
2147*11c73de9SDariusz Sosnowski 			continue;
2148*11c73de9SDariusz Sosnowski 		if (!if_indextoname(ifindex, ifname))
2149*11c73de9SDariusz Sosnowski 			continue;
2150*11c73de9SDariusz Sosnowski 		/* Read port name and determine its type. */
2151*11c73de9SDariusz Sosnowski 		MKSTR(ifphysportname, "/sys/class/net/%s/phys_port_name", ifname);
2152*11c73de9SDariusz Sosnowski 		file = fopen(ifphysportname, "rb");
2153*11c73de9SDariusz Sosnowski 		if (!file)
2154*11c73de9SDariusz Sosnowski 			continue;
2155*11c73de9SDariusz Sosnowski 		ret = fscanf(file, "%16s", port_name);
2156*11c73de9SDariusz Sosnowski 		fclose(file);
2157*11c73de9SDariusz Sosnowski 		if (ret != 1)
2158*11c73de9SDariusz Sosnowski 			continue;
2159*11c73de9SDariusz Sosnowski 		memset(&info, 0, sizeof(info));
2160*11c73de9SDariusz Sosnowski 		mlx5_translate_port_name(port_name, &info);
2161*11c73de9SDariusz Sosnowski 		if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2162*11c73de9SDariusz Sosnowski 			continue;
2163*11c73de9SDariusz Sosnowski 		/* Fetch PCI address of the device to which the netdev is bound. */
2164*11c73de9SDariusz Sosnowski 		MKSTR(ifpath, "/sys/class/net/%s", ifname);
2165*11c73de9SDariusz Sosnowski 		if (mlx5_get_pci_addr(ifpath, &pci_addr))
2166*11c73de9SDariusz Sosnowski 			continue;
2167*11c73de9SDariusz Sosnowski 		if (pci_addr.domain == ibdev_pci_addr.domain &&
2168*11c73de9SDariusz Sosnowski 		    pci_addr.bus == ibdev_pci_addr.bus &&
2169*11c73de9SDariusz Sosnowski 		    pci_addr.devid == ibdev_pci_addr.devid &&
2170*11c73de9SDariusz Sosnowski 		    pci_addr.function == ibdev_pci_addr.function) {
2171*11c73de9SDariusz Sosnowski 			MLX5_ASSERT(info.port_name >= 0);
2172*11c73de9SDariusz Sosnowski 			return info.port_name;
2173*11c73de9SDariusz Sosnowski 		}
2174*11c73de9SDariusz Sosnowski 	}
2175*11c73de9SDariusz Sosnowski 	/* No matching MPESW uplink port was found. */
2176*11c73de9SDariusz Sosnowski 	return -1;
2177*11c73de9SDariusz Sosnowski }
2178*11c73de9SDariusz Sosnowski 
21792eb4d010SOphir Munk /**
218008c2772fSXueming Li  * Register a PCI device within bonding.
21812eb4d010SOphir Munk  *
218208c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device and
218308c2772fSXueming Li  * bonding owner PF index.
21842eb4d010SOphir Munk  *
21857af08c8fSMichael Baum  * @param[in] cdev
21867af08c8fSMichael Baum  *   Pointer to common mlx5 device structure.
218708c2772fSXueming Li  * @param[in] req_eth_da
218808c2772fSXueming Li  *   Requested ethdev device argument.
218908c2772fSXueming Li  * @param[in] owner_id
219008c2772fSXueming Li  *   Requested owner PF port ID within bonding device, default to 0.
2191a729d2f0SMichael Baum  * @param[in, out] mkvlist
2192a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
21932eb4d010SOphir Munk  *
21942eb4d010SOphir Munk  * @return
21952eb4d010SOphir Munk  *   0 on success, a negative errno value otherwise and rte_errno is set.
21962eb4d010SOphir Munk  */
219708c2772fSXueming Li static int
2198ca1418ceSMichael Baum mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
219908c2772fSXueming Li 		     struct rte_eth_devargs *req_eth_da,
2200a729d2f0SMichael Baum 		     uint16_t owner_id, struct mlx5_kvargs_ctrl *mkvlist)
22012eb4d010SOphir Munk {
22022eb4d010SOphir Munk 	struct ibv_device **ibv_list;
22032eb4d010SOphir Munk 	/*
22042eb4d010SOphir Munk 	 * Number of found IB Devices matching with requested PCI BDF.
22052eb4d010SOphir Munk 	 * nd != 1 means there are multiple IB devices over the same
22062eb4d010SOphir Munk 	 * PCI device and we have representors and master.
22072eb4d010SOphir Munk 	 */
22082eb4d010SOphir Munk 	unsigned int nd = 0;
22092eb4d010SOphir Munk 	/*
22102eb4d010SOphir Munk 	 * Number of found IB device Ports. nd = 1 and np = 1..n means
22112eb4d010SOphir Munk 	 * we have the single multiport IB device, and there may be
22122eb4d010SOphir Munk 	 * representors attached to some of found ports.
22132eb4d010SOphir Munk 	 */
22142eb4d010SOphir Munk 	unsigned int np = 0;
22152eb4d010SOphir Munk 	/*
22162eb4d010SOphir Munk 	 * Number of DPDK ethernet devices to Spawn - either over
22172eb4d010SOphir Munk 	 * multiple IB devices or multiple ports of single IB device.
22182eb4d010SOphir Munk 	 * Actually this is the number of iterations to spawn.
22192eb4d010SOphir Munk 	 */
22202eb4d010SOphir Munk 	unsigned int ns = 0;
22212eb4d010SOphir Munk 	/*
22222eb4d010SOphir Munk 	 * Bonding device
22232eb4d010SOphir Munk 	 *   < 0 - no bonding device (single one)
22242eb4d010SOphir Munk 	 *  >= 0 - bonding device (value is slave PF index)
22252eb4d010SOphir Munk 	 */
22262eb4d010SOphir Munk 	int bd = -1;
2227*11c73de9SDariusz Sosnowski 	/*
2228*11c73de9SDariusz Sosnowski 	 * Multiport E-Switch (MPESW) device:
2229*11c73de9SDariusz Sosnowski 	 *   < 0 - no MPESW device or could not determine if it is MPESW device,
2230*11c73de9SDariusz Sosnowski 	 *  >= 0 - MPESW device. Value is the port index of the MPESW owner.
2231*11c73de9SDariusz Sosnowski 	 */
2232*11c73de9SDariusz Sosnowski 	int mpesw = MLX5_MPESW_PORT_INVALID;
22337af08c8fSMichael Baum 	struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
22342eb4d010SOphir Munk 	struct mlx5_dev_spawn_data *list = NULL;
223508c2772fSXueming Li 	struct rte_eth_devargs eth_da = *req_eth_da;
2236f926cce3SXueming Li 	struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2237f5f4c482SXueming Li 	struct mlx5_bond_info bond_info;
2238f926cce3SXueming Li 	int ret = -1;
22392eb4d010SOphir Munk 
22402eb4d010SOphir Munk 	errno = 0;
22412eb4d010SOphir Munk 	ibv_list = mlx5_glue->get_device_list(&ret);
22422eb4d010SOphir Munk 	if (!ibv_list) {
22432eb4d010SOphir Munk 		rte_errno = errno ? errno : ENOSYS;
2244887183efSMichael Baum 		DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
22452eb4d010SOphir Munk 		return -rte_errno;
22462eb4d010SOphir Munk 	}
22472eb4d010SOphir Munk 	/*
22482eb4d010SOphir Munk 	 * First scan the list of all Infiniband devices to find
22492eb4d010SOphir Munk 	 * matching ones, gathering into the list.
22502eb4d010SOphir Munk 	 */
22512eb4d010SOphir Munk 	struct ibv_device *ibv_match[ret + 1];
2252be66461cSDmitry Kozlyuk 	int nl_route = mlx5_nl_init(NETLINK_ROUTE, 0);
2253be66461cSDmitry Kozlyuk 	int nl_rdma = mlx5_nl_init(NETLINK_RDMA, 0);
22542eb4d010SOphir Munk 	unsigned int i;
22552eb4d010SOphir Munk 
22562eb4d010SOphir Munk 	while (ret-- > 0) {
22572eb4d010SOphir Munk 		struct rte_pci_addr pci_addr;
22582eb4d010SOphir Munk 
2259887183efSMichael Baum 		DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2260ca1418ceSMichael Baum 		bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2261ca1418ceSMichael Baum 						nl_rdma, owner_id, &bond_info);
22622eb4d010SOphir Munk 		if (bd >= 0) {
22632eb4d010SOphir Munk 			/*
22642eb4d010SOphir Munk 			 * Bonding device detected. Only one match is allowed,
22652eb4d010SOphir Munk 			 * the bonding is supported over multi-port IB device,
22662eb4d010SOphir Munk 			 * there should be no matches on representor PCI
22672eb4d010SOphir Munk 			 * functions or non VF LAG bonding devices with
22682eb4d010SOphir Munk 			 * specified address.
22692eb4d010SOphir Munk 			 */
22702eb4d010SOphir Munk 			if (nd) {
22712eb4d010SOphir Munk 				DRV_LOG(ERR,
22722eb4d010SOphir Munk 					"multiple PCI match on bonding device"
22732eb4d010SOphir Munk 					"\"%s\" found", ibv_list[ret]->name);
22742eb4d010SOphir Munk 				rte_errno = ENOENT;
22752eb4d010SOphir Munk 				ret = -rte_errno;
22762eb4d010SOphir Munk 				goto exit;
22772eb4d010SOphir Munk 			}
2278f926cce3SXueming Li 			/* Amend owner pci address if owner PF ID specified. */
2279f926cce3SXueming Li 			if (eth_da.nb_representor_ports)
228008c2772fSXueming Li 				owner_pci.function += owner_id;
2281ca1418ceSMichael Baum 			DRV_LOG(INFO,
2282ca1418ceSMichael Baum 				"PCI information matches for slave %d bonding device \"%s\"",
22832eb4d010SOphir Munk 				bd, ibv_list[ret]->name);
22842eb4d010SOphir Munk 			ibv_match[nd++] = ibv_list[ret];
22852eb4d010SOphir Munk 			break;
2286*11c73de9SDariusz Sosnowski 		}
2287*11c73de9SDariusz Sosnowski 		mpesw = mlx5_device_mpesw_pci_match(ibv_list[ret], &owner_pci, nl_rdma);
2288*11c73de9SDariusz Sosnowski 		if (mpesw >= 0) {
2289*11c73de9SDariusz Sosnowski 			/*
2290*11c73de9SDariusz Sosnowski 			 * MPESW device detected. Only one matching IB device is allowed,
2291*11c73de9SDariusz Sosnowski 			 * so if any matches were found previously, fail gracefully.
2292*11c73de9SDariusz Sosnowski 			 */
2293*11c73de9SDariusz Sosnowski 			if (nd) {
2294*11c73de9SDariusz Sosnowski 				DRV_LOG(ERR,
2295*11c73de9SDariusz Sosnowski 					"PCI information matches MPESW device \"%s\", "
2296*11c73de9SDariusz Sosnowski 					"but multiple matching PCI devices were found. "
2297*11c73de9SDariusz Sosnowski 					"Probing failed.",
2298*11c73de9SDariusz Sosnowski 					ibv_list[ret]->name);
2299*11c73de9SDariusz Sosnowski 				rte_errno = ENOENT;
2300*11c73de9SDariusz Sosnowski 				ret = -rte_errno;
2301*11c73de9SDariusz Sosnowski 				goto exit;
2302*11c73de9SDariusz Sosnowski 			}
2303*11c73de9SDariusz Sosnowski 			DRV_LOG(INFO,
2304*11c73de9SDariusz Sosnowski 				"PCI information matches MPESW device \"%s\"",
2305*11c73de9SDariusz Sosnowski 				ibv_list[ret]->name);
2306*11c73de9SDariusz Sosnowski 			ibv_match[nd++] = ibv_list[ret];
2307*11c73de9SDariusz Sosnowski 			break;
2308*11c73de9SDariusz Sosnowski 		}
2309*11c73de9SDariusz Sosnowski 		/* Bonding or MPESW device was not found. */
23104d567938SThomas Monjalon 		if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
23114d567938SThomas Monjalon 					&pci_addr))
23122eb4d010SOphir Munk 			continue;
23138fa22e1fSThomas Monjalon 		if (rte_pci_addr_cmp(&owner_pci, &pci_addr) != 0)
23142eb4d010SOphir Munk 			continue;
23152eb4d010SOphir Munk 		DRV_LOG(INFO, "PCI information matches for device \"%s\"",
23162eb4d010SOphir Munk 			ibv_list[ret]->name);
23172eb4d010SOphir Munk 		ibv_match[nd++] = ibv_list[ret];
23182eb4d010SOphir Munk 	}
23192eb4d010SOphir Munk 	ibv_match[nd] = NULL;
23202eb4d010SOphir Munk 	if (!nd) {
23212eb4d010SOphir Munk 		/* No device matches, just complain and bail out. */
23222eb4d010SOphir Munk 		DRV_LOG(WARNING,
2323f956d3d4SRongwei Liu 			"PF %u doesn't have Verbs device matches PCI device " PCI_PRI_FMT ","
23242eb4d010SOphir Munk 			" are kernel drivers loaded?",
2325f956d3d4SRongwei Liu 			owner_id, owner_pci.domain, owner_pci.bus,
2326f926cce3SXueming Li 			owner_pci.devid, owner_pci.function);
23272eb4d010SOphir Munk 		rte_errno = ENOENT;
23282eb4d010SOphir Munk 		ret = -rte_errno;
23292eb4d010SOphir Munk 		goto exit;
23302eb4d010SOphir Munk 	}
23312eb4d010SOphir Munk 	if (nd == 1) {
23322eb4d010SOphir Munk 		/*
23332eb4d010SOphir Munk 		 * Found single matching device may have multiple ports.
23342eb4d010SOphir Munk 		 * Each port may be representor, we have to check the port
23352eb4d010SOphir Munk 		 * number and check the representors existence.
23362eb4d010SOphir Munk 		 */
23372eb4d010SOphir Munk 		if (nl_rdma >= 0)
23382eb4d010SOphir Munk 			np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
23392eb4d010SOphir Munk 		if (!np)
2340887183efSMichael Baum 			DRV_LOG(WARNING,
2341887183efSMichael Baum 				"Cannot get IB device \"%s\" ports number.",
2342887183efSMichael Baum 				ibv_match[0]->name);
23432eb4d010SOphir Munk 		if (bd >= 0 && !np) {
2344887183efSMichael Baum 			DRV_LOG(ERR, "Cannot get ports for bonding device.");
23452eb4d010SOphir Munk 			rte_errno = ENOENT;
23462eb4d010SOphir Munk 			ret = -rte_errno;
23472eb4d010SOphir Munk 			goto exit;
23482eb4d010SOphir Munk 		}
2349*11c73de9SDariusz Sosnowski 		if (mpesw >= 0 && !np) {
2350*11c73de9SDariusz Sosnowski 			DRV_LOG(ERR, "Cannot get ports for MPESW device.");
2351*11c73de9SDariusz Sosnowski 			rte_errno = ENOENT;
2352*11c73de9SDariusz Sosnowski 			ret = -rte_errno;
2353*11c73de9SDariusz Sosnowski 			goto exit;
2354*11c73de9SDariusz Sosnowski 		}
23552eb4d010SOphir Munk 	}
2356887183efSMichael Baum 	/* Now we can determine the maximal amount of devices to be spawned. */
23572175c4dcSSuanming Mou 	list = mlx5_malloc(MLX5_MEM_ZERO,
2358887183efSMichael Baum 			   sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
23592175c4dcSSuanming Mou 			   RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
23602eb4d010SOphir Munk 	if (!list) {
2361887183efSMichael Baum 		DRV_LOG(ERR, "Spawn data array allocation failure.");
23622eb4d010SOphir Munk 		rte_errno = ENOMEM;
23632eb4d010SOphir Munk 		ret = -rte_errno;
23642eb4d010SOphir Munk 		goto exit;
23652eb4d010SOphir Munk 	}
2366*11c73de9SDariusz Sosnowski 	if (bd >= 0 || mpesw >= 0 || np > 1) {
23672eb4d010SOphir Munk 		/*
23682eb4d010SOphir Munk 		 * Single IB device with multiple ports found,
23692eb4d010SOphir Munk 		 * it may be E-Switch master device and representors.
23702eb4d010SOphir Munk 		 * We have to perform identification through the ports.
23712eb4d010SOphir Munk 		 */
23722eb4d010SOphir Munk 		MLX5_ASSERT(nl_rdma >= 0);
23732eb4d010SOphir Munk 		MLX5_ASSERT(ns == 0);
23742eb4d010SOphir Munk 		MLX5_ASSERT(nd == 1);
23752eb4d010SOphir Munk 		MLX5_ASSERT(np);
23762eb4d010SOphir Munk 		for (i = 1; i <= np; ++i) {
2377f5f4c482SXueming Li 			list[ns].bond_info = &bond_info;
23782eb4d010SOphir Munk 			list[ns].max_port = np;
2379834a9019SOphir Munk 			list[ns].phys_port = i;
2380887183efSMichael Baum 			list[ns].phys_dev_name = ibv_match[0]->name;
23812eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
23822eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
23837af08c8fSMichael Baum 			list[ns].cdev = cdev;
23842eb4d010SOphir Munk 			list[ns].pf_bond = bd;
2385*11c73de9SDariusz Sosnowski 			list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
2386887183efSMichael Baum 			list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2387887183efSMichael Baum 							   ibv_match[0]->name,
2388887183efSMichael Baum 							   i);
23892eb4d010SOphir Munk 			if (!list[ns].ifindex) {
23902eb4d010SOphir Munk 				/*
23912eb4d010SOphir Munk 				 * No network interface index found for the
23922eb4d010SOphir Munk 				 * specified port, it means there is no
23932eb4d010SOphir Munk 				 * representor on this port. It's OK,
23942eb4d010SOphir Munk 				 * there can be disabled ports, for example
23952eb4d010SOphir Munk 				 * if sriov_numvfs < sriov_totalvfs.
23962eb4d010SOphir Munk 				 */
23972eb4d010SOphir Munk 				continue;
23982eb4d010SOphir Munk 			}
23992eb4d010SOphir Munk 			ret = -1;
24002eb4d010SOphir Munk 			if (nl_route >= 0)
2401887183efSMichael Baum 				ret = mlx5_nl_switch_info(nl_route,
24022eb4d010SOphir Munk 							  list[ns].ifindex,
24032eb4d010SOphir Munk 							  &list[ns].info);
24042eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
24052eb4d010SOphir Munk 				    !list[ns].info.master)) {
24062eb4d010SOphir Munk 				/*
24072eb4d010SOphir Munk 				 * We failed to recognize representors with
24082eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
24092eb4d010SOphir Munk 				 * with sysfs.
24102eb4d010SOphir Munk 				 */
2411887183efSMichael Baum 				ret = mlx5_sysfs_switch_info(list[ns].ifindex,
24122eb4d010SOphir Munk 							     &list[ns].info);
24132eb4d010SOphir Munk 			}
24142eb4d010SOphir Munk 			if (!ret && bd >= 0) {
24152eb4d010SOphir Munk 				switch (list[ns].info.name_type) {
24162eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
24179f430dd7SViacheslav Ovsiienko 					if (np == 1) {
24189f430dd7SViacheslav Ovsiienko 						/*
24199f430dd7SViacheslav Ovsiienko 						 * Force standalone bonding
24209f430dd7SViacheslav Ovsiienko 						 * device for ROCE LAG
24217be78d02SJosh Soref 						 * configurations.
24229f430dd7SViacheslav Ovsiienko 						 */
24239f430dd7SViacheslav Ovsiienko 						list[ns].info.master = 0;
24249f430dd7SViacheslav Ovsiienko 						list[ns].info.representor = 0;
24259f430dd7SViacheslav Ovsiienko 					}
24262eb4d010SOphir Munk 					if (list[ns].info.port_name == bd)
24272eb4d010SOphir Munk 						ns++;
24282eb4d010SOphir Munk 					break;
2429420bbdaeSViacheslav Ovsiienko 				case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2430420bbdaeSViacheslav Ovsiienko 					/* Fallthrough */
24312eb4d010SOphir Munk 				case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2432cb95feefSXueming Li 					/* Fallthrough */
2433cb95feefSXueming Li 				case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
24342eb4d010SOphir Munk 					if (list[ns].info.pf_num == bd)
24352eb4d010SOphir Munk 						ns++;
24362eb4d010SOphir Munk 					break;
24372eb4d010SOphir Munk 				default:
24382eb4d010SOphir Munk 					break;
24392eb4d010SOphir Munk 				}
24402eb4d010SOphir Munk 				continue;
24412eb4d010SOphir Munk 			}
2442*11c73de9SDariusz Sosnowski 			if (!ret && mpesw >= 0) {
2443*11c73de9SDariusz Sosnowski 				switch (list[ns].info.name_type) {
2444*11c73de9SDariusz Sosnowski 				case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2445*11c73de9SDariusz Sosnowski 					/* Owner port is treated as master port. */
2446*11c73de9SDariusz Sosnowski 					if (list[ns].info.port_name == mpesw) {
2447*11c73de9SDariusz Sosnowski 						list[ns].info.master = 1;
2448*11c73de9SDariusz Sosnowski 						list[ns].info.representor = 0;
2449*11c73de9SDariusz Sosnowski 					} else {
2450*11c73de9SDariusz Sosnowski 						list[ns].info.master = 0;
2451*11c73de9SDariusz Sosnowski 						list[ns].info.representor = 1;
2452*11c73de9SDariusz Sosnowski 					}
2453*11c73de9SDariusz Sosnowski 					/*
2454*11c73de9SDariusz Sosnowski 					 * Ports of this type have uplink port index
2455*11c73de9SDariusz Sosnowski 					 * encoded in the name. This index is also a PF index.
2456*11c73de9SDariusz Sosnowski 					 */
2457*11c73de9SDariusz Sosnowski 					list[ns].info.pf_num = list[ns].info.port_name;
2458*11c73de9SDariusz Sosnowski 					list[ns].mpesw_port = list[ns].info.port_name;
2459*11c73de9SDariusz Sosnowski 					list[ns].info.mpesw_owner = mpesw;
2460*11c73de9SDariusz Sosnowski 					ns++;
2461*11c73de9SDariusz Sosnowski 					break;
2462*11c73de9SDariusz Sosnowski 				case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2463*11c73de9SDariusz Sosnowski 				case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2464*11c73de9SDariusz Sosnowski 				case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2465*11c73de9SDariusz Sosnowski 					/* Only spawn representors related to the probed PF. */
2466*11c73de9SDariusz Sosnowski 					if (list[ns].info.pf_num == owner_id) {
2467*11c73de9SDariusz Sosnowski 						/*
2468*11c73de9SDariusz Sosnowski 						 * Ports of this type have PF index encoded in name,
2469*11c73de9SDariusz Sosnowski 						 * which translate to the related uplink port index.
2470*11c73de9SDariusz Sosnowski 						 */
2471*11c73de9SDariusz Sosnowski 						list[ns].mpesw_port = list[ns].info.pf_num;
2472*11c73de9SDariusz Sosnowski 						/* MPESW owner is also saved but not used now. */
2473*11c73de9SDariusz Sosnowski 						list[ns].info.mpesw_owner = mpesw;
2474*11c73de9SDariusz Sosnowski 						ns++;
2475*11c73de9SDariusz Sosnowski 					}
2476*11c73de9SDariusz Sosnowski 					break;
2477*11c73de9SDariusz Sosnowski 				default:
2478*11c73de9SDariusz Sosnowski 					break;
2479*11c73de9SDariusz Sosnowski 				}
2480*11c73de9SDariusz Sosnowski 				continue;
2481*11c73de9SDariusz Sosnowski 			}
24822eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
24832eb4d010SOphir Munk 				     list[ns].info.master))
24842eb4d010SOphir Munk 				ns++;
24852eb4d010SOphir Munk 		}
24862eb4d010SOphir Munk 		if (!ns) {
24872eb4d010SOphir Munk 			DRV_LOG(ERR,
2488887183efSMichael Baum 				"Unable to recognize master/representors on the IB device with multiple ports.");
24892eb4d010SOphir Munk 			rte_errno = ENOENT;
24902eb4d010SOphir Munk 			ret = -rte_errno;
24912eb4d010SOphir Munk 			goto exit;
24922eb4d010SOphir Munk 		}
24932eb4d010SOphir Munk 	} else {
24942eb4d010SOphir Munk 		/*
24952eb4d010SOphir Munk 		 * The existence of several matching entries (nd > 1) means
24962eb4d010SOphir Munk 		 * port representors have been instantiated. No existing Verbs
24972eb4d010SOphir Munk 		 * call nor sysfs entries can tell them apart, this can only
24982eb4d010SOphir Munk 		 * be done through Netlink calls assuming kernel drivers are
24992eb4d010SOphir Munk 		 * recent enough to support them.
25002eb4d010SOphir Munk 		 *
25012eb4d010SOphir Munk 		 * In the event of identification failure through Netlink,
25022eb4d010SOphir Munk 		 * try again through sysfs, then:
25032eb4d010SOphir Munk 		 *
25042eb4d010SOphir Munk 		 * 1. A single IB device matches (nd == 1) with single
25052eb4d010SOphir Munk 		 *    port (np=0/1) and is not a representor, assume
25062eb4d010SOphir Munk 		 *    no switch support.
25072eb4d010SOphir Munk 		 *
25082eb4d010SOphir Munk 		 * 2. Otherwise no safe assumptions can be made;
25092eb4d010SOphir Munk 		 *    complain louder and bail out.
25102eb4d010SOphir Munk 		 */
25112eb4d010SOphir Munk 		for (i = 0; i != nd; ++i) {
25122eb4d010SOphir Munk 			memset(&list[ns].info, 0, sizeof(list[ns].info));
2513f5f4c482SXueming Li 			list[ns].bond_info = NULL;
25142eb4d010SOphir Munk 			list[ns].max_port = 1;
2515834a9019SOphir Munk 			list[ns].phys_port = 1;
2516887183efSMichael Baum 			list[ns].phys_dev_name = ibv_match[i]->name;
25172eb4d010SOphir Munk 			list[ns].eth_dev = NULL;
25182eb4d010SOphir Munk 			list[ns].pci_dev = pci_dev;
25197af08c8fSMichael Baum 			list[ns].cdev = cdev;
25202eb4d010SOphir Munk 			list[ns].pf_bond = -1;
2521*11c73de9SDariusz Sosnowski 			list[ns].mpesw_port = MLX5_MPESW_PORT_INVALID;
25222eb4d010SOphir Munk 			list[ns].ifindex = 0;
25232eb4d010SOphir Munk 			if (nl_rdma >= 0)
25242eb4d010SOphir Munk 				list[ns].ifindex = mlx5_nl_ifindex
2525834a9019SOphir Munk 							    (nl_rdma,
2526887183efSMichael Baum 							     ibv_match[i]->name,
2527887183efSMichael Baum 							     1);
25282eb4d010SOphir Munk 			if (!list[ns].ifindex) {
25292eb4d010SOphir Munk 				char ifname[IF_NAMESIZE];
25302eb4d010SOphir Munk 
25312eb4d010SOphir Munk 				/*
25322eb4d010SOphir Munk 				 * Netlink failed, it may happen with old
25332eb4d010SOphir Munk 				 * ib_core kernel driver (before 4.16).
25342eb4d010SOphir Munk 				 * We can assume there is old driver because
25352eb4d010SOphir Munk 				 * here we are processing single ports IB
25362eb4d010SOphir Munk 				 * devices. Let's try sysfs to retrieve
25372eb4d010SOphir Munk 				 * the ifindex. The method works for
25382eb4d010SOphir Munk 				 * master device only.
25392eb4d010SOphir Munk 				 */
25402eb4d010SOphir Munk 				if (nd > 1) {
25412eb4d010SOphir Munk 					/*
25422eb4d010SOphir Munk 					 * Multiple devices found, assume
25432eb4d010SOphir Munk 					 * representors, can not distinguish
25442eb4d010SOphir Munk 					 * master/representor and retrieve
25452eb4d010SOphir Munk 					 * ifindex via sysfs.
25462eb4d010SOphir Munk 					 */
25472eb4d010SOphir Munk 					continue;
25482eb4d010SOphir Munk 				}
2549aec086c9SMatan Azrad 				ret = mlx5_get_ifname_sysfs
2550aec086c9SMatan Azrad 					(ibv_match[i]->ibdev_path, ifname);
25512eb4d010SOphir Munk 				if (!ret)
25522eb4d010SOphir Munk 					list[ns].ifindex =
25532eb4d010SOphir Munk 						if_nametoindex(ifname);
25542eb4d010SOphir Munk 				if (!list[ns].ifindex) {
25552eb4d010SOphir Munk 					/*
25562eb4d010SOphir Munk 					 * No network interface index found
25572eb4d010SOphir Munk 					 * for the specified device, it means
25582eb4d010SOphir Munk 					 * there it is neither representor
25592eb4d010SOphir Munk 					 * nor master.
25602eb4d010SOphir Munk 					 */
25612eb4d010SOphir Munk 					continue;
25622eb4d010SOphir Munk 				}
25632eb4d010SOphir Munk 			}
25642eb4d010SOphir Munk 			ret = -1;
25652eb4d010SOphir Munk 			if (nl_route >= 0)
2566ca1418ceSMichael Baum 				ret = mlx5_nl_switch_info(nl_route,
25672eb4d010SOphir Munk 							  list[ns].ifindex,
25682eb4d010SOphir Munk 							  &list[ns].info);
25692eb4d010SOphir Munk 			if (ret || (!list[ns].info.representor &&
25702eb4d010SOphir Munk 				    !list[ns].info.master)) {
25712eb4d010SOphir Munk 				/*
25722eb4d010SOphir Munk 				 * We failed to recognize representors with
25732eb4d010SOphir Munk 				 * Netlink, let's try to perform the task
25742eb4d010SOphir Munk 				 * with sysfs.
25752eb4d010SOphir Munk 				 */
2576887183efSMichael Baum 				ret = mlx5_sysfs_switch_info(list[ns].ifindex,
25772eb4d010SOphir Munk 							     &list[ns].info);
25782eb4d010SOphir Munk 			}
25792eb4d010SOphir Munk 			if (!ret && (list[ns].info.representor ^
25802eb4d010SOphir Munk 				     list[ns].info.master)) {
25812eb4d010SOphir Munk 				ns++;
25822eb4d010SOphir Munk 			} else if ((nd == 1) &&
25832eb4d010SOphir Munk 				   !list[ns].info.representor &&
25842eb4d010SOphir Munk 				   !list[ns].info.master) {
25852eb4d010SOphir Munk 				/*
2586887183efSMichael Baum 				 * Single IB device with one physical port and
25872eb4d010SOphir Munk 				 * attached network device.
2588887183efSMichael Baum 				 * May be SRIOV is not enabled or there is no
2589887183efSMichael Baum 				 * representors.
25902eb4d010SOphir Munk 				 */
2591887183efSMichael Baum 				DRV_LOG(INFO, "No E-Switch support detected.");
25922eb4d010SOphir Munk 				ns++;
25932eb4d010SOphir Munk 				break;
25942eb4d010SOphir Munk 			}
25952eb4d010SOphir Munk 		}
25962eb4d010SOphir Munk 		if (!ns) {
25972eb4d010SOphir Munk 			DRV_LOG(ERR,
2598887183efSMichael Baum 				"Unable to recognize master/representors on the multiple IB devices.");
25992eb4d010SOphir Munk 			rte_errno = ENOENT;
26002eb4d010SOphir Munk 			ret = -rte_errno;
26012eb4d010SOphir Munk 			goto exit;
26022eb4d010SOphir Munk 		}
26036b157f3bSViacheslav Ovsiienko 		/*
26046b157f3bSViacheslav Ovsiienko 		 * New kernels may add the switch_id attribute for the case
2605ca1418ceSMichael Baum 		 * there is no E-Switch and we wrongly recognized the only
2606ca1418ceSMichael Baum 		 * device as master. Override this if there is the single
2607ca1418ceSMichael Baum 		 * device with single port and new device name format present.
26086b157f3bSViacheslav Ovsiienko 		 */
26096b157f3bSViacheslav Ovsiienko 		if (nd == 1 &&
26106b157f3bSViacheslav Ovsiienko 		    list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
26116b157f3bSViacheslav Ovsiienko 			list[0].info.master = 0;
26126b157f3bSViacheslav Ovsiienko 			list[0].info.representor = 0;
26136b157f3bSViacheslav Ovsiienko 		}
26142eb4d010SOphir Munk 	}
26152eb4d010SOphir Munk 	MLX5_ASSERT(ns);
26162eb4d010SOphir Munk 	/*
26172eb4d010SOphir Munk 	 * Sort list to probe devices in natural order for users convenience
26182eb4d010SOphir Munk 	 * (i.e. master first, then representors from lowest to highest ID).
26192eb4d010SOphir Munk 	 */
26202eb4d010SOphir Munk 	qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2621f926cce3SXueming Li 	if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2622f926cce3SXueming Li 		/* Set devargs default values. */
2623f926cce3SXueming Li 		if (eth_da.nb_mh_controllers == 0) {
2624f926cce3SXueming Li 			eth_da.nb_mh_controllers = 1;
2625f926cce3SXueming Li 			eth_da.mh_controllers[0] = 0;
2626f926cce3SXueming Li 		}
2627f926cce3SXueming Li 		if (eth_da.nb_ports == 0 && ns > 0) {
2628f926cce3SXueming Li 			if (list[0].pf_bond >= 0 && list[0].info.representor)
2629f926cce3SXueming Li 				DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2630f926cce3SXueming Li 					pci_dev->device.devargs->args);
2631f926cce3SXueming Li 			eth_da.nb_ports = 1;
2632f926cce3SXueming Li 			eth_da.ports[0] = list[0].info.pf_num;
2633f926cce3SXueming Li 		}
2634f926cce3SXueming Li 		if (eth_da.nb_representor_ports == 0) {
2635f926cce3SXueming Li 			eth_da.nb_representor_ports = 1;
2636f926cce3SXueming Li 			eth_da.representor_ports[0] = 0;
2637f926cce3SXueming Li 		}
2638f926cce3SXueming Li 	}
26392eb4d010SOphir Munk 	for (i = 0; i != ns; ++i) {
26402eb4d010SOphir Munk 		uint32_t restore;
26412eb4d010SOphir Munk 
2642a729d2f0SMichael Baum 		list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i], &eth_da,
2643a729d2f0SMichael Baum 						 mkvlist);
26442eb4d010SOphir Munk 		if (!list[i].eth_dev) {
26452eb4d010SOphir Munk 			if (rte_errno != EBUSY && rte_errno != EEXIST)
26462eb4d010SOphir Munk 				break;
26472eb4d010SOphir Munk 			/* Device is disabled or already spawned. Ignore it. */
26482eb4d010SOphir Munk 			continue;
26492eb4d010SOphir Munk 		}
26502eb4d010SOphir Munk 		restore = list[i].eth_dev->data->dev_flags;
26512eb4d010SOphir Munk 		rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2652494d6863SGregory Etelson 		/**
2653494d6863SGregory Etelson 		 * Each representor has a dedicated interrupts vector.
2654494d6863SGregory Etelson 		 * rte_eth_copy_pci_info() assigns PF interrupts handle to
2655494d6863SGregory Etelson 		 * representor eth_dev object because representor and PF
2656494d6863SGregory Etelson 		 * share the same PCI address.
2657494d6863SGregory Etelson 		 * Override representor device with a dedicated
2658494d6863SGregory Etelson 		 * interrupts handle here.
2659494d6863SGregory Etelson 		 * Representor interrupts handle is released in mlx5_dev_stop().
2660494d6863SGregory Etelson 		 */
2661494d6863SGregory Etelson 		if (list[i].info.representor) {
2662d61138d4SHarman Kalra 			struct rte_intr_handle *intr_handle =
2663d61138d4SHarman Kalra 				rte_intr_instance_alloc(RTE_INTR_INSTANCE_F_SHARED);
2664d61138d4SHarman Kalra 			if (intr_handle == NULL) {
2665494d6863SGregory Etelson 				DRV_LOG(ERR,
2666494d6863SGregory Etelson 					"port %u failed to allocate memory for interrupt handler "
2667494d6863SGregory Etelson 					"Rx interrupts will not be supported",
2668494d6863SGregory Etelson 					i);
2669494d6863SGregory Etelson 				rte_errno = ENOMEM;
2670494d6863SGregory Etelson 				ret = -rte_errno;
2671494d6863SGregory Etelson 				goto exit;
2672494d6863SGregory Etelson 			}
2673494d6863SGregory Etelson 			list[i].eth_dev->intr_handle = intr_handle;
2674494d6863SGregory Etelson 		}
26752eb4d010SOphir Munk 		/* Restore non-PCI flags cleared by the above call. */
26762eb4d010SOphir Munk 		list[i].eth_dev->data->dev_flags |= restore;
26772eb4d010SOphir Munk 		rte_eth_dev_probing_finish(list[i].eth_dev);
26782eb4d010SOphir Munk 	}
26792eb4d010SOphir Munk 	if (i != ns) {
26802eb4d010SOphir Munk 		DRV_LOG(ERR,
26812eb4d010SOphir Munk 			"probe of PCI device " PCI_PRI_FMT " aborted after"
26822eb4d010SOphir Munk 			" encountering an error: %s",
2683f926cce3SXueming Li 			owner_pci.domain, owner_pci.bus,
2684f926cce3SXueming Li 			owner_pci.devid, owner_pci.function,
26852eb4d010SOphir Munk 			strerror(rte_errno));
26862eb4d010SOphir Munk 		ret = -rte_errno;
26872eb4d010SOphir Munk 		/* Roll back. */
26882eb4d010SOphir Munk 		while (i--) {
26892eb4d010SOphir Munk 			if (!list[i].eth_dev)
26902eb4d010SOphir Munk 				continue;
26912eb4d010SOphir Munk 			mlx5_dev_close(list[i].eth_dev);
26922eb4d010SOphir Munk 			/* mac_addrs must not be freed because in dev_private */
26932eb4d010SOphir Munk 			list[i].eth_dev->data->mac_addrs = NULL;
26942eb4d010SOphir Munk 			claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
26952eb4d010SOphir Munk 		}
26962eb4d010SOphir Munk 		/* Restore original error. */
26972eb4d010SOphir Munk 		rte_errno = -ret;
26982eb4d010SOphir Munk 	} else {
26992eb4d010SOphir Munk 		ret = 0;
27002eb4d010SOphir Munk 	}
27012eb4d010SOphir Munk exit:
27022eb4d010SOphir Munk 	/*
27032eb4d010SOphir Munk 	 * Do the routine cleanup:
27042eb4d010SOphir Munk 	 * - close opened Netlink sockets
27052eb4d010SOphir Munk 	 * - free allocated spawn data array
27062eb4d010SOphir Munk 	 * - free the Infiniband device list
27072eb4d010SOphir Munk 	 */
27082eb4d010SOphir Munk 	if (nl_rdma >= 0)
27092eb4d010SOphir Munk 		close(nl_rdma);
27102eb4d010SOphir Munk 	if (nl_route >= 0)
27112eb4d010SOphir Munk 		close(nl_route);
27122eb4d010SOphir Munk 	if (list)
27132175c4dcSSuanming Mou 		mlx5_free(list);
27142eb4d010SOphir Munk 	MLX5_ASSERT(ibv_list);
27152eb4d010SOphir Munk 	mlx5_glue->free_device_list(ibv_list);
27162eb4d010SOphir Munk 	return ret;
27172eb4d010SOphir Munk }
27182eb4d010SOphir Munk 
2719919488fbSXueming Li static int
2720919488fbSXueming Li mlx5_os_parse_eth_devargs(struct rte_device *dev,
2721919488fbSXueming Li 			  struct rte_eth_devargs *eth_da)
2722919488fbSXueming Li {
2723919488fbSXueming Li 	int ret = 0;
2724919488fbSXueming Li 
2725919488fbSXueming Li 	if (dev->devargs == NULL)
2726919488fbSXueming Li 		return 0;
2727919488fbSXueming Li 	memset(eth_da, 0, sizeof(*eth_da));
2728919488fbSXueming Li 	/* Parse representor information first from class argument. */
2729919488fbSXueming Li 	if (dev->devargs->cls_str)
2730919488fbSXueming Li 		ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2731919488fbSXueming Li 	if (ret != 0) {
2732919488fbSXueming Li 		DRV_LOG(ERR, "failed to parse device arguments: %s",
2733919488fbSXueming Li 			dev->devargs->cls_str);
2734919488fbSXueming Li 		return -rte_errno;
2735919488fbSXueming Li 	}
2736c2e3b84eSMichael Baum 	if (eth_da->type == RTE_ETH_REPRESENTOR_NONE && dev->devargs->args) {
2737919488fbSXueming Li 		/* Parse legacy device argument */
2738919488fbSXueming Li 		ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2739919488fbSXueming Li 		if (ret) {
2740919488fbSXueming Li 			DRV_LOG(ERR, "failed to parse device arguments: %s",
2741919488fbSXueming Li 				dev->devargs->args);
2742919488fbSXueming Li 			return -rte_errno;
2743919488fbSXueming Li 		}
2744919488fbSXueming Li 	}
2745919488fbSXueming Li 	return 0;
2746919488fbSXueming Li }
2747919488fbSXueming Li 
274808c2772fSXueming Li /**
2749a7f34989SXueming Li  * Callback to register a PCI device.
275008c2772fSXueming Li  *
275108c2772fSXueming Li  * This function spawns Ethernet devices out of a given PCI device.
275208c2772fSXueming Li  *
27537af08c8fSMichael Baum  * @param[in] cdev
27547af08c8fSMichael Baum  *   Pointer to common mlx5 device structure.
2755a729d2f0SMichael Baum  * @param[in, out] mkvlist
2756a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
275708c2772fSXueming Li  *
275808c2772fSXueming Li  * @return
275908c2772fSXueming Li  *   0 on success, a negative errno value otherwise and rte_errno is set.
276008c2772fSXueming Li  */
2761a7f34989SXueming Li static int
2762a729d2f0SMichael Baum mlx5_os_pci_probe(struct mlx5_common_device *cdev,
2763a729d2f0SMichael Baum 		  struct mlx5_kvargs_ctrl *mkvlist)
276408c2772fSXueming Li {
27657af08c8fSMichael Baum 	struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2766919488fbSXueming Li 	struct rte_eth_devargs eth_da = { .nb_ports = 0 };
276708c2772fSXueming Li 	int ret = 0;
276808c2772fSXueming Li 	uint16_t p;
276908c2772fSXueming Li 
27707af08c8fSMichael Baum 	ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2771919488fbSXueming Li 	if (ret != 0)
2772919488fbSXueming Li 		return ret;
277308c2772fSXueming Li 
277408c2772fSXueming Li 	if (eth_da.nb_ports > 0) {
277508c2772fSXueming Li 		/* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
27766856efa5SMichael Baum 		for (p = 0; p < eth_da.nb_ports; p++) {
2777ca1418ceSMichael Baum 			ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2778a729d2f0SMichael Baum 						   eth_da.ports[p], mkvlist);
27796856efa5SMichael Baum 			if (ret) {
2780f956d3d4SRongwei Liu 				DRV_LOG(INFO, "Probe of PCI device " PCI_PRI_FMT " "
2781f956d3d4SRongwei Liu 					"aborted due to proding failure of PF %u",
27826856efa5SMichael Baum 					pci_dev->addr.domain, pci_dev->addr.bus,
27836856efa5SMichael Baum 					pci_dev->addr.devid, pci_dev->addr.function,
27846856efa5SMichael Baum 					eth_da.ports[p]);
27857af08c8fSMichael Baum 				mlx5_net_remove(cdev);
2786f956d3d4SRongwei Liu 				if (p != 0)
2787f956d3d4SRongwei Liu 					break;
2788f956d3d4SRongwei Liu 			}
27896856efa5SMichael Baum 		}
279008c2772fSXueming Li 	} else {
2791a729d2f0SMichael Baum 		ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0, mkvlist);
279208c2772fSXueming Li 	}
279308c2772fSXueming Li 	return ret;
279408c2772fSXueming Li }
279508c2772fSXueming Li 
2796919488fbSXueming Li /* Probe a single SF device on auxiliary bus, no representor support. */
2797919488fbSXueming Li static int
2798a729d2f0SMichael Baum mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev,
2799a729d2f0SMichael Baum 			struct mlx5_kvargs_ctrl *mkvlist)
2800919488fbSXueming Li {
2801919488fbSXueming Li 	struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2802*11c73de9SDariusz Sosnowski 	struct mlx5_dev_spawn_data spawn = {
2803*11c73de9SDariusz Sosnowski 		.pf_bond = -1,
2804*11c73de9SDariusz Sosnowski 		.mpesw_port = MLX5_MPESW_PORT_INVALID,
2805*11c73de9SDariusz Sosnowski 	};
28067af08c8fSMichael Baum 	struct rte_device *dev = cdev->dev;
2807919488fbSXueming Li 	struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2808919488fbSXueming Li 	struct rte_eth_dev *eth_dev;
2809919488fbSXueming Li 	int ret = 0;
2810919488fbSXueming Li 
2811919488fbSXueming Li 	/* Parse ethdev devargs. */
2812919488fbSXueming Li 	ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2813919488fbSXueming Li 	if (ret != 0)
2814919488fbSXueming Li 		return ret;
2815919488fbSXueming Li 	/* Init spawn data. */
2816919488fbSXueming Li 	spawn.max_port = 1;
2817919488fbSXueming Li 	spawn.phys_port = 1;
2818ca1418ceSMichael Baum 	spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2819919488fbSXueming Li 	ret = mlx5_auxiliary_get_ifindex(dev->name);
2820919488fbSXueming Li 	if (ret < 0) {
2821919488fbSXueming Li 		DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2822919488fbSXueming Li 		return ret;
2823919488fbSXueming Li 	}
2824919488fbSXueming Li 	spawn.ifindex = ret;
28257af08c8fSMichael Baum 	spawn.cdev = cdev;
2826919488fbSXueming Li 	/* Spawn device. */
2827a729d2f0SMichael Baum 	eth_dev = mlx5_dev_spawn(dev, &spawn, &eth_da, mkvlist);
2828919488fbSXueming Li 	if (eth_dev == NULL)
2829919488fbSXueming Li 		return -rte_errno;
2830919488fbSXueming Li 	/* Post create. */
2831d61138d4SHarman Kalra 	eth_dev->intr_handle = adev->intr_handle;
2832919488fbSXueming Li 	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2833919488fbSXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2834919488fbSXueming Li 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2835919488fbSXueming Li 		eth_dev->data->numa_node = dev->numa_node;
2836919488fbSXueming Li 	}
2837919488fbSXueming Li 	rte_eth_dev_probing_finish(eth_dev);
2838919488fbSXueming Li 	return 0;
2839919488fbSXueming Li }
2840919488fbSXueming Li 
2841a7f34989SXueming Li /**
2842a7f34989SXueming Li  * Net class driver callback to probe a device.
2843a7f34989SXueming Li  *
2844919488fbSXueming Li  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2845a7f34989SXueming Li  *
28467af08c8fSMichael Baum  * @param[in] cdev
28477af08c8fSMichael Baum  *   Pointer to the common mlx5 device.
2848a729d2f0SMichael Baum  * @param[in, out] mkvlist
2849a729d2f0SMichael Baum  *   Pointer to mlx5 kvargs control, can be NULL if there is no devargs.
2850a7f34989SXueming Li  *
2851a7f34989SXueming Li  * @return
28527af08c8fSMichael Baum  *   0 on success, a negative errno value otherwise and rte_errno is set.
2853a7f34989SXueming Li  */
2854a7f34989SXueming Li int
2855a729d2f0SMichael Baum mlx5_os_net_probe(struct mlx5_common_device *cdev,
2856a729d2f0SMichael Baum 		  struct mlx5_kvargs_ctrl *mkvlist)
2857a7f34989SXueming Li {
2858a7f34989SXueming Li 	int ret;
2859a7f34989SXueming Li 
2860ca1418ceSMichael Baum 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2861a7f34989SXueming Li 		mlx5_pmd_socket_init();
2862a7f34989SXueming Li 	ret = mlx5_init_once();
2863a7f34989SXueming Li 	if (ret) {
28647af08c8fSMichael Baum 		DRV_LOG(ERR, "Unable to init PMD global data: %s",
2865a7f34989SXueming Li 			strerror(rte_errno));
2866a7f34989SXueming Li 		return -rte_errno;
2867a7f34989SXueming Li 	}
2868a729d2f0SMichael Baum 	ret = mlx5_probe_again_args_validate(cdev, mkvlist);
2869a13ec19cSMichael Baum 	if (ret) {
2870a13ec19cSMichael Baum 		DRV_LOG(ERR, "Probe again parameters are not compatible : %s",
2871a13ec19cSMichael Baum 			strerror(rte_errno));
2872a13ec19cSMichael Baum 		return -rte_errno;
2873a13ec19cSMichael Baum 	}
28747af08c8fSMichael Baum 	if (mlx5_dev_is_pci(cdev->dev))
2875a729d2f0SMichael Baum 		return mlx5_os_pci_probe(cdev, mkvlist);
2876919488fbSXueming Li 	else
2877a729d2f0SMichael Baum 		return mlx5_os_auxiliary_probe(cdev, mkvlist);
28782eb4d010SOphir Munk }
28792eb4d010SOphir Munk 
28802eb4d010SOphir Munk /**
2881ea823b2cSDmitry Kozlyuk  * Cleanup resources when the last device is closed.
2882ea823b2cSDmitry Kozlyuk  */
2883ea823b2cSDmitry Kozlyuk void
2884ea823b2cSDmitry Kozlyuk mlx5_os_net_cleanup(void)
2885ea823b2cSDmitry Kozlyuk {
2886ea823b2cSDmitry Kozlyuk 	mlx5_pmd_socket_uninit();
2887ea823b2cSDmitry Kozlyuk }
2888ea823b2cSDmitry Kozlyuk 
2889ea823b2cSDmitry Kozlyuk /**
28902eb4d010SOphir Munk  * Install shared asynchronous device events handler.
28912eb4d010SOphir Munk  * This function is implemented to support event sharing
28922eb4d010SOphir Munk  * between multiple ports of single IB device.
28932eb4d010SOphir Munk  *
28942eb4d010SOphir Munk  * @param sh
28952eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
28962eb4d010SOphir Munk  */
28972eb4d010SOphir Munk void
28982eb4d010SOphir Munk mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
28992eb4d010SOphir Munk {
2900ca1418ceSMichael Baum 	struct ibv_context *ctx = sh->cdev->ctx;
290172d7efe4SSpike Du 	int nlsk_fd;
29022eb4d010SOphir Munk 
290372d7efe4SSpike Du 	sh->intr_handle = mlx5_os_interrupt_handler_create
290472d7efe4SSpike Du 		(RTE_INTR_INSTANCE_F_SHARED, true,
290572d7efe4SSpike Du 		 ctx->async_fd, mlx5_dev_interrupt_handler, sh);
290672d7efe4SSpike Du 	if (!sh->intr_handle) {
290772d7efe4SSpike Du 		DRV_LOG(ERR, "Failed to allocate intr_handle.");
2908d61138d4SHarman Kalra 		return;
2909d61138d4SHarman Kalra 	}
291072d7efe4SSpike Du 	nlsk_fd = mlx5_nl_init(NETLINK_ROUTE, RTMGRP_LINK);
291172d7efe4SSpike Du 	if (nlsk_fd < 0) {
291272d7efe4SSpike Du 		DRV_LOG(ERR, "Failed to create a socket for Netlink events: %s",
291372d7efe4SSpike Du 			rte_strerror(rte_errno));
291472d7efe4SSpike Du 		return;
29152eb4d010SOphir Munk 	}
291672d7efe4SSpike Du 	sh->intr_handle_nl = mlx5_os_interrupt_handler_create
291772d7efe4SSpike Du 		(RTE_INTR_INSTANCE_F_SHARED, true,
291872d7efe4SSpike Du 		 nlsk_fd, mlx5_dev_interrupt_handler_nl, sh);
291917f95513SDmitry Kozlyuk 	if (sh->intr_handle_nl == NULL) {
292017f95513SDmitry Kozlyuk 		DRV_LOG(ERR, "Fail to allocate intr_handle");
292117f95513SDmitry Kozlyuk 		return;
292217f95513SDmitry Kozlyuk 	}
29236dc0cbc6SMichael Baum 	if (sh->cdev->config.devx) {
29242eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
292572d7efe4SSpike Du 		struct mlx5dv_devx_cmd_comp *devx_comp;
292672d7efe4SSpike Du 
2927ca1418ceSMichael Baum 		sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
292872d7efe4SSpike Du 		devx_comp = sh->devx_comp;
292921b7c452SOphir Munk 		if (!devx_comp) {
29302eb4d010SOphir Munk 			DRV_LOG(INFO, "failed to allocate devx_comp.");
29312eb4d010SOphir Munk 			return;
29322eb4d010SOphir Munk 		}
293372d7efe4SSpike Du 		sh->intr_handle_devx = mlx5_os_interrupt_handler_create
293472d7efe4SSpike Du 			(RTE_INTR_INSTANCE_F_SHARED, true,
293572d7efe4SSpike Du 			 devx_comp->fd,
293672d7efe4SSpike Du 			 mlx5_dev_interrupt_handler_devx, sh);
293772d7efe4SSpike Du 		if (!sh->intr_handle_devx) {
293872d7efe4SSpike Du 			DRV_LOG(ERR, "Failed to allocate intr_handle.");
29392eb4d010SOphir Munk 			return;
29402eb4d010SOphir Munk 		}
29412eb4d010SOphir Munk #endif /* HAVE_IBV_DEVX_ASYNC */
29422eb4d010SOphir Munk 	}
29432eb4d010SOphir Munk }
29442eb4d010SOphir Munk 
29452eb4d010SOphir Munk /**
29462eb4d010SOphir Munk  * Uninstall shared asynchronous device events handler.
29472eb4d010SOphir Munk  * This function is implemented to support event sharing
29482eb4d010SOphir Munk  * between multiple ports of single IB device.
29492eb4d010SOphir Munk  *
29502eb4d010SOphir Munk  * @param dev
29512eb4d010SOphir Munk  *   Pointer to mlx5_dev_ctx_shared object.
29522eb4d010SOphir Munk  */
29532eb4d010SOphir Munk void
29542eb4d010SOphir Munk mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
29552eb4d010SOphir Munk {
295672d7efe4SSpike Du 	mlx5_os_interrupt_handler_destroy(sh->intr_handle,
29572eb4d010SOphir Munk 					  mlx5_dev_interrupt_handler, sh);
295872d7efe4SSpike Du 	mlx5_os_interrupt_handler_destroy(sh->intr_handle_nl,
295972d7efe4SSpike Du 					  mlx5_dev_interrupt_handler_nl, sh);
29602eb4d010SOphir Munk #ifdef HAVE_IBV_DEVX_ASYNC
296172d7efe4SSpike Du 	mlx5_os_interrupt_handler_destroy(sh->intr_handle_devx,
29622eb4d010SOphir Munk 					  mlx5_dev_interrupt_handler_devx, sh);
29632eb4d010SOphir Munk 	if (sh->devx_comp)
29642eb4d010SOphir Munk 		mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
29652eb4d010SOphir Munk #endif
29662eb4d010SOphir Munk }
2967042f5c94SOphir Munk 
296873bf9235SOphir Munk /**
296973bf9235SOphir Munk  * Read statistics by a named counter.
297073bf9235SOphir Munk  *
297173bf9235SOphir Munk  * @param[in] priv
297273bf9235SOphir Munk  *   Pointer to the private device data structure.
297373bf9235SOphir Munk  * @param[in] ctr_name
297473bf9235SOphir Munk  *   Pointer to the name of the statistic counter to read
297573bf9235SOphir Munk  * @param[out] stat
297673bf9235SOphir Munk  *   Pointer to read statistic value.
297773bf9235SOphir Munk  * @return
297873bf9235SOphir Munk  *   0 on success and stat is valud, 1 if failed to read the value
297973bf9235SOphir Munk  *   rte_errno is set.
298073bf9235SOphir Munk  *
298173bf9235SOphir Munk  */
298273bf9235SOphir Munk int
298373bf9235SOphir Munk mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
298473bf9235SOphir Munk 		      uint64_t *stat)
298573bf9235SOphir Munk {
298673bf9235SOphir Munk 	int fd;
298773bf9235SOphir Munk 
298873bf9235SOphir Munk 	if (priv->sh) {
2989e6988afdSMatan Azrad 		if (priv->q_counters != NULL &&
2990e6988afdSMatan Azrad 		    strcmp(ctr_name, "out_of_buffer") == 0)
2991978a0303SViacheslav Ovsiienko 			return mlx5_devx_cmd_queue_counter_query
2992978a0303SViacheslav Ovsiienko 					(priv->q_counters, 0, (uint32_t *)stat);
299373bf9235SOphir Munk 		MKSTR(path, "%s/ports/%d/hw_counters/%s",
299473bf9235SOphir Munk 		      priv->sh->ibdev_path,
299573bf9235SOphir Munk 		      priv->dev_port,
299673bf9235SOphir Munk 		      ctr_name);
299773bf9235SOphir Munk 		fd = open(path, O_RDONLY);
2998038e7fc0SShy Shyman 		/*
2999038e7fc0SShy Shyman 		 * in switchdev the file location is not per port
3000038e7fc0SShy Shyman 		 * but rather in <ibdev_path>/hw_counters/<file_name>.
3001038e7fc0SShy Shyman 		 */
3002038e7fc0SShy Shyman 		if (fd == -1) {
3003038e7fc0SShy Shyman 			MKSTR(path1, "%s/hw_counters/%s",
3004038e7fc0SShy Shyman 			      priv->sh->ibdev_path,
3005038e7fc0SShy Shyman 			      ctr_name);
3006038e7fc0SShy Shyman 			fd = open(path1, O_RDONLY);
3007038e7fc0SShy Shyman 		}
300873bf9235SOphir Munk 		if (fd != -1) {
300973bf9235SOphir Munk 			char buf[21] = {'\0'};
301073bf9235SOphir Munk 			ssize_t n = read(fd, buf, sizeof(buf));
301173bf9235SOphir Munk 
301273bf9235SOphir Munk 			close(fd);
301373bf9235SOphir Munk 			if (n != -1) {
301473bf9235SOphir Munk 				*stat = strtoull(buf, NULL, 10);
301573bf9235SOphir Munk 				return 0;
301673bf9235SOphir Munk 			}
301773bf9235SOphir Munk 		}
301873bf9235SOphir Munk 	}
301973bf9235SOphir Munk 	*stat = 0;
302073bf9235SOphir Munk 	return 1;
302173bf9235SOphir Munk }
302273bf9235SOphir Munk 
302373bf9235SOphir Munk /**
3024ab27cdd9SOphir Munk  * Remove a MAC address from device
3025ab27cdd9SOphir Munk  *
3026ab27cdd9SOphir Munk  * @param dev
3027ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
3028ab27cdd9SOphir Munk  * @param index
3029ab27cdd9SOphir Munk  *   MAC address index.
3030ab27cdd9SOphir Munk  */
3031ab27cdd9SOphir Munk void
3032ab27cdd9SOphir Munk mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
3033ab27cdd9SOphir Munk {
3034ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
303587af0d1eSMichael Baum 	const int vf = priv->sh->dev_cap.vf;
3036ab27cdd9SOphir Munk 
3037ab27cdd9SOphir Munk 	if (vf)
3038ab27cdd9SOphir Munk 		mlx5_nl_mac_addr_remove(priv->nl_socket_route,
3039ab27cdd9SOphir Munk 					mlx5_ifindex(dev), priv->mac_own,
3040ab27cdd9SOphir Munk 					&dev->data->mac_addrs[index], index);
3041ab27cdd9SOphir Munk }
3042ab27cdd9SOphir Munk 
3043ab27cdd9SOphir Munk /**
3044ab27cdd9SOphir Munk  * Adds a MAC address to the device
3045ab27cdd9SOphir Munk  *
3046ab27cdd9SOphir Munk  * @param dev
3047ab27cdd9SOphir Munk  *   Pointer to Ethernet device structure.
3048ab27cdd9SOphir Munk  * @param mac_addr
3049ab27cdd9SOphir Munk  *   MAC address to register.
3050ab27cdd9SOphir Munk  * @param index
3051ab27cdd9SOphir Munk  *   MAC address index.
3052ab27cdd9SOphir Munk  *
3053ab27cdd9SOphir Munk  * @return
3054ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
3055ab27cdd9SOphir Munk  */
3056ab27cdd9SOphir Munk int
3057ab27cdd9SOphir Munk mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
3058ab27cdd9SOphir Munk 		     uint32_t index)
3059ab27cdd9SOphir Munk {
3060ab27cdd9SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
306187af0d1eSMichael Baum 	const int vf = priv->sh->dev_cap.vf;
3062ab27cdd9SOphir Munk 	int ret = 0;
3063ab27cdd9SOphir Munk 
3064ab27cdd9SOphir Munk 	if (vf)
3065ab27cdd9SOphir Munk 		ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
3066ab27cdd9SOphir Munk 					   mlx5_ifindex(dev), priv->mac_own,
3067ab27cdd9SOphir Munk 					   mac, index);
3068ab27cdd9SOphir Munk 	return ret;
3069ab27cdd9SOphir Munk }
3070ab27cdd9SOphir Munk 
3071ab27cdd9SOphir Munk /**
3072ab27cdd9SOphir Munk  * Modify a VF MAC address
3073ab27cdd9SOphir Munk  *
3074ab27cdd9SOphir Munk  * @param priv
3075ab27cdd9SOphir Munk  *   Pointer to device private data.
3076ab27cdd9SOphir Munk  * @param mac_addr
3077ab27cdd9SOphir Munk  *   MAC address to modify into.
3078ab27cdd9SOphir Munk  * @param iface_idx
3079ab27cdd9SOphir Munk  *   Net device interface index
3080ab27cdd9SOphir Munk  * @param vf_index
3081ab27cdd9SOphir Munk  *   VF index
3082ab27cdd9SOphir Munk  *
3083ab27cdd9SOphir Munk  * @return
3084ab27cdd9SOphir Munk  *   0 on success, a negative errno value otherwise
3085ab27cdd9SOphir Munk  */
3086ab27cdd9SOphir Munk int
3087ab27cdd9SOphir Munk mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3088ab27cdd9SOphir Munk 			   unsigned int iface_idx,
3089ab27cdd9SOphir Munk 			   struct rte_ether_addr *mac_addr,
3090ab27cdd9SOphir Munk 			   int vf_index)
3091ab27cdd9SOphir Munk {
3092ab27cdd9SOphir Munk 	return mlx5_nl_vf_mac_addr_modify
3093ab27cdd9SOphir Munk 		(priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3094ab27cdd9SOphir Munk }
3095ab27cdd9SOphir Munk 
30964d18abd1SOphir Munk /**
30974d18abd1SOphir Munk  * Set device promiscuous mode
30984d18abd1SOphir Munk  *
30994d18abd1SOphir Munk  * @param dev
31004d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
31014d18abd1SOphir Munk  * @param enable
31024d18abd1SOphir Munk  *   0 - promiscuous is disabled, otherwise - enabled
31034d18abd1SOphir Munk  *
31044d18abd1SOphir Munk  * @return
31054d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
31064d18abd1SOphir Munk  */
31074d18abd1SOphir Munk int
31084d18abd1SOphir Munk mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
31094d18abd1SOphir Munk {
31104d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
31114d18abd1SOphir Munk 
31124d18abd1SOphir Munk 	return mlx5_nl_promisc(priv->nl_socket_route,
31134d18abd1SOphir Munk 			       mlx5_ifindex(dev), !!enable);
31144d18abd1SOphir Munk }
31154d18abd1SOphir Munk 
31164d18abd1SOphir Munk /**
31174d18abd1SOphir Munk  * Set device promiscuous mode
31184d18abd1SOphir Munk  *
31194d18abd1SOphir Munk  * @param dev
31204d18abd1SOphir Munk  *   Pointer to Ethernet device structure.
31214d18abd1SOphir Munk  * @param enable
31224d18abd1SOphir Munk  *   0 - all multicase is disabled, otherwise - enabled
31234d18abd1SOphir Munk  *
31244d18abd1SOphir Munk  * @return
31254d18abd1SOphir Munk  *   0 on success, a negative error value otherwise
31264d18abd1SOphir Munk  */
31274d18abd1SOphir Munk int
31284d18abd1SOphir Munk mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
31294d18abd1SOphir Munk {
31304d18abd1SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
31314d18abd1SOphir Munk 
31324d18abd1SOphir Munk 	return mlx5_nl_allmulti(priv->nl_socket_route,
31334d18abd1SOphir Munk 				mlx5_ifindex(dev), !!enable);
31344d18abd1SOphir Munk }
31354d18abd1SOphir Munk 
3136f00f6562SOphir Munk /**
3137f00f6562SOphir Munk  * Flush device MAC addresses
3138f00f6562SOphir Munk  *
3139f00f6562SOphir Munk  * @param dev
3140f00f6562SOphir Munk  *   Pointer to Ethernet device structure.
3141f00f6562SOphir Munk  *
3142f00f6562SOphir Munk  */
3143f00f6562SOphir Munk void
3144f00f6562SOphir Munk mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3145f00f6562SOphir Munk {
3146f00f6562SOphir Munk 	struct mlx5_priv *priv = dev->data->dev_private;
3147f00f6562SOphir Munk 
3148f00f6562SOphir Munk 	mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3149f00f6562SOphir Munk 			       dev->data->mac_addrs,
3150f00f6562SOphir Munk 			       MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
3151f00f6562SOphir Munk }
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