1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2022 NVIDIA Corporation & Affiliates 3 */ 4 5 #ifndef MLX5DR_CMD_H_ 6 #define MLX5DR_CMD_H_ 7 8 enum mlx5dr_cmd_ext_dest_flags { 9 MLX5DR_CMD_EXT_DEST_REFORMAT = 1 << 0, 10 MLX5DR_CMD_EXT_DEST_ESW_OWNER_VHCA_ID = 1 << 1, 11 }; 12 13 struct mlx5dr_cmd_set_fte_dest { 14 uint8_t destination_type; 15 uint32_t destination_id; 16 enum mlx5dr_cmd_ext_dest_flags ext_flags; 17 struct mlx5dr_devx_obj *ext_reformat; 18 uint16_t esw_owner_vhca_id; 19 }; 20 21 struct mlx5dr_cmd_set_fte_attr { 22 uint32_t action_flags; 23 uint8_t ignore_flow_level; 24 uint8_t flow_source; 25 uint8_t extended_dest; 26 uint8_t encrypt_decrypt_type; 27 uint32_t encrypt_decrypt_obj_id; 28 uint32_t packet_reformat_id; 29 uint32_t dests_num; 30 struct mlx5dr_cmd_set_fte_dest *dests; 31 }; 32 33 struct mlx5dr_cmd_ft_create_attr { 34 uint8_t type; 35 uint8_t level; 36 bool rtc_valid; 37 uint8_t reformat_en; 38 }; 39 40 #define ACCESS_KEY_LEN 32 41 42 struct mlx5dr_cmd_ft_modify_attr { 43 uint8_t type; 44 uint32_t rtc_id_0; 45 uint32_t rtc_id_1; 46 uint32_t table_miss_id; 47 uint8_t table_miss_action; 48 uint64_t modify_fs; 49 }; 50 51 struct mlx5dr_cmd_ft_query_attr { 52 uint8_t type; 53 }; 54 55 struct mlx5dr_cmd_fg_attr { 56 uint32_t table_id; 57 uint32_t table_type; 58 }; 59 60 struct mlx5dr_cmd_forward_tbl { 61 struct mlx5dr_devx_obj *ft; 62 struct mlx5dr_devx_obj *fg; 63 struct mlx5dr_devx_obj *fte; 64 uint32_t refcount; 65 }; 66 67 struct mlx5dr_cmd_rtc_create_attr { 68 uint32_t pd; 69 uint32_t stc_base; 70 uint32_t ste_base; 71 uint32_t ste_offset; 72 uint32_t miss_ft_id; 73 bool fw_gen_wqe; 74 uint8_t update_index_mode; 75 uint8_t access_index_mode; 76 uint8_t num_hash_definer; 77 uint8_t log_depth; 78 uint8_t log_size; 79 uint8_t table_type; 80 uint8_t match_definer_0; 81 uint8_t match_definer_1; 82 uint8_t reparse_mode; 83 bool is_frst_jumbo; 84 bool is_scnd_range; 85 }; 86 87 struct mlx5dr_cmd_alias_obj_create_attr { 88 uint32_t obj_id; 89 uint16_t vhca_id; 90 uint16_t obj_type; 91 uint8_t access_key[ACCESS_KEY_LEN]; 92 }; 93 94 struct mlx5dr_cmd_stc_create_attr { 95 uint8_t log_obj_range; 96 uint8_t table_type; 97 }; 98 99 struct mlx5dr_cmd_stc_modify_attr { 100 uint32_t stc_offset; 101 uint8_t action_offset; 102 uint8_t reparse_mode; 103 enum mlx5_ifc_stc_action_type action_type; 104 union { 105 uint32_t id; /* TIRN, TAG, FT ID, STE ID */ 106 struct { 107 uint8_t decap; 108 uint16_t start_anchor; 109 uint16_t end_anchor; 110 } remove_header; 111 struct { 112 uint32_t arg_id; 113 uint32_t pattern_id; 114 } modify_header; 115 struct { 116 __be64 data; 117 } modify_action; 118 struct { 119 uint32_t arg_id; 120 uint32_t header_size; 121 uint8_t is_inline; 122 uint8_t encap; 123 uint16_t insert_anchor; 124 uint16_t insert_offset; 125 } insert_header; 126 struct { 127 uint8_t aso_type; 128 uint32_t devx_obj_id; 129 uint8_t return_reg_id; 130 } aso; 131 struct { 132 uint16_t vport_num; 133 uint16_t esw_owner_vhca_id; 134 } vport; 135 struct { 136 struct mlx5dr_pool_chunk ste; 137 struct mlx5dr_pool *ste_pool; 138 uint32_t ste_obj_id; /* Internal */ 139 uint32_t match_definer_id; 140 uint8_t log_hash_size; 141 } ste_table; 142 struct { 143 uint16_t start_anchor; 144 uint16_t num_of_words; 145 } remove_words; 146 147 uint32_t dest_table_id; 148 uint32_t dest_tir_num; 149 }; 150 }; 151 152 struct mlx5dr_cmd_ste_create_attr { 153 uint8_t log_obj_range; 154 uint8_t table_type; 155 }; 156 157 struct mlx5dr_cmd_definer_create_attr { 158 uint8_t *dw_selector; 159 uint8_t *byte_selector; 160 uint8_t *match_mask; 161 }; 162 163 struct mlx5dr_cmd_sq_create_attr { 164 uint32_t cqn; 165 uint32_t pdn; 166 uint32_t page_id; 167 uint32_t dbr_id; 168 uint32_t wq_id; 169 uint32_t log_wq_sz; 170 uint32_t ts_format; 171 }; 172 173 struct mlx5dr_cmd_allow_other_vhca_access_attr { 174 uint16_t obj_type; 175 uint32_t obj_id; 176 uint8_t access_key[ACCESS_KEY_LEN]; 177 }; 178 179 struct mlx5dr_cmd_packet_reformat_create_attr { 180 uint8_t type; 181 size_t data_sz; 182 void *data; 183 uint8_t reformat_param_0; 184 }; 185 186 struct mlx5dr_cmd_query_ft_caps { 187 uint8_t max_level; 188 uint8_t reparse; 189 uint8_t ignore_flow_level_rtc_valid; 190 }; 191 192 struct mlx5dr_cmd_query_vport_caps { 193 uint16_t vport_num; 194 uint16_t esw_owner_vhca_id; 195 uint32_t metadata_c; 196 uint32_t metadata_c_mask; 197 }; 198 199 struct mlx5dr_cmd_generate_wqe_attr { 200 uint8_t *wqe_ctrl; 201 uint8_t *gta_ctrl; 202 uint8_t *gta_data_0; 203 uint8_t *gta_data_1; 204 uint32_t pdn; 205 }; 206 207 struct mlx5dr_cmd_query_caps { 208 uint32_t wire_regc; 209 uint32_t wire_regc_mask; 210 uint32_t flex_protocols; 211 uint8_t wqe_based_update; 212 uint8_t rtc_reparse_mode; 213 uint16_t ste_format; 214 uint8_t rtc_index_mode; 215 uint8_t ste_alloc_log_max; 216 uint8_t ste_alloc_log_gran; 217 uint8_t stc_alloc_log_max; 218 uint8_t stc_alloc_log_gran; 219 uint8_t rtc_log_depth_max; 220 uint8_t format_select_gtpu_dw_0; 221 uint8_t format_select_gtpu_dw_1; 222 uint8_t flow_table_hash_type; 223 uint8_t format_select_gtpu_dw_2; 224 uint8_t format_select_gtpu_ext_dw_0; 225 uint8_t access_index_mode; 226 uint32_t linear_match_definer; 227 bool full_dw_jumbo_support; 228 bool rtc_hash_split_table; 229 bool rtc_linear_lookup_table; 230 uint32_t supp_type_gen_wqe; 231 uint8_t rtc_max_hash_def_gen_wqe; 232 uint16_t supp_ste_format_gen_wqe; 233 struct mlx5dr_cmd_query_ft_caps nic_ft; 234 struct mlx5dr_cmd_query_ft_caps fdb_ft; 235 bool eswitch_manager; 236 uint8_t merged_eswitch; 237 uint32_t eswitch_manager_vport_number; 238 uint8_t log_header_modify_argument_granularity; 239 uint8_t log_header_modify_argument_max_alloc; 240 uint8_t sq_ts_format; 241 uint8_t fdb_tir_stc; 242 uint64_t definer_format_sup; 243 uint32_t trivial_match_definer; 244 uint32_t vhca_id; 245 bool cross_vhca_resources; 246 uint32_t shared_vhca_id; 247 char fw_ver[64]; 248 bool ipsec_offload; 249 uint8_t encap_entropy_hash_type; 250 bool roce; 251 uint16_t roce_max_src_udp_port; 252 uint16_t roce_min_src_udp_port; 253 }; 254 255 int mlx5dr_cmd_destroy_obj(struct mlx5dr_devx_obj *devx_obj); 256 257 struct mlx5dr_devx_obj * 258 mlx5dr_cmd_flow_table_create(struct ibv_context *ctx, 259 struct mlx5dr_cmd_ft_create_attr *ft_attr); 260 261 int 262 mlx5dr_cmd_flow_table_modify(struct mlx5dr_devx_obj *devx_obj, 263 struct mlx5dr_cmd_ft_modify_attr *ft_attr); 264 265 int 266 mlx5dr_cmd_flow_table_query(struct mlx5dr_devx_obj *devx_obj, 267 struct mlx5dr_cmd_ft_query_attr *ft_attr, 268 uint64_t *icm_addr_0, uint64_t *icm_addr_1); 269 270 struct mlx5dr_devx_obj * 271 mlx5dr_cmd_rtc_create(struct ibv_context *ctx, 272 struct mlx5dr_cmd_rtc_create_attr *rtc_attr); 273 274 struct mlx5dr_devx_obj * 275 mlx5dr_cmd_stc_create(struct ibv_context *ctx, 276 struct mlx5dr_cmd_stc_create_attr *stc_attr); 277 278 int 279 mlx5dr_cmd_stc_modify(struct mlx5dr_devx_obj *devx_obj, 280 struct mlx5dr_cmd_stc_modify_attr *stc_attr); 281 282 int 283 mlx5dr_cmd_generate_wqe(struct ibv_context *ctx, 284 struct mlx5dr_cmd_generate_wqe_attr *attr, 285 struct mlx5_cqe64 *ret_cqe); 286 287 struct mlx5dr_devx_obj * 288 mlx5dr_cmd_ste_create(struct ibv_context *ctx, 289 struct mlx5dr_cmd_ste_create_attr *ste_attr); 290 291 struct mlx5dr_devx_obj * 292 mlx5dr_cmd_definer_create(struct ibv_context *ctx, 293 struct mlx5dr_cmd_definer_create_attr *def_attr); 294 295 struct mlx5dr_devx_obj * 296 mlx5dr_cmd_sq_create(struct ibv_context *ctx, 297 struct mlx5dr_cmd_sq_create_attr *attr); 298 299 struct mlx5dr_devx_obj * 300 mlx5dr_cmd_arg_create(struct ibv_context *ctx, 301 uint16_t log_obj_range, 302 uint32_t pd); 303 304 struct mlx5dr_devx_obj * 305 mlx5dr_cmd_header_modify_pattern_create(struct ibv_context *ctx, 306 uint32_t pattern_length, 307 uint8_t *actions); 308 309 struct mlx5dr_devx_obj * 310 mlx5dr_cmd_set_fte(struct ibv_context *ctx, 311 uint32_t table_type, 312 uint32_t table_id, 313 uint32_t group_id, 314 struct mlx5dr_cmd_set_fte_attr *fte_attr); 315 316 struct mlx5dr_cmd_forward_tbl * 317 mlx5dr_cmd_forward_tbl_create(struct ibv_context *ctx, 318 struct mlx5dr_cmd_ft_create_attr *ft_attr, 319 struct mlx5dr_cmd_set_fte_attr *fte_attr); 320 321 void mlx5dr_cmd_forward_tbl_destroy(struct mlx5dr_cmd_forward_tbl *tbl); 322 323 struct mlx5dr_devx_obj * 324 mlx5dr_cmd_packet_reformat_create(struct ibv_context *ctx, 325 struct mlx5dr_cmd_packet_reformat_create_attr *attr); 326 327 struct mlx5dr_devx_obj * 328 mlx5dr_cmd_set_fte(struct ibv_context *ctx, 329 uint32_t table_type, 330 uint32_t table_id, 331 uint32_t group_id, 332 struct mlx5dr_cmd_set_fte_attr *fte_attr); 333 334 struct mlx5dr_cmd_forward_tbl * 335 mlx5dr_cmd_forward_tbl_create(struct ibv_context *ctx, 336 struct mlx5dr_cmd_ft_create_attr *ft_attr, 337 struct mlx5dr_cmd_set_fte_attr *fte_attr); 338 339 void mlx5dr_cmd_forward_tbl_destroy(struct mlx5dr_cmd_forward_tbl *tbl); 340 341 struct mlx5dr_devx_obj * 342 mlx5dr_cmd_alias_obj_create(struct ibv_context *ctx, 343 struct mlx5dr_cmd_alias_obj_create_attr *alias_attr); 344 345 int mlx5dr_cmd_sq_modify_rdy(struct mlx5dr_devx_obj *devx_obj); 346 347 int mlx5dr_cmd_query_ib_port(struct ibv_context *ctx, 348 struct mlx5dr_cmd_query_vport_caps *vport_caps, 349 uint32_t port_num); 350 int mlx5dr_cmd_query_caps(struct ibv_context *ctx, 351 struct mlx5dr_cmd_query_caps *caps); 352 353 void mlx5dr_cmd_set_attr_connect_miss_tbl(struct mlx5dr_context *ctx, 354 uint32_t fw_ft_type, 355 enum mlx5dr_table_type type, 356 struct mlx5dr_cmd_ft_modify_attr *ft_attr); 357 358 int mlx5dr_cmd_allow_other_vhca_access(struct ibv_context *ctx, 359 struct mlx5dr_cmd_allow_other_vhca_access_attr *attr); 360 #endif /* MLX5DR_CMD_H_ */ 361