xref: /dpdk/drivers/net/ionic/ionic_lif.h (revision daa02b5cddbb8e11b31d41e2bf7bb1ae64dcae2f)
1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2  * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
3  */
4 
5 #ifndef _IONIC_LIF_H_
6 #define _IONIC_LIF_H_
7 
8 #include <inttypes.h>
9 
10 #include <rte_ethdev.h>
11 #include <rte_ether.h>
12 
13 #include "ionic_osdep.h"
14 #include "ionic_dev.h"
15 #include "ionic_rx_filter.h"
16 
17 #define IONIC_ADMINQ_LENGTH	16	/* must be a power of two */
18 #define IONIC_NOTIFYQ_LENGTH	64	/* must be a power of two */
19 
20 #define IONIC_RSS_OFFLOAD_ALL ( \
21 	IONIC_RSS_TYPE_IPV4 | \
22 	IONIC_RSS_TYPE_IPV4_TCP | \
23 	IONIC_RSS_TYPE_IPV4_UDP | \
24 	IONIC_RSS_TYPE_IPV6 | \
25 	IONIC_RSS_TYPE_IPV6_TCP | \
26 	IONIC_RSS_TYPE_IPV6_UDP)
27 
28 #define IONIC_GET_SG_CNTR_IDX(num_sg_elems)	(num_sg_elems)
29 
30 struct ionic_tx_stats {
31 	uint64_t packets;
32 	uint64_t bytes;
33 	uint64_t drop;
34 	uint64_t stop;
35 	uint64_t no_csum;
36 	uint64_t tso;
37 };
38 
39 struct ionic_rx_stats {
40 	uint64_t packets;
41 	uint64_t bytes;
42 	uint64_t no_cb_arg;
43 	uint64_t bad_cq_status;
44 	uint64_t no_room;
45 	uint64_t bad_len;
46 	uint64_t mtods;
47 };
48 
49 #define IONIC_QCQ_F_INITED	BIT(0)
50 #define IONIC_QCQ_F_SG		BIT(1)
51 #define IONIC_QCQ_F_DEFERRED	BIT(4)
52 #define IONIC_QCQ_F_CSUM_L3	BIT(7)
53 #define IONIC_QCQ_F_CSUM_UDP	BIT(8)
54 #define IONIC_QCQ_F_CSUM_TCP	BIT(9)
55 
56 /* Queue / Completion Queue */
57 struct ionic_qcq {
58 	struct ionic_queue q;        /**< Queue */
59 	struct ionic_cq cq;          /**< Completion Queue */
60 	struct ionic_lif *lif;       /**< LIF */
61 	const struct rte_memzone *base_z;
62 	void *base;
63 	rte_iova_t base_pa;
64 };
65 
66 struct ionic_admin_qcq {
67 	struct ionic_qcq qcq;
68 	uint16_t flags;
69 };
70 
71 struct ionic_notify_qcq {
72 	struct ionic_qcq qcq;
73 	uint16_t flags;
74 
75 	struct ionic_intr_info intr;
76 };
77 
78 struct ionic_rx_qcq {
79 	/* cacheline0, cacheline1 */
80 	struct ionic_qcq qcq;
81 
82 	/* cacheline2 */
83 	struct rte_mempool *mb_pool;
84 	uint16_t flags;
85 
86 	/* cacheline3 (inside stats) */
87 	struct ionic_rx_stats stats;
88 };
89 
90 struct ionic_tx_qcq {
91 	/* cacheline0, cacheline1 */
92 	struct ionic_qcq qcq;
93 
94 	/* cacheline2 */
95 	uint16_t num_segs_fw;	/* # segs supported by current FW */
96 	uint16_t flags;
97 
98 	struct ionic_tx_stats stats;
99 };
100 
101 #define IONIC_Q_TO_QCQ(_q)	container_of(_q, struct ionic_qcq, q)
102 #define IONIC_CQ_TO_QCQ(_cq)	container_of(_cq, struct ionic_qcq, cq)
103 
104 struct ionic_qtype_info {
105 	uint8_t  version;
106 	uint8_t  supported;
107 	uint64_t features;
108 	uint16_t desc_sz;
109 	uint16_t comp_sz;
110 	uint16_t sg_desc_sz;
111 	uint16_t max_sg_elems;
112 	uint16_t sg_desc_stride;
113 };
114 
115 #define IONIC_LIF_F_INITED		BIT(0)
116 #define IONIC_LIF_F_LINK_CHECK_NEEDED	BIT(1)
117 #define IONIC_LIF_F_UP			BIT(2)
118 #define IONIC_LIF_F_FW_RESET		BIT(3)
119 
120 #define IONIC_LIF_NAME_MAX_SZ		(32)
121 
122 struct ionic_lif {
123 	struct ionic_adapter *adapter;
124 	struct rte_eth_dev *eth_dev;
125 	uint16_t port_id;  /**< Device port identifier */
126 	uint32_t hw_index;
127 	uint32_t state;
128 	uint32_t ntxqcqs;
129 	uint32_t nrxqcqs;
130 	rte_spinlock_t adminq_lock;
131 	rte_spinlock_t adminq_service_lock;
132 	struct ionic_admin_qcq *adminqcq;
133 	struct ionic_notify_qcq *notifyqcq;
134 	struct ionic_tx_qcq **txqcqs;
135 	struct ionic_rx_qcq **rxqcqs;
136 	struct ionic_rx_filters rx_filters;
137 	struct ionic_doorbell __iomem *kern_dbpage;
138 	uint64_t last_eid;
139 	uint64_t features;
140 	uint32_t hw_features;
141 	uint32_t rx_mode;
142 	char name[IONIC_LIF_NAME_MAX_SZ];
143 	uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
144 	uint16_t rss_types;
145 	uint8_t rss_hash_key[IONIC_RSS_HASH_KEY_SIZE];
146 	uint8_t *rss_ind_tbl;
147 	rte_iova_t rss_ind_tbl_pa;
148 	const struct rte_memzone *rss_ind_tbl_z;
149 	uint32_t rss_ind_tbl_nrxqcqs;
150 	uint32_t info_sz;
151 	struct ionic_lif_info *info;
152 	rte_iova_t info_pa;
153 	const struct rte_memzone *info_z;
154 
155 	struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX];
156 	uint8_t qtype_ver[IONIC_QTYPE_MAX];
157 
158 	struct rte_eth_stats stats_base;
159 	struct ionic_lif_stats lif_stats_base;
160 };
161 
162 int ionic_lif_identify(struct ionic_adapter *adapter);
163 int ionic_lifs_size(struct ionic_adapter *ionic);
164 
165 int ionic_lif_alloc(struct ionic_lif *lif);
166 void ionic_lif_free(struct ionic_lif *lif);
167 void ionic_lif_free_queues(struct ionic_lif *lif);
168 
169 int ionic_lif_init(struct ionic_lif *lif);
170 void ionic_lif_deinit(struct ionic_lif *lif);
171 
172 int ionic_lif_start(struct ionic_lif *lif);
173 void ionic_lif_stop(struct ionic_lif *lif);
174 
175 void ionic_lif_configure(struct ionic_lif *lif);
176 void ionic_lif_configure_vlan_offload(struct ionic_lif *lif, int mask);
177 void ionic_lif_reset(struct ionic_lif *lif);
178 
179 int ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr);
180 
181 int ionic_qcq_service(struct ionic_qcq *qcq, int budget, ionic_cq_cb cb,
182 	void *cb_arg);
183 
184 int ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu);
185 
186 int ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
187 	struct rte_ether_addr *mac_addr,
188 	uint32_t index __rte_unused, uint32_t pool __rte_unused);
189 void ionic_dev_remove_mac(struct rte_eth_dev *eth_dev,
190 	uint32_t index __rte_unused);
191 int ionic_dev_set_mac(struct rte_eth_dev *eth_dev,
192 	struct rte_ether_addr *mac_addr);
193 int ionic_dev_vlan_filter_set(struct rte_eth_dev *eth_dev, uint16_t vlan_id,
194 	int on);
195 int ionic_dev_promiscuous_enable(struct rte_eth_dev *dev);
196 int ionic_dev_promiscuous_disable(struct rte_eth_dev *dev);
197 int ionic_dev_allmulticast_enable(struct rte_eth_dev *dev);
198 int ionic_dev_allmulticast_disable(struct rte_eth_dev *dev);
199 
200 int ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t socket_id,
201 	uint32_t index, uint16_t nrxq_descs,
202 	struct ionic_rx_qcq **qcq_out);
203 int ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t socket_id,
204 	uint32_t index, uint16_t ntxq_descs,
205 	struct ionic_tx_qcq **qcq_out);
206 void ionic_qcq_free(struct ionic_qcq *qcq);
207 
208 int ionic_qcq_enable(struct ionic_qcq *qcq);
209 int ionic_qcq_disable(struct ionic_qcq *qcq);
210 
211 int ionic_lif_rxq_init(struct ionic_rx_qcq *rxq);
212 void ionic_lif_rxq_deinit(struct ionic_rx_qcq *rxq);
213 
214 int ionic_lif_txq_init(struct ionic_tx_qcq *txq);
215 void ionic_lif_txq_deinit(struct ionic_tx_qcq *txq);
216 
217 int ionic_lif_rss_config(struct ionic_lif *lif, const uint16_t types,
218 	const uint8_t *key, const uint32_t *indir);
219 
220 int ionic_lif_set_features(struct ionic_lif *lif);
221 
222 void ionic_lif_get_stats(const struct ionic_lif *lif,
223 	struct rte_eth_stats *stats);
224 void ionic_lif_reset_stats(struct ionic_lif *lif);
225 
226 void ionic_lif_get_hw_stats(struct ionic_lif *lif,
227 	struct ionic_lif_stats *stats);
228 void ionic_lif_reset_hw_stats(struct ionic_lif *lif);
229 
230 int ionic_notifyq_handler(struct ionic_lif *lif, int budget);
231 
232 #endif /* _IONIC_LIF_H_ */
233