1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2019 Intel Corporation 3 */ 4 5 #include <stdint.h> 6 #include <unistd.h> 7 8 #include <bus_pci_driver.h> 9 #include <rte_ethdev.h> 10 #include <rte_pci.h> 11 #include <rte_malloc.h> 12 13 #include <rte_mbuf.h> 14 #include <rte_sched.h> 15 #include <ethdev_driver.h> 16 #include <rte_spinlock.h> 17 18 #include <rte_io.h> 19 #include <rte_rawdev.h> 20 #include <rte_rawdev_pmd.h> 21 #include <bus_ifpga_driver.h> 22 #include <ifpga_logs.h> 23 24 #include "ipn3ke_rawdev_api.h" 25 #include "ipn3ke_flow.h" 26 #include "ipn3ke_logs.h" 27 #include "ipn3ke_ethdev.h" 28 29 static int ipn3ke_rpst_scan_num; 30 static rte_thread_t ipn3ke_rpst_scan_thread; 31 32 /** Double linked list of representor port. */ 33 TAILQ_HEAD(ipn3ke_rpst_list, ipn3ke_rpst); 34 35 static struct ipn3ke_rpst_list ipn3ke_rpst_list = 36 TAILQ_HEAD_INITIALIZER(ipn3ke_rpst_list); 37 38 static rte_spinlock_t ipn3ke_link_notify_list_lk = RTE_SPINLOCK_INITIALIZER; 39 40 static int 41 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst); 42 43 static int 44 ipn3ke_rpst_dev_infos_get(struct rte_eth_dev *ethdev, 45 struct rte_eth_dev_info *dev_info) 46 { 47 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 48 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 49 50 dev_info->speed_capa = 51 (hw->retimer.mac_type == 52 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) ? 53 RTE_ETH_LINK_SPEED_10G : 54 ((hw->retimer.mac_type == 55 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) ? 56 RTE_ETH_LINK_SPEED_25G : 57 RTE_ETH_LINK_SPEED_AUTONEG); 58 59 dev_info->max_rx_queues = 1; 60 dev_info->max_tx_queues = 1; 61 dev_info->min_rx_bufsize = IPN3KE_AFU_BUF_SIZE_MIN; 62 dev_info->max_rx_pktlen = IPN3KE_AFU_FRAME_SIZE_MAX; 63 dev_info->max_mac_addrs = hw->port_num; 64 dev_info->max_vfs = 0; 65 dev_info->default_txconf = (struct rte_eth_txconf) { 66 .offloads = 0, 67 }; 68 dev_info->rx_queue_offload_capa = 0; 69 dev_info->rx_offload_capa = 70 RTE_ETH_RX_OFFLOAD_VLAN_STRIP | 71 RTE_ETH_RX_OFFLOAD_QINQ_STRIP | 72 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | 73 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | 74 RTE_ETH_RX_OFFLOAD_TCP_CKSUM | 75 RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM | 76 RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | 77 RTE_ETH_RX_OFFLOAD_VLAN_FILTER; 78 79 dev_info->tx_queue_offload_capa = RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; 80 dev_info->tx_offload_capa = 81 RTE_ETH_TX_OFFLOAD_VLAN_INSERT | 82 RTE_ETH_TX_OFFLOAD_QINQ_INSERT | 83 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | 84 RTE_ETH_TX_OFFLOAD_UDP_CKSUM | 85 RTE_ETH_TX_OFFLOAD_TCP_CKSUM | 86 RTE_ETH_TX_OFFLOAD_SCTP_CKSUM | 87 RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | 88 RTE_ETH_TX_OFFLOAD_TCP_TSO | 89 RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO | 90 RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO | 91 RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO | 92 RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO | 93 RTE_ETH_TX_OFFLOAD_MULTI_SEGS | 94 dev_info->tx_queue_offload_capa; 95 96 dev_info->dev_capa = 97 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP | 98 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP; 99 dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP; 100 101 dev_info->switch_info.name = ethdev->device->name; 102 dev_info->switch_info.domain_id = rpst->switch_domain_id; 103 dev_info->switch_info.port_id = rpst->port_id; 104 105 return 0; 106 } 107 108 static int 109 ipn3ke_rpst_dev_configure(__rte_unused struct rte_eth_dev *dev) 110 { 111 return 0; 112 } 113 114 static int 115 ipn3ke_rpst_dev_start(struct rte_eth_dev *dev) 116 { 117 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev); 118 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev); 119 struct rte_rawdev *rawdev; 120 uint64_t base_mac; 121 uint32_t val; 122 char attr_name[IPN3KE_RAWDEV_ATTR_LEN_MAX]; 123 uint16_t i; 124 125 rawdev = hw->rawdev; 126 127 memset(attr_name, 0, sizeof(attr_name)); 128 snprintf(attr_name, IPN3KE_RAWDEV_ATTR_LEN_MAX, "%s", 129 "LineSideBaseMAC"); 130 rawdev->dev_ops->attr_get(rawdev, attr_name, &base_mac); 131 rte_ether_addr_copy((struct rte_ether_addr *)&base_mac, 132 &rpst->mac_addr); 133 134 rte_ether_addr_copy(&rpst->mac_addr, &dev->data->mac_addrs[0]); 135 dev->data->mac_addrs->addr_bytes[RTE_ETHER_ADDR_LEN - 1] = 136 (uint8_t)rpst->port_id + 1; 137 138 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 139 /* Set mac address */ 140 rte_memcpy(((char *)(&val)), 141 (char *)&dev->data->mac_addrs->addr_bytes[0], 142 sizeof(uint32_t)); 143 (*hw->f_mac_write)(hw, 144 val, 145 IPN3KE_MAC_PRIMARY_MAC_ADDR0, 146 rpst->port_id, 147 0); 148 rte_memcpy(((char *)(&val)), 149 (char *)&dev->data->mac_addrs->addr_bytes[4], 150 sizeof(uint16_t)); 151 (*hw->f_mac_write)(hw, 152 val, 153 IPN3KE_MAC_PRIMARY_MAC_ADDR1, 154 rpst->port_id, 155 0); 156 157 /* Enable the TX path */ 158 ipn3ke_xmac_tx_enable(hw, rpst->port_id, 0); 159 160 /* Disables source address override */ 161 ipn3ke_xmac_smac_ovd_dis(hw, rpst->port_id, 0); 162 163 /* Enable the RX path */ 164 ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0); 165 166 /* Clear line side TX statistics counters */ 167 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0); 168 169 /* Clear line side RX statistics counters */ 170 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0); 171 172 /* Clear NIC side TX statistics counters */ 173 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1); 174 175 /* Clear NIC side RX statistics counters */ 176 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1); 177 } else if (hw->retimer.mac_type == 178 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { 179 /* Clear line side TX statistics counters */ 180 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0); 181 182 /* Clear line side RX statistics counters */ 183 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0); 184 185 /* Clear NIC side TX statistics counters */ 186 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1); 187 188 /* Clear NIC side RX statistics counters */ 189 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1); 190 } 191 192 ipn3ke_rpst_link_update(dev, 0); 193 194 for (i = 0; i < dev->data->nb_rx_queues; i++) 195 dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED; 196 for (i = 0; i < dev->data->nb_tx_queues; i++) 197 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED; 198 199 return 0; 200 } 201 202 static int 203 ipn3ke_rpst_dev_stop(struct rte_eth_dev *dev) 204 { 205 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev); 206 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev); 207 uint16_t i; 208 209 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 210 /* Disable the TX path */ 211 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0); 212 213 /* Disable the RX path */ 214 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0); 215 } 216 217 for (i = 0; i < dev->data->nb_rx_queues; i++) 218 dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED; 219 for (i = 0; i < dev->data->nb_tx_queues; i++) 220 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED; 221 222 return 0; 223 } 224 225 static int 226 ipn3ke_rpst_dev_close(struct rte_eth_dev *dev) 227 { 228 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev); 229 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev); 230 231 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 232 return 0; 233 234 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 235 /* Disable the TX path */ 236 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0); 237 238 /* Disable the RX path */ 239 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0); 240 } 241 242 return 0; 243 } 244 245 /* 246 * Reset PF device only to re-initialize resources in PMD layer 247 */ 248 static int 249 ipn3ke_rpst_dev_reset(struct rte_eth_dev *dev) 250 { 251 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev); 252 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev); 253 254 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 255 /* Disable the TX path */ 256 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0); 257 258 /* Disable the RX path */ 259 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0); 260 } 261 262 return 0; 263 } 264 265 static int 266 ipn3ke_rpst_rx_queue_start(__rte_unused struct rte_eth_dev *dev, 267 __rte_unused uint16_t rx_queue_id) 268 { 269 return 0; 270 } 271 272 static int 273 ipn3ke_rpst_rx_queue_stop(__rte_unused struct rte_eth_dev *dev, 274 __rte_unused uint16_t rx_queue_id) 275 { 276 return 0; 277 } 278 279 static int 280 ipn3ke_rpst_tx_queue_start(__rte_unused struct rte_eth_dev *dev, 281 __rte_unused uint16_t tx_queue_id) 282 { 283 return 0; 284 } 285 286 static int 287 ipn3ke_rpst_tx_queue_stop(__rte_unused struct rte_eth_dev *dev, 288 __rte_unused uint16_t tx_queue_id) 289 { 290 return 0; 291 } 292 293 static int 294 ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev *dev, 295 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc, 296 __rte_unused unsigned int socket_id, 297 __rte_unused const struct rte_eth_rxconf *rx_conf, 298 __rte_unused struct rte_mempool *mp) 299 { 300 return 0; 301 } 302 303 static int 304 ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev *dev, 305 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc, 306 __rte_unused unsigned int socket_id, 307 __rte_unused const struct rte_eth_txconf *tx_conf) 308 { 309 return 0; 310 } 311 312 /* Statistics collected by each port, VSI, VEB, and S-channel */ 313 struct ipn3ke_rpst_eth_stats { 314 uint64_t tx_bytes; /* gotc */ 315 uint64_t tx_multicast; /* mptc */ 316 uint64_t tx_broadcast; /* bptc */ 317 uint64_t tx_unicast; /* uptc */ 318 uint64_t tx_discards; /* tdpc */ 319 uint64_t tx_errors; /* tepc */ 320 uint64_t rx_bytes; /* gorc */ 321 uint64_t rx_multicast; /* mprc */ 322 uint64_t rx_broadcast; /* bprc */ 323 uint64_t rx_unicast; /* uprc */ 324 uint64_t rx_discards; /* rdpc */ 325 uint64_t rx_unknown_protocol; /* rupp */ 326 }; 327 328 /* store statistics names and its offset in stats structure */ 329 struct ipn3ke_rpst_xstats_name_offset { 330 char name[RTE_ETH_XSTATS_NAME_SIZE]; 331 unsigned int offset; 332 }; 333 334 static const struct ipn3ke_rpst_xstats_name_offset 335 ipn3ke_rpst_stats_strings[] = { 336 {"tx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats, 337 tx_multicast)}, 338 {"tx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats, 339 tx_broadcast)}, 340 {"tx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats, 341 tx_unicast)}, 342 {"tx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats, 343 tx_discards)}, 344 {"rx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats, 345 rx_multicast)}, 346 {"rx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats, 347 rx_broadcast)}, 348 {"rx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats, 349 rx_unicast)}, 350 {"rx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats, 351 rx_discards)}, 352 {"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats, 353 rx_unknown_protocol)}, 354 }; 355 356 #define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \ 357 sizeof(ipn3ke_rpst_stats_strings[0])) 358 359 #define IPN3KE_RPST_PRIO_XSTATS_CNT 8 360 361 /* Statistics collected by the MAC */ 362 struct ipn3ke_rpst_hw_port_stats { 363 /* eth stats collected by the port */ 364 struct ipn3ke_rpst_eth_stats eth; 365 366 /* additional port specific stats */ 367 uint64_t tx_dropped_link_down; 368 uint64_t crc_errors; 369 uint64_t illegal_bytes; 370 uint64_t error_bytes; 371 uint64_t mac_local_faults; 372 uint64_t mac_remote_faults; 373 uint64_t rx_length_errors; 374 uint64_t link_xon_rx; 375 uint64_t link_xoff_rx; 376 uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT]; 377 uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT]; 378 uint64_t link_xon_tx; 379 uint64_t link_xoff_tx; 380 uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT]; 381 uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT]; 382 uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT]; 383 uint64_t rx_size_64; 384 uint64_t rx_size_65_127; 385 uint64_t rx_size_128_255; 386 uint64_t rx_size_256_511; 387 uint64_t rx_size_512_1023; 388 uint64_t rx_size_1024_1518; 389 uint64_t rx_size_big; 390 uint64_t rx_undersize; 391 uint64_t rx_fragments; 392 uint64_t rx_oversize; 393 uint64_t rx_jabber; 394 uint64_t tx_size_64; 395 uint64_t tx_size_65_127; 396 uint64_t tx_size_128_255; 397 uint64_t tx_size_256_511; 398 uint64_t tx_size_512_1023; 399 uint64_t tx_size_1024_1518; 400 uint64_t tx_size_1519_to_max; 401 uint64_t mac_short_packet_dropped; 402 uint64_t checksum_error; 403 /* flow director stats */ 404 uint64_t fd_atr_match; 405 uint64_t fd_sb_match; 406 uint64_t fd_atr_tunnel_match; 407 uint32_t fd_atr_status; 408 uint32_t fd_sb_status; 409 /* EEE LPI */ 410 uint32_t tx_lpi_status; 411 uint32_t rx_lpi_status; 412 uint64_t tx_lpi_count; 413 uint64_t rx_lpi_count; 414 }; 415 416 static const struct ipn3ke_rpst_xstats_name_offset 417 ipn3ke_rpst_hw_port_strings[] = { 418 {"tx_link_down_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats, 419 tx_dropped_link_down)}, 420 {"rx_crc_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 421 crc_errors)}, 422 {"rx_illegal_byte_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 423 illegal_bytes)}, 424 {"rx_error_bytes", offsetof(struct ipn3ke_rpst_hw_port_stats, 425 error_bytes)}, 426 {"mac_local_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 427 mac_local_faults)}, 428 {"mac_remote_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 429 mac_remote_faults)}, 430 {"rx_length_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 431 rx_length_errors)}, 432 {"tx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 433 link_xon_tx)}, 434 {"rx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 435 link_xon_rx)}, 436 {"tx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 437 link_xoff_tx)}, 438 {"rx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 439 link_xoff_rx)}, 440 {"rx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 441 rx_size_64)}, 442 {"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 443 rx_size_65_127)}, 444 {"rx_size_128_to_255_packets", 445 offsetof(struct ipn3ke_rpst_hw_port_stats, 446 rx_size_128_255)}, 447 {"rx_size_256_to_511_packets", 448 offsetof(struct ipn3ke_rpst_hw_port_stats, 449 rx_size_256_511)}, 450 {"rx_size_512_to_1023_packets", 451 offsetof(struct ipn3ke_rpst_hw_port_stats, 452 rx_size_512_1023)}, 453 {"rx_size_1024_to_1518_packets", 454 offsetof(struct ipn3ke_rpst_hw_port_stats, 455 rx_size_1024_1518)}, 456 {"rx_size_1519_to_max_packets", 457 offsetof(struct ipn3ke_rpst_hw_port_stats, 458 rx_size_big)}, 459 {"rx_undersized_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 460 rx_undersize)}, 461 {"rx_oversize_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 462 rx_oversize)}, 463 {"rx_mac_short_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats, 464 mac_short_packet_dropped)}, 465 {"rx_fragmented_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 466 rx_fragments)}, 467 {"rx_jabber_errors", offsetof(struct ipn3ke_rpst_hw_port_stats, 468 rx_jabber)}, 469 {"tx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 470 tx_size_64)}, 471 {"tx_size_65_to_127_packets", 472 offsetof(struct ipn3ke_rpst_hw_port_stats, 473 tx_size_65_127)}, 474 {"tx_size_128_to_255_packets", 475 offsetof(struct ipn3ke_rpst_hw_port_stats, 476 tx_size_128_255)}, 477 {"tx_size_256_to_511_packets", 478 offsetof(struct ipn3ke_rpst_hw_port_stats, 479 tx_size_256_511)}, 480 {"tx_size_512_to_1023_packets", 481 offsetof(struct ipn3ke_rpst_hw_port_stats, 482 tx_size_512_1023)}, 483 {"tx_size_1024_to_1518_packets", 484 offsetof(struct ipn3ke_rpst_hw_port_stats, 485 tx_size_1024_1518)}, 486 {"tx_size_1519_to_max_packets", 487 offsetof(struct ipn3ke_rpst_hw_port_stats, 488 tx_size_1519_to_max)}, 489 {"rx_flow_director_atr_match_packets", 490 offsetof(struct ipn3ke_rpst_hw_port_stats, 491 fd_atr_match)}, 492 {"rx_flow_director_sb_match_packets", 493 offsetof(struct ipn3ke_rpst_hw_port_stats, 494 fd_sb_match)}, 495 {"tx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats, 496 tx_lpi_status)}, 497 {"rx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats, 498 rx_lpi_status)}, 499 {"tx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats, 500 tx_lpi_count)}, 501 {"rx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats, 502 rx_lpi_count)}, 503 }; 504 505 #define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \ 506 / sizeof(ipn3ke_rpst_hw_port_strings[0])) 507 508 static const struct ipn3ke_rpst_xstats_name_offset 509 ipn3ke_rpst_rxq_prio_strings[] = { 510 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 511 priority_xon_rx)}, 512 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 513 priority_xoff_rx)}, 514 }; 515 516 #define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \ 517 / sizeof(ipn3ke_rpst_rxq_prio_strings[0])) 518 519 static const struct ipn3ke_rpst_xstats_name_offset 520 ipn3ke_rpst_txq_prio_strings[] = { 521 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 522 priority_xon_tx)}, 523 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 524 priority_xoff_tx)}, 525 {"xon_to_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats, 526 priority_xon_2_xoff)}, 527 }; 528 529 #define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \ 530 / sizeof(ipn3ke_rpst_txq_prio_strings[0])) 531 532 static uint32_t 533 ipn3ke_rpst_xstats_calc_num(void) 534 { 535 return IPN3KE_RPST_ETH_XSTATS_CNT 536 + IPN3KE_RPST_HW_PORT_XSTATS_CNT 537 + (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT 538 * IPN3KE_RPST_PRIO_XSTATS_CNT) 539 + (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT 540 * IPN3KE_RPST_PRIO_XSTATS_CNT); 541 } 542 543 static void 544 ipn3ke_rpst_25g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw, 545 uint16_t port_id) 546 { 547 uint32_t tmp = 0x00000001; 548 /* Bit[0]: Software can set this bit to the value of 1 549 * to reset all of the TX statistics registers at the same time. 550 * This bit is selfclearing. 551 */ 552 (*hw->f_mac_write)(hw, 553 tmp, 554 IPN3KE_25G_TX_STATISTICS_CONFIG, 555 port_id, 556 1); 557 558 while (tmp & 0x00000001) { 559 tmp = 0x00000000; 560 (*hw->f_mac_read)(hw, 561 &tmp, 562 IPN3KE_25G_TX_STATISTICS_CONFIG, 563 port_id, 564 1); 565 if (tmp & 0x00000001) 566 usleep(5); 567 else 568 return; 569 } 570 } 571 572 static void 573 ipn3ke_rpst_25g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw, 574 uint16_t port_id) 575 { 576 uint32_t tmp = 0x00000001; 577 /* Bit[0]: Software can set this bit to the value of 1 578 * to reset all of the RX statistics registers at the same time. 579 * This bit is selfclearing. 580 */ 581 (*hw->f_mac_write)(hw, 582 tmp, 583 IPN3KE_25G_RX_STATISTICS_CONFIG, 584 port_id, 585 1); 586 587 while (tmp & 0x00000001) { 588 tmp = 0x00000000; 589 (*hw->f_mac_read)(hw, 590 &tmp, 591 IPN3KE_25G_RX_STATISTICS_CONFIG, 592 port_id, 593 1); 594 if (tmp & 0x00000001) 595 usleep(5); 596 else 597 return; 598 } 599 } 600 601 static void 602 ipn3ke_rpst_10g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw, 603 uint16_t port_id) 604 { 605 uint32_t tmp; 606 607 /*Bit [0]: Set this register to 1 to clear all TX statistics 608 *counters. 609 *The IP core clears this bit when all counters are cleared. 610 *Bits [31:1]: Reserved. 611 */ 612 tmp = 0x00000000; 613 (*hw->f_mac_read)(hw, 614 &tmp, 615 IPN3KE_10G_TX_STATS_CLR, 616 port_id, 617 1); 618 tmp |= 0x00000001; 619 (*hw->f_mac_write)(hw, 620 tmp, 621 IPN3KE_10G_TX_STATS_CLR, 622 port_id, 623 1); 624 } 625 626 static void 627 ipn3ke_rpst_10g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw, 628 uint16_t port_id) 629 { 630 uint32_t tmp; 631 632 /*Bit [0]: Set this register to 1 to clear all RX statistics 633 *counters. 634 *The IP core clears this bit when all counters are cleared. 635 *Bits [31:1]: Reserved 636 */ 637 tmp = 0x00000000; 638 (*hw->f_mac_read)(hw, 639 &tmp, 640 IPN3KE_10G_RX_STATS_CLR, 641 port_id, 642 1); 643 tmp |= 0x00000001; 644 (*hw->f_mac_write)(hw, 645 tmp, 646 IPN3KE_10G_RX_STATS_CLR, 647 port_id, 648 1); 649 } 650 651 static uint64_t 652 ipn3ke_rpst_read_64bits_statistics_register(uint32_t addr_lo, 653 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id) 654 { 655 uint32_t statistics_lo = 0x00000000; 656 uint32_t statistics_hi = 0x00000000; 657 uint64_t statistics = 0x0000000000000000; 658 659 (*hw->f_mac_read)(hw, 660 &statistics_lo, 661 addr_lo, 662 port_id, 663 0); 664 665 (*hw->f_mac_read)(hw, 666 &statistics_hi, 667 addr_hi, 668 port_id, 669 0); 670 671 statistics += statistics_hi; 672 statistics = statistics << IPN3KE_REGISTER_WIDTH; 673 statistics += statistics_lo; 674 return statistics; 675 676 } 677 678 static int 679 ipn3ke_rpst_read_25g_lineside_stats_registers 680 (struct ipn3ke_hw *hw, 681 uint16_t port_id, 682 struct ipn3ke_rpst_hw_port_stats *hw_stats) 683 { 684 uint32_t tmp; 685 uint64_t statistics; 686 687 memset(hw_stats, 0, sizeof(*hw_stats)); 688 689 /*check Tx statistics is real time. 690 *if statistics has been paused, make it real time. 691 */ 692 tmp = 0x00000000; 693 (*hw->f_mac_read)(hw, 694 &tmp, 695 IPN3KE_25G_TX_STATISTICS_CONFIG, 696 port_id, 697 0); 698 699 if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) { 700 tmp &= 0xfffffffb; 701 (*hw->f_mac_write)(hw, 702 tmp, 703 IPN3KE_25G_TX_STATISTICS_CONFIG, 704 port_id, 705 0); 706 } 707 708 tmp = 0x00000000; 709 (*hw->f_mac_read)(hw, 710 &tmp, 711 IPN3KE_25G_TX_STATISTICS_STATUS, 712 port_id, 713 0); 714 if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) { 715 tmp = 0x00000000; 716 (*hw->f_mac_read)(hw, 717 &tmp, 718 IPN3KE_25G_TX_STATISTICS_CONFIG, 719 port_id, 720 0); 721 tmp &= 0xfffffffb; 722 (*hw->f_mac_write)(hw, 723 tmp, 724 IPN3KE_25G_TX_STATISTICS_CONFIG, 725 port_id, 726 0); 727 } 728 729 /*check Rx statistics is real time. 730 *if statistics has been paused, make it real time. 731 */ 732 tmp = 0x00000000; 733 (*hw->f_mac_read)(hw, 734 &tmp, 735 IPN3KE_25G_RX_STATISTICS_CONFIG, 736 port_id, 737 0); 738 if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) { 739 tmp &= 0xfffffffb; 740 (*hw->f_mac_write)(hw, 741 tmp, 742 IPN3KE_25G_RX_STATISTICS_CONFIG, 743 port_id, 744 0); 745 } 746 747 tmp = 0x00000000; 748 (*hw->f_mac_read)(hw, 749 &tmp, 750 IPN3KE_25G_RX_STATISTICS_STATUS, 751 port_id, 752 0); 753 754 if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) { 755 tmp = 0x00000000; 756 (*hw->f_mac_read)(hw, 757 &tmp, 758 IPN3KE_25G_RX_STATISTICS_CONFIG, 759 port_id, 760 0); 761 tmp &= 0xfffffffb; 762 (*hw->f_mac_write)(hw, 763 tmp, 764 IPN3KE_25G_RX_STATISTICS_CONFIG, 765 port_id, 766 0); 767 } 768 769 /* pause Tx counter to read the statistics */ 770 tmp = 0x00000000; 771 (*hw->f_mac_read)(hw, 772 &tmp, 773 IPN3KE_25G_TX_STATISTICS_CONFIG, 774 port_id, 775 0); 776 tmp |= 0x00000004; 777 (*hw->f_mac_write)(hw, 778 tmp, 779 IPN3KE_25G_TX_STATISTICS_CONFIG, 780 port_id, 781 0); 782 783 /* pause Rx counter to read the statistics */ 784 tmp = 0x00000000; 785 (*hw->f_mac_read)(hw, 786 &tmp, 787 IPN3KE_25G_RX_STATISTICS_CONFIG, 788 port_id, 789 0); 790 tmp |= 0x00000004; 791 (*hw->f_mac_write)(hw, 792 tmp, 793 IPN3KE_25G_RX_STATISTICS_CONFIG, 794 port_id, 795 0); 796 797 /*Number of transmitted frames less than 64 bytes 798 *and reporting a CRC error 799 */ 800 statistics = ipn3ke_rpst_read_64bits_statistics_register( 801 IPN3KE_25G_CNTR_TX_FRAGMENTS_LO, 802 IPN3KE_25G_CNTR_TX_FRAGMENTS_HI, 803 hw, port_id); 804 hw_stats->eth.tx_errors += statistics; 805 hw_stats->crc_errors += statistics; 806 807 /*Number of transmitted oversized frames reporting a CRC error*/ 808 statistics = ipn3ke_rpst_read_64bits_statistics_register( 809 IPN3KE_25G_CNTR_TX_JABBERS_LO, 810 IPN3KE_25G_CNTR_TX_JABBERS_HI, 811 hw, port_id); 812 hw_stats->eth.tx_errors += statistics; 813 hw_stats->crc_errors += statistics; 814 815 /* Number of transmitted packets with FCS errors */ 816 statistics = ipn3ke_rpst_read_64bits_statistics_register( 817 IPN3KE_25G_CNTR_TX_FCS_LO, 818 IPN3KE_25G_CNTR_TX_FCS_HI, 819 hw, port_id); 820 hw_stats->eth.tx_errors += statistics; 821 hw_stats->checksum_error += statistics; 822 823 /*Number of transmitted frames with a frame of length at 824 *least 64 reporting a CRC error 825 */ 826 statistics = ipn3ke_rpst_read_64bits_statistics_register( 827 IPN3KE_25G_CNTR_TX_CRCERR_LO, 828 IPN3KE_25G_CNTR_TX_CRCERR_HI, 829 hw, port_id); 830 hw_stats->eth.tx_errors += statistics; 831 hw_stats->crc_errors += statistics; 832 833 /*Number of errored multicast frames transmitted, 834 *excluding control frames 835 */ 836 statistics = ipn3ke_rpst_read_64bits_statistics_register( 837 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO, 838 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI, 839 hw, port_id); 840 hw_stats->eth.tx_errors += statistics; 841 842 /*Number of errored broadcast frames transmitted, 843 *excluding control frames 844 */ 845 statistics = ipn3ke_rpst_read_64bits_statistics_register( 846 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO, 847 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI, 848 hw, port_id); 849 hw_stats->eth.tx_errors += statistics; 850 851 /*Number of errored unicast frames transmitted, 852 *excluding control frames 853 */ 854 statistics = ipn3ke_rpst_read_64bits_statistics_register( 855 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO, 856 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI, 857 hw, port_id); 858 hw_stats->eth.tx_errors += statistics; 859 860 /* Number of errored multicast control frames transmitted */ 861 statistics = ipn3ke_rpst_read_64bits_statistics_register( 862 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO, 863 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI, 864 hw, port_id); 865 hw_stats->eth.tx_errors += statistics; 866 867 /* Number of errored broadcast control frames transmitted */ 868 statistics = ipn3ke_rpst_read_64bits_statistics_register( 869 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO, 870 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI, 871 hw, port_id); 872 hw_stats->eth.tx_errors += statistics; 873 874 /* Number of errored unicast control frames transmitted */ 875 statistics = ipn3ke_rpst_read_64bits_statistics_register( 876 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO, 877 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI, 878 hw, port_id); 879 hw_stats->eth.tx_errors += statistics; 880 881 /* Number of errored pause frames transmitted */ 882 statistics = ipn3ke_rpst_read_64bits_statistics_register( 883 IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO, 884 IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI, 885 hw, port_id); 886 hw_stats->eth.tx_errors += statistics; 887 888 /*Number of 64-byte transmitted frames, 889 *including the CRC field but excluding the preamble 890 *and SFD bytes 891 */ 892 statistics = ipn3ke_rpst_read_64bits_statistics_register( 893 IPN3KE_25G_CNTR_TX_64B_LO, 894 IPN3KE_25G_CNTR_TX_64B_HI, 895 hw, port_id); 896 hw_stats->tx_size_64 += statistics; 897 898 /* Number of transmitted frames between 65 and 127 bytes */ 899 statistics = ipn3ke_rpst_read_64bits_statistics_register( 900 IPN3KE_25G_CNTR_TX_65_127B_LO, 901 IPN3KE_25G_CNTR_TX_65_127B_HI, 902 hw, port_id); 903 hw_stats->tx_size_65_127 += statistics; 904 905 /* Number of transmitted frames between 128 and 255 bytes */ 906 statistics = ipn3ke_rpst_read_64bits_statistics_register( 907 IPN3KE_25G_CNTR_TX_128_255B_LO, 908 IPN3KE_25G_CNTR_TX_128_255B_HI, 909 hw, port_id); 910 hw_stats->tx_size_128_255 += statistics; 911 912 /* Number of transmitted frames between 256 and 511 bytes */ 913 statistics = ipn3ke_rpst_read_64bits_statistics_register( 914 IPN3KE_25G_CNTR_TX_256_511B_LO, 915 IPN3KE_25G_CNTR_TX_256_511B_HI, 916 hw, port_id); 917 hw_stats->tx_size_256_511 += statistics; 918 919 /* Number of transmitted frames between 512 and 1023 bytes */ 920 statistics = ipn3ke_rpst_read_64bits_statistics_register( 921 IPN3KE_25G_CNTR_TX_512_1023B_LO, 922 IPN3KE_25G_CNTR_TX_512_1023B_HI, 923 hw, port_id); 924 hw_stats->tx_size_512_1023 += statistics; 925 926 /* Number of transmitted frames between 1024 and 1518 bytes */ 927 statistics = ipn3ke_rpst_read_64bits_statistics_register( 928 IPN3KE_25G_CNTR_TX_1024_1518B_LO, 929 IPN3KE_25G_CNTR_TX_1024_1518B_HI, 930 hw, port_id); 931 hw_stats->tx_size_1024_1518 += statistics; 932 933 /*Number of transmitted frames of size between 1519 bytes 934 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG 935 *register 936 */ 937 statistics = ipn3ke_rpst_read_64bits_statistics_register( 938 IPN3KE_25G_CNTR_TX_1519_MAXB_LO, 939 IPN3KE_25G_CNTR_TX_1519_MAXB_HI, 940 hw, port_id); 941 hw_stats->tx_size_1519_to_max += statistics; 942 943 /*Number of oversized frames (frames with more bytes than the 944 *number specified in the MAX_TX_SIZE_CONFIG register) 945 *transmitted 946 */ 947 statistics = ipn3ke_rpst_read_64bits_statistics_register( 948 IPN3KE_25G_CNTR_TX_OVERSIZE_LO, 949 IPN3KE_25G_CNTR_TX_OVERSIZE_HI, 950 hw, port_id); 951 952 /*Number of valid multicast frames transmitted, 953 *excluding control frames 954 */ 955 statistics = ipn3ke_rpst_read_64bits_statistics_register( 956 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO, 957 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI, 958 hw, port_id); 959 hw_stats->eth.tx_multicast += statistics; 960 961 /*Number of valid broadcast frames transmitted, 962 *excluding control frames 963 */ 964 statistics = ipn3ke_rpst_read_64bits_statistics_register( 965 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO, 966 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI, 967 hw, port_id); 968 hw_stats->eth.tx_broadcast += statistics; 969 970 /*Number of valid unicast frames transmitted, 971 *excluding control frames 972 */ 973 statistics = ipn3ke_rpst_read_64bits_statistics_register( 974 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO, 975 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI, 976 hw, port_id); 977 hw_stats->eth.tx_unicast += statistics; 978 979 /*Number of valid multicast frames transmitted, 980 *excluding data frames 981 */ 982 statistics = ipn3ke_rpst_read_64bits_statistics_register( 983 IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO, 984 IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI, 985 hw, port_id); 986 hw_stats->eth.tx_multicast += statistics; 987 988 /*Number of valid broadcast frames transmitted, 989 *excluding data frames 990 */ 991 statistics = ipn3ke_rpst_read_64bits_statistics_register( 992 IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO, 993 IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI, 994 hw, port_id); 995 hw_stats->eth.tx_broadcast += statistics; 996 997 /*Number of valid unicast frames transmitted, 998 *excluding data frames 999 */ 1000 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1001 IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO, 1002 IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI, 1003 hw, port_id); 1004 hw_stats->eth.tx_unicast += statistics; 1005 1006 /* Number of valid pause frames transmitted */ 1007 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1008 IPN3KE_25G_CNTR_TX_PAUSE_LO, 1009 IPN3KE_25G_CNTR_TX_PAUSE_HI, 1010 hw, port_id); 1011 1012 /*Number of transmitted runt packets. The IP core does not 1013 *transmit frames of length less than nine bytes. 1014 *The IP core pads frames of length nine bytes to 64 bytes to 1015 *extend them to 64 bytes. Therefore, this counter does not 1016 *increment in normal operating conditions. 1017 */ 1018 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1019 IPN3KE_25G_CNTR_TX_RUNT_LO, 1020 IPN3KE_25G_CNTR_TX_RUNT_HI, 1021 hw, port_id); 1022 1023 /*Number of transmitted payload bytes in frames with no FCS, 1024 *undersized, oversized, or payload length errors. 1025 *If VLAN detection is turned off for the TX MAC (bit[1] 1026 *of the TX_MAC_CONTROL register at offset 0x40A has 1027 *the value of 1), the IP core counts the VLAN header bytes 1028 *(4 bytes for VLAN and 8 bytes for stacked VLAN) 1029 *as payload bytes. This register is compliant with 1030 *the requirements for aOctetsTransmittedOK in section 1031 *5.2.2.1.8 of the IEEE Standard 802.3-2008. 1032 */ 1033 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1034 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO, 1035 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI, 1036 hw, port_id); 1037 hw_stats->eth.tx_bytes += statistics; 1038 1039 /*Number of transmitted bytes in frames with no FCS, undersized, 1040 *oversized, or payload length errors. This register is 1041 *compliant with the requirements for ifOutOctets in RFC3635 1042 *(Managed Objects for Ethernet-like Interface Types) 1043 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring 1044 *Management Information Base (RMON)). 1045 */ 1046 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1047 IPN3KE_25G_TX_FRAME_OCTETS_OK_LO, 1048 IPN3KE_25G_TX_FRAME_OCTETS_OK_HI, 1049 hw, port_id); 1050 1051 /*Number of received frames less than 64 bytes 1052 *and reporting a CRC error 1053 */ 1054 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1055 IPN3KE_25G_CNTR_RX_FRAGMENTS_LO, 1056 IPN3KE_25G_CNTR_RX_FRAGMENTS_HI, 1057 hw, port_id); 1058 hw_stats->eth.rx_discards += statistics; 1059 hw_stats->crc_errors += statistics; 1060 hw_stats->rx_length_errors += statistics; 1061 1062 /* Number of received oversized frames reporting a CRC error */ 1063 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1064 IPN3KE_25G_CNTR_RX_JABBERS_LO, 1065 IPN3KE_25G_CNTR_RX_JABBERS_HI, 1066 hw, port_id); 1067 hw_stats->eth.rx_discards += statistics; 1068 hw_stats->crc_errors += statistics; 1069 hw_stats->rx_length_errors += statistics; 1070 1071 /*Number of received packets with FCS errors. 1072 *This register maintains a count of the number of pulses 1073 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal 1074 */ 1075 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1076 IPN3KE_25G_CNTR_RX_FCS_LO, 1077 IPN3KE_25G_CNTR_RX_FCS_HI, 1078 hw, port_id); 1079 hw_stats->eth.rx_discards += statistics; 1080 hw_stats->checksum_error += statistics; 1081 1082 /*Number of received frames with a frame of length at least 64 1083 *with CRC error 1084 */ 1085 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1086 IPN3KE_25G_CNTR_RX_CRCERR_LO, 1087 IPN3KE_25G_CNTR_RX_CRCERR_HI, 1088 hw, port_id); 1089 hw_stats->eth.rx_discards += statistics; 1090 hw_stats->crc_errors += statistics; 1091 1092 /*Number of errored multicast frames received, 1093 *excluding control frames 1094 */ 1095 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1096 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO, 1097 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI, 1098 hw, port_id); 1099 hw_stats->eth.rx_discards += statistics; 1100 1101 /*Number of errored broadcast frames received, 1102 *excluding control frames 1103 */ 1104 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1105 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO, 1106 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI, 1107 hw, port_id); 1108 hw_stats->eth.rx_discards += statistics; 1109 1110 /*Number of errored unicast frames received, 1111 *excluding control frames 1112 */ 1113 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1114 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO, 1115 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI, 1116 hw, port_id); 1117 hw_stats->eth.rx_discards += statistics; 1118 1119 /* Number of errored multicast control frames received */ 1120 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1121 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO, 1122 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI, 1123 hw, port_id); 1124 hw_stats->eth.rx_discards += statistics; 1125 1126 /* Number of errored broadcast control frames received */ 1127 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1128 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO, 1129 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI, 1130 hw, port_id); 1131 hw_stats->eth.rx_discards += statistics; 1132 1133 /* Number of errored unicast control frames received */ 1134 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1135 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO, 1136 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI, 1137 hw, port_id); 1138 hw_stats->eth.rx_discards += statistics; 1139 1140 /* Number of errored pause frames received */ 1141 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1142 IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO, 1143 IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI, 1144 hw, port_id); 1145 hw_stats->eth.rx_discards += statistics; 1146 1147 /*Number of 64-byte received frames, 1148 *including the CRC field but excluding the preamble 1149 *and SFD bytes 1150 */ 1151 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1152 IPN3KE_25G_CNTR_RX_64B_LO, 1153 IPN3KE_25G_CNTR_RX_64B_HI, 1154 hw, port_id); 1155 hw_stats->rx_size_64 += statistics; 1156 1157 /*Number of received frames between 65 and 127 bytes */ 1158 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1159 IPN3KE_25G_CNTR_RX_65_127B_LO, 1160 IPN3KE_25G_CNTR_RX_65_127B_HI, 1161 hw, port_id); 1162 hw_stats->rx_size_65_127 += statistics; 1163 1164 /*Number of received frames between 128 and 255 bytes 1165 */ 1166 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1167 IPN3KE_25G_CNTR_RX_128_255B_LO, 1168 IPN3KE_25G_CNTR_RX_128_255B_HI, 1169 hw, port_id); 1170 hw_stats->rx_size_128_255 += statistics; 1171 1172 /*Number of received frames between 256 and 511 bytes 1173 */ 1174 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1175 IPN3KE_25G_CNTR_RX_256_511B_LO, 1176 IPN3KE_25G_CNTR_RX_256_511B_HI, 1177 hw, port_id); 1178 hw_stats->rx_size_256_511 += statistics; 1179 1180 /*Number of received frames between 512 and 1023 bytes 1181 */ 1182 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1183 IPN3KE_25G_CNTR_RX_512_1023B_LO, 1184 IPN3KE_25G_CNTR_RX_512_1023B_HI, 1185 hw, port_id); 1186 hw_stats->rx_size_512_1023 += statistics; 1187 1188 /*Number of received frames between 1024 and 1518 bytes 1189 */ 1190 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1191 IPN3KE_25G_CNTR_RX_1024_1518B_LO, 1192 IPN3KE_25G_CNTR_RX_1024_1518B_HI, 1193 hw, port_id); 1194 hw_stats->rx_size_1024_1518 += statistics; 1195 1196 /*Number of received frames of size between 1519 bytes 1197 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG 1198 *register 1199 */ 1200 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1201 IPN3KE_25G_CNTR_RX_1519_MAXB_LO, 1202 IPN3KE_25G_CNTR_RX_1519_MAXB_HI, 1203 hw, port_id); 1204 hw_stats->rx_size_big += statistics; 1205 1206 /*Number of oversized frames (frames with more bytes 1207 *than the number specified in the MAX_TX_SIZE_CONFIG register) 1208 *received 1209 */ 1210 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1211 IPN3KE_25G_CNTR_RX_OVERSIZE_LO, 1212 IPN3KE_25G_CNTR_RX_OVERSIZE_HI, 1213 hw, port_id); 1214 hw_stats->rx_jabber += statistics; 1215 1216 /*Number of valid multicast frames received, 1217 *excluding control frames 1218 */ 1219 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1220 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO, 1221 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI, 1222 hw, port_id); 1223 hw_stats->eth.rx_multicast += statistics; 1224 1225 /*Number of valid broadcast frames received, 1226 *excluding control frames 1227 */ 1228 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1229 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO, 1230 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI, 1231 hw, port_id); 1232 hw_stats->eth.rx_broadcast += statistics; 1233 1234 /*Number of valid unicast frames received, 1235 *excluding control frames 1236 */ 1237 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1238 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO, 1239 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI, 1240 hw, port_id); 1241 hw_stats->eth.rx_unicast += statistics; 1242 1243 /*Number of valid multicast frames received, 1244 *excluding data frames 1245 */ 1246 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1247 IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO, 1248 IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI, 1249 hw, port_id); 1250 hw_stats->eth.rx_multicast += statistics; 1251 1252 /*Number of valid broadcast frames received, 1253 *excluding data frames 1254 */ 1255 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1256 IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO, 1257 IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI, 1258 hw, port_id); 1259 hw_stats->eth.rx_broadcast += statistics; 1260 1261 /*Number of valid unicast frames received, 1262 *excluding data frames 1263 */ 1264 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1265 IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO, 1266 IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI, 1267 hw, port_id); 1268 hw_stats->eth.rx_unicast += statistics; 1269 1270 /*Number of received pause frames, with or without error 1271 */ 1272 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1273 IPN3KE_25G_CNTR_RX_PAUSE_LO, 1274 IPN3KE_25G_CNTR_RX_PAUSE_HI, 1275 hw, port_id); 1276 1277 /*Number of received runt packets. A runt is a packet of size 1278 *less than 64 bytes but greater than eight bytes. 1279 *If a packet is eight bytes or smaller, it is considered 1280 *a decoding error and not a runt frame, and the IP core 1281 *does not flag it nor count it as a runt. 1282 */ 1283 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1284 IPN3KE_25G_CNTR_RX_RUNT_LO, 1285 IPN3KE_25G_CNTR_RX_RUNT_HI, 1286 hw, port_id); 1287 1288 /*Number of received payload bytes in frames with no FCS, 1289 *undersized, oversized, or payload length errors. 1290 *If VLAN detection is turned off for the RX MAC (bit [1] of the 1291 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1), 1292 *the IP core counts the VLAN header bytes (4 bytes for VLAN and 1293 *8 bytes for stacked VLAN) as payload bytes. 1294 *This register is compliant with the requirements for 1295 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard 1296 *802.3-2008 1297 */ 1298 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1299 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO, 1300 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI, 1301 hw, port_id); 1302 hw_stats->eth.rx_bytes += statistics; 1303 1304 /*Number of received bytes in frames with no FCS, undersized, 1305 *oversized, or payload length errors. 1306 *This register is compliant with the requirements for 1307 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like 1308 *Interface Types) and RX etherStatsOctets in RFC2819 1309 *(Remote Network Monitoring Management Information Base 1310 *(RMON)). 1311 */ 1312 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1313 IPN3KE_25G_RX_FRAME_OCTETS_OK_LO, 1314 IPN3KE_25G_RX_FRAME_OCTETS_OK_HI, 1315 hw, port_id); 1316 1317 /*resume Tx counter to real time 1318 */ 1319 tmp = 0x00000000; 1320 (*hw->f_mac_read)(hw, 1321 &tmp, 1322 IPN3KE_25G_TX_STATISTICS_CONFIG, 1323 port_id, 1324 0); 1325 tmp &= 0xfffffffb; 1326 (*hw->f_mac_write)(hw, 1327 tmp, 1328 IPN3KE_25G_TX_STATISTICS_CONFIG, 1329 port_id, 1330 0); 1331 1332 /*resume Rx counter to real time 1333 */ 1334 tmp = 0x00000000; 1335 (*hw->f_mac_read)(hw, 1336 &tmp, 1337 IPN3KE_25G_RX_STATISTICS_CONFIG, 1338 port_id, 1339 0); 1340 tmp &= 0xfffffffb; 1341 (*hw->f_mac_write)(hw, 1342 tmp, 1343 IPN3KE_25G_RX_STATISTICS_CONFIG, 1344 port_id, 1345 0); 1346 1347 return 0; 1348 } 1349 1350 static void 1351 ipn3ke_rpst_25g_lineside_tx_stats_reset(struct ipn3ke_hw *hw, 1352 uint16_t port_id) 1353 { 1354 uint32_t tmp = 0x00000001; 1355 /* Bit[0]: Software can set this bit to the value of 1 1356 * to reset all of the TX statistics registers at the same time. 1357 * This bit is selfclearing. 1358 */ 1359 (*hw->f_mac_write)(hw, 1360 tmp, 1361 IPN3KE_25G_TX_STATISTICS_CONFIG, 1362 port_id, 1363 0); 1364 1365 while (tmp & 0x00000001) { 1366 tmp = 0x00000000; 1367 (*hw->f_mac_read)(hw, 1368 &tmp, 1369 IPN3KE_25G_TX_STATISTICS_CONFIG, 1370 port_id, 1371 0); 1372 if (tmp & 0x00000001) 1373 usleep(5); 1374 else 1375 return; 1376 } 1377 } 1378 1379 static void 1380 ipn3ke_rpst_25g_lineside_rx_stats_reset(struct ipn3ke_hw *hw, 1381 uint16_t port_id) 1382 { 1383 uint32_t tmp = 0x00000001; 1384 /* Bit[0]: Software can set this bit to the value of 1 1385 * to reset all of the RX statistics registers at the same time. 1386 * This bit is selfclearing. 1387 */ 1388 (*hw->f_mac_write)(hw, 1389 tmp, 1390 IPN3KE_25G_RX_STATISTICS_CONFIG, 1391 port_id, 1392 0); 1393 1394 while (tmp & 0x00000001) { 1395 tmp = 0x00000000; 1396 (*hw->f_mac_read)(hw, 1397 &tmp, 1398 IPN3KE_25G_RX_STATISTICS_CONFIG, 1399 port_id, 1400 0); 1401 if (tmp & 0x00000001) 1402 usleep(5); 1403 else 1404 return; 1405 } 1406 } 1407 1408 static uint64_t 1409 ipn3ke_rpst_read_36bits_statistics_register(uint32_t addr_lo, 1410 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id) 1411 { 1412 uint32_t statistics_lo = 0x00000000; 1413 uint32_t statistics_hi = 0x00000000; 1414 uint64_t statistics = 0x0000000000000000; 1415 1416 (*hw->f_mac_read)(hw, 1417 &statistics_lo, 1418 addr_lo, 1419 port_id, 1420 0); 1421 (*hw->f_mac_read)(hw, 1422 &statistics_hi, 1423 addr_hi, 1424 port_id, 1425 0); 1426 statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK; 1427 statistics += statistics_hi; 1428 statistics = statistics << IPN3KE_REGISTER_WIDTH; 1429 statistics += statistics_lo; 1430 return statistics; 1431 } 1432 1433 static int 1434 ipn3ke_rpst_read_10g_lineside_stats_registers 1435 (struct ipn3ke_hw *hw, 1436 uint16_t port_id, 1437 struct ipn3ke_rpst_hw_port_stats *hw_stats, 1438 struct rte_eth_stats *stats) 1439 { 1440 uint64_t statistics = 0; 1441 1442 memset(hw_stats, 0, sizeof(*hw_stats)); 1443 memset(stats, 0, sizeof(*stats)); 1444 1445 /*36-bit statistics counter that collects the number of frames 1446 *that are successfully transmitted, including control frames. 1447 */ 1448 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1449 IPN3KE_10G_TX_STATS_FRAME_OK_LO, 1450 IPN3KE_10G_TX_STATS_FRAME_OK_HI, 1451 hw, port_id); 1452 stats->opackets = statistics; 1453 1454 /*36-bit statistics counter that collects the number of frames 1455 *that are successfully received, including control frames. 1456 */ 1457 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1458 IPN3KE_10G_RX_STATS_FRAME_OK_LO, 1459 IPN3KE_10G_RX_STATS_FRAME_OK_HI, 1460 hw, port_id); 1461 stats->ipackets = statistics; 1462 1463 /*36-bit statistics counter that collects the number of frames 1464 *transmitted with error, including control frames. 1465 */ 1466 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1467 IPN3KE_10G_TX_STATS_FRAME_ERR_LO, 1468 IPN3KE_10G_TX_STATS_FRAME_ERR_HI, 1469 hw, port_id); 1470 stats->oerrors = statistics; 1471 hw_stats->eth.tx_errors = statistics; 1472 1473 /*36-bit statistics counter that collects the number of frames 1474 *received with error, including control frames. 1475 */ 1476 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1477 IPN3KE_10G_RX_STATS_FRAME_ERR_LO, 1478 IPN3KE_10G_RX_STATS_FRAME_ERR_HI, 1479 hw, port_id); 1480 stats->ierrors = statistics; 1481 hw_stats->eth.rx_discards = statistics; 1482 1483 /*36-bit statistics counter that collects the number 1484 *of RX frames with CRC error. 1485 */ 1486 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1487 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO, 1488 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI, 1489 hw, port_id); 1490 hw_stats->crc_errors = statistics; 1491 1492 /*64-bit statistics counter that collects the payload length, 1493 *including the bytes in control frames. 1494 *The payload length is the number of data and padding bytes 1495 *transmitted. 1496 *If the tx_vlan_detection[0] register bit is set to 1, 1497 *the VLAN and stacked VLAN tags are counted as part of 1498 *the TX payload. 1499 */ 1500 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1501 IPN3KE_10G_TX_STATS_OCTETS_OK_LO, 1502 IPN3KE_10G_TX_STATS_OCTETS_OK_HI, 1503 hw, port_id); 1504 stats->obytes = statistics; 1505 hw_stats->eth.tx_bytes = statistics; 1506 1507 /*64-bit statistics counter that collects the payload length, 1508 *including the bytes in control frames. 1509 *The payload length is the number of data and padding bytes 1510 *received. 1511 *If the rx_vlan_detection[0] register bit is set to 1, 1512 *the VLAN and stacked VLAN tags are counted as part of 1513 *the RX payload. 1514 */ 1515 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1516 IPN3KE_10G_RX_STATS_OCTETS_OK_LO, 1517 IPN3KE_10G_RX_STATS_OCTETS_OK_HI, 1518 hw, port_id); 1519 stats->ibytes = statistics; 1520 hw_stats->eth.rx_bytes = statistics; 1521 1522 /*36-bit statistics counter that collects the number of 1523 *valid pause frames transmitted. 1524 */ 1525 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1526 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO, 1527 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI, 1528 hw, port_id); 1529 1530 /*36-bit statistics counter that collects the number of 1531 *valid pause frames received. 1532 */ 1533 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1534 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO, 1535 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI, 1536 hw, port_id); 1537 1538 /*36-bit statistics counter that collects the number of frames 1539 *transmitted that are invalid and with error. 1540 */ 1541 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1542 IPN3KE_10G_TX_STATS_IF_ERRORS_LO, 1543 IPN3KE_10G_TX_STATS_IF_ERRORS_HI, 1544 hw, port_id); 1545 1546 /*36-bit statistics counter that collects the number of frames 1547 *received that are invalid and with error. 1548 */ 1549 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1550 IPN3KE_10G_RX_STATS_IF_ERRORS_LO, 1551 IPN3KE_10G_RX_STATS_IF_ERRORS_HI, 1552 hw, port_id); 1553 1554 /*36-bit statistics counter that collects the number of 1555 *good unicast frames transmitted, 1556 *excluding control frames. 1557 */ 1558 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1559 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO, 1560 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI, 1561 hw, port_id); 1562 hw_stats->eth.tx_unicast = statistics; 1563 1564 /*36-bit statistics counter that collects the number of 1565 *good unicast frames received, 1566 *excluding control frames. 1567 */ 1568 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1569 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO, 1570 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI, 1571 hw, port_id); 1572 hw_stats->eth.rx_unicast = statistics; 1573 1574 /*36-bit statistics counter that collects the number of 1575 *unicast frames transmitted with error, 1576 *excluding control frames. 1577 */ 1578 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1579 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO, 1580 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI, 1581 hw, port_id); 1582 1583 /*36-bit statistics counter that collects the number of 1584 *unicast frames received with error, 1585 *excluding control frames. 1586 */ 1587 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1588 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO, 1589 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI, 1590 hw, port_id); 1591 1592 /*36-bit statistics counter that collects the number of 1593 *good multicast frames transmitted, 1594 *excluding control frames. 1595 */ 1596 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1597 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO, 1598 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI, 1599 hw, port_id); 1600 hw_stats->eth.tx_multicast = statistics; 1601 1602 /*36-bit statistics counter that collects the number of 1603 *good multicast frames received, 1604 *excluding control frames. 1605 */ 1606 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1607 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO, 1608 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI, 1609 hw, port_id); 1610 hw_stats->eth.rx_multicast = statistics; 1611 1612 /*36-bit statistics counter that collects the number of 1613 *multicast frames transmitted with error, 1614 *excluding control frames. 1615 */ 1616 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1617 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO, 1618 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI, 1619 hw, port_id); 1620 1621 /*36-bit statistics counter that collects the number 1622 *of multicast frames received with error, 1623 *excluding control frames. 1624 */ 1625 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1626 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO, 1627 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI, 1628 hw, port_id); 1629 1630 /*36-bit statistics counter that collects the number of 1631 *good broadcast frames transmitted, 1632 *excluding control frames. 1633 */ 1634 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1635 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO, 1636 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI, 1637 hw, port_id); 1638 hw_stats->eth.tx_broadcast = statistics; 1639 1640 /*36-bit statistics counter that collects the number of 1641 *good broadcast frames received, 1642 *excluding control frames. 1643 */ 1644 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1645 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO, 1646 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI, 1647 hw, port_id); 1648 hw_stats->eth.rx_broadcast = statistics; 1649 1650 /*36-bit statistics counter that collects the number 1651 *of broadcast frames transmitted with error, 1652 *excluding control frames. 1653 */ 1654 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1655 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO, 1656 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI, 1657 hw, port_id); 1658 1659 /*36-bit statistics counter that collects the number of 1660 *broadcast frames received with error, 1661 *excluding control frames. 1662 */ 1663 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1664 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO, 1665 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI, 1666 hw, port_id); 1667 1668 /*64-bit statistics counter that collects the total number of 1669 *octets transmitted. 1670 *This count includes good, errored, and invalid frames. 1671 */ 1672 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1673 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO, 1674 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI, 1675 hw, port_id); 1676 1677 /*64-bit statistics counter that collects the total number of 1678 *octets received. 1679 *This count includes good, errored, and invalid frames. 1680 */ 1681 statistics = ipn3ke_rpst_read_64bits_statistics_register( 1682 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO, 1683 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI, 1684 hw, port_id); 1685 1686 /*36-bit statistics counter that collects the total number of 1687 *good, errored, and invalid frames transmitted. 1688 */ 1689 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1690 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO, 1691 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI, 1692 hw, port_id); 1693 1694 /*36-bit statistics counter that collects the total number of 1695 *good, errored, and invalid frames received. 1696 */ 1697 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1698 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO, 1699 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI, 1700 hw, port_id); 1701 1702 /*36-bit statistics counter that collects the number of 1703 *undersized TX frames. 1704 */ 1705 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1706 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO, 1707 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI, 1708 hw, port_id); 1709 1710 /*36-bit statistics counter that collects the number of 1711 *undersized RX frames. 1712 */ 1713 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1714 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO, 1715 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI, 1716 hw, port_id); 1717 hw_stats->rx_undersize = statistics; 1718 1719 /*36-bit statistics counter that collects the number of 1720 *TX frames whose length exceeds the maximum frame length 1721 *specified. 1722 */ 1723 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1724 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO, 1725 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI, 1726 hw, port_id); 1727 1728 /*36-bit statistics counter that collects the number of 1729 *RX frames whose length exceeds the maximum frame length 1730 *specified. 1731 */ 1732 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1733 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO, 1734 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI, 1735 hw, port_id); 1736 hw_stats->rx_oversize = statistics; 1737 1738 /*36-bit statistics counter that collects the number of 1739 *64-byte TX frames, 1740 *including the CRC field 1741 *but excluding the preamble and SFD bytes. 1742 *This count includes good, errored, and invalid frames. 1743 */ 1744 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1745 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO, 1746 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI, 1747 hw, port_id); 1748 hw_stats->tx_size_64 = statistics; 1749 1750 /*36-bit statistics counter that collects the number of 1751 *64-byte RX frames, 1752 *including the CRC field 1753 *but excluding the preamble and SFD bytes. 1754 *This count includes good, errored, and invalid frames. 1755 */ 1756 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1757 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO, 1758 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI, 1759 hw, port_id); 1760 hw_stats->rx_size_64 = statistics; 1761 1762 /*36-bit statistics counter that collects the number of 1763 *TX frames between the length of 65 and 127 bytes, 1764 *including the CRC field 1765 *but excluding the preamble and SFD bytes. 1766 *This count includes good, errored, and invalid frames. 1767 */ 1768 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1769 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO, 1770 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI, 1771 hw, port_id); 1772 hw_stats->tx_size_65_127 = statistics; 1773 1774 /*36-bit statistics counter that collects the number of 1775 *RX frames between the length of 65 and 127 bytes, 1776 *including the CRC field 1777 *but excluding the preamble and SFD bytes. 1778 *This count includes good, errored, and invalid frames. 1779 */ 1780 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1781 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO, 1782 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI, 1783 hw, port_id); 1784 hw_stats->rx_size_65_127 = statistics; 1785 1786 /*36-bit statistics counter that collects the number of 1787 *TX frames between the length of 128 and 255 bytes, 1788 *including the CRC field 1789 *but excluding the preamble and SFD bytes. 1790 *This count includes good, errored, and invalid frames. 1791 */ 1792 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1793 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO, 1794 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI, 1795 hw, port_id); 1796 hw_stats->tx_size_128_255 = statistics; 1797 1798 /*36-bit statistics counter that collects the number of 1799 *RX frames between the length of 128 and 255 bytes, 1800 *including the CRC field 1801 *but excluding the preamble and SFD bytes. 1802 *This count includes good, errored, and invalid frames. 1803 */ 1804 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1805 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO, 1806 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI, 1807 hw, port_id); 1808 hw_stats->rx_size_128_255 = statistics; 1809 1810 /*36-bit statistics counter that collects the number of 1811 *TX frames between the length of 256 and 511 bytes, 1812 *including the CRC field 1813 *but excluding the preamble and SFD bytes. 1814 *This count includes good, errored, and invalid frames. 1815 */ 1816 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1817 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO, 1818 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI, 1819 hw, port_id); 1820 hw_stats->tx_size_256_511 = statistics; 1821 1822 /*36-bit statistics counter that collects the number of 1823 *RX frames between the length of 256 and 511 bytes, 1824 *including the CRC field 1825 *but excluding the preamble and SFD bytes. 1826 *This count includes good, errored, and invalid frames. 1827 */ 1828 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1829 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO, 1830 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI, 1831 hw, port_id); 1832 hw_stats->rx_size_256_511 = statistics; 1833 1834 /*36-bit statistics counter that collects the number of 1835 *TX frames between the length of 512 and 1023 bytes, 1836 *including the CRC field 1837 *but excluding the preamble and SFD bytes. 1838 *This count includes good, errored, and invalid frames. 1839 */ 1840 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1841 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO, 1842 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI, 1843 hw, port_id); 1844 hw_stats->tx_size_512_1023 = statistics; 1845 1846 /*36-bit statistics counter that collects the number of 1847 *RX frames between the length of 512 and 1023 bytes, 1848 *including the CRC field 1849 *but excluding the preamble and SFD bytes. 1850 *This count includes good, errored, and invalid frames. 1851 */ 1852 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1853 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO, 1854 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI, 1855 hw, port_id); 1856 hw_stats->rx_size_512_1023 = statistics; 1857 1858 /*36-bit statistics counter that collects the number of 1859 *TX frames between the length of 1024 and 1518 bytes, 1860 *including the CRC field but 1861 *excluding the preamble and SFD bytes. 1862 *This count includes good, errored, and invalid frames. 1863 */ 1864 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1865 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO, 1866 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI, 1867 hw, port_id); 1868 hw_stats->tx_size_1024_1518 = statistics; 1869 1870 /*36-bit statistics counter that collects the number of 1871 *RX frames between the length of 1024 and 1518 bytes, 1872 *including the CRC field 1873 *but excluding the preamble and SFD bytes. 1874 *This count includes good, errored, and invalid frames. 1875 */ 1876 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1877 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO, 1878 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI, 1879 hw, port_id); 1880 hw_stats->rx_size_1024_1518 = statistics; 1881 1882 /*36-bit statistics counter that collects the number of 1883 *TX frames equal or more than the length of 1,519 bytes, 1884 *including the CRC field 1885 *but excluding the preamble and SFD bytes. 1886 *This count includes good, errored, and invalid frames. 1887 */ 1888 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1889 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO, 1890 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI, 1891 hw, port_id); 1892 hw_stats->tx_size_1519_to_max = statistics; 1893 1894 /*36-bit statistics counter that collects the number of 1895 *RX frames equal or more than the length of 1,519 bytes, 1896 *including the CRC field 1897 *but excluding the preamble and SFD bytes. 1898 *This count includes good, 1899 *errored, and invalid frames. 1900 */ 1901 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1902 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO, 1903 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI, 1904 hw, port_id); 1905 hw_stats->rx_size_big = statistics; 1906 1907 /*36-bit statistics counter that collects the total number of 1908 *RX frames with length less than 64 bytes and CRC error. 1909 *The MAC does not drop these frames. 1910 */ 1911 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1912 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO, 1913 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI, 1914 hw, port_id); 1915 1916 /*36-bit statistics counter that collects the number of 1917 *oversized RX frames with CRC error. 1918 *The MAC does not drop these frames. 1919 */ 1920 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1921 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO, 1922 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI, 1923 hw, port_id); 1924 1925 /*36-bit statistics counter that collects the number of 1926 *RX frames with CRC error, 1927 *whose length is between 64 and the maximum frame length 1928 *specified in the register. 1929 *The MAC does not drop these frames. 1930 */ 1931 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1932 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO, 1933 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI, 1934 hw, port_id); 1935 1936 /*36-bit statistics counter that collects the number of 1937 *valid TX unicast control frames. 1938 */ 1939 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1940 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO, 1941 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI, 1942 hw, port_id); 1943 hw_stats->eth.tx_unicast += statistics; 1944 1945 /*36-bit statistics counter that collects the number of 1946 *valid RX unicast control frames. 1947 */ 1948 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1949 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO, 1950 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI, 1951 hw, port_id); 1952 hw_stats->eth.rx_unicast += statistics; 1953 1954 /*36-bit statistics counter that collects the number of 1955 *valid TX multicast control frames. 1956 */ 1957 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1958 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO, 1959 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI, 1960 hw, port_id); 1961 hw_stats->eth.tx_multicast += statistics; 1962 1963 /*36-bit statistics counter that collects the number of 1964 *valid RX multicast control frames. 1965 */ 1966 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1967 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO, 1968 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI, 1969 hw, port_id); 1970 hw_stats->eth.rx_multicast += statistics; 1971 1972 /*36-bit statistics counter that collects the number of 1973 *valid TX broadcast control frames. 1974 */ 1975 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1976 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO, 1977 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI, 1978 hw, port_id); 1979 hw_stats->eth.tx_broadcast += statistics; 1980 1981 /*36-bit statistics counter that collects the number of 1982 *valid RX broadcast control frames. 1983 */ 1984 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1985 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO, 1986 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI, 1987 hw, port_id); 1988 hw_stats->eth.rx_broadcast += statistics; 1989 1990 /*36-bit statistics counter that collects the number of 1991 *valid TX PFC frames. 1992 */ 1993 statistics = ipn3ke_rpst_read_36bits_statistics_register( 1994 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO, 1995 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI, 1996 hw, port_id); 1997 1998 /*36-bit statistics counter that collects the number of 1999 *valid RX PFC frames. 2000 */ 2001 statistics = ipn3ke_rpst_read_36bits_statistics_register( 2002 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO, 2003 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI, 2004 hw, port_id); 2005 2006 return 0; 2007 } 2008 2009 static void 2010 ipn3ke_rpst_10g_lineside_tx_stats_reset(struct ipn3ke_hw *hw, 2011 uint16_t port_id) 2012 { 2013 uint32_t tmp; 2014 2015 /*Bit [0]: Set this register to 1 to clear all TX statistics 2016 *counters. 2017 *The IP core clears this bit when all counters are cleared. 2018 *Bits [31:1]: Reserved. 2019 */ 2020 tmp = 0x00000000; 2021 (*hw->f_mac_read)(hw, 2022 &tmp, 2023 IPN3KE_10G_TX_STATS_CLR, 2024 port_id, 2025 0); 2026 tmp |= 0x00000001; 2027 (*hw->f_mac_write)(hw, 2028 tmp, 2029 IPN3KE_10G_TX_STATS_CLR, 2030 port_id, 2031 0); 2032 } 2033 2034 static void 2035 ipn3ke_rpst_10g_lineside_rx_stats_reset(struct ipn3ke_hw *hw, 2036 uint16_t port_id) 2037 { 2038 uint32_t tmp; 2039 2040 /*Bit [0]: Set this register to 1 to clear all RX statistics 2041 *counters. 2042 *The IP core clears this bit when all counters are cleared. 2043 *Bits [31:1]: Reserved 2044 */ 2045 tmp = 0x00000000; 2046 (*hw->f_mac_read)(hw, 2047 &tmp, 2048 IPN3KE_10G_RX_STATS_CLR, 2049 port_id, 2050 0); 2051 tmp |= 0x00000001; 2052 (*hw->f_mac_write)(hw, 2053 tmp, 2054 IPN3KE_10G_RX_STATS_CLR, 2055 port_id, 2056 0); 2057 } 2058 2059 static int 2060 ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev) 2061 { 2062 uint16_t port_id = 0; 2063 char *ch; 2064 int cnt = 0; 2065 struct rte_afu_device *afu_dev = NULL; 2066 struct ipn3ke_hw *hw = NULL; 2067 2068 if (!ethdev) { 2069 IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!"); 2070 return -EINVAL; 2071 } 2072 2073 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev); 2074 if (!afu_dev) { 2075 IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!"); 2076 return -EINVAL; 2077 } 2078 2079 if (!afu_dev->shared.data) { 2080 IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!"); 2081 return -EINVAL; 2082 } 2083 2084 hw = afu_dev->shared.data; 2085 2086 ch = ethdev->data->name; 2087 if (!ch) { 2088 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!"); 2089 return -EINVAL; 2090 } 2091 while (ch) { 2092 if (*ch == '_') 2093 cnt++; 2094 ch++; 2095 if (cnt == 3) 2096 break; 2097 } 2098 if (!ch) { 2099 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!"); 2100 return -EINVAL; 2101 } 2102 port_id = atoi(ch); 2103 2104 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { 2105 ipn3ke_rpst_25g_nic_side_tx_stats_reset(hw, port_id); 2106 ipn3ke_rpst_25g_nic_side_rx_stats_reset(hw, port_id); 2107 ipn3ke_rpst_25g_lineside_tx_stats_reset(hw, port_id); 2108 ipn3ke_rpst_25g_lineside_rx_stats_reset(hw, port_id); 2109 } else if (hw->retimer.mac_type == 2110 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 2111 ipn3ke_rpst_10g_nic_side_tx_stats_reset(hw, port_id); 2112 ipn3ke_rpst_10g_nic_side_rx_stats_reset(hw, port_id); 2113 ipn3ke_rpst_10g_lineside_tx_stats_reset(hw, port_id); 2114 ipn3ke_rpst_10g_lineside_rx_stats_reset(hw, port_id); 2115 } 2116 2117 return 0; 2118 } 2119 2120 static int 2121 ipn3ke_rpst_stats_get 2122 (struct rte_eth_dev *ethdev, struct rte_eth_stats *stats) 2123 { 2124 uint16_t port_id = 0; 2125 char *ch; 2126 int cnt = 0; 2127 int i = 0; 2128 struct rte_afu_device *afu_dev = NULL; 2129 struct ipn3ke_hw *hw = NULL; 2130 struct ipn3ke_rpst_hw_port_stats hw_stats; 2131 2132 if (!ethdev) { 2133 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL"); 2134 return -EINVAL; 2135 } 2136 if (!stats) { 2137 IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!"); 2138 return -EINVAL; 2139 } 2140 2141 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev); 2142 if (!afu_dev) { 2143 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!"); 2144 return -EINVAL; 2145 } 2146 2147 if (!afu_dev->shared.data) { 2148 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!"); 2149 return -EINVAL; 2150 } 2151 2152 hw = afu_dev->shared.data; 2153 2154 ch = ethdev->data->name; 2155 if (!ch) { 2156 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!"); 2157 return -EINVAL; 2158 } 2159 while (ch) { 2160 if (*ch == '_') 2161 cnt++; 2162 ch++; 2163 if (cnt == 3) 2164 break; 2165 } 2166 if (!ch) { 2167 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!"); 2168 return -EINVAL; 2169 } 2170 port_id = atoi(ch); 2171 2172 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { 2173 ipn3ke_rpst_read_25g_lineside_stats_registers(hw, 2174 port_id, 2175 &hw_stats); 2176 2177 stats->ipackets = hw_stats.rx_size_64 2178 + hw_stats.rx_size_65_127 2179 + hw_stats.rx_size_128_255 2180 + hw_stats.rx_size_256_511 2181 + hw_stats.rx_size_512_1023 2182 + hw_stats.rx_size_1024_1518 2183 + hw_stats.rx_size_big 2184 + hw_stats.rx_undersize 2185 + hw_stats.rx_fragments 2186 + hw_stats.rx_oversize 2187 + hw_stats.rx_jabber; 2188 stats->opackets = hw_stats.tx_size_64 2189 + hw_stats.tx_size_65_127 2190 + hw_stats.tx_size_128_255 2191 + hw_stats.tx_size_256_511 2192 + hw_stats.tx_size_512_1023 2193 + hw_stats.tx_size_1024_1518 2194 + hw_stats.tx_size_1519_to_max; 2195 stats->ibytes = hw_stats.eth.rx_bytes; 2196 stats->obytes = hw_stats.eth.tx_bytes; 2197 stats->imissed = 0; 2198 stats->ierrors = hw_stats.eth.rx_discards 2199 + hw_stats.eth.rx_unknown_protocol; 2200 stats->oerrors = hw_stats.eth.tx_discards 2201 + hw_stats.eth.tx_errors; 2202 stats->rx_nombuf = 0; 2203 for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) { 2204 stats->q_ipackets[i] = 0; 2205 stats->q_opackets[i] = 0; 2206 stats->q_ibytes[i] = 0; 2207 stats->q_obytes[i] = 0; 2208 stats->q_errors[i] = 0; 2209 } 2210 } else { 2211 ipn3ke_rpst_read_10g_lineside_stats_registers(hw, 2212 port_id, 2213 &hw_stats, 2214 stats); 2215 } 2216 2217 return 0; 2218 } 2219 2220 static int 2221 ipn3ke_rpst_xstats_get 2222 (struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n) 2223 { 2224 uint16_t port_id = 0; 2225 char *ch = NULL; 2226 int cnt = 0; 2227 unsigned int i, count, prio; 2228 struct rte_afu_device *afu_dev = NULL; 2229 struct ipn3ke_hw *hw = NULL; 2230 struct ipn3ke_rpst_hw_port_stats hw_stats; 2231 struct rte_eth_stats stats; 2232 2233 if (!ethdev) { 2234 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL"); 2235 return -EINVAL; 2236 } 2237 2238 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev); 2239 if (!afu_dev) { 2240 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!"); 2241 return -EINVAL; 2242 } 2243 2244 if (!afu_dev->shared.data) { 2245 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!"); 2246 return -EINVAL; 2247 } 2248 2249 hw = afu_dev->shared.data; 2250 2251 ch = ethdev->data->name; 2252 if (!ch) { 2253 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!"); 2254 return -EINVAL; 2255 } 2256 while (ch) { 2257 if (*ch == '_') 2258 cnt++; 2259 ch++; 2260 if (cnt == 3) 2261 break; 2262 } 2263 if (!ch) { 2264 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!"); 2265 return -EINVAL; 2266 } 2267 port_id = atoi(ch); 2268 2269 count = ipn3ke_rpst_xstats_calc_num(); 2270 if (n < count) 2271 return count; 2272 2273 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { 2274 ipn3ke_rpst_read_25g_lineside_stats_registers(hw, 2275 port_id, 2276 &hw_stats); 2277 } else { 2278 ipn3ke_rpst_read_10g_lineside_stats_registers(hw, 2279 port_id, 2280 &hw_stats, 2281 &stats); 2282 } 2283 2284 count = 0; 2285 2286 /* Get stats from ipn3ke_rpst_stats */ 2287 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) { 2288 xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth) 2289 + ipn3ke_rpst_stats_strings[i].offset); 2290 xstats[count].id = count; 2291 count++; 2292 } 2293 2294 /* Get individual stats from ipn3ke_rpst_hw_port */ 2295 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) { 2296 xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) + 2297 ipn3ke_rpst_hw_port_strings[i].offset); 2298 xstats[count].id = count; 2299 count++; 2300 } 2301 2302 /* Get individual stats from ipn3ke_rpst_rxq_pri */ 2303 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) { 2304 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) { 2305 xstats[count].value = 2306 *(uint64_t *)(((char *)(&hw_stats)) + 2307 ipn3ke_rpst_rxq_prio_strings[i].offset + 2308 (sizeof(uint64_t) * prio)); 2309 xstats[count].id = count; 2310 count++; 2311 } 2312 } 2313 2314 /* Get individual stats from ipn3ke_rpst_txq_prio */ 2315 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) { 2316 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) { 2317 xstats[count].value = 2318 *(uint64_t *)(((char *)(&hw_stats)) + 2319 ipn3ke_rpst_txq_prio_strings[i].offset + 2320 (sizeof(uint64_t) * prio)); 2321 xstats[count].id = count; 2322 count++; 2323 } 2324 } 2325 2326 return count; 2327 } 2328 2329 static int 2330 ipn3ke_rpst_xstats_get_names 2331 (__rte_unused struct rte_eth_dev *dev, 2332 struct rte_eth_xstat_name *xstats_names, 2333 __rte_unused unsigned int limit) 2334 { 2335 unsigned int count = 0; 2336 unsigned int i, prio; 2337 2338 if (!xstats_names) 2339 return ipn3ke_rpst_xstats_calc_num(); 2340 2341 /* Note: limit checked in rte_eth_xstats_names() */ 2342 2343 /* Get stats from ipn3ke_rpst_stats */ 2344 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) { 2345 snprintf(xstats_names[count].name, 2346 sizeof(xstats_names[count].name), 2347 "%s", 2348 ipn3ke_rpst_stats_strings[i].name); 2349 count++; 2350 } 2351 2352 /* Get individual stats from ipn3ke_rpst_hw_port */ 2353 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) { 2354 snprintf(xstats_names[count].name, 2355 sizeof(xstats_names[count].name), 2356 "%s", 2357 ipn3ke_rpst_hw_port_strings[i].name); 2358 count++; 2359 } 2360 2361 /* Get individual stats from ipn3ke_rpst_rxq_pri */ 2362 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) { 2363 for (prio = 0; prio < 8; prio++) { 2364 snprintf(xstats_names[count].name, 2365 sizeof(xstats_names[count].name), 2366 "rx_priority%u_%s", 2367 prio, 2368 ipn3ke_rpst_rxq_prio_strings[i].name); 2369 count++; 2370 } 2371 } 2372 2373 /* Get individual stats from ipn3ke_rpst_txq_prio */ 2374 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) { 2375 for (prio = 0; prio < 8; prio++) { 2376 snprintf(xstats_names[count].name, 2377 sizeof(xstats_names[count].name), 2378 "tx_priority%u_%s", 2379 prio, 2380 ipn3ke_rpst_txq_prio_strings[i].name); 2381 count++; 2382 } 2383 } 2384 return count; 2385 } 2386 2387 static void 2388 ipn3ke_update_link(struct rte_rawdev *rawdev, 2389 uint16_t port, struct rte_eth_link *link) 2390 { 2391 uint64_t line_link_bitmap = 0; 2392 enum ifpga_rawdev_link_speed link_speed; 2393 2394 rawdev->dev_ops->attr_get(rawdev, 2395 "LineSideLinkStatus", 2396 (uint64_t *)&line_link_bitmap); 2397 2398 /* Parse the link status */ 2399 if ((1 << port) & line_link_bitmap) 2400 link->link_status = 1; 2401 else 2402 link->link_status = 0; 2403 2404 IPN3KE_AFU_PMD_DEBUG("port is %d", port); 2405 IPN3KE_AFU_PMD_DEBUG("link->link_status is %d", link->link_status); 2406 2407 rawdev->dev_ops->attr_get(rawdev, 2408 "LineSideLinkSpeed", 2409 (uint64_t *)&link_speed); 2410 switch (link_speed) { 2411 case IFPGA_RAWDEV_LINK_SPEED_10GB: 2412 link->link_speed = RTE_ETH_SPEED_NUM_10G; 2413 break; 2414 case IFPGA_RAWDEV_LINK_SPEED_25GB: 2415 link->link_speed = RTE_ETH_SPEED_NUM_25G; 2416 break; 2417 default: 2418 IPN3KE_AFU_PMD_ERR("Unknown link speed info %u", link_speed); 2419 break; 2420 } 2421 } 2422 2423 /* 2424 * Set device link up. 2425 */ 2426 int 2427 ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev *dev) 2428 { 2429 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev); 2430 struct rte_eth_dev *pf; 2431 int ret = 0; 2432 2433 if (rpst->i40e_pf_eth) { 2434 ret = rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id); 2435 pf = rpst->i40e_pf_eth; 2436 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1); 2437 } 2438 2439 return ret; 2440 } 2441 2442 /* 2443 * Set device link down. 2444 */ 2445 int 2446 ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev *dev) 2447 { 2448 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev); 2449 struct rte_eth_dev *pf; 2450 int ret = 0; 2451 2452 if (rpst->i40e_pf_eth) { 2453 ret = rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id); 2454 pf = rpst->i40e_pf_eth; 2455 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1); 2456 } 2457 2458 return ret; 2459 } 2460 2461 int 2462 ipn3ke_rpst_link_update(struct rte_eth_dev *ethdev, 2463 __rte_unused int wait_to_complete) 2464 { 2465 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 2466 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2467 struct rte_rawdev *rawdev; 2468 struct rte_eth_link link; 2469 struct rte_eth_dev *pf; 2470 2471 memset(&link, 0, sizeof(link)); 2472 2473 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX; 2474 link.link_autoneg = !(ethdev->data->dev_conf.link_speeds & 2475 RTE_ETH_LINK_SPEED_FIXED); 2476 2477 rawdev = hw->rawdev; 2478 ipn3ke_update_link(rawdev, rpst->port_id, &link); 2479 2480 if (!rpst->ori_linfo.link_status && 2481 link.link_status) { 2482 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Up", rpst->port_id); 2483 rpst->ori_linfo.link_status = link.link_status; 2484 rpst->ori_linfo.link_speed = link.link_speed; 2485 2486 rte_eth_linkstatus_set(ethdev, &link); 2487 2488 if (rpst->i40e_pf_eth) { 2489 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Up", 2490 rpst->i40e_pf_eth_port_id); 2491 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id); 2492 pf = rpst->i40e_pf_eth; 2493 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1); 2494 } 2495 } else if (rpst->ori_linfo.link_status && 2496 !link.link_status) { 2497 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Down", 2498 rpst->port_id); 2499 rpst->ori_linfo.link_status = link.link_status; 2500 rpst->ori_linfo.link_speed = link.link_speed; 2501 2502 rte_eth_linkstatus_set(ethdev, &link); 2503 2504 if (rpst->i40e_pf_eth) { 2505 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Down", 2506 rpst->i40e_pf_eth_port_id); 2507 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id); 2508 pf = rpst->i40e_pf_eth; 2509 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1); 2510 } 2511 } 2512 2513 return 0; 2514 } 2515 2516 static int 2517 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst) 2518 { 2519 struct ipn3ke_hw *hw; 2520 struct rte_rawdev *rawdev; 2521 struct rte_eth_link link; 2522 struct rte_eth_dev *pf; 2523 2524 if (rpst == NULL) 2525 return -1; 2526 2527 hw = rpst->hw; 2528 2529 memset(&link, 0, sizeof(link)); 2530 2531 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX; 2532 link.link_autoneg = !(rpst->ethdev->data->dev_conf.link_speeds & 2533 RTE_ETH_LINK_SPEED_FIXED); 2534 2535 rawdev = hw->rawdev; 2536 ipn3ke_update_link(rawdev, rpst->port_id, &link); 2537 2538 if (!rpst->ori_linfo.link_status && 2539 link.link_status) { 2540 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Up", rpst->port_id); 2541 rpst->ori_linfo.link_status = link.link_status; 2542 rpst->ori_linfo.link_speed = link.link_speed; 2543 2544 rte_eth_linkstatus_set(rpst->ethdev, &link); 2545 2546 if (rpst->i40e_pf_eth) { 2547 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Up", 2548 rpst->i40e_pf_eth_port_id); 2549 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id); 2550 pf = rpst->i40e_pf_eth; 2551 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1); 2552 } 2553 } else if (rpst->ori_linfo.link_status && 2554 !link.link_status) { 2555 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Down", rpst->port_id); 2556 rpst->ori_linfo.link_status = link.link_status; 2557 rpst->ori_linfo.link_speed = link.link_speed; 2558 2559 rte_eth_linkstatus_set(rpst->ethdev, &link); 2560 2561 if (rpst->i40e_pf_eth) { 2562 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Down", 2563 rpst->i40e_pf_eth_port_id); 2564 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id); 2565 pf = rpst->i40e_pf_eth; 2566 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1); 2567 } 2568 } 2569 2570 return 0; 2571 } 2572 2573 static uint32_t 2574 ipn3ke_rpst_scan_handle_request(__rte_unused void *param) 2575 { 2576 struct ipn3ke_rpst *rpst; 2577 int num = 0; 2578 #define MS 1000 2579 #define SCAN_NUM 32 2580 2581 for (;;) { 2582 num = 0; 2583 TAILQ_FOREACH(rpst, &ipn3ke_rpst_list, next) { 2584 if (rpst->i40e_pf_eth && 2585 rpst->ethdev->data->dev_started && 2586 rpst->i40e_pf_eth->data->dev_started) 2587 ipn3ke_rpst_link_check(rpst); 2588 2589 if (++num > SCAN_NUM) 2590 rte_delay_us(1 * MS); 2591 } 2592 rte_delay_us(50 * MS); 2593 2594 if (num == 0 || num == 0xffffff) 2595 return 0; 2596 } 2597 2598 return 0; 2599 } 2600 2601 static int 2602 ipn3ke_rpst_scan_check(void) 2603 { 2604 int ret; 2605 2606 if (ipn3ke_rpst_scan_num == 1) { 2607 ret = rte_thread_create_internal_control(&ipn3ke_rpst_scan_thread, 2608 "ipn3ke-scn", 2609 ipn3ke_rpst_scan_handle_request, NULL); 2610 if (ret) { 2611 IPN3KE_AFU_PMD_ERR("Fail to create ipn3ke rpst scan thread"); 2612 return -1; 2613 } 2614 } else if (ipn3ke_rpst_scan_num == 0) { 2615 ret = pthread_cancel((pthread_t)ipn3ke_rpst_scan_thread.opaque_id); 2616 if (ret) 2617 IPN3KE_AFU_PMD_ERR("Can't cancel the thread"); 2618 2619 ret = rte_thread_join(ipn3ke_rpst_scan_thread, NULL); 2620 if (ret) 2621 IPN3KE_AFU_PMD_ERR("Can't join the thread"); 2622 2623 return ret; 2624 } 2625 2626 return 0; 2627 } 2628 2629 int 2630 ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev *ethdev) 2631 { 2632 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 2633 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2634 uint32_t rddata, val; 2635 2636 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 2637 /* Enable all unicast */ 2638 (*hw->f_mac_read)(hw, 2639 &rddata, 2640 IPN3KE_MAC_RX_FRAME_CONTROL, 2641 rpst->port_id, 2642 0); 2643 val = 1; 2644 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK; 2645 val |= rddata; 2646 (*hw->f_mac_write)(hw, 2647 val, 2648 IPN3KE_MAC_RX_FRAME_CONTROL, 2649 rpst->port_id, 2650 0); 2651 } 2652 2653 return 0; 2654 } 2655 2656 int 2657 ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev *ethdev) 2658 { 2659 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 2660 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2661 uint32_t rddata, val; 2662 2663 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 2664 /* Disable all unicast */ 2665 (*hw->f_mac_read)(hw, 2666 &rddata, 2667 IPN3KE_MAC_RX_FRAME_CONTROL, 2668 rpst->port_id, 2669 0); 2670 val = 0; 2671 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK; 2672 val |= rddata; 2673 (*hw->f_mac_write)(hw, 2674 val, 2675 IPN3KE_MAC_RX_FRAME_CONTROL, 2676 rpst->port_id, 2677 0); 2678 } 2679 2680 return 0; 2681 } 2682 2683 int 2684 ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev *ethdev) 2685 { 2686 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 2687 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2688 uint32_t rddata, val; 2689 2690 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 2691 /* Enable all unicast */ 2692 (*hw->f_mac_read)(hw, 2693 &rddata, 2694 IPN3KE_MAC_RX_FRAME_CONTROL, 2695 rpst->port_id, 2696 0); 2697 val = 1; 2698 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT; 2699 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK; 2700 val |= rddata; 2701 (*hw->f_mac_write)(hw, 2702 val, 2703 IPN3KE_MAC_RX_FRAME_CONTROL, 2704 rpst->port_id, 2705 0); 2706 } 2707 2708 return 0; 2709 } 2710 2711 int 2712 ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev *ethdev) 2713 { 2714 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 2715 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2716 uint32_t rddata, val; 2717 2718 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 2719 /* Disable all unicast */ 2720 (*hw->f_mac_read)(hw, 2721 &rddata, 2722 IPN3KE_MAC_RX_FRAME_CONTROL, 2723 rpst->port_id, 2724 0); 2725 val = 0; 2726 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT; 2727 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK; 2728 val |= rddata; 2729 (*hw->f_mac_write)(hw, 2730 val, 2731 IPN3KE_MAC_RX_FRAME_CONTROL, 2732 rpst->port_id, 2733 0); 2734 } 2735 2736 return 0; 2737 } 2738 2739 int 2740 ipn3ke_rpst_mac_addr_set(struct rte_eth_dev *ethdev, 2741 struct rte_ether_addr *mac_addr) 2742 { 2743 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 2744 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2745 uint32_t val; 2746 2747 if (!rte_is_valid_assigned_ether_addr(mac_addr)) { 2748 IPN3KE_AFU_PMD_ERR("Tried to set invalid MAC address."); 2749 return -EINVAL; 2750 } 2751 2752 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { 2753 rte_ether_addr_copy(&mac_addr[0], &rpst->mac_addr); 2754 2755 /* Set mac address */ 2756 rte_memcpy(((char *)(&val)), &mac_addr[0], sizeof(uint32_t)); 2757 (*hw->f_mac_write)(hw, 2758 val, 2759 IPN3KE_MAC_PRIMARY_MAC_ADDR0, 2760 rpst->port_id, 2761 0); 2762 rte_memcpy(((char *)(&val)), &mac_addr[4], sizeof(uint16_t)); 2763 (*hw->f_mac_write)(hw, 2764 val, 2765 IPN3KE_MAC_PRIMARY_MAC_ADDR0, 2766 rpst->port_id, 2767 0); 2768 } 2769 2770 return 0; 2771 } 2772 2773 int 2774 ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu) 2775 { 2776 int ret = 0; 2777 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2778 struct rte_eth_dev_data *dev_data = ethdev->data; 2779 2780 /* mtu setting is forbidden if port is start */ 2781 /* make sure NIC port is stopped */ 2782 if (rpst->i40e_pf_eth && rpst->i40e_pf_eth->data->dev_started) { 2783 IPN3KE_AFU_PMD_ERR("NIC port %d must " 2784 "be stopped before configuration", 2785 rpst->i40e_pf_eth->data->port_id); 2786 return -EBUSY; 2787 } 2788 /* mtu setting is forbidden if port is start */ 2789 if (dev_data->dev_started) { 2790 IPN3KE_AFU_PMD_ERR("FPGA port %d must " 2791 "be stopped before configuration", 2792 dev_data->port_id); 2793 return -EBUSY; 2794 } 2795 2796 if (rpst->i40e_pf_eth) { 2797 ret = rpst->i40e_pf_eth->dev_ops->mtu_set(rpst->i40e_pf_eth, 2798 mtu); 2799 if (!ret) 2800 rpst->i40e_pf_eth->data->mtu = mtu; 2801 } 2802 2803 return ret; 2804 } 2805 2806 static int 2807 ipn3ke_afu_flow_ops_get(struct rte_eth_dev *ethdev, 2808 const struct rte_flow_ops **ops) 2809 { 2810 struct ipn3ke_hw *hw; 2811 struct ipn3ke_rpst *rpst; 2812 2813 if (ethdev == NULL) 2814 return -EINVAL; 2815 2816 hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev); 2817 rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2818 2819 if (hw->acc_flow) 2820 *ops = &ipn3ke_flow_ops; 2821 else if (rpst->i40e_pf_eth) 2822 (*rpst->i40e_pf_eth->dev_ops->flow_ops_get)(ethdev, ops); 2823 else 2824 return -EINVAL; 2825 2826 return 0; 2827 } 2828 2829 static const struct eth_dev_ops ipn3ke_rpst_dev_ops = { 2830 .dev_infos_get = ipn3ke_rpst_dev_infos_get, 2831 2832 .dev_configure = ipn3ke_rpst_dev_configure, 2833 .dev_start = ipn3ke_rpst_dev_start, 2834 .dev_stop = ipn3ke_rpst_dev_stop, 2835 .dev_close = ipn3ke_rpst_dev_close, 2836 .dev_reset = ipn3ke_rpst_dev_reset, 2837 2838 .stats_get = ipn3ke_rpst_stats_get, 2839 .xstats_get = ipn3ke_rpst_xstats_get, 2840 .xstats_get_names = ipn3ke_rpst_xstats_get_names, 2841 .stats_reset = ipn3ke_rpst_stats_reset, 2842 .xstats_reset = ipn3ke_rpst_stats_reset, 2843 2844 .flow_ops_get = ipn3ke_afu_flow_ops_get, 2845 2846 .rx_queue_start = ipn3ke_rpst_rx_queue_start, 2847 .rx_queue_stop = ipn3ke_rpst_rx_queue_stop, 2848 .tx_queue_start = ipn3ke_rpst_tx_queue_start, 2849 .tx_queue_stop = ipn3ke_rpst_tx_queue_stop, 2850 .rx_queue_setup = ipn3ke_rpst_rx_queue_setup, 2851 .tx_queue_setup = ipn3ke_rpst_tx_queue_setup, 2852 2853 .dev_set_link_up = ipn3ke_rpst_dev_set_link_up, 2854 .dev_set_link_down = ipn3ke_rpst_dev_set_link_down, 2855 .link_update = ipn3ke_rpst_link_update, 2856 2857 .promiscuous_enable = ipn3ke_rpst_promiscuous_enable, 2858 .promiscuous_disable = ipn3ke_rpst_promiscuous_disable, 2859 .allmulticast_enable = ipn3ke_rpst_allmulticast_enable, 2860 .allmulticast_disable = ipn3ke_rpst_allmulticast_disable, 2861 .mac_addr_set = ipn3ke_rpst_mac_addr_set, 2862 .mtu_set = ipn3ke_rpst_mtu_set, 2863 2864 .tm_ops_get = ipn3ke_tm_ops_get, 2865 }; 2866 2867 static uint16_t ipn3ke_rpst_recv_pkts(__rte_unused void *rx_q, 2868 __rte_unused struct rte_mbuf **rx_pkts, __rte_unused uint16_t nb_pkts) 2869 { 2870 return 0; 2871 } 2872 2873 static uint16_t 2874 ipn3ke_rpst_xmit_pkts(__rte_unused void *tx_queue, 2875 __rte_unused struct rte_mbuf **tx_pkts, __rte_unused uint16_t nb_pkts) 2876 { 2877 return 0; 2878 } 2879 2880 int 2881 ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params) 2882 { 2883 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2884 struct ipn3ke_rpst *representor_param = 2885 (struct ipn3ke_rpst *)init_params; 2886 2887 if (representor_param->port_id >= representor_param->hw->port_num) 2888 return -ENODEV; 2889 2890 if (ipn3ke_bridge_func.set_i40e_sw_dev == NULL) 2891 return -ENOMEM; 2892 2893 rpst->ethdev = ethdev; 2894 rpst->switch_domain_id = representor_param->switch_domain_id; 2895 rpst->port_id = representor_param->port_id; 2896 rpst->hw = representor_param->hw; 2897 rpst->i40e_pf_eth = representor_param->i40e_pf_eth; 2898 rpst->i40e_pf_eth_port_id = representor_param->i40e_pf_eth_port_id; 2899 if (rpst->i40e_pf_eth) 2900 ipn3ke_bridge_func.set_i40e_sw_dev(rpst->i40e_pf_eth_port_id, 2901 rpst->ethdev); 2902 2903 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke", RTE_ETHER_ADDR_LEN, 0); 2904 if (!ethdev->data->mac_addrs) { 2905 IPN3KE_AFU_PMD_ERR("Failed to " 2906 "allocated memory for storing mac address"); 2907 return -ENODEV; 2908 } 2909 2910 if (rpst->hw->tm_hw_enable) 2911 ipn3ke_tm_init(rpst); 2912 2913 /* Set representor device ops */ 2914 ethdev->dev_ops = &ipn3ke_rpst_dev_ops; 2915 2916 /* No data-path, but need stub Rx/Tx functions to avoid crash 2917 * when testing with the likes of testpmd. 2918 */ 2919 ethdev->rx_pkt_burst = ipn3ke_rpst_recv_pkts; 2920 ethdev->tx_pkt_burst = ipn3ke_rpst_xmit_pkts; 2921 2922 ethdev->data->nb_rx_queues = 1; 2923 ethdev->data->nb_tx_queues = 1; 2924 2925 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke_afu_representor", 2926 RTE_ETHER_ADDR_LEN, 2927 0); 2928 if (!ethdev->data->mac_addrs) { 2929 IPN3KE_AFU_PMD_ERR("Failed to " 2930 "allocated memory for storing mac address"); 2931 return -ENODEV; 2932 } 2933 2934 ethdev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR | 2935 RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 2936 2937 rte_spinlock_lock(&ipn3ke_link_notify_list_lk); 2938 TAILQ_INSERT_TAIL(&ipn3ke_rpst_list, rpst, next); 2939 ipn3ke_rpst_scan_num++; 2940 ipn3ke_rpst_scan_check(); 2941 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk); 2942 2943 return 0; 2944 } 2945 2946 int 2947 ipn3ke_rpst_uninit(struct rte_eth_dev *ethdev) 2948 { 2949 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev); 2950 2951 rte_spinlock_lock(&ipn3ke_link_notify_list_lk); 2952 TAILQ_REMOVE(&ipn3ke_rpst_list, rpst, next); 2953 ipn3ke_rpst_scan_num--; 2954 ipn3ke_rpst_scan_check(); 2955 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk); 2956 2957 return 0; 2958 } 2959